10ca87f05SMatt Evans /* bpf_jit.h: BPF JIT compiler for PPC64 20ca87f05SMatt Evans * 30ca87f05SMatt Evans * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation 40ca87f05SMatt Evans * 50ca87f05SMatt Evans * This program is free software; you can redistribute it and/or 60ca87f05SMatt Evans * modify it under the terms of the GNU General Public License 70ca87f05SMatt Evans * as published by the Free Software Foundation; version 2 80ca87f05SMatt Evans * of the License. 90ca87f05SMatt Evans */ 100ca87f05SMatt Evans #ifndef _BPF_JIT_H 110ca87f05SMatt Evans #define _BPF_JIT_H 120ca87f05SMatt Evans 1309ca5ab2SDenis Kirjanov #ifdef CONFIG_PPC64 1409ca5ab2SDenis Kirjanov #define BPF_PPC_STACK_R3_OFF 48 150ca87f05SMatt Evans #define BPF_PPC_STACK_LOCALS 32 160ca87f05SMatt Evans #define BPF_PPC_STACK_BASIC (48+64) 170ca87f05SMatt Evans #define BPF_PPC_STACK_SAVE (18*8) 180ca87f05SMatt Evans #define BPF_PPC_STACKFRAME (BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \ 190ca87f05SMatt Evans BPF_PPC_STACK_SAVE) 200ca87f05SMatt Evans #define BPF_PPC_SLOWPATH_FRAME (48+64) 2109ca5ab2SDenis Kirjanov #else 2209ca5ab2SDenis Kirjanov #define BPF_PPC_STACK_R3_OFF 24 2309ca5ab2SDenis Kirjanov #define BPF_PPC_STACK_LOCALS 16 2409ca5ab2SDenis Kirjanov #define BPF_PPC_STACK_BASIC (24+32) 2509ca5ab2SDenis Kirjanov #define BPF_PPC_STACK_SAVE (18*4) 2609ca5ab2SDenis Kirjanov #define BPF_PPC_STACKFRAME (BPF_PPC_STACK_BASIC+BPF_PPC_STACK_LOCALS+ \ 2709ca5ab2SDenis Kirjanov BPF_PPC_STACK_SAVE) 2809ca5ab2SDenis Kirjanov #define BPF_PPC_SLOWPATH_FRAME (24+32) 2909ca5ab2SDenis Kirjanov #endif 3009ca5ab2SDenis Kirjanov 3109ca5ab2SDenis Kirjanov #define REG_SZ (BITS_PER_LONG/8) 320ca87f05SMatt Evans 330ca87f05SMatt Evans /* 340ca87f05SMatt Evans * Generated code register usage: 350ca87f05SMatt Evans * 360ca87f05SMatt Evans * As normal PPC C ABI (e.g. r1=sp, r2=TOC), with: 370ca87f05SMatt Evans * 380ca87f05SMatt Evans * skb r3 (Entry parameter) 390ca87f05SMatt Evans * A register r4 400ca87f05SMatt Evans * X register r5 410ca87f05SMatt Evans * addr param r6 420ca87f05SMatt Evans * r7-r10 scratch 430ca87f05SMatt Evans * skb->data r14 440ca87f05SMatt Evans * skb headlen r15 (skb->len - skb->data_len) 450ca87f05SMatt Evans * m[0] r16 460ca87f05SMatt Evans * m[...] ... 470ca87f05SMatt Evans * m[15] r31 480ca87f05SMatt Evans */ 490ca87f05SMatt Evans #define r_skb 3 500ca87f05SMatt Evans #define r_ret 3 510ca87f05SMatt Evans #define r_A 4 520ca87f05SMatt Evans #define r_X 5 530ca87f05SMatt Evans #define r_addr 6 540ca87f05SMatt Evans #define r_scratch1 7 55b0c06d33SVladimir Murzin #define r_scratch2 8 560ca87f05SMatt Evans #define r_D 14 570ca87f05SMatt Evans #define r_HL 15 580ca87f05SMatt Evans #define r_M 16 590ca87f05SMatt Evans 600ca87f05SMatt Evans #ifndef __ASSEMBLY__ 610ca87f05SMatt Evans 620ca87f05SMatt Evans /* 630ca87f05SMatt Evans * Assembly helpers from arch/powerpc/net/bpf_jit.S: 640ca87f05SMatt Evans */ 6505be1824SJan Seiffert #define DECLARE_LOAD_FUNC(func) \ 6605be1824SJan Seiffert extern u8 func[], func##_negative_offset[], func##_positive_offset[] 6705be1824SJan Seiffert 6805be1824SJan Seiffert DECLARE_LOAD_FUNC(sk_load_word); 6905be1824SJan Seiffert DECLARE_LOAD_FUNC(sk_load_half); 7005be1824SJan Seiffert DECLARE_LOAD_FUNC(sk_load_byte); 7105be1824SJan Seiffert DECLARE_LOAD_FUNC(sk_load_byte_msh); 720ca87f05SMatt Evans 7309ca5ab2SDenis Kirjanov #ifdef CONFIG_PPC64 740ca87f05SMatt Evans #define FUNCTION_DESCR_SIZE 24 7509ca5ab2SDenis Kirjanov #else 7609ca5ab2SDenis Kirjanov #define FUNCTION_DESCR_SIZE 0 7709ca5ab2SDenis Kirjanov #endif 780ca87f05SMatt Evans 790ca87f05SMatt Evans /* 800ca87f05SMatt Evans * 16-bit immediate helper macros: HA() is for use with sign-extending instrs 810ca87f05SMatt Evans * (e.g. LD, ADDI). If the bottom 16 bits is "-ve", add another bit into the 820ca87f05SMatt Evans * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000). 830ca87f05SMatt Evans */ 840ca87f05SMatt Evans #define IMM_H(i) ((uintptr_t)(i)>>16) 850ca87f05SMatt Evans #define IMM_HA(i) (((uintptr_t)(i)>>16) + \ 860ca87f05SMatt Evans (((uintptr_t)(i) & 0x8000) >> 15)) 870ca87f05SMatt Evans #define IMM_L(i) ((uintptr_t)(i) & 0xffff) 880ca87f05SMatt Evans 890ca87f05SMatt Evans #define PLANT_INSTR(d, idx, instr) \ 900ca87f05SMatt Evans do { if (d) { (d)[idx] = instr; } idx++; } while (0) 910ca87f05SMatt Evans #define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr) 920ca87f05SMatt Evans 930ca87f05SMatt Evans #define PPC_NOP() EMIT(PPC_INST_NOP) 940ca87f05SMatt Evans #define PPC_BLR() EMIT(PPC_INST_BLR) 950ca87f05SMatt Evans #define PPC_BLRL() EMIT(PPC_INST_BLRL) 96cdaade71SMichael Neuling #define PPC_MTLR(r) EMIT(PPC_INST_MTLR | ___PPC_RT(r)) 97cdaade71SMichael Neuling #define PPC_ADDI(d, a, i) EMIT(PPC_INST_ADDI | ___PPC_RT(d) | \ 98cdaade71SMichael Neuling ___PPC_RA(a) | IMM_L(i)) 990ca87f05SMatt Evans #define PPC_MR(d, a) PPC_OR(d, a, a) 1000ca87f05SMatt Evans #define PPC_LI(r, i) PPC_ADDI(r, 0, i) 1010ca87f05SMatt Evans #define PPC_ADDIS(d, a, i) EMIT(PPC_INST_ADDIS | \ 102cdaade71SMichael Neuling ___PPC_RS(d) | ___PPC_RA(a) | IMM_L(i)) 1030ca87f05SMatt Evans #define PPC_LIS(r, i) PPC_ADDIS(r, 0, i) 104cdaade71SMichael Neuling #define PPC_STD(r, base, i) EMIT(PPC_INST_STD | ___PPC_RS(r) | \ 105cdaade71SMichael Neuling ___PPC_RA(base) | ((i) & 0xfffc)) 10609ca5ab2SDenis Kirjanov #define PPC_STDU(r, base, i) EMIT(PPC_INST_STDU | ___PPC_RS(r) | \ 10709ca5ab2SDenis Kirjanov ___PPC_RA(base) | ((i) & 0xfffc)) 10809ca5ab2SDenis Kirjanov #define PPC_STW(r, base, i) EMIT(PPC_INST_STW | ___PPC_RS(r) | \ 10909ca5ab2SDenis Kirjanov ___PPC_RA(base) | ((i) & 0xfffc)) 11009ca5ab2SDenis Kirjanov #define PPC_STWU(r, base, i) EMIT(PPC_INST_STWU | ___PPC_RS(r) | \ 11109ca5ab2SDenis Kirjanov ___PPC_RA(base) | ((i) & 0xfffc)) 1124e235761SDenis Kirjanov 1134e235761SDenis Kirjanov #define PPC_LBZ(r, base, i) EMIT(PPC_INST_LBZ | ___PPC_RT(r) | \ 1144e235761SDenis Kirjanov ___PPC_RA(base) | IMM_L(i)) 115cdaade71SMichael Neuling #define PPC_LD(r, base, i) EMIT(PPC_INST_LD | ___PPC_RT(r) | \ 116cdaade71SMichael Neuling ___PPC_RA(base) | IMM_L(i)) 117cdaade71SMichael Neuling #define PPC_LWZ(r, base, i) EMIT(PPC_INST_LWZ | ___PPC_RT(r) | \ 118cdaade71SMichael Neuling ___PPC_RA(base) | IMM_L(i)) 119cdaade71SMichael Neuling #define PPC_LHZ(r, base, i) EMIT(PPC_INST_LHZ | ___PPC_RT(r) | \ 120cdaade71SMichael Neuling ___PPC_RA(base) | IMM_L(i)) 1219c662cadSPhilippe Bergheaud #define PPC_LHBRX(r, base, b) EMIT(PPC_INST_LHBRX | ___PPC_RT(r) | \ 1229c662cadSPhilippe Bergheaud ___PPC_RA(base) | ___PPC_RB(b)) 12309ca5ab2SDenis Kirjanov 12409ca5ab2SDenis Kirjanov #ifdef CONFIG_PPC64 12509ca5ab2SDenis Kirjanov #define PPC_BPF_LL(r, base, i) do { PPC_LD(r, base, i); } while(0) 12609ca5ab2SDenis Kirjanov #define PPC_BPF_STL(r, base, i) do { PPC_STD(r, base, i); } while(0) 12709ca5ab2SDenis Kirjanov #define PPC_BPF_STLU(r, base, i) do { PPC_STDU(r, base, i); } while(0) 12809ca5ab2SDenis Kirjanov #else 12909ca5ab2SDenis Kirjanov #define PPC_BPF_LL(r, base, i) do { PPC_LWZ(r, base, i); } while(0) 13009ca5ab2SDenis Kirjanov #define PPC_BPF_STL(r, base, i) do { PPC_STW(r, base, i); } while(0) 13109ca5ab2SDenis Kirjanov #define PPC_BPF_STLU(r, base, i) do { PPC_STWU(r, base, i); } while(0) 13209ca5ab2SDenis Kirjanov #endif 13309ca5ab2SDenis Kirjanov 1340ca87f05SMatt Evans /* Convenience helpers for the above with 'far' offsets: */ 1354e235761SDenis Kirjanov #define PPC_LBZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LBZ(r, base, i); \ 1364e235761SDenis Kirjanov else { PPC_ADDIS(r, base, IMM_HA(i)); \ 1374e235761SDenis Kirjanov PPC_LBZ(r, r, IMM_L(i)); } } while(0) 1384e235761SDenis Kirjanov 1390ca87f05SMatt Evans #define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i); \ 1400ca87f05SMatt Evans else { PPC_ADDIS(r, base, IMM_HA(i)); \ 1410ca87f05SMatt Evans PPC_LD(r, r, IMM_L(i)); } } while(0) 1420ca87f05SMatt Evans 1430ca87f05SMatt Evans #define PPC_LWZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LWZ(r, base, i); \ 1440ca87f05SMatt Evans else { PPC_ADDIS(r, base, IMM_HA(i)); \ 1450ca87f05SMatt Evans PPC_LWZ(r, r, IMM_L(i)); } } while(0) 1460ca87f05SMatt Evans 1470ca87f05SMatt Evans #define PPC_LHZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LHZ(r, base, i); \ 1480ca87f05SMatt Evans else { PPC_ADDIS(r, base, IMM_HA(i)); \ 1490ca87f05SMatt Evans PPC_LHZ(r, r, IMM_L(i)); } } while(0) 1500ca87f05SMatt Evans 15109ca5ab2SDenis Kirjanov #ifdef CONFIG_PPC64 15209ca5ab2SDenis Kirjanov #define PPC_LL_OFFS(r, base, i) do { PPC_LD_OFFS(r, base, i); } while(0) 15309ca5ab2SDenis Kirjanov #else 15409ca5ab2SDenis Kirjanov #define PPC_LL_OFFS(r, base, i) do { PPC_LWZ_OFFS(r, base, i); } while(0) 15509ca5ab2SDenis Kirjanov #endif 15609ca5ab2SDenis Kirjanov 15702290948SDenis Kirjanov #ifdef CONFIG_SMP 15802290948SDenis Kirjanov #ifdef CONFIG_PPC64 15902290948SDenis Kirjanov #define PPC_BPF_LOAD_CPU(r) \ 16002290948SDenis Kirjanov do { BUILD_BUG_ON(FIELD_SIZEOF(struct paca_struct, paca_index) != 2); \ 16102290948SDenis Kirjanov PPC_LHZ_OFFS(r, 13, offsetof(struct paca_struct, paca_index)); \ 16202290948SDenis Kirjanov } while (0) 16302290948SDenis Kirjanov #else 16402290948SDenis Kirjanov #define PPC_BPF_LOAD_CPU(r) \ 16502290948SDenis Kirjanov do { BUILD_BUG_ON(FIELD_SIZEOF(struct thread_info, cpu) != 4); \ 16602290948SDenis Kirjanov PPC_LHZ_OFFS(r, (1 & ~(THREAD_SIZE - 1)), \ 16702290948SDenis Kirjanov offsetof(struct thread_info, cpu)); \ 16802290948SDenis Kirjanov } while(0) 16902290948SDenis Kirjanov #endif 17002290948SDenis Kirjanov #else 17102290948SDenis Kirjanov #define PPC_BPF_LOAD_CPU(r) do { PPC_LI(r, 0); } while(0) 17202290948SDenis Kirjanov #endif 17302290948SDenis Kirjanov 174cdaade71SMichael Neuling #define PPC_CMPWI(a, i) EMIT(PPC_INST_CMPWI | ___PPC_RA(a) | IMM_L(i)) 175cdaade71SMichael Neuling #define PPC_CMPDI(a, i) EMIT(PPC_INST_CMPDI | ___PPC_RA(a) | IMM_L(i)) 176cdaade71SMichael Neuling #define PPC_CMPLWI(a, i) EMIT(PPC_INST_CMPLWI | ___PPC_RA(a) | IMM_L(i)) 177cdaade71SMichael Neuling #define PPC_CMPLW(a, b) EMIT(PPC_INST_CMPLW | ___PPC_RA(a) | ___PPC_RB(b)) 1780ca87f05SMatt Evans 179cdaade71SMichael Neuling #define PPC_SUB(d, a, b) EMIT(PPC_INST_SUB | ___PPC_RT(d) | \ 180cdaade71SMichael Neuling ___PPC_RB(a) | ___PPC_RA(b)) 181cdaade71SMichael Neuling #define PPC_ADD(d, a, b) EMIT(PPC_INST_ADD | ___PPC_RT(d) | \ 182cdaade71SMichael Neuling ___PPC_RA(a) | ___PPC_RB(b)) 183cdaade71SMichael Neuling #define PPC_MUL(d, a, b) EMIT(PPC_INST_MULLW | ___PPC_RT(d) | \ 184cdaade71SMichael Neuling ___PPC_RA(a) | ___PPC_RB(b)) 185cdaade71SMichael Neuling #define PPC_MULHWU(d, a, b) EMIT(PPC_INST_MULHWU | ___PPC_RT(d) | \ 186cdaade71SMichael Neuling ___PPC_RA(a) | ___PPC_RB(b)) 187cdaade71SMichael Neuling #define PPC_MULI(d, a, i) EMIT(PPC_INST_MULLI | ___PPC_RT(d) | \ 188cdaade71SMichael Neuling ___PPC_RA(a) | IMM_L(i)) 189cdaade71SMichael Neuling #define PPC_DIVWU(d, a, b) EMIT(PPC_INST_DIVWU | ___PPC_RT(d) | \ 190cdaade71SMichael Neuling ___PPC_RA(a) | ___PPC_RB(b)) 191cdaade71SMichael Neuling #define PPC_AND(d, a, b) EMIT(PPC_INST_AND | ___PPC_RA(d) | \ 192cdaade71SMichael Neuling ___PPC_RS(a) | ___PPC_RB(b)) 193cdaade71SMichael Neuling #define PPC_ANDI(d, a, i) EMIT(PPC_INST_ANDI | ___PPC_RA(d) | \ 194cdaade71SMichael Neuling ___PPC_RS(a) | IMM_L(i)) 195cdaade71SMichael Neuling #define PPC_AND_DOT(d, a, b) EMIT(PPC_INST_ANDDOT | ___PPC_RA(d) | \ 196cdaade71SMichael Neuling ___PPC_RS(a) | ___PPC_RB(b)) 197cdaade71SMichael Neuling #define PPC_OR(d, a, b) EMIT(PPC_INST_OR | ___PPC_RA(d) | \ 198cdaade71SMichael Neuling ___PPC_RS(a) | ___PPC_RB(b)) 199cdaade71SMichael Neuling #define PPC_ORI(d, a, i) EMIT(PPC_INST_ORI | ___PPC_RA(d) | \ 200cdaade71SMichael Neuling ___PPC_RS(a) | IMM_L(i)) 201cdaade71SMichael Neuling #define PPC_ORIS(d, a, i) EMIT(PPC_INST_ORIS | ___PPC_RA(d) | \ 202cdaade71SMichael Neuling ___PPC_RS(a) | IMM_L(i)) 20302871903SDaniel Borkmann #define PPC_XOR(d, a, b) EMIT(PPC_INST_XOR | ___PPC_RA(d) | \ 20402871903SDaniel Borkmann ___PPC_RS(a) | ___PPC_RB(b)) 20502871903SDaniel Borkmann #define PPC_XORI(d, a, i) EMIT(PPC_INST_XORI | ___PPC_RA(d) | \ 20602871903SDaniel Borkmann ___PPC_RS(a) | IMM_L(i)) 20702871903SDaniel Borkmann #define PPC_XORIS(d, a, i) EMIT(PPC_INST_XORIS | ___PPC_RA(d) | \ 20802871903SDaniel Borkmann ___PPC_RS(a) | IMM_L(i)) 209cdaade71SMichael Neuling #define PPC_SLW(d, a, s) EMIT(PPC_INST_SLW | ___PPC_RA(d) | \ 210cdaade71SMichael Neuling ___PPC_RS(a) | ___PPC_RB(s)) 211cdaade71SMichael Neuling #define PPC_SRW(d, a, s) EMIT(PPC_INST_SRW | ___PPC_RA(d) | \ 212cdaade71SMichael Neuling ___PPC_RS(a) | ___PPC_RB(s)) 213277285b8SNaveen N. Rao #define PPC_RLWINM(d, a, i, mb, me) EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \ 214277285b8SNaveen N. Rao ___PPC_RS(a) | __PPC_SH(i) | \ 215277285b8SNaveen N. Rao __PPC_MB(mb) | __PPC_ME(me)) 216277285b8SNaveen N. Rao #define PPC_RLDICR(d, a, i, me) EMIT(PPC_INST_RLDICR | ___PPC_RA(d) | \ 217277285b8SNaveen N. Rao ___PPC_RS(a) | __PPC_SH(i) | \ 218277285b8SNaveen N. Rao __PPC_ME64(me) | (((i) & 0x20) >> 4)) 219277285b8SNaveen N. Rao 2200ca87f05SMatt Evans /* slwi = rlwinm Rx, Ry, n, 0, 31-n */ 221277285b8SNaveen N. Rao #define PPC_SLWI(d, a, i) PPC_RLWINM(d, a, i, 0, 31-(i)) 2220ca87f05SMatt Evans /* srwi = rlwinm Rx, Ry, 32-n, n, 31 */ 223277285b8SNaveen N. Rao #define PPC_SRWI(d, a, i) PPC_RLWINM(d, a, 32-(i), i, 31) 2240ca87f05SMatt Evans /* sldi = rldicr Rx, Ry, n, 63-n */ 225277285b8SNaveen N. Rao #define PPC_SLDI(d, a, i) PPC_RLDICR(d, a, i, 63-(i)) 226277285b8SNaveen N. Rao 227cdaade71SMichael Neuling #define PPC_NEG(d, a) EMIT(PPC_INST_NEG | ___PPC_RT(d) | ___PPC_RA(a)) 2280ca87f05SMatt Evans 2290ca87f05SMatt Evans /* Long jump; (unconditional 'branch') */ 2300ca87f05SMatt Evans #define PPC_JMP(dest) EMIT(PPC_INST_BRANCH | \ 2310ca87f05SMatt Evans (((dest) - (ctx->idx * 4)) & 0x03fffffc)) 2320ca87f05SMatt Evans /* "cond" here covers BO:BI fields. */ 2330ca87f05SMatt Evans #define PPC_BCC_SHORT(cond, dest) EMIT(PPC_INST_BRANCH_COND | \ 2340ca87f05SMatt Evans (((cond) & 0x3ff) << 16) | \ 2350ca87f05SMatt Evans (((dest) - (ctx->idx * 4)) & \ 2360ca87f05SMatt Evans 0xfffc)) 237aaf2f7e0SNaveen N. Rao /* Sign-extended 32-bit immediate load */ 238aaf2f7e0SNaveen N. Rao #define PPC_LI32(d, i) do { \ 239aaf2f7e0SNaveen N. Rao if ((int)(uintptr_t)(i) >= -32768 && \ 240aaf2f7e0SNaveen N. Rao (int)(uintptr_t)(i) < 32768) \ 241aaf2f7e0SNaveen N. Rao PPC_LI(d, i); \ 242aaf2f7e0SNaveen N. Rao else { \ 243aaf2f7e0SNaveen N. Rao PPC_LIS(d, IMM_H(i)); \ 244aaf2f7e0SNaveen N. Rao if (IMM_L(i)) \ 245aaf2f7e0SNaveen N. Rao PPC_ORI(d, d, IMM_L(i)); \ 2460ca87f05SMatt Evans } } while(0) 247aaf2f7e0SNaveen N. Rao 2480ca87f05SMatt Evans #define PPC_LI64(d, i) do { \ 249b1a05787SNaveen N. Rao if ((long)(i) >= -2147483648 && \ 250b1a05787SNaveen N. Rao (long)(i) < 2147483648) \ 2510ca87f05SMatt Evans PPC_LI32(d, i); \ 2520ca87f05SMatt Evans else { \ 253b1a05787SNaveen N. Rao if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \ 254b1a05787SNaveen N. Rao PPC_LI(d, ((uintptr_t)(i) >> 32) & 0xffff); \ 255b1a05787SNaveen N. Rao else { \ 2560ca87f05SMatt Evans PPC_LIS(d, ((uintptr_t)(i) >> 48)); \ 2570ca87f05SMatt Evans if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \ 2580ca87f05SMatt Evans PPC_ORI(d, d, \ 2590ca87f05SMatt Evans ((uintptr_t)(i) >> 32) & 0xffff); \ 260b1a05787SNaveen N. Rao } \ 2610ca87f05SMatt Evans PPC_SLDI(d, d, 32); \ 2620ca87f05SMatt Evans if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \ 2630ca87f05SMatt Evans PPC_ORIS(d, d, \ 2640ca87f05SMatt Evans ((uintptr_t)(i) >> 16) & 0xffff); \ 2650ca87f05SMatt Evans if ((uintptr_t)(i) & 0x000000000000ffffULL) \ 2660ca87f05SMatt Evans PPC_ORI(d, d, (uintptr_t)(i) & 0xffff); \ 267b1a05787SNaveen N. Rao } } while (0) 2680ca87f05SMatt Evans 26909ca5ab2SDenis Kirjanov #ifdef CONFIG_PPC64 27009ca5ab2SDenis Kirjanov #define PPC_FUNC_ADDR(d,i) do { PPC_LI64(d, i); } while(0) 27109ca5ab2SDenis Kirjanov #else 27209ca5ab2SDenis Kirjanov #define PPC_FUNC_ADDR(d,i) do { PPC_LI32(d, i); } while(0) 27309ca5ab2SDenis Kirjanov #endif 27409ca5ab2SDenis Kirjanov 2759c662cadSPhilippe Bergheaud #define PPC_LHBRX_OFFS(r, base, i) \ 2769c662cadSPhilippe Bergheaud do { PPC_LI32(r, i); PPC_LHBRX(r, r, base); } while(0) 2779c662cadSPhilippe Bergheaud #ifdef __LITTLE_ENDIAN__ 2789c662cadSPhilippe Bergheaud #define PPC_NTOHS_OFFS(r, base, i) PPC_LHBRX_OFFS(r, base, i) 2799c662cadSPhilippe Bergheaud #else 2809c662cadSPhilippe Bergheaud #define PPC_NTOHS_OFFS(r, base, i) PPC_LHZ_OFFS(r, base, i) 2819c662cadSPhilippe Bergheaud #endif 2829c662cadSPhilippe Bergheaud 2830ca87f05SMatt Evans static inline bool is_nearbranch(int offset) 2840ca87f05SMatt Evans { 2850ca87f05SMatt Evans return (offset < 32768) && (offset >= -32768); 2860ca87f05SMatt Evans } 2870ca87f05SMatt Evans 2880ca87f05SMatt Evans /* 2890ca87f05SMatt Evans * The fly in the ointment of code size changing from pass to pass is 2900ca87f05SMatt Evans * avoided by padding the short branch case with a NOP. If code size differs 2910ca87f05SMatt Evans * with different branch reaches we will have the issue of code moving from 2920ca87f05SMatt Evans * one pass to the next and will need a few passes to converge on a stable 2930ca87f05SMatt Evans * state. 2940ca87f05SMatt Evans */ 2950ca87f05SMatt Evans #define PPC_BCC(cond, dest) do { \ 2960ca87f05SMatt Evans if (is_nearbranch((dest) - (ctx->idx * 4))) { \ 2970ca87f05SMatt Evans PPC_BCC_SHORT(cond, dest); \ 2980ca87f05SMatt Evans PPC_NOP(); \ 2990ca87f05SMatt Evans } else { \ 3000ca87f05SMatt Evans /* Flip the 'T or F' bit to invert comparison */ \ 3010ca87f05SMatt Evans PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, (ctx->idx+2)*4); \ 3020ca87f05SMatt Evans PPC_JMP(dest); \ 3030ca87f05SMatt Evans } } while(0) 3040ca87f05SMatt Evans 3050ca87f05SMatt Evans /* To create a branch condition, select a bit of cr0... */ 3060ca87f05SMatt Evans #define CR0_LT 0 3070ca87f05SMatt Evans #define CR0_GT 1 3080ca87f05SMatt Evans #define CR0_EQ 2 3090ca87f05SMatt Evans /* ...and modify BO[3] */ 3100ca87f05SMatt Evans #define COND_CMP_TRUE 0x100 3110ca87f05SMatt Evans #define COND_CMP_FALSE 0x000 3120ca87f05SMatt Evans /* Together, they make all required comparisons: */ 3130ca87f05SMatt Evans #define COND_GT (CR0_GT | COND_CMP_TRUE) 3140ca87f05SMatt Evans #define COND_GE (CR0_LT | COND_CMP_FALSE) 3150ca87f05SMatt Evans #define COND_EQ (CR0_EQ | COND_CMP_TRUE) 3160ca87f05SMatt Evans #define COND_NE (CR0_EQ | COND_CMP_FALSE) 3170ca87f05SMatt Evans #define COND_LT (CR0_LT | COND_CMP_TRUE) 3180ca87f05SMatt Evans 3190ca87f05SMatt Evans #define SEEN_DATAREF 0x10000 /* might call external helpers */ 3200ca87f05SMatt Evans #define SEEN_XREG 0x20000 /* X reg is used */ 3210ca87f05SMatt Evans #define SEEN_MEM 0x40000 /* SEEN_MEM+(1<<n) = use mem[n] for temporary 3220ca87f05SMatt Evans * storage */ 3230ca87f05SMatt Evans #define SEEN_MEM_MSK 0x0ffff 3240ca87f05SMatt Evans 3250ca87f05SMatt Evans struct codegen_context { 3260ca87f05SMatt Evans unsigned int seen; 3270ca87f05SMatt Evans unsigned int idx; 3280ca87f05SMatt Evans int pc_ret0; /* bpf index of first RET #0 instruction (if any) */ 3290ca87f05SMatt Evans }; 3300ca87f05SMatt Evans 3310ca87f05SMatt Evans #endif 3320ca87f05SMatt Evans 3330ca87f05SMatt Evans #endif 334