1b886d83cSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 26ac0ba5aSNaveen N. Rao /* 36ac0ba5aSNaveen N. Rao * bpf_jit.h: BPF JIT compiler for PPC 40ca87f05SMatt Evans * 50ca87f05SMatt Evans * Copyright 2011 Matt Evans <matt@ozlabs.org>, IBM Corporation 6156d0e29SNaveen N. Rao * 2016 Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com> 70ca87f05SMatt Evans */ 80ca87f05SMatt Evans #ifndef _BPF_JIT_H 90ca87f05SMatt Evans #define _BPF_JIT_H 100ca87f05SMatt Evans 110ca87f05SMatt Evans #ifndef __ASSEMBLY__ 120ca87f05SMatt Evans 13156d0e29SNaveen N. Rao #include <asm/types.h> 1406541865SBalamuruhan S #include <asm/ppc-opcode.h> 15156d0e29SNaveen N. Rao 16156d0e29SNaveen N. Rao #ifdef PPC64_ELF_ABI_v1 170ca87f05SMatt Evans #define FUNCTION_DESCR_SIZE 24 1809ca5ab2SDenis Kirjanov #else 1909ca5ab2SDenis Kirjanov #define FUNCTION_DESCR_SIZE 0 2009ca5ab2SDenis Kirjanov #endif 210ca87f05SMatt Evans 220ca87f05SMatt Evans /* 230ca87f05SMatt Evans * 16-bit immediate helper macros: HA() is for use with sign-extending instrs 240ca87f05SMatt Evans * (e.g. LD, ADDI). If the bottom 16 bits is "-ve", add another bit into the 250ca87f05SMatt Evans * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000). 260ca87f05SMatt Evans */ 270ca87f05SMatt Evans #define IMM_H(i) ((uintptr_t)(i)>>16) 280ca87f05SMatt Evans #define IMM_HA(i) (((uintptr_t)(i)>>16) + \ 290ca87f05SMatt Evans (((uintptr_t)(i) & 0x8000) >> 15)) 300ca87f05SMatt Evans 310ca87f05SMatt Evans #define PLANT_INSTR(d, idx, instr) \ 320ca87f05SMatt Evans do { if (d) { (d)[idx] = instr; } idx++; } while (0) 330ca87f05SMatt Evans #define EMIT(instr) PLANT_INSTR(image, ctx->idx, instr) 340ca87f05SMatt Evans 350ca87f05SMatt Evans #define PPC_NOP() EMIT(PPC_INST_NOP) 360ca87f05SMatt Evans #define PPC_BLR() EMIT(PPC_INST_BLR) 370ca87f05SMatt Evans #define PPC_BLRL() EMIT(PPC_INST_BLRL) 38cdaade71SMichael Neuling #define PPC_MTLR(r) EMIT(PPC_INST_MTLR | ___PPC_RT(r)) 39ce076141SNaveen N. Rao #define PPC_BCTR() EMIT(PPC_INST_BCTR) 40ce076141SNaveen N. Rao #define PPC_MTCTR(r) EMIT(PPC_INST_MTCTR | ___PPC_RT(r)) 41cdaade71SMichael Neuling #define PPC_ADDI(d, a, i) EMIT(PPC_INST_ADDI | ___PPC_RT(d) | \ 42cdaade71SMichael Neuling ___PPC_RA(a) | IMM_L(i)) 430ca87f05SMatt Evans #define PPC_MR(d, a) PPC_OR(d, a, a) 440ca87f05SMatt Evans #define PPC_LI(r, i) PPC_ADDI(r, 0, i) 450ca87f05SMatt Evans #define PPC_ADDIS(d, a, i) EMIT(PPC_INST_ADDIS | \ 46cef1e8cdSNaveen N. Rao ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i)) 470ca87f05SMatt Evans #define PPC_LIS(r, i) PPC_ADDIS(r, 0, i) 4886be36f6SNaveen N. Rao #define PPC_STDX(r, base, b) EMIT(PPC_INST_STDX | ___PPC_RS(r) | \ 4986be36f6SNaveen N. Rao ___PPC_RA(base) | ___PPC_RB(b)) 5009ca5ab2SDenis Kirjanov #define PPC_STDU(r, base, i) EMIT(PPC_INST_STDU | ___PPC_RS(r) | \ 5109ca5ab2SDenis Kirjanov ___PPC_RA(base) | ((i) & 0xfffc)) 5209ca5ab2SDenis Kirjanov #define PPC_STW(r, base, i) EMIT(PPC_INST_STW | ___PPC_RS(r) | \ 53cef1e8cdSNaveen N. Rao ___PPC_RA(base) | IMM_L(i)) 5409ca5ab2SDenis Kirjanov #define PPC_STWU(r, base, i) EMIT(PPC_INST_STWU | ___PPC_RS(r) | \ 55cef1e8cdSNaveen N. Rao ___PPC_RA(base) | IMM_L(i)) 56156d0e29SNaveen N. Rao #define PPC_STH(r, base, i) EMIT(PPC_INST_STH | ___PPC_RS(r) | \ 57156d0e29SNaveen N. Rao ___PPC_RA(base) | IMM_L(i)) 58156d0e29SNaveen N. Rao #define PPC_STB(r, base, i) EMIT(PPC_INST_STB | ___PPC_RS(r) | \ 59156d0e29SNaveen N. Rao ___PPC_RA(base) | IMM_L(i)) 604e235761SDenis Kirjanov 614e235761SDenis Kirjanov #define PPC_LBZ(r, base, i) EMIT(PPC_INST_LBZ | ___PPC_RT(r) | \ 624e235761SDenis Kirjanov ___PPC_RA(base) | IMM_L(i)) 6386be36f6SNaveen N. Rao #define PPC_LDX(r, base, b) EMIT(PPC_INST_LDX | ___PPC_RT(r) | \ 6486be36f6SNaveen N. Rao ___PPC_RA(base) | ___PPC_RB(b)) 65cdaade71SMichael Neuling #define PPC_LHZ(r, base, i) EMIT(PPC_INST_LHZ | ___PPC_RT(r) | \ 66cdaade71SMichael Neuling ___PPC_RA(base) | IMM_L(i)) 679c662cadSPhilippe Bergheaud #define PPC_LHBRX(r, base, b) EMIT(PPC_INST_LHBRX | ___PPC_RT(r) | \ 689c662cadSPhilippe Bergheaud ___PPC_RA(base) | ___PPC_RB(b)) 69156d0e29SNaveen N. Rao #define PPC_LDBRX(r, base, b) EMIT(PPC_INST_LDBRX | ___PPC_RT(r) | \ 70156d0e29SNaveen N. Rao ___PPC_RA(base) | ___PPC_RB(b)) 71156d0e29SNaveen N. Rao 72156d0e29SNaveen N. Rao #define PPC_BPF_STWCX(s, a, b) EMIT(PPC_INST_STWCX | ___PPC_RS(s) | \ 73156d0e29SNaveen N. Rao ___PPC_RA(a) | ___PPC_RB(b)) 74cdaade71SMichael Neuling #define PPC_CMPWI(a, i) EMIT(PPC_INST_CMPWI | ___PPC_RA(a) | IMM_L(i)) 75cdaade71SMichael Neuling #define PPC_CMPDI(a, i) EMIT(PPC_INST_CMPDI | ___PPC_RA(a) | IMM_L(i)) 76156d0e29SNaveen N. Rao #define PPC_CMPW(a, b) EMIT(PPC_INST_CMPW | ___PPC_RA(a) | \ 77156d0e29SNaveen N. Rao ___PPC_RB(b)) 78156d0e29SNaveen N. Rao #define PPC_CMPD(a, b) EMIT(PPC_INST_CMPD | ___PPC_RA(a) | \ 79156d0e29SNaveen N. Rao ___PPC_RB(b)) 80cdaade71SMichael Neuling #define PPC_CMPLWI(a, i) EMIT(PPC_INST_CMPLWI | ___PPC_RA(a) | IMM_L(i)) 81156d0e29SNaveen N. Rao #define PPC_CMPLDI(a, i) EMIT(PPC_INST_CMPLDI | ___PPC_RA(a) | IMM_L(i)) 82cef1e8cdSNaveen N. Rao #define PPC_CMPLW(a, b) EMIT(PPC_INST_CMPLW | ___PPC_RA(a) | \ 83cef1e8cdSNaveen N. Rao ___PPC_RB(b)) 84156d0e29SNaveen N. Rao #define PPC_CMPLD(a, b) EMIT(PPC_INST_CMPLD | ___PPC_RA(a) | \ 85156d0e29SNaveen N. Rao ___PPC_RB(b)) 860ca87f05SMatt Evans 87cdaade71SMichael Neuling #define PPC_SUB(d, a, b) EMIT(PPC_INST_SUB | ___PPC_RT(d) | \ 88cdaade71SMichael Neuling ___PPC_RB(a) | ___PPC_RA(b)) 89156d0e29SNaveen N. Rao #define PPC_MULD(d, a, b) EMIT(PPC_INST_MULLD | ___PPC_RT(d) | \ 90156d0e29SNaveen N. Rao ___PPC_RA(a) | ___PPC_RB(b)) 91cef1e8cdSNaveen N. Rao #define PPC_MULW(d, a, b) EMIT(PPC_INST_MULLW | ___PPC_RT(d) | \ 92cdaade71SMichael Neuling ___PPC_RA(a) | ___PPC_RB(b)) 93cdaade71SMichael Neuling #define PPC_MULHWU(d, a, b) EMIT(PPC_INST_MULHWU | ___PPC_RT(d) | \ 94cdaade71SMichael Neuling ___PPC_RA(a) | ___PPC_RB(b)) 95cdaade71SMichael Neuling #define PPC_MULI(d, a, i) EMIT(PPC_INST_MULLI | ___PPC_RT(d) | \ 96cdaade71SMichael Neuling ___PPC_RA(a) | IMM_L(i)) 97cdaade71SMichael Neuling #define PPC_DIVWU(d, a, b) EMIT(PPC_INST_DIVWU | ___PPC_RT(d) | \ 98cdaade71SMichael Neuling ___PPC_RA(a) | ___PPC_RB(b)) 99758f2046SNaveen N. Rao #define PPC_DIVDU(d, a, b) EMIT(PPC_INST_DIVDU | ___PPC_RT(d) | \ 100156d0e29SNaveen N. Rao ___PPC_RA(a) | ___PPC_RB(b)) 101cdaade71SMichael Neuling #define PPC_AND(d, a, b) EMIT(PPC_INST_AND | ___PPC_RA(d) | \ 102cdaade71SMichael Neuling ___PPC_RS(a) | ___PPC_RB(b)) 103cdaade71SMichael Neuling #define PPC_ANDI(d, a, i) EMIT(PPC_INST_ANDI | ___PPC_RA(d) | \ 104cdaade71SMichael Neuling ___PPC_RS(a) | IMM_L(i)) 105cdaade71SMichael Neuling #define PPC_AND_DOT(d, a, b) EMIT(PPC_INST_ANDDOT | ___PPC_RA(d) | \ 106cdaade71SMichael Neuling ___PPC_RS(a) | ___PPC_RB(b)) 107cdaade71SMichael Neuling #define PPC_OR(d, a, b) EMIT(PPC_INST_OR | ___PPC_RA(d) | \ 108cdaade71SMichael Neuling ___PPC_RS(a) | ___PPC_RB(b)) 109156d0e29SNaveen N. Rao #define PPC_MR(d, a) PPC_OR(d, a, a) 110cdaade71SMichael Neuling #define PPC_ORI(d, a, i) EMIT(PPC_INST_ORI | ___PPC_RA(d) | \ 111cdaade71SMichael Neuling ___PPC_RS(a) | IMM_L(i)) 112cdaade71SMichael Neuling #define PPC_ORIS(d, a, i) EMIT(PPC_INST_ORIS | ___PPC_RA(d) | \ 113cdaade71SMichael Neuling ___PPC_RS(a) | IMM_L(i)) 11402871903SDaniel Borkmann #define PPC_XOR(d, a, b) EMIT(PPC_INST_XOR | ___PPC_RA(d) | \ 11502871903SDaniel Borkmann ___PPC_RS(a) | ___PPC_RB(b)) 11602871903SDaniel Borkmann #define PPC_XORI(d, a, i) EMIT(PPC_INST_XORI | ___PPC_RA(d) | \ 11702871903SDaniel Borkmann ___PPC_RS(a) | IMM_L(i)) 11802871903SDaniel Borkmann #define PPC_XORIS(d, a, i) EMIT(PPC_INST_XORIS | ___PPC_RA(d) | \ 11902871903SDaniel Borkmann ___PPC_RS(a) | IMM_L(i)) 120156d0e29SNaveen N. Rao #define PPC_EXTSW(d, a) EMIT(PPC_INST_EXTSW | ___PPC_RA(d) | \ 121156d0e29SNaveen N. Rao ___PPC_RS(a)) 122cdaade71SMichael Neuling #define PPC_SLW(d, a, s) EMIT(PPC_INST_SLW | ___PPC_RA(d) | \ 123cdaade71SMichael Neuling ___PPC_RS(a) | ___PPC_RB(s)) 124156d0e29SNaveen N. Rao #define PPC_SLD(d, a, s) EMIT(PPC_INST_SLD | ___PPC_RA(d) | \ 125156d0e29SNaveen N. Rao ___PPC_RS(a) | ___PPC_RB(s)) 126cdaade71SMichael Neuling #define PPC_SRW(d, a, s) EMIT(PPC_INST_SRW | ___PPC_RA(d) | \ 127cdaade71SMichael Neuling ___PPC_RS(a) | ___PPC_RB(s)) 12844cf43c0SJiong Wang #define PPC_SRAW(d, a, s) EMIT(PPC_INST_SRAW | ___PPC_RA(d) | \ 12944cf43c0SJiong Wang ___PPC_RS(a) | ___PPC_RB(s)) 13044cf43c0SJiong Wang #define PPC_SRAWI(d, a, i) EMIT(PPC_INST_SRAWI | ___PPC_RA(d) | \ 13144cf43c0SJiong Wang ___PPC_RS(a) | __PPC_SH(i)) 132156d0e29SNaveen N. Rao #define PPC_SRD(d, a, s) EMIT(PPC_INST_SRD | ___PPC_RA(d) | \ 133156d0e29SNaveen N. Rao ___PPC_RS(a) | ___PPC_RB(s)) 134156d0e29SNaveen N. Rao #define PPC_SRAD(d, a, s) EMIT(PPC_INST_SRAD | ___PPC_RA(d) | \ 135156d0e29SNaveen N. Rao ___PPC_RS(a) | ___PPC_RB(s)) 136156d0e29SNaveen N. Rao #define PPC_SRADI(d, a, i) EMIT(PPC_INST_SRADI | ___PPC_RA(d) | \ 137c233f597SNaveen N. Rao ___PPC_RS(a) | __PPC_SH64(i)) 138277285b8SNaveen N. Rao #define PPC_RLWINM(d, a, i, mb, me) EMIT(PPC_INST_RLWINM | ___PPC_RA(d) | \ 139277285b8SNaveen N. Rao ___PPC_RS(a) | __PPC_SH(i) | \ 140277285b8SNaveen N. Rao __PPC_MB(mb) | __PPC_ME(me)) 1415f645996SJiong Wang #define PPC_RLWINM_DOT(d, a, i, mb, me) EMIT(PPC_INST_RLWINM_DOT | \ 1425f645996SJiong Wang ___PPC_RA(d) | ___PPC_RS(a) | \ 1435f645996SJiong Wang __PPC_SH(i) | __PPC_MB(mb) | \ 1445f645996SJiong Wang __PPC_ME(me)) 145156d0e29SNaveen N. Rao #define PPC_RLWIMI(d, a, i, mb, me) EMIT(PPC_INST_RLWIMI | ___PPC_RA(d) | \ 146156d0e29SNaveen N. Rao ___PPC_RS(a) | __PPC_SH(i) | \ 147156d0e29SNaveen N. Rao __PPC_MB(mb) | __PPC_ME(me)) 148156d0e29SNaveen N. Rao #define PPC_RLDICL(d, a, i, mb) EMIT(PPC_INST_RLDICL | ___PPC_RA(d) | \ 149c233f597SNaveen N. Rao ___PPC_RS(a) | __PPC_SH64(i) | \ 150c233f597SNaveen N. Rao __PPC_MB64(mb)) 151277285b8SNaveen N. Rao #define PPC_RLDICR(d, a, i, me) EMIT(PPC_INST_RLDICR | ___PPC_RA(d) | \ 152c233f597SNaveen N. Rao ___PPC_RS(a) | __PPC_SH64(i) | \ 153c233f597SNaveen N. Rao __PPC_ME64(me)) 154277285b8SNaveen N. Rao 1550ca87f05SMatt Evans /* slwi = rlwinm Rx, Ry, n, 0, 31-n */ 156277285b8SNaveen N. Rao #define PPC_SLWI(d, a, i) PPC_RLWINM(d, a, i, 0, 31-(i)) 1570ca87f05SMatt Evans /* srwi = rlwinm Rx, Ry, 32-n, n, 31 */ 158277285b8SNaveen N. Rao #define PPC_SRWI(d, a, i) PPC_RLWINM(d, a, 32-(i), i, 31) 1590ca87f05SMatt Evans /* sldi = rldicr Rx, Ry, n, 63-n */ 160277285b8SNaveen N. Rao #define PPC_SLDI(d, a, i) PPC_RLDICR(d, a, i, 63-(i)) 161156d0e29SNaveen N. Rao /* sldi = rldicl Rx, Ry, 64-n, n */ 162156d0e29SNaveen N. Rao #define PPC_SRDI(d, a, i) PPC_RLDICL(d, a, 64-(i), i) 163277285b8SNaveen N. Rao 164cdaade71SMichael Neuling #define PPC_NEG(d, a) EMIT(PPC_INST_NEG | ___PPC_RT(d) | ___PPC_RA(a)) 1650ca87f05SMatt Evans 1660ca87f05SMatt Evans /* Long jump; (unconditional 'branch') */ 1670ca87f05SMatt Evans #define PPC_JMP(dest) EMIT(PPC_INST_BRANCH | \ 1680ca87f05SMatt Evans (((dest) - (ctx->idx * 4)) & 0x03fffffc)) 1690ca87f05SMatt Evans /* "cond" here covers BO:BI fields. */ 1700ca87f05SMatt Evans #define PPC_BCC_SHORT(cond, dest) EMIT(PPC_INST_BRANCH_COND | \ 1710ca87f05SMatt Evans (((cond) & 0x3ff) << 16) | \ 1720ca87f05SMatt Evans (((dest) - (ctx->idx * 4)) & \ 1730ca87f05SMatt Evans 0xfffc)) 174aaf2f7e0SNaveen N. Rao /* Sign-extended 32-bit immediate load */ 175aaf2f7e0SNaveen N. Rao #define PPC_LI32(d, i) do { \ 176aaf2f7e0SNaveen N. Rao if ((int)(uintptr_t)(i) >= -32768 && \ 177aaf2f7e0SNaveen N. Rao (int)(uintptr_t)(i) < 32768) \ 178aaf2f7e0SNaveen N. Rao PPC_LI(d, i); \ 179aaf2f7e0SNaveen N. Rao else { \ 180aaf2f7e0SNaveen N. Rao PPC_LIS(d, IMM_H(i)); \ 181aaf2f7e0SNaveen N. Rao if (IMM_L(i)) \ 182aaf2f7e0SNaveen N. Rao PPC_ORI(d, d, IMM_L(i)); \ 1830ca87f05SMatt Evans } } while(0) 184aaf2f7e0SNaveen N. Rao 1850ca87f05SMatt Evans #define PPC_LI64(d, i) do { \ 186b1a05787SNaveen N. Rao if ((long)(i) >= -2147483648 && \ 187b1a05787SNaveen N. Rao (long)(i) < 2147483648) \ 1880ca87f05SMatt Evans PPC_LI32(d, i); \ 1890ca87f05SMatt Evans else { \ 190b1a05787SNaveen N. Rao if (!((uintptr_t)(i) & 0xffff800000000000ULL)) \ 191b1a05787SNaveen N. Rao PPC_LI(d, ((uintptr_t)(i) >> 32) & 0xffff); \ 192b1a05787SNaveen N. Rao else { \ 1930ca87f05SMatt Evans PPC_LIS(d, ((uintptr_t)(i) >> 48)); \ 1940ca87f05SMatt Evans if ((uintptr_t)(i) & 0x0000ffff00000000ULL) \ 1950ca87f05SMatt Evans PPC_ORI(d, d, \ 1960ca87f05SMatt Evans ((uintptr_t)(i) >> 32) & 0xffff); \ 197b1a05787SNaveen N. Rao } \ 1980ca87f05SMatt Evans PPC_SLDI(d, d, 32); \ 1990ca87f05SMatt Evans if ((uintptr_t)(i) & 0x00000000ffff0000ULL) \ 2000ca87f05SMatt Evans PPC_ORIS(d, d, \ 2010ca87f05SMatt Evans ((uintptr_t)(i) >> 16) & 0xffff); \ 2020ca87f05SMatt Evans if ((uintptr_t)(i) & 0x000000000000ffffULL) \ 2030ca87f05SMatt Evans PPC_ORI(d, d, (uintptr_t)(i) & 0xffff); \ 204b1a05787SNaveen N. Rao } } while (0) 2050ca87f05SMatt Evans 20609ca5ab2SDenis Kirjanov #ifdef CONFIG_PPC64 20709ca5ab2SDenis Kirjanov #define PPC_FUNC_ADDR(d,i) do { PPC_LI64(d, i); } while(0) 20809ca5ab2SDenis Kirjanov #else 20909ca5ab2SDenis Kirjanov #define PPC_FUNC_ADDR(d,i) do { PPC_LI32(d, i); } while(0) 21009ca5ab2SDenis Kirjanov #endif 21109ca5ab2SDenis Kirjanov 2120ca87f05SMatt Evans static inline bool is_nearbranch(int offset) 2130ca87f05SMatt Evans { 2140ca87f05SMatt Evans return (offset < 32768) && (offset >= -32768); 2150ca87f05SMatt Evans } 2160ca87f05SMatt Evans 2170ca87f05SMatt Evans /* 2180ca87f05SMatt Evans * The fly in the ointment of code size changing from pass to pass is 2190ca87f05SMatt Evans * avoided by padding the short branch case with a NOP. If code size differs 2200ca87f05SMatt Evans * with different branch reaches we will have the issue of code moving from 2210ca87f05SMatt Evans * one pass to the next and will need a few passes to converge on a stable 2220ca87f05SMatt Evans * state. 2230ca87f05SMatt Evans */ 2240ca87f05SMatt Evans #define PPC_BCC(cond, dest) do { \ 2250ca87f05SMatt Evans if (is_nearbranch((dest) - (ctx->idx * 4))) { \ 2260ca87f05SMatt Evans PPC_BCC_SHORT(cond, dest); \ 2270ca87f05SMatt Evans PPC_NOP(); \ 2280ca87f05SMatt Evans } else { \ 2290ca87f05SMatt Evans /* Flip the 'T or F' bit to invert comparison */ \ 2300ca87f05SMatt Evans PPC_BCC_SHORT(cond ^ COND_CMP_TRUE, (ctx->idx+2)*4); \ 2310ca87f05SMatt Evans PPC_JMP(dest); \ 2320ca87f05SMatt Evans } } while(0) 2330ca87f05SMatt Evans 2340ca87f05SMatt Evans /* To create a branch condition, select a bit of cr0... */ 2350ca87f05SMatt Evans #define CR0_LT 0 2360ca87f05SMatt Evans #define CR0_GT 1 2370ca87f05SMatt Evans #define CR0_EQ 2 2380ca87f05SMatt Evans /* ...and modify BO[3] */ 2390ca87f05SMatt Evans #define COND_CMP_TRUE 0x100 2400ca87f05SMatt Evans #define COND_CMP_FALSE 0x000 2410ca87f05SMatt Evans /* Together, they make all required comparisons: */ 2420ca87f05SMatt Evans #define COND_GT (CR0_GT | COND_CMP_TRUE) 2430ca87f05SMatt Evans #define COND_GE (CR0_LT | COND_CMP_FALSE) 2440ca87f05SMatt Evans #define COND_EQ (CR0_EQ | COND_CMP_TRUE) 2450ca87f05SMatt Evans #define COND_NE (CR0_EQ | COND_CMP_FALSE) 2460ca87f05SMatt Evans #define COND_LT (CR0_LT | COND_CMP_TRUE) 24720dbf5ccSDaniel Borkmann #define COND_LE (CR0_GT | COND_CMP_FALSE) 2480ca87f05SMatt Evans 2490ca87f05SMatt Evans #endif 2500ca87f05SMatt Evans 2510ca87f05SMatt Evans #endif 252