1 /* 2 * This file contains common routines for dealing with free of page tables 3 * Along with common page table handling code 4 * 5 * Derived from arch/powerpc/mm/tlb_64.c: 6 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 7 * 8 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) 9 * and Cort Dougan (PReP) (cort@cs.nmt.edu) 10 * Copyright (C) 1996 Paul Mackerras 11 * 12 * Derived from "arch/i386/mm/init.c" 13 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds 14 * 15 * Dave Engebretsen <engebret@us.ibm.com> 16 * Rework for PPC64 port. 17 * 18 * This program is free software; you can redistribute it and/or 19 * modify it under the terms of the GNU General Public License 20 * as published by the Free Software Foundation; either version 21 * 2 of the License, or (at your option) any later version. 22 */ 23 24 #include <linux/kernel.h> 25 #include <linux/gfp.h> 26 #include <linux/mm.h> 27 #include <linux/percpu.h> 28 #include <linux/hardirq.h> 29 #include <linux/hugetlb.h> 30 #include <asm/pgalloc.h> 31 #include <asm/tlbflush.h> 32 #include <asm/tlb.h> 33 34 static inline int is_exec_fault(void) 35 { 36 return current->thread.regs && TRAP(current->thread.regs) == 0x400; 37 } 38 39 /* We only try to do i/d cache coherency on stuff that looks like 40 * reasonably "normal" PTEs. We currently require a PTE to be present 41 * and we avoid _PAGE_SPECIAL and cache inhibited pte. We also only do that 42 * on userspace PTEs 43 */ 44 static inline int pte_looks_normal(pte_t pte) 45 { 46 47 if (pte_present(pte) && !pte_special(pte)) { 48 if (pte_ci(pte)) 49 return 0; 50 if (pte_user(pte)) 51 return 1; 52 } 53 return 0; 54 } 55 56 static struct page *maybe_pte_to_page(pte_t pte) 57 { 58 unsigned long pfn = pte_pfn(pte); 59 struct page *page; 60 61 if (unlikely(!pfn_valid(pfn))) 62 return NULL; 63 page = pfn_to_page(pfn); 64 if (PageReserved(page)) 65 return NULL; 66 return page; 67 } 68 69 #ifdef CONFIG_PPC_BOOK3S 70 71 /* Server-style MMU handles coherency when hashing if HW exec permission 72 * is supposed per page (currently 64-bit only). If not, then, we always 73 * flush the cache for valid PTEs in set_pte. Embedded CPU without HW exec 74 * support falls into the same category. 75 */ 76 77 static pte_t set_pte_filter_hash(pte_t pte) 78 { 79 if (radix_enabled()) 80 return pte; 81 82 pte = __pte(pte_val(pte) & ~_PAGE_HPTEFLAGS); 83 if (pte_looks_normal(pte) && !(cpu_has_feature(CPU_FTR_COHERENT_ICACHE) || 84 cpu_has_feature(CPU_FTR_NOEXECUTE))) { 85 struct page *pg = maybe_pte_to_page(pte); 86 if (!pg) 87 return pte; 88 if (!test_bit(PG_arch_1, &pg->flags)) { 89 flush_dcache_icache_page(pg); 90 set_bit(PG_arch_1, &pg->flags); 91 } 92 } 93 return pte; 94 } 95 96 #else /* CONFIG_PPC_BOOK3S */ 97 98 static pte_t set_pte_filter_hash(pte_t pte) { return pte; } 99 100 #endif /* CONFIG_PPC_BOOK3S */ 101 102 /* Embedded type MMU with HW exec support. This is a bit more complicated 103 * as we don't have two bits to spare for _PAGE_EXEC and _PAGE_HWEXEC so 104 * instead we "filter out" the exec permission for non clean pages. 105 */ 106 static pte_t set_pte_filter(pte_t pte) 107 { 108 struct page *pg; 109 110 if (mmu_has_feature(MMU_FTR_HPTE_TABLE)) 111 return set_pte_filter_hash(pte); 112 113 /* No exec permission in the first place, move on */ 114 if (!pte_exec(pte) || !pte_looks_normal(pte)) 115 return pte; 116 117 /* If you set _PAGE_EXEC on weird pages you're on your own */ 118 pg = maybe_pte_to_page(pte); 119 if (unlikely(!pg)) 120 return pte; 121 122 /* If the page clean, we move on */ 123 if (test_bit(PG_arch_1, &pg->flags)) 124 return pte; 125 126 /* If it's an exec fault, we flush the cache and make it clean */ 127 if (is_exec_fault()) { 128 flush_dcache_icache_page(pg); 129 set_bit(PG_arch_1, &pg->flags); 130 return pte; 131 } 132 133 /* Else, we filter out _PAGE_EXEC */ 134 return pte_exprotect(pte); 135 } 136 137 static pte_t set_access_flags_filter(pte_t pte, struct vm_area_struct *vma, 138 int dirty) 139 { 140 struct page *pg; 141 142 if (mmu_has_feature(MMU_FTR_HPTE_TABLE)) 143 return pte; 144 145 /* So here, we only care about exec faults, as we use them 146 * to recover lost _PAGE_EXEC and perform I$/D$ coherency 147 * if necessary. Also if _PAGE_EXEC is already set, same deal, 148 * we just bail out 149 */ 150 if (dirty || pte_exec(pte) || !is_exec_fault()) 151 return pte; 152 153 #ifdef CONFIG_DEBUG_VM 154 /* So this is an exec fault, _PAGE_EXEC is not set. If it was 155 * an error we would have bailed out earlier in do_page_fault() 156 * but let's make sure of it 157 */ 158 if (WARN_ON(!(vma->vm_flags & VM_EXEC))) 159 return pte; 160 #endif /* CONFIG_DEBUG_VM */ 161 162 /* If you set _PAGE_EXEC on weird pages you're on your own */ 163 pg = maybe_pte_to_page(pte); 164 if (unlikely(!pg)) 165 goto bail; 166 167 /* If the page is already clean, we move on */ 168 if (test_bit(PG_arch_1, &pg->flags)) 169 goto bail; 170 171 /* Clean the page and set PG_arch_1 */ 172 flush_dcache_icache_page(pg); 173 set_bit(PG_arch_1, &pg->flags); 174 175 bail: 176 return pte_mkexec(pte); 177 } 178 179 /* 180 * set_pte stores a linux PTE into the linux page table. 181 */ 182 void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, 183 pte_t pte) 184 { 185 /* 186 * Make sure hardware valid bit is not set. We don't do 187 * tlb flush for this update. 188 */ 189 VM_WARN_ON(pte_hw_valid(*ptep) && !pte_protnone(*ptep)); 190 191 /* Add the pte bit when trying to set a pte */ 192 pte = pte_mkpte(pte); 193 194 /* Note: mm->context.id might not yet have been assigned as 195 * this context might not have been activated yet when this 196 * is called. 197 */ 198 pte = set_pte_filter(pte); 199 200 /* Perform the setting of the PTE */ 201 __set_pte_at(mm, addr, ptep, pte, 0); 202 } 203 204 /* 205 * This is called when relaxing access to a PTE. It's also called in the page 206 * fault path when we don't hit any of the major fault cases, ie, a minor 207 * update of _PAGE_ACCESSED, _PAGE_DIRTY, etc... The generic code will have 208 * handled those two for us, we additionally deal with missing execute 209 * permission here on some processors 210 */ 211 int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long address, 212 pte_t *ptep, pte_t entry, int dirty) 213 { 214 int changed; 215 entry = set_access_flags_filter(entry, vma, dirty); 216 changed = !pte_same(*(ptep), entry); 217 if (changed) { 218 assert_pte_locked(vma->vm_mm, address); 219 __ptep_set_access_flags(vma, ptep, entry, 220 address, mmu_virtual_psize); 221 } 222 return changed; 223 } 224 225 #ifdef CONFIG_HUGETLB_PAGE 226 int huge_ptep_set_access_flags(struct vm_area_struct *vma, 227 unsigned long addr, pte_t *ptep, 228 pte_t pte, int dirty) 229 { 230 #ifdef HUGETLB_NEED_PRELOAD 231 /* 232 * The "return 1" forces a call of update_mmu_cache, which will write a 233 * TLB entry. Without this, platforms that don't do a write of the TLB 234 * entry in the TLB miss handler asm will fault ad infinitum. 235 */ 236 ptep_set_access_flags(vma, addr, ptep, pte, dirty); 237 return 1; 238 #else 239 int changed, psize; 240 241 pte = set_access_flags_filter(pte, vma, dirty); 242 changed = !pte_same(*(ptep), pte); 243 if (changed) { 244 245 #ifdef CONFIG_PPC_BOOK3S_64 246 struct hstate *h = hstate_vma(vma); 247 248 psize = hstate_get_psize(h); 249 #ifdef CONFIG_DEBUG_VM 250 assert_spin_locked(huge_pte_lockptr(h, vma->vm_mm, ptep)); 251 #endif 252 253 #else 254 /* 255 * Not used on non book3s64 platforms. But 8xx 256 * can possibly use tsize derived from hstate. 257 */ 258 psize = 0; 259 #endif 260 __ptep_set_access_flags(vma, ptep, pte, addr, psize); 261 } 262 return changed; 263 #endif 264 } 265 #endif /* CONFIG_HUGETLB_PAGE */ 266 267 #ifdef CONFIG_DEBUG_VM 268 void assert_pte_locked(struct mm_struct *mm, unsigned long addr) 269 { 270 pgd_t *pgd; 271 pud_t *pud; 272 pmd_t *pmd; 273 274 if (mm == &init_mm) 275 return; 276 pgd = mm->pgd + pgd_index(addr); 277 BUG_ON(pgd_none(*pgd)); 278 pud = pud_offset(pgd, addr); 279 BUG_ON(pud_none(*pud)); 280 pmd = pmd_offset(pud, addr); 281 /* 282 * khugepaged to collapse normal pages to hugepage, first set 283 * pmd to none to force page fault/gup to take mmap_sem. After 284 * pmd is set to none, we do a pte_clear which does this assertion 285 * so if we find pmd none, return. 286 */ 287 if (pmd_none(*pmd)) 288 return; 289 BUG_ON(!pmd_present(*pmd)); 290 assert_spin_locked(pte_lockptr(mm, pmd)); 291 } 292 #endif /* CONFIG_DEBUG_VM */ 293 294 unsigned long vmalloc_to_phys(void *va) 295 { 296 unsigned long pfn = vmalloc_to_pfn(va); 297 298 BUG_ON(!pfn); 299 return __pa(pfn_to_kaddr(pfn)) + offset_in_page(va); 300 } 301 EXPORT_SYMBOL_GPL(vmalloc_to_phys); 302