1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Declarations of procedures and variables shared between files 4 * in arch/ppc/mm/. 5 * 6 * Derived from arch/ppc/mm/init.c: 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) 10 * and Cort Dougan (PReP) (cort@cs.nmt.edu) 11 * Copyright (C) 1996 Paul Mackerras 12 * 13 * Derived from "arch/i386/mm/init.c" 14 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds 15 */ 16 #include <linux/mm.h> 17 #include <asm/mmu.h> 18 19 #ifdef CONFIG_PPC_MMU_NOHASH 20 #include <asm/trace.h> 21 22 /* 23 * On 40x and 8xx, we directly inline tlbia and tlbivax 24 */ 25 #if defined(CONFIG_40x) || defined(CONFIG_PPC_8xx) 26 static inline void _tlbil_all(void) 27 { 28 asm volatile ("sync; tlbia; isync" : : : "memory"); 29 trace_tlbia(MMU_NO_CONTEXT); 30 } 31 static inline void _tlbil_pid(unsigned int pid) 32 { 33 asm volatile ("sync; tlbia; isync" : : : "memory"); 34 trace_tlbia(pid); 35 } 36 #define _tlbil_pid_noind(pid) _tlbil_pid(pid) 37 38 #else /* CONFIG_40x || CONFIG_PPC_8xx */ 39 extern void _tlbil_all(void); 40 extern void _tlbil_pid(unsigned int pid); 41 #ifdef CONFIG_PPC_BOOK3E 42 extern void _tlbil_pid_noind(unsigned int pid); 43 #else 44 #define _tlbil_pid_noind(pid) _tlbil_pid(pid) 45 #endif 46 #endif /* !(CONFIG_40x || CONFIG_PPC_8xx) */ 47 48 /* 49 * On 8xx, we directly inline tlbie, on others, it's extern 50 */ 51 #ifdef CONFIG_PPC_8xx 52 static inline void _tlbil_va(unsigned long address, unsigned int pid, 53 unsigned int tsize, unsigned int ind) 54 { 55 asm volatile ("tlbie %0; sync" : : "r" (address) : "memory"); 56 trace_tlbie(0, 0, address, pid, 0, 0, 0); 57 } 58 #elif defined(CONFIG_PPC_BOOK3E) 59 extern void _tlbil_va(unsigned long address, unsigned int pid, 60 unsigned int tsize, unsigned int ind); 61 #else 62 extern void __tlbil_va(unsigned long address, unsigned int pid); 63 static inline void _tlbil_va(unsigned long address, unsigned int pid, 64 unsigned int tsize, unsigned int ind) 65 { 66 __tlbil_va(address, pid); 67 } 68 #endif /* CONFIG_PPC_8xx */ 69 70 #if defined(CONFIG_PPC_BOOK3E) || defined(CONFIG_PPC_47x) 71 extern void _tlbivax_bcast(unsigned long address, unsigned int pid, 72 unsigned int tsize, unsigned int ind); 73 #else 74 static inline void _tlbivax_bcast(unsigned long address, unsigned int pid, 75 unsigned int tsize, unsigned int ind) 76 { 77 BUG(); 78 } 79 #endif 80 81 static inline void print_system_hash_info(void) {} 82 83 #else /* CONFIG_PPC_MMU_NOHASH */ 84 85 extern void hash_preload(struct mm_struct *mm, unsigned long ea, 86 bool is_exec, unsigned long trap); 87 88 89 extern void _tlbie(unsigned long address); 90 extern void _tlbia(void); 91 92 void print_system_hash_info(void); 93 94 #endif /* CONFIG_PPC_MMU_NOHASH */ 95 96 #ifdef CONFIG_PPC32 97 98 extern void mapin_ram(void); 99 extern void setbat(int index, unsigned long virt, phys_addr_t phys, 100 unsigned int size, pgprot_t prot); 101 102 extern int __map_without_bats; 103 extern unsigned int rtas_data, rtas_size; 104 105 struct hash_pte; 106 extern struct hash_pte *Hash; 107 extern u8 early_hash[]; 108 109 #endif /* CONFIG_PPC32 */ 110 111 extern unsigned long ioremap_bot; 112 extern unsigned long __max_low_memory; 113 extern phys_addr_t __initial_memory_limit_addr; 114 extern phys_addr_t total_memory; 115 extern phys_addr_t total_lowmem; 116 extern phys_addr_t memstart_addr; 117 extern phys_addr_t lowmem_end_addr; 118 119 #ifdef CONFIG_WII 120 extern unsigned long wii_hole_start; 121 extern unsigned long wii_hole_size; 122 123 extern unsigned long wii_mmu_mapin_mem2(unsigned long top); 124 extern void wii_memory_fixups(void); 125 #endif 126 127 /* ...and now those things that may be slightly different between processor 128 * architectures. -- Dan 129 */ 130 #ifdef CONFIG_PPC32 131 extern void MMU_init_hw(void); 132 void MMU_init_hw_patch(void); 133 unsigned long mmu_mapin_ram(unsigned long base, unsigned long top); 134 #endif 135 136 #ifdef CONFIG_PPC_FSL_BOOK3E 137 extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx, 138 bool dryrun); 139 extern unsigned long calc_cam_sz(unsigned long ram, unsigned long virt, 140 phys_addr_t phys); 141 #ifdef CONFIG_PPC32 142 extern void adjust_total_lowmem(void); 143 extern int switch_to_as1(void); 144 extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu); 145 #endif 146 extern void loadcam_entry(unsigned int index); 147 extern void loadcam_multi(int first_idx, int num, int tmp_idx); 148 149 struct tlbcam { 150 u32 MAS0; 151 u32 MAS1; 152 unsigned long MAS2; 153 u32 MAS3; 154 u32 MAS7; 155 }; 156 #endif 157 158 #if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx) 159 /* 6xx have BATS */ 160 /* FSL_BOOKE have TLBCAM */ 161 /* 8xx have LTLB */ 162 phys_addr_t v_block_mapped(unsigned long va); 163 unsigned long p_block_mapped(phys_addr_t pa); 164 #else 165 static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; } 166 static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; } 167 #endif 168 169 #if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_8xx) 170 void mmu_mark_initmem_nx(void); 171 void mmu_mark_rodata_ro(void); 172 #else 173 static inline void mmu_mark_initmem_nx(void) { } 174 static inline void mmu_mark_rodata_ro(void) { } 175 #endif 176