xref: /openbmc/linux/arch/powerpc/mm/mmu_decl.h (revision ae0be8de)
1 /*
2  * Declarations of procedures and variables shared between files
3  * in arch/ppc/mm/.
4  *
5  *  Derived from arch/ppc/mm/init.c:
6  *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
7  *
8  *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
9  *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
10  *    Copyright (C) 1996 Paul Mackerras
11  *
12  *  Derived from "arch/i386/mm/init.c"
13  *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
14  *
15  *  This program is free software; you can redistribute it and/or
16  *  modify it under the terms of the GNU General Public License
17  *  as published by the Free Software Foundation; either version
18  *  2 of the License, or (at your option) any later version.
19  *
20  */
21 #include <linux/mm.h>
22 #include <asm/mmu.h>
23 
24 #ifdef CONFIG_PPC_MMU_NOHASH
25 #include <asm/trace.h>
26 
27 /*
28  * On 40x and 8xx, we directly inline tlbia and tlbivax
29  */
30 #if defined(CONFIG_40x) || defined(CONFIG_PPC_8xx)
31 static inline void _tlbil_all(void)
32 {
33 	asm volatile ("sync; tlbia; isync" : : : "memory");
34 	trace_tlbia(MMU_NO_CONTEXT);
35 }
36 static inline void _tlbil_pid(unsigned int pid)
37 {
38 	asm volatile ("sync; tlbia; isync" : : : "memory");
39 	trace_tlbia(pid);
40 }
41 #define _tlbil_pid_noind(pid)	_tlbil_pid(pid)
42 
43 #else /* CONFIG_40x || CONFIG_PPC_8xx */
44 extern void _tlbil_all(void);
45 extern void _tlbil_pid(unsigned int pid);
46 #ifdef CONFIG_PPC_BOOK3E
47 extern void _tlbil_pid_noind(unsigned int pid);
48 #else
49 #define _tlbil_pid_noind(pid)	_tlbil_pid(pid)
50 #endif
51 #endif /* !(CONFIG_40x || CONFIG_PPC_8xx) */
52 
53 /*
54  * On 8xx, we directly inline tlbie, on others, it's extern
55  */
56 #ifdef CONFIG_PPC_8xx
57 static inline void _tlbil_va(unsigned long address, unsigned int pid,
58 			     unsigned int tsize, unsigned int ind)
59 {
60 	asm volatile ("tlbie %0; sync" : : "r" (address) : "memory");
61 	trace_tlbie(0, 0, address, pid, 0, 0, 0);
62 }
63 #elif defined(CONFIG_PPC_BOOK3E)
64 extern void _tlbil_va(unsigned long address, unsigned int pid,
65 		      unsigned int tsize, unsigned int ind);
66 #else
67 extern void __tlbil_va(unsigned long address, unsigned int pid);
68 static inline void _tlbil_va(unsigned long address, unsigned int pid,
69 			     unsigned int tsize, unsigned int ind)
70 {
71 	__tlbil_va(address, pid);
72 }
73 #endif /* CONFIG_PPC_8xx */
74 
75 #if defined(CONFIG_PPC_BOOK3E) || defined(CONFIG_PPC_47x)
76 extern void _tlbivax_bcast(unsigned long address, unsigned int pid,
77 			   unsigned int tsize, unsigned int ind);
78 #else
79 static inline void _tlbivax_bcast(unsigned long address, unsigned int pid,
80 				   unsigned int tsize, unsigned int ind)
81 {
82 	BUG();
83 }
84 #endif
85 
86 #else /* CONFIG_PPC_MMU_NOHASH */
87 
88 extern void hash_preload(struct mm_struct *mm, unsigned long ea,
89 			 bool is_exec, unsigned long trap);
90 
91 
92 extern void _tlbie(unsigned long address);
93 extern void _tlbia(void);
94 
95 #endif /* CONFIG_PPC_MMU_NOHASH */
96 
97 #ifdef CONFIG_PPC32
98 
99 extern void mapin_ram(void);
100 extern void setbat(int index, unsigned long virt, phys_addr_t phys,
101 		   unsigned int size, pgprot_t prot);
102 
103 extern int __map_without_bats;
104 extern unsigned int rtas_data, rtas_size;
105 
106 struct hash_pte;
107 extern struct hash_pte *Hash, *Hash_end;
108 extern unsigned long Hash_size, Hash_mask;
109 
110 #endif /* CONFIG_PPC32 */
111 
112 extern unsigned long ioremap_bot;
113 extern unsigned long __max_low_memory;
114 extern phys_addr_t __initial_memory_limit_addr;
115 extern phys_addr_t total_memory;
116 extern phys_addr_t total_lowmem;
117 extern phys_addr_t memstart_addr;
118 extern phys_addr_t lowmem_end_addr;
119 
120 #ifdef CONFIG_WII
121 extern unsigned long wii_hole_start;
122 extern unsigned long wii_hole_size;
123 
124 extern unsigned long wii_mmu_mapin_mem2(unsigned long top);
125 extern void wii_memory_fixups(void);
126 #endif
127 
128 /* ...and now those things that may be slightly different between processor
129  * architectures.  -- Dan
130  */
131 #ifdef CONFIG_PPC32
132 extern void MMU_init_hw(void);
133 unsigned long mmu_mapin_ram(unsigned long base, unsigned long top);
134 #endif
135 
136 #ifdef CONFIG_PPC_FSL_BOOK3E
137 extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx,
138 				     bool dryrun);
139 extern unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
140 				 phys_addr_t phys);
141 #ifdef CONFIG_PPC32
142 extern void adjust_total_lowmem(void);
143 extern int switch_to_as1(void);
144 extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu);
145 #endif
146 extern void loadcam_entry(unsigned int index);
147 extern void loadcam_multi(int first_idx, int num, int tmp_idx);
148 
149 struct tlbcam {
150 	u32	MAS0;
151 	u32	MAS1;
152 	unsigned long	MAS2;
153 	u32	MAS3;
154 	u32	MAS7;
155 };
156 #endif
157 
158 #if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx)
159 /* 6xx have BATS */
160 /* FSL_BOOKE have TLBCAM */
161 /* 8xx have LTLB */
162 phys_addr_t v_block_mapped(unsigned long va);
163 unsigned long p_block_mapped(phys_addr_t pa);
164 #else
165 static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; }
166 static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; }
167 #endif
168 
169 #if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_8xx)
170 void mmu_mark_initmem_nx(void);
171 void mmu_mark_rodata_ro(void);
172 #else
173 static inline void mmu_mark_initmem_nx(void) { }
174 static inline void mmu_mark_rodata_ro(void) { }
175 #endif
176