1 /* 2 * Single-step support. 3 * 4 * Copyright (C) 2004 Paul Mackerras <paulus@au.ibm.com>, IBM 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License 8 * as published by the Free Software Foundation; either version 9 * 2 of the License, or (at your option) any later version. 10 */ 11 #include <linux/kernel.h> 12 #include <linux/kprobes.h> 13 #include <linux/ptrace.h> 14 #include <linux/prefetch.h> 15 #include <asm/sstep.h> 16 #include <asm/processor.h> 17 #include <asm/uaccess.h> 18 #include <asm/cputable.h> 19 20 extern char system_call_common[]; 21 22 #ifdef CONFIG_PPC64 23 /* Bits in SRR1 that are copied from MSR */ 24 #define MSR_MASK 0xffffffff87c0ffffUL 25 #else 26 #define MSR_MASK 0x87c0ffff 27 #endif 28 29 /* Bits in XER */ 30 #define XER_SO 0x80000000U 31 #define XER_OV 0x40000000U 32 #define XER_CA 0x20000000U 33 34 #ifdef CONFIG_PPC_FPU 35 /* 36 * Functions in ldstfp.S 37 */ 38 extern int do_lfs(int rn, unsigned long ea); 39 extern int do_lfd(int rn, unsigned long ea); 40 extern int do_stfs(int rn, unsigned long ea); 41 extern int do_stfd(int rn, unsigned long ea); 42 extern int do_lvx(int rn, unsigned long ea); 43 extern int do_stvx(int rn, unsigned long ea); 44 extern int do_lxvd2x(int rn, unsigned long ea); 45 extern int do_stxvd2x(int rn, unsigned long ea); 46 #endif 47 48 /* 49 * Emulate the truncation of 64 bit values in 32-bit mode. 50 */ 51 static unsigned long truncate_if_32bit(unsigned long msr, unsigned long val) 52 { 53 #ifdef __powerpc64__ 54 if ((msr & MSR_64BIT) == 0) 55 val &= 0xffffffffUL; 56 #endif 57 return val; 58 } 59 60 /* 61 * Determine whether a conditional branch instruction would branch. 62 */ 63 static int __kprobes branch_taken(unsigned int instr, struct pt_regs *regs) 64 { 65 unsigned int bo = (instr >> 21) & 0x1f; 66 unsigned int bi; 67 68 if ((bo & 4) == 0) { 69 /* decrement counter */ 70 --regs->ctr; 71 if (((bo >> 1) & 1) ^ (regs->ctr == 0)) 72 return 0; 73 } 74 if ((bo & 0x10) == 0) { 75 /* check bit from CR */ 76 bi = (instr >> 16) & 0x1f; 77 if (((regs->ccr >> (31 - bi)) & 1) != ((bo >> 3) & 1)) 78 return 0; 79 } 80 return 1; 81 } 82 83 84 static long __kprobes address_ok(struct pt_regs *regs, unsigned long ea, int nb) 85 { 86 if (!user_mode(regs)) 87 return 1; 88 return __access_ok(ea, nb, USER_DS); 89 } 90 91 /* 92 * Calculate effective address for a D-form instruction 93 */ 94 static unsigned long __kprobes dform_ea(unsigned int instr, struct pt_regs *regs) 95 { 96 int ra; 97 unsigned long ea; 98 99 ra = (instr >> 16) & 0x1f; 100 ea = (signed short) instr; /* sign-extend */ 101 if (ra) { 102 ea += regs->gpr[ra]; 103 if (instr & 0x04000000) { /* update forms */ 104 if ((instr>>26) != 47) /* stmw is not an update form */ 105 regs->gpr[ra] = ea; 106 } 107 } 108 109 return truncate_if_32bit(regs->msr, ea); 110 } 111 112 #ifdef __powerpc64__ 113 /* 114 * Calculate effective address for a DS-form instruction 115 */ 116 static unsigned long __kprobes dsform_ea(unsigned int instr, struct pt_regs *regs) 117 { 118 int ra; 119 unsigned long ea; 120 121 ra = (instr >> 16) & 0x1f; 122 ea = (signed short) (instr & ~3); /* sign-extend */ 123 if (ra) { 124 ea += regs->gpr[ra]; 125 if ((instr & 3) == 1) /* update forms */ 126 regs->gpr[ra] = ea; 127 } 128 129 return truncate_if_32bit(regs->msr, ea); 130 } 131 #endif /* __powerpc64 */ 132 133 /* 134 * Calculate effective address for an X-form instruction 135 */ 136 static unsigned long __kprobes xform_ea(unsigned int instr, struct pt_regs *regs, 137 int do_update) 138 { 139 int ra, rb; 140 unsigned long ea; 141 142 ra = (instr >> 16) & 0x1f; 143 rb = (instr >> 11) & 0x1f; 144 ea = regs->gpr[rb]; 145 if (ra) { 146 ea += regs->gpr[ra]; 147 if (do_update) /* update forms */ 148 regs->gpr[ra] = ea; 149 } 150 151 return truncate_if_32bit(regs->msr, ea); 152 } 153 154 /* 155 * Return the largest power of 2, not greater than sizeof(unsigned long), 156 * such that x is a multiple of it. 157 */ 158 static inline unsigned long max_align(unsigned long x) 159 { 160 x |= sizeof(unsigned long); 161 return x & -x; /* isolates rightmost bit */ 162 } 163 164 165 static inline unsigned long byterev_2(unsigned long x) 166 { 167 return ((x >> 8) & 0xff) | ((x & 0xff) << 8); 168 } 169 170 static inline unsigned long byterev_4(unsigned long x) 171 { 172 return ((x >> 24) & 0xff) | ((x >> 8) & 0xff00) | 173 ((x & 0xff00) << 8) | ((x & 0xff) << 24); 174 } 175 176 #ifdef __powerpc64__ 177 static inline unsigned long byterev_8(unsigned long x) 178 { 179 return (byterev_4(x) << 32) | byterev_4(x >> 32); 180 } 181 #endif 182 183 static int __kprobes read_mem_aligned(unsigned long *dest, unsigned long ea, 184 int nb) 185 { 186 int err = 0; 187 unsigned long x = 0; 188 189 switch (nb) { 190 case 1: 191 err = __get_user(x, (unsigned char __user *) ea); 192 break; 193 case 2: 194 err = __get_user(x, (unsigned short __user *) ea); 195 break; 196 case 4: 197 err = __get_user(x, (unsigned int __user *) ea); 198 break; 199 #ifdef __powerpc64__ 200 case 8: 201 err = __get_user(x, (unsigned long __user *) ea); 202 break; 203 #endif 204 } 205 if (!err) 206 *dest = x; 207 return err; 208 } 209 210 static int __kprobes read_mem_unaligned(unsigned long *dest, unsigned long ea, 211 int nb, struct pt_regs *regs) 212 { 213 int err; 214 unsigned long x, b, c; 215 216 /* unaligned, do this in pieces */ 217 x = 0; 218 for (; nb > 0; nb -= c) { 219 c = max_align(ea); 220 if (c > nb) 221 c = max_align(nb); 222 err = read_mem_aligned(&b, ea, c); 223 if (err) 224 return err; 225 x = (x << (8 * c)) + b; 226 ea += c; 227 } 228 *dest = x; 229 return 0; 230 } 231 232 /* 233 * Read memory at address ea for nb bytes, return 0 for success 234 * or -EFAULT if an error occurred. 235 */ 236 static int __kprobes read_mem(unsigned long *dest, unsigned long ea, int nb, 237 struct pt_regs *regs) 238 { 239 if (!address_ok(regs, ea, nb)) 240 return -EFAULT; 241 if ((ea & (nb - 1)) == 0) 242 return read_mem_aligned(dest, ea, nb); 243 return read_mem_unaligned(dest, ea, nb, regs); 244 } 245 246 static int __kprobes write_mem_aligned(unsigned long val, unsigned long ea, 247 int nb) 248 { 249 int err = 0; 250 251 switch (nb) { 252 case 1: 253 err = __put_user(val, (unsigned char __user *) ea); 254 break; 255 case 2: 256 err = __put_user(val, (unsigned short __user *) ea); 257 break; 258 case 4: 259 err = __put_user(val, (unsigned int __user *) ea); 260 break; 261 #ifdef __powerpc64__ 262 case 8: 263 err = __put_user(val, (unsigned long __user *) ea); 264 break; 265 #endif 266 } 267 return err; 268 } 269 270 static int __kprobes write_mem_unaligned(unsigned long val, unsigned long ea, 271 int nb, struct pt_regs *regs) 272 { 273 int err; 274 unsigned long c; 275 276 /* unaligned or little-endian, do this in pieces */ 277 for (; nb > 0; nb -= c) { 278 c = max_align(ea); 279 if (c > nb) 280 c = max_align(nb); 281 err = write_mem_aligned(val >> (nb - c) * 8, ea, c); 282 if (err) 283 return err; 284 ea += c; 285 } 286 return 0; 287 } 288 289 /* 290 * Write memory at address ea for nb bytes, return 0 for success 291 * or -EFAULT if an error occurred. 292 */ 293 static int __kprobes write_mem(unsigned long val, unsigned long ea, int nb, 294 struct pt_regs *regs) 295 { 296 if (!address_ok(regs, ea, nb)) 297 return -EFAULT; 298 if ((ea & (nb - 1)) == 0) 299 return write_mem_aligned(val, ea, nb); 300 return write_mem_unaligned(val, ea, nb, regs); 301 } 302 303 #ifdef CONFIG_PPC_FPU 304 /* 305 * Check the address and alignment, and call func to do the actual 306 * load or store. 307 */ 308 static int __kprobes do_fp_load(int rn, int (*func)(int, unsigned long), 309 unsigned long ea, int nb, 310 struct pt_regs *regs) 311 { 312 int err; 313 unsigned long val[sizeof(double) / sizeof(long)]; 314 unsigned long ptr; 315 316 if (!address_ok(regs, ea, nb)) 317 return -EFAULT; 318 if ((ea & 3) == 0) 319 return (*func)(rn, ea); 320 ptr = (unsigned long) &val[0]; 321 if (sizeof(unsigned long) == 8 || nb == 4) { 322 err = read_mem_unaligned(&val[0], ea, nb, regs); 323 ptr += sizeof(unsigned long) - nb; 324 } else { 325 /* reading a double on 32-bit */ 326 err = read_mem_unaligned(&val[0], ea, 4, regs); 327 if (!err) 328 err = read_mem_unaligned(&val[1], ea + 4, 4, regs); 329 } 330 if (err) 331 return err; 332 return (*func)(rn, ptr); 333 } 334 335 static int __kprobes do_fp_store(int rn, int (*func)(int, unsigned long), 336 unsigned long ea, int nb, 337 struct pt_regs *regs) 338 { 339 int err; 340 unsigned long val[sizeof(double) / sizeof(long)]; 341 unsigned long ptr; 342 343 if (!address_ok(regs, ea, nb)) 344 return -EFAULT; 345 if ((ea & 3) == 0) 346 return (*func)(rn, ea); 347 ptr = (unsigned long) &val[0]; 348 if (sizeof(unsigned long) == 8 || nb == 4) { 349 ptr += sizeof(unsigned long) - nb; 350 err = (*func)(rn, ptr); 351 if (err) 352 return err; 353 err = write_mem_unaligned(val[0], ea, nb, regs); 354 } else { 355 /* writing a double on 32-bit */ 356 err = (*func)(rn, ptr); 357 if (err) 358 return err; 359 err = write_mem_unaligned(val[0], ea, 4, regs); 360 if (!err) 361 err = write_mem_unaligned(val[1], ea + 4, 4, regs); 362 } 363 return err; 364 } 365 #endif 366 367 #ifdef CONFIG_ALTIVEC 368 /* For Altivec/VMX, no need to worry about alignment */ 369 static int __kprobes do_vec_load(int rn, int (*func)(int, unsigned long), 370 unsigned long ea, struct pt_regs *regs) 371 { 372 if (!address_ok(regs, ea & ~0xfUL, 16)) 373 return -EFAULT; 374 return (*func)(rn, ea); 375 } 376 377 static int __kprobes do_vec_store(int rn, int (*func)(int, unsigned long), 378 unsigned long ea, struct pt_regs *regs) 379 { 380 if (!address_ok(regs, ea & ~0xfUL, 16)) 381 return -EFAULT; 382 return (*func)(rn, ea); 383 } 384 #endif /* CONFIG_ALTIVEC */ 385 386 #ifdef CONFIG_VSX 387 static int __kprobes do_vsx_load(int rn, int (*func)(int, unsigned long), 388 unsigned long ea, struct pt_regs *regs) 389 { 390 int err; 391 unsigned long val[2]; 392 393 if (!address_ok(regs, ea, 16)) 394 return -EFAULT; 395 if ((ea & 3) == 0) 396 return (*func)(rn, ea); 397 err = read_mem_unaligned(&val[0], ea, 8, regs); 398 if (!err) 399 err = read_mem_unaligned(&val[1], ea + 8, 8, regs); 400 if (!err) 401 err = (*func)(rn, (unsigned long) &val[0]); 402 return err; 403 } 404 405 static int __kprobes do_vsx_store(int rn, int (*func)(int, unsigned long), 406 unsigned long ea, struct pt_regs *regs) 407 { 408 int err; 409 unsigned long val[2]; 410 411 if (!address_ok(regs, ea, 16)) 412 return -EFAULT; 413 if ((ea & 3) == 0) 414 return (*func)(rn, ea); 415 err = (*func)(rn, (unsigned long) &val[0]); 416 if (err) 417 return err; 418 err = write_mem_unaligned(val[0], ea, 8, regs); 419 if (!err) 420 err = write_mem_unaligned(val[1], ea + 8, 8, regs); 421 return err; 422 } 423 #endif /* CONFIG_VSX */ 424 425 #define __put_user_asmx(x, addr, err, op, cr) \ 426 __asm__ __volatile__( \ 427 "1: " op " %2,0,%3\n" \ 428 " mfcr %1\n" \ 429 "2:\n" \ 430 ".section .fixup,\"ax\"\n" \ 431 "3: li %0,%4\n" \ 432 " b 2b\n" \ 433 ".previous\n" \ 434 ".section __ex_table,\"a\"\n" \ 435 PPC_LONG_ALIGN "\n" \ 436 PPC_LONG "1b,3b\n" \ 437 ".previous" \ 438 : "=r" (err), "=r" (cr) \ 439 : "r" (x), "r" (addr), "i" (-EFAULT), "0" (err)) 440 441 #define __get_user_asmx(x, addr, err, op) \ 442 __asm__ __volatile__( \ 443 "1: "op" %1,0,%2\n" \ 444 "2:\n" \ 445 ".section .fixup,\"ax\"\n" \ 446 "3: li %0,%3\n" \ 447 " b 2b\n" \ 448 ".previous\n" \ 449 ".section __ex_table,\"a\"\n" \ 450 PPC_LONG_ALIGN "\n" \ 451 PPC_LONG "1b,3b\n" \ 452 ".previous" \ 453 : "=r" (err), "=r" (x) \ 454 : "r" (addr), "i" (-EFAULT), "0" (err)) 455 456 #define __cacheop_user_asmx(addr, err, op) \ 457 __asm__ __volatile__( \ 458 "1: "op" 0,%1\n" \ 459 "2:\n" \ 460 ".section .fixup,\"ax\"\n" \ 461 "3: li %0,%3\n" \ 462 " b 2b\n" \ 463 ".previous\n" \ 464 ".section __ex_table,\"a\"\n" \ 465 PPC_LONG_ALIGN "\n" \ 466 PPC_LONG "1b,3b\n" \ 467 ".previous" \ 468 : "=r" (err) \ 469 : "r" (addr), "i" (-EFAULT), "0" (err)) 470 471 static void __kprobes set_cr0(struct pt_regs *regs, int rd) 472 { 473 long val = regs->gpr[rd]; 474 475 regs->ccr = (regs->ccr & 0x0fffffff) | ((regs->xer >> 3) & 0x10000000); 476 #ifdef __powerpc64__ 477 if (!(regs->msr & MSR_64BIT)) 478 val = (int) val; 479 #endif 480 if (val < 0) 481 regs->ccr |= 0x80000000; 482 else if (val > 0) 483 regs->ccr |= 0x40000000; 484 else 485 regs->ccr |= 0x20000000; 486 } 487 488 static void __kprobes add_with_carry(struct pt_regs *regs, int rd, 489 unsigned long val1, unsigned long val2, 490 unsigned long carry_in) 491 { 492 unsigned long val = val1 + val2; 493 494 if (carry_in) 495 ++val; 496 regs->gpr[rd] = val; 497 #ifdef __powerpc64__ 498 if (!(regs->msr & MSR_64BIT)) { 499 val = (unsigned int) val; 500 val1 = (unsigned int) val1; 501 } 502 #endif 503 if (val < val1 || (carry_in && val == val1)) 504 regs->xer |= XER_CA; 505 else 506 regs->xer &= ~XER_CA; 507 } 508 509 static void __kprobes do_cmp_signed(struct pt_regs *regs, long v1, long v2, 510 int crfld) 511 { 512 unsigned int crval, shift; 513 514 crval = (regs->xer >> 31) & 1; /* get SO bit */ 515 if (v1 < v2) 516 crval |= 8; 517 else if (v1 > v2) 518 crval |= 4; 519 else 520 crval |= 2; 521 shift = (7 - crfld) * 4; 522 regs->ccr = (regs->ccr & ~(0xf << shift)) | (crval << shift); 523 } 524 525 static void __kprobes do_cmp_unsigned(struct pt_regs *regs, unsigned long v1, 526 unsigned long v2, int crfld) 527 { 528 unsigned int crval, shift; 529 530 crval = (regs->xer >> 31) & 1; /* get SO bit */ 531 if (v1 < v2) 532 crval |= 8; 533 else if (v1 > v2) 534 crval |= 4; 535 else 536 crval |= 2; 537 shift = (7 - crfld) * 4; 538 regs->ccr = (regs->ccr & ~(0xf << shift)) | (crval << shift); 539 } 540 541 /* 542 * Elements of 32-bit rotate and mask instructions. 543 */ 544 #define MASK32(mb, me) ((0xffffffffUL >> (mb)) + \ 545 ((signed long)-0x80000000L >> (me)) + ((me) >= (mb))) 546 #ifdef __powerpc64__ 547 #define MASK64_L(mb) (~0UL >> (mb)) 548 #define MASK64_R(me) ((signed long)-0x8000000000000000L >> (me)) 549 #define MASK64(mb, me) (MASK64_L(mb) + MASK64_R(me) + ((me) >= (mb))) 550 #define DATA32(x) (((x) & 0xffffffffUL) | (((x) & 0xffffffffUL) << 32)) 551 #else 552 #define DATA32(x) (x) 553 #endif 554 #define ROTATE(x, n) ((n) ? (((x) << (n)) | ((x) >> (8 * sizeof(long) - (n)))) : (x)) 555 556 /* 557 * Emulate instructions that cause a transfer of control, 558 * loads and stores, and a few other instructions. 559 * Returns 1 if the step was emulated, 0 if not, 560 * or -1 if the instruction is one that should not be stepped, 561 * such as an rfid, or a mtmsrd that would clear MSR_RI. 562 */ 563 int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr) 564 { 565 unsigned int opcode, ra, rb, rd, spr, u; 566 unsigned long int imm; 567 unsigned long int val, val2; 568 unsigned long int ea; 569 unsigned int cr, mb, me, sh; 570 int err; 571 unsigned long old_ra, val3; 572 long ival; 573 574 opcode = instr >> 26; 575 switch (opcode) { 576 case 16: /* bc */ 577 imm = (signed short)(instr & 0xfffc); 578 if ((instr & 2) == 0) 579 imm += regs->nip; 580 regs->nip += 4; 581 regs->nip = truncate_if_32bit(regs->msr, regs->nip); 582 if (instr & 1) 583 regs->link = regs->nip; 584 if (branch_taken(instr, regs)) 585 regs->nip = truncate_if_32bit(regs->msr, imm); 586 return 1; 587 #ifdef CONFIG_PPC64 588 case 17: /* sc */ 589 /* 590 * N.B. this uses knowledge about how the syscall 591 * entry code works. If that is changed, this will 592 * need to be changed also. 593 */ 594 if (regs->gpr[0] == 0x1ebe && 595 cpu_has_feature(CPU_FTR_REAL_LE)) { 596 regs->msr ^= MSR_LE; 597 goto instr_done; 598 } 599 regs->gpr[9] = regs->gpr[13]; 600 regs->gpr[10] = MSR_KERNEL; 601 regs->gpr[11] = regs->nip + 4; 602 regs->gpr[12] = regs->msr & MSR_MASK; 603 regs->gpr[13] = (unsigned long) get_paca(); 604 regs->nip = (unsigned long) &system_call_common; 605 regs->msr = MSR_KERNEL; 606 return 1; 607 #endif 608 case 18: /* b */ 609 imm = instr & 0x03fffffc; 610 if (imm & 0x02000000) 611 imm -= 0x04000000; 612 if ((instr & 2) == 0) 613 imm += regs->nip; 614 if (instr & 1) 615 regs->link = truncate_if_32bit(regs->msr, regs->nip + 4); 616 imm = truncate_if_32bit(regs->msr, imm); 617 regs->nip = imm; 618 return 1; 619 case 19: 620 switch ((instr >> 1) & 0x3ff) { 621 case 16: /* bclr */ 622 case 528: /* bcctr */ 623 imm = (instr & 0x400)? regs->ctr: regs->link; 624 regs->nip = truncate_if_32bit(regs->msr, regs->nip + 4); 625 imm = truncate_if_32bit(regs->msr, imm); 626 if (instr & 1) 627 regs->link = regs->nip; 628 if (branch_taken(instr, regs)) 629 regs->nip = imm; 630 return 1; 631 632 case 18: /* rfid, scary */ 633 return -1; 634 635 case 150: /* isync */ 636 isync(); 637 goto instr_done; 638 639 case 33: /* crnor */ 640 case 129: /* crandc */ 641 case 193: /* crxor */ 642 case 225: /* crnand */ 643 case 257: /* crand */ 644 case 289: /* creqv */ 645 case 417: /* crorc */ 646 case 449: /* cror */ 647 ra = (instr >> 16) & 0x1f; 648 rb = (instr >> 11) & 0x1f; 649 rd = (instr >> 21) & 0x1f; 650 ra = (regs->ccr >> (31 - ra)) & 1; 651 rb = (regs->ccr >> (31 - rb)) & 1; 652 val = (instr >> (6 + ra * 2 + rb)) & 1; 653 regs->ccr = (regs->ccr & ~(1UL << (31 - rd))) | 654 (val << (31 - rd)); 655 goto instr_done; 656 } 657 break; 658 case 31: 659 switch ((instr >> 1) & 0x3ff) { 660 case 598: /* sync */ 661 #ifdef __powerpc64__ 662 switch ((instr >> 21) & 3) { 663 case 1: /* lwsync */ 664 asm volatile("lwsync" : : : "memory"); 665 goto instr_done; 666 case 2: /* ptesync */ 667 asm volatile("ptesync" : : : "memory"); 668 goto instr_done; 669 } 670 #endif 671 mb(); 672 goto instr_done; 673 674 case 854: /* eieio */ 675 eieio(); 676 goto instr_done; 677 } 678 break; 679 } 680 681 /* Following cases refer to regs->gpr[], so we need all regs */ 682 if (!FULL_REGS(regs)) 683 return 0; 684 685 rd = (instr >> 21) & 0x1f; 686 ra = (instr >> 16) & 0x1f; 687 rb = (instr >> 11) & 0x1f; 688 689 switch (opcode) { 690 case 7: /* mulli */ 691 regs->gpr[rd] = regs->gpr[ra] * (short) instr; 692 goto instr_done; 693 694 case 8: /* subfic */ 695 imm = (short) instr; 696 add_with_carry(regs, rd, ~regs->gpr[ra], imm, 1); 697 goto instr_done; 698 699 case 10: /* cmpli */ 700 imm = (unsigned short) instr; 701 val = regs->gpr[ra]; 702 #ifdef __powerpc64__ 703 if ((rd & 1) == 0) 704 val = (unsigned int) val; 705 #endif 706 do_cmp_unsigned(regs, val, imm, rd >> 2); 707 goto instr_done; 708 709 case 11: /* cmpi */ 710 imm = (short) instr; 711 val = regs->gpr[ra]; 712 #ifdef __powerpc64__ 713 if ((rd & 1) == 0) 714 val = (int) val; 715 #endif 716 do_cmp_signed(regs, val, imm, rd >> 2); 717 goto instr_done; 718 719 case 12: /* addic */ 720 imm = (short) instr; 721 add_with_carry(regs, rd, regs->gpr[ra], imm, 0); 722 goto instr_done; 723 724 case 13: /* addic. */ 725 imm = (short) instr; 726 add_with_carry(regs, rd, regs->gpr[ra], imm, 0); 727 set_cr0(regs, rd); 728 goto instr_done; 729 730 case 14: /* addi */ 731 imm = (short) instr; 732 if (ra) 733 imm += regs->gpr[ra]; 734 regs->gpr[rd] = imm; 735 goto instr_done; 736 737 case 15: /* addis */ 738 imm = ((short) instr) << 16; 739 if (ra) 740 imm += regs->gpr[ra]; 741 regs->gpr[rd] = imm; 742 goto instr_done; 743 744 case 20: /* rlwimi */ 745 mb = (instr >> 6) & 0x1f; 746 me = (instr >> 1) & 0x1f; 747 val = DATA32(regs->gpr[rd]); 748 imm = MASK32(mb, me); 749 regs->gpr[ra] = (regs->gpr[ra] & ~imm) | (ROTATE(val, rb) & imm); 750 goto logical_done; 751 752 case 21: /* rlwinm */ 753 mb = (instr >> 6) & 0x1f; 754 me = (instr >> 1) & 0x1f; 755 val = DATA32(regs->gpr[rd]); 756 regs->gpr[ra] = ROTATE(val, rb) & MASK32(mb, me); 757 goto logical_done; 758 759 case 23: /* rlwnm */ 760 mb = (instr >> 6) & 0x1f; 761 me = (instr >> 1) & 0x1f; 762 rb = regs->gpr[rb] & 0x1f; 763 val = DATA32(regs->gpr[rd]); 764 regs->gpr[ra] = ROTATE(val, rb) & MASK32(mb, me); 765 goto logical_done; 766 767 case 24: /* ori */ 768 imm = (unsigned short) instr; 769 regs->gpr[ra] = regs->gpr[rd] | imm; 770 goto instr_done; 771 772 case 25: /* oris */ 773 imm = (unsigned short) instr; 774 regs->gpr[ra] = regs->gpr[rd] | (imm << 16); 775 goto instr_done; 776 777 case 26: /* xori */ 778 imm = (unsigned short) instr; 779 regs->gpr[ra] = regs->gpr[rd] ^ imm; 780 goto instr_done; 781 782 case 27: /* xoris */ 783 imm = (unsigned short) instr; 784 regs->gpr[ra] = regs->gpr[rd] ^ (imm << 16); 785 goto instr_done; 786 787 case 28: /* andi. */ 788 imm = (unsigned short) instr; 789 regs->gpr[ra] = regs->gpr[rd] & imm; 790 set_cr0(regs, ra); 791 goto instr_done; 792 793 case 29: /* andis. */ 794 imm = (unsigned short) instr; 795 regs->gpr[ra] = regs->gpr[rd] & (imm << 16); 796 set_cr0(regs, ra); 797 goto instr_done; 798 799 #ifdef __powerpc64__ 800 case 30: /* rld* */ 801 mb = ((instr >> 6) & 0x1f) | (instr & 0x20); 802 val = regs->gpr[rd]; 803 if ((instr & 0x10) == 0) { 804 sh = rb | ((instr & 2) << 4); 805 val = ROTATE(val, sh); 806 switch ((instr >> 2) & 3) { 807 case 0: /* rldicl */ 808 regs->gpr[ra] = val & MASK64_L(mb); 809 goto logical_done; 810 case 1: /* rldicr */ 811 regs->gpr[ra] = val & MASK64_R(mb); 812 goto logical_done; 813 case 2: /* rldic */ 814 regs->gpr[ra] = val & MASK64(mb, 63 - sh); 815 goto logical_done; 816 case 3: /* rldimi */ 817 imm = MASK64(mb, 63 - sh); 818 regs->gpr[ra] = (regs->gpr[ra] & ~imm) | 819 (val & imm); 820 goto logical_done; 821 } 822 } else { 823 sh = regs->gpr[rb] & 0x3f; 824 val = ROTATE(val, sh); 825 switch ((instr >> 1) & 7) { 826 case 0: /* rldcl */ 827 regs->gpr[ra] = val & MASK64_L(mb); 828 goto logical_done; 829 case 1: /* rldcr */ 830 regs->gpr[ra] = val & MASK64_R(mb); 831 goto logical_done; 832 } 833 } 834 #endif 835 836 case 31: 837 switch ((instr >> 1) & 0x3ff) { 838 case 83: /* mfmsr */ 839 if (regs->msr & MSR_PR) 840 break; 841 regs->gpr[rd] = regs->msr & MSR_MASK; 842 goto instr_done; 843 case 146: /* mtmsr */ 844 if (regs->msr & MSR_PR) 845 break; 846 imm = regs->gpr[rd]; 847 if ((imm & MSR_RI) == 0) 848 /* can't step mtmsr that would clear MSR_RI */ 849 return -1; 850 regs->msr = imm; 851 goto instr_done; 852 #ifdef CONFIG_PPC64 853 case 178: /* mtmsrd */ 854 /* only MSR_EE and MSR_RI get changed if bit 15 set */ 855 /* mtmsrd doesn't change MSR_HV and MSR_ME */ 856 if (regs->msr & MSR_PR) 857 break; 858 imm = (instr & 0x10000)? 0x8002: 0xefffffffffffefffUL; 859 imm = (regs->msr & MSR_MASK & ~imm) 860 | (regs->gpr[rd] & imm); 861 if ((imm & MSR_RI) == 0) 862 /* can't step mtmsrd that would clear MSR_RI */ 863 return -1; 864 regs->msr = imm; 865 goto instr_done; 866 #endif 867 case 19: /* mfcr */ 868 regs->gpr[rd] = regs->ccr; 869 regs->gpr[rd] &= 0xffffffffUL; 870 goto instr_done; 871 872 case 144: /* mtcrf */ 873 imm = 0xf0000000UL; 874 val = regs->gpr[rd]; 875 for (sh = 0; sh < 8; ++sh) { 876 if (instr & (0x80000 >> sh)) 877 regs->ccr = (regs->ccr & ~imm) | 878 (val & imm); 879 imm >>= 4; 880 } 881 goto instr_done; 882 883 case 339: /* mfspr */ 884 spr = (instr >> 11) & 0x3ff; 885 switch (spr) { 886 case 0x20: /* mfxer */ 887 regs->gpr[rd] = regs->xer; 888 regs->gpr[rd] &= 0xffffffffUL; 889 goto instr_done; 890 case 0x100: /* mflr */ 891 regs->gpr[rd] = regs->link; 892 goto instr_done; 893 case 0x120: /* mfctr */ 894 regs->gpr[rd] = regs->ctr; 895 goto instr_done; 896 } 897 break; 898 899 case 467: /* mtspr */ 900 spr = (instr >> 11) & 0x3ff; 901 switch (spr) { 902 case 0x20: /* mtxer */ 903 regs->xer = (regs->gpr[rd] & 0xffffffffUL); 904 goto instr_done; 905 case 0x100: /* mtlr */ 906 regs->link = regs->gpr[rd]; 907 goto instr_done; 908 case 0x120: /* mtctr */ 909 regs->ctr = regs->gpr[rd]; 910 goto instr_done; 911 } 912 break; 913 914 /* 915 * Compare instructions 916 */ 917 case 0: /* cmp */ 918 val = regs->gpr[ra]; 919 val2 = regs->gpr[rb]; 920 #ifdef __powerpc64__ 921 if ((rd & 1) == 0) { 922 /* word (32-bit) compare */ 923 val = (int) val; 924 val2 = (int) val2; 925 } 926 #endif 927 do_cmp_signed(regs, val, val2, rd >> 2); 928 goto instr_done; 929 930 case 32: /* cmpl */ 931 val = regs->gpr[ra]; 932 val2 = regs->gpr[rb]; 933 #ifdef __powerpc64__ 934 if ((rd & 1) == 0) { 935 /* word (32-bit) compare */ 936 val = (unsigned int) val; 937 val2 = (unsigned int) val2; 938 } 939 #endif 940 do_cmp_unsigned(regs, val, val2, rd >> 2); 941 goto instr_done; 942 943 /* 944 * Arithmetic instructions 945 */ 946 case 8: /* subfc */ 947 add_with_carry(regs, rd, ~regs->gpr[ra], 948 regs->gpr[rb], 1); 949 goto arith_done; 950 #ifdef __powerpc64__ 951 case 9: /* mulhdu */ 952 asm("mulhdu %0,%1,%2" : "=r" (regs->gpr[rd]) : 953 "r" (regs->gpr[ra]), "r" (regs->gpr[rb])); 954 goto arith_done; 955 #endif 956 case 10: /* addc */ 957 add_with_carry(regs, rd, regs->gpr[ra], 958 regs->gpr[rb], 0); 959 goto arith_done; 960 961 case 11: /* mulhwu */ 962 asm("mulhwu %0,%1,%2" : "=r" (regs->gpr[rd]) : 963 "r" (regs->gpr[ra]), "r" (regs->gpr[rb])); 964 goto arith_done; 965 966 case 40: /* subf */ 967 regs->gpr[rd] = regs->gpr[rb] - regs->gpr[ra]; 968 goto arith_done; 969 #ifdef __powerpc64__ 970 case 73: /* mulhd */ 971 asm("mulhd %0,%1,%2" : "=r" (regs->gpr[rd]) : 972 "r" (regs->gpr[ra]), "r" (regs->gpr[rb])); 973 goto arith_done; 974 #endif 975 case 75: /* mulhw */ 976 asm("mulhw %0,%1,%2" : "=r" (regs->gpr[rd]) : 977 "r" (regs->gpr[ra]), "r" (regs->gpr[rb])); 978 goto arith_done; 979 980 case 104: /* neg */ 981 regs->gpr[rd] = -regs->gpr[ra]; 982 goto arith_done; 983 984 case 136: /* subfe */ 985 add_with_carry(regs, rd, ~regs->gpr[ra], regs->gpr[rb], 986 regs->xer & XER_CA); 987 goto arith_done; 988 989 case 138: /* adde */ 990 add_with_carry(regs, rd, regs->gpr[ra], regs->gpr[rb], 991 regs->xer & XER_CA); 992 goto arith_done; 993 994 case 200: /* subfze */ 995 add_with_carry(regs, rd, ~regs->gpr[ra], 0L, 996 regs->xer & XER_CA); 997 goto arith_done; 998 999 case 202: /* addze */ 1000 add_with_carry(regs, rd, regs->gpr[ra], 0L, 1001 regs->xer & XER_CA); 1002 goto arith_done; 1003 1004 case 232: /* subfme */ 1005 add_with_carry(regs, rd, ~regs->gpr[ra], -1L, 1006 regs->xer & XER_CA); 1007 goto arith_done; 1008 #ifdef __powerpc64__ 1009 case 233: /* mulld */ 1010 regs->gpr[rd] = regs->gpr[ra] * regs->gpr[rb]; 1011 goto arith_done; 1012 #endif 1013 case 234: /* addme */ 1014 add_with_carry(regs, rd, regs->gpr[ra], -1L, 1015 regs->xer & XER_CA); 1016 goto arith_done; 1017 1018 case 235: /* mullw */ 1019 regs->gpr[rd] = (unsigned int) regs->gpr[ra] * 1020 (unsigned int) regs->gpr[rb]; 1021 goto arith_done; 1022 1023 case 266: /* add */ 1024 regs->gpr[rd] = regs->gpr[ra] + regs->gpr[rb]; 1025 goto arith_done; 1026 #ifdef __powerpc64__ 1027 case 457: /* divdu */ 1028 regs->gpr[rd] = regs->gpr[ra] / regs->gpr[rb]; 1029 goto arith_done; 1030 #endif 1031 case 459: /* divwu */ 1032 regs->gpr[rd] = (unsigned int) regs->gpr[ra] / 1033 (unsigned int) regs->gpr[rb]; 1034 goto arith_done; 1035 #ifdef __powerpc64__ 1036 case 489: /* divd */ 1037 regs->gpr[rd] = (long int) regs->gpr[ra] / 1038 (long int) regs->gpr[rb]; 1039 goto arith_done; 1040 #endif 1041 case 491: /* divw */ 1042 regs->gpr[rd] = (int) regs->gpr[ra] / 1043 (int) regs->gpr[rb]; 1044 goto arith_done; 1045 1046 1047 /* 1048 * Logical instructions 1049 */ 1050 case 26: /* cntlzw */ 1051 asm("cntlzw %0,%1" : "=r" (regs->gpr[ra]) : 1052 "r" (regs->gpr[rd])); 1053 goto logical_done; 1054 #ifdef __powerpc64__ 1055 case 58: /* cntlzd */ 1056 asm("cntlzd %0,%1" : "=r" (regs->gpr[ra]) : 1057 "r" (regs->gpr[rd])); 1058 goto logical_done; 1059 #endif 1060 case 28: /* and */ 1061 regs->gpr[ra] = regs->gpr[rd] & regs->gpr[rb]; 1062 goto logical_done; 1063 1064 case 60: /* andc */ 1065 regs->gpr[ra] = regs->gpr[rd] & ~regs->gpr[rb]; 1066 goto logical_done; 1067 1068 case 124: /* nor */ 1069 regs->gpr[ra] = ~(regs->gpr[rd] | regs->gpr[rb]); 1070 goto logical_done; 1071 1072 case 284: /* xor */ 1073 regs->gpr[ra] = ~(regs->gpr[rd] ^ regs->gpr[rb]); 1074 goto logical_done; 1075 1076 case 316: /* xor */ 1077 regs->gpr[ra] = regs->gpr[rd] ^ regs->gpr[rb]; 1078 goto logical_done; 1079 1080 case 412: /* orc */ 1081 regs->gpr[ra] = regs->gpr[rd] | ~regs->gpr[rb]; 1082 goto logical_done; 1083 1084 case 444: /* or */ 1085 regs->gpr[ra] = regs->gpr[rd] | regs->gpr[rb]; 1086 goto logical_done; 1087 1088 case 476: /* nand */ 1089 regs->gpr[ra] = ~(regs->gpr[rd] & regs->gpr[rb]); 1090 goto logical_done; 1091 1092 case 922: /* extsh */ 1093 regs->gpr[ra] = (signed short) regs->gpr[rd]; 1094 goto logical_done; 1095 1096 case 954: /* extsb */ 1097 regs->gpr[ra] = (signed char) regs->gpr[rd]; 1098 goto logical_done; 1099 #ifdef __powerpc64__ 1100 case 986: /* extsw */ 1101 regs->gpr[ra] = (signed int) regs->gpr[rd]; 1102 goto logical_done; 1103 #endif 1104 1105 /* 1106 * Shift instructions 1107 */ 1108 case 24: /* slw */ 1109 sh = regs->gpr[rb] & 0x3f; 1110 if (sh < 32) 1111 regs->gpr[ra] = (regs->gpr[rd] << sh) & 0xffffffffUL; 1112 else 1113 regs->gpr[ra] = 0; 1114 goto logical_done; 1115 1116 case 536: /* srw */ 1117 sh = regs->gpr[rb] & 0x3f; 1118 if (sh < 32) 1119 regs->gpr[ra] = (regs->gpr[rd] & 0xffffffffUL) >> sh; 1120 else 1121 regs->gpr[ra] = 0; 1122 goto logical_done; 1123 1124 case 792: /* sraw */ 1125 sh = regs->gpr[rb] & 0x3f; 1126 ival = (signed int) regs->gpr[rd]; 1127 regs->gpr[ra] = ival >> (sh < 32 ? sh : 31); 1128 if (ival < 0 && (sh >= 32 || (ival & ((1 << sh) - 1)) != 0)) 1129 regs->xer |= XER_CA; 1130 else 1131 regs->xer &= ~XER_CA; 1132 goto logical_done; 1133 1134 case 824: /* srawi */ 1135 sh = rb; 1136 ival = (signed int) regs->gpr[rd]; 1137 regs->gpr[ra] = ival >> sh; 1138 if (ival < 0 && (ival & ((1 << sh) - 1)) != 0) 1139 regs->xer |= XER_CA; 1140 else 1141 regs->xer &= ~XER_CA; 1142 goto logical_done; 1143 1144 #ifdef __powerpc64__ 1145 case 27: /* sld */ 1146 sh = regs->gpr[rd] & 0x7f; 1147 if (sh < 64) 1148 regs->gpr[ra] = regs->gpr[rd] << sh; 1149 else 1150 regs->gpr[ra] = 0; 1151 goto logical_done; 1152 1153 case 539: /* srd */ 1154 sh = regs->gpr[rb] & 0x7f; 1155 if (sh < 64) 1156 regs->gpr[ra] = regs->gpr[rd] >> sh; 1157 else 1158 regs->gpr[ra] = 0; 1159 goto logical_done; 1160 1161 case 794: /* srad */ 1162 sh = regs->gpr[rb] & 0x7f; 1163 ival = (signed long int) regs->gpr[rd]; 1164 regs->gpr[ra] = ival >> (sh < 64 ? sh : 63); 1165 if (ival < 0 && (sh >= 64 || (ival & ((1 << sh) - 1)) != 0)) 1166 regs->xer |= XER_CA; 1167 else 1168 regs->xer &= ~XER_CA; 1169 goto logical_done; 1170 1171 case 826: /* sradi with sh_5 = 0 */ 1172 case 827: /* sradi with sh_5 = 1 */ 1173 sh = rb | ((instr & 2) << 4); 1174 ival = (signed long int) regs->gpr[rd]; 1175 regs->gpr[ra] = ival >> sh; 1176 if (ival < 0 && (ival & ((1 << sh) - 1)) != 0) 1177 regs->xer |= XER_CA; 1178 else 1179 regs->xer &= ~XER_CA; 1180 goto logical_done; 1181 #endif /* __powerpc64__ */ 1182 1183 /* 1184 * Cache instructions 1185 */ 1186 case 54: /* dcbst */ 1187 ea = xform_ea(instr, regs, 0); 1188 if (!address_ok(regs, ea, 8)) 1189 return 0; 1190 err = 0; 1191 __cacheop_user_asmx(ea, err, "dcbst"); 1192 if (err) 1193 return 0; 1194 goto instr_done; 1195 1196 case 86: /* dcbf */ 1197 ea = xform_ea(instr, regs, 0); 1198 if (!address_ok(regs, ea, 8)) 1199 return 0; 1200 err = 0; 1201 __cacheop_user_asmx(ea, err, "dcbf"); 1202 if (err) 1203 return 0; 1204 goto instr_done; 1205 1206 case 246: /* dcbtst */ 1207 if (rd == 0) { 1208 ea = xform_ea(instr, regs, 0); 1209 prefetchw((void *) ea); 1210 } 1211 goto instr_done; 1212 1213 case 278: /* dcbt */ 1214 if (rd == 0) { 1215 ea = xform_ea(instr, regs, 0); 1216 prefetch((void *) ea); 1217 } 1218 goto instr_done; 1219 1220 } 1221 break; 1222 } 1223 1224 /* 1225 * Following cases are for loads and stores, so bail out 1226 * if we're in little-endian mode. 1227 */ 1228 if (regs->msr & MSR_LE) 1229 return 0; 1230 1231 /* 1232 * Save register RA in case it's an update form load or store 1233 * and the access faults. 1234 */ 1235 old_ra = regs->gpr[ra]; 1236 1237 switch (opcode) { 1238 case 31: 1239 u = instr & 0x40; 1240 switch ((instr >> 1) & 0x3ff) { 1241 case 20: /* lwarx */ 1242 ea = xform_ea(instr, regs, 0); 1243 if (ea & 3) 1244 break; /* can't handle misaligned */ 1245 err = -EFAULT; 1246 if (!address_ok(regs, ea, 4)) 1247 goto ldst_done; 1248 err = 0; 1249 __get_user_asmx(val, ea, err, "lwarx"); 1250 if (!err) 1251 regs->gpr[rd] = val; 1252 goto ldst_done; 1253 1254 case 150: /* stwcx. */ 1255 ea = xform_ea(instr, regs, 0); 1256 if (ea & 3) 1257 break; /* can't handle misaligned */ 1258 err = -EFAULT; 1259 if (!address_ok(regs, ea, 4)) 1260 goto ldst_done; 1261 err = 0; 1262 __put_user_asmx(regs->gpr[rd], ea, err, "stwcx.", cr); 1263 if (!err) 1264 regs->ccr = (regs->ccr & 0x0fffffff) | 1265 (cr & 0xe0000000) | 1266 ((regs->xer >> 3) & 0x10000000); 1267 goto ldst_done; 1268 1269 #ifdef __powerpc64__ 1270 case 84: /* ldarx */ 1271 ea = xform_ea(instr, regs, 0); 1272 if (ea & 7) 1273 break; /* can't handle misaligned */ 1274 err = -EFAULT; 1275 if (!address_ok(regs, ea, 8)) 1276 goto ldst_done; 1277 err = 0; 1278 __get_user_asmx(val, ea, err, "ldarx"); 1279 if (!err) 1280 regs->gpr[rd] = val; 1281 goto ldst_done; 1282 1283 case 214: /* stdcx. */ 1284 ea = xform_ea(instr, regs, 0); 1285 if (ea & 7) 1286 break; /* can't handle misaligned */ 1287 err = -EFAULT; 1288 if (!address_ok(regs, ea, 8)) 1289 goto ldst_done; 1290 err = 0; 1291 __put_user_asmx(regs->gpr[rd], ea, err, "stdcx.", cr); 1292 if (!err) 1293 regs->ccr = (regs->ccr & 0x0fffffff) | 1294 (cr & 0xe0000000) | 1295 ((regs->xer >> 3) & 0x10000000); 1296 goto ldst_done; 1297 1298 case 21: /* ldx */ 1299 case 53: /* ldux */ 1300 err = read_mem(®s->gpr[rd], xform_ea(instr, regs, u), 1301 8, regs); 1302 goto ldst_done; 1303 #endif 1304 1305 case 23: /* lwzx */ 1306 case 55: /* lwzux */ 1307 err = read_mem(®s->gpr[rd], xform_ea(instr, regs, u), 1308 4, regs); 1309 goto ldst_done; 1310 1311 case 87: /* lbzx */ 1312 case 119: /* lbzux */ 1313 err = read_mem(®s->gpr[rd], xform_ea(instr, regs, u), 1314 1, regs); 1315 goto ldst_done; 1316 1317 #ifdef CONFIG_ALTIVEC 1318 case 103: /* lvx */ 1319 case 359: /* lvxl */ 1320 if (!(regs->msr & MSR_VEC)) 1321 break; 1322 ea = xform_ea(instr, regs, 0); 1323 err = do_vec_load(rd, do_lvx, ea, regs); 1324 goto ldst_done; 1325 1326 case 231: /* stvx */ 1327 case 487: /* stvxl */ 1328 if (!(regs->msr & MSR_VEC)) 1329 break; 1330 ea = xform_ea(instr, regs, 0); 1331 err = do_vec_store(rd, do_stvx, ea, regs); 1332 goto ldst_done; 1333 #endif /* CONFIG_ALTIVEC */ 1334 1335 #ifdef __powerpc64__ 1336 case 149: /* stdx */ 1337 case 181: /* stdux */ 1338 val = regs->gpr[rd]; 1339 err = write_mem(val, xform_ea(instr, regs, u), 8, regs); 1340 goto ldst_done; 1341 #endif 1342 1343 case 151: /* stwx */ 1344 case 183: /* stwux */ 1345 val = regs->gpr[rd]; 1346 err = write_mem(val, xform_ea(instr, regs, u), 4, regs); 1347 goto ldst_done; 1348 1349 case 215: /* stbx */ 1350 case 247: /* stbux */ 1351 val = regs->gpr[rd]; 1352 err = write_mem(val, xform_ea(instr, regs, u), 1, regs); 1353 goto ldst_done; 1354 1355 case 279: /* lhzx */ 1356 case 311: /* lhzux */ 1357 err = read_mem(®s->gpr[rd], xform_ea(instr, regs, u), 1358 2, regs); 1359 goto ldst_done; 1360 1361 #ifdef __powerpc64__ 1362 case 341: /* lwax */ 1363 case 373: /* lwaux */ 1364 err = read_mem(®s->gpr[rd], xform_ea(instr, regs, u), 1365 4, regs); 1366 if (!err) 1367 regs->gpr[rd] = (signed int) regs->gpr[rd]; 1368 goto ldst_done; 1369 #endif 1370 1371 case 343: /* lhax */ 1372 case 375: /* lhaux */ 1373 err = read_mem(®s->gpr[rd], xform_ea(instr, regs, u), 1374 2, regs); 1375 if (!err) 1376 regs->gpr[rd] = (signed short) regs->gpr[rd]; 1377 goto ldst_done; 1378 1379 case 407: /* sthx */ 1380 case 439: /* sthux */ 1381 val = regs->gpr[rd]; 1382 err = write_mem(val, xform_ea(instr, regs, u), 2, regs); 1383 goto ldst_done; 1384 1385 #ifdef __powerpc64__ 1386 case 532: /* ldbrx */ 1387 err = read_mem(&val, xform_ea(instr, regs, 0), 8, regs); 1388 if (!err) 1389 regs->gpr[rd] = byterev_8(val); 1390 goto ldst_done; 1391 1392 #endif 1393 1394 case 534: /* lwbrx */ 1395 err = read_mem(&val, xform_ea(instr, regs, 0), 4, regs); 1396 if (!err) 1397 regs->gpr[rd] = byterev_4(val); 1398 goto ldst_done; 1399 1400 #ifdef CONFIG_PPC_CPU 1401 case 535: /* lfsx */ 1402 case 567: /* lfsux */ 1403 if (!(regs->msr & MSR_FP)) 1404 break; 1405 ea = xform_ea(instr, regs, u); 1406 err = do_fp_load(rd, do_lfs, ea, 4, regs); 1407 goto ldst_done; 1408 1409 case 599: /* lfdx */ 1410 case 631: /* lfdux */ 1411 if (!(regs->msr & MSR_FP)) 1412 break; 1413 ea = xform_ea(instr, regs, u); 1414 err = do_fp_load(rd, do_lfd, ea, 8, regs); 1415 goto ldst_done; 1416 1417 case 663: /* stfsx */ 1418 case 695: /* stfsux */ 1419 if (!(regs->msr & MSR_FP)) 1420 break; 1421 ea = xform_ea(instr, regs, u); 1422 err = do_fp_store(rd, do_stfs, ea, 4, regs); 1423 goto ldst_done; 1424 1425 case 727: /* stfdx */ 1426 case 759: /* stfdux */ 1427 if (!(regs->msr & MSR_FP)) 1428 break; 1429 ea = xform_ea(instr, regs, u); 1430 err = do_fp_store(rd, do_stfd, ea, 8, regs); 1431 goto ldst_done; 1432 #endif 1433 1434 #ifdef __powerpc64__ 1435 case 660: /* stdbrx */ 1436 val = byterev_8(regs->gpr[rd]); 1437 err = write_mem(val, xform_ea(instr, regs, 0), 8, regs); 1438 goto ldst_done; 1439 1440 #endif 1441 case 662: /* stwbrx */ 1442 val = byterev_4(regs->gpr[rd]); 1443 err = write_mem(val, xform_ea(instr, regs, 0), 4, regs); 1444 goto ldst_done; 1445 1446 case 790: /* lhbrx */ 1447 err = read_mem(&val, xform_ea(instr, regs, 0), 2, regs); 1448 if (!err) 1449 regs->gpr[rd] = byterev_2(val); 1450 goto ldst_done; 1451 1452 case 918: /* sthbrx */ 1453 val = byterev_2(regs->gpr[rd]); 1454 err = write_mem(val, xform_ea(instr, regs, 0), 2, regs); 1455 goto ldst_done; 1456 1457 #ifdef CONFIG_VSX 1458 case 844: /* lxvd2x */ 1459 case 876: /* lxvd2ux */ 1460 if (!(regs->msr & MSR_VSX)) 1461 break; 1462 rd |= (instr & 1) << 5; 1463 ea = xform_ea(instr, regs, u); 1464 err = do_vsx_load(rd, do_lxvd2x, ea, regs); 1465 goto ldst_done; 1466 1467 case 972: /* stxvd2x */ 1468 case 1004: /* stxvd2ux */ 1469 if (!(regs->msr & MSR_VSX)) 1470 break; 1471 rd |= (instr & 1) << 5; 1472 ea = xform_ea(instr, regs, u); 1473 err = do_vsx_store(rd, do_stxvd2x, ea, regs); 1474 goto ldst_done; 1475 1476 #endif /* CONFIG_VSX */ 1477 } 1478 break; 1479 1480 case 32: /* lwz */ 1481 case 33: /* lwzu */ 1482 err = read_mem(®s->gpr[rd], dform_ea(instr, regs), 4, regs); 1483 goto ldst_done; 1484 1485 case 34: /* lbz */ 1486 case 35: /* lbzu */ 1487 err = read_mem(®s->gpr[rd], dform_ea(instr, regs), 1, regs); 1488 goto ldst_done; 1489 1490 case 36: /* stw */ 1491 val = regs->gpr[rd]; 1492 err = write_mem(val, dform_ea(instr, regs), 4, regs); 1493 goto ldst_done; 1494 1495 case 37: /* stwu */ 1496 val = regs->gpr[rd]; 1497 val3 = dform_ea(instr, regs); 1498 /* 1499 * For PPC32 we always use stwu to change stack point with r1. So 1500 * this emulated store may corrupt the exception frame, now we 1501 * have to provide the exception frame trampoline, which is pushed 1502 * below the kprobed function stack. So we only update gpr[1] but 1503 * don't emulate the real store operation. We will do real store 1504 * operation safely in exception return code by checking this flag. 1505 */ 1506 if ((ra == 1) && !(regs->msr & MSR_PR) \ 1507 && (val3 >= (regs->gpr[1] - STACK_INT_FRAME_SIZE))) { 1508 /* 1509 * Check if we will touch kernel sack overflow 1510 */ 1511 if (val3 - STACK_INT_FRAME_SIZE <= current->thread.ksp_limit) { 1512 printk(KERN_CRIT "Can't kprobe this since Kernel stack overflow.\n"); 1513 err = -EINVAL; 1514 break; 1515 } 1516 1517 /* 1518 * Check if we already set since that means we'll 1519 * lose the previous value. 1520 */ 1521 WARN_ON(test_thread_flag(TIF_EMULATE_STACK_STORE)); 1522 set_thread_flag(TIF_EMULATE_STACK_STORE); 1523 err = 0; 1524 } else 1525 err = write_mem(val, val3, 4, regs); 1526 goto ldst_done; 1527 1528 case 38: /* stb */ 1529 case 39: /* stbu */ 1530 val = regs->gpr[rd]; 1531 err = write_mem(val, dform_ea(instr, regs), 1, regs); 1532 goto ldst_done; 1533 1534 case 40: /* lhz */ 1535 case 41: /* lhzu */ 1536 err = read_mem(®s->gpr[rd], dform_ea(instr, regs), 2, regs); 1537 goto ldst_done; 1538 1539 case 42: /* lha */ 1540 case 43: /* lhau */ 1541 err = read_mem(®s->gpr[rd], dform_ea(instr, regs), 2, regs); 1542 if (!err) 1543 regs->gpr[rd] = (signed short) regs->gpr[rd]; 1544 goto ldst_done; 1545 1546 case 44: /* sth */ 1547 case 45: /* sthu */ 1548 val = regs->gpr[rd]; 1549 err = write_mem(val, dform_ea(instr, regs), 2, regs); 1550 goto ldst_done; 1551 1552 case 46: /* lmw */ 1553 ra = (instr >> 16) & 0x1f; 1554 if (ra >= rd) 1555 break; /* invalid form, ra in range to load */ 1556 ea = dform_ea(instr, regs); 1557 do { 1558 err = read_mem(®s->gpr[rd], ea, 4, regs); 1559 if (err) 1560 return 0; 1561 ea += 4; 1562 } while (++rd < 32); 1563 goto instr_done; 1564 1565 case 47: /* stmw */ 1566 ea = dform_ea(instr, regs); 1567 do { 1568 err = write_mem(regs->gpr[rd], ea, 4, regs); 1569 if (err) 1570 return 0; 1571 ea += 4; 1572 } while (++rd < 32); 1573 goto instr_done; 1574 1575 #ifdef CONFIG_PPC_FPU 1576 case 48: /* lfs */ 1577 case 49: /* lfsu */ 1578 if (!(regs->msr & MSR_FP)) 1579 break; 1580 ea = dform_ea(instr, regs); 1581 err = do_fp_load(rd, do_lfs, ea, 4, regs); 1582 goto ldst_done; 1583 1584 case 50: /* lfd */ 1585 case 51: /* lfdu */ 1586 if (!(regs->msr & MSR_FP)) 1587 break; 1588 ea = dform_ea(instr, regs); 1589 err = do_fp_load(rd, do_lfd, ea, 8, regs); 1590 goto ldst_done; 1591 1592 case 52: /* stfs */ 1593 case 53: /* stfsu */ 1594 if (!(regs->msr & MSR_FP)) 1595 break; 1596 ea = dform_ea(instr, regs); 1597 err = do_fp_store(rd, do_stfs, ea, 4, regs); 1598 goto ldst_done; 1599 1600 case 54: /* stfd */ 1601 case 55: /* stfdu */ 1602 if (!(regs->msr & MSR_FP)) 1603 break; 1604 ea = dform_ea(instr, regs); 1605 err = do_fp_store(rd, do_stfd, ea, 8, regs); 1606 goto ldst_done; 1607 #endif 1608 1609 #ifdef __powerpc64__ 1610 case 58: /* ld[u], lwa */ 1611 switch (instr & 3) { 1612 case 0: /* ld */ 1613 err = read_mem(®s->gpr[rd], dsform_ea(instr, regs), 1614 8, regs); 1615 goto ldst_done; 1616 case 1: /* ldu */ 1617 err = read_mem(®s->gpr[rd], dsform_ea(instr, regs), 1618 8, regs); 1619 goto ldst_done; 1620 case 2: /* lwa */ 1621 err = read_mem(®s->gpr[rd], dsform_ea(instr, regs), 1622 4, regs); 1623 if (!err) 1624 regs->gpr[rd] = (signed int) regs->gpr[rd]; 1625 goto ldst_done; 1626 } 1627 break; 1628 1629 case 62: /* std[u] */ 1630 val = regs->gpr[rd]; 1631 switch (instr & 3) { 1632 case 0: /* std */ 1633 err = write_mem(val, dsform_ea(instr, regs), 8, regs); 1634 goto ldst_done; 1635 case 1: /* stdu */ 1636 err = write_mem(val, dsform_ea(instr, regs), 8, regs); 1637 goto ldst_done; 1638 } 1639 break; 1640 #endif /* __powerpc64__ */ 1641 1642 } 1643 err = -EINVAL; 1644 1645 ldst_done: 1646 if (err) { 1647 regs->gpr[ra] = old_ra; 1648 return 0; /* invoke DSI if -EFAULT? */ 1649 } 1650 instr_done: 1651 regs->nip = truncate_if_32bit(regs->msr, regs->nip + 4); 1652 return 1; 1653 1654 logical_done: 1655 if (instr & 1) 1656 set_cr0(regs, ra); 1657 goto instr_done; 1658 1659 arith_done: 1660 if (instr & 1) 1661 set_cr0(regs, rd); 1662 goto instr_done; 1663 } 1664