1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * 4 * Copyright IBM Corp. 2007 5 * 6 * Authors: Hollis Blanchard <hollisb@us.ibm.com> 7 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 8 */ 9 10 #include <linux/errno.h> 11 #include <linux/err.h> 12 #include <linux/kvm_host.h> 13 #include <linux/vmalloc.h> 14 #include <linux/hrtimer.h> 15 #include <linux/sched/signal.h> 16 #include <linux/fs.h> 17 #include <linux/slab.h> 18 #include <linux/file.h> 19 #include <linux/module.h> 20 #include <linux/irqbypass.h> 21 #include <linux/kvm_irqfd.h> 22 #include <asm/cputable.h> 23 #include <linux/uaccess.h> 24 #include <asm/kvm_ppc.h> 25 #include <asm/cputhreads.h> 26 #include <asm/irqflags.h> 27 #include <asm/iommu.h> 28 #include <asm/switch_to.h> 29 #include <asm/xive.h> 30 #ifdef CONFIG_PPC_PSERIES 31 #include <asm/hvcall.h> 32 #include <asm/plpar_wrappers.h> 33 #endif 34 #include <asm/ultravisor.h> 35 36 #include "timing.h" 37 #include "irq.h" 38 #include "../mm/mmu_decl.h" 39 40 #define CREATE_TRACE_POINTS 41 #include "trace.h" 42 43 struct kvmppc_ops *kvmppc_hv_ops; 44 EXPORT_SYMBOL_GPL(kvmppc_hv_ops); 45 struct kvmppc_ops *kvmppc_pr_ops; 46 EXPORT_SYMBOL_GPL(kvmppc_pr_ops); 47 48 49 int kvm_arch_vcpu_runnable(struct kvm_vcpu *v) 50 { 51 return !!(v->arch.pending_exceptions) || kvm_request_pending(v); 52 } 53 54 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu) 55 { 56 return kvm_arch_vcpu_runnable(vcpu); 57 } 58 59 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu) 60 { 61 return false; 62 } 63 64 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu) 65 { 66 return 1; 67 } 68 69 /* 70 * Common checks before entering the guest world. Call with interrupts 71 * disabled. 72 * 73 * returns: 74 * 75 * == 1 if we're ready to go into guest state 76 * <= 0 if we need to go back to the host with return value 77 */ 78 int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu) 79 { 80 int r; 81 82 WARN_ON(irqs_disabled()); 83 hard_irq_disable(); 84 85 while (true) { 86 if (need_resched()) { 87 local_irq_enable(); 88 cond_resched(); 89 hard_irq_disable(); 90 continue; 91 } 92 93 if (signal_pending(current)) { 94 kvmppc_account_exit(vcpu, SIGNAL_EXITS); 95 vcpu->run->exit_reason = KVM_EXIT_INTR; 96 r = -EINTR; 97 break; 98 } 99 100 vcpu->mode = IN_GUEST_MODE; 101 102 /* 103 * Reading vcpu->requests must happen after setting vcpu->mode, 104 * so we don't miss a request because the requester sees 105 * OUTSIDE_GUEST_MODE and assumes we'll be checking requests 106 * before next entering the guest (and thus doesn't IPI). 107 * This also orders the write to mode from any reads 108 * to the page tables done while the VCPU is running. 109 * Please see the comment in kvm_flush_remote_tlbs. 110 */ 111 smp_mb(); 112 113 if (kvm_request_pending(vcpu)) { 114 /* Make sure we process requests preemptable */ 115 local_irq_enable(); 116 trace_kvm_check_requests(vcpu); 117 r = kvmppc_core_check_requests(vcpu); 118 hard_irq_disable(); 119 if (r > 0) 120 continue; 121 break; 122 } 123 124 if (kvmppc_core_prepare_to_enter(vcpu)) { 125 /* interrupts got enabled in between, so we 126 are back at square 1 */ 127 continue; 128 } 129 130 guest_enter_irqoff(); 131 return 1; 132 } 133 134 /* return to host */ 135 local_irq_enable(); 136 return r; 137 } 138 EXPORT_SYMBOL_GPL(kvmppc_prepare_to_enter); 139 140 #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE) 141 static void kvmppc_swab_shared(struct kvm_vcpu *vcpu) 142 { 143 struct kvm_vcpu_arch_shared *shared = vcpu->arch.shared; 144 int i; 145 146 shared->sprg0 = swab64(shared->sprg0); 147 shared->sprg1 = swab64(shared->sprg1); 148 shared->sprg2 = swab64(shared->sprg2); 149 shared->sprg3 = swab64(shared->sprg3); 150 shared->srr0 = swab64(shared->srr0); 151 shared->srr1 = swab64(shared->srr1); 152 shared->dar = swab64(shared->dar); 153 shared->msr = swab64(shared->msr); 154 shared->dsisr = swab32(shared->dsisr); 155 shared->int_pending = swab32(shared->int_pending); 156 for (i = 0; i < ARRAY_SIZE(shared->sr); i++) 157 shared->sr[i] = swab32(shared->sr[i]); 158 } 159 #endif 160 161 int kvmppc_kvm_pv(struct kvm_vcpu *vcpu) 162 { 163 int nr = kvmppc_get_gpr(vcpu, 11); 164 int r; 165 unsigned long __maybe_unused param1 = kvmppc_get_gpr(vcpu, 3); 166 unsigned long __maybe_unused param2 = kvmppc_get_gpr(vcpu, 4); 167 unsigned long __maybe_unused param3 = kvmppc_get_gpr(vcpu, 5); 168 unsigned long __maybe_unused param4 = kvmppc_get_gpr(vcpu, 6); 169 unsigned long r2 = 0; 170 171 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) { 172 /* 32 bit mode */ 173 param1 &= 0xffffffff; 174 param2 &= 0xffffffff; 175 param3 &= 0xffffffff; 176 param4 &= 0xffffffff; 177 } 178 179 switch (nr) { 180 case KVM_HCALL_TOKEN(KVM_HC_PPC_MAP_MAGIC_PAGE): 181 { 182 #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE) 183 /* Book3S can be little endian, find it out here */ 184 int shared_big_endian = true; 185 if (vcpu->arch.intr_msr & MSR_LE) 186 shared_big_endian = false; 187 if (shared_big_endian != vcpu->arch.shared_big_endian) 188 kvmppc_swab_shared(vcpu); 189 vcpu->arch.shared_big_endian = shared_big_endian; 190 #endif 191 192 if (!(param2 & MAGIC_PAGE_FLAG_NOT_MAPPED_NX)) { 193 /* 194 * Older versions of the Linux magic page code had 195 * a bug where they would map their trampoline code 196 * NX. If that's the case, remove !PR NX capability. 197 */ 198 vcpu->arch.disable_kernel_nx = true; 199 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); 200 } 201 202 vcpu->arch.magic_page_pa = param1 & ~0xfffULL; 203 vcpu->arch.magic_page_ea = param2 & ~0xfffULL; 204 205 #ifdef CONFIG_PPC_64K_PAGES 206 /* 207 * Make sure our 4k magic page is in the same window of a 64k 208 * page within the guest and within the host's page. 209 */ 210 if ((vcpu->arch.magic_page_pa & 0xf000) != 211 ((ulong)vcpu->arch.shared & 0xf000)) { 212 void *old_shared = vcpu->arch.shared; 213 ulong shared = (ulong)vcpu->arch.shared; 214 void *new_shared; 215 216 shared &= PAGE_MASK; 217 shared |= vcpu->arch.magic_page_pa & 0xf000; 218 new_shared = (void*)shared; 219 memcpy(new_shared, old_shared, 0x1000); 220 vcpu->arch.shared = new_shared; 221 } 222 #endif 223 224 r2 = KVM_MAGIC_FEAT_SR | KVM_MAGIC_FEAT_MAS0_TO_SPRG7; 225 226 r = EV_SUCCESS; 227 break; 228 } 229 case KVM_HCALL_TOKEN(KVM_HC_FEATURES): 230 r = EV_SUCCESS; 231 #if defined(CONFIG_PPC_BOOK3S) || defined(CONFIG_KVM_E500V2) 232 r2 |= (1 << KVM_FEATURE_MAGIC_PAGE); 233 #endif 234 235 /* Second return value is in r4 */ 236 break; 237 case EV_HCALL_TOKEN(EV_IDLE): 238 r = EV_SUCCESS; 239 kvm_vcpu_halt(vcpu); 240 kvm_clear_request(KVM_REQ_UNHALT, vcpu); 241 break; 242 default: 243 r = EV_UNIMPLEMENTED; 244 break; 245 } 246 247 kvmppc_set_gpr(vcpu, 4, r2); 248 249 return r; 250 } 251 EXPORT_SYMBOL_GPL(kvmppc_kvm_pv); 252 253 int kvmppc_sanity_check(struct kvm_vcpu *vcpu) 254 { 255 int r = false; 256 257 /* We have to know what CPU to virtualize */ 258 if (!vcpu->arch.pvr) 259 goto out; 260 261 /* PAPR only works with book3s_64 */ 262 if ((vcpu->arch.cpu_type != KVM_CPU_3S_64) && vcpu->arch.papr_enabled) 263 goto out; 264 265 /* HV KVM can only do PAPR mode for now */ 266 if (!vcpu->arch.papr_enabled && is_kvmppc_hv_enabled(vcpu->kvm)) 267 goto out; 268 269 #ifdef CONFIG_KVM_BOOKE_HV 270 if (!cpu_has_feature(CPU_FTR_EMB_HV)) 271 goto out; 272 #endif 273 274 r = true; 275 276 out: 277 vcpu->arch.sane = r; 278 return r ? 0 : -EINVAL; 279 } 280 EXPORT_SYMBOL_GPL(kvmppc_sanity_check); 281 282 int kvmppc_emulate_mmio(struct kvm_vcpu *vcpu) 283 { 284 enum emulation_result er; 285 int r; 286 287 er = kvmppc_emulate_loadstore(vcpu); 288 switch (er) { 289 case EMULATE_DONE: 290 /* Future optimization: only reload non-volatiles if they were 291 * actually modified. */ 292 r = RESUME_GUEST_NV; 293 break; 294 case EMULATE_AGAIN: 295 r = RESUME_GUEST; 296 break; 297 case EMULATE_DO_MMIO: 298 vcpu->run->exit_reason = KVM_EXIT_MMIO; 299 /* We must reload nonvolatiles because "update" load/store 300 * instructions modify register state. */ 301 /* Future optimization: only reload non-volatiles if they were 302 * actually modified. */ 303 r = RESUME_HOST_NV; 304 break; 305 case EMULATE_FAIL: 306 { 307 u32 last_inst; 308 309 kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst); 310 kvm_debug_ratelimited("Guest access to device memory using unsupported instruction (opcode: %#08x)\n", 311 last_inst); 312 313 /* 314 * Injecting a Data Storage here is a bit more 315 * accurate since the instruction that caused the 316 * access could still be a valid one. 317 */ 318 if (!IS_ENABLED(CONFIG_BOOKE)) { 319 ulong dsisr = DSISR_BADACCESS; 320 321 if (vcpu->mmio_is_write) 322 dsisr |= DSISR_ISSTORE; 323 324 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.vaddr_accessed, dsisr); 325 } else { 326 /* 327 * BookE does not send a SIGBUS on a bad 328 * fault, so use a Program interrupt instead 329 * to avoid a fault loop. 330 */ 331 kvmppc_core_queue_program(vcpu, 0); 332 } 333 334 r = RESUME_GUEST; 335 break; 336 } 337 default: 338 WARN_ON(1); 339 r = RESUME_GUEST; 340 } 341 342 return r; 343 } 344 EXPORT_SYMBOL_GPL(kvmppc_emulate_mmio); 345 346 int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, 347 bool data) 348 { 349 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK; 350 struct kvmppc_pte pte; 351 int r = -EINVAL; 352 353 vcpu->stat.st++; 354 355 if (vcpu->kvm->arch.kvm_ops && vcpu->kvm->arch.kvm_ops->store_to_eaddr) 356 r = vcpu->kvm->arch.kvm_ops->store_to_eaddr(vcpu, eaddr, ptr, 357 size); 358 359 if ((!r) || (r == -EAGAIN)) 360 return r; 361 362 r = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST, 363 XLATE_WRITE, &pte); 364 if (r < 0) 365 return r; 366 367 *eaddr = pte.raddr; 368 369 if (!pte.may_write) 370 return -EPERM; 371 372 /* Magic page override */ 373 if (kvmppc_supports_magic_page(vcpu) && mp_pa && 374 ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) && 375 !(kvmppc_get_msr(vcpu) & MSR_PR)) { 376 void *magic = vcpu->arch.shared; 377 magic += pte.eaddr & 0xfff; 378 memcpy(magic, ptr, size); 379 return EMULATE_DONE; 380 } 381 382 if (kvm_write_guest(vcpu->kvm, pte.raddr, ptr, size)) 383 return EMULATE_DO_MMIO; 384 385 return EMULATE_DONE; 386 } 387 EXPORT_SYMBOL_GPL(kvmppc_st); 388 389 int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, 390 bool data) 391 { 392 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK; 393 struct kvmppc_pte pte; 394 int rc = -EINVAL; 395 396 vcpu->stat.ld++; 397 398 if (vcpu->kvm->arch.kvm_ops && vcpu->kvm->arch.kvm_ops->load_from_eaddr) 399 rc = vcpu->kvm->arch.kvm_ops->load_from_eaddr(vcpu, eaddr, ptr, 400 size); 401 402 if ((!rc) || (rc == -EAGAIN)) 403 return rc; 404 405 rc = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST, 406 XLATE_READ, &pte); 407 if (rc) 408 return rc; 409 410 *eaddr = pte.raddr; 411 412 if (!pte.may_read) 413 return -EPERM; 414 415 if (!data && !pte.may_execute) 416 return -ENOEXEC; 417 418 /* Magic page override */ 419 if (kvmppc_supports_magic_page(vcpu) && mp_pa && 420 ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) && 421 !(kvmppc_get_msr(vcpu) & MSR_PR)) { 422 void *magic = vcpu->arch.shared; 423 magic += pte.eaddr & 0xfff; 424 memcpy(ptr, magic, size); 425 return EMULATE_DONE; 426 } 427 428 kvm_vcpu_srcu_read_lock(vcpu); 429 rc = kvm_read_guest(vcpu->kvm, pte.raddr, ptr, size); 430 kvm_vcpu_srcu_read_unlock(vcpu); 431 if (rc) 432 return EMULATE_DO_MMIO; 433 434 return EMULATE_DONE; 435 } 436 EXPORT_SYMBOL_GPL(kvmppc_ld); 437 438 int kvm_arch_hardware_enable(void) 439 { 440 return 0; 441 } 442 443 int kvm_arch_hardware_setup(void *opaque) 444 { 445 return 0; 446 } 447 448 int kvm_arch_check_processor_compat(void *opaque) 449 { 450 return kvmppc_core_check_processor_compat(); 451 } 452 453 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) 454 { 455 struct kvmppc_ops *kvm_ops = NULL; 456 int r; 457 458 /* 459 * if we have both HV and PR enabled, default is HV 460 */ 461 if (type == 0) { 462 if (kvmppc_hv_ops) 463 kvm_ops = kvmppc_hv_ops; 464 else 465 kvm_ops = kvmppc_pr_ops; 466 if (!kvm_ops) 467 goto err_out; 468 } else if (type == KVM_VM_PPC_HV) { 469 if (!kvmppc_hv_ops) 470 goto err_out; 471 kvm_ops = kvmppc_hv_ops; 472 } else if (type == KVM_VM_PPC_PR) { 473 if (!kvmppc_pr_ops) 474 goto err_out; 475 kvm_ops = kvmppc_pr_ops; 476 } else 477 goto err_out; 478 479 if (!try_module_get(kvm_ops->owner)) 480 return -ENOENT; 481 482 kvm->arch.kvm_ops = kvm_ops; 483 r = kvmppc_core_init_vm(kvm); 484 if (r) 485 module_put(kvm_ops->owner); 486 return r; 487 err_out: 488 return -EINVAL; 489 } 490 491 void kvm_arch_destroy_vm(struct kvm *kvm) 492 { 493 #ifdef CONFIG_KVM_XICS 494 /* 495 * We call kick_all_cpus_sync() to ensure that all 496 * CPUs have executed any pending IPIs before we 497 * continue and free VCPUs structures below. 498 */ 499 if (is_kvmppc_hv_enabled(kvm)) 500 kick_all_cpus_sync(); 501 #endif 502 503 kvm_destroy_vcpus(kvm); 504 505 mutex_lock(&kvm->lock); 506 507 kvmppc_core_destroy_vm(kvm); 508 509 mutex_unlock(&kvm->lock); 510 511 /* drop the module reference */ 512 module_put(kvm->arch.kvm_ops->owner); 513 } 514 515 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) 516 { 517 int r; 518 /* Assume we're using HV mode when the HV module is loaded */ 519 int hv_enabled = kvmppc_hv_ops ? 1 : 0; 520 521 if (kvm) { 522 /* 523 * Hooray - we know which VM type we're running on. Depend on 524 * that rather than the guess above. 525 */ 526 hv_enabled = is_kvmppc_hv_enabled(kvm); 527 } 528 529 switch (ext) { 530 #ifdef CONFIG_BOOKE 531 case KVM_CAP_PPC_BOOKE_SREGS: 532 case KVM_CAP_PPC_BOOKE_WATCHDOG: 533 case KVM_CAP_PPC_EPR: 534 #else 535 case KVM_CAP_PPC_SEGSTATE: 536 case KVM_CAP_PPC_HIOR: 537 case KVM_CAP_PPC_PAPR: 538 #endif 539 case KVM_CAP_PPC_UNSET_IRQ: 540 case KVM_CAP_PPC_IRQ_LEVEL: 541 case KVM_CAP_ENABLE_CAP: 542 case KVM_CAP_ONE_REG: 543 case KVM_CAP_IOEVENTFD: 544 case KVM_CAP_DEVICE_CTRL: 545 case KVM_CAP_IMMEDIATE_EXIT: 546 case KVM_CAP_SET_GUEST_DEBUG: 547 r = 1; 548 break; 549 case KVM_CAP_PPC_GUEST_DEBUG_SSTEP: 550 case KVM_CAP_PPC_PAIRED_SINGLES: 551 case KVM_CAP_PPC_OSI: 552 case KVM_CAP_PPC_GET_PVINFO: 553 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 554 case KVM_CAP_SW_TLB: 555 #endif 556 /* We support this only for PR */ 557 r = !hv_enabled; 558 break; 559 #ifdef CONFIG_KVM_MPIC 560 case KVM_CAP_IRQ_MPIC: 561 r = 1; 562 break; 563 #endif 564 565 #ifdef CONFIG_PPC_BOOK3S_64 566 case KVM_CAP_SPAPR_TCE: 567 case KVM_CAP_SPAPR_TCE_64: 568 r = 1; 569 break; 570 case KVM_CAP_SPAPR_TCE_VFIO: 571 r = !!cpu_has_feature(CPU_FTR_HVMODE); 572 break; 573 case KVM_CAP_PPC_RTAS: 574 case KVM_CAP_PPC_FIXUP_HCALL: 575 case KVM_CAP_PPC_ENABLE_HCALL: 576 #ifdef CONFIG_KVM_XICS 577 case KVM_CAP_IRQ_XICS: 578 #endif 579 case KVM_CAP_PPC_GET_CPU_CHAR: 580 r = 1; 581 break; 582 #ifdef CONFIG_KVM_XIVE 583 case KVM_CAP_PPC_IRQ_XIVE: 584 /* 585 * We need XIVE to be enabled on the platform (implies 586 * a POWER9 processor) and the PowerNV platform, as 587 * nested is not yet supported. 588 */ 589 r = xive_enabled() && !!cpu_has_feature(CPU_FTR_HVMODE) && 590 kvmppc_xive_native_supported(); 591 break; 592 #endif 593 594 case KVM_CAP_PPC_ALLOC_HTAB: 595 r = hv_enabled; 596 break; 597 #endif /* CONFIG_PPC_BOOK3S_64 */ 598 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 599 case KVM_CAP_PPC_SMT: 600 r = 0; 601 if (kvm) { 602 if (kvm->arch.emul_smt_mode > 1) 603 r = kvm->arch.emul_smt_mode; 604 else 605 r = kvm->arch.smt_mode; 606 } else if (hv_enabled) { 607 if (cpu_has_feature(CPU_FTR_ARCH_300)) 608 r = 1; 609 else 610 r = threads_per_subcore; 611 } 612 break; 613 case KVM_CAP_PPC_SMT_POSSIBLE: 614 r = 1; 615 if (hv_enabled) { 616 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 617 r = ((threads_per_subcore << 1) - 1); 618 else 619 /* P9 can emulate dbells, so allow any mode */ 620 r = 8 | 4 | 2 | 1; 621 } 622 break; 623 case KVM_CAP_PPC_RMA: 624 r = 0; 625 break; 626 case KVM_CAP_PPC_HWRNG: 627 r = kvmppc_hwrng_present(); 628 break; 629 case KVM_CAP_PPC_MMU_RADIX: 630 r = !!(hv_enabled && radix_enabled()); 631 break; 632 case KVM_CAP_PPC_MMU_HASH_V3: 633 r = !!(hv_enabled && kvmppc_hv_ops->hash_v3_possible && 634 kvmppc_hv_ops->hash_v3_possible()); 635 break; 636 case KVM_CAP_PPC_NESTED_HV: 637 r = !!(hv_enabled && kvmppc_hv_ops->enable_nested && 638 !kvmppc_hv_ops->enable_nested(NULL)); 639 break; 640 #endif 641 case KVM_CAP_SYNC_MMU: 642 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 643 r = hv_enabled; 644 #elif defined(KVM_ARCH_WANT_MMU_NOTIFIER) 645 r = 1; 646 #else 647 r = 0; 648 #endif 649 break; 650 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 651 case KVM_CAP_PPC_HTAB_FD: 652 r = hv_enabled; 653 break; 654 #endif 655 case KVM_CAP_NR_VCPUS: 656 /* 657 * Recommending a number of CPUs is somewhat arbitrary; we 658 * return the number of present CPUs for -HV (since a host 659 * will have secondary threads "offline"), and for other KVM 660 * implementations just count online CPUs. 661 */ 662 if (hv_enabled) 663 r = min_t(unsigned int, num_present_cpus(), KVM_MAX_VCPUS); 664 else 665 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS); 666 break; 667 case KVM_CAP_MAX_VCPUS: 668 r = KVM_MAX_VCPUS; 669 break; 670 case KVM_CAP_MAX_VCPU_ID: 671 r = KVM_MAX_VCPU_IDS; 672 break; 673 #ifdef CONFIG_PPC_BOOK3S_64 674 case KVM_CAP_PPC_GET_SMMU_INFO: 675 r = 1; 676 break; 677 case KVM_CAP_SPAPR_MULTITCE: 678 r = 1; 679 break; 680 case KVM_CAP_SPAPR_RESIZE_HPT: 681 r = !!hv_enabled; 682 break; 683 #endif 684 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 685 case KVM_CAP_PPC_FWNMI: 686 r = hv_enabled; 687 break; 688 #endif 689 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 690 case KVM_CAP_PPC_HTM: 691 r = !!(cur_cpu_spec->cpu_user_features2 & PPC_FEATURE2_HTM) || 692 (hv_enabled && cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)); 693 break; 694 #endif 695 #if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE) 696 case KVM_CAP_PPC_SECURE_GUEST: 697 r = hv_enabled && kvmppc_hv_ops->enable_svm && 698 !kvmppc_hv_ops->enable_svm(NULL); 699 break; 700 case KVM_CAP_PPC_DAWR1: 701 r = !!(hv_enabled && kvmppc_hv_ops->enable_dawr1 && 702 !kvmppc_hv_ops->enable_dawr1(NULL)); 703 break; 704 case KVM_CAP_PPC_RPT_INVALIDATE: 705 r = 1; 706 break; 707 #endif 708 case KVM_CAP_PPC_AIL_MODE_3: 709 r = 0; 710 /* 711 * KVM PR, POWER7, and some POWER9s don't support AIL=3 mode. 712 * The POWER9s can support it if the guest runs in hash mode, 713 * but QEMU doesn't necessarily query the capability in time. 714 */ 715 if (hv_enabled) { 716 if (kvmhv_on_pseries()) { 717 if (pseries_reloc_on_exception()) 718 r = 1; 719 } else if (cpu_has_feature(CPU_FTR_ARCH_207S) && 720 !cpu_has_feature(CPU_FTR_P9_RADIX_PREFETCH_BUG)) { 721 r = 1; 722 } 723 } 724 break; 725 default: 726 r = 0; 727 break; 728 } 729 return r; 730 731 } 732 733 long kvm_arch_dev_ioctl(struct file *filp, 734 unsigned int ioctl, unsigned long arg) 735 { 736 return -EINVAL; 737 } 738 739 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot) 740 { 741 kvmppc_core_free_memslot(kvm, slot); 742 } 743 744 int kvm_arch_prepare_memory_region(struct kvm *kvm, 745 const struct kvm_memory_slot *old, 746 struct kvm_memory_slot *new, 747 enum kvm_mr_change change) 748 { 749 return kvmppc_core_prepare_memory_region(kvm, old, new, change); 750 } 751 752 void kvm_arch_commit_memory_region(struct kvm *kvm, 753 struct kvm_memory_slot *old, 754 const struct kvm_memory_slot *new, 755 enum kvm_mr_change change) 756 { 757 kvmppc_core_commit_memory_region(kvm, old, new, change); 758 } 759 760 void kvm_arch_flush_shadow_memslot(struct kvm *kvm, 761 struct kvm_memory_slot *slot) 762 { 763 kvmppc_core_flush_memslot(kvm, slot); 764 } 765 766 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id) 767 { 768 return 0; 769 } 770 771 static enum hrtimer_restart kvmppc_decrementer_wakeup(struct hrtimer *timer) 772 { 773 struct kvm_vcpu *vcpu; 774 775 vcpu = container_of(timer, struct kvm_vcpu, arch.dec_timer); 776 kvmppc_decrementer_func(vcpu); 777 778 return HRTIMER_NORESTART; 779 } 780 781 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu) 782 { 783 int err; 784 785 hrtimer_init(&vcpu->arch.dec_timer, CLOCK_REALTIME, HRTIMER_MODE_ABS); 786 vcpu->arch.dec_timer.function = kvmppc_decrementer_wakeup; 787 vcpu->arch.dec_expires = get_tb(); 788 789 #ifdef CONFIG_KVM_EXIT_TIMING 790 mutex_init(&vcpu->arch.exit_timing_lock); 791 #endif 792 err = kvmppc_subarch_vcpu_init(vcpu); 793 if (err) 794 return err; 795 796 err = kvmppc_core_vcpu_create(vcpu); 797 if (err) 798 goto out_vcpu_uninit; 799 800 rcuwait_init(&vcpu->arch.wait); 801 vcpu->arch.waitp = &vcpu->arch.wait; 802 return 0; 803 804 out_vcpu_uninit: 805 kvmppc_subarch_vcpu_uninit(vcpu); 806 return err; 807 } 808 809 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu) 810 { 811 } 812 813 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) 814 { 815 /* Make sure we're not using the vcpu anymore */ 816 hrtimer_cancel(&vcpu->arch.dec_timer); 817 818 switch (vcpu->arch.irq_type) { 819 case KVMPPC_IRQ_MPIC: 820 kvmppc_mpic_disconnect_vcpu(vcpu->arch.mpic, vcpu); 821 break; 822 case KVMPPC_IRQ_XICS: 823 if (xics_on_xive()) 824 kvmppc_xive_cleanup_vcpu(vcpu); 825 else 826 kvmppc_xics_free_icp(vcpu); 827 break; 828 case KVMPPC_IRQ_XIVE: 829 kvmppc_xive_native_cleanup_vcpu(vcpu); 830 break; 831 } 832 833 kvmppc_core_vcpu_free(vcpu); 834 835 kvmppc_subarch_vcpu_uninit(vcpu); 836 } 837 838 int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu) 839 { 840 return kvmppc_core_pending_dec(vcpu); 841 } 842 843 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 844 { 845 #ifdef CONFIG_BOOKE 846 /* 847 * vrsave (formerly usprg0) isn't used by Linux, but may 848 * be used by the guest. 849 * 850 * On non-booke this is associated with Altivec and 851 * is handled by code in book3s.c. 852 */ 853 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave); 854 #endif 855 kvmppc_core_vcpu_load(vcpu, cpu); 856 } 857 858 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) 859 { 860 kvmppc_core_vcpu_put(vcpu); 861 #ifdef CONFIG_BOOKE 862 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE); 863 #endif 864 } 865 866 /* 867 * irq_bypass_add_producer and irq_bypass_del_producer are only 868 * useful if the architecture supports PCI passthrough. 869 * irq_bypass_stop and irq_bypass_start are not needed and so 870 * kvm_ops are not defined for them. 871 */ 872 bool kvm_arch_has_irq_bypass(void) 873 { 874 return ((kvmppc_hv_ops && kvmppc_hv_ops->irq_bypass_add_producer) || 875 (kvmppc_pr_ops && kvmppc_pr_ops->irq_bypass_add_producer)); 876 } 877 878 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons, 879 struct irq_bypass_producer *prod) 880 { 881 struct kvm_kernel_irqfd *irqfd = 882 container_of(cons, struct kvm_kernel_irqfd, consumer); 883 struct kvm *kvm = irqfd->kvm; 884 885 if (kvm->arch.kvm_ops->irq_bypass_add_producer) 886 return kvm->arch.kvm_ops->irq_bypass_add_producer(cons, prod); 887 888 return 0; 889 } 890 891 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons, 892 struct irq_bypass_producer *prod) 893 { 894 struct kvm_kernel_irqfd *irqfd = 895 container_of(cons, struct kvm_kernel_irqfd, consumer); 896 struct kvm *kvm = irqfd->kvm; 897 898 if (kvm->arch.kvm_ops->irq_bypass_del_producer) 899 kvm->arch.kvm_ops->irq_bypass_del_producer(cons, prod); 900 } 901 902 #ifdef CONFIG_VSX 903 static inline int kvmppc_get_vsr_dword_offset(int index) 904 { 905 int offset; 906 907 if ((index != 0) && (index != 1)) 908 return -1; 909 910 #ifdef __BIG_ENDIAN 911 offset = index; 912 #else 913 offset = 1 - index; 914 #endif 915 916 return offset; 917 } 918 919 static inline int kvmppc_get_vsr_word_offset(int index) 920 { 921 int offset; 922 923 if ((index > 3) || (index < 0)) 924 return -1; 925 926 #ifdef __BIG_ENDIAN 927 offset = index; 928 #else 929 offset = 3 - index; 930 #endif 931 return offset; 932 } 933 934 static inline void kvmppc_set_vsr_dword(struct kvm_vcpu *vcpu, 935 u64 gpr) 936 { 937 union kvmppc_one_reg val; 938 int offset = kvmppc_get_vsr_dword_offset(vcpu->arch.mmio_vsx_offset); 939 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 940 941 if (offset == -1) 942 return; 943 944 if (index >= 32) { 945 val.vval = VCPU_VSX_VR(vcpu, index - 32); 946 val.vsxval[offset] = gpr; 947 VCPU_VSX_VR(vcpu, index - 32) = val.vval; 948 } else { 949 VCPU_VSX_FPR(vcpu, index, offset) = gpr; 950 } 951 } 952 953 static inline void kvmppc_set_vsr_dword_dump(struct kvm_vcpu *vcpu, 954 u64 gpr) 955 { 956 union kvmppc_one_reg val; 957 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 958 959 if (index >= 32) { 960 val.vval = VCPU_VSX_VR(vcpu, index - 32); 961 val.vsxval[0] = gpr; 962 val.vsxval[1] = gpr; 963 VCPU_VSX_VR(vcpu, index - 32) = val.vval; 964 } else { 965 VCPU_VSX_FPR(vcpu, index, 0) = gpr; 966 VCPU_VSX_FPR(vcpu, index, 1) = gpr; 967 } 968 } 969 970 static inline void kvmppc_set_vsr_word_dump(struct kvm_vcpu *vcpu, 971 u32 gpr) 972 { 973 union kvmppc_one_reg val; 974 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 975 976 if (index >= 32) { 977 val.vsx32val[0] = gpr; 978 val.vsx32val[1] = gpr; 979 val.vsx32val[2] = gpr; 980 val.vsx32val[3] = gpr; 981 VCPU_VSX_VR(vcpu, index - 32) = val.vval; 982 } else { 983 val.vsx32val[0] = gpr; 984 val.vsx32val[1] = gpr; 985 VCPU_VSX_FPR(vcpu, index, 0) = val.vsxval[0]; 986 VCPU_VSX_FPR(vcpu, index, 1) = val.vsxval[0]; 987 } 988 } 989 990 static inline void kvmppc_set_vsr_word(struct kvm_vcpu *vcpu, 991 u32 gpr32) 992 { 993 union kvmppc_one_reg val; 994 int offset = kvmppc_get_vsr_word_offset(vcpu->arch.mmio_vsx_offset); 995 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 996 int dword_offset, word_offset; 997 998 if (offset == -1) 999 return; 1000 1001 if (index >= 32) { 1002 val.vval = VCPU_VSX_VR(vcpu, index - 32); 1003 val.vsx32val[offset] = gpr32; 1004 VCPU_VSX_VR(vcpu, index - 32) = val.vval; 1005 } else { 1006 dword_offset = offset / 2; 1007 word_offset = offset % 2; 1008 val.vsxval[0] = VCPU_VSX_FPR(vcpu, index, dword_offset); 1009 val.vsx32val[word_offset] = gpr32; 1010 VCPU_VSX_FPR(vcpu, index, dword_offset) = val.vsxval[0]; 1011 } 1012 } 1013 #endif /* CONFIG_VSX */ 1014 1015 #ifdef CONFIG_ALTIVEC 1016 static inline int kvmppc_get_vmx_offset_generic(struct kvm_vcpu *vcpu, 1017 int index, int element_size) 1018 { 1019 int offset; 1020 int elts = sizeof(vector128)/element_size; 1021 1022 if ((index < 0) || (index >= elts)) 1023 return -1; 1024 1025 if (kvmppc_need_byteswap(vcpu)) 1026 offset = elts - index - 1; 1027 else 1028 offset = index; 1029 1030 return offset; 1031 } 1032 1033 static inline int kvmppc_get_vmx_dword_offset(struct kvm_vcpu *vcpu, 1034 int index) 1035 { 1036 return kvmppc_get_vmx_offset_generic(vcpu, index, 8); 1037 } 1038 1039 static inline int kvmppc_get_vmx_word_offset(struct kvm_vcpu *vcpu, 1040 int index) 1041 { 1042 return kvmppc_get_vmx_offset_generic(vcpu, index, 4); 1043 } 1044 1045 static inline int kvmppc_get_vmx_hword_offset(struct kvm_vcpu *vcpu, 1046 int index) 1047 { 1048 return kvmppc_get_vmx_offset_generic(vcpu, index, 2); 1049 } 1050 1051 static inline int kvmppc_get_vmx_byte_offset(struct kvm_vcpu *vcpu, 1052 int index) 1053 { 1054 return kvmppc_get_vmx_offset_generic(vcpu, index, 1); 1055 } 1056 1057 1058 static inline void kvmppc_set_vmx_dword(struct kvm_vcpu *vcpu, 1059 u64 gpr) 1060 { 1061 union kvmppc_one_reg val; 1062 int offset = kvmppc_get_vmx_dword_offset(vcpu, 1063 vcpu->arch.mmio_vmx_offset); 1064 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 1065 1066 if (offset == -1) 1067 return; 1068 1069 val.vval = VCPU_VSX_VR(vcpu, index); 1070 val.vsxval[offset] = gpr; 1071 VCPU_VSX_VR(vcpu, index) = val.vval; 1072 } 1073 1074 static inline void kvmppc_set_vmx_word(struct kvm_vcpu *vcpu, 1075 u32 gpr32) 1076 { 1077 union kvmppc_one_reg val; 1078 int offset = kvmppc_get_vmx_word_offset(vcpu, 1079 vcpu->arch.mmio_vmx_offset); 1080 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 1081 1082 if (offset == -1) 1083 return; 1084 1085 val.vval = VCPU_VSX_VR(vcpu, index); 1086 val.vsx32val[offset] = gpr32; 1087 VCPU_VSX_VR(vcpu, index) = val.vval; 1088 } 1089 1090 static inline void kvmppc_set_vmx_hword(struct kvm_vcpu *vcpu, 1091 u16 gpr16) 1092 { 1093 union kvmppc_one_reg val; 1094 int offset = kvmppc_get_vmx_hword_offset(vcpu, 1095 vcpu->arch.mmio_vmx_offset); 1096 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 1097 1098 if (offset == -1) 1099 return; 1100 1101 val.vval = VCPU_VSX_VR(vcpu, index); 1102 val.vsx16val[offset] = gpr16; 1103 VCPU_VSX_VR(vcpu, index) = val.vval; 1104 } 1105 1106 static inline void kvmppc_set_vmx_byte(struct kvm_vcpu *vcpu, 1107 u8 gpr8) 1108 { 1109 union kvmppc_one_reg val; 1110 int offset = kvmppc_get_vmx_byte_offset(vcpu, 1111 vcpu->arch.mmio_vmx_offset); 1112 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 1113 1114 if (offset == -1) 1115 return; 1116 1117 val.vval = VCPU_VSX_VR(vcpu, index); 1118 val.vsx8val[offset] = gpr8; 1119 VCPU_VSX_VR(vcpu, index) = val.vval; 1120 } 1121 #endif /* CONFIG_ALTIVEC */ 1122 1123 #ifdef CONFIG_PPC_FPU 1124 static inline u64 sp_to_dp(u32 fprs) 1125 { 1126 u64 fprd; 1127 1128 preempt_disable(); 1129 enable_kernel_fp(); 1130 asm ("lfs%U1%X1 0,%1; stfd%U0%X0 0,%0" : "=m<>" (fprd) : "m<>" (fprs) 1131 : "fr0"); 1132 preempt_enable(); 1133 return fprd; 1134 } 1135 1136 static inline u32 dp_to_sp(u64 fprd) 1137 { 1138 u32 fprs; 1139 1140 preempt_disable(); 1141 enable_kernel_fp(); 1142 asm ("lfd%U1%X1 0,%1; stfs%U0%X0 0,%0" : "=m<>" (fprs) : "m<>" (fprd) 1143 : "fr0"); 1144 preempt_enable(); 1145 return fprs; 1146 } 1147 1148 #else 1149 #define sp_to_dp(x) (x) 1150 #define dp_to_sp(x) (x) 1151 #endif /* CONFIG_PPC_FPU */ 1152 1153 static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu) 1154 { 1155 struct kvm_run *run = vcpu->run; 1156 u64 gpr; 1157 1158 if (run->mmio.len > sizeof(gpr)) 1159 return; 1160 1161 if (!vcpu->arch.mmio_host_swabbed) { 1162 switch (run->mmio.len) { 1163 case 8: gpr = *(u64 *)run->mmio.data; break; 1164 case 4: gpr = *(u32 *)run->mmio.data; break; 1165 case 2: gpr = *(u16 *)run->mmio.data; break; 1166 case 1: gpr = *(u8 *)run->mmio.data; break; 1167 } 1168 } else { 1169 switch (run->mmio.len) { 1170 case 8: gpr = swab64(*(u64 *)run->mmio.data); break; 1171 case 4: gpr = swab32(*(u32 *)run->mmio.data); break; 1172 case 2: gpr = swab16(*(u16 *)run->mmio.data); break; 1173 case 1: gpr = *(u8 *)run->mmio.data; break; 1174 } 1175 } 1176 1177 /* conversion between single and double precision */ 1178 if ((vcpu->arch.mmio_sp64_extend) && (run->mmio.len == 4)) 1179 gpr = sp_to_dp(gpr); 1180 1181 if (vcpu->arch.mmio_sign_extend) { 1182 switch (run->mmio.len) { 1183 #ifdef CONFIG_PPC64 1184 case 4: 1185 gpr = (s64)(s32)gpr; 1186 break; 1187 #endif 1188 case 2: 1189 gpr = (s64)(s16)gpr; 1190 break; 1191 case 1: 1192 gpr = (s64)(s8)gpr; 1193 break; 1194 } 1195 } 1196 1197 switch (vcpu->arch.io_gpr & KVM_MMIO_REG_EXT_MASK) { 1198 case KVM_MMIO_REG_GPR: 1199 kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr); 1200 break; 1201 case KVM_MMIO_REG_FPR: 1202 if (vcpu->kvm->arch.kvm_ops->giveup_ext) 1203 vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu, MSR_FP); 1204 1205 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr; 1206 break; 1207 #ifdef CONFIG_PPC_BOOK3S 1208 case KVM_MMIO_REG_QPR: 1209 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr; 1210 break; 1211 case KVM_MMIO_REG_FQPR: 1212 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr; 1213 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr; 1214 break; 1215 #endif 1216 #ifdef CONFIG_VSX 1217 case KVM_MMIO_REG_VSX: 1218 if (vcpu->kvm->arch.kvm_ops->giveup_ext) 1219 vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu, MSR_VSX); 1220 1221 if (vcpu->arch.mmio_copy_type == KVMPPC_VSX_COPY_DWORD) 1222 kvmppc_set_vsr_dword(vcpu, gpr); 1223 else if (vcpu->arch.mmio_copy_type == KVMPPC_VSX_COPY_WORD) 1224 kvmppc_set_vsr_word(vcpu, gpr); 1225 else if (vcpu->arch.mmio_copy_type == 1226 KVMPPC_VSX_COPY_DWORD_LOAD_DUMP) 1227 kvmppc_set_vsr_dword_dump(vcpu, gpr); 1228 else if (vcpu->arch.mmio_copy_type == 1229 KVMPPC_VSX_COPY_WORD_LOAD_DUMP) 1230 kvmppc_set_vsr_word_dump(vcpu, gpr); 1231 break; 1232 #endif 1233 #ifdef CONFIG_ALTIVEC 1234 case KVM_MMIO_REG_VMX: 1235 if (vcpu->kvm->arch.kvm_ops->giveup_ext) 1236 vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu, MSR_VEC); 1237 1238 if (vcpu->arch.mmio_copy_type == KVMPPC_VMX_COPY_DWORD) 1239 kvmppc_set_vmx_dword(vcpu, gpr); 1240 else if (vcpu->arch.mmio_copy_type == KVMPPC_VMX_COPY_WORD) 1241 kvmppc_set_vmx_word(vcpu, gpr); 1242 else if (vcpu->arch.mmio_copy_type == 1243 KVMPPC_VMX_COPY_HWORD) 1244 kvmppc_set_vmx_hword(vcpu, gpr); 1245 else if (vcpu->arch.mmio_copy_type == 1246 KVMPPC_VMX_COPY_BYTE) 1247 kvmppc_set_vmx_byte(vcpu, gpr); 1248 break; 1249 #endif 1250 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 1251 case KVM_MMIO_REG_NESTED_GPR: 1252 if (kvmppc_need_byteswap(vcpu)) 1253 gpr = swab64(gpr); 1254 kvm_vcpu_write_guest(vcpu, vcpu->arch.nested_io_gpr, &gpr, 1255 sizeof(gpr)); 1256 break; 1257 #endif 1258 default: 1259 BUG(); 1260 } 1261 } 1262 1263 static int __kvmppc_handle_load(struct kvm_vcpu *vcpu, 1264 unsigned int rt, unsigned int bytes, 1265 int is_default_endian, int sign_extend) 1266 { 1267 struct kvm_run *run = vcpu->run; 1268 int idx, ret; 1269 bool host_swabbed; 1270 1271 /* Pity C doesn't have a logical XOR operator */ 1272 if (kvmppc_need_byteswap(vcpu)) { 1273 host_swabbed = is_default_endian; 1274 } else { 1275 host_swabbed = !is_default_endian; 1276 } 1277 1278 if (bytes > sizeof(run->mmio.data)) 1279 return EMULATE_FAIL; 1280 1281 run->mmio.phys_addr = vcpu->arch.paddr_accessed; 1282 run->mmio.len = bytes; 1283 run->mmio.is_write = 0; 1284 1285 vcpu->arch.io_gpr = rt; 1286 vcpu->arch.mmio_host_swabbed = host_swabbed; 1287 vcpu->mmio_needed = 1; 1288 vcpu->mmio_is_write = 0; 1289 vcpu->arch.mmio_sign_extend = sign_extend; 1290 1291 idx = srcu_read_lock(&vcpu->kvm->srcu); 1292 1293 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr, 1294 bytes, &run->mmio.data); 1295 1296 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1297 1298 if (!ret) { 1299 kvmppc_complete_mmio_load(vcpu); 1300 vcpu->mmio_needed = 0; 1301 return EMULATE_DONE; 1302 } 1303 1304 return EMULATE_DO_MMIO; 1305 } 1306 1307 int kvmppc_handle_load(struct kvm_vcpu *vcpu, 1308 unsigned int rt, unsigned int bytes, 1309 int is_default_endian) 1310 { 1311 return __kvmppc_handle_load(vcpu, rt, bytes, is_default_endian, 0); 1312 } 1313 EXPORT_SYMBOL_GPL(kvmppc_handle_load); 1314 1315 /* Same as above, but sign extends */ 1316 int kvmppc_handle_loads(struct kvm_vcpu *vcpu, 1317 unsigned int rt, unsigned int bytes, 1318 int is_default_endian) 1319 { 1320 return __kvmppc_handle_load(vcpu, rt, bytes, is_default_endian, 1); 1321 } 1322 1323 #ifdef CONFIG_VSX 1324 int kvmppc_handle_vsx_load(struct kvm_vcpu *vcpu, 1325 unsigned int rt, unsigned int bytes, 1326 int is_default_endian, int mmio_sign_extend) 1327 { 1328 enum emulation_result emulated = EMULATE_DONE; 1329 1330 /* Currently, mmio_vsx_copy_nums only allowed to be 4 or less */ 1331 if (vcpu->arch.mmio_vsx_copy_nums > 4) 1332 return EMULATE_FAIL; 1333 1334 while (vcpu->arch.mmio_vsx_copy_nums) { 1335 emulated = __kvmppc_handle_load(vcpu, rt, bytes, 1336 is_default_endian, mmio_sign_extend); 1337 1338 if (emulated != EMULATE_DONE) 1339 break; 1340 1341 vcpu->arch.paddr_accessed += vcpu->run->mmio.len; 1342 1343 vcpu->arch.mmio_vsx_copy_nums--; 1344 vcpu->arch.mmio_vsx_offset++; 1345 } 1346 return emulated; 1347 } 1348 #endif /* CONFIG_VSX */ 1349 1350 int kvmppc_handle_store(struct kvm_vcpu *vcpu, 1351 u64 val, unsigned int bytes, int is_default_endian) 1352 { 1353 struct kvm_run *run = vcpu->run; 1354 void *data = run->mmio.data; 1355 int idx, ret; 1356 bool host_swabbed; 1357 1358 /* Pity C doesn't have a logical XOR operator */ 1359 if (kvmppc_need_byteswap(vcpu)) { 1360 host_swabbed = is_default_endian; 1361 } else { 1362 host_swabbed = !is_default_endian; 1363 } 1364 1365 if (bytes > sizeof(run->mmio.data)) 1366 return EMULATE_FAIL; 1367 1368 run->mmio.phys_addr = vcpu->arch.paddr_accessed; 1369 run->mmio.len = bytes; 1370 run->mmio.is_write = 1; 1371 vcpu->mmio_needed = 1; 1372 vcpu->mmio_is_write = 1; 1373 1374 if ((vcpu->arch.mmio_sp64_extend) && (bytes == 4)) 1375 val = dp_to_sp(val); 1376 1377 /* Store the value at the lowest bytes in 'data'. */ 1378 if (!host_swabbed) { 1379 switch (bytes) { 1380 case 8: *(u64 *)data = val; break; 1381 case 4: *(u32 *)data = val; break; 1382 case 2: *(u16 *)data = val; break; 1383 case 1: *(u8 *)data = val; break; 1384 } 1385 } else { 1386 switch (bytes) { 1387 case 8: *(u64 *)data = swab64(val); break; 1388 case 4: *(u32 *)data = swab32(val); break; 1389 case 2: *(u16 *)data = swab16(val); break; 1390 case 1: *(u8 *)data = val; break; 1391 } 1392 } 1393 1394 idx = srcu_read_lock(&vcpu->kvm->srcu); 1395 1396 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr, 1397 bytes, &run->mmio.data); 1398 1399 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1400 1401 if (!ret) { 1402 vcpu->mmio_needed = 0; 1403 return EMULATE_DONE; 1404 } 1405 1406 return EMULATE_DO_MMIO; 1407 } 1408 EXPORT_SYMBOL_GPL(kvmppc_handle_store); 1409 1410 #ifdef CONFIG_VSX 1411 static inline int kvmppc_get_vsr_data(struct kvm_vcpu *vcpu, int rs, u64 *val) 1412 { 1413 u32 dword_offset, word_offset; 1414 union kvmppc_one_reg reg; 1415 int vsx_offset = 0; 1416 int copy_type = vcpu->arch.mmio_copy_type; 1417 int result = 0; 1418 1419 switch (copy_type) { 1420 case KVMPPC_VSX_COPY_DWORD: 1421 vsx_offset = 1422 kvmppc_get_vsr_dword_offset(vcpu->arch.mmio_vsx_offset); 1423 1424 if (vsx_offset == -1) { 1425 result = -1; 1426 break; 1427 } 1428 1429 if (rs < 32) { 1430 *val = VCPU_VSX_FPR(vcpu, rs, vsx_offset); 1431 } else { 1432 reg.vval = VCPU_VSX_VR(vcpu, rs - 32); 1433 *val = reg.vsxval[vsx_offset]; 1434 } 1435 break; 1436 1437 case KVMPPC_VSX_COPY_WORD: 1438 vsx_offset = 1439 kvmppc_get_vsr_word_offset(vcpu->arch.mmio_vsx_offset); 1440 1441 if (vsx_offset == -1) { 1442 result = -1; 1443 break; 1444 } 1445 1446 if (rs < 32) { 1447 dword_offset = vsx_offset / 2; 1448 word_offset = vsx_offset % 2; 1449 reg.vsxval[0] = VCPU_VSX_FPR(vcpu, rs, dword_offset); 1450 *val = reg.vsx32val[word_offset]; 1451 } else { 1452 reg.vval = VCPU_VSX_VR(vcpu, rs - 32); 1453 *val = reg.vsx32val[vsx_offset]; 1454 } 1455 break; 1456 1457 default: 1458 result = -1; 1459 break; 1460 } 1461 1462 return result; 1463 } 1464 1465 int kvmppc_handle_vsx_store(struct kvm_vcpu *vcpu, 1466 int rs, unsigned int bytes, int is_default_endian) 1467 { 1468 u64 val; 1469 enum emulation_result emulated = EMULATE_DONE; 1470 1471 vcpu->arch.io_gpr = rs; 1472 1473 /* Currently, mmio_vsx_copy_nums only allowed to be 4 or less */ 1474 if (vcpu->arch.mmio_vsx_copy_nums > 4) 1475 return EMULATE_FAIL; 1476 1477 while (vcpu->arch.mmio_vsx_copy_nums) { 1478 if (kvmppc_get_vsr_data(vcpu, rs, &val) == -1) 1479 return EMULATE_FAIL; 1480 1481 emulated = kvmppc_handle_store(vcpu, 1482 val, bytes, is_default_endian); 1483 1484 if (emulated != EMULATE_DONE) 1485 break; 1486 1487 vcpu->arch.paddr_accessed += vcpu->run->mmio.len; 1488 1489 vcpu->arch.mmio_vsx_copy_nums--; 1490 vcpu->arch.mmio_vsx_offset++; 1491 } 1492 1493 return emulated; 1494 } 1495 1496 static int kvmppc_emulate_mmio_vsx_loadstore(struct kvm_vcpu *vcpu) 1497 { 1498 struct kvm_run *run = vcpu->run; 1499 enum emulation_result emulated = EMULATE_FAIL; 1500 int r; 1501 1502 vcpu->arch.paddr_accessed += run->mmio.len; 1503 1504 if (!vcpu->mmio_is_write) { 1505 emulated = kvmppc_handle_vsx_load(vcpu, vcpu->arch.io_gpr, 1506 run->mmio.len, 1, vcpu->arch.mmio_sign_extend); 1507 } else { 1508 emulated = kvmppc_handle_vsx_store(vcpu, 1509 vcpu->arch.io_gpr, run->mmio.len, 1); 1510 } 1511 1512 switch (emulated) { 1513 case EMULATE_DO_MMIO: 1514 run->exit_reason = KVM_EXIT_MMIO; 1515 r = RESUME_HOST; 1516 break; 1517 case EMULATE_FAIL: 1518 pr_info("KVM: MMIO emulation failed (VSX repeat)\n"); 1519 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1520 run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION; 1521 r = RESUME_HOST; 1522 break; 1523 default: 1524 r = RESUME_GUEST; 1525 break; 1526 } 1527 return r; 1528 } 1529 #endif /* CONFIG_VSX */ 1530 1531 #ifdef CONFIG_ALTIVEC 1532 int kvmppc_handle_vmx_load(struct kvm_vcpu *vcpu, 1533 unsigned int rt, unsigned int bytes, int is_default_endian) 1534 { 1535 enum emulation_result emulated = EMULATE_DONE; 1536 1537 if (vcpu->arch.mmio_vmx_copy_nums > 2) 1538 return EMULATE_FAIL; 1539 1540 while (vcpu->arch.mmio_vmx_copy_nums) { 1541 emulated = __kvmppc_handle_load(vcpu, rt, bytes, 1542 is_default_endian, 0); 1543 1544 if (emulated != EMULATE_DONE) 1545 break; 1546 1547 vcpu->arch.paddr_accessed += vcpu->run->mmio.len; 1548 vcpu->arch.mmio_vmx_copy_nums--; 1549 vcpu->arch.mmio_vmx_offset++; 1550 } 1551 1552 return emulated; 1553 } 1554 1555 static int kvmppc_get_vmx_dword(struct kvm_vcpu *vcpu, int index, u64 *val) 1556 { 1557 union kvmppc_one_reg reg; 1558 int vmx_offset = 0; 1559 int result = 0; 1560 1561 vmx_offset = 1562 kvmppc_get_vmx_dword_offset(vcpu, vcpu->arch.mmio_vmx_offset); 1563 1564 if (vmx_offset == -1) 1565 return -1; 1566 1567 reg.vval = VCPU_VSX_VR(vcpu, index); 1568 *val = reg.vsxval[vmx_offset]; 1569 1570 return result; 1571 } 1572 1573 static int kvmppc_get_vmx_word(struct kvm_vcpu *vcpu, int index, u64 *val) 1574 { 1575 union kvmppc_one_reg reg; 1576 int vmx_offset = 0; 1577 int result = 0; 1578 1579 vmx_offset = 1580 kvmppc_get_vmx_word_offset(vcpu, vcpu->arch.mmio_vmx_offset); 1581 1582 if (vmx_offset == -1) 1583 return -1; 1584 1585 reg.vval = VCPU_VSX_VR(vcpu, index); 1586 *val = reg.vsx32val[vmx_offset]; 1587 1588 return result; 1589 } 1590 1591 static int kvmppc_get_vmx_hword(struct kvm_vcpu *vcpu, int index, u64 *val) 1592 { 1593 union kvmppc_one_reg reg; 1594 int vmx_offset = 0; 1595 int result = 0; 1596 1597 vmx_offset = 1598 kvmppc_get_vmx_hword_offset(vcpu, vcpu->arch.mmio_vmx_offset); 1599 1600 if (vmx_offset == -1) 1601 return -1; 1602 1603 reg.vval = VCPU_VSX_VR(vcpu, index); 1604 *val = reg.vsx16val[vmx_offset]; 1605 1606 return result; 1607 } 1608 1609 static int kvmppc_get_vmx_byte(struct kvm_vcpu *vcpu, int index, u64 *val) 1610 { 1611 union kvmppc_one_reg reg; 1612 int vmx_offset = 0; 1613 int result = 0; 1614 1615 vmx_offset = 1616 kvmppc_get_vmx_byte_offset(vcpu, vcpu->arch.mmio_vmx_offset); 1617 1618 if (vmx_offset == -1) 1619 return -1; 1620 1621 reg.vval = VCPU_VSX_VR(vcpu, index); 1622 *val = reg.vsx8val[vmx_offset]; 1623 1624 return result; 1625 } 1626 1627 int kvmppc_handle_vmx_store(struct kvm_vcpu *vcpu, 1628 unsigned int rs, unsigned int bytes, int is_default_endian) 1629 { 1630 u64 val = 0; 1631 unsigned int index = rs & KVM_MMIO_REG_MASK; 1632 enum emulation_result emulated = EMULATE_DONE; 1633 1634 if (vcpu->arch.mmio_vmx_copy_nums > 2) 1635 return EMULATE_FAIL; 1636 1637 vcpu->arch.io_gpr = rs; 1638 1639 while (vcpu->arch.mmio_vmx_copy_nums) { 1640 switch (vcpu->arch.mmio_copy_type) { 1641 case KVMPPC_VMX_COPY_DWORD: 1642 if (kvmppc_get_vmx_dword(vcpu, index, &val) == -1) 1643 return EMULATE_FAIL; 1644 1645 break; 1646 case KVMPPC_VMX_COPY_WORD: 1647 if (kvmppc_get_vmx_word(vcpu, index, &val) == -1) 1648 return EMULATE_FAIL; 1649 break; 1650 case KVMPPC_VMX_COPY_HWORD: 1651 if (kvmppc_get_vmx_hword(vcpu, index, &val) == -1) 1652 return EMULATE_FAIL; 1653 break; 1654 case KVMPPC_VMX_COPY_BYTE: 1655 if (kvmppc_get_vmx_byte(vcpu, index, &val) == -1) 1656 return EMULATE_FAIL; 1657 break; 1658 default: 1659 return EMULATE_FAIL; 1660 } 1661 1662 emulated = kvmppc_handle_store(vcpu, val, bytes, 1663 is_default_endian); 1664 if (emulated != EMULATE_DONE) 1665 break; 1666 1667 vcpu->arch.paddr_accessed += vcpu->run->mmio.len; 1668 vcpu->arch.mmio_vmx_copy_nums--; 1669 vcpu->arch.mmio_vmx_offset++; 1670 } 1671 1672 return emulated; 1673 } 1674 1675 static int kvmppc_emulate_mmio_vmx_loadstore(struct kvm_vcpu *vcpu) 1676 { 1677 struct kvm_run *run = vcpu->run; 1678 enum emulation_result emulated = EMULATE_FAIL; 1679 int r; 1680 1681 vcpu->arch.paddr_accessed += run->mmio.len; 1682 1683 if (!vcpu->mmio_is_write) { 1684 emulated = kvmppc_handle_vmx_load(vcpu, 1685 vcpu->arch.io_gpr, run->mmio.len, 1); 1686 } else { 1687 emulated = kvmppc_handle_vmx_store(vcpu, 1688 vcpu->arch.io_gpr, run->mmio.len, 1); 1689 } 1690 1691 switch (emulated) { 1692 case EMULATE_DO_MMIO: 1693 run->exit_reason = KVM_EXIT_MMIO; 1694 r = RESUME_HOST; 1695 break; 1696 case EMULATE_FAIL: 1697 pr_info("KVM: MMIO emulation failed (VMX repeat)\n"); 1698 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1699 run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION; 1700 r = RESUME_HOST; 1701 break; 1702 default: 1703 r = RESUME_GUEST; 1704 break; 1705 } 1706 return r; 1707 } 1708 #endif /* CONFIG_ALTIVEC */ 1709 1710 int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 1711 { 1712 int r = 0; 1713 union kvmppc_one_reg val; 1714 int size; 1715 1716 size = one_reg_size(reg->id); 1717 if (size > sizeof(val)) 1718 return -EINVAL; 1719 1720 r = kvmppc_get_one_reg(vcpu, reg->id, &val); 1721 if (r == -EINVAL) { 1722 r = 0; 1723 switch (reg->id) { 1724 #ifdef CONFIG_ALTIVEC 1725 case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31: 1726 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { 1727 r = -ENXIO; 1728 break; 1729 } 1730 val.vval = vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0]; 1731 break; 1732 case KVM_REG_PPC_VSCR: 1733 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { 1734 r = -ENXIO; 1735 break; 1736 } 1737 val = get_reg_val(reg->id, vcpu->arch.vr.vscr.u[3]); 1738 break; 1739 case KVM_REG_PPC_VRSAVE: 1740 val = get_reg_val(reg->id, vcpu->arch.vrsave); 1741 break; 1742 #endif /* CONFIG_ALTIVEC */ 1743 default: 1744 r = -EINVAL; 1745 break; 1746 } 1747 } 1748 1749 if (r) 1750 return r; 1751 1752 if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size)) 1753 r = -EFAULT; 1754 1755 return r; 1756 } 1757 1758 int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 1759 { 1760 int r; 1761 union kvmppc_one_reg val; 1762 int size; 1763 1764 size = one_reg_size(reg->id); 1765 if (size > sizeof(val)) 1766 return -EINVAL; 1767 1768 if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size)) 1769 return -EFAULT; 1770 1771 r = kvmppc_set_one_reg(vcpu, reg->id, &val); 1772 if (r == -EINVAL) { 1773 r = 0; 1774 switch (reg->id) { 1775 #ifdef CONFIG_ALTIVEC 1776 case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31: 1777 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { 1778 r = -ENXIO; 1779 break; 1780 } 1781 vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0] = val.vval; 1782 break; 1783 case KVM_REG_PPC_VSCR: 1784 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { 1785 r = -ENXIO; 1786 break; 1787 } 1788 vcpu->arch.vr.vscr.u[3] = set_reg_val(reg->id, val); 1789 break; 1790 case KVM_REG_PPC_VRSAVE: 1791 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { 1792 r = -ENXIO; 1793 break; 1794 } 1795 vcpu->arch.vrsave = set_reg_val(reg->id, val); 1796 break; 1797 #endif /* CONFIG_ALTIVEC */ 1798 default: 1799 r = -EINVAL; 1800 break; 1801 } 1802 } 1803 1804 return r; 1805 } 1806 1807 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) 1808 { 1809 struct kvm_run *run = vcpu->run; 1810 int r; 1811 1812 vcpu_load(vcpu); 1813 1814 if (vcpu->mmio_needed) { 1815 vcpu->mmio_needed = 0; 1816 if (!vcpu->mmio_is_write) 1817 kvmppc_complete_mmio_load(vcpu); 1818 #ifdef CONFIG_VSX 1819 if (vcpu->arch.mmio_vsx_copy_nums > 0) { 1820 vcpu->arch.mmio_vsx_copy_nums--; 1821 vcpu->arch.mmio_vsx_offset++; 1822 } 1823 1824 if (vcpu->arch.mmio_vsx_copy_nums > 0) { 1825 r = kvmppc_emulate_mmio_vsx_loadstore(vcpu); 1826 if (r == RESUME_HOST) { 1827 vcpu->mmio_needed = 1; 1828 goto out; 1829 } 1830 } 1831 #endif 1832 #ifdef CONFIG_ALTIVEC 1833 if (vcpu->arch.mmio_vmx_copy_nums > 0) { 1834 vcpu->arch.mmio_vmx_copy_nums--; 1835 vcpu->arch.mmio_vmx_offset++; 1836 } 1837 1838 if (vcpu->arch.mmio_vmx_copy_nums > 0) { 1839 r = kvmppc_emulate_mmio_vmx_loadstore(vcpu); 1840 if (r == RESUME_HOST) { 1841 vcpu->mmio_needed = 1; 1842 goto out; 1843 } 1844 } 1845 #endif 1846 } else if (vcpu->arch.osi_needed) { 1847 u64 *gprs = run->osi.gprs; 1848 int i; 1849 1850 for (i = 0; i < 32; i++) 1851 kvmppc_set_gpr(vcpu, i, gprs[i]); 1852 vcpu->arch.osi_needed = 0; 1853 } else if (vcpu->arch.hcall_needed) { 1854 int i; 1855 1856 kvmppc_set_gpr(vcpu, 3, run->papr_hcall.ret); 1857 for (i = 0; i < 9; ++i) 1858 kvmppc_set_gpr(vcpu, 4 + i, run->papr_hcall.args[i]); 1859 vcpu->arch.hcall_needed = 0; 1860 #ifdef CONFIG_BOOKE 1861 } else if (vcpu->arch.epr_needed) { 1862 kvmppc_set_epr(vcpu, run->epr.epr); 1863 vcpu->arch.epr_needed = 0; 1864 #endif 1865 } 1866 1867 kvm_sigset_activate(vcpu); 1868 1869 if (run->immediate_exit) 1870 r = -EINTR; 1871 else 1872 r = kvmppc_vcpu_run(vcpu); 1873 1874 kvm_sigset_deactivate(vcpu); 1875 1876 #ifdef CONFIG_ALTIVEC 1877 out: 1878 #endif 1879 1880 /* 1881 * We're already returning to userspace, don't pass the 1882 * RESUME_HOST flags along. 1883 */ 1884 if (r > 0) 1885 r = 0; 1886 1887 vcpu_put(vcpu); 1888 return r; 1889 } 1890 1891 int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq) 1892 { 1893 if (irq->irq == KVM_INTERRUPT_UNSET) { 1894 kvmppc_core_dequeue_external(vcpu); 1895 return 0; 1896 } 1897 1898 kvmppc_core_queue_external(vcpu, irq); 1899 1900 kvm_vcpu_kick(vcpu); 1901 1902 return 0; 1903 } 1904 1905 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu, 1906 struct kvm_enable_cap *cap) 1907 { 1908 int r; 1909 1910 if (cap->flags) 1911 return -EINVAL; 1912 1913 switch (cap->cap) { 1914 case KVM_CAP_PPC_OSI: 1915 r = 0; 1916 vcpu->arch.osi_enabled = true; 1917 break; 1918 case KVM_CAP_PPC_PAPR: 1919 r = 0; 1920 vcpu->arch.papr_enabled = true; 1921 break; 1922 case KVM_CAP_PPC_EPR: 1923 r = 0; 1924 if (cap->args[0]) 1925 vcpu->arch.epr_flags |= KVMPPC_EPR_USER; 1926 else 1927 vcpu->arch.epr_flags &= ~KVMPPC_EPR_USER; 1928 break; 1929 #ifdef CONFIG_BOOKE 1930 case KVM_CAP_PPC_BOOKE_WATCHDOG: 1931 r = 0; 1932 vcpu->arch.watchdog_enabled = true; 1933 break; 1934 #endif 1935 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 1936 case KVM_CAP_SW_TLB: { 1937 struct kvm_config_tlb cfg; 1938 void __user *user_ptr = (void __user *)(uintptr_t)cap->args[0]; 1939 1940 r = -EFAULT; 1941 if (copy_from_user(&cfg, user_ptr, sizeof(cfg))) 1942 break; 1943 1944 r = kvm_vcpu_ioctl_config_tlb(vcpu, &cfg); 1945 break; 1946 } 1947 #endif 1948 #ifdef CONFIG_KVM_MPIC 1949 case KVM_CAP_IRQ_MPIC: { 1950 struct fd f; 1951 struct kvm_device *dev; 1952 1953 r = -EBADF; 1954 f = fdget(cap->args[0]); 1955 if (!f.file) 1956 break; 1957 1958 r = -EPERM; 1959 dev = kvm_device_from_filp(f.file); 1960 if (dev) 1961 r = kvmppc_mpic_connect_vcpu(dev, vcpu, cap->args[1]); 1962 1963 fdput(f); 1964 break; 1965 } 1966 #endif 1967 #ifdef CONFIG_KVM_XICS 1968 case KVM_CAP_IRQ_XICS: { 1969 struct fd f; 1970 struct kvm_device *dev; 1971 1972 r = -EBADF; 1973 f = fdget(cap->args[0]); 1974 if (!f.file) 1975 break; 1976 1977 r = -EPERM; 1978 dev = kvm_device_from_filp(f.file); 1979 if (dev) { 1980 if (xics_on_xive()) 1981 r = kvmppc_xive_connect_vcpu(dev, vcpu, cap->args[1]); 1982 else 1983 r = kvmppc_xics_connect_vcpu(dev, vcpu, cap->args[1]); 1984 } 1985 1986 fdput(f); 1987 break; 1988 } 1989 #endif /* CONFIG_KVM_XICS */ 1990 #ifdef CONFIG_KVM_XIVE 1991 case KVM_CAP_PPC_IRQ_XIVE: { 1992 struct fd f; 1993 struct kvm_device *dev; 1994 1995 r = -EBADF; 1996 f = fdget(cap->args[0]); 1997 if (!f.file) 1998 break; 1999 2000 r = -ENXIO; 2001 if (!xive_enabled()) 2002 break; 2003 2004 r = -EPERM; 2005 dev = kvm_device_from_filp(f.file); 2006 if (dev) 2007 r = kvmppc_xive_native_connect_vcpu(dev, vcpu, 2008 cap->args[1]); 2009 2010 fdput(f); 2011 break; 2012 } 2013 #endif /* CONFIG_KVM_XIVE */ 2014 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 2015 case KVM_CAP_PPC_FWNMI: 2016 r = -EINVAL; 2017 if (!is_kvmppc_hv_enabled(vcpu->kvm)) 2018 break; 2019 r = 0; 2020 vcpu->kvm->arch.fwnmi_enabled = true; 2021 break; 2022 #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ 2023 default: 2024 r = -EINVAL; 2025 break; 2026 } 2027 2028 if (!r) 2029 r = kvmppc_sanity_check(vcpu); 2030 2031 return r; 2032 } 2033 2034 bool kvm_arch_intc_initialized(struct kvm *kvm) 2035 { 2036 #ifdef CONFIG_KVM_MPIC 2037 if (kvm->arch.mpic) 2038 return true; 2039 #endif 2040 #ifdef CONFIG_KVM_XICS 2041 if (kvm->arch.xics || kvm->arch.xive) 2042 return true; 2043 #endif 2044 return false; 2045 } 2046 2047 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu, 2048 struct kvm_mp_state *mp_state) 2049 { 2050 return -EINVAL; 2051 } 2052 2053 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu, 2054 struct kvm_mp_state *mp_state) 2055 { 2056 return -EINVAL; 2057 } 2058 2059 long kvm_arch_vcpu_async_ioctl(struct file *filp, 2060 unsigned int ioctl, unsigned long arg) 2061 { 2062 struct kvm_vcpu *vcpu = filp->private_data; 2063 void __user *argp = (void __user *)arg; 2064 2065 if (ioctl == KVM_INTERRUPT) { 2066 struct kvm_interrupt irq; 2067 if (copy_from_user(&irq, argp, sizeof(irq))) 2068 return -EFAULT; 2069 return kvm_vcpu_ioctl_interrupt(vcpu, &irq); 2070 } 2071 return -ENOIOCTLCMD; 2072 } 2073 2074 long kvm_arch_vcpu_ioctl(struct file *filp, 2075 unsigned int ioctl, unsigned long arg) 2076 { 2077 struct kvm_vcpu *vcpu = filp->private_data; 2078 void __user *argp = (void __user *)arg; 2079 long r; 2080 2081 switch (ioctl) { 2082 case KVM_ENABLE_CAP: 2083 { 2084 struct kvm_enable_cap cap; 2085 r = -EFAULT; 2086 if (copy_from_user(&cap, argp, sizeof(cap))) 2087 goto out; 2088 vcpu_load(vcpu); 2089 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap); 2090 vcpu_put(vcpu); 2091 break; 2092 } 2093 2094 case KVM_SET_ONE_REG: 2095 case KVM_GET_ONE_REG: 2096 { 2097 struct kvm_one_reg reg; 2098 r = -EFAULT; 2099 if (copy_from_user(®, argp, sizeof(reg))) 2100 goto out; 2101 if (ioctl == KVM_SET_ONE_REG) 2102 r = kvm_vcpu_ioctl_set_one_reg(vcpu, ®); 2103 else 2104 r = kvm_vcpu_ioctl_get_one_reg(vcpu, ®); 2105 break; 2106 } 2107 2108 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 2109 case KVM_DIRTY_TLB: { 2110 struct kvm_dirty_tlb dirty; 2111 r = -EFAULT; 2112 if (copy_from_user(&dirty, argp, sizeof(dirty))) 2113 goto out; 2114 vcpu_load(vcpu); 2115 r = kvm_vcpu_ioctl_dirty_tlb(vcpu, &dirty); 2116 vcpu_put(vcpu); 2117 break; 2118 } 2119 #endif 2120 default: 2121 r = -EINVAL; 2122 } 2123 2124 out: 2125 return r; 2126 } 2127 2128 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf) 2129 { 2130 return VM_FAULT_SIGBUS; 2131 } 2132 2133 static int kvm_vm_ioctl_get_pvinfo(struct kvm_ppc_pvinfo *pvinfo) 2134 { 2135 u32 inst_nop = 0x60000000; 2136 #ifdef CONFIG_KVM_BOOKE_HV 2137 u32 inst_sc1 = 0x44000022; 2138 pvinfo->hcall[0] = cpu_to_be32(inst_sc1); 2139 pvinfo->hcall[1] = cpu_to_be32(inst_nop); 2140 pvinfo->hcall[2] = cpu_to_be32(inst_nop); 2141 pvinfo->hcall[3] = cpu_to_be32(inst_nop); 2142 #else 2143 u32 inst_lis = 0x3c000000; 2144 u32 inst_ori = 0x60000000; 2145 u32 inst_sc = 0x44000002; 2146 u32 inst_imm_mask = 0xffff; 2147 2148 /* 2149 * The hypercall to get into KVM from within guest context is as 2150 * follows: 2151 * 2152 * lis r0, r0, KVM_SC_MAGIC_R0@h 2153 * ori r0, KVM_SC_MAGIC_R0@l 2154 * sc 2155 * nop 2156 */ 2157 pvinfo->hcall[0] = cpu_to_be32(inst_lis | ((KVM_SC_MAGIC_R0 >> 16) & inst_imm_mask)); 2158 pvinfo->hcall[1] = cpu_to_be32(inst_ori | (KVM_SC_MAGIC_R0 & inst_imm_mask)); 2159 pvinfo->hcall[2] = cpu_to_be32(inst_sc); 2160 pvinfo->hcall[3] = cpu_to_be32(inst_nop); 2161 #endif 2162 2163 pvinfo->flags = KVM_PPC_PVINFO_FLAGS_EV_IDLE; 2164 2165 return 0; 2166 } 2167 2168 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event, 2169 bool line_status) 2170 { 2171 if (!irqchip_in_kernel(kvm)) 2172 return -ENXIO; 2173 2174 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID, 2175 irq_event->irq, irq_event->level, 2176 line_status); 2177 return 0; 2178 } 2179 2180 2181 int kvm_vm_ioctl_enable_cap(struct kvm *kvm, 2182 struct kvm_enable_cap *cap) 2183 { 2184 int r; 2185 2186 if (cap->flags) 2187 return -EINVAL; 2188 2189 switch (cap->cap) { 2190 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 2191 case KVM_CAP_PPC_ENABLE_HCALL: { 2192 unsigned long hcall = cap->args[0]; 2193 2194 r = -EINVAL; 2195 if (hcall > MAX_HCALL_OPCODE || (hcall & 3) || 2196 cap->args[1] > 1) 2197 break; 2198 if (!kvmppc_book3s_hcall_implemented(kvm, hcall)) 2199 break; 2200 if (cap->args[1]) 2201 set_bit(hcall / 4, kvm->arch.enabled_hcalls); 2202 else 2203 clear_bit(hcall / 4, kvm->arch.enabled_hcalls); 2204 r = 0; 2205 break; 2206 } 2207 case KVM_CAP_PPC_SMT: { 2208 unsigned long mode = cap->args[0]; 2209 unsigned long flags = cap->args[1]; 2210 2211 r = -EINVAL; 2212 if (kvm->arch.kvm_ops->set_smt_mode) 2213 r = kvm->arch.kvm_ops->set_smt_mode(kvm, mode, flags); 2214 break; 2215 } 2216 2217 case KVM_CAP_PPC_NESTED_HV: 2218 r = -EINVAL; 2219 if (!is_kvmppc_hv_enabled(kvm) || 2220 !kvm->arch.kvm_ops->enable_nested) 2221 break; 2222 r = kvm->arch.kvm_ops->enable_nested(kvm); 2223 break; 2224 #endif 2225 #if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE) 2226 case KVM_CAP_PPC_SECURE_GUEST: 2227 r = -EINVAL; 2228 if (!is_kvmppc_hv_enabled(kvm) || !kvm->arch.kvm_ops->enable_svm) 2229 break; 2230 r = kvm->arch.kvm_ops->enable_svm(kvm); 2231 break; 2232 case KVM_CAP_PPC_DAWR1: 2233 r = -EINVAL; 2234 if (!is_kvmppc_hv_enabled(kvm) || !kvm->arch.kvm_ops->enable_dawr1) 2235 break; 2236 r = kvm->arch.kvm_ops->enable_dawr1(kvm); 2237 break; 2238 #endif 2239 default: 2240 r = -EINVAL; 2241 break; 2242 } 2243 2244 return r; 2245 } 2246 2247 #ifdef CONFIG_PPC_BOOK3S_64 2248 /* 2249 * These functions check whether the underlying hardware is safe 2250 * against attacks based on observing the effects of speculatively 2251 * executed instructions, and whether it supplies instructions for 2252 * use in workarounds. The information comes from firmware, either 2253 * via the device tree on powernv platforms or from an hcall on 2254 * pseries platforms. 2255 */ 2256 #ifdef CONFIG_PPC_PSERIES 2257 static int pseries_get_cpu_char(struct kvm_ppc_cpu_char *cp) 2258 { 2259 struct h_cpu_char_result c; 2260 unsigned long rc; 2261 2262 if (!machine_is(pseries)) 2263 return -ENOTTY; 2264 2265 rc = plpar_get_cpu_characteristics(&c); 2266 if (rc == H_SUCCESS) { 2267 cp->character = c.character; 2268 cp->behaviour = c.behaviour; 2269 cp->character_mask = KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31 | 2270 KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED | 2271 KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30 | 2272 KVM_PPC_CPU_CHAR_L1D_FLUSH_TRIG2 | 2273 KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV | 2274 KVM_PPC_CPU_CHAR_BR_HINT_HONOURED | 2275 KVM_PPC_CPU_CHAR_MTTRIG_THR_RECONF | 2276 KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS | 2277 KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST; 2278 cp->behaviour_mask = KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY | 2279 KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR | 2280 KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR | 2281 KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE; 2282 } 2283 return 0; 2284 } 2285 #else 2286 static int pseries_get_cpu_char(struct kvm_ppc_cpu_char *cp) 2287 { 2288 return -ENOTTY; 2289 } 2290 #endif 2291 2292 static inline bool have_fw_feat(struct device_node *fw_features, 2293 const char *state, const char *name) 2294 { 2295 struct device_node *np; 2296 bool r = false; 2297 2298 np = of_get_child_by_name(fw_features, name); 2299 if (np) { 2300 r = of_property_read_bool(np, state); 2301 of_node_put(np); 2302 } 2303 return r; 2304 } 2305 2306 static int kvmppc_get_cpu_char(struct kvm_ppc_cpu_char *cp) 2307 { 2308 struct device_node *np, *fw_features; 2309 int r; 2310 2311 memset(cp, 0, sizeof(*cp)); 2312 r = pseries_get_cpu_char(cp); 2313 if (r != -ENOTTY) 2314 return r; 2315 2316 np = of_find_node_by_name(NULL, "ibm,opal"); 2317 if (np) { 2318 fw_features = of_get_child_by_name(np, "fw-features"); 2319 of_node_put(np); 2320 if (!fw_features) 2321 return 0; 2322 if (have_fw_feat(fw_features, "enabled", 2323 "inst-spec-barrier-ori31,31,0")) 2324 cp->character |= KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31; 2325 if (have_fw_feat(fw_features, "enabled", 2326 "fw-bcctrl-serialized")) 2327 cp->character |= KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED; 2328 if (have_fw_feat(fw_features, "enabled", 2329 "inst-l1d-flush-ori30,30,0")) 2330 cp->character |= KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30; 2331 if (have_fw_feat(fw_features, "enabled", 2332 "inst-l1d-flush-trig2")) 2333 cp->character |= KVM_PPC_CPU_CHAR_L1D_FLUSH_TRIG2; 2334 if (have_fw_feat(fw_features, "enabled", 2335 "fw-l1d-thread-split")) 2336 cp->character |= KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV; 2337 if (have_fw_feat(fw_features, "enabled", 2338 "fw-count-cache-disabled")) 2339 cp->character |= KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS; 2340 if (have_fw_feat(fw_features, "enabled", 2341 "fw-count-cache-flush-bcctr2,0,0")) 2342 cp->character |= KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST; 2343 cp->character_mask = KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31 | 2344 KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED | 2345 KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30 | 2346 KVM_PPC_CPU_CHAR_L1D_FLUSH_TRIG2 | 2347 KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV | 2348 KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS | 2349 KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST; 2350 2351 if (have_fw_feat(fw_features, "enabled", 2352 "speculation-policy-favor-security")) 2353 cp->behaviour |= KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY; 2354 if (!have_fw_feat(fw_features, "disabled", 2355 "needs-l1d-flush-msr-pr-0-to-1")) 2356 cp->behaviour |= KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR; 2357 if (!have_fw_feat(fw_features, "disabled", 2358 "needs-spec-barrier-for-bound-checks")) 2359 cp->behaviour |= KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR; 2360 if (have_fw_feat(fw_features, "enabled", 2361 "needs-count-cache-flush-on-context-switch")) 2362 cp->behaviour |= KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE; 2363 cp->behaviour_mask = KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY | 2364 KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR | 2365 KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR | 2366 KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE; 2367 2368 of_node_put(fw_features); 2369 } 2370 2371 return 0; 2372 } 2373 #endif 2374 2375 long kvm_arch_vm_ioctl(struct file *filp, 2376 unsigned int ioctl, unsigned long arg) 2377 { 2378 struct kvm *kvm __maybe_unused = filp->private_data; 2379 void __user *argp = (void __user *)arg; 2380 long r; 2381 2382 switch (ioctl) { 2383 case KVM_PPC_GET_PVINFO: { 2384 struct kvm_ppc_pvinfo pvinfo; 2385 memset(&pvinfo, 0, sizeof(pvinfo)); 2386 r = kvm_vm_ioctl_get_pvinfo(&pvinfo); 2387 if (copy_to_user(argp, &pvinfo, sizeof(pvinfo))) { 2388 r = -EFAULT; 2389 goto out; 2390 } 2391 2392 break; 2393 } 2394 #ifdef CONFIG_SPAPR_TCE_IOMMU 2395 case KVM_CREATE_SPAPR_TCE_64: { 2396 struct kvm_create_spapr_tce_64 create_tce_64; 2397 2398 r = -EFAULT; 2399 if (copy_from_user(&create_tce_64, argp, sizeof(create_tce_64))) 2400 goto out; 2401 if (create_tce_64.flags) { 2402 r = -EINVAL; 2403 goto out; 2404 } 2405 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64); 2406 goto out; 2407 } 2408 case KVM_CREATE_SPAPR_TCE: { 2409 struct kvm_create_spapr_tce create_tce; 2410 struct kvm_create_spapr_tce_64 create_tce_64; 2411 2412 r = -EFAULT; 2413 if (copy_from_user(&create_tce, argp, sizeof(create_tce))) 2414 goto out; 2415 2416 create_tce_64.liobn = create_tce.liobn; 2417 create_tce_64.page_shift = IOMMU_PAGE_SHIFT_4K; 2418 create_tce_64.offset = 0; 2419 create_tce_64.size = create_tce.window_size >> 2420 IOMMU_PAGE_SHIFT_4K; 2421 create_tce_64.flags = 0; 2422 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64); 2423 goto out; 2424 } 2425 #endif 2426 #ifdef CONFIG_PPC_BOOK3S_64 2427 case KVM_PPC_GET_SMMU_INFO: { 2428 struct kvm_ppc_smmu_info info; 2429 struct kvm *kvm = filp->private_data; 2430 2431 memset(&info, 0, sizeof(info)); 2432 r = kvm->arch.kvm_ops->get_smmu_info(kvm, &info); 2433 if (r >= 0 && copy_to_user(argp, &info, sizeof(info))) 2434 r = -EFAULT; 2435 break; 2436 } 2437 case KVM_PPC_RTAS_DEFINE_TOKEN: { 2438 struct kvm *kvm = filp->private_data; 2439 2440 r = kvm_vm_ioctl_rtas_define_token(kvm, argp); 2441 break; 2442 } 2443 case KVM_PPC_CONFIGURE_V3_MMU: { 2444 struct kvm *kvm = filp->private_data; 2445 struct kvm_ppc_mmuv3_cfg cfg; 2446 2447 r = -EINVAL; 2448 if (!kvm->arch.kvm_ops->configure_mmu) 2449 goto out; 2450 r = -EFAULT; 2451 if (copy_from_user(&cfg, argp, sizeof(cfg))) 2452 goto out; 2453 r = kvm->arch.kvm_ops->configure_mmu(kvm, &cfg); 2454 break; 2455 } 2456 case KVM_PPC_GET_RMMU_INFO: { 2457 struct kvm *kvm = filp->private_data; 2458 struct kvm_ppc_rmmu_info info; 2459 2460 r = -EINVAL; 2461 if (!kvm->arch.kvm_ops->get_rmmu_info) 2462 goto out; 2463 r = kvm->arch.kvm_ops->get_rmmu_info(kvm, &info); 2464 if (r >= 0 && copy_to_user(argp, &info, sizeof(info))) 2465 r = -EFAULT; 2466 break; 2467 } 2468 case KVM_PPC_GET_CPU_CHAR: { 2469 struct kvm_ppc_cpu_char cpuchar; 2470 2471 r = kvmppc_get_cpu_char(&cpuchar); 2472 if (r >= 0 && copy_to_user(argp, &cpuchar, sizeof(cpuchar))) 2473 r = -EFAULT; 2474 break; 2475 } 2476 case KVM_PPC_SVM_OFF: { 2477 struct kvm *kvm = filp->private_data; 2478 2479 r = 0; 2480 if (!kvm->arch.kvm_ops->svm_off) 2481 goto out; 2482 2483 r = kvm->arch.kvm_ops->svm_off(kvm); 2484 break; 2485 } 2486 default: { 2487 struct kvm *kvm = filp->private_data; 2488 r = kvm->arch.kvm_ops->arch_vm_ioctl(filp, ioctl, arg); 2489 } 2490 #else /* CONFIG_PPC_BOOK3S_64 */ 2491 default: 2492 r = -ENOTTY; 2493 #endif 2494 } 2495 out: 2496 return r; 2497 } 2498 2499 static unsigned long lpid_inuse[BITS_TO_LONGS(KVMPPC_NR_LPIDS)]; 2500 static unsigned long nr_lpids; 2501 2502 long kvmppc_alloc_lpid(void) 2503 { 2504 long lpid; 2505 2506 do { 2507 lpid = find_first_zero_bit(lpid_inuse, KVMPPC_NR_LPIDS); 2508 if (lpid >= nr_lpids) { 2509 pr_err("%s: No LPIDs free\n", __func__); 2510 return -ENOMEM; 2511 } 2512 } while (test_and_set_bit(lpid, lpid_inuse)); 2513 2514 return lpid; 2515 } 2516 EXPORT_SYMBOL_GPL(kvmppc_alloc_lpid); 2517 2518 void kvmppc_claim_lpid(long lpid) 2519 { 2520 set_bit(lpid, lpid_inuse); 2521 } 2522 EXPORT_SYMBOL_GPL(kvmppc_claim_lpid); 2523 2524 void kvmppc_free_lpid(long lpid) 2525 { 2526 clear_bit(lpid, lpid_inuse); 2527 } 2528 EXPORT_SYMBOL_GPL(kvmppc_free_lpid); 2529 2530 void kvmppc_init_lpid(unsigned long nr_lpids_param) 2531 { 2532 nr_lpids = min_t(unsigned long, KVMPPC_NR_LPIDS, nr_lpids_param); 2533 memset(lpid_inuse, 0, sizeof(lpid_inuse)); 2534 } 2535 EXPORT_SYMBOL_GPL(kvmppc_init_lpid); 2536 2537 int kvm_arch_init(void *opaque) 2538 { 2539 return 0; 2540 } 2541 2542 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ppc_instr); 2543 2544 void kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu, struct dentry *debugfs_dentry) 2545 { 2546 if (vcpu->kvm->arch.kvm_ops->create_vcpu_debugfs) 2547 vcpu->kvm->arch.kvm_ops->create_vcpu_debugfs(vcpu, debugfs_dentry); 2548 } 2549 2550 int kvm_arch_create_vm_debugfs(struct kvm *kvm) 2551 { 2552 if (kvm->arch.kvm_ops->create_vm_debugfs) 2553 kvm->arch.kvm_ops->create_vm_debugfs(kvm); 2554 return 0; 2555 } 2556