1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * 4 * Copyright IBM Corp. 2007 5 * 6 * Authors: Hollis Blanchard <hollisb@us.ibm.com> 7 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 8 */ 9 10 #include <linux/errno.h> 11 #include <linux/err.h> 12 #include <linux/kvm_host.h> 13 #include <linux/vmalloc.h> 14 #include <linux/hrtimer.h> 15 #include <linux/sched/signal.h> 16 #include <linux/fs.h> 17 #include <linux/slab.h> 18 #include <linux/file.h> 19 #include <linux/module.h> 20 #include <linux/irqbypass.h> 21 #include <linux/kvm_irqfd.h> 22 #include <linux/of.h> 23 #include <asm/cputable.h> 24 #include <linux/uaccess.h> 25 #include <asm/kvm_ppc.h> 26 #include <asm/cputhreads.h> 27 #include <asm/irqflags.h> 28 #include <asm/iommu.h> 29 #include <asm/switch_to.h> 30 #include <asm/xive.h> 31 #ifdef CONFIG_PPC_PSERIES 32 #include <asm/hvcall.h> 33 #include <asm/plpar_wrappers.h> 34 #endif 35 #include <asm/ultravisor.h> 36 #include <asm/setup.h> 37 38 #include "timing.h" 39 #include "../mm/mmu_decl.h" 40 41 #define CREATE_TRACE_POINTS 42 #include "trace.h" 43 44 struct kvmppc_ops *kvmppc_hv_ops; 45 EXPORT_SYMBOL_GPL(kvmppc_hv_ops); 46 struct kvmppc_ops *kvmppc_pr_ops; 47 EXPORT_SYMBOL_GPL(kvmppc_pr_ops); 48 49 50 int kvm_arch_vcpu_runnable(struct kvm_vcpu *v) 51 { 52 return !!(v->arch.pending_exceptions) || kvm_request_pending(v); 53 } 54 55 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu) 56 { 57 return kvm_arch_vcpu_runnable(vcpu); 58 } 59 60 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu) 61 { 62 return false; 63 } 64 65 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu) 66 { 67 return 1; 68 } 69 70 /* 71 * Common checks before entering the guest world. Call with interrupts 72 * disabled. 73 * 74 * returns: 75 * 76 * == 1 if we're ready to go into guest state 77 * <= 0 if we need to go back to the host with return value 78 */ 79 int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu) 80 { 81 int r; 82 83 WARN_ON(irqs_disabled()); 84 hard_irq_disable(); 85 86 while (true) { 87 if (need_resched()) { 88 local_irq_enable(); 89 cond_resched(); 90 hard_irq_disable(); 91 continue; 92 } 93 94 if (signal_pending(current)) { 95 kvmppc_account_exit(vcpu, SIGNAL_EXITS); 96 vcpu->run->exit_reason = KVM_EXIT_INTR; 97 r = -EINTR; 98 break; 99 } 100 101 vcpu->mode = IN_GUEST_MODE; 102 103 /* 104 * Reading vcpu->requests must happen after setting vcpu->mode, 105 * so we don't miss a request because the requester sees 106 * OUTSIDE_GUEST_MODE and assumes we'll be checking requests 107 * before next entering the guest (and thus doesn't IPI). 108 * This also orders the write to mode from any reads 109 * to the page tables done while the VCPU is running. 110 * Please see the comment in kvm_flush_remote_tlbs. 111 */ 112 smp_mb(); 113 114 if (kvm_request_pending(vcpu)) { 115 /* Make sure we process requests preemptable */ 116 local_irq_enable(); 117 trace_kvm_check_requests(vcpu); 118 r = kvmppc_core_check_requests(vcpu); 119 hard_irq_disable(); 120 if (r > 0) 121 continue; 122 break; 123 } 124 125 if (kvmppc_core_prepare_to_enter(vcpu)) { 126 /* interrupts got enabled in between, so we 127 are back at square 1 */ 128 continue; 129 } 130 131 guest_enter_irqoff(); 132 return 1; 133 } 134 135 /* return to host */ 136 local_irq_enable(); 137 return r; 138 } 139 EXPORT_SYMBOL_GPL(kvmppc_prepare_to_enter); 140 141 #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE) 142 static void kvmppc_swab_shared(struct kvm_vcpu *vcpu) 143 { 144 struct kvm_vcpu_arch_shared *shared = vcpu->arch.shared; 145 int i; 146 147 shared->sprg0 = swab64(shared->sprg0); 148 shared->sprg1 = swab64(shared->sprg1); 149 shared->sprg2 = swab64(shared->sprg2); 150 shared->sprg3 = swab64(shared->sprg3); 151 shared->srr0 = swab64(shared->srr0); 152 shared->srr1 = swab64(shared->srr1); 153 shared->dar = swab64(shared->dar); 154 shared->msr = swab64(shared->msr); 155 shared->dsisr = swab32(shared->dsisr); 156 shared->int_pending = swab32(shared->int_pending); 157 for (i = 0; i < ARRAY_SIZE(shared->sr); i++) 158 shared->sr[i] = swab32(shared->sr[i]); 159 } 160 #endif 161 162 int kvmppc_kvm_pv(struct kvm_vcpu *vcpu) 163 { 164 int nr = kvmppc_get_gpr(vcpu, 11); 165 int r; 166 unsigned long __maybe_unused param1 = kvmppc_get_gpr(vcpu, 3); 167 unsigned long __maybe_unused param2 = kvmppc_get_gpr(vcpu, 4); 168 unsigned long __maybe_unused param3 = kvmppc_get_gpr(vcpu, 5); 169 unsigned long __maybe_unused param4 = kvmppc_get_gpr(vcpu, 6); 170 unsigned long r2 = 0; 171 172 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) { 173 /* 32 bit mode */ 174 param1 &= 0xffffffff; 175 param2 &= 0xffffffff; 176 param3 &= 0xffffffff; 177 param4 &= 0xffffffff; 178 } 179 180 switch (nr) { 181 case KVM_HCALL_TOKEN(KVM_HC_PPC_MAP_MAGIC_PAGE): 182 { 183 #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE) 184 /* Book3S can be little endian, find it out here */ 185 int shared_big_endian = true; 186 if (vcpu->arch.intr_msr & MSR_LE) 187 shared_big_endian = false; 188 if (shared_big_endian != vcpu->arch.shared_big_endian) 189 kvmppc_swab_shared(vcpu); 190 vcpu->arch.shared_big_endian = shared_big_endian; 191 #endif 192 193 if (!(param2 & MAGIC_PAGE_FLAG_NOT_MAPPED_NX)) { 194 /* 195 * Older versions of the Linux magic page code had 196 * a bug where they would map their trampoline code 197 * NX. If that's the case, remove !PR NX capability. 198 */ 199 vcpu->arch.disable_kernel_nx = true; 200 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); 201 } 202 203 vcpu->arch.magic_page_pa = param1 & ~0xfffULL; 204 vcpu->arch.magic_page_ea = param2 & ~0xfffULL; 205 206 #ifdef CONFIG_PPC_64K_PAGES 207 /* 208 * Make sure our 4k magic page is in the same window of a 64k 209 * page within the guest and within the host's page. 210 */ 211 if ((vcpu->arch.magic_page_pa & 0xf000) != 212 ((ulong)vcpu->arch.shared & 0xf000)) { 213 void *old_shared = vcpu->arch.shared; 214 ulong shared = (ulong)vcpu->arch.shared; 215 void *new_shared; 216 217 shared &= PAGE_MASK; 218 shared |= vcpu->arch.magic_page_pa & 0xf000; 219 new_shared = (void*)shared; 220 memcpy(new_shared, old_shared, 0x1000); 221 vcpu->arch.shared = new_shared; 222 } 223 #endif 224 225 r2 = KVM_MAGIC_FEAT_SR | KVM_MAGIC_FEAT_MAS0_TO_SPRG7; 226 227 r = EV_SUCCESS; 228 break; 229 } 230 case KVM_HCALL_TOKEN(KVM_HC_FEATURES): 231 r = EV_SUCCESS; 232 #if defined(CONFIG_PPC_BOOK3S) || defined(CONFIG_KVM_E500V2) 233 r2 |= (1 << KVM_FEATURE_MAGIC_PAGE); 234 #endif 235 236 /* Second return value is in r4 */ 237 break; 238 case EV_HCALL_TOKEN(EV_IDLE): 239 r = EV_SUCCESS; 240 kvm_vcpu_halt(vcpu); 241 break; 242 default: 243 r = EV_UNIMPLEMENTED; 244 break; 245 } 246 247 kvmppc_set_gpr(vcpu, 4, r2); 248 249 return r; 250 } 251 EXPORT_SYMBOL_GPL(kvmppc_kvm_pv); 252 253 int kvmppc_sanity_check(struct kvm_vcpu *vcpu) 254 { 255 int r = false; 256 257 /* We have to know what CPU to virtualize */ 258 if (!vcpu->arch.pvr) 259 goto out; 260 261 /* PAPR only works with book3s_64 */ 262 if ((vcpu->arch.cpu_type != KVM_CPU_3S_64) && vcpu->arch.papr_enabled) 263 goto out; 264 265 /* HV KVM can only do PAPR mode for now */ 266 if (!vcpu->arch.papr_enabled && is_kvmppc_hv_enabled(vcpu->kvm)) 267 goto out; 268 269 #ifdef CONFIG_KVM_BOOKE_HV 270 if (!cpu_has_feature(CPU_FTR_EMB_HV)) 271 goto out; 272 #endif 273 274 r = true; 275 276 out: 277 vcpu->arch.sane = r; 278 return r ? 0 : -EINVAL; 279 } 280 EXPORT_SYMBOL_GPL(kvmppc_sanity_check); 281 282 int kvmppc_emulate_mmio(struct kvm_vcpu *vcpu) 283 { 284 enum emulation_result er; 285 int r; 286 287 er = kvmppc_emulate_loadstore(vcpu); 288 switch (er) { 289 case EMULATE_DONE: 290 /* Future optimization: only reload non-volatiles if they were 291 * actually modified. */ 292 r = RESUME_GUEST_NV; 293 break; 294 case EMULATE_AGAIN: 295 r = RESUME_GUEST; 296 break; 297 case EMULATE_DO_MMIO: 298 vcpu->run->exit_reason = KVM_EXIT_MMIO; 299 /* We must reload nonvolatiles because "update" load/store 300 * instructions modify register state. */ 301 /* Future optimization: only reload non-volatiles if they were 302 * actually modified. */ 303 r = RESUME_HOST_NV; 304 break; 305 case EMULATE_FAIL: 306 { 307 u32 last_inst; 308 309 kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst); 310 kvm_debug_ratelimited("Guest access to device memory using unsupported instruction (opcode: %#08x)\n", 311 last_inst); 312 313 /* 314 * Injecting a Data Storage here is a bit more 315 * accurate since the instruction that caused the 316 * access could still be a valid one. 317 */ 318 if (!IS_ENABLED(CONFIG_BOOKE)) { 319 ulong dsisr = DSISR_BADACCESS; 320 321 if (vcpu->mmio_is_write) 322 dsisr |= DSISR_ISSTORE; 323 324 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.vaddr_accessed, dsisr); 325 } else { 326 /* 327 * BookE does not send a SIGBUS on a bad 328 * fault, so use a Program interrupt instead 329 * to avoid a fault loop. 330 */ 331 kvmppc_core_queue_program(vcpu, 0); 332 } 333 334 r = RESUME_GUEST; 335 break; 336 } 337 default: 338 WARN_ON(1); 339 r = RESUME_GUEST; 340 } 341 342 return r; 343 } 344 EXPORT_SYMBOL_GPL(kvmppc_emulate_mmio); 345 346 int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, 347 bool data) 348 { 349 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK; 350 struct kvmppc_pte pte; 351 int r = -EINVAL; 352 353 vcpu->stat.st++; 354 355 if (vcpu->kvm->arch.kvm_ops && vcpu->kvm->arch.kvm_ops->store_to_eaddr) 356 r = vcpu->kvm->arch.kvm_ops->store_to_eaddr(vcpu, eaddr, ptr, 357 size); 358 359 if ((!r) || (r == -EAGAIN)) 360 return r; 361 362 r = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST, 363 XLATE_WRITE, &pte); 364 if (r < 0) 365 return r; 366 367 *eaddr = pte.raddr; 368 369 if (!pte.may_write) 370 return -EPERM; 371 372 /* Magic page override */ 373 if (kvmppc_supports_magic_page(vcpu) && mp_pa && 374 ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) && 375 !(kvmppc_get_msr(vcpu) & MSR_PR)) { 376 void *magic = vcpu->arch.shared; 377 magic += pte.eaddr & 0xfff; 378 memcpy(magic, ptr, size); 379 return EMULATE_DONE; 380 } 381 382 if (kvm_write_guest(vcpu->kvm, pte.raddr, ptr, size)) 383 return EMULATE_DO_MMIO; 384 385 return EMULATE_DONE; 386 } 387 EXPORT_SYMBOL_GPL(kvmppc_st); 388 389 int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, 390 bool data) 391 { 392 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK; 393 struct kvmppc_pte pte; 394 int rc = -EINVAL; 395 396 vcpu->stat.ld++; 397 398 if (vcpu->kvm->arch.kvm_ops && vcpu->kvm->arch.kvm_ops->load_from_eaddr) 399 rc = vcpu->kvm->arch.kvm_ops->load_from_eaddr(vcpu, eaddr, ptr, 400 size); 401 402 if ((!rc) || (rc == -EAGAIN)) 403 return rc; 404 405 rc = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST, 406 XLATE_READ, &pte); 407 if (rc) 408 return rc; 409 410 *eaddr = pte.raddr; 411 412 if (!pte.may_read) 413 return -EPERM; 414 415 if (!data && !pte.may_execute) 416 return -ENOEXEC; 417 418 /* Magic page override */ 419 if (kvmppc_supports_magic_page(vcpu) && mp_pa && 420 ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) && 421 !(kvmppc_get_msr(vcpu) & MSR_PR)) { 422 void *magic = vcpu->arch.shared; 423 magic += pte.eaddr & 0xfff; 424 memcpy(ptr, magic, size); 425 return EMULATE_DONE; 426 } 427 428 kvm_vcpu_srcu_read_lock(vcpu); 429 rc = kvm_read_guest(vcpu->kvm, pte.raddr, ptr, size); 430 kvm_vcpu_srcu_read_unlock(vcpu); 431 if (rc) 432 return EMULATE_DO_MMIO; 433 434 return EMULATE_DONE; 435 } 436 EXPORT_SYMBOL_GPL(kvmppc_ld); 437 438 int kvm_arch_hardware_enable(void) 439 { 440 return 0; 441 } 442 443 int kvm_arch_hardware_setup(void *opaque) 444 { 445 return 0; 446 } 447 448 int kvm_arch_check_processor_compat(void *opaque) 449 { 450 return kvmppc_core_check_processor_compat(); 451 } 452 453 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) 454 { 455 struct kvmppc_ops *kvm_ops = NULL; 456 int r; 457 458 /* 459 * if we have both HV and PR enabled, default is HV 460 */ 461 if (type == 0) { 462 if (kvmppc_hv_ops) 463 kvm_ops = kvmppc_hv_ops; 464 else 465 kvm_ops = kvmppc_pr_ops; 466 if (!kvm_ops) 467 goto err_out; 468 } else if (type == KVM_VM_PPC_HV) { 469 if (!kvmppc_hv_ops) 470 goto err_out; 471 kvm_ops = kvmppc_hv_ops; 472 } else if (type == KVM_VM_PPC_PR) { 473 if (!kvmppc_pr_ops) 474 goto err_out; 475 kvm_ops = kvmppc_pr_ops; 476 } else 477 goto err_out; 478 479 if (!try_module_get(kvm_ops->owner)) 480 return -ENOENT; 481 482 kvm->arch.kvm_ops = kvm_ops; 483 r = kvmppc_core_init_vm(kvm); 484 if (r) 485 module_put(kvm_ops->owner); 486 return r; 487 err_out: 488 return -EINVAL; 489 } 490 491 void kvm_arch_destroy_vm(struct kvm *kvm) 492 { 493 #ifdef CONFIG_KVM_XICS 494 /* 495 * We call kick_all_cpus_sync() to ensure that all 496 * CPUs have executed any pending IPIs before we 497 * continue and free VCPUs structures below. 498 */ 499 if (is_kvmppc_hv_enabled(kvm)) 500 kick_all_cpus_sync(); 501 #endif 502 503 kvm_destroy_vcpus(kvm); 504 505 mutex_lock(&kvm->lock); 506 507 kvmppc_core_destroy_vm(kvm); 508 509 mutex_unlock(&kvm->lock); 510 511 /* drop the module reference */ 512 module_put(kvm->arch.kvm_ops->owner); 513 } 514 515 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) 516 { 517 int r; 518 /* Assume we're using HV mode when the HV module is loaded */ 519 int hv_enabled = kvmppc_hv_ops ? 1 : 0; 520 521 if (kvm) { 522 /* 523 * Hooray - we know which VM type we're running on. Depend on 524 * that rather than the guess above. 525 */ 526 hv_enabled = is_kvmppc_hv_enabled(kvm); 527 } 528 529 switch (ext) { 530 #ifdef CONFIG_BOOKE 531 case KVM_CAP_PPC_BOOKE_SREGS: 532 case KVM_CAP_PPC_BOOKE_WATCHDOG: 533 case KVM_CAP_PPC_EPR: 534 #else 535 case KVM_CAP_PPC_SEGSTATE: 536 case KVM_CAP_PPC_HIOR: 537 case KVM_CAP_PPC_PAPR: 538 #endif 539 case KVM_CAP_PPC_UNSET_IRQ: 540 case KVM_CAP_PPC_IRQ_LEVEL: 541 case KVM_CAP_ENABLE_CAP: 542 case KVM_CAP_ONE_REG: 543 case KVM_CAP_IOEVENTFD: 544 case KVM_CAP_DEVICE_CTRL: 545 case KVM_CAP_IMMEDIATE_EXIT: 546 case KVM_CAP_SET_GUEST_DEBUG: 547 r = 1; 548 break; 549 case KVM_CAP_PPC_GUEST_DEBUG_SSTEP: 550 case KVM_CAP_PPC_PAIRED_SINGLES: 551 case KVM_CAP_PPC_OSI: 552 case KVM_CAP_PPC_GET_PVINFO: 553 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 554 case KVM_CAP_SW_TLB: 555 #endif 556 /* We support this only for PR */ 557 r = !hv_enabled; 558 break; 559 #ifdef CONFIG_KVM_MPIC 560 case KVM_CAP_IRQ_MPIC: 561 r = 1; 562 break; 563 #endif 564 565 #ifdef CONFIG_PPC_BOOK3S_64 566 case KVM_CAP_SPAPR_TCE: 567 case KVM_CAP_SPAPR_TCE_64: 568 r = 1; 569 break; 570 case KVM_CAP_SPAPR_TCE_VFIO: 571 r = !!cpu_has_feature(CPU_FTR_HVMODE); 572 break; 573 case KVM_CAP_PPC_RTAS: 574 case KVM_CAP_PPC_FIXUP_HCALL: 575 case KVM_CAP_PPC_ENABLE_HCALL: 576 #ifdef CONFIG_KVM_XICS 577 case KVM_CAP_IRQ_XICS: 578 #endif 579 case KVM_CAP_PPC_GET_CPU_CHAR: 580 r = 1; 581 break; 582 #ifdef CONFIG_KVM_XIVE 583 case KVM_CAP_PPC_IRQ_XIVE: 584 /* 585 * We need XIVE to be enabled on the platform (implies 586 * a POWER9 processor) and the PowerNV platform, as 587 * nested is not yet supported. 588 */ 589 r = xive_enabled() && !!cpu_has_feature(CPU_FTR_HVMODE) && 590 kvmppc_xive_native_supported(); 591 break; 592 #endif 593 594 case KVM_CAP_PPC_ALLOC_HTAB: 595 r = hv_enabled; 596 break; 597 #endif /* CONFIG_PPC_BOOK3S_64 */ 598 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 599 case KVM_CAP_PPC_SMT: 600 r = 0; 601 if (kvm) { 602 if (kvm->arch.emul_smt_mode > 1) 603 r = kvm->arch.emul_smt_mode; 604 else 605 r = kvm->arch.smt_mode; 606 } else if (hv_enabled) { 607 if (cpu_has_feature(CPU_FTR_ARCH_300)) 608 r = 1; 609 else 610 r = threads_per_subcore; 611 } 612 break; 613 case KVM_CAP_PPC_SMT_POSSIBLE: 614 r = 1; 615 if (hv_enabled) { 616 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 617 r = ((threads_per_subcore << 1) - 1); 618 else 619 /* P9 can emulate dbells, so allow any mode */ 620 r = 8 | 4 | 2 | 1; 621 } 622 break; 623 case KVM_CAP_PPC_RMA: 624 r = 0; 625 break; 626 case KVM_CAP_PPC_HWRNG: 627 r = kvmppc_hwrng_present(); 628 break; 629 case KVM_CAP_PPC_MMU_RADIX: 630 r = !!(hv_enabled && radix_enabled()); 631 break; 632 case KVM_CAP_PPC_MMU_HASH_V3: 633 r = !!(hv_enabled && kvmppc_hv_ops->hash_v3_possible && 634 kvmppc_hv_ops->hash_v3_possible()); 635 break; 636 case KVM_CAP_PPC_NESTED_HV: 637 r = !!(hv_enabled && kvmppc_hv_ops->enable_nested && 638 !kvmppc_hv_ops->enable_nested(NULL)); 639 break; 640 #endif 641 case KVM_CAP_SYNC_MMU: 642 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 643 r = hv_enabled; 644 #elif defined(KVM_ARCH_WANT_MMU_NOTIFIER) 645 r = 1; 646 #else 647 r = 0; 648 #endif 649 break; 650 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 651 case KVM_CAP_PPC_HTAB_FD: 652 r = hv_enabled; 653 break; 654 #endif 655 case KVM_CAP_NR_VCPUS: 656 /* 657 * Recommending a number of CPUs is somewhat arbitrary; we 658 * return the number of present CPUs for -HV (since a host 659 * will have secondary threads "offline"), and for other KVM 660 * implementations just count online CPUs. 661 */ 662 if (hv_enabled) 663 r = min_t(unsigned int, num_present_cpus(), KVM_MAX_VCPUS); 664 else 665 r = min_t(unsigned int, num_online_cpus(), KVM_MAX_VCPUS); 666 break; 667 case KVM_CAP_MAX_VCPUS: 668 r = KVM_MAX_VCPUS; 669 break; 670 case KVM_CAP_MAX_VCPU_ID: 671 r = KVM_MAX_VCPU_IDS; 672 break; 673 #ifdef CONFIG_PPC_BOOK3S_64 674 case KVM_CAP_PPC_GET_SMMU_INFO: 675 r = 1; 676 break; 677 case KVM_CAP_SPAPR_MULTITCE: 678 r = 1; 679 break; 680 case KVM_CAP_SPAPR_RESIZE_HPT: 681 r = !!hv_enabled; 682 break; 683 #endif 684 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 685 case KVM_CAP_PPC_FWNMI: 686 r = hv_enabled; 687 break; 688 #endif 689 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 690 case KVM_CAP_PPC_HTM: 691 r = !!(cur_cpu_spec->cpu_user_features2 & PPC_FEATURE2_HTM) || 692 (hv_enabled && cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)); 693 break; 694 #endif 695 #if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE) 696 case KVM_CAP_PPC_SECURE_GUEST: 697 r = hv_enabled && kvmppc_hv_ops->enable_svm && 698 !kvmppc_hv_ops->enable_svm(NULL); 699 break; 700 case KVM_CAP_PPC_DAWR1: 701 r = !!(hv_enabled && kvmppc_hv_ops->enable_dawr1 && 702 !kvmppc_hv_ops->enable_dawr1(NULL)); 703 break; 704 case KVM_CAP_PPC_RPT_INVALIDATE: 705 r = 1; 706 break; 707 #endif 708 case KVM_CAP_PPC_AIL_MODE_3: 709 r = 0; 710 /* 711 * KVM PR, POWER7, and some POWER9s don't support AIL=3 mode. 712 * The POWER9s can support it if the guest runs in hash mode, 713 * but QEMU doesn't necessarily query the capability in time. 714 */ 715 if (hv_enabled) { 716 if (kvmhv_on_pseries()) { 717 if (pseries_reloc_on_exception()) 718 r = 1; 719 } else if (cpu_has_feature(CPU_FTR_ARCH_207S) && 720 !cpu_has_feature(CPU_FTR_P9_RADIX_PREFETCH_BUG)) { 721 r = 1; 722 } 723 } 724 break; 725 default: 726 r = 0; 727 break; 728 } 729 return r; 730 731 } 732 733 long kvm_arch_dev_ioctl(struct file *filp, 734 unsigned int ioctl, unsigned long arg) 735 { 736 return -EINVAL; 737 } 738 739 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot) 740 { 741 kvmppc_core_free_memslot(kvm, slot); 742 } 743 744 int kvm_arch_prepare_memory_region(struct kvm *kvm, 745 const struct kvm_memory_slot *old, 746 struct kvm_memory_slot *new, 747 enum kvm_mr_change change) 748 { 749 return kvmppc_core_prepare_memory_region(kvm, old, new, change); 750 } 751 752 void kvm_arch_commit_memory_region(struct kvm *kvm, 753 struct kvm_memory_slot *old, 754 const struct kvm_memory_slot *new, 755 enum kvm_mr_change change) 756 { 757 kvmppc_core_commit_memory_region(kvm, old, new, change); 758 } 759 760 void kvm_arch_flush_shadow_memslot(struct kvm *kvm, 761 struct kvm_memory_slot *slot) 762 { 763 kvmppc_core_flush_memslot(kvm, slot); 764 } 765 766 int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id) 767 { 768 return 0; 769 } 770 771 static enum hrtimer_restart kvmppc_decrementer_wakeup(struct hrtimer *timer) 772 { 773 struct kvm_vcpu *vcpu; 774 775 vcpu = container_of(timer, struct kvm_vcpu, arch.dec_timer); 776 kvmppc_decrementer_func(vcpu); 777 778 return HRTIMER_NORESTART; 779 } 780 781 int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu) 782 { 783 int err; 784 785 hrtimer_init(&vcpu->arch.dec_timer, CLOCK_REALTIME, HRTIMER_MODE_ABS); 786 vcpu->arch.dec_timer.function = kvmppc_decrementer_wakeup; 787 788 #ifdef CONFIG_KVM_EXIT_TIMING 789 mutex_init(&vcpu->arch.exit_timing_lock); 790 #endif 791 err = kvmppc_subarch_vcpu_init(vcpu); 792 if (err) 793 return err; 794 795 err = kvmppc_core_vcpu_create(vcpu); 796 if (err) 797 goto out_vcpu_uninit; 798 799 rcuwait_init(&vcpu->arch.wait); 800 vcpu->arch.waitp = &vcpu->arch.wait; 801 return 0; 802 803 out_vcpu_uninit: 804 kvmppc_subarch_vcpu_uninit(vcpu); 805 return err; 806 } 807 808 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu) 809 { 810 } 811 812 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) 813 { 814 /* Make sure we're not using the vcpu anymore */ 815 hrtimer_cancel(&vcpu->arch.dec_timer); 816 817 switch (vcpu->arch.irq_type) { 818 case KVMPPC_IRQ_MPIC: 819 kvmppc_mpic_disconnect_vcpu(vcpu->arch.mpic, vcpu); 820 break; 821 case KVMPPC_IRQ_XICS: 822 if (xics_on_xive()) 823 kvmppc_xive_cleanup_vcpu(vcpu); 824 else 825 kvmppc_xics_free_icp(vcpu); 826 break; 827 case KVMPPC_IRQ_XIVE: 828 kvmppc_xive_native_cleanup_vcpu(vcpu); 829 break; 830 } 831 832 kvmppc_core_vcpu_free(vcpu); 833 834 kvmppc_subarch_vcpu_uninit(vcpu); 835 } 836 837 int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu) 838 { 839 return kvmppc_core_pending_dec(vcpu); 840 } 841 842 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 843 { 844 #ifdef CONFIG_BOOKE 845 /* 846 * vrsave (formerly usprg0) isn't used by Linux, but may 847 * be used by the guest. 848 * 849 * On non-booke this is associated with Altivec and 850 * is handled by code in book3s.c. 851 */ 852 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave); 853 #endif 854 kvmppc_core_vcpu_load(vcpu, cpu); 855 } 856 857 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) 858 { 859 kvmppc_core_vcpu_put(vcpu); 860 #ifdef CONFIG_BOOKE 861 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE); 862 #endif 863 } 864 865 /* 866 * irq_bypass_add_producer and irq_bypass_del_producer are only 867 * useful if the architecture supports PCI passthrough. 868 * irq_bypass_stop and irq_bypass_start are not needed and so 869 * kvm_ops are not defined for them. 870 */ 871 bool kvm_arch_has_irq_bypass(void) 872 { 873 return ((kvmppc_hv_ops && kvmppc_hv_ops->irq_bypass_add_producer) || 874 (kvmppc_pr_ops && kvmppc_pr_ops->irq_bypass_add_producer)); 875 } 876 877 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons, 878 struct irq_bypass_producer *prod) 879 { 880 struct kvm_kernel_irqfd *irqfd = 881 container_of(cons, struct kvm_kernel_irqfd, consumer); 882 struct kvm *kvm = irqfd->kvm; 883 884 if (kvm->arch.kvm_ops->irq_bypass_add_producer) 885 return kvm->arch.kvm_ops->irq_bypass_add_producer(cons, prod); 886 887 return 0; 888 } 889 890 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons, 891 struct irq_bypass_producer *prod) 892 { 893 struct kvm_kernel_irqfd *irqfd = 894 container_of(cons, struct kvm_kernel_irqfd, consumer); 895 struct kvm *kvm = irqfd->kvm; 896 897 if (kvm->arch.kvm_ops->irq_bypass_del_producer) 898 kvm->arch.kvm_ops->irq_bypass_del_producer(cons, prod); 899 } 900 901 #ifdef CONFIG_VSX 902 static inline int kvmppc_get_vsr_dword_offset(int index) 903 { 904 int offset; 905 906 if ((index != 0) && (index != 1)) 907 return -1; 908 909 #ifdef __BIG_ENDIAN 910 offset = index; 911 #else 912 offset = 1 - index; 913 #endif 914 915 return offset; 916 } 917 918 static inline int kvmppc_get_vsr_word_offset(int index) 919 { 920 int offset; 921 922 if ((index > 3) || (index < 0)) 923 return -1; 924 925 #ifdef __BIG_ENDIAN 926 offset = index; 927 #else 928 offset = 3 - index; 929 #endif 930 return offset; 931 } 932 933 static inline void kvmppc_set_vsr_dword(struct kvm_vcpu *vcpu, 934 u64 gpr) 935 { 936 union kvmppc_one_reg val; 937 int offset = kvmppc_get_vsr_dword_offset(vcpu->arch.mmio_vsx_offset); 938 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 939 940 if (offset == -1) 941 return; 942 943 if (index >= 32) { 944 val.vval = VCPU_VSX_VR(vcpu, index - 32); 945 val.vsxval[offset] = gpr; 946 VCPU_VSX_VR(vcpu, index - 32) = val.vval; 947 } else { 948 VCPU_VSX_FPR(vcpu, index, offset) = gpr; 949 } 950 } 951 952 static inline void kvmppc_set_vsr_dword_dump(struct kvm_vcpu *vcpu, 953 u64 gpr) 954 { 955 union kvmppc_one_reg val; 956 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 957 958 if (index >= 32) { 959 val.vval = VCPU_VSX_VR(vcpu, index - 32); 960 val.vsxval[0] = gpr; 961 val.vsxval[1] = gpr; 962 VCPU_VSX_VR(vcpu, index - 32) = val.vval; 963 } else { 964 VCPU_VSX_FPR(vcpu, index, 0) = gpr; 965 VCPU_VSX_FPR(vcpu, index, 1) = gpr; 966 } 967 } 968 969 static inline void kvmppc_set_vsr_word_dump(struct kvm_vcpu *vcpu, 970 u32 gpr) 971 { 972 union kvmppc_one_reg val; 973 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 974 975 if (index >= 32) { 976 val.vsx32val[0] = gpr; 977 val.vsx32val[1] = gpr; 978 val.vsx32val[2] = gpr; 979 val.vsx32val[3] = gpr; 980 VCPU_VSX_VR(vcpu, index - 32) = val.vval; 981 } else { 982 val.vsx32val[0] = gpr; 983 val.vsx32val[1] = gpr; 984 VCPU_VSX_FPR(vcpu, index, 0) = val.vsxval[0]; 985 VCPU_VSX_FPR(vcpu, index, 1) = val.vsxval[0]; 986 } 987 } 988 989 static inline void kvmppc_set_vsr_word(struct kvm_vcpu *vcpu, 990 u32 gpr32) 991 { 992 union kvmppc_one_reg val; 993 int offset = kvmppc_get_vsr_word_offset(vcpu->arch.mmio_vsx_offset); 994 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 995 int dword_offset, word_offset; 996 997 if (offset == -1) 998 return; 999 1000 if (index >= 32) { 1001 val.vval = VCPU_VSX_VR(vcpu, index - 32); 1002 val.vsx32val[offset] = gpr32; 1003 VCPU_VSX_VR(vcpu, index - 32) = val.vval; 1004 } else { 1005 dword_offset = offset / 2; 1006 word_offset = offset % 2; 1007 val.vsxval[0] = VCPU_VSX_FPR(vcpu, index, dword_offset); 1008 val.vsx32val[word_offset] = gpr32; 1009 VCPU_VSX_FPR(vcpu, index, dword_offset) = val.vsxval[0]; 1010 } 1011 } 1012 #endif /* CONFIG_VSX */ 1013 1014 #ifdef CONFIG_ALTIVEC 1015 static inline int kvmppc_get_vmx_offset_generic(struct kvm_vcpu *vcpu, 1016 int index, int element_size) 1017 { 1018 int offset; 1019 int elts = sizeof(vector128)/element_size; 1020 1021 if ((index < 0) || (index >= elts)) 1022 return -1; 1023 1024 if (kvmppc_need_byteswap(vcpu)) 1025 offset = elts - index - 1; 1026 else 1027 offset = index; 1028 1029 return offset; 1030 } 1031 1032 static inline int kvmppc_get_vmx_dword_offset(struct kvm_vcpu *vcpu, 1033 int index) 1034 { 1035 return kvmppc_get_vmx_offset_generic(vcpu, index, 8); 1036 } 1037 1038 static inline int kvmppc_get_vmx_word_offset(struct kvm_vcpu *vcpu, 1039 int index) 1040 { 1041 return kvmppc_get_vmx_offset_generic(vcpu, index, 4); 1042 } 1043 1044 static inline int kvmppc_get_vmx_hword_offset(struct kvm_vcpu *vcpu, 1045 int index) 1046 { 1047 return kvmppc_get_vmx_offset_generic(vcpu, index, 2); 1048 } 1049 1050 static inline int kvmppc_get_vmx_byte_offset(struct kvm_vcpu *vcpu, 1051 int index) 1052 { 1053 return kvmppc_get_vmx_offset_generic(vcpu, index, 1); 1054 } 1055 1056 1057 static inline void kvmppc_set_vmx_dword(struct kvm_vcpu *vcpu, 1058 u64 gpr) 1059 { 1060 union kvmppc_one_reg val; 1061 int offset = kvmppc_get_vmx_dword_offset(vcpu, 1062 vcpu->arch.mmio_vmx_offset); 1063 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 1064 1065 if (offset == -1) 1066 return; 1067 1068 val.vval = VCPU_VSX_VR(vcpu, index); 1069 val.vsxval[offset] = gpr; 1070 VCPU_VSX_VR(vcpu, index) = val.vval; 1071 } 1072 1073 static inline void kvmppc_set_vmx_word(struct kvm_vcpu *vcpu, 1074 u32 gpr32) 1075 { 1076 union kvmppc_one_reg val; 1077 int offset = kvmppc_get_vmx_word_offset(vcpu, 1078 vcpu->arch.mmio_vmx_offset); 1079 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 1080 1081 if (offset == -1) 1082 return; 1083 1084 val.vval = VCPU_VSX_VR(vcpu, index); 1085 val.vsx32val[offset] = gpr32; 1086 VCPU_VSX_VR(vcpu, index) = val.vval; 1087 } 1088 1089 static inline void kvmppc_set_vmx_hword(struct kvm_vcpu *vcpu, 1090 u16 gpr16) 1091 { 1092 union kvmppc_one_reg val; 1093 int offset = kvmppc_get_vmx_hword_offset(vcpu, 1094 vcpu->arch.mmio_vmx_offset); 1095 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 1096 1097 if (offset == -1) 1098 return; 1099 1100 val.vval = VCPU_VSX_VR(vcpu, index); 1101 val.vsx16val[offset] = gpr16; 1102 VCPU_VSX_VR(vcpu, index) = val.vval; 1103 } 1104 1105 static inline void kvmppc_set_vmx_byte(struct kvm_vcpu *vcpu, 1106 u8 gpr8) 1107 { 1108 union kvmppc_one_reg val; 1109 int offset = kvmppc_get_vmx_byte_offset(vcpu, 1110 vcpu->arch.mmio_vmx_offset); 1111 int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; 1112 1113 if (offset == -1) 1114 return; 1115 1116 val.vval = VCPU_VSX_VR(vcpu, index); 1117 val.vsx8val[offset] = gpr8; 1118 VCPU_VSX_VR(vcpu, index) = val.vval; 1119 } 1120 #endif /* CONFIG_ALTIVEC */ 1121 1122 #ifdef CONFIG_PPC_FPU 1123 static inline u64 sp_to_dp(u32 fprs) 1124 { 1125 u64 fprd; 1126 1127 preempt_disable(); 1128 enable_kernel_fp(); 1129 asm ("lfs%U1%X1 0,%1; stfd%U0%X0 0,%0" : "=m<>" (fprd) : "m<>" (fprs) 1130 : "fr0"); 1131 preempt_enable(); 1132 return fprd; 1133 } 1134 1135 static inline u32 dp_to_sp(u64 fprd) 1136 { 1137 u32 fprs; 1138 1139 preempt_disable(); 1140 enable_kernel_fp(); 1141 asm ("lfd%U1%X1 0,%1; stfs%U0%X0 0,%0" : "=m<>" (fprs) : "m<>" (fprd) 1142 : "fr0"); 1143 preempt_enable(); 1144 return fprs; 1145 } 1146 1147 #else 1148 #define sp_to_dp(x) (x) 1149 #define dp_to_sp(x) (x) 1150 #endif /* CONFIG_PPC_FPU */ 1151 1152 static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu) 1153 { 1154 struct kvm_run *run = vcpu->run; 1155 u64 gpr; 1156 1157 if (run->mmio.len > sizeof(gpr)) 1158 return; 1159 1160 if (!vcpu->arch.mmio_host_swabbed) { 1161 switch (run->mmio.len) { 1162 case 8: gpr = *(u64 *)run->mmio.data; break; 1163 case 4: gpr = *(u32 *)run->mmio.data; break; 1164 case 2: gpr = *(u16 *)run->mmio.data; break; 1165 case 1: gpr = *(u8 *)run->mmio.data; break; 1166 } 1167 } else { 1168 switch (run->mmio.len) { 1169 case 8: gpr = swab64(*(u64 *)run->mmio.data); break; 1170 case 4: gpr = swab32(*(u32 *)run->mmio.data); break; 1171 case 2: gpr = swab16(*(u16 *)run->mmio.data); break; 1172 case 1: gpr = *(u8 *)run->mmio.data; break; 1173 } 1174 } 1175 1176 /* conversion between single and double precision */ 1177 if ((vcpu->arch.mmio_sp64_extend) && (run->mmio.len == 4)) 1178 gpr = sp_to_dp(gpr); 1179 1180 if (vcpu->arch.mmio_sign_extend) { 1181 switch (run->mmio.len) { 1182 #ifdef CONFIG_PPC64 1183 case 4: 1184 gpr = (s64)(s32)gpr; 1185 break; 1186 #endif 1187 case 2: 1188 gpr = (s64)(s16)gpr; 1189 break; 1190 case 1: 1191 gpr = (s64)(s8)gpr; 1192 break; 1193 } 1194 } 1195 1196 switch (vcpu->arch.io_gpr & KVM_MMIO_REG_EXT_MASK) { 1197 case KVM_MMIO_REG_GPR: 1198 kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr); 1199 break; 1200 case KVM_MMIO_REG_FPR: 1201 if (vcpu->kvm->arch.kvm_ops->giveup_ext) 1202 vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu, MSR_FP); 1203 1204 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr; 1205 break; 1206 #ifdef CONFIG_PPC_BOOK3S 1207 case KVM_MMIO_REG_QPR: 1208 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr; 1209 break; 1210 case KVM_MMIO_REG_FQPR: 1211 VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr; 1212 vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr; 1213 break; 1214 #endif 1215 #ifdef CONFIG_VSX 1216 case KVM_MMIO_REG_VSX: 1217 if (vcpu->kvm->arch.kvm_ops->giveup_ext) 1218 vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu, MSR_VSX); 1219 1220 if (vcpu->arch.mmio_copy_type == KVMPPC_VSX_COPY_DWORD) 1221 kvmppc_set_vsr_dword(vcpu, gpr); 1222 else if (vcpu->arch.mmio_copy_type == KVMPPC_VSX_COPY_WORD) 1223 kvmppc_set_vsr_word(vcpu, gpr); 1224 else if (vcpu->arch.mmio_copy_type == 1225 KVMPPC_VSX_COPY_DWORD_LOAD_DUMP) 1226 kvmppc_set_vsr_dword_dump(vcpu, gpr); 1227 else if (vcpu->arch.mmio_copy_type == 1228 KVMPPC_VSX_COPY_WORD_LOAD_DUMP) 1229 kvmppc_set_vsr_word_dump(vcpu, gpr); 1230 break; 1231 #endif 1232 #ifdef CONFIG_ALTIVEC 1233 case KVM_MMIO_REG_VMX: 1234 if (vcpu->kvm->arch.kvm_ops->giveup_ext) 1235 vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu, MSR_VEC); 1236 1237 if (vcpu->arch.mmio_copy_type == KVMPPC_VMX_COPY_DWORD) 1238 kvmppc_set_vmx_dword(vcpu, gpr); 1239 else if (vcpu->arch.mmio_copy_type == KVMPPC_VMX_COPY_WORD) 1240 kvmppc_set_vmx_word(vcpu, gpr); 1241 else if (vcpu->arch.mmio_copy_type == 1242 KVMPPC_VMX_COPY_HWORD) 1243 kvmppc_set_vmx_hword(vcpu, gpr); 1244 else if (vcpu->arch.mmio_copy_type == 1245 KVMPPC_VMX_COPY_BYTE) 1246 kvmppc_set_vmx_byte(vcpu, gpr); 1247 break; 1248 #endif 1249 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 1250 case KVM_MMIO_REG_NESTED_GPR: 1251 if (kvmppc_need_byteswap(vcpu)) 1252 gpr = swab64(gpr); 1253 kvm_vcpu_write_guest(vcpu, vcpu->arch.nested_io_gpr, &gpr, 1254 sizeof(gpr)); 1255 break; 1256 #endif 1257 default: 1258 BUG(); 1259 } 1260 } 1261 1262 static int __kvmppc_handle_load(struct kvm_vcpu *vcpu, 1263 unsigned int rt, unsigned int bytes, 1264 int is_default_endian, int sign_extend) 1265 { 1266 struct kvm_run *run = vcpu->run; 1267 int idx, ret; 1268 bool host_swabbed; 1269 1270 /* Pity C doesn't have a logical XOR operator */ 1271 if (kvmppc_need_byteswap(vcpu)) { 1272 host_swabbed = is_default_endian; 1273 } else { 1274 host_swabbed = !is_default_endian; 1275 } 1276 1277 if (bytes > sizeof(run->mmio.data)) 1278 return EMULATE_FAIL; 1279 1280 run->mmio.phys_addr = vcpu->arch.paddr_accessed; 1281 run->mmio.len = bytes; 1282 run->mmio.is_write = 0; 1283 1284 vcpu->arch.io_gpr = rt; 1285 vcpu->arch.mmio_host_swabbed = host_swabbed; 1286 vcpu->mmio_needed = 1; 1287 vcpu->mmio_is_write = 0; 1288 vcpu->arch.mmio_sign_extend = sign_extend; 1289 1290 idx = srcu_read_lock(&vcpu->kvm->srcu); 1291 1292 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr, 1293 bytes, &run->mmio.data); 1294 1295 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1296 1297 if (!ret) { 1298 kvmppc_complete_mmio_load(vcpu); 1299 vcpu->mmio_needed = 0; 1300 return EMULATE_DONE; 1301 } 1302 1303 return EMULATE_DO_MMIO; 1304 } 1305 1306 int kvmppc_handle_load(struct kvm_vcpu *vcpu, 1307 unsigned int rt, unsigned int bytes, 1308 int is_default_endian) 1309 { 1310 return __kvmppc_handle_load(vcpu, rt, bytes, is_default_endian, 0); 1311 } 1312 EXPORT_SYMBOL_GPL(kvmppc_handle_load); 1313 1314 /* Same as above, but sign extends */ 1315 int kvmppc_handle_loads(struct kvm_vcpu *vcpu, 1316 unsigned int rt, unsigned int bytes, 1317 int is_default_endian) 1318 { 1319 return __kvmppc_handle_load(vcpu, rt, bytes, is_default_endian, 1); 1320 } 1321 1322 #ifdef CONFIG_VSX 1323 int kvmppc_handle_vsx_load(struct kvm_vcpu *vcpu, 1324 unsigned int rt, unsigned int bytes, 1325 int is_default_endian, int mmio_sign_extend) 1326 { 1327 enum emulation_result emulated = EMULATE_DONE; 1328 1329 /* Currently, mmio_vsx_copy_nums only allowed to be 4 or less */ 1330 if (vcpu->arch.mmio_vsx_copy_nums > 4) 1331 return EMULATE_FAIL; 1332 1333 while (vcpu->arch.mmio_vsx_copy_nums) { 1334 emulated = __kvmppc_handle_load(vcpu, rt, bytes, 1335 is_default_endian, mmio_sign_extend); 1336 1337 if (emulated != EMULATE_DONE) 1338 break; 1339 1340 vcpu->arch.paddr_accessed += vcpu->run->mmio.len; 1341 1342 vcpu->arch.mmio_vsx_copy_nums--; 1343 vcpu->arch.mmio_vsx_offset++; 1344 } 1345 return emulated; 1346 } 1347 #endif /* CONFIG_VSX */ 1348 1349 int kvmppc_handle_store(struct kvm_vcpu *vcpu, 1350 u64 val, unsigned int bytes, int is_default_endian) 1351 { 1352 struct kvm_run *run = vcpu->run; 1353 void *data = run->mmio.data; 1354 int idx, ret; 1355 bool host_swabbed; 1356 1357 /* Pity C doesn't have a logical XOR operator */ 1358 if (kvmppc_need_byteswap(vcpu)) { 1359 host_swabbed = is_default_endian; 1360 } else { 1361 host_swabbed = !is_default_endian; 1362 } 1363 1364 if (bytes > sizeof(run->mmio.data)) 1365 return EMULATE_FAIL; 1366 1367 run->mmio.phys_addr = vcpu->arch.paddr_accessed; 1368 run->mmio.len = bytes; 1369 run->mmio.is_write = 1; 1370 vcpu->mmio_needed = 1; 1371 vcpu->mmio_is_write = 1; 1372 1373 if ((vcpu->arch.mmio_sp64_extend) && (bytes == 4)) 1374 val = dp_to_sp(val); 1375 1376 /* Store the value at the lowest bytes in 'data'. */ 1377 if (!host_swabbed) { 1378 switch (bytes) { 1379 case 8: *(u64 *)data = val; break; 1380 case 4: *(u32 *)data = val; break; 1381 case 2: *(u16 *)data = val; break; 1382 case 1: *(u8 *)data = val; break; 1383 } 1384 } else { 1385 switch (bytes) { 1386 case 8: *(u64 *)data = swab64(val); break; 1387 case 4: *(u32 *)data = swab32(val); break; 1388 case 2: *(u16 *)data = swab16(val); break; 1389 case 1: *(u8 *)data = val; break; 1390 } 1391 } 1392 1393 idx = srcu_read_lock(&vcpu->kvm->srcu); 1394 1395 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr, 1396 bytes, &run->mmio.data); 1397 1398 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1399 1400 if (!ret) { 1401 vcpu->mmio_needed = 0; 1402 return EMULATE_DONE; 1403 } 1404 1405 return EMULATE_DO_MMIO; 1406 } 1407 EXPORT_SYMBOL_GPL(kvmppc_handle_store); 1408 1409 #ifdef CONFIG_VSX 1410 static inline int kvmppc_get_vsr_data(struct kvm_vcpu *vcpu, int rs, u64 *val) 1411 { 1412 u32 dword_offset, word_offset; 1413 union kvmppc_one_reg reg; 1414 int vsx_offset = 0; 1415 int copy_type = vcpu->arch.mmio_copy_type; 1416 int result = 0; 1417 1418 switch (copy_type) { 1419 case KVMPPC_VSX_COPY_DWORD: 1420 vsx_offset = 1421 kvmppc_get_vsr_dword_offset(vcpu->arch.mmio_vsx_offset); 1422 1423 if (vsx_offset == -1) { 1424 result = -1; 1425 break; 1426 } 1427 1428 if (rs < 32) { 1429 *val = VCPU_VSX_FPR(vcpu, rs, vsx_offset); 1430 } else { 1431 reg.vval = VCPU_VSX_VR(vcpu, rs - 32); 1432 *val = reg.vsxval[vsx_offset]; 1433 } 1434 break; 1435 1436 case KVMPPC_VSX_COPY_WORD: 1437 vsx_offset = 1438 kvmppc_get_vsr_word_offset(vcpu->arch.mmio_vsx_offset); 1439 1440 if (vsx_offset == -1) { 1441 result = -1; 1442 break; 1443 } 1444 1445 if (rs < 32) { 1446 dword_offset = vsx_offset / 2; 1447 word_offset = vsx_offset % 2; 1448 reg.vsxval[0] = VCPU_VSX_FPR(vcpu, rs, dword_offset); 1449 *val = reg.vsx32val[word_offset]; 1450 } else { 1451 reg.vval = VCPU_VSX_VR(vcpu, rs - 32); 1452 *val = reg.vsx32val[vsx_offset]; 1453 } 1454 break; 1455 1456 default: 1457 result = -1; 1458 break; 1459 } 1460 1461 return result; 1462 } 1463 1464 int kvmppc_handle_vsx_store(struct kvm_vcpu *vcpu, 1465 int rs, unsigned int bytes, int is_default_endian) 1466 { 1467 u64 val; 1468 enum emulation_result emulated = EMULATE_DONE; 1469 1470 vcpu->arch.io_gpr = rs; 1471 1472 /* Currently, mmio_vsx_copy_nums only allowed to be 4 or less */ 1473 if (vcpu->arch.mmio_vsx_copy_nums > 4) 1474 return EMULATE_FAIL; 1475 1476 while (vcpu->arch.mmio_vsx_copy_nums) { 1477 if (kvmppc_get_vsr_data(vcpu, rs, &val) == -1) 1478 return EMULATE_FAIL; 1479 1480 emulated = kvmppc_handle_store(vcpu, 1481 val, bytes, is_default_endian); 1482 1483 if (emulated != EMULATE_DONE) 1484 break; 1485 1486 vcpu->arch.paddr_accessed += vcpu->run->mmio.len; 1487 1488 vcpu->arch.mmio_vsx_copy_nums--; 1489 vcpu->arch.mmio_vsx_offset++; 1490 } 1491 1492 return emulated; 1493 } 1494 1495 static int kvmppc_emulate_mmio_vsx_loadstore(struct kvm_vcpu *vcpu) 1496 { 1497 struct kvm_run *run = vcpu->run; 1498 enum emulation_result emulated = EMULATE_FAIL; 1499 int r; 1500 1501 vcpu->arch.paddr_accessed += run->mmio.len; 1502 1503 if (!vcpu->mmio_is_write) { 1504 emulated = kvmppc_handle_vsx_load(vcpu, vcpu->arch.io_gpr, 1505 run->mmio.len, 1, vcpu->arch.mmio_sign_extend); 1506 } else { 1507 emulated = kvmppc_handle_vsx_store(vcpu, 1508 vcpu->arch.io_gpr, run->mmio.len, 1); 1509 } 1510 1511 switch (emulated) { 1512 case EMULATE_DO_MMIO: 1513 run->exit_reason = KVM_EXIT_MMIO; 1514 r = RESUME_HOST; 1515 break; 1516 case EMULATE_FAIL: 1517 pr_info("KVM: MMIO emulation failed (VSX repeat)\n"); 1518 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1519 run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION; 1520 r = RESUME_HOST; 1521 break; 1522 default: 1523 r = RESUME_GUEST; 1524 break; 1525 } 1526 return r; 1527 } 1528 #endif /* CONFIG_VSX */ 1529 1530 #ifdef CONFIG_ALTIVEC 1531 int kvmppc_handle_vmx_load(struct kvm_vcpu *vcpu, 1532 unsigned int rt, unsigned int bytes, int is_default_endian) 1533 { 1534 enum emulation_result emulated = EMULATE_DONE; 1535 1536 if (vcpu->arch.mmio_vmx_copy_nums > 2) 1537 return EMULATE_FAIL; 1538 1539 while (vcpu->arch.mmio_vmx_copy_nums) { 1540 emulated = __kvmppc_handle_load(vcpu, rt, bytes, 1541 is_default_endian, 0); 1542 1543 if (emulated != EMULATE_DONE) 1544 break; 1545 1546 vcpu->arch.paddr_accessed += vcpu->run->mmio.len; 1547 vcpu->arch.mmio_vmx_copy_nums--; 1548 vcpu->arch.mmio_vmx_offset++; 1549 } 1550 1551 return emulated; 1552 } 1553 1554 static int kvmppc_get_vmx_dword(struct kvm_vcpu *vcpu, int index, u64 *val) 1555 { 1556 union kvmppc_one_reg reg; 1557 int vmx_offset = 0; 1558 int result = 0; 1559 1560 vmx_offset = 1561 kvmppc_get_vmx_dword_offset(vcpu, vcpu->arch.mmio_vmx_offset); 1562 1563 if (vmx_offset == -1) 1564 return -1; 1565 1566 reg.vval = VCPU_VSX_VR(vcpu, index); 1567 *val = reg.vsxval[vmx_offset]; 1568 1569 return result; 1570 } 1571 1572 static int kvmppc_get_vmx_word(struct kvm_vcpu *vcpu, int index, u64 *val) 1573 { 1574 union kvmppc_one_reg reg; 1575 int vmx_offset = 0; 1576 int result = 0; 1577 1578 vmx_offset = 1579 kvmppc_get_vmx_word_offset(vcpu, vcpu->arch.mmio_vmx_offset); 1580 1581 if (vmx_offset == -1) 1582 return -1; 1583 1584 reg.vval = VCPU_VSX_VR(vcpu, index); 1585 *val = reg.vsx32val[vmx_offset]; 1586 1587 return result; 1588 } 1589 1590 static int kvmppc_get_vmx_hword(struct kvm_vcpu *vcpu, int index, u64 *val) 1591 { 1592 union kvmppc_one_reg reg; 1593 int vmx_offset = 0; 1594 int result = 0; 1595 1596 vmx_offset = 1597 kvmppc_get_vmx_hword_offset(vcpu, vcpu->arch.mmio_vmx_offset); 1598 1599 if (vmx_offset == -1) 1600 return -1; 1601 1602 reg.vval = VCPU_VSX_VR(vcpu, index); 1603 *val = reg.vsx16val[vmx_offset]; 1604 1605 return result; 1606 } 1607 1608 static int kvmppc_get_vmx_byte(struct kvm_vcpu *vcpu, int index, u64 *val) 1609 { 1610 union kvmppc_one_reg reg; 1611 int vmx_offset = 0; 1612 int result = 0; 1613 1614 vmx_offset = 1615 kvmppc_get_vmx_byte_offset(vcpu, vcpu->arch.mmio_vmx_offset); 1616 1617 if (vmx_offset == -1) 1618 return -1; 1619 1620 reg.vval = VCPU_VSX_VR(vcpu, index); 1621 *val = reg.vsx8val[vmx_offset]; 1622 1623 return result; 1624 } 1625 1626 int kvmppc_handle_vmx_store(struct kvm_vcpu *vcpu, 1627 unsigned int rs, unsigned int bytes, int is_default_endian) 1628 { 1629 u64 val = 0; 1630 unsigned int index = rs & KVM_MMIO_REG_MASK; 1631 enum emulation_result emulated = EMULATE_DONE; 1632 1633 if (vcpu->arch.mmio_vmx_copy_nums > 2) 1634 return EMULATE_FAIL; 1635 1636 vcpu->arch.io_gpr = rs; 1637 1638 while (vcpu->arch.mmio_vmx_copy_nums) { 1639 switch (vcpu->arch.mmio_copy_type) { 1640 case KVMPPC_VMX_COPY_DWORD: 1641 if (kvmppc_get_vmx_dword(vcpu, index, &val) == -1) 1642 return EMULATE_FAIL; 1643 1644 break; 1645 case KVMPPC_VMX_COPY_WORD: 1646 if (kvmppc_get_vmx_word(vcpu, index, &val) == -1) 1647 return EMULATE_FAIL; 1648 break; 1649 case KVMPPC_VMX_COPY_HWORD: 1650 if (kvmppc_get_vmx_hword(vcpu, index, &val) == -1) 1651 return EMULATE_FAIL; 1652 break; 1653 case KVMPPC_VMX_COPY_BYTE: 1654 if (kvmppc_get_vmx_byte(vcpu, index, &val) == -1) 1655 return EMULATE_FAIL; 1656 break; 1657 default: 1658 return EMULATE_FAIL; 1659 } 1660 1661 emulated = kvmppc_handle_store(vcpu, val, bytes, 1662 is_default_endian); 1663 if (emulated != EMULATE_DONE) 1664 break; 1665 1666 vcpu->arch.paddr_accessed += vcpu->run->mmio.len; 1667 vcpu->arch.mmio_vmx_copy_nums--; 1668 vcpu->arch.mmio_vmx_offset++; 1669 } 1670 1671 return emulated; 1672 } 1673 1674 static int kvmppc_emulate_mmio_vmx_loadstore(struct kvm_vcpu *vcpu) 1675 { 1676 struct kvm_run *run = vcpu->run; 1677 enum emulation_result emulated = EMULATE_FAIL; 1678 int r; 1679 1680 vcpu->arch.paddr_accessed += run->mmio.len; 1681 1682 if (!vcpu->mmio_is_write) { 1683 emulated = kvmppc_handle_vmx_load(vcpu, 1684 vcpu->arch.io_gpr, run->mmio.len, 1); 1685 } else { 1686 emulated = kvmppc_handle_vmx_store(vcpu, 1687 vcpu->arch.io_gpr, run->mmio.len, 1); 1688 } 1689 1690 switch (emulated) { 1691 case EMULATE_DO_MMIO: 1692 run->exit_reason = KVM_EXIT_MMIO; 1693 r = RESUME_HOST; 1694 break; 1695 case EMULATE_FAIL: 1696 pr_info("KVM: MMIO emulation failed (VMX repeat)\n"); 1697 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1698 run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION; 1699 r = RESUME_HOST; 1700 break; 1701 default: 1702 r = RESUME_GUEST; 1703 break; 1704 } 1705 return r; 1706 } 1707 #endif /* CONFIG_ALTIVEC */ 1708 1709 int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 1710 { 1711 int r = 0; 1712 union kvmppc_one_reg val; 1713 int size; 1714 1715 size = one_reg_size(reg->id); 1716 if (size > sizeof(val)) 1717 return -EINVAL; 1718 1719 r = kvmppc_get_one_reg(vcpu, reg->id, &val); 1720 if (r == -EINVAL) { 1721 r = 0; 1722 switch (reg->id) { 1723 #ifdef CONFIG_ALTIVEC 1724 case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31: 1725 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { 1726 r = -ENXIO; 1727 break; 1728 } 1729 val.vval = vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0]; 1730 break; 1731 case KVM_REG_PPC_VSCR: 1732 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { 1733 r = -ENXIO; 1734 break; 1735 } 1736 val = get_reg_val(reg->id, vcpu->arch.vr.vscr.u[3]); 1737 break; 1738 case KVM_REG_PPC_VRSAVE: 1739 val = get_reg_val(reg->id, vcpu->arch.vrsave); 1740 break; 1741 #endif /* CONFIG_ALTIVEC */ 1742 default: 1743 r = -EINVAL; 1744 break; 1745 } 1746 } 1747 1748 if (r) 1749 return r; 1750 1751 if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size)) 1752 r = -EFAULT; 1753 1754 return r; 1755 } 1756 1757 int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 1758 { 1759 int r; 1760 union kvmppc_one_reg val; 1761 int size; 1762 1763 size = one_reg_size(reg->id); 1764 if (size > sizeof(val)) 1765 return -EINVAL; 1766 1767 if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size)) 1768 return -EFAULT; 1769 1770 r = kvmppc_set_one_reg(vcpu, reg->id, &val); 1771 if (r == -EINVAL) { 1772 r = 0; 1773 switch (reg->id) { 1774 #ifdef CONFIG_ALTIVEC 1775 case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31: 1776 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { 1777 r = -ENXIO; 1778 break; 1779 } 1780 vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0] = val.vval; 1781 break; 1782 case KVM_REG_PPC_VSCR: 1783 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { 1784 r = -ENXIO; 1785 break; 1786 } 1787 vcpu->arch.vr.vscr.u[3] = set_reg_val(reg->id, val); 1788 break; 1789 case KVM_REG_PPC_VRSAVE: 1790 if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { 1791 r = -ENXIO; 1792 break; 1793 } 1794 vcpu->arch.vrsave = set_reg_val(reg->id, val); 1795 break; 1796 #endif /* CONFIG_ALTIVEC */ 1797 default: 1798 r = -EINVAL; 1799 break; 1800 } 1801 } 1802 1803 return r; 1804 } 1805 1806 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu) 1807 { 1808 struct kvm_run *run = vcpu->run; 1809 int r; 1810 1811 vcpu_load(vcpu); 1812 1813 if (vcpu->mmio_needed) { 1814 vcpu->mmio_needed = 0; 1815 if (!vcpu->mmio_is_write) 1816 kvmppc_complete_mmio_load(vcpu); 1817 #ifdef CONFIG_VSX 1818 if (vcpu->arch.mmio_vsx_copy_nums > 0) { 1819 vcpu->arch.mmio_vsx_copy_nums--; 1820 vcpu->arch.mmio_vsx_offset++; 1821 } 1822 1823 if (vcpu->arch.mmio_vsx_copy_nums > 0) { 1824 r = kvmppc_emulate_mmio_vsx_loadstore(vcpu); 1825 if (r == RESUME_HOST) { 1826 vcpu->mmio_needed = 1; 1827 goto out; 1828 } 1829 } 1830 #endif 1831 #ifdef CONFIG_ALTIVEC 1832 if (vcpu->arch.mmio_vmx_copy_nums > 0) { 1833 vcpu->arch.mmio_vmx_copy_nums--; 1834 vcpu->arch.mmio_vmx_offset++; 1835 } 1836 1837 if (vcpu->arch.mmio_vmx_copy_nums > 0) { 1838 r = kvmppc_emulate_mmio_vmx_loadstore(vcpu); 1839 if (r == RESUME_HOST) { 1840 vcpu->mmio_needed = 1; 1841 goto out; 1842 } 1843 } 1844 #endif 1845 } else if (vcpu->arch.osi_needed) { 1846 u64 *gprs = run->osi.gprs; 1847 int i; 1848 1849 for (i = 0; i < 32; i++) 1850 kvmppc_set_gpr(vcpu, i, gprs[i]); 1851 vcpu->arch.osi_needed = 0; 1852 } else if (vcpu->arch.hcall_needed) { 1853 int i; 1854 1855 kvmppc_set_gpr(vcpu, 3, run->papr_hcall.ret); 1856 for (i = 0; i < 9; ++i) 1857 kvmppc_set_gpr(vcpu, 4 + i, run->papr_hcall.args[i]); 1858 vcpu->arch.hcall_needed = 0; 1859 #ifdef CONFIG_BOOKE 1860 } else if (vcpu->arch.epr_needed) { 1861 kvmppc_set_epr(vcpu, run->epr.epr); 1862 vcpu->arch.epr_needed = 0; 1863 #endif 1864 } 1865 1866 kvm_sigset_activate(vcpu); 1867 1868 if (run->immediate_exit) 1869 r = -EINTR; 1870 else 1871 r = kvmppc_vcpu_run(vcpu); 1872 1873 kvm_sigset_deactivate(vcpu); 1874 1875 #ifdef CONFIG_ALTIVEC 1876 out: 1877 #endif 1878 1879 /* 1880 * We're already returning to userspace, don't pass the 1881 * RESUME_HOST flags along. 1882 */ 1883 if (r > 0) 1884 r = 0; 1885 1886 vcpu_put(vcpu); 1887 return r; 1888 } 1889 1890 int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq) 1891 { 1892 if (irq->irq == KVM_INTERRUPT_UNSET) { 1893 kvmppc_core_dequeue_external(vcpu); 1894 return 0; 1895 } 1896 1897 kvmppc_core_queue_external(vcpu, irq); 1898 1899 kvm_vcpu_kick(vcpu); 1900 1901 return 0; 1902 } 1903 1904 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu, 1905 struct kvm_enable_cap *cap) 1906 { 1907 int r; 1908 1909 if (cap->flags) 1910 return -EINVAL; 1911 1912 switch (cap->cap) { 1913 case KVM_CAP_PPC_OSI: 1914 r = 0; 1915 vcpu->arch.osi_enabled = true; 1916 break; 1917 case KVM_CAP_PPC_PAPR: 1918 r = 0; 1919 vcpu->arch.papr_enabled = true; 1920 break; 1921 case KVM_CAP_PPC_EPR: 1922 r = 0; 1923 if (cap->args[0]) 1924 vcpu->arch.epr_flags |= KVMPPC_EPR_USER; 1925 else 1926 vcpu->arch.epr_flags &= ~KVMPPC_EPR_USER; 1927 break; 1928 #ifdef CONFIG_BOOKE 1929 case KVM_CAP_PPC_BOOKE_WATCHDOG: 1930 r = 0; 1931 vcpu->arch.watchdog_enabled = true; 1932 break; 1933 #endif 1934 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 1935 case KVM_CAP_SW_TLB: { 1936 struct kvm_config_tlb cfg; 1937 void __user *user_ptr = (void __user *)(uintptr_t)cap->args[0]; 1938 1939 r = -EFAULT; 1940 if (copy_from_user(&cfg, user_ptr, sizeof(cfg))) 1941 break; 1942 1943 r = kvm_vcpu_ioctl_config_tlb(vcpu, &cfg); 1944 break; 1945 } 1946 #endif 1947 #ifdef CONFIG_KVM_MPIC 1948 case KVM_CAP_IRQ_MPIC: { 1949 struct fd f; 1950 struct kvm_device *dev; 1951 1952 r = -EBADF; 1953 f = fdget(cap->args[0]); 1954 if (!f.file) 1955 break; 1956 1957 r = -EPERM; 1958 dev = kvm_device_from_filp(f.file); 1959 if (dev) 1960 r = kvmppc_mpic_connect_vcpu(dev, vcpu, cap->args[1]); 1961 1962 fdput(f); 1963 break; 1964 } 1965 #endif 1966 #ifdef CONFIG_KVM_XICS 1967 case KVM_CAP_IRQ_XICS: { 1968 struct fd f; 1969 struct kvm_device *dev; 1970 1971 r = -EBADF; 1972 f = fdget(cap->args[0]); 1973 if (!f.file) 1974 break; 1975 1976 r = -EPERM; 1977 dev = kvm_device_from_filp(f.file); 1978 if (dev) { 1979 if (xics_on_xive()) 1980 r = kvmppc_xive_connect_vcpu(dev, vcpu, cap->args[1]); 1981 else 1982 r = kvmppc_xics_connect_vcpu(dev, vcpu, cap->args[1]); 1983 } 1984 1985 fdput(f); 1986 break; 1987 } 1988 #endif /* CONFIG_KVM_XICS */ 1989 #ifdef CONFIG_KVM_XIVE 1990 case KVM_CAP_PPC_IRQ_XIVE: { 1991 struct fd f; 1992 struct kvm_device *dev; 1993 1994 r = -EBADF; 1995 f = fdget(cap->args[0]); 1996 if (!f.file) 1997 break; 1998 1999 r = -ENXIO; 2000 if (!xive_enabled()) 2001 break; 2002 2003 r = -EPERM; 2004 dev = kvm_device_from_filp(f.file); 2005 if (dev) 2006 r = kvmppc_xive_native_connect_vcpu(dev, vcpu, 2007 cap->args[1]); 2008 2009 fdput(f); 2010 break; 2011 } 2012 #endif /* CONFIG_KVM_XIVE */ 2013 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE 2014 case KVM_CAP_PPC_FWNMI: 2015 r = -EINVAL; 2016 if (!is_kvmppc_hv_enabled(vcpu->kvm)) 2017 break; 2018 r = 0; 2019 vcpu->kvm->arch.fwnmi_enabled = true; 2020 break; 2021 #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ 2022 default: 2023 r = -EINVAL; 2024 break; 2025 } 2026 2027 if (!r) 2028 r = kvmppc_sanity_check(vcpu); 2029 2030 return r; 2031 } 2032 2033 bool kvm_arch_intc_initialized(struct kvm *kvm) 2034 { 2035 #ifdef CONFIG_KVM_MPIC 2036 if (kvm->arch.mpic) 2037 return true; 2038 #endif 2039 #ifdef CONFIG_KVM_XICS 2040 if (kvm->arch.xics || kvm->arch.xive) 2041 return true; 2042 #endif 2043 return false; 2044 } 2045 2046 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu, 2047 struct kvm_mp_state *mp_state) 2048 { 2049 return -EINVAL; 2050 } 2051 2052 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu, 2053 struct kvm_mp_state *mp_state) 2054 { 2055 return -EINVAL; 2056 } 2057 2058 long kvm_arch_vcpu_async_ioctl(struct file *filp, 2059 unsigned int ioctl, unsigned long arg) 2060 { 2061 struct kvm_vcpu *vcpu = filp->private_data; 2062 void __user *argp = (void __user *)arg; 2063 2064 if (ioctl == KVM_INTERRUPT) { 2065 struct kvm_interrupt irq; 2066 if (copy_from_user(&irq, argp, sizeof(irq))) 2067 return -EFAULT; 2068 return kvm_vcpu_ioctl_interrupt(vcpu, &irq); 2069 } 2070 return -ENOIOCTLCMD; 2071 } 2072 2073 long kvm_arch_vcpu_ioctl(struct file *filp, 2074 unsigned int ioctl, unsigned long arg) 2075 { 2076 struct kvm_vcpu *vcpu = filp->private_data; 2077 void __user *argp = (void __user *)arg; 2078 long r; 2079 2080 switch (ioctl) { 2081 case KVM_ENABLE_CAP: 2082 { 2083 struct kvm_enable_cap cap; 2084 r = -EFAULT; 2085 if (copy_from_user(&cap, argp, sizeof(cap))) 2086 goto out; 2087 vcpu_load(vcpu); 2088 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap); 2089 vcpu_put(vcpu); 2090 break; 2091 } 2092 2093 case KVM_SET_ONE_REG: 2094 case KVM_GET_ONE_REG: 2095 { 2096 struct kvm_one_reg reg; 2097 r = -EFAULT; 2098 if (copy_from_user(®, argp, sizeof(reg))) 2099 goto out; 2100 if (ioctl == KVM_SET_ONE_REG) 2101 r = kvm_vcpu_ioctl_set_one_reg(vcpu, ®); 2102 else 2103 r = kvm_vcpu_ioctl_get_one_reg(vcpu, ®); 2104 break; 2105 } 2106 2107 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 2108 case KVM_DIRTY_TLB: { 2109 struct kvm_dirty_tlb dirty; 2110 r = -EFAULT; 2111 if (copy_from_user(&dirty, argp, sizeof(dirty))) 2112 goto out; 2113 vcpu_load(vcpu); 2114 r = kvm_vcpu_ioctl_dirty_tlb(vcpu, &dirty); 2115 vcpu_put(vcpu); 2116 break; 2117 } 2118 #endif 2119 default: 2120 r = -EINVAL; 2121 } 2122 2123 out: 2124 return r; 2125 } 2126 2127 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf) 2128 { 2129 return VM_FAULT_SIGBUS; 2130 } 2131 2132 static int kvm_vm_ioctl_get_pvinfo(struct kvm_ppc_pvinfo *pvinfo) 2133 { 2134 u32 inst_nop = 0x60000000; 2135 #ifdef CONFIG_KVM_BOOKE_HV 2136 u32 inst_sc1 = 0x44000022; 2137 pvinfo->hcall[0] = cpu_to_be32(inst_sc1); 2138 pvinfo->hcall[1] = cpu_to_be32(inst_nop); 2139 pvinfo->hcall[2] = cpu_to_be32(inst_nop); 2140 pvinfo->hcall[3] = cpu_to_be32(inst_nop); 2141 #else 2142 u32 inst_lis = 0x3c000000; 2143 u32 inst_ori = 0x60000000; 2144 u32 inst_sc = 0x44000002; 2145 u32 inst_imm_mask = 0xffff; 2146 2147 /* 2148 * The hypercall to get into KVM from within guest context is as 2149 * follows: 2150 * 2151 * lis r0, r0, KVM_SC_MAGIC_R0@h 2152 * ori r0, KVM_SC_MAGIC_R0@l 2153 * sc 2154 * nop 2155 */ 2156 pvinfo->hcall[0] = cpu_to_be32(inst_lis | ((KVM_SC_MAGIC_R0 >> 16) & inst_imm_mask)); 2157 pvinfo->hcall[1] = cpu_to_be32(inst_ori | (KVM_SC_MAGIC_R0 & inst_imm_mask)); 2158 pvinfo->hcall[2] = cpu_to_be32(inst_sc); 2159 pvinfo->hcall[3] = cpu_to_be32(inst_nop); 2160 #endif 2161 2162 pvinfo->flags = KVM_PPC_PVINFO_FLAGS_EV_IDLE; 2163 2164 return 0; 2165 } 2166 2167 bool kvm_arch_irqchip_in_kernel(struct kvm *kvm) 2168 { 2169 int ret = 0; 2170 2171 #ifdef CONFIG_KVM_MPIC 2172 ret = ret || (kvm->arch.mpic != NULL); 2173 #endif 2174 #ifdef CONFIG_KVM_XICS 2175 ret = ret || (kvm->arch.xics != NULL); 2176 ret = ret || (kvm->arch.xive != NULL); 2177 #endif 2178 smp_rmb(); 2179 return ret; 2180 } 2181 2182 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event, 2183 bool line_status) 2184 { 2185 if (!kvm_arch_irqchip_in_kernel(kvm)) 2186 return -ENXIO; 2187 2188 irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID, 2189 irq_event->irq, irq_event->level, 2190 line_status); 2191 return 0; 2192 } 2193 2194 2195 int kvm_vm_ioctl_enable_cap(struct kvm *kvm, 2196 struct kvm_enable_cap *cap) 2197 { 2198 int r; 2199 2200 if (cap->flags) 2201 return -EINVAL; 2202 2203 switch (cap->cap) { 2204 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER 2205 case KVM_CAP_PPC_ENABLE_HCALL: { 2206 unsigned long hcall = cap->args[0]; 2207 2208 r = -EINVAL; 2209 if (hcall > MAX_HCALL_OPCODE || (hcall & 3) || 2210 cap->args[1] > 1) 2211 break; 2212 if (!kvmppc_book3s_hcall_implemented(kvm, hcall)) 2213 break; 2214 if (cap->args[1]) 2215 set_bit(hcall / 4, kvm->arch.enabled_hcalls); 2216 else 2217 clear_bit(hcall / 4, kvm->arch.enabled_hcalls); 2218 r = 0; 2219 break; 2220 } 2221 case KVM_CAP_PPC_SMT: { 2222 unsigned long mode = cap->args[0]; 2223 unsigned long flags = cap->args[1]; 2224 2225 r = -EINVAL; 2226 if (kvm->arch.kvm_ops->set_smt_mode) 2227 r = kvm->arch.kvm_ops->set_smt_mode(kvm, mode, flags); 2228 break; 2229 } 2230 2231 case KVM_CAP_PPC_NESTED_HV: 2232 r = -EINVAL; 2233 if (!is_kvmppc_hv_enabled(kvm) || 2234 !kvm->arch.kvm_ops->enable_nested) 2235 break; 2236 r = kvm->arch.kvm_ops->enable_nested(kvm); 2237 break; 2238 #endif 2239 #if defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE) 2240 case KVM_CAP_PPC_SECURE_GUEST: 2241 r = -EINVAL; 2242 if (!is_kvmppc_hv_enabled(kvm) || !kvm->arch.kvm_ops->enable_svm) 2243 break; 2244 r = kvm->arch.kvm_ops->enable_svm(kvm); 2245 break; 2246 case KVM_CAP_PPC_DAWR1: 2247 r = -EINVAL; 2248 if (!is_kvmppc_hv_enabled(kvm) || !kvm->arch.kvm_ops->enable_dawr1) 2249 break; 2250 r = kvm->arch.kvm_ops->enable_dawr1(kvm); 2251 break; 2252 #endif 2253 default: 2254 r = -EINVAL; 2255 break; 2256 } 2257 2258 return r; 2259 } 2260 2261 #ifdef CONFIG_PPC_BOOK3S_64 2262 /* 2263 * These functions check whether the underlying hardware is safe 2264 * against attacks based on observing the effects of speculatively 2265 * executed instructions, and whether it supplies instructions for 2266 * use in workarounds. The information comes from firmware, either 2267 * via the device tree on powernv platforms or from an hcall on 2268 * pseries platforms. 2269 */ 2270 #ifdef CONFIG_PPC_PSERIES 2271 static int pseries_get_cpu_char(struct kvm_ppc_cpu_char *cp) 2272 { 2273 struct h_cpu_char_result c; 2274 unsigned long rc; 2275 2276 if (!machine_is(pseries)) 2277 return -ENOTTY; 2278 2279 rc = plpar_get_cpu_characteristics(&c); 2280 if (rc == H_SUCCESS) { 2281 cp->character = c.character; 2282 cp->behaviour = c.behaviour; 2283 cp->character_mask = KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31 | 2284 KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED | 2285 KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30 | 2286 KVM_PPC_CPU_CHAR_L1D_FLUSH_TRIG2 | 2287 KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV | 2288 KVM_PPC_CPU_CHAR_BR_HINT_HONOURED | 2289 KVM_PPC_CPU_CHAR_MTTRIG_THR_RECONF | 2290 KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS | 2291 KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST; 2292 cp->behaviour_mask = KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY | 2293 KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR | 2294 KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR | 2295 KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE; 2296 } 2297 return 0; 2298 } 2299 #else 2300 static int pseries_get_cpu_char(struct kvm_ppc_cpu_char *cp) 2301 { 2302 return -ENOTTY; 2303 } 2304 #endif 2305 2306 static inline bool have_fw_feat(struct device_node *fw_features, 2307 const char *state, const char *name) 2308 { 2309 struct device_node *np; 2310 bool r = false; 2311 2312 np = of_get_child_by_name(fw_features, name); 2313 if (np) { 2314 r = of_property_read_bool(np, state); 2315 of_node_put(np); 2316 } 2317 return r; 2318 } 2319 2320 static int kvmppc_get_cpu_char(struct kvm_ppc_cpu_char *cp) 2321 { 2322 struct device_node *np, *fw_features; 2323 int r; 2324 2325 memset(cp, 0, sizeof(*cp)); 2326 r = pseries_get_cpu_char(cp); 2327 if (r != -ENOTTY) 2328 return r; 2329 2330 np = of_find_node_by_name(NULL, "ibm,opal"); 2331 if (np) { 2332 fw_features = of_get_child_by_name(np, "fw-features"); 2333 of_node_put(np); 2334 if (!fw_features) 2335 return 0; 2336 if (have_fw_feat(fw_features, "enabled", 2337 "inst-spec-barrier-ori31,31,0")) 2338 cp->character |= KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31; 2339 if (have_fw_feat(fw_features, "enabled", 2340 "fw-bcctrl-serialized")) 2341 cp->character |= KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED; 2342 if (have_fw_feat(fw_features, "enabled", 2343 "inst-l1d-flush-ori30,30,0")) 2344 cp->character |= KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30; 2345 if (have_fw_feat(fw_features, "enabled", 2346 "inst-l1d-flush-trig2")) 2347 cp->character |= KVM_PPC_CPU_CHAR_L1D_FLUSH_TRIG2; 2348 if (have_fw_feat(fw_features, "enabled", 2349 "fw-l1d-thread-split")) 2350 cp->character |= KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV; 2351 if (have_fw_feat(fw_features, "enabled", 2352 "fw-count-cache-disabled")) 2353 cp->character |= KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS; 2354 if (have_fw_feat(fw_features, "enabled", 2355 "fw-count-cache-flush-bcctr2,0,0")) 2356 cp->character |= KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST; 2357 cp->character_mask = KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31 | 2358 KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED | 2359 KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30 | 2360 KVM_PPC_CPU_CHAR_L1D_FLUSH_TRIG2 | 2361 KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV | 2362 KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS | 2363 KVM_PPC_CPU_CHAR_BCCTR_FLUSH_ASSIST; 2364 2365 if (have_fw_feat(fw_features, "enabled", 2366 "speculation-policy-favor-security")) 2367 cp->behaviour |= KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY; 2368 if (!have_fw_feat(fw_features, "disabled", 2369 "needs-l1d-flush-msr-pr-0-to-1")) 2370 cp->behaviour |= KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR; 2371 if (!have_fw_feat(fw_features, "disabled", 2372 "needs-spec-barrier-for-bound-checks")) 2373 cp->behaviour |= KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR; 2374 if (have_fw_feat(fw_features, "enabled", 2375 "needs-count-cache-flush-on-context-switch")) 2376 cp->behaviour |= KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE; 2377 cp->behaviour_mask = KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY | 2378 KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR | 2379 KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR | 2380 KVM_PPC_CPU_BEHAV_FLUSH_COUNT_CACHE; 2381 2382 of_node_put(fw_features); 2383 } 2384 2385 return 0; 2386 } 2387 #endif 2388 2389 long kvm_arch_vm_ioctl(struct file *filp, 2390 unsigned int ioctl, unsigned long arg) 2391 { 2392 struct kvm *kvm __maybe_unused = filp->private_data; 2393 void __user *argp = (void __user *)arg; 2394 long r; 2395 2396 switch (ioctl) { 2397 case KVM_PPC_GET_PVINFO: { 2398 struct kvm_ppc_pvinfo pvinfo; 2399 memset(&pvinfo, 0, sizeof(pvinfo)); 2400 r = kvm_vm_ioctl_get_pvinfo(&pvinfo); 2401 if (copy_to_user(argp, &pvinfo, sizeof(pvinfo))) { 2402 r = -EFAULT; 2403 goto out; 2404 } 2405 2406 break; 2407 } 2408 #ifdef CONFIG_SPAPR_TCE_IOMMU 2409 case KVM_CREATE_SPAPR_TCE_64: { 2410 struct kvm_create_spapr_tce_64 create_tce_64; 2411 2412 r = -EFAULT; 2413 if (copy_from_user(&create_tce_64, argp, sizeof(create_tce_64))) 2414 goto out; 2415 if (create_tce_64.flags) { 2416 r = -EINVAL; 2417 goto out; 2418 } 2419 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64); 2420 goto out; 2421 } 2422 case KVM_CREATE_SPAPR_TCE: { 2423 struct kvm_create_spapr_tce create_tce; 2424 struct kvm_create_spapr_tce_64 create_tce_64; 2425 2426 r = -EFAULT; 2427 if (copy_from_user(&create_tce, argp, sizeof(create_tce))) 2428 goto out; 2429 2430 create_tce_64.liobn = create_tce.liobn; 2431 create_tce_64.page_shift = IOMMU_PAGE_SHIFT_4K; 2432 create_tce_64.offset = 0; 2433 create_tce_64.size = create_tce.window_size >> 2434 IOMMU_PAGE_SHIFT_4K; 2435 create_tce_64.flags = 0; 2436 r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64); 2437 goto out; 2438 } 2439 #endif 2440 #ifdef CONFIG_PPC_BOOK3S_64 2441 case KVM_PPC_GET_SMMU_INFO: { 2442 struct kvm_ppc_smmu_info info; 2443 struct kvm *kvm = filp->private_data; 2444 2445 memset(&info, 0, sizeof(info)); 2446 r = kvm->arch.kvm_ops->get_smmu_info(kvm, &info); 2447 if (r >= 0 && copy_to_user(argp, &info, sizeof(info))) 2448 r = -EFAULT; 2449 break; 2450 } 2451 case KVM_PPC_RTAS_DEFINE_TOKEN: { 2452 struct kvm *kvm = filp->private_data; 2453 2454 r = kvm_vm_ioctl_rtas_define_token(kvm, argp); 2455 break; 2456 } 2457 case KVM_PPC_CONFIGURE_V3_MMU: { 2458 struct kvm *kvm = filp->private_data; 2459 struct kvm_ppc_mmuv3_cfg cfg; 2460 2461 r = -EINVAL; 2462 if (!kvm->arch.kvm_ops->configure_mmu) 2463 goto out; 2464 r = -EFAULT; 2465 if (copy_from_user(&cfg, argp, sizeof(cfg))) 2466 goto out; 2467 r = kvm->arch.kvm_ops->configure_mmu(kvm, &cfg); 2468 break; 2469 } 2470 case KVM_PPC_GET_RMMU_INFO: { 2471 struct kvm *kvm = filp->private_data; 2472 struct kvm_ppc_rmmu_info info; 2473 2474 r = -EINVAL; 2475 if (!kvm->arch.kvm_ops->get_rmmu_info) 2476 goto out; 2477 r = kvm->arch.kvm_ops->get_rmmu_info(kvm, &info); 2478 if (r >= 0 && copy_to_user(argp, &info, sizeof(info))) 2479 r = -EFAULT; 2480 break; 2481 } 2482 case KVM_PPC_GET_CPU_CHAR: { 2483 struct kvm_ppc_cpu_char cpuchar; 2484 2485 r = kvmppc_get_cpu_char(&cpuchar); 2486 if (r >= 0 && copy_to_user(argp, &cpuchar, sizeof(cpuchar))) 2487 r = -EFAULT; 2488 break; 2489 } 2490 case KVM_PPC_SVM_OFF: { 2491 struct kvm *kvm = filp->private_data; 2492 2493 r = 0; 2494 if (!kvm->arch.kvm_ops->svm_off) 2495 goto out; 2496 2497 r = kvm->arch.kvm_ops->svm_off(kvm); 2498 break; 2499 } 2500 default: { 2501 struct kvm *kvm = filp->private_data; 2502 r = kvm->arch.kvm_ops->arch_vm_ioctl(filp, ioctl, arg); 2503 } 2504 #else /* CONFIG_PPC_BOOK3S_64 */ 2505 default: 2506 r = -ENOTTY; 2507 #endif 2508 } 2509 out: 2510 return r; 2511 } 2512 2513 static DEFINE_IDA(lpid_inuse); 2514 static unsigned long nr_lpids; 2515 2516 long kvmppc_alloc_lpid(void) 2517 { 2518 int lpid; 2519 2520 /* The host LPID must always be 0 (allocation starts at 1) */ 2521 lpid = ida_alloc_range(&lpid_inuse, 1, nr_lpids - 1, GFP_KERNEL); 2522 if (lpid < 0) { 2523 if (lpid == -ENOMEM) 2524 pr_err("%s: Out of memory\n", __func__); 2525 else 2526 pr_err("%s: No LPIDs free\n", __func__); 2527 return -ENOMEM; 2528 } 2529 2530 return lpid; 2531 } 2532 EXPORT_SYMBOL_GPL(kvmppc_alloc_lpid); 2533 2534 void kvmppc_free_lpid(long lpid) 2535 { 2536 ida_free(&lpid_inuse, lpid); 2537 } 2538 EXPORT_SYMBOL_GPL(kvmppc_free_lpid); 2539 2540 /* nr_lpids_param includes the host LPID */ 2541 void kvmppc_init_lpid(unsigned long nr_lpids_param) 2542 { 2543 nr_lpids = nr_lpids_param; 2544 } 2545 EXPORT_SYMBOL_GPL(kvmppc_init_lpid); 2546 2547 int kvm_arch_init(void *opaque) 2548 { 2549 return 0; 2550 } 2551 2552 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ppc_instr); 2553 2554 void kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu, struct dentry *debugfs_dentry) 2555 { 2556 if (vcpu->kvm->arch.kvm_ops->create_vcpu_debugfs) 2557 vcpu->kvm->arch.kvm_ops->create_vcpu_debugfs(vcpu, debugfs_dentry); 2558 } 2559 2560 int kvm_arch_create_vm_debugfs(struct kvm *kvm) 2561 { 2562 if (kvm->arch.kvm_ops->create_vm_debugfs) 2563 kvm->arch.kvm_ops->create_vm_debugfs(kvm); 2564 return 0; 2565 } 2566