1 /* 2 * Copyright (C) 2010,2012 Freescale Semiconductor, Inc. All rights reserved. 3 * 4 * Author: Varun Sethi, <varun.sethi@freescale.com> 5 * 6 * Description: 7 * This file is derived from arch/powerpc/kvm/e500.c, 8 * by Yu Liu <yu.liu@freescale.com>. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License, version 2, as 12 * published by the Free Software Foundation. 13 */ 14 15 #include <linux/kvm_host.h> 16 #include <linux/slab.h> 17 #include <linux/err.h> 18 #include <linux/export.h> 19 #include <linux/miscdevice.h> 20 #include <linux/module.h> 21 22 #include <asm/reg.h> 23 #include <asm/cputable.h> 24 #include <asm/kvm_ppc.h> 25 #include <asm/dbell.h> 26 27 #include "booke.h" 28 #include "e500.h" 29 30 void kvmppc_set_pending_interrupt(struct kvm_vcpu *vcpu, enum int_class type) 31 { 32 enum ppc_dbell dbell_type; 33 unsigned long tag; 34 35 switch (type) { 36 case INT_CLASS_NONCRIT: 37 dbell_type = PPC_G_DBELL; 38 break; 39 case INT_CLASS_CRIT: 40 dbell_type = PPC_G_DBELL_CRIT; 41 break; 42 case INT_CLASS_MC: 43 dbell_type = PPC_G_DBELL_MC; 44 break; 45 default: 46 WARN_ONCE(1, "%s: unknown int type %d\n", __func__, type); 47 return; 48 } 49 50 preempt_disable(); 51 tag = PPC_DBELL_LPID(get_lpid(vcpu)) | vcpu->vcpu_id; 52 mb(); 53 ppc_msgsnd(dbell_type, 0, tag); 54 preempt_enable(); 55 } 56 57 /* gtlbe must not be mapped by more than one host tlb entry */ 58 void kvmppc_e500_tlbil_one(struct kvmppc_vcpu_e500 *vcpu_e500, 59 struct kvm_book3e_206_tlb_entry *gtlbe) 60 { 61 unsigned int tid, ts; 62 gva_t eaddr; 63 u32 val; 64 unsigned long flags; 65 66 ts = get_tlb_ts(gtlbe); 67 tid = get_tlb_tid(gtlbe); 68 69 /* We search the host TLB to invalidate its shadow TLB entry */ 70 val = (tid << 16) | ts; 71 eaddr = get_tlb_eaddr(gtlbe); 72 73 local_irq_save(flags); 74 75 mtspr(SPRN_MAS6, val); 76 mtspr(SPRN_MAS5, MAS5_SGS | get_lpid(&vcpu_e500->vcpu)); 77 78 asm volatile("tlbsx 0, %[eaddr]\n" : : [eaddr] "r" (eaddr)); 79 val = mfspr(SPRN_MAS1); 80 if (val & MAS1_VALID) { 81 mtspr(SPRN_MAS1, val & ~MAS1_VALID); 82 asm volatile("tlbwe"); 83 } 84 mtspr(SPRN_MAS5, 0); 85 /* NOTE: tlbsx also updates mas8, so clear it for host tlbwe */ 86 mtspr(SPRN_MAS8, 0); 87 isync(); 88 89 local_irq_restore(flags); 90 } 91 92 void kvmppc_e500_tlbil_all(struct kvmppc_vcpu_e500 *vcpu_e500) 93 { 94 unsigned long flags; 95 96 local_irq_save(flags); 97 mtspr(SPRN_MAS5, MAS5_SGS | get_lpid(&vcpu_e500->vcpu)); 98 asm volatile("tlbilxlpid"); 99 mtspr(SPRN_MAS5, 0); 100 local_irq_restore(flags); 101 } 102 103 void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid) 104 { 105 vcpu->arch.pid = pid; 106 } 107 108 void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr) 109 { 110 } 111 112 /* We use two lpids per VM */ 113 static DEFINE_PER_CPU(struct kvm_vcpu *[KVMPPC_NR_LPIDS], last_vcpu_of_lpid); 114 115 static void kvmppc_core_vcpu_load_e500mc(struct kvm_vcpu *vcpu, int cpu) 116 { 117 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); 118 119 kvmppc_booke_vcpu_load(vcpu, cpu); 120 121 mtspr(SPRN_LPID, get_lpid(vcpu)); 122 mtspr(SPRN_EPCR, vcpu->arch.shadow_epcr); 123 mtspr(SPRN_GPIR, vcpu->vcpu_id); 124 mtspr(SPRN_MSRP, vcpu->arch.shadow_msrp); 125 vcpu->arch.eplc = EPC_EGS | (get_lpid(vcpu) << EPC_ELPID_SHIFT); 126 vcpu->arch.epsc = vcpu->arch.eplc; 127 mtspr(SPRN_EPLC, vcpu->arch.eplc); 128 mtspr(SPRN_EPSC, vcpu->arch.epsc); 129 130 mtspr(SPRN_GIVPR, vcpu->arch.ivpr); 131 mtspr(SPRN_GIVOR2, vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]); 132 mtspr(SPRN_GIVOR8, vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]); 133 mtspr(SPRN_GSPRG0, (unsigned long)vcpu->arch.shared->sprg0); 134 mtspr(SPRN_GSPRG1, (unsigned long)vcpu->arch.shared->sprg1); 135 mtspr(SPRN_GSPRG2, (unsigned long)vcpu->arch.shared->sprg2); 136 mtspr(SPRN_GSPRG3, (unsigned long)vcpu->arch.shared->sprg3); 137 138 mtspr(SPRN_GSRR0, vcpu->arch.shared->srr0); 139 mtspr(SPRN_GSRR1, vcpu->arch.shared->srr1); 140 141 mtspr(SPRN_GEPR, vcpu->arch.epr); 142 mtspr(SPRN_GDEAR, vcpu->arch.shared->dar); 143 mtspr(SPRN_GESR, vcpu->arch.shared->esr); 144 145 if (vcpu->arch.oldpir != mfspr(SPRN_PIR) || 146 __this_cpu_read(last_vcpu_of_lpid[get_lpid(vcpu)]) != vcpu) { 147 kvmppc_e500_tlbil_all(vcpu_e500); 148 __this_cpu_write(last_vcpu_of_lpid[get_lpid(vcpu)], vcpu); 149 } 150 } 151 152 static void kvmppc_core_vcpu_put_e500mc(struct kvm_vcpu *vcpu) 153 { 154 vcpu->arch.eplc = mfspr(SPRN_EPLC); 155 vcpu->arch.epsc = mfspr(SPRN_EPSC); 156 157 vcpu->arch.shared->sprg0 = mfspr(SPRN_GSPRG0); 158 vcpu->arch.shared->sprg1 = mfspr(SPRN_GSPRG1); 159 vcpu->arch.shared->sprg2 = mfspr(SPRN_GSPRG2); 160 vcpu->arch.shared->sprg3 = mfspr(SPRN_GSPRG3); 161 162 vcpu->arch.shared->srr0 = mfspr(SPRN_GSRR0); 163 vcpu->arch.shared->srr1 = mfspr(SPRN_GSRR1); 164 165 vcpu->arch.epr = mfspr(SPRN_GEPR); 166 vcpu->arch.shared->dar = mfspr(SPRN_GDEAR); 167 vcpu->arch.shared->esr = mfspr(SPRN_GESR); 168 169 vcpu->arch.oldpir = mfspr(SPRN_PIR); 170 171 kvmppc_booke_vcpu_put(vcpu); 172 } 173 174 int kvmppc_core_check_processor_compat(void) 175 { 176 int r; 177 178 if (strcmp(cur_cpu_spec->cpu_name, "e500mc") == 0) 179 r = 0; 180 else if (strcmp(cur_cpu_spec->cpu_name, "e5500") == 0) 181 r = 0; 182 #ifdef CONFIG_ALTIVEC 183 /* 184 * Since guests have the privilege to enable AltiVec, we need AltiVec 185 * support in the host to save/restore their context. 186 * Don't use CPU_FTR_ALTIVEC to identify cores with AltiVec unit 187 * because it's cleared in the absence of CONFIG_ALTIVEC! 188 */ 189 else if (strcmp(cur_cpu_spec->cpu_name, "e6500") == 0) 190 r = 0; 191 #endif 192 else 193 r = -ENOTSUPP; 194 195 return r; 196 } 197 198 int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu) 199 { 200 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); 201 202 vcpu->arch.shadow_epcr = SPRN_EPCR_DSIGS | SPRN_EPCR_DGTMI | \ 203 SPRN_EPCR_DUVD; 204 #ifdef CONFIG_64BIT 205 vcpu->arch.shadow_epcr |= SPRN_EPCR_ICM; 206 #endif 207 vcpu->arch.shadow_msrp = MSRP_UCLEP | MSRP_PMMP; 208 209 vcpu->arch.pvr = mfspr(SPRN_PVR); 210 vcpu_e500->svr = mfspr(SPRN_SVR); 211 212 vcpu->arch.cpu_type = KVM_CPU_E500MC; 213 214 return 0; 215 } 216 217 static int kvmppc_core_get_sregs_e500mc(struct kvm_vcpu *vcpu, 218 struct kvm_sregs *sregs) 219 { 220 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); 221 222 sregs->u.e.features |= KVM_SREGS_E_ARCH206_MMU | KVM_SREGS_E_PM | 223 KVM_SREGS_E_PC; 224 sregs->u.e.impl_id = KVM_SREGS_E_IMPL_FSL; 225 226 sregs->u.e.impl.fsl.features = 0; 227 sregs->u.e.impl.fsl.svr = vcpu_e500->svr; 228 sregs->u.e.impl.fsl.hid0 = vcpu_e500->hid0; 229 sregs->u.e.impl.fsl.mcar = vcpu_e500->mcar; 230 231 kvmppc_get_sregs_e500_tlb(vcpu, sregs); 232 233 sregs->u.e.ivor_high[3] = 234 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR]; 235 sregs->u.e.ivor_high[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL]; 236 sregs->u.e.ivor_high[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT]; 237 238 return kvmppc_get_sregs_ivor(vcpu, sregs); 239 } 240 241 static int kvmppc_core_set_sregs_e500mc(struct kvm_vcpu *vcpu, 242 struct kvm_sregs *sregs) 243 { 244 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); 245 int ret; 246 247 if (sregs->u.e.impl_id == KVM_SREGS_E_IMPL_FSL) { 248 vcpu_e500->svr = sregs->u.e.impl.fsl.svr; 249 vcpu_e500->hid0 = sregs->u.e.impl.fsl.hid0; 250 vcpu_e500->mcar = sregs->u.e.impl.fsl.mcar; 251 } 252 253 ret = kvmppc_set_sregs_e500_tlb(vcpu, sregs); 254 if (ret < 0) 255 return ret; 256 257 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR)) 258 return 0; 259 260 if (sregs->u.e.features & KVM_SREGS_E_PM) { 261 vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = 262 sregs->u.e.ivor_high[3]; 263 } 264 265 if (sregs->u.e.features & KVM_SREGS_E_PC) { 266 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = 267 sregs->u.e.ivor_high[4]; 268 vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = 269 sregs->u.e.ivor_high[5]; 270 } 271 272 return kvmppc_set_sregs_ivor(vcpu, sregs); 273 } 274 275 static int kvmppc_get_one_reg_e500mc(struct kvm_vcpu *vcpu, u64 id, 276 union kvmppc_one_reg *val) 277 { 278 int r = 0; 279 280 switch (id) { 281 case KVM_REG_PPC_SPRG9: 282 *val = get_reg_val(id, vcpu->arch.sprg9); 283 break; 284 default: 285 r = kvmppc_get_one_reg_e500_tlb(vcpu, id, val); 286 } 287 288 return r; 289 } 290 291 static int kvmppc_set_one_reg_e500mc(struct kvm_vcpu *vcpu, u64 id, 292 union kvmppc_one_reg *val) 293 { 294 int r = 0; 295 296 switch (id) { 297 case KVM_REG_PPC_SPRG9: 298 vcpu->arch.sprg9 = set_reg_val(id, *val); 299 break; 300 default: 301 r = kvmppc_set_one_reg_e500_tlb(vcpu, id, val); 302 } 303 304 return r; 305 } 306 307 static struct kvm_vcpu *kvmppc_core_vcpu_create_e500mc(struct kvm *kvm, 308 unsigned int id) 309 { 310 struct kvmppc_vcpu_e500 *vcpu_e500; 311 struct kvm_vcpu *vcpu; 312 int err; 313 314 vcpu_e500 = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL); 315 if (!vcpu_e500) { 316 err = -ENOMEM; 317 goto out; 318 } 319 vcpu = &vcpu_e500->vcpu; 320 321 /* Invalid PIR value -- this LPID dosn't have valid state on any cpu */ 322 vcpu->arch.oldpir = 0xffffffff; 323 324 err = kvm_vcpu_init(vcpu, kvm, id); 325 if (err) 326 goto free_vcpu; 327 328 err = kvmppc_e500_tlb_init(vcpu_e500); 329 if (err) 330 goto uninit_vcpu; 331 332 vcpu->arch.shared = (void *)__get_free_page(GFP_KERNEL | __GFP_ZERO); 333 if (!vcpu->arch.shared) { 334 err = -ENOMEM; 335 goto uninit_tlb; 336 } 337 338 return vcpu; 339 340 uninit_tlb: 341 kvmppc_e500_tlb_uninit(vcpu_e500); 342 uninit_vcpu: 343 kvm_vcpu_uninit(vcpu); 344 345 free_vcpu: 346 kmem_cache_free(kvm_vcpu_cache, vcpu_e500); 347 out: 348 return ERR_PTR(err); 349 } 350 351 static void kvmppc_core_vcpu_free_e500mc(struct kvm_vcpu *vcpu) 352 { 353 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); 354 355 free_page((unsigned long)vcpu->arch.shared); 356 kvmppc_e500_tlb_uninit(vcpu_e500); 357 kvm_vcpu_uninit(vcpu); 358 kmem_cache_free(kvm_vcpu_cache, vcpu_e500); 359 } 360 361 static int kvmppc_core_init_vm_e500mc(struct kvm *kvm) 362 { 363 int lpid; 364 365 lpid = kvmppc_alloc_lpid(); 366 if (lpid < 0) 367 return lpid; 368 369 /* 370 * Use two lpids per VM on cores with two threads like e6500. Use 371 * even numbers to speedup vcpu lpid computation with consecutive lpids 372 * per VM. vm1 will use lpids 2 and 3, vm2 lpids 4 and 5, and so on. 373 */ 374 if (threads_per_core == 2) 375 lpid <<= 1; 376 377 kvm->arch.lpid = lpid; 378 return 0; 379 } 380 381 static void kvmppc_core_destroy_vm_e500mc(struct kvm *kvm) 382 { 383 int lpid = kvm->arch.lpid; 384 385 if (threads_per_core == 2) 386 lpid >>= 1; 387 388 kvmppc_free_lpid(lpid); 389 } 390 391 static struct kvmppc_ops kvm_ops_e500mc = { 392 .get_sregs = kvmppc_core_get_sregs_e500mc, 393 .set_sregs = kvmppc_core_set_sregs_e500mc, 394 .get_one_reg = kvmppc_get_one_reg_e500mc, 395 .set_one_reg = kvmppc_set_one_reg_e500mc, 396 .vcpu_load = kvmppc_core_vcpu_load_e500mc, 397 .vcpu_put = kvmppc_core_vcpu_put_e500mc, 398 .vcpu_create = kvmppc_core_vcpu_create_e500mc, 399 .vcpu_free = kvmppc_core_vcpu_free_e500mc, 400 .mmu_destroy = kvmppc_mmu_destroy_e500, 401 .init_vm = kvmppc_core_init_vm_e500mc, 402 .destroy_vm = kvmppc_core_destroy_vm_e500mc, 403 .emulate_op = kvmppc_core_emulate_op_e500, 404 .emulate_mtspr = kvmppc_core_emulate_mtspr_e500, 405 .emulate_mfspr = kvmppc_core_emulate_mfspr_e500, 406 }; 407 408 static int __init kvmppc_e500mc_init(void) 409 { 410 int r; 411 412 r = kvmppc_booke_init(); 413 if (r) 414 goto err_out; 415 416 /* 417 * Use two lpids per VM on dual threaded processors like e6500 418 * to workarround the lack of tlb write conditional instruction. 419 * Expose half the number of available hardware lpids to the lpid 420 * allocator. 421 */ 422 kvmppc_init_lpid(KVMPPC_NR_LPIDS/threads_per_core); 423 kvmppc_claim_lpid(0); /* host */ 424 425 r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_e500), 0, THIS_MODULE); 426 if (r) 427 goto err_out; 428 kvm_ops_e500mc.owner = THIS_MODULE; 429 kvmppc_pr_ops = &kvm_ops_e500mc; 430 431 err_out: 432 return r; 433 } 434 435 static void __exit kvmppc_e500mc_exit(void) 436 { 437 kvmppc_pr_ops = NULL; 438 kvmppc_booke_exit(); 439 } 440 441 module_init(kvmppc_e500mc_init); 442 module_exit(kvmppc_e500mc_exit); 443 MODULE_ALIAS_MISCDEV(KVM_MINOR); 444 MODULE_ALIAS("devname:kvm"); 445