xref: /openbmc/linux/arch/powerpc/kvm/e500mc.c (revision ae7936d2)
1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
273196cd3SScott Wood /*
3c7ba7771SMihai Caraman  * Copyright (C) 2010,2012 Freescale Semiconductor, Inc. All rights reserved.
473196cd3SScott Wood  *
573196cd3SScott Wood  * Author: Varun Sethi, <varun.sethi@freescale.com>
673196cd3SScott Wood  *
773196cd3SScott Wood  * Description:
873196cd3SScott Wood  * This file is derived from arch/powerpc/kvm/e500.c,
973196cd3SScott Wood  * by Yu Liu <yu.liu@freescale.com>.
1073196cd3SScott Wood  */
1173196cd3SScott Wood 
1273196cd3SScott Wood #include <linux/kvm_host.h>
1373196cd3SScott Wood #include <linux/slab.h>
1473196cd3SScott Wood #include <linux/err.h>
1573196cd3SScott Wood #include <linux/export.h>
16398a76c6SAlexander Graf #include <linux/miscdevice.h>
17398a76c6SAlexander Graf #include <linux/module.h>
1873196cd3SScott Wood 
1973196cd3SScott Wood #include <asm/reg.h>
2073196cd3SScott Wood #include <asm/cputable.h>
2173196cd3SScott Wood #include <asm/kvm_ppc.h>
2273196cd3SScott Wood #include <asm/dbell.h>
23*ae7936d2SNick Desaulniers #include <asm/ppc-opcode.h>
2473196cd3SScott Wood 
2573196cd3SScott Wood #include "booke.h"
2673196cd3SScott Wood #include "e500.h"
2773196cd3SScott Wood 
kvmppc_set_pending_interrupt(struct kvm_vcpu * vcpu,enum int_class type)2873196cd3SScott Wood void kvmppc_set_pending_interrupt(struct kvm_vcpu *vcpu, enum int_class type)
2973196cd3SScott Wood {
3073196cd3SScott Wood 	enum ppc_dbell dbell_type;
3173196cd3SScott Wood 	unsigned long tag;
3273196cd3SScott Wood 
3373196cd3SScott Wood 	switch (type) {
3473196cd3SScott Wood 	case INT_CLASS_NONCRIT:
3573196cd3SScott Wood 		dbell_type = PPC_G_DBELL;
3673196cd3SScott Wood 		break;
3773196cd3SScott Wood 	case INT_CLASS_CRIT:
3873196cd3SScott Wood 		dbell_type = PPC_G_DBELL_CRIT;
3973196cd3SScott Wood 		break;
4073196cd3SScott Wood 	case INT_CLASS_MC:
4173196cd3SScott Wood 		dbell_type = PPC_G_DBELL_MC;
4273196cd3SScott Wood 		break;
4373196cd3SScott Wood 	default:
4473196cd3SScott Wood 		WARN_ONCE(1, "%s: unknown int type %d\n", __func__, type);
4573196cd3SScott Wood 		return;
4673196cd3SScott Wood 	}
4773196cd3SScott Wood 
48188e267cSMihai Caraman 	preempt_disable();
49188e267cSMihai Caraman 	tag = PPC_DBELL_LPID(get_lpid(vcpu)) | vcpu->vcpu_id;
5073196cd3SScott Wood 	mb();
5173196cd3SScott Wood 	ppc_msgsnd(dbell_type, 0, tag);
52188e267cSMihai Caraman 	preempt_enable();
5373196cd3SScott Wood }
5473196cd3SScott Wood 
5573196cd3SScott Wood /* gtlbe must not be mapped by more than one host tlb entry */
kvmppc_e500_tlbil_one(struct kvmppc_vcpu_e500 * vcpu_e500,struct kvm_book3e_206_tlb_entry * gtlbe)5673196cd3SScott Wood void kvmppc_e500_tlbil_one(struct kvmppc_vcpu_e500 *vcpu_e500,
5773196cd3SScott Wood 			   struct kvm_book3e_206_tlb_entry *gtlbe)
5873196cd3SScott Wood {
5973196cd3SScott Wood 	unsigned int tid, ts;
6066c9897dSMihai Caraman 	gva_t eaddr;
61188e267cSMihai Caraman 	u32 val;
6273196cd3SScott Wood 	unsigned long flags;
6373196cd3SScott Wood 
6473196cd3SScott Wood 	ts = get_tlb_ts(gtlbe);
6573196cd3SScott Wood 	tid = get_tlb_tid(gtlbe);
6673196cd3SScott Wood 
6773196cd3SScott Wood 	/* We search the host TLB to invalidate its shadow TLB entry */
6873196cd3SScott Wood 	val = (tid << 16) | ts;
6973196cd3SScott Wood 	eaddr = get_tlb_eaddr(gtlbe);
7073196cd3SScott Wood 
7173196cd3SScott Wood 	local_irq_save(flags);
7273196cd3SScott Wood 
7373196cd3SScott Wood 	mtspr(SPRN_MAS6, val);
74188e267cSMihai Caraman 	mtspr(SPRN_MAS5, MAS5_SGS | get_lpid(&vcpu_e500->vcpu));
7573196cd3SScott Wood 
7673196cd3SScott Wood 	asm volatile("tlbsx 0, %[eaddr]\n" : : [eaddr] "r" (eaddr));
7773196cd3SScott Wood 	val = mfspr(SPRN_MAS1);
7873196cd3SScott Wood 	if (val & MAS1_VALID) {
7973196cd3SScott Wood 		mtspr(SPRN_MAS1, val & ~MAS1_VALID);
8073196cd3SScott Wood 		asm volatile("tlbwe");
8173196cd3SScott Wood 	}
8273196cd3SScott Wood 	mtspr(SPRN_MAS5, 0);
8373196cd3SScott Wood 	/* NOTE: tlbsx also updates mas8, so clear it for host tlbwe */
8473196cd3SScott Wood 	mtspr(SPRN_MAS8, 0);
8573196cd3SScott Wood 	isync();
8673196cd3SScott Wood 
8773196cd3SScott Wood 	local_irq_restore(flags);
8873196cd3SScott Wood }
8973196cd3SScott Wood 
kvmppc_e500_tlbil_all(struct kvmppc_vcpu_e500 * vcpu_e500)9073196cd3SScott Wood void kvmppc_e500_tlbil_all(struct kvmppc_vcpu_e500 *vcpu_e500)
9173196cd3SScott Wood {
9273196cd3SScott Wood 	unsigned long flags;
9373196cd3SScott Wood 
9473196cd3SScott Wood 	local_irq_save(flags);
95188e267cSMihai Caraman 	mtspr(SPRN_MAS5, MAS5_SGS | get_lpid(&vcpu_e500->vcpu));
96*ae7936d2SNick Desaulniers 	/*
97*ae7936d2SNick Desaulniers 	 * clang-17 and older could not assemble tlbilxlpid.
98*ae7936d2SNick Desaulniers 	 * https://github.com/ClangBuiltLinux/linux/issues/1891
99*ae7936d2SNick Desaulniers 	 */
100*ae7936d2SNick Desaulniers 	asm volatile (PPC_TLBILX_LPID);
10173196cd3SScott Wood 	mtspr(SPRN_MAS5, 0);
10273196cd3SScott Wood 	local_irq_restore(flags);
10373196cd3SScott Wood }
10473196cd3SScott Wood 
kvmppc_set_pid(struct kvm_vcpu * vcpu,u32 pid)10573196cd3SScott Wood void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid)
10673196cd3SScott Wood {
10773196cd3SScott Wood 	vcpu->arch.pid = pid;
10873196cd3SScott Wood }
10973196cd3SScott Wood 
kvmppc_mmu_msr_notify(struct kvm_vcpu * vcpu,u32 old_msr)11073196cd3SScott Wood void kvmppc_mmu_msr_notify(struct kvm_vcpu *vcpu, u32 old_msr)
11173196cd3SScott Wood {
11273196cd3SScott Wood }
11373196cd3SScott Wood 
114188e267cSMihai Caraman /* We use two lpids per VM */
1151f0eeb7eSMihai Caraman static DEFINE_PER_CPU(struct kvm_vcpu *[KVMPPC_NR_LPIDS], last_vcpu_of_lpid);
116c5e6cb05SScott Wood 
kvmppc_core_vcpu_load_e500mc(struct kvm_vcpu * vcpu,int cpu)1173a167beaSAneesh Kumar K.V static void kvmppc_core_vcpu_load_e500mc(struct kvm_vcpu *vcpu, int cpu)
11873196cd3SScott Wood {
11973196cd3SScott Wood 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
12073196cd3SScott Wood 
12173196cd3SScott Wood 	kvmppc_booke_vcpu_load(vcpu, cpu);
12273196cd3SScott Wood 
123188e267cSMihai Caraman 	mtspr(SPRN_LPID, get_lpid(vcpu));
12473196cd3SScott Wood 	mtspr(SPRN_EPCR, vcpu->arch.shadow_epcr);
12573196cd3SScott Wood 	mtspr(SPRN_GPIR, vcpu->vcpu_id);
12673196cd3SScott Wood 	mtspr(SPRN_MSRP, vcpu->arch.shadow_msrp);
127188e267cSMihai Caraman 	vcpu->arch.eplc = EPC_EGS | (get_lpid(vcpu) << EPC_ELPID_SHIFT);
128188e267cSMihai Caraman 	vcpu->arch.epsc = vcpu->arch.eplc;
12973196cd3SScott Wood 	mtspr(SPRN_EPLC, vcpu->arch.eplc);
13073196cd3SScott Wood 	mtspr(SPRN_EPSC, vcpu->arch.epsc);
13173196cd3SScott Wood 
13273196cd3SScott Wood 	mtspr(SPRN_GIVPR, vcpu->arch.ivpr);
13373196cd3SScott Wood 	mtspr(SPRN_GIVOR2, vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]);
13473196cd3SScott Wood 	mtspr(SPRN_GIVOR8, vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]);
13573196cd3SScott Wood 	mtspr(SPRN_GSPRG0, (unsigned long)vcpu->arch.shared->sprg0);
13673196cd3SScott Wood 	mtspr(SPRN_GSPRG1, (unsigned long)vcpu->arch.shared->sprg1);
13773196cd3SScott Wood 	mtspr(SPRN_GSPRG2, (unsigned long)vcpu->arch.shared->sprg2);
13873196cd3SScott Wood 	mtspr(SPRN_GSPRG3, (unsigned long)vcpu->arch.shared->sprg3);
13973196cd3SScott Wood 
14073196cd3SScott Wood 	mtspr(SPRN_GSRR0, vcpu->arch.shared->srr0);
14173196cd3SScott Wood 	mtspr(SPRN_GSRR1, vcpu->arch.shared->srr1);
14273196cd3SScott Wood 
14373196cd3SScott Wood 	mtspr(SPRN_GEPR, vcpu->arch.epr);
14473196cd3SScott Wood 	mtspr(SPRN_GDEAR, vcpu->arch.shared->dar);
14573196cd3SScott Wood 	mtspr(SPRN_GESR, vcpu->arch.shared->esr);
14673196cd3SScott Wood 
147c5e6cb05SScott Wood 	if (vcpu->arch.oldpir != mfspr(SPRN_PIR) ||
14869111bacSChristoph Lameter 	    __this_cpu_read(last_vcpu_of_lpid[get_lpid(vcpu)]) != vcpu) {
14973196cd3SScott Wood 		kvmppc_e500_tlbil_all(vcpu_e500);
15069111bacSChristoph Lameter 		__this_cpu_write(last_vcpu_of_lpid[get_lpid(vcpu)], vcpu);
151c5e6cb05SScott Wood 	}
15273196cd3SScott Wood }
15373196cd3SScott Wood 
kvmppc_core_vcpu_put_e500mc(struct kvm_vcpu * vcpu)1543a167beaSAneesh Kumar K.V static void kvmppc_core_vcpu_put_e500mc(struct kvm_vcpu *vcpu)
15573196cd3SScott Wood {
15673196cd3SScott Wood 	vcpu->arch.eplc = mfspr(SPRN_EPLC);
15773196cd3SScott Wood 	vcpu->arch.epsc = mfspr(SPRN_EPSC);
15873196cd3SScott Wood 
15973196cd3SScott Wood 	vcpu->arch.shared->sprg0 = mfspr(SPRN_GSPRG0);
16073196cd3SScott Wood 	vcpu->arch.shared->sprg1 = mfspr(SPRN_GSPRG1);
16173196cd3SScott Wood 	vcpu->arch.shared->sprg2 = mfspr(SPRN_GSPRG2);
16273196cd3SScott Wood 	vcpu->arch.shared->sprg3 = mfspr(SPRN_GSPRG3);
16373196cd3SScott Wood 
16473196cd3SScott Wood 	vcpu->arch.shared->srr0 = mfspr(SPRN_GSRR0);
16573196cd3SScott Wood 	vcpu->arch.shared->srr1 = mfspr(SPRN_GSRR1);
16673196cd3SScott Wood 
16773196cd3SScott Wood 	vcpu->arch.epr = mfspr(SPRN_GEPR);
16873196cd3SScott Wood 	vcpu->arch.shared->dar = mfspr(SPRN_GDEAR);
16973196cd3SScott Wood 	vcpu->arch.shared->esr = mfspr(SPRN_GESR);
17073196cd3SScott Wood 
17173196cd3SScott Wood 	vcpu->arch.oldpir = mfspr(SPRN_PIR);
17273196cd3SScott Wood 
17373196cd3SScott Wood 	kvmppc_booke_vcpu_put(vcpu);
17473196cd3SScott Wood }
17573196cd3SScott Wood 
kvmppc_e500mc_check_processor_compat(void)176e83ca8cfSSean Christopherson static int kvmppc_e500mc_check_processor_compat(void)
17773196cd3SScott Wood {
17873196cd3SScott Wood 	int r;
17973196cd3SScott Wood 
18073196cd3SScott Wood 	if (strcmp(cur_cpu_spec->cpu_name, "e500mc") == 0)
18173196cd3SScott Wood 		r = 0;
18273196cd3SScott Wood 	else if (strcmp(cur_cpu_spec->cpu_name, "e5500") == 0)
18373196cd3SScott Wood 		r = 0;
184d2ca32a2SMihai Caraman #ifdef CONFIG_ALTIVEC
185d2ca32a2SMihai Caraman 	/*
186446957baSAdam Buchbinder 	 * Since guests have the privilege to enable AltiVec, we need AltiVec
187d2ca32a2SMihai Caraman 	 * support in the host to save/restore their context.
188d2ca32a2SMihai Caraman 	 * Don't use CPU_FTR_ALTIVEC to identify cores with AltiVec unit
189d2ca32a2SMihai Caraman 	 * because it's cleared in the absence of CONFIG_ALTIVEC!
190d2ca32a2SMihai Caraman 	 */
191d2ca32a2SMihai Caraman 	else if (strcmp(cur_cpu_spec->cpu_name, "e6500") == 0)
192d2ca32a2SMihai Caraman 		r = 0;
193d2ca32a2SMihai Caraman #endif
19473196cd3SScott Wood 	else
19573196cd3SScott Wood 		r = -ENOTSUPP;
19673196cd3SScott Wood 
19773196cd3SScott Wood 	return r;
19873196cd3SScott Wood }
19973196cd3SScott Wood 
kvmppc_core_vcpu_setup(struct kvm_vcpu * vcpu)20073196cd3SScott Wood int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
20173196cd3SScott Wood {
20273196cd3SScott Wood 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
20373196cd3SScott Wood 
20473196cd3SScott Wood 	vcpu->arch.shadow_epcr = SPRN_EPCR_DSIGS | SPRN_EPCR_DGTMI | \
20573196cd3SScott Wood 				 SPRN_EPCR_DUVD;
206c7ba7771SMihai Caraman #ifdef CONFIG_64BIT
207c7ba7771SMihai Caraman 	vcpu->arch.shadow_epcr |= SPRN_EPCR_ICM;
208c7ba7771SMihai Caraman #endif
20937277b11SBharat Bhushan 	vcpu->arch.shadow_msrp = MSRP_UCLEP | MSRP_PMMP;
21073196cd3SScott Wood 
21173196cd3SScott Wood 	vcpu->arch.pvr = mfspr(SPRN_PVR);
21273196cd3SScott Wood 	vcpu_e500->svr = mfspr(SPRN_SVR);
21373196cd3SScott Wood 
21473196cd3SScott Wood 	vcpu->arch.cpu_type = KVM_CPU_E500MC;
21573196cd3SScott Wood 
21673196cd3SScott Wood 	return 0;
21773196cd3SScott Wood }
21873196cd3SScott Wood 
kvmppc_core_get_sregs_e500mc(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)2193a167beaSAneesh Kumar K.V static int kvmppc_core_get_sregs_e500mc(struct kvm_vcpu *vcpu,
2203a167beaSAneesh Kumar K.V 					struct kvm_sregs *sregs)
22173196cd3SScott Wood {
22273196cd3SScott Wood 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
22373196cd3SScott Wood 
22473196cd3SScott Wood 	sregs->u.e.features |= KVM_SREGS_E_ARCH206_MMU | KVM_SREGS_E_PM |
22573196cd3SScott Wood 			       KVM_SREGS_E_PC;
22673196cd3SScott Wood 	sregs->u.e.impl_id = KVM_SREGS_E_IMPL_FSL;
22773196cd3SScott Wood 
22873196cd3SScott Wood 	sregs->u.e.impl.fsl.features = 0;
22973196cd3SScott Wood 	sregs->u.e.impl.fsl.svr = vcpu_e500->svr;
23073196cd3SScott Wood 	sregs->u.e.impl.fsl.hid0 = vcpu_e500->hid0;
23173196cd3SScott Wood 	sregs->u.e.impl.fsl.mcar = vcpu_e500->mcar;
23273196cd3SScott Wood 
23373196cd3SScott Wood 	kvmppc_get_sregs_e500_tlb(vcpu, sregs);
23473196cd3SScott Wood 
23573196cd3SScott Wood 	sregs->u.e.ivor_high[3] =
23673196cd3SScott Wood 		vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
23773196cd3SScott Wood 	sregs->u.e.ivor_high[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL];
23873196cd3SScott Wood 	sregs->u.e.ivor_high[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT];
23973196cd3SScott Wood 
2403a167beaSAneesh Kumar K.V 	return kvmppc_get_sregs_ivor(vcpu, sregs);
24173196cd3SScott Wood }
24273196cd3SScott Wood 
kvmppc_core_set_sregs_e500mc(struct kvm_vcpu * vcpu,struct kvm_sregs * sregs)2433a167beaSAneesh Kumar K.V static int kvmppc_core_set_sregs_e500mc(struct kvm_vcpu *vcpu,
2443a167beaSAneesh Kumar K.V 					struct kvm_sregs *sregs)
24573196cd3SScott Wood {
24673196cd3SScott Wood 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
24773196cd3SScott Wood 	int ret;
24873196cd3SScott Wood 
24973196cd3SScott Wood 	if (sregs->u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
25073196cd3SScott Wood 		vcpu_e500->svr = sregs->u.e.impl.fsl.svr;
25173196cd3SScott Wood 		vcpu_e500->hid0 = sregs->u.e.impl.fsl.hid0;
25273196cd3SScott Wood 		vcpu_e500->mcar = sregs->u.e.impl.fsl.mcar;
25373196cd3SScott Wood 	}
25473196cd3SScott Wood 
25573196cd3SScott Wood 	ret = kvmppc_set_sregs_e500_tlb(vcpu, sregs);
25673196cd3SScott Wood 	if (ret < 0)
25773196cd3SScott Wood 		return ret;
25873196cd3SScott Wood 
25973196cd3SScott Wood 	if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
26073196cd3SScott Wood 		return 0;
26173196cd3SScott Wood 
26273196cd3SScott Wood 	if (sregs->u.e.features & KVM_SREGS_E_PM) {
26373196cd3SScott Wood 		vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] =
26473196cd3SScott Wood 			sregs->u.e.ivor_high[3];
26573196cd3SScott Wood 	}
26673196cd3SScott Wood 
26773196cd3SScott Wood 	if (sregs->u.e.features & KVM_SREGS_E_PC) {
26873196cd3SScott Wood 		vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] =
26973196cd3SScott Wood 			sregs->u.e.ivor_high[4];
27073196cd3SScott Wood 		vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] =
27173196cd3SScott Wood 			sregs->u.e.ivor_high[5];
27273196cd3SScott Wood 	}
27373196cd3SScott Wood 
27473196cd3SScott Wood 	return kvmppc_set_sregs_ivor(vcpu, sregs);
27573196cd3SScott Wood }
27673196cd3SScott Wood 
kvmppc_get_one_reg_e500mc(struct kvm_vcpu * vcpu,u64 id,union kvmppc_one_reg * val)2773a167beaSAneesh Kumar K.V static int kvmppc_get_one_reg_e500mc(struct kvm_vcpu *vcpu, u64 id,
27835b299e2SMihai Caraman 			      union kvmppc_one_reg *val)
27935b299e2SMihai Caraman {
28028d2f421SBharat Bhushan 	int r = 0;
28128d2f421SBharat Bhushan 
28228d2f421SBharat Bhushan 	switch (id) {
28328d2f421SBharat Bhushan 	case KVM_REG_PPC_SPRG9:
28428d2f421SBharat Bhushan 		*val = get_reg_val(id, vcpu->arch.sprg9);
28528d2f421SBharat Bhushan 		break;
28628d2f421SBharat Bhushan 	default:
28728d2f421SBharat Bhushan 		r = kvmppc_get_one_reg_e500_tlb(vcpu, id, val);
28828d2f421SBharat Bhushan 	}
28928d2f421SBharat Bhushan 
290a85d2aa2SMihai Caraman 	return r;
29135b299e2SMihai Caraman }
29235b299e2SMihai Caraman 
kvmppc_set_one_reg_e500mc(struct kvm_vcpu * vcpu,u64 id,union kvmppc_one_reg * val)2933a167beaSAneesh Kumar K.V static int kvmppc_set_one_reg_e500mc(struct kvm_vcpu *vcpu, u64 id,
29435b299e2SMihai Caraman 			      union kvmppc_one_reg *val)
29535b299e2SMihai Caraman {
29628d2f421SBharat Bhushan 	int r = 0;
29728d2f421SBharat Bhushan 
29828d2f421SBharat Bhushan 	switch (id) {
29928d2f421SBharat Bhushan 	case KVM_REG_PPC_SPRG9:
30028d2f421SBharat Bhushan 		vcpu->arch.sprg9 = set_reg_val(id, *val);
30128d2f421SBharat Bhushan 		break;
30228d2f421SBharat Bhushan 	default:
30328d2f421SBharat Bhushan 		r = kvmppc_set_one_reg_e500_tlb(vcpu, id, val);
30428d2f421SBharat Bhushan 	}
30528d2f421SBharat Bhushan 
306a85d2aa2SMihai Caraman 	return r;
30735b299e2SMihai Caraman }
30835b299e2SMihai Caraman 
kvmppc_core_vcpu_create_e500mc(struct kvm_vcpu * vcpu)309ff030fdfSSean Christopherson static int kvmppc_core_vcpu_create_e500mc(struct kvm_vcpu *vcpu)
31073196cd3SScott Wood {
31173196cd3SScott Wood 	struct kvmppc_vcpu_e500 *vcpu_e500;
31273196cd3SScott Wood 	int err;
31373196cd3SScott Wood 
3143ec8ca29SSean Christopherson 	BUILD_BUG_ON(offsetof(struct kvmppc_vcpu_e500, vcpu) != 0);
315c50bfbdcSSean Christopherson 	vcpu_e500 = to_e500(vcpu);
31673196cd3SScott Wood 
3171fd02f66SJulia Lawall 	/* Invalid PIR value -- this LPID doesn't have valid state on any cpu */
3184dbf6fecSSean Christopherson 	vcpu->arch.oldpir = 0xffffffff;
3194dbf6fecSSean Christopherson 
32073196cd3SScott Wood 	err = kvmppc_e500_tlb_init(vcpu_e500);
32173196cd3SScott Wood 	if (err)
322ff030fdfSSean Christopherson 		return err;
32373196cd3SScott Wood 
32473196cd3SScott Wood 	vcpu->arch.shared = (void *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
32550a1a259SDan Carpenter 	if (!vcpu->arch.shared) {
32650a1a259SDan Carpenter 		err = -ENOMEM;
32773196cd3SScott Wood 		goto uninit_tlb;
32850a1a259SDan Carpenter 	}
32973196cd3SScott Wood 
330c50bfbdcSSean Christopherson 	return 0;
33173196cd3SScott Wood 
33273196cd3SScott Wood uninit_tlb:
33373196cd3SScott Wood 	kvmppc_e500_tlb_uninit(vcpu_e500);
334c50bfbdcSSean Christopherson 	return err;
33573196cd3SScott Wood }
33673196cd3SScott Wood 
kvmppc_core_vcpu_free_e500mc(struct kvm_vcpu * vcpu)3373a167beaSAneesh Kumar K.V static void kvmppc_core_vcpu_free_e500mc(struct kvm_vcpu *vcpu)
33873196cd3SScott Wood {
33973196cd3SScott Wood 	struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
34073196cd3SScott Wood 
34173196cd3SScott Wood 	free_page((unsigned long)vcpu->arch.shared);
34273196cd3SScott Wood 	kvmppc_e500_tlb_uninit(vcpu_e500);
34373196cd3SScott Wood }
34473196cd3SScott Wood 
kvmppc_core_init_vm_e500mc(struct kvm * kvm)3453a167beaSAneesh Kumar K.V static int kvmppc_core_init_vm_e500mc(struct kvm *kvm)
34673196cd3SScott Wood {
34773196cd3SScott Wood 	int lpid;
34873196cd3SScott Wood 
34973196cd3SScott Wood 	lpid = kvmppc_alloc_lpid();
35073196cd3SScott Wood 	if (lpid < 0)
35173196cd3SScott Wood 		return lpid;
35273196cd3SScott Wood 
353188e267cSMihai Caraman 	/*
354188e267cSMihai Caraman 	 * Use two lpids per VM on cores with two threads like e6500. Use
355188e267cSMihai Caraman 	 * even numbers to speedup vcpu lpid computation with consecutive lpids
356188e267cSMihai Caraman 	 * per VM. vm1 will use lpids 2 and 3, vm2 lpids 4 and 5, and so on.
357188e267cSMihai Caraman 	 */
358188e267cSMihai Caraman 	if (threads_per_core == 2)
359188e267cSMihai Caraman 		lpid <<= 1;
360188e267cSMihai Caraman 
36173196cd3SScott Wood 	kvm->arch.lpid = lpid;
36273196cd3SScott Wood 	return 0;
36373196cd3SScott Wood }
36473196cd3SScott Wood 
kvmppc_core_destroy_vm_e500mc(struct kvm * kvm)3653a167beaSAneesh Kumar K.V static void kvmppc_core_destroy_vm_e500mc(struct kvm *kvm)
36673196cd3SScott Wood {
367188e267cSMihai Caraman 	int lpid = kvm->arch.lpid;
368188e267cSMihai Caraman 
369188e267cSMihai Caraman 	if (threads_per_core == 2)
370188e267cSMihai Caraman 		lpid >>= 1;
371188e267cSMihai Caraman 
372188e267cSMihai Caraman 	kvmppc_free_lpid(lpid);
37373196cd3SScott Wood }
37473196cd3SScott Wood 
3753a167beaSAneesh Kumar K.V static struct kvmppc_ops kvm_ops_e500mc = {
3763a167beaSAneesh Kumar K.V 	.get_sregs = kvmppc_core_get_sregs_e500mc,
3773a167beaSAneesh Kumar K.V 	.set_sregs = kvmppc_core_set_sregs_e500mc,
3783a167beaSAneesh Kumar K.V 	.get_one_reg = kvmppc_get_one_reg_e500mc,
3793a167beaSAneesh Kumar K.V 	.set_one_reg = kvmppc_set_one_reg_e500mc,
3803a167beaSAneesh Kumar K.V 	.vcpu_load   = kvmppc_core_vcpu_load_e500mc,
3813a167beaSAneesh Kumar K.V 	.vcpu_put    = kvmppc_core_vcpu_put_e500mc,
3823a167beaSAneesh Kumar K.V 	.vcpu_create = kvmppc_core_vcpu_create_e500mc,
3833a167beaSAneesh Kumar K.V 	.vcpu_free   = kvmppc_core_vcpu_free_e500mc,
3843a167beaSAneesh Kumar K.V 	.init_vm = kvmppc_core_init_vm_e500mc,
3853a167beaSAneesh Kumar K.V 	.destroy_vm = kvmppc_core_destroy_vm_e500mc,
3863a167beaSAneesh Kumar K.V 	.emulate_op = kvmppc_core_emulate_op_e500,
3873a167beaSAneesh Kumar K.V 	.emulate_mtspr = kvmppc_core_emulate_mtspr_e500,
3883a167beaSAneesh Kumar K.V 	.emulate_mfspr = kvmppc_core_emulate_mfspr_e500,
389faf01aefSAlexey Kardashevskiy 	.create_vcpu_debugfs = kvmppc_create_vcpu_debugfs_e500,
3903a167beaSAneesh Kumar K.V };
3913a167beaSAneesh Kumar K.V 
kvmppc_e500mc_init(void)39273196cd3SScott Wood static int __init kvmppc_e500mc_init(void)
39373196cd3SScott Wood {
39473196cd3SScott Wood 	int r;
39573196cd3SScott Wood 
396ae19b15dSSean Christopherson 	r = kvmppc_e500mc_check_processor_compat();
397ae19b15dSSean Christopherson 	if (r)
3987cb79f43SSean Christopherson 		goto err_out;
399ae19b15dSSean Christopherson 
40073196cd3SScott Wood 	r = kvmppc_booke_init();
40173196cd3SScott Wood 	if (r)
4023a167beaSAneesh Kumar K.V 		goto err_out;
40373196cd3SScott Wood 
404188e267cSMihai Caraman 	/*
405188e267cSMihai Caraman 	 * Use two lpids per VM on dual threaded processors like e6500
406188e267cSMihai Caraman 	 * to workarround the lack of tlb write conditional instruction.
407188e267cSMihai Caraman 	 * Expose half the number of available hardware lpids to the lpid
408188e267cSMihai Caraman 	 * allocator.
409188e267cSMihai Caraman 	 */
410188e267cSMihai Caraman 	kvmppc_init_lpid(KVMPPC_NR_LPIDS/threads_per_core);
41173196cd3SScott Wood 
41281a1cf9fSSean Christopherson 	r = kvm_init(sizeof(struct kvmppc_vcpu_e500), 0, THIS_MODULE);
4133a167beaSAneesh Kumar K.V 	if (r)
4143a167beaSAneesh Kumar K.V 		goto err_out;
415cbbc58d4SAneesh Kumar K.V 	kvm_ops_e500mc.owner = THIS_MODULE;
416cbbc58d4SAneesh Kumar K.V 	kvmppc_pr_ops = &kvm_ops_e500mc;
417cbbc58d4SAneesh Kumar K.V 
4183a167beaSAneesh Kumar K.V err_out:
4193a167beaSAneesh Kumar K.V 	return r;
42073196cd3SScott Wood }
42173196cd3SScott Wood 
kvmppc_e500mc_exit(void)42273196cd3SScott Wood static void __exit kvmppc_e500mc_exit(void)
42373196cd3SScott Wood {
424cbbc58d4SAneesh Kumar K.V 	kvmppc_pr_ops = NULL;
42573196cd3SScott Wood 	kvmppc_booke_exit();
42673196cd3SScott Wood }
42773196cd3SScott Wood 
42873196cd3SScott Wood module_init(kvmppc_e500mc_init);
42973196cd3SScott Wood module_exit(kvmppc_e500mc_exit);
430398a76c6SAlexander Graf MODULE_ALIAS_MISCDEV(KVM_MINOR);
431398a76c6SAlexander Graf MODULE_ALIAS("devname:kvm");
432