1 /* 2 * Copyright (C) 2008-2013 Freescale Semiconductor, Inc. All rights reserved. 3 * 4 * Author: Yu Liu, yu.liu@freescale.com 5 * Scott Wood, scottwood@freescale.com 6 * Ashish Kalra, ashish.kalra@freescale.com 7 * Varun Sethi, varun.sethi@freescale.com 8 * Alexander Graf, agraf@suse.de 9 * 10 * Description: 11 * This file is based on arch/powerpc/kvm/44x_tlb.c, 12 * by Hollis Blanchard <hollisb@us.ibm.com>. 13 * 14 * This program is free software; you can redistribute it and/or modify 15 * it under the terms of the GNU General Public License, version 2, as 16 * published by the Free Software Foundation. 17 */ 18 19 #include <linux/kernel.h> 20 #include <linux/types.h> 21 #include <linux/slab.h> 22 #include <linux/string.h> 23 #include <linux/kvm.h> 24 #include <linux/kvm_host.h> 25 #include <linux/highmem.h> 26 #include <linux/log2.h> 27 #include <linux/uaccess.h> 28 #include <linux/sched.h> 29 #include <linux/rwsem.h> 30 #include <linux/vmalloc.h> 31 #include <linux/hugetlb.h> 32 #include <asm/kvm_ppc.h> 33 34 #include "e500.h" 35 #include "timing.h" 36 #include "e500_mmu_host.h" 37 38 #include "trace_booke.h" 39 40 #define to_htlb1_esel(esel) (host_tlb_params[1].entries - (esel) - 1) 41 42 static struct kvmppc_e500_tlb_params host_tlb_params[E500_TLB_NUM]; 43 44 static inline unsigned int tlb1_max_shadow_size(void) 45 { 46 /* reserve one entry for magic page */ 47 return host_tlb_params[1].entries - tlbcam_index - 1; 48 } 49 50 static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode) 51 { 52 /* Mask off reserved bits. */ 53 mas3 &= MAS3_ATTRIB_MASK; 54 55 #ifndef CONFIG_KVM_BOOKE_HV 56 if (!usermode) { 57 /* Guest is in supervisor mode, 58 * so we need to translate guest 59 * supervisor permissions into user permissions. */ 60 mas3 &= ~E500_TLB_USER_PERM_MASK; 61 mas3 |= (mas3 & E500_TLB_SUPER_PERM_MASK) << 1; 62 } 63 mas3 |= E500_TLB_SUPER_PERM_MASK; 64 #endif 65 return mas3; 66 } 67 68 static inline u32 e500_shadow_mas2_attrib(u32 mas2, int usermode) 69 { 70 #ifdef CONFIG_SMP 71 return (mas2 & MAS2_ATTRIB_MASK) | MAS2_M; 72 #else 73 return mas2 & MAS2_ATTRIB_MASK; 74 #endif 75 } 76 77 /* 78 * writing shadow tlb entry to host TLB 79 */ 80 static inline void __write_host_tlbe(struct kvm_book3e_206_tlb_entry *stlbe, 81 uint32_t mas0) 82 { 83 unsigned long flags; 84 85 local_irq_save(flags); 86 mtspr(SPRN_MAS0, mas0); 87 mtspr(SPRN_MAS1, stlbe->mas1); 88 mtspr(SPRN_MAS2, (unsigned long)stlbe->mas2); 89 mtspr(SPRN_MAS3, (u32)stlbe->mas7_3); 90 mtspr(SPRN_MAS7, (u32)(stlbe->mas7_3 >> 32)); 91 #ifdef CONFIG_KVM_BOOKE_HV 92 mtspr(SPRN_MAS8, stlbe->mas8); 93 #endif 94 asm volatile("isync; tlbwe" : : : "memory"); 95 96 #ifdef CONFIG_KVM_BOOKE_HV 97 /* Must clear mas8 for other host tlbwe's */ 98 mtspr(SPRN_MAS8, 0); 99 isync(); 100 #endif 101 local_irq_restore(flags); 102 103 trace_kvm_booke206_stlb_write(mas0, stlbe->mas8, stlbe->mas1, 104 stlbe->mas2, stlbe->mas7_3); 105 } 106 107 /* 108 * Acquire a mas0 with victim hint, as if we just took a TLB miss. 109 * 110 * We don't care about the address we're searching for, other than that it's 111 * in the right set and is not present in the TLB. Using a zero PID and a 112 * userspace address means we don't have to set and then restore MAS5, or 113 * calculate a proper MAS6 value. 114 */ 115 static u32 get_host_mas0(unsigned long eaddr) 116 { 117 unsigned long flags; 118 u32 mas0; 119 120 local_irq_save(flags); 121 mtspr(SPRN_MAS6, 0); 122 asm volatile("tlbsx 0, %0" : : "b" (eaddr & ~CONFIG_PAGE_OFFSET)); 123 mas0 = mfspr(SPRN_MAS0); 124 local_irq_restore(flags); 125 126 return mas0; 127 } 128 129 /* sesel is for tlb1 only */ 130 static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500, 131 int tlbsel, int sesel, struct kvm_book3e_206_tlb_entry *stlbe) 132 { 133 u32 mas0; 134 135 if (tlbsel == 0) { 136 mas0 = get_host_mas0(stlbe->mas2); 137 __write_host_tlbe(stlbe, mas0); 138 } else { 139 __write_host_tlbe(stlbe, 140 MAS0_TLBSEL(1) | 141 MAS0_ESEL(to_htlb1_esel(sesel))); 142 } 143 } 144 145 /* sesel is for tlb1 only */ 146 static void write_stlbe(struct kvmppc_vcpu_e500 *vcpu_e500, 147 struct kvm_book3e_206_tlb_entry *gtlbe, 148 struct kvm_book3e_206_tlb_entry *stlbe, 149 int stlbsel, int sesel) 150 { 151 int stid; 152 153 preempt_disable(); 154 stid = kvmppc_e500_get_tlb_stid(&vcpu_e500->vcpu, gtlbe); 155 156 stlbe->mas1 |= MAS1_TID(stid); 157 write_host_tlbe(vcpu_e500, stlbsel, sesel, stlbe); 158 preempt_enable(); 159 } 160 161 #ifdef CONFIG_KVM_E500V2 162 /* XXX should be a hook in the gva2hpa translation */ 163 void kvmppc_map_magic(struct kvm_vcpu *vcpu) 164 { 165 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); 166 struct kvm_book3e_206_tlb_entry magic; 167 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK; 168 unsigned int stid; 169 pfn_t pfn; 170 171 pfn = (pfn_t)virt_to_phys((void *)shared_page) >> PAGE_SHIFT; 172 get_page(pfn_to_page(pfn)); 173 174 preempt_disable(); 175 stid = kvmppc_e500_get_sid(vcpu_e500, 0, 0, 0, 0); 176 177 magic.mas1 = MAS1_VALID | MAS1_TS | MAS1_TID(stid) | 178 MAS1_TSIZE(BOOK3E_PAGESZ_4K); 179 magic.mas2 = vcpu->arch.magic_page_ea | MAS2_M; 180 magic.mas7_3 = ((u64)pfn << PAGE_SHIFT) | 181 MAS3_SW | MAS3_SR | MAS3_UW | MAS3_UR; 182 magic.mas8 = 0; 183 184 __write_host_tlbe(&magic, MAS0_TLBSEL(1) | MAS0_ESEL(tlbcam_index)); 185 preempt_enable(); 186 } 187 #endif 188 189 void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel, 190 int esel) 191 { 192 struct kvm_book3e_206_tlb_entry *gtlbe = 193 get_entry(vcpu_e500, tlbsel, esel); 194 struct tlbe_ref *ref = &vcpu_e500->gtlb_priv[tlbsel][esel].ref; 195 196 /* Don't bother with unmapped entries */ 197 if (!(ref->flags & E500_TLB_VALID)) { 198 WARN(ref->flags & (E500_TLB_BITMAP | E500_TLB_TLB0), 199 "%s: flags %x\n", __func__, ref->flags); 200 WARN_ON(tlbsel == 1 && vcpu_e500->g2h_tlb1_map[esel]); 201 } 202 203 if (tlbsel == 1 && ref->flags & E500_TLB_BITMAP) { 204 u64 tmp = vcpu_e500->g2h_tlb1_map[esel]; 205 int hw_tlb_indx; 206 unsigned long flags; 207 208 local_irq_save(flags); 209 while (tmp) { 210 hw_tlb_indx = __ilog2_u64(tmp & -tmp); 211 mtspr(SPRN_MAS0, 212 MAS0_TLBSEL(1) | 213 MAS0_ESEL(to_htlb1_esel(hw_tlb_indx))); 214 mtspr(SPRN_MAS1, 0); 215 asm volatile("tlbwe"); 216 vcpu_e500->h2g_tlb1_rmap[hw_tlb_indx] = 0; 217 tmp &= tmp - 1; 218 } 219 mb(); 220 vcpu_e500->g2h_tlb1_map[esel] = 0; 221 ref->flags &= ~(E500_TLB_BITMAP | E500_TLB_VALID); 222 local_irq_restore(flags); 223 } 224 225 if (tlbsel == 1 && ref->flags & E500_TLB_TLB0) { 226 /* 227 * TLB1 entry is backed by 4k pages. This should happen 228 * rarely and is not worth optimizing. Invalidate everything. 229 */ 230 kvmppc_e500_tlbil_all(vcpu_e500); 231 ref->flags &= ~(E500_TLB_TLB0 | E500_TLB_VALID); 232 } 233 234 /* Already invalidated in between */ 235 if (!(ref->flags & E500_TLB_VALID)) 236 return; 237 238 /* Guest tlbe is backed by at most one host tlbe per shadow pid. */ 239 kvmppc_e500_tlbil_one(vcpu_e500, gtlbe); 240 241 /* Mark the TLB as not backed by the host anymore */ 242 ref->flags &= ~E500_TLB_VALID; 243 } 244 245 static inline int tlbe_is_writable(struct kvm_book3e_206_tlb_entry *tlbe) 246 { 247 return tlbe->mas7_3 & (MAS3_SW|MAS3_UW); 248 } 249 250 static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref, 251 struct kvm_book3e_206_tlb_entry *gtlbe, 252 pfn_t pfn) 253 { 254 ref->pfn = pfn; 255 ref->flags |= E500_TLB_VALID; 256 257 /* Mark the page accessed */ 258 kvm_set_pfn_accessed(pfn); 259 260 if (tlbe_is_writable(gtlbe)) 261 kvm_set_pfn_dirty(pfn); 262 } 263 264 static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref) 265 { 266 if (ref->flags & E500_TLB_VALID) { 267 /* FIXME: don't log bogus pfn for TLB1 */ 268 trace_kvm_booke206_ref_release(ref->pfn, ref->flags); 269 ref->flags = 0; 270 } 271 } 272 273 static void clear_tlb1_bitmap(struct kvmppc_vcpu_e500 *vcpu_e500) 274 { 275 if (vcpu_e500->g2h_tlb1_map) 276 memset(vcpu_e500->g2h_tlb1_map, 0, 277 sizeof(u64) * vcpu_e500->gtlb_params[1].entries); 278 if (vcpu_e500->h2g_tlb1_rmap) 279 memset(vcpu_e500->h2g_tlb1_rmap, 0, 280 sizeof(unsigned int) * host_tlb_params[1].entries); 281 } 282 283 static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500) 284 { 285 int tlbsel; 286 int i; 287 288 for (tlbsel = 0; tlbsel <= 1; tlbsel++) { 289 for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) { 290 struct tlbe_ref *ref = 291 &vcpu_e500->gtlb_priv[tlbsel][i].ref; 292 kvmppc_e500_ref_release(ref); 293 } 294 } 295 } 296 297 void kvmppc_core_flush_tlb(struct kvm_vcpu *vcpu) 298 { 299 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); 300 kvmppc_e500_tlbil_all(vcpu_e500); 301 clear_tlb_privs(vcpu_e500); 302 clear_tlb1_bitmap(vcpu_e500); 303 } 304 305 /* TID must be supplied by the caller */ 306 static void kvmppc_e500_setup_stlbe( 307 struct kvm_vcpu *vcpu, 308 struct kvm_book3e_206_tlb_entry *gtlbe, 309 int tsize, struct tlbe_ref *ref, u64 gvaddr, 310 struct kvm_book3e_206_tlb_entry *stlbe) 311 { 312 pfn_t pfn = ref->pfn; 313 u32 pr = vcpu->arch.shared->msr & MSR_PR; 314 315 BUG_ON(!(ref->flags & E500_TLB_VALID)); 316 317 /* Force IPROT=0 for all guest mappings. */ 318 stlbe->mas1 = MAS1_TSIZE(tsize) | get_tlb_sts(gtlbe) | MAS1_VALID; 319 stlbe->mas2 = (gvaddr & MAS2_EPN) | 320 e500_shadow_mas2_attrib(gtlbe->mas2, pr); 321 stlbe->mas7_3 = ((u64)pfn << PAGE_SHIFT) | 322 e500_shadow_mas3_attrib(gtlbe->mas7_3, pr); 323 324 #ifdef CONFIG_KVM_BOOKE_HV 325 stlbe->mas8 = MAS8_TGS | vcpu->kvm->arch.lpid; 326 #endif 327 } 328 329 static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500, 330 u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe, 331 int tlbsel, struct kvm_book3e_206_tlb_entry *stlbe, 332 struct tlbe_ref *ref) 333 { 334 struct kvm_memory_slot *slot; 335 unsigned long pfn = 0; /* silence GCC warning */ 336 unsigned long hva; 337 int pfnmap = 0; 338 int tsize = BOOK3E_PAGESZ_4K; 339 int ret = 0; 340 unsigned long mmu_seq; 341 struct kvm *kvm = vcpu_e500->vcpu.kvm; 342 343 /* used to check for invalidations in progress */ 344 mmu_seq = kvm->mmu_notifier_seq; 345 smp_rmb(); 346 347 /* 348 * Translate guest physical to true physical, acquiring 349 * a page reference if it is normal, non-reserved memory. 350 * 351 * gfn_to_memslot() must succeed because otherwise we wouldn't 352 * have gotten this far. Eventually we should just pass the slot 353 * pointer through from the first lookup. 354 */ 355 slot = gfn_to_memslot(vcpu_e500->vcpu.kvm, gfn); 356 hva = gfn_to_hva_memslot(slot, gfn); 357 358 if (tlbsel == 1) { 359 struct vm_area_struct *vma; 360 down_read(¤t->mm->mmap_sem); 361 362 vma = find_vma(current->mm, hva); 363 if (vma && hva >= vma->vm_start && 364 (vma->vm_flags & VM_PFNMAP)) { 365 /* 366 * This VMA is a physically contiguous region (e.g. 367 * /dev/mem) that bypasses normal Linux page 368 * management. Find the overlap between the 369 * vma and the memslot. 370 */ 371 372 unsigned long start, end; 373 unsigned long slot_start, slot_end; 374 375 pfnmap = 1; 376 377 start = vma->vm_pgoff; 378 end = start + 379 ((vma->vm_end - vma->vm_start) >> PAGE_SHIFT); 380 381 pfn = start + ((hva - vma->vm_start) >> PAGE_SHIFT); 382 383 slot_start = pfn - (gfn - slot->base_gfn); 384 slot_end = slot_start + slot->npages; 385 386 if (start < slot_start) 387 start = slot_start; 388 if (end > slot_end) 389 end = slot_end; 390 391 tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >> 392 MAS1_TSIZE_SHIFT; 393 394 /* 395 * e500 doesn't implement the lowest tsize bit, 396 * or 1K pages. 397 */ 398 tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1); 399 400 /* 401 * Now find the largest tsize (up to what the guest 402 * requested) that will cover gfn, stay within the 403 * range, and for which gfn and pfn are mutually 404 * aligned. 405 */ 406 407 for (; tsize > BOOK3E_PAGESZ_4K; tsize -= 2) { 408 unsigned long gfn_start, gfn_end, tsize_pages; 409 tsize_pages = 1 << (tsize - 2); 410 411 gfn_start = gfn & ~(tsize_pages - 1); 412 gfn_end = gfn_start + tsize_pages; 413 414 if (gfn_start + pfn - gfn < start) 415 continue; 416 if (gfn_end + pfn - gfn > end) 417 continue; 418 if ((gfn & (tsize_pages - 1)) != 419 (pfn & (tsize_pages - 1))) 420 continue; 421 422 gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1); 423 pfn &= ~(tsize_pages - 1); 424 break; 425 } 426 } else if (vma && hva >= vma->vm_start && 427 (vma->vm_flags & VM_HUGETLB)) { 428 unsigned long psize = vma_kernel_pagesize(vma); 429 430 tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >> 431 MAS1_TSIZE_SHIFT; 432 433 /* 434 * Take the largest page size that satisfies both host 435 * and guest mapping 436 */ 437 tsize = min(__ilog2(psize) - 10, tsize); 438 439 /* 440 * e500 doesn't implement the lowest tsize bit, 441 * or 1K pages. 442 */ 443 tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1); 444 } 445 446 up_read(¤t->mm->mmap_sem); 447 } 448 449 if (likely(!pfnmap)) { 450 unsigned long tsize_pages = 1 << (tsize + 10 - PAGE_SHIFT); 451 pfn = gfn_to_pfn_memslot(slot, gfn); 452 if (is_error_noslot_pfn(pfn)) { 453 printk(KERN_ERR "Couldn't get real page for gfn %lx!\n", 454 (long)gfn); 455 return -EINVAL; 456 } 457 458 /* Align guest and physical address to page map boundaries */ 459 pfn &= ~(tsize_pages - 1); 460 gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1); 461 } 462 463 spin_lock(&kvm->mmu_lock); 464 if (mmu_notifier_retry(kvm, mmu_seq)) { 465 ret = -EAGAIN; 466 goto out; 467 } 468 469 kvmppc_e500_ref_setup(ref, gtlbe, pfn); 470 471 kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize, 472 ref, gvaddr, stlbe); 473 474 /* Clear i-cache for new pages */ 475 kvmppc_mmu_flush_icache(pfn); 476 477 out: 478 spin_unlock(&kvm->mmu_lock); 479 480 /* Drop refcount on page, so that mmu notifiers can clear it */ 481 kvm_release_pfn_clean(pfn); 482 483 return ret; 484 } 485 486 /* XXX only map the one-one case, for now use TLB0 */ 487 static int kvmppc_e500_tlb0_map(struct kvmppc_vcpu_e500 *vcpu_e500, int esel, 488 struct kvm_book3e_206_tlb_entry *stlbe) 489 { 490 struct kvm_book3e_206_tlb_entry *gtlbe; 491 struct tlbe_ref *ref; 492 int stlbsel = 0; 493 int sesel = 0; 494 int r; 495 496 gtlbe = get_entry(vcpu_e500, 0, esel); 497 ref = &vcpu_e500->gtlb_priv[0][esel].ref; 498 499 r = kvmppc_e500_shadow_map(vcpu_e500, get_tlb_eaddr(gtlbe), 500 get_tlb_raddr(gtlbe) >> PAGE_SHIFT, 501 gtlbe, 0, stlbe, ref); 502 if (r) 503 return r; 504 505 write_stlbe(vcpu_e500, gtlbe, stlbe, stlbsel, sesel); 506 507 return 0; 508 } 509 510 static int kvmppc_e500_tlb1_map_tlb1(struct kvmppc_vcpu_e500 *vcpu_e500, 511 struct tlbe_ref *ref, 512 int esel) 513 { 514 unsigned int sesel = vcpu_e500->host_tlb1_nv++; 515 516 if (unlikely(vcpu_e500->host_tlb1_nv >= tlb1_max_shadow_size())) 517 vcpu_e500->host_tlb1_nv = 0; 518 519 if (vcpu_e500->h2g_tlb1_rmap[sesel]) { 520 unsigned int idx = vcpu_e500->h2g_tlb1_rmap[sesel] - 1; 521 vcpu_e500->g2h_tlb1_map[idx] &= ~(1ULL << sesel); 522 } 523 524 vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_BITMAP; 525 vcpu_e500->g2h_tlb1_map[esel] |= (u64)1 << sesel; 526 vcpu_e500->h2g_tlb1_rmap[sesel] = esel + 1; 527 WARN_ON(!(ref->flags & E500_TLB_VALID)); 528 529 return sesel; 530 } 531 532 /* Caller must ensure that the specified guest TLB entry is safe to insert into 533 * the shadow TLB. */ 534 /* For both one-one and one-to-many */ 535 static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500, 536 u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe, 537 struct kvm_book3e_206_tlb_entry *stlbe, int esel) 538 { 539 struct tlbe_ref *ref = &vcpu_e500->gtlb_priv[1][esel].ref; 540 int sesel; 541 int r; 542 543 r = kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, stlbe, 544 ref); 545 if (r) 546 return r; 547 548 /* Use TLB0 when we can only map a page with 4k */ 549 if (get_tlb_tsize(stlbe) == BOOK3E_PAGESZ_4K) { 550 vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_TLB0; 551 write_stlbe(vcpu_e500, gtlbe, stlbe, 0, 0); 552 return 0; 553 } 554 555 /* Otherwise map into TLB1 */ 556 sesel = kvmppc_e500_tlb1_map_tlb1(vcpu_e500, ref, esel); 557 write_stlbe(vcpu_e500, gtlbe, stlbe, 1, sesel); 558 559 return 0; 560 } 561 562 void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr, 563 unsigned int index) 564 { 565 struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); 566 struct tlbe_priv *priv; 567 struct kvm_book3e_206_tlb_entry *gtlbe, stlbe; 568 int tlbsel = tlbsel_of(index); 569 int esel = esel_of(index); 570 571 gtlbe = get_entry(vcpu_e500, tlbsel, esel); 572 573 switch (tlbsel) { 574 case 0: 575 priv = &vcpu_e500->gtlb_priv[tlbsel][esel]; 576 577 /* Triggers after clear_tlb_privs or on initial mapping */ 578 if (!(priv->ref.flags & E500_TLB_VALID)) { 579 kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe); 580 } else { 581 kvmppc_e500_setup_stlbe(vcpu, gtlbe, BOOK3E_PAGESZ_4K, 582 &priv->ref, eaddr, &stlbe); 583 write_stlbe(vcpu_e500, gtlbe, &stlbe, 0, 0); 584 } 585 break; 586 587 case 1: { 588 gfn_t gfn = gpaddr >> PAGE_SHIFT; 589 kvmppc_e500_tlb1_map(vcpu_e500, eaddr, gfn, gtlbe, &stlbe, 590 esel); 591 break; 592 } 593 594 default: 595 BUG(); 596 break; 597 } 598 } 599 600 /************* MMU Notifiers *************/ 601 602 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) 603 { 604 trace_kvm_unmap_hva(hva); 605 606 /* 607 * Flush all shadow tlb entries everywhere. This is slow, but 608 * we are 100% sure that we catch the to be unmapped page 609 */ 610 kvm_flush_remote_tlbs(kvm); 611 612 return 0; 613 } 614 615 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end) 616 { 617 /* kvm_unmap_hva flushes everything anyways */ 618 kvm_unmap_hva(kvm, start); 619 620 return 0; 621 } 622 623 int kvm_age_hva(struct kvm *kvm, unsigned long hva) 624 { 625 /* XXX could be more clever ;) */ 626 return 0; 627 } 628 629 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) 630 { 631 /* XXX could be more clever ;) */ 632 return 0; 633 } 634 635 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) 636 { 637 /* The page will get remapped properly on its next fault */ 638 kvm_unmap_hva(kvm, hva); 639 } 640 641 /*****************************************/ 642 643 int e500_mmu_host_init(struct kvmppc_vcpu_e500 *vcpu_e500) 644 { 645 host_tlb_params[0].entries = mfspr(SPRN_TLB0CFG) & TLBnCFG_N_ENTRY; 646 host_tlb_params[1].entries = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY; 647 648 /* 649 * This should never happen on real e500 hardware, but is 650 * architecturally possible -- e.g. in some weird nested 651 * virtualization case. 652 */ 653 if (host_tlb_params[0].entries == 0 || 654 host_tlb_params[1].entries == 0) { 655 pr_err("%s: need to know host tlb size\n", __func__); 656 return -ENODEV; 657 } 658 659 host_tlb_params[0].ways = (mfspr(SPRN_TLB0CFG) & TLBnCFG_ASSOC) >> 660 TLBnCFG_ASSOC_SHIFT; 661 host_tlb_params[1].ways = host_tlb_params[1].entries; 662 663 if (!is_power_of_2(host_tlb_params[0].entries) || 664 !is_power_of_2(host_tlb_params[0].ways) || 665 host_tlb_params[0].entries < host_tlb_params[0].ways || 666 host_tlb_params[0].ways == 0) { 667 pr_err("%s: bad tlb0 host config: %u entries %u ways\n", 668 __func__, host_tlb_params[0].entries, 669 host_tlb_params[0].ways); 670 return -ENODEV; 671 } 672 673 host_tlb_params[0].sets = 674 host_tlb_params[0].entries / host_tlb_params[0].ways; 675 host_tlb_params[1].sets = 1; 676 677 vcpu_e500->h2g_tlb1_rmap = kzalloc(sizeof(unsigned int) * 678 host_tlb_params[1].entries, 679 GFP_KERNEL); 680 if (!vcpu_e500->h2g_tlb1_rmap) 681 return -EINVAL; 682 683 return 0; 684 } 685 686 void e500_mmu_host_uninit(struct kvmppc_vcpu_e500 *vcpu_e500) 687 { 688 kfree(vcpu_e500->h2g_tlb1_rmap); 689 } 690