1bc8080cbSHollis Blanchard /* 25ce941eeSScott Wood * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved. 3bc8080cbSHollis Blanchard * 4bc8080cbSHollis Blanchard * Author: Yu Liu, <yu.liu@freescale.com> 5bc8080cbSHollis Blanchard * 6bc8080cbSHollis Blanchard * Description: 7bc8080cbSHollis Blanchard * This file is derived from arch/powerpc/kvm/44x_emulate.c, 8bc8080cbSHollis Blanchard * by Hollis Blanchard <hollisb@us.ibm.com>. 9bc8080cbSHollis Blanchard * 10bc8080cbSHollis Blanchard * This program is free software; you can redistribute it and/or modify 11bc8080cbSHollis Blanchard * it under the terms of the GNU General Public License, version 2, as 12bc8080cbSHollis Blanchard * published by the Free Software Foundation. 13bc8080cbSHollis Blanchard */ 14bc8080cbSHollis Blanchard 15bc8080cbSHollis Blanchard #include <asm/kvm_ppc.h> 16bc8080cbSHollis Blanchard #include <asm/disassemble.h> 174ab96919SAlexander Graf #include <asm/dbell.h> 18bc8080cbSHollis Blanchard 19bc8080cbSHollis Blanchard #include "booke.h" 2029a5a6f9SScott Wood #include "e500.h" 21bc8080cbSHollis Blanchard 224ab96919SAlexander Graf #define XOP_MSGSND 206 234ab96919SAlexander Graf #define XOP_MSGCLR 238 24bc8080cbSHollis Blanchard #define XOP_TLBIVAX 786 25bc8080cbSHollis Blanchard #define XOP_TLBSX 914 26bc8080cbSHollis Blanchard #define XOP_TLBRE 946 27bc8080cbSHollis Blanchard #define XOP_TLBWE 978 28ab9fc405SScott Wood #define XOP_TLBILX 18 29b12c7841SBharat Bhushan #define XOP_EHPRIV 270 30bc8080cbSHollis Blanchard 314ab96919SAlexander Graf #ifdef CONFIG_KVM_E500MC 324ab96919SAlexander Graf static int dbell2prio(ulong param) 334ab96919SAlexander Graf { 344ab96919SAlexander Graf int msg = param & PPC_DBELL_TYPE_MASK; 354ab96919SAlexander Graf int prio = -1; 364ab96919SAlexander Graf 374ab96919SAlexander Graf switch (msg) { 384ab96919SAlexander Graf case PPC_DBELL_TYPE(PPC_DBELL): 394ab96919SAlexander Graf prio = BOOKE_IRQPRIO_DBELL; 404ab96919SAlexander Graf break; 414ab96919SAlexander Graf case PPC_DBELL_TYPE(PPC_DBELL_CRIT): 424ab96919SAlexander Graf prio = BOOKE_IRQPRIO_DBELL_CRIT; 434ab96919SAlexander Graf break; 444ab96919SAlexander Graf default: 454ab96919SAlexander Graf break; 464ab96919SAlexander Graf } 474ab96919SAlexander Graf 484ab96919SAlexander Graf return prio; 494ab96919SAlexander Graf } 504ab96919SAlexander Graf 514ab96919SAlexander Graf static int kvmppc_e500_emul_msgclr(struct kvm_vcpu *vcpu, int rb) 524ab96919SAlexander Graf { 534ab96919SAlexander Graf ulong param = vcpu->arch.gpr[rb]; 544ab96919SAlexander Graf int prio = dbell2prio(param); 554ab96919SAlexander Graf 564ab96919SAlexander Graf if (prio < 0) 574ab96919SAlexander Graf return EMULATE_FAIL; 584ab96919SAlexander Graf 594ab96919SAlexander Graf clear_bit(prio, &vcpu->arch.pending_exceptions); 604ab96919SAlexander Graf return EMULATE_DONE; 614ab96919SAlexander Graf } 624ab96919SAlexander Graf 634ab96919SAlexander Graf static int kvmppc_e500_emul_msgsnd(struct kvm_vcpu *vcpu, int rb) 644ab96919SAlexander Graf { 654ab96919SAlexander Graf ulong param = vcpu->arch.gpr[rb]; 664ab96919SAlexander Graf int prio = dbell2prio(rb); 674ab96919SAlexander Graf int pir = param & PPC_DBELL_PIR_MASK; 684ab96919SAlexander Graf int i; 694ab96919SAlexander Graf struct kvm_vcpu *cvcpu; 704ab96919SAlexander Graf 714ab96919SAlexander Graf if (prio < 0) 724ab96919SAlexander Graf return EMULATE_FAIL; 734ab96919SAlexander Graf 744ab96919SAlexander Graf kvm_for_each_vcpu(i, cvcpu, vcpu->kvm) { 754ab96919SAlexander Graf int cpir = cvcpu->arch.shared->pir; 764ab96919SAlexander Graf if ((param & PPC_DBELL_MSG_BRDCAST) || (cpir == pir)) { 774ab96919SAlexander Graf set_bit(prio, &cvcpu->arch.pending_exceptions); 784ab96919SAlexander Graf kvm_vcpu_kick(cvcpu); 794ab96919SAlexander Graf } 804ab96919SAlexander Graf } 814ab96919SAlexander Graf 824ab96919SAlexander Graf return EMULATE_DONE; 834ab96919SAlexander Graf } 844ab96919SAlexander Graf #endif 854ab96919SAlexander Graf 86b12c7841SBharat Bhushan static int kvmppc_e500_emul_ehpriv(struct kvm_run *run, struct kvm_vcpu *vcpu, 87b12c7841SBharat Bhushan unsigned int inst, int *advance) 88b12c7841SBharat Bhushan { 89b12c7841SBharat Bhushan int emulated = EMULATE_DONE; 90b12c7841SBharat Bhushan 91b12c7841SBharat Bhushan switch (get_oc(inst)) { 92b12c7841SBharat Bhushan case EHPRIV_OC_DEBUG: 93b12c7841SBharat Bhushan run->exit_reason = KVM_EXIT_DEBUG; 94b12c7841SBharat Bhushan run->debug.arch.address = vcpu->arch.pc; 95b12c7841SBharat Bhushan run->debug.arch.status = 0; 96b12c7841SBharat Bhushan kvmppc_account_exit(vcpu, DEBUG_EXITS); 97b12c7841SBharat Bhushan emulated = EMULATE_EXIT_USER; 98b12c7841SBharat Bhushan *advance = 0; 99b12c7841SBharat Bhushan break; 100b12c7841SBharat Bhushan default: 101b12c7841SBharat Bhushan emulated = EMULATE_FAIL; 102b12c7841SBharat Bhushan } 103b12c7841SBharat Bhushan return emulated; 104b12c7841SBharat Bhushan } 105b12c7841SBharat Bhushan 1063a167beaSAneesh Kumar K.V int kvmppc_core_emulate_op_e500(struct kvm_run *run, struct kvm_vcpu *vcpu, 107bc8080cbSHollis Blanchard unsigned int inst, int *advance) 108bc8080cbSHollis Blanchard { 109bc8080cbSHollis Blanchard int emulated = EMULATE_DONE; 110c46dc9a8SAlexander Graf int ra = get_ra(inst); 111c46dc9a8SAlexander Graf int rb = get_rb(inst); 112c46dc9a8SAlexander Graf int rt = get_rt(inst); 1137cdd7a95SMihai Caraman gva_t ea; 114bc8080cbSHollis Blanchard 115bc8080cbSHollis Blanchard switch (get_op(inst)) { 116bc8080cbSHollis Blanchard case 31: 117bc8080cbSHollis Blanchard switch (get_xop(inst)) { 118bc8080cbSHollis Blanchard 1194ab96919SAlexander Graf #ifdef CONFIG_KVM_E500MC 1204ab96919SAlexander Graf case XOP_MSGSND: 121c46dc9a8SAlexander Graf emulated = kvmppc_e500_emul_msgsnd(vcpu, rb); 1224ab96919SAlexander Graf break; 1234ab96919SAlexander Graf 1244ab96919SAlexander Graf case XOP_MSGCLR: 125c46dc9a8SAlexander Graf emulated = kvmppc_e500_emul_msgclr(vcpu, rb); 1264ab96919SAlexander Graf break; 1274ab96919SAlexander Graf #endif 1284ab96919SAlexander Graf 129bc8080cbSHollis Blanchard case XOP_TLBRE: 130bc8080cbSHollis Blanchard emulated = kvmppc_e500_emul_tlbre(vcpu); 131bc8080cbSHollis Blanchard break; 132bc8080cbSHollis Blanchard 133bc8080cbSHollis Blanchard case XOP_TLBWE: 134bc8080cbSHollis Blanchard emulated = kvmppc_e500_emul_tlbwe(vcpu); 135bc8080cbSHollis Blanchard break; 136bc8080cbSHollis Blanchard 137bc8080cbSHollis Blanchard case XOP_TLBSX: 1387cdd7a95SMihai Caraman ea = kvmppc_get_ea_indexed(vcpu, ra, rb); 1397cdd7a95SMihai Caraman emulated = kvmppc_e500_emul_tlbsx(vcpu, ea); 140bc8080cbSHollis Blanchard break; 141bc8080cbSHollis Blanchard 1427cdd7a95SMihai Caraman case XOP_TLBILX: { 1437cdd7a95SMihai Caraman int type = rt & 0x3; 1447cdd7a95SMihai Caraman ea = kvmppc_get_ea_indexed(vcpu, ra, rb); 1457cdd7a95SMihai Caraman emulated = kvmppc_e500_emul_tlbilx(vcpu, type, ea); 146ab9fc405SScott Wood break; 1477cdd7a95SMihai Caraman } 148ab9fc405SScott Wood 149bc8080cbSHollis Blanchard case XOP_TLBIVAX: 1507cdd7a95SMihai Caraman ea = kvmppc_get_ea_indexed(vcpu, ra, rb); 1517cdd7a95SMihai Caraman emulated = kvmppc_e500_emul_tlbivax(vcpu, ea); 152bc8080cbSHollis Blanchard break; 153bc8080cbSHollis Blanchard 154b12c7841SBharat Bhushan case XOP_EHPRIV: 155b12c7841SBharat Bhushan emulated = kvmppc_e500_emul_ehpriv(run, vcpu, inst, 156b12c7841SBharat Bhushan advance); 157b12c7841SBharat Bhushan break; 158b12c7841SBharat Bhushan 159bc8080cbSHollis Blanchard default: 160bc8080cbSHollis Blanchard emulated = EMULATE_FAIL; 161bc8080cbSHollis Blanchard } 162bc8080cbSHollis Blanchard 163bc8080cbSHollis Blanchard break; 164bc8080cbSHollis Blanchard 165bc8080cbSHollis Blanchard default: 166bc8080cbSHollis Blanchard emulated = EMULATE_FAIL; 167bc8080cbSHollis Blanchard } 168bc8080cbSHollis Blanchard 169bc8080cbSHollis Blanchard if (emulated == EMULATE_FAIL) 170bc8080cbSHollis Blanchard emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance); 171bc8080cbSHollis Blanchard 172bc8080cbSHollis Blanchard return emulated; 173bc8080cbSHollis Blanchard } 174bc8080cbSHollis Blanchard 1753a167beaSAneesh Kumar K.V int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong spr_val) 176bc8080cbSHollis Blanchard { 177bc8080cbSHollis Blanchard struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); 178bc8080cbSHollis Blanchard int emulated = EMULATE_DONE; 179bc8080cbSHollis Blanchard 180bc8080cbSHollis Blanchard switch (sprn) { 18173196cd3SScott Wood #ifndef CONFIG_KVM_BOOKE_HV 182bc8080cbSHollis Blanchard case SPRN_PID: 1835ce941eeSScott Wood kvmppc_set_pid(vcpu, spr_val); 184bc8080cbSHollis Blanchard break; 185bc8080cbSHollis Blanchard case SPRN_PID1: 186dd9ebf1fSLiu Yu if (spr_val != 0) 187dd9ebf1fSLiu Yu return EMULATE_FAIL; 18854771e62SAlexander Graf vcpu_e500->pid[1] = spr_val; 18954771e62SAlexander Graf break; 190bc8080cbSHollis Blanchard case SPRN_PID2: 191dd9ebf1fSLiu Yu if (spr_val != 0) 192dd9ebf1fSLiu Yu return EMULATE_FAIL; 19354771e62SAlexander Graf vcpu_e500->pid[2] = spr_val; 19454771e62SAlexander Graf break; 195bc8080cbSHollis Blanchard case SPRN_MAS0: 19654771e62SAlexander Graf vcpu->arch.shared->mas0 = spr_val; 19754771e62SAlexander Graf break; 198bc8080cbSHollis Blanchard case SPRN_MAS1: 19954771e62SAlexander Graf vcpu->arch.shared->mas1 = spr_val; 20054771e62SAlexander Graf break; 201bc8080cbSHollis Blanchard case SPRN_MAS2: 20254771e62SAlexander Graf vcpu->arch.shared->mas2 = spr_val; 20354771e62SAlexander Graf break; 204bc8080cbSHollis Blanchard case SPRN_MAS3: 205b5904972SScott Wood vcpu->arch.shared->mas7_3 &= ~(u64)0xffffffff; 206b5904972SScott Wood vcpu->arch.shared->mas7_3 |= spr_val; 207dc83b8bcSScott Wood break; 208bc8080cbSHollis Blanchard case SPRN_MAS4: 20954771e62SAlexander Graf vcpu->arch.shared->mas4 = spr_val; 21054771e62SAlexander Graf break; 211bc8080cbSHollis Blanchard case SPRN_MAS6: 21254771e62SAlexander Graf vcpu->arch.shared->mas6 = spr_val; 21354771e62SAlexander Graf break; 214bc8080cbSHollis Blanchard case SPRN_MAS7: 215b5904972SScott Wood vcpu->arch.shared->mas7_3 &= (u64)0xffffffff; 216b5904972SScott Wood vcpu->arch.shared->mas7_3 |= (u64)spr_val << 32; 217dc83b8bcSScott Wood break; 21873196cd3SScott Wood #endif 219d86be077SLiu Yu case SPRN_L1CSR0: 220d86be077SLiu Yu vcpu_e500->l1csr0 = spr_val; 221d86be077SLiu Yu vcpu_e500->l1csr0 &= ~(L1CSR0_DCFI | L1CSR0_CLFC); 222d86be077SLiu Yu break; 223bc8080cbSHollis Blanchard case SPRN_L1CSR1: 22454771e62SAlexander Graf vcpu_e500->l1csr1 = spr_val; 22507fec1c2SAlexander Graf vcpu_e500->l1csr1 &= ~(L1CSR1_ICFI | L1CSR1_ICLFR); 22654771e62SAlexander Graf break; 227bc8080cbSHollis Blanchard case SPRN_HID0: 22854771e62SAlexander Graf vcpu_e500->hid0 = spr_val; 22954771e62SAlexander Graf break; 230bc8080cbSHollis Blanchard case SPRN_HID1: 23154771e62SAlexander Graf vcpu_e500->hid1 = spr_val; 23254771e62SAlexander Graf break; 233bc8080cbSHollis Blanchard 234b0a1835dSLiu Yu case SPRN_MMUCSR0: 235b0a1835dSLiu Yu emulated = kvmppc_e500_emul_mt_mmucsr0(vcpu_e500, 2368e5b26b5SAlexander Graf spr_val); 237b0a1835dSLiu Yu break; 238b0a1835dSLiu Yu 239bb3a8a17SHollis Blanchard /* extra exceptions */ 240bb3a8a17SHollis Blanchard case SPRN_IVOR32: 2418e5b26b5SAlexander Graf vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val; 242bb3a8a17SHollis Blanchard break; 243bb3a8a17SHollis Blanchard case SPRN_IVOR33: 2448e5b26b5SAlexander Graf vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] = spr_val; 245bb3a8a17SHollis Blanchard break; 246bb3a8a17SHollis Blanchard case SPRN_IVOR34: 2478e5b26b5SAlexander Graf vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] = spr_val; 248bb3a8a17SHollis Blanchard break; 249bb3a8a17SHollis Blanchard case SPRN_IVOR35: 2508e5b26b5SAlexander Graf vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] = spr_val; 251bb3a8a17SHollis Blanchard break; 25273196cd3SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 25373196cd3SScott Wood case SPRN_IVOR36: 25473196cd3SScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL] = spr_val; 25573196cd3SScott Wood break; 25673196cd3SScott Wood case SPRN_IVOR37: 25773196cd3SScott Wood vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT] = spr_val; 25873196cd3SScott Wood break; 25973196cd3SScott Wood #endif 260bc8080cbSHollis Blanchard default: 26154771e62SAlexander Graf emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val); 262bc8080cbSHollis Blanchard } 263bc8080cbSHollis Blanchard 264bc8080cbSHollis Blanchard return emulated; 265bc8080cbSHollis Blanchard } 266bc8080cbSHollis Blanchard 2673a167beaSAneesh Kumar K.V int kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val) 268bc8080cbSHollis Blanchard { 269bc8080cbSHollis Blanchard struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu); 270bc8080cbSHollis Blanchard int emulated = EMULATE_DONE; 271bc8080cbSHollis Blanchard 272bc8080cbSHollis Blanchard switch (sprn) { 27373196cd3SScott Wood #ifndef CONFIG_KVM_BOOKE_HV 274bc8080cbSHollis Blanchard case SPRN_PID: 27554771e62SAlexander Graf *spr_val = vcpu_e500->pid[0]; 27654771e62SAlexander Graf break; 277bc8080cbSHollis Blanchard case SPRN_PID1: 27854771e62SAlexander Graf *spr_val = vcpu_e500->pid[1]; 27954771e62SAlexander Graf break; 280bc8080cbSHollis Blanchard case SPRN_PID2: 28154771e62SAlexander Graf *spr_val = vcpu_e500->pid[2]; 28254771e62SAlexander Graf break; 283bc8080cbSHollis Blanchard case SPRN_MAS0: 28454771e62SAlexander Graf *spr_val = vcpu->arch.shared->mas0; 28554771e62SAlexander Graf break; 286bc8080cbSHollis Blanchard case SPRN_MAS1: 28754771e62SAlexander Graf *spr_val = vcpu->arch.shared->mas1; 28854771e62SAlexander Graf break; 289bc8080cbSHollis Blanchard case SPRN_MAS2: 29054771e62SAlexander Graf *spr_val = vcpu->arch.shared->mas2; 29154771e62SAlexander Graf break; 292bc8080cbSHollis Blanchard case SPRN_MAS3: 29354771e62SAlexander Graf *spr_val = (u32)vcpu->arch.shared->mas7_3; 294b5904972SScott Wood break; 295bc8080cbSHollis Blanchard case SPRN_MAS4: 29654771e62SAlexander Graf *spr_val = vcpu->arch.shared->mas4; 29754771e62SAlexander Graf break; 298bc8080cbSHollis Blanchard case SPRN_MAS6: 29954771e62SAlexander Graf *spr_val = vcpu->arch.shared->mas6; 30054771e62SAlexander Graf break; 301bc8080cbSHollis Blanchard case SPRN_MAS7: 30254771e62SAlexander Graf *spr_val = vcpu->arch.shared->mas7_3 >> 32; 303b5904972SScott Wood break; 30473196cd3SScott Wood #endif 30521bd000aSBharat Bhushan case SPRN_DECAR: 30621bd000aSBharat Bhushan *spr_val = vcpu->arch.decar; 30721bd000aSBharat Bhushan break; 308bc8080cbSHollis Blanchard case SPRN_TLB0CFG: 30954771e62SAlexander Graf *spr_val = vcpu->arch.tlbcfg[0]; 31054771e62SAlexander Graf break; 311bc8080cbSHollis Blanchard case SPRN_TLB1CFG: 31254771e62SAlexander Graf *spr_val = vcpu->arch.tlbcfg[1]; 31354771e62SAlexander Graf break; 314307d9008SMihai Caraman case SPRN_TLB0PS: 315307d9008SMihai Caraman if (!has_feature(vcpu, VCPU_FTR_MMU_V2)) 316307d9008SMihai Caraman return EMULATE_FAIL; 317307d9008SMihai Caraman *spr_val = vcpu->arch.tlbps[0]; 318307d9008SMihai Caraman break; 319307d9008SMihai Caraman case SPRN_TLB1PS: 320307d9008SMihai Caraman if (!has_feature(vcpu, VCPU_FTR_MMU_V2)) 321307d9008SMihai Caraman return EMULATE_FAIL; 322307d9008SMihai Caraman *spr_val = vcpu->arch.tlbps[1]; 323307d9008SMihai Caraman break; 324d86be077SLiu Yu case SPRN_L1CSR0: 32554771e62SAlexander Graf *spr_val = vcpu_e500->l1csr0; 32654771e62SAlexander Graf break; 327bc8080cbSHollis Blanchard case SPRN_L1CSR1: 32854771e62SAlexander Graf *spr_val = vcpu_e500->l1csr1; 32954771e62SAlexander Graf break; 330bc8080cbSHollis Blanchard case SPRN_HID0: 33154771e62SAlexander Graf *spr_val = vcpu_e500->hid0; 33254771e62SAlexander Graf break; 333bc8080cbSHollis Blanchard case SPRN_HID1: 33454771e62SAlexander Graf *spr_val = vcpu_e500->hid1; 33554771e62SAlexander Graf break; 33690d34b0eSScott Wood case SPRN_SVR: 33754771e62SAlexander Graf *spr_val = vcpu_e500->svr; 33854771e62SAlexander Graf break; 339bc8080cbSHollis Blanchard 340b0a1835dSLiu Yu case SPRN_MMUCSR0: 34154771e62SAlexander Graf *spr_val = 0; 34254771e62SAlexander Graf break; 343b0a1835dSLiu Yu 34406579dd9SLiu Yu case SPRN_MMUCFG: 34554771e62SAlexander Graf *spr_val = vcpu->arch.mmucfg; 34654771e62SAlexander Graf break; 3479a6061d7SMihai Caraman case SPRN_EPTCFG: 3489a6061d7SMihai Caraman if (!has_feature(vcpu, VCPU_FTR_MMU_V2)) 3499a6061d7SMihai Caraman return EMULATE_FAIL; 3509a6061d7SMihai Caraman /* 3519a6061d7SMihai Caraman * Legacy Linux guests access EPTCFG register even if the E.PT 3529a6061d7SMihai Caraman * category is disabled in the VM. Give them a chance to live. 3539a6061d7SMihai Caraman */ 3549a6061d7SMihai Caraman *spr_val = vcpu->arch.eptcfg; 3559a6061d7SMihai Caraman break; 35606579dd9SLiu Yu 357bb3a8a17SHollis Blanchard /* extra exceptions */ 358bb3a8a17SHollis Blanchard case SPRN_IVOR32: 35954771e62SAlexander Graf *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL]; 360bb3a8a17SHollis Blanchard break; 361bb3a8a17SHollis Blanchard case SPRN_IVOR33: 36254771e62SAlexander Graf *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA]; 363bb3a8a17SHollis Blanchard break; 364bb3a8a17SHollis Blanchard case SPRN_IVOR34: 36554771e62SAlexander Graf *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND]; 366bb3a8a17SHollis Blanchard break; 367bb3a8a17SHollis Blanchard case SPRN_IVOR35: 36854771e62SAlexander Graf *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR]; 369bb3a8a17SHollis Blanchard break; 37073196cd3SScott Wood #ifdef CONFIG_KVM_BOOKE_HV 37173196cd3SScott Wood case SPRN_IVOR36: 37254771e62SAlexander Graf *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL]; 37373196cd3SScott Wood break; 37473196cd3SScott Wood case SPRN_IVOR37: 37554771e62SAlexander Graf *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DBELL_CRIT]; 37673196cd3SScott Wood break; 37773196cd3SScott Wood #endif 378bc8080cbSHollis Blanchard default: 37954771e62SAlexander Graf emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val); 380bc8080cbSHollis Blanchard } 381bc8080cbSHollis Blanchard 382bc8080cbSHollis Blanchard return emulated; 383bc8080cbSHollis Blanchard } 384bc8080cbSHollis Blanchard 385