xref: /openbmc/linux/arch/powerpc/kvm/booke.c (revision d7a3d85e)
1 /*
2  * This program is free software; you can redistribute it and/or modify
3  * it under the terms of the GNU General Public License, version 2, as
4  * published by the Free Software Foundation.
5  *
6  * This program is distributed in the hope that it will be useful,
7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9  * GNU General Public License for more details.
10  *
11  * You should have received a copy of the GNU General Public License
12  * along with this program; if not, write to the Free Software
13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14  *
15  * Copyright IBM Corp. 2007
16  * Copyright 2010-2011 Freescale Semiconductor, Inc.
17  *
18  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19  *          Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
20  *          Scott Wood <scottwood@freescale.com>
21  *          Varun Sethi <varun.sethi@freescale.com>
22  */
23 
24 #include <linux/errno.h>
25 #include <linux/err.h>
26 #include <linux/kvm_host.h>
27 #include <linux/gfp.h>
28 #include <linux/module.h>
29 #include <linux/vmalloc.h>
30 #include <linux/fs.h>
31 
32 #include <asm/cputable.h>
33 #include <asm/uaccess.h>
34 #include <asm/kvm_ppc.h>
35 #include <asm/cacheflush.h>
36 #include <asm/dbell.h>
37 #include <asm/hw_irq.h>
38 #include <asm/irq.h>
39 #include <asm/time.h>
40 
41 #include "timing.h"
42 #include "booke.h"
43 
44 #define CREATE_TRACE_POINTS
45 #include "trace_booke.h"
46 
47 unsigned long kvmppc_booke_handlers;
48 
49 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
50 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
51 
52 struct kvm_stats_debugfs_item debugfs_entries[] = {
53 	{ "mmio",       VCPU_STAT(mmio_exits) },
54 	{ "sig",        VCPU_STAT(signal_exits) },
55 	{ "itlb_r",     VCPU_STAT(itlb_real_miss_exits) },
56 	{ "itlb_v",     VCPU_STAT(itlb_virt_miss_exits) },
57 	{ "dtlb_r",     VCPU_STAT(dtlb_real_miss_exits) },
58 	{ "dtlb_v",     VCPU_STAT(dtlb_virt_miss_exits) },
59 	{ "sysc",       VCPU_STAT(syscall_exits) },
60 	{ "isi",        VCPU_STAT(isi_exits) },
61 	{ "dsi",        VCPU_STAT(dsi_exits) },
62 	{ "inst_emu",   VCPU_STAT(emulated_inst_exits) },
63 	{ "dec",        VCPU_STAT(dec_exits) },
64 	{ "ext_intr",   VCPU_STAT(ext_intr_exits) },
65 	{ "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
66 	{ "halt_wakeup", VCPU_STAT(halt_wakeup) },
67 	{ "doorbell", VCPU_STAT(dbell_exits) },
68 	{ "guest doorbell", VCPU_STAT(gdbell_exits) },
69 	{ "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
70 	{ NULL }
71 };
72 
73 /* TODO: use vcpu_printf() */
74 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
75 {
76 	int i;
77 
78 	printk("pc:   %08lx msr:  %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
79 	printk("lr:   %08lx ctr:  %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
80 	printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
81 					    vcpu->arch.shared->srr1);
82 
83 	printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
84 
85 	for (i = 0; i < 32; i += 4) {
86 		printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i,
87 		       kvmppc_get_gpr(vcpu, i),
88 		       kvmppc_get_gpr(vcpu, i+1),
89 		       kvmppc_get_gpr(vcpu, i+2),
90 		       kvmppc_get_gpr(vcpu, i+3));
91 	}
92 }
93 
94 #ifdef CONFIG_SPE
95 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu)
96 {
97 	preempt_disable();
98 	enable_kernel_spe();
99 	kvmppc_save_guest_spe(vcpu);
100 	vcpu->arch.shadow_msr &= ~MSR_SPE;
101 	preempt_enable();
102 }
103 
104 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu)
105 {
106 	preempt_disable();
107 	enable_kernel_spe();
108 	kvmppc_load_guest_spe(vcpu);
109 	vcpu->arch.shadow_msr |= MSR_SPE;
110 	preempt_enable();
111 }
112 
113 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
114 {
115 	if (vcpu->arch.shared->msr & MSR_SPE) {
116 		if (!(vcpu->arch.shadow_msr & MSR_SPE))
117 			kvmppc_vcpu_enable_spe(vcpu);
118 	} else if (vcpu->arch.shadow_msr & MSR_SPE) {
119 		kvmppc_vcpu_disable_spe(vcpu);
120 	}
121 }
122 #else
123 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu)
124 {
125 }
126 #endif
127 
128 /*
129  * Load up guest vcpu FP state if it's needed.
130  * It also set the MSR_FP in thread so that host know
131  * we're holding FPU, and then host can help to save
132  * guest vcpu FP state if other threads require to use FPU.
133  * This simulates an FP unavailable fault.
134  *
135  * It requires to be called with preemption disabled.
136  */
137 static inline void kvmppc_load_guest_fp(struct kvm_vcpu *vcpu)
138 {
139 #ifdef CONFIG_PPC_FPU
140 	if (!(current->thread.regs->msr & MSR_FP)) {
141 		enable_kernel_fp();
142 		load_fp_state(&vcpu->arch.fp);
143 		current->thread.fp_save_area = &vcpu->arch.fp;
144 		current->thread.regs->msr |= MSR_FP;
145 	}
146 #endif
147 }
148 
149 /*
150  * Save guest vcpu FP state into thread.
151  * It requires to be called with preemption disabled.
152  */
153 static inline void kvmppc_save_guest_fp(struct kvm_vcpu *vcpu)
154 {
155 #ifdef CONFIG_PPC_FPU
156 	if (current->thread.regs->msr & MSR_FP)
157 		giveup_fpu(current);
158 	current->thread.fp_save_area = NULL;
159 #endif
160 }
161 
162 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu)
163 {
164 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV)
165 	/* We always treat the FP bit as enabled from the host
166 	   perspective, so only need to adjust the shadow MSR */
167 	vcpu->arch.shadow_msr &= ~MSR_FP;
168 	vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP;
169 #endif
170 }
171 
172 /*
173  * Simulate AltiVec unavailable fault to load guest state
174  * from thread to AltiVec unit.
175  * It requires to be called with preemption disabled.
176  */
177 static inline void kvmppc_load_guest_altivec(struct kvm_vcpu *vcpu)
178 {
179 #ifdef CONFIG_ALTIVEC
180 	if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
181 		if (!(current->thread.regs->msr & MSR_VEC)) {
182 			enable_kernel_altivec();
183 			load_vr_state(&vcpu->arch.vr);
184 			current->thread.vr_save_area = &vcpu->arch.vr;
185 			current->thread.regs->msr |= MSR_VEC;
186 		}
187 	}
188 #endif
189 }
190 
191 /*
192  * Save guest vcpu AltiVec state into thread.
193  * It requires to be called with preemption disabled.
194  */
195 static inline void kvmppc_save_guest_altivec(struct kvm_vcpu *vcpu)
196 {
197 #ifdef CONFIG_ALTIVEC
198 	if (cpu_has_feature(CPU_FTR_ALTIVEC)) {
199 		if (current->thread.regs->msr & MSR_VEC)
200 			giveup_altivec(current);
201 		current->thread.vr_save_area = NULL;
202 	}
203 #endif
204 }
205 
206 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu)
207 {
208 	/* Synchronize guest's desire to get debug interrupts into shadow MSR */
209 #ifndef CONFIG_KVM_BOOKE_HV
210 	vcpu->arch.shadow_msr &= ~MSR_DE;
211 	vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE;
212 #endif
213 
214 	/* Force enable debug interrupts when user space wants to debug */
215 	if (vcpu->guest_debug) {
216 #ifdef CONFIG_KVM_BOOKE_HV
217 		/*
218 		 * Since there is no shadow MSR, sync MSR_DE into the guest
219 		 * visible MSR.
220 		 */
221 		vcpu->arch.shared->msr |= MSR_DE;
222 #else
223 		vcpu->arch.shadow_msr |= MSR_DE;
224 		vcpu->arch.shared->msr &= ~MSR_DE;
225 #endif
226 	}
227 }
228 
229 /*
230  * Helper function for "full" MSR writes.  No need to call this if only
231  * EE/CE/ME/DE/RI are changing.
232  */
233 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
234 {
235 	u32 old_msr = vcpu->arch.shared->msr;
236 
237 #ifdef CONFIG_KVM_BOOKE_HV
238 	new_msr |= MSR_GS;
239 #endif
240 
241 	vcpu->arch.shared->msr = new_msr;
242 
243 	kvmppc_mmu_msr_notify(vcpu, old_msr);
244 	kvmppc_vcpu_sync_spe(vcpu);
245 	kvmppc_vcpu_sync_fpu(vcpu);
246 	kvmppc_vcpu_sync_debug(vcpu);
247 }
248 
249 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu,
250                                        unsigned int priority)
251 {
252 	trace_kvm_booke_queue_irqprio(vcpu, priority);
253 	set_bit(priority, &vcpu->arch.pending_exceptions);
254 }
255 
256 void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu,
257 				 ulong dear_flags, ulong esr_flags)
258 {
259 	vcpu->arch.queued_dear = dear_flags;
260 	vcpu->arch.queued_esr = esr_flags;
261 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS);
262 }
263 
264 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu,
265 				    ulong dear_flags, ulong esr_flags)
266 {
267 	vcpu->arch.queued_dear = dear_flags;
268 	vcpu->arch.queued_esr = esr_flags;
269 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE);
270 }
271 
272 void kvmppc_core_queue_itlb_miss(struct kvm_vcpu *vcpu)
273 {
274 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
275 }
276 
277 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong esr_flags)
278 {
279 	vcpu->arch.queued_esr = esr_flags;
280 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE);
281 }
282 
283 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags,
284 					ulong esr_flags)
285 {
286 	vcpu->arch.queued_dear = dear_flags;
287 	vcpu->arch.queued_esr = esr_flags;
288 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT);
289 }
290 
291 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags)
292 {
293 	vcpu->arch.queued_esr = esr_flags;
294 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM);
295 }
296 
297 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
298 {
299 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER);
300 }
301 
302 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
303 {
304 	return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
305 }
306 
307 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
308 {
309 	clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
310 }
311 
312 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
313                                 struct kvm_interrupt *irq)
314 {
315 	unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
316 
317 	if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
318 		prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
319 
320 	kvmppc_booke_queue_irqprio(vcpu, prio);
321 }
322 
323 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu)
324 {
325 	clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
326 	clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
327 }
328 
329 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu)
330 {
331 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG);
332 }
333 
334 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu)
335 {
336 	clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions);
337 }
338 
339 void kvmppc_core_queue_debug(struct kvm_vcpu *vcpu)
340 {
341 	kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DEBUG);
342 }
343 
344 void kvmppc_core_dequeue_debug(struct kvm_vcpu *vcpu)
345 {
346 	clear_bit(BOOKE_IRQPRIO_DEBUG, &vcpu->arch.pending_exceptions);
347 }
348 
349 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
350 {
351 	kvmppc_set_srr0(vcpu, srr0);
352 	kvmppc_set_srr1(vcpu, srr1);
353 }
354 
355 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
356 {
357 	vcpu->arch.csrr0 = srr0;
358 	vcpu->arch.csrr1 = srr1;
359 }
360 
361 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
362 {
363 	if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) {
364 		vcpu->arch.dsrr0 = srr0;
365 		vcpu->arch.dsrr1 = srr1;
366 	} else {
367 		set_guest_csrr(vcpu, srr0, srr1);
368 	}
369 }
370 
371 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1)
372 {
373 	vcpu->arch.mcsrr0 = srr0;
374 	vcpu->arch.mcsrr1 = srr1;
375 }
376 
377 /* Deliver the interrupt of the corresponding priority, if possible. */
378 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
379                                         unsigned int priority)
380 {
381 	int allowed = 0;
382 	ulong msr_mask = 0;
383 	bool update_esr = false, update_dear = false, update_epr = false;
384 	ulong crit_raw = vcpu->arch.shared->critical;
385 	ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
386 	bool crit;
387 	bool keep_irq = false;
388 	enum int_class int_class;
389 	ulong new_msr = vcpu->arch.shared->msr;
390 
391 	/* Truncate crit indicators in 32 bit mode */
392 	if (!(vcpu->arch.shared->msr & MSR_SF)) {
393 		crit_raw &= 0xffffffff;
394 		crit_r1 &= 0xffffffff;
395 	}
396 
397 	/* Critical section when crit == r1 */
398 	crit = (crit_raw == crit_r1);
399 	/* ... and we're in supervisor mode */
400 	crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
401 
402 	if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
403 		priority = BOOKE_IRQPRIO_EXTERNAL;
404 		keep_irq = true;
405 	}
406 
407 	if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags)
408 		update_epr = true;
409 
410 	switch (priority) {
411 	case BOOKE_IRQPRIO_DTLB_MISS:
412 	case BOOKE_IRQPRIO_DATA_STORAGE:
413 	case BOOKE_IRQPRIO_ALIGNMENT:
414 		update_dear = true;
415 		/* fall through */
416 	case BOOKE_IRQPRIO_INST_STORAGE:
417 	case BOOKE_IRQPRIO_PROGRAM:
418 		update_esr = true;
419 		/* fall through */
420 	case BOOKE_IRQPRIO_ITLB_MISS:
421 	case BOOKE_IRQPRIO_SYSCALL:
422 	case BOOKE_IRQPRIO_FP_UNAVAIL:
423 #ifdef CONFIG_SPE_POSSIBLE
424 	case BOOKE_IRQPRIO_SPE_UNAVAIL:
425 	case BOOKE_IRQPRIO_SPE_FP_DATA:
426 	case BOOKE_IRQPRIO_SPE_FP_ROUND:
427 #endif
428 #ifdef CONFIG_ALTIVEC
429 	case BOOKE_IRQPRIO_ALTIVEC_UNAVAIL:
430 	case BOOKE_IRQPRIO_ALTIVEC_ASSIST:
431 #endif
432 	case BOOKE_IRQPRIO_AP_UNAVAIL:
433 		allowed = 1;
434 		msr_mask = MSR_CE | MSR_ME | MSR_DE;
435 		int_class = INT_CLASS_NONCRIT;
436 		break;
437 	case BOOKE_IRQPRIO_WATCHDOG:
438 	case BOOKE_IRQPRIO_CRITICAL:
439 	case BOOKE_IRQPRIO_DBELL_CRIT:
440 		allowed = vcpu->arch.shared->msr & MSR_CE;
441 		allowed = allowed && !crit;
442 		msr_mask = MSR_ME;
443 		int_class = INT_CLASS_CRIT;
444 		break;
445 	case BOOKE_IRQPRIO_MACHINE_CHECK:
446 		allowed = vcpu->arch.shared->msr & MSR_ME;
447 		allowed = allowed && !crit;
448 		int_class = INT_CLASS_MC;
449 		break;
450 	case BOOKE_IRQPRIO_DECREMENTER:
451 	case BOOKE_IRQPRIO_FIT:
452 		keep_irq = true;
453 		/* fall through */
454 	case BOOKE_IRQPRIO_EXTERNAL:
455 	case BOOKE_IRQPRIO_DBELL:
456 		allowed = vcpu->arch.shared->msr & MSR_EE;
457 		allowed = allowed && !crit;
458 		msr_mask = MSR_CE | MSR_ME | MSR_DE;
459 		int_class = INT_CLASS_NONCRIT;
460 		break;
461 	case BOOKE_IRQPRIO_DEBUG:
462 		allowed = vcpu->arch.shared->msr & MSR_DE;
463 		allowed = allowed && !crit;
464 		msr_mask = MSR_ME;
465 		if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
466 			int_class = INT_CLASS_DBG;
467 		else
468 			int_class = INT_CLASS_CRIT;
469 
470 		break;
471 	}
472 
473 	if (allowed) {
474 		switch (int_class) {
475 		case INT_CLASS_NONCRIT:
476 			set_guest_srr(vcpu, vcpu->arch.pc,
477 				      vcpu->arch.shared->msr);
478 			break;
479 		case INT_CLASS_CRIT:
480 			set_guest_csrr(vcpu, vcpu->arch.pc,
481 				       vcpu->arch.shared->msr);
482 			break;
483 		case INT_CLASS_DBG:
484 			set_guest_dsrr(vcpu, vcpu->arch.pc,
485 				       vcpu->arch.shared->msr);
486 			break;
487 		case INT_CLASS_MC:
488 			set_guest_mcsrr(vcpu, vcpu->arch.pc,
489 					vcpu->arch.shared->msr);
490 			break;
491 		}
492 
493 		vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
494 		if (update_esr == true)
495 			kvmppc_set_esr(vcpu, vcpu->arch.queued_esr);
496 		if (update_dear == true)
497 			kvmppc_set_dar(vcpu, vcpu->arch.queued_dear);
498 		if (update_epr == true) {
499 			if (vcpu->arch.epr_flags & KVMPPC_EPR_USER)
500 				kvm_make_request(KVM_REQ_EPR_EXIT, vcpu);
501 			else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) {
502 				BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC);
503 				kvmppc_mpic_set_epr(vcpu);
504 			}
505 		}
506 
507 		new_msr &= msr_mask;
508 #if defined(CONFIG_64BIT)
509 		if (vcpu->arch.epcr & SPRN_EPCR_ICM)
510 			new_msr |= MSR_CM;
511 #endif
512 		kvmppc_set_msr(vcpu, new_msr);
513 
514 		if (!keep_irq)
515 			clear_bit(priority, &vcpu->arch.pending_exceptions);
516 	}
517 
518 #ifdef CONFIG_KVM_BOOKE_HV
519 	/*
520 	 * If an interrupt is pending but masked, raise a guest doorbell
521 	 * so that we are notified when the guest enables the relevant
522 	 * MSR bit.
523 	 */
524 	if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE)
525 		kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT);
526 	if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE)
527 		kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT);
528 	if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK)
529 		kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC);
530 #endif
531 
532 	return allowed;
533 }
534 
535 /*
536  * Return the number of jiffies until the next timeout.  If the timeout is
537  * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA
538  * because the larger value can break the timer APIs.
539  */
540 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu)
541 {
542 	u64 tb, wdt_tb, wdt_ticks = 0;
543 	u64 nr_jiffies = 0;
544 	u32 period = TCR_GET_WP(vcpu->arch.tcr);
545 
546 	wdt_tb = 1ULL << (63 - period);
547 	tb = get_tb();
548 	/*
549 	 * The watchdog timeout will hapeen when TB bit corresponding
550 	 * to watchdog will toggle from 0 to 1.
551 	 */
552 	if (tb & wdt_tb)
553 		wdt_ticks = wdt_tb;
554 
555 	wdt_ticks += wdt_tb - (tb & (wdt_tb - 1));
556 
557 	/* Convert timebase ticks to jiffies */
558 	nr_jiffies = wdt_ticks;
559 
560 	if (do_div(nr_jiffies, tb_ticks_per_jiffy))
561 		nr_jiffies++;
562 
563 	return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA);
564 }
565 
566 static void arm_next_watchdog(struct kvm_vcpu *vcpu)
567 {
568 	unsigned long nr_jiffies;
569 	unsigned long flags;
570 
571 	/*
572 	 * If TSR_ENW and TSR_WIS are not set then no need to exit to
573 	 * userspace, so clear the KVM_REQ_WATCHDOG request.
574 	 */
575 	if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS))
576 		clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests);
577 
578 	spin_lock_irqsave(&vcpu->arch.wdt_lock, flags);
579 	nr_jiffies = watchdog_next_timeout(vcpu);
580 	/*
581 	 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA
582 	 * then do not run the watchdog timer as this can break timer APIs.
583 	 */
584 	if (nr_jiffies < NEXT_TIMER_MAX_DELTA)
585 		mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies);
586 	else
587 		del_timer(&vcpu->arch.wdt_timer);
588 	spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags);
589 }
590 
591 void kvmppc_watchdog_func(unsigned long data)
592 {
593 	struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data;
594 	u32 tsr, new_tsr;
595 	int final;
596 
597 	do {
598 		new_tsr = tsr = vcpu->arch.tsr;
599 		final = 0;
600 
601 		/* Time out event */
602 		if (tsr & TSR_ENW) {
603 			if (tsr & TSR_WIS)
604 				final = 1;
605 			else
606 				new_tsr = tsr | TSR_WIS;
607 		} else {
608 			new_tsr = tsr | TSR_ENW;
609 		}
610 	} while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr);
611 
612 	if (new_tsr & TSR_WIS) {
613 		smp_wmb();
614 		kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
615 		kvm_vcpu_kick(vcpu);
616 	}
617 
618 	/*
619 	 * If this is final watchdog expiry and some action is required
620 	 * then exit to userspace.
621 	 */
622 	if (final && (vcpu->arch.tcr & TCR_WRC_MASK) &&
623 	    vcpu->arch.watchdog_enabled) {
624 		smp_wmb();
625 		kvm_make_request(KVM_REQ_WATCHDOG, vcpu);
626 		kvm_vcpu_kick(vcpu);
627 	}
628 
629 	/*
630 	 * Stop running the watchdog timer after final expiration to
631 	 * prevent the host from being flooded with timers if the
632 	 * guest sets a short period.
633 	 * Timers will resume when TSR/TCR is updated next time.
634 	 */
635 	if (!final)
636 		arm_next_watchdog(vcpu);
637 }
638 
639 static void update_timer_ints(struct kvm_vcpu *vcpu)
640 {
641 	if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS))
642 		kvmppc_core_queue_dec(vcpu);
643 	else
644 		kvmppc_core_dequeue_dec(vcpu);
645 
646 	if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS))
647 		kvmppc_core_queue_watchdog(vcpu);
648 	else
649 		kvmppc_core_dequeue_watchdog(vcpu);
650 }
651 
652 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu)
653 {
654 	unsigned long *pending = &vcpu->arch.pending_exceptions;
655 	unsigned int priority;
656 
657 	priority = __ffs(*pending);
658 	while (priority < BOOKE_IRQPRIO_MAX) {
659 		if (kvmppc_booke_irqprio_deliver(vcpu, priority))
660 			break;
661 
662 		priority = find_next_bit(pending,
663 		                         BITS_PER_BYTE * sizeof(*pending),
664 		                         priority + 1);
665 	}
666 
667 	/* Tell the guest about our interrupt status */
668 	vcpu->arch.shared->int_pending = !!*pending;
669 }
670 
671 /* Check pending exceptions and deliver one, if possible. */
672 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu)
673 {
674 	int r = 0;
675 	WARN_ON_ONCE(!irqs_disabled());
676 
677 	kvmppc_core_check_exceptions(vcpu);
678 
679 	if (vcpu->requests) {
680 		/* Exception delivery raised request; start over */
681 		return 1;
682 	}
683 
684 	if (vcpu->arch.shared->msr & MSR_WE) {
685 		local_irq_enable();
686 		kvm_vcpu_block(vcpu);
687 		clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
688 		hard_irq_disable();
689 
690 		kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
691 		r = 1;
692 	};
693 
694 	return r;
695 }
696 
697 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu)
698 {
699 	int r = 1; /* Indicate we want to get back into the guest */
700 
701 	if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu))
702 		update_timer_ints(vcpu);
703 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC)
704 	if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
705 		kvmppc_core_flush_tlb(vcpu);
706 #endif
707 
708 	if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) {
709 		vcpu->run->exit_reason = KVM_EXIT_WATCHDOG;
710 		r = 0;
711 	}
712 
713 	if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) {
714 		vcpu->run->epr.epr = 0;
715 		vcpu->arch.epr_needed = true;
716 		vcpu->run->exit_reason = KVM_EXIT_EPR;
717 		r = 0;
718 	}
719 
720 	return r;
721 }
722 
723 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
724 {
725 	int ret, s;
726 	struct debug_reg debug;
727 
728 	if (!vcpu->arch.sane) {
729 		kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
730 		return -EINVAL;
731 	}
732 
733 	s = kvmppc_prepare_to_enter(vcpu);
734 	if (s <= 0) {
735 		ret = s;
736 		goto out;
737 	}
738 	/* interrupts now hard-disabled */
739 
740 #ifdef CONFIG_PPC_FPU
741 	/* Save userspace FPU state in stack */
742 	enable_kernel_fp();
743 
744 	/*
745 	 * Since we can't trap on MSR_FP in GS-mode, we consider the guest
746 	 * as always using the FPU.
747 	 */
748 	kvmppc_load_guest_fp(vcpu);
749 #endif
750 
751 #ifdef CONFIG_ALTIVEC
752 	/* Save userspace AltiVec state in stack */
753 	if (cpu_has_feature(CPU_FTR_ALTIVEC))
754 		enable_kernel_altivec();
755 	/*
756 	 * Since we can't trap on MSR_VEC in GS-mode, we consider the guest
757 	 * as always using the AltiVec.
758 	 */
759 	kvmppc_load_guest_altivec(vcpu);
760 #endif
761 
762 	/* Switch to guest debug context */
763 	debug = vcpu->arch.dbg_reg;
764 	switch_booke_debug_regs(&debug);
765 	debug = current->thread.debug;
766 	current->thread.debug = vcpu->arch.dbg_reg;
767 
768 	vcpu->arch.pgdir = current->mm->pgd;
769 	kvmppc_fix_ee_before_entry();
770 
771 	ret = __kvmppc_vcpu_run(kvm_run, vcpu);
772 
773 	/* No need for kvm_guest_exit. It's done in handle_exit.
774 	   We also get here with interrupts enabled. */
775 
776 	/* Switch back to user space debug context */
777 	switch_booke_debug_regs(&debug);
778 	current->thread.debug = debug;
779 
780 #ifdef CONFIG_PPC_FPU
781 	kvmppc_save_guest_fp(vcpu);
782 #endif
783 
784 #ifdef CONFIG_ALTIVEC
785 	kvmppc_save_guest_altivec(vcpu);
786 #endif
787 
788 out:
789 	vcpu->mode = OUTSIDE_GUEST_MODE;
790 	return ret;
791 }
792 
793 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
794 {
795 	enum emulation_result er;
796 
797 	er = kvmppc_emulate_instruction(run, vcpu);
798 	switch (er) {
799 	case EMULATE_DONE:
800 		/* don't overwrite subtypes, just account kvm_stats */
801 		kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS);
802 		/* Future optimization: only reload non-volatiles if
803 		 * they were actually modified by emulation. */
804 		return RESUME_GUEST_NV;
805 
806 	case EMULATE_AGAIN:
807 		return RESUME_GUEST;
808 
809 	case EMULATE_FAIL:
810 		printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n",
811 		       __func__, vcpu->arch.pc, vcpu->arch.last_inst);
812 		/* For debugging, encode the failing instruction and
813 		 * report it to userspace. */
814 		run->hw.hardware_exit_reason = ~0ULL << 32;
815 		run->hw.hardware_exit_reason |= vcpu->arch.last_inst;
816 		kvmppc_core_queue_program(vcpu, ESR_PIL);
817 		return RESUME_HOST;
818 
819 	case EMULATE_EXIT_USER:
820 		return RESUME_HOST;
821 
822 	default:
823 		BUG();
824 	}
825 }
826 
827 static int kvmppc_handle_debug(struct kvm_run *run, struct kvm_vcpu *vcpu)
828 {
829 	struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg);
830 	u32 dbsr = vcpu->arch.dbsr;
831 
832 	if (vcpu->guest_debug == 0) {
833 		/*
834 		 * Debug resources belong to Guest.
835 		 * Imprecise debug event is not injected
836 		 */
837 		if (dbsr & DBSR_IDE) {
838 			dbsr &= ~DBSR_IDE;
839 			if (!dbsr)
840 				return RESUME_GUEST;
841 		}
842 
843 		if (dbsr && (vcpu->arch.shared->msr & MSR_DE) &&
844 			    (vcpu->arch.dbg_reg.dbcr0 & DBCR0_IDM))
845 			kvmppc_core_queue_debug(vcpu);
846 
847 		/* Inject a program interrupt if trap debug is not allowed */
848 		if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE))
849 			kvmppc_core_queue_program(vcpu, ESR_PTR);
850 
851 		return RESUME_GUEST;
852 	}
853 
854 	/*
855 	 * Debug resource owned by userspace.
856 	 * Clear guest dbsr (vcpu->arch.dbsr)
857 	 */
858 	vcpu->arch.dbsr = 0;
859 	run->debug.arch.status = 0;
860 	run->debug.arch.address = vcpu->arch.pc;
861 
862 	if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) {
863 		run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT;
864 	} else {
865 		if (dbsr & (DBSR_DAC1W | DBSR_DAC2W))
866 			run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE;
867 		else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R))
868 			run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ;
869 		if (dbsr & (DBSR_DAC1R | DBSR_DAC1W))
870 			run->debug.arch.address = dbg_reg->dac1;
871 		else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W))
872 			run->debug.arch.address = dbg_reg->dac2;
873 	}
874 
875 	return RESUME_HOST;
876 }
877 
878 static void kvmppc_fill_pt_regs(struct pt_regs *regs)
879 {
880 	ulong r1, ip, msr, lr;
881 
882 	asm("mr %0, 1" : "=r"(r1));
883 	asm("mflr %0" : "=r"(lr));
884 	asm("mfmsr %0" : "=r"(msr));
885 	asm("bl 1f; 1: mflr %0" : "=r"(ip));
886 
887 	memset(regs, 0, sizeof(*regs));
888 	regs->gpr[1] = r1;
889 	regs->nip = ip;
890 	regs->msr = msr;
891 	regs->link = lr;
892 }
893 
894 /*
895  * For interrupts needed to be handled by host interrupt handlers,
896  * corresponding host handler are called from here in similar way
897  * (but not exact) as they are called from low level handler
898  * (such as from arch/powerpc/kernel/head_fsl_booke.S).
899  */
900 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu,
901 				     unsigned int exit_nr)
902 {
903 	struct pt_regs regs;
904 
905 	switch (exit_nr) {
906 	case BOOKE_INTERRUPT_EXTERNAL:
907 		kvmppc_fill_pt_regs(&regs);
908 		do_IRQ(&regs);
909 		break;
910 	case BOOKE_INTERRUPT_DECREMENTER:
911 		kvmppc_fill_pt_regs(&regs);
912 		timer_interrupt(&regs);
913 		break;
914 #if defined(CONFIG_PPC_DOORBELL)
915 	case BOOKE_INTERRUPT_DOORBELL:
916 		kvmppc_fill_pt_regs(&regs);
917 		doorbell_exception(&regs);
918 		break;
919 #endif
920 	case BOOKE_INTERRUPT_MACHINE_CHECK:
921 		/* FIXME */
922 		break;
923 	case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
924 		kvmppc_fill_pt_regs(&regs);
925 		performance_monitor_exception(&regs);
926 		break;
927 	case BOOKE_INTERRUPT_WATCHDOG:
928 		kvmppc_fill_pt_regs(&regs);
929 #ifdef CONFIG_BOOKE_WDT
930 		WatchdogException(&regs);
931 #else
932 		unknown_exception(&regs);
933 #endif
934 		break;
935 	case BOOKE_INTERRUPT_CRITICAL:
936 		unknown_exception(&regs);
937 		break;
938 	case BOOKE_INTERRUPT_DEBUG:
939 		/* Save DBSR before preemption is enabled */
940 		vcpu->arch.dbsr = mfspr(SPRN_DBSR);
941 		kvmppc_clear_dbsr();
942 		break;
943 	}
944 }
945 
946 static int kvmppc_resume_inst_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
947 				  enum emulation_result emulated, u32 last_inst)
948 {
949 	switch (emulated) {
950 	case EMULATE_AGAIN:
951 		return RESUME_GUEST;
952 
953 	case EMULATE_FAIL:
954 		pr_debug("%s: load instruction from guest address %lx failed\n",
955 		       __func__, vcpu->arch.pc);
956 		/* For debugging, encode the failing instruction and
957 		 * report it to userspace. */
958 		run->hw.hardware_exit_reason = ~0ULL << 32;
959 		run->hw.hardware_exit_reason |= last_inst;
960 		kvmppc_core_queue_program(vcpu, ESR_PIL);
961 		return RESUME_HOST;
962 
963 	default:
964 		BUG();
965 	}
966 }
967 
968 /**
969  * kvmppc_handle_exit
970  *
971  * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV)
972  */
973 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
974                        unsigned int exit_nr)
975 {
976 	int r = RESUME_HOST;
977 	int s;
978 	int idx;
979 	u32 last_inst = KVM_INST_FETCH_FAILED;
980 	enum emulation_result emulated = EMULATE_DONE;
981 
982 	/* update before a new last_exit_type is rewritten */
983 	kvmppc_update_timing_stats(vcpu);
984 
985 	/* restart interrupts if they were meant for the host */
986 	kvmppc_restart_interrupt(vcpu, exit_nr);
987 
988 	/*
989 	 * get last instruction before beeing preempted
990 	 * TODO: for e6500 check also BOOKE_INTERRUPT_LRAT_ERROR & ESR_DATA
991 	 */
992 	switch (exit_nr) {
993 	case BOOKE_INTERRUPT_DATA_STORAGE:
994 	case BOOKE_INTERRUPT_DTLB_MISS:
995 	case BOOKE_INTERRUPT_HV_PRIV:
996 		emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
997 		break;
998 	case BOOKE_INTERRUPT_PROGRAM:
999 		/* SW breakpoints arrive as illegal instructions on HV */
1000 		if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP)
1001 			emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst);
1002 		break;
1003 	default:
1004 		break;
1005 	}
1006 
1007 	local_irq_enable();
1008 
1009 	trace_kvm_exit(exit_nr, vcpu);
1010 	kvm_guest_exit();
1011 
1012 	run->exit_reason = KVM_EXIT_UNKNOWN;
1013 	run->ready_for_interrupt_injection = 1;
1014 
1015 	if (emulated != EMULATE_DONE) {
1016 		r = kvmppc_resume_inst_load(run, vcpu, emulated, last_inst);
1017 		goto out;
1018 	}
1019 
1020 	switch (exit_nr) {
1021 	case BOOKE_INTERRUPT_MACHINE_CHECK:
1022 		printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR));
1023 		kvmppc_dump_vcpu(vcpu);
1024 		/* For debugging, send invalid exit reason to user space */
1025 		run->hw.hardware_exit_reason = ~1ULL << 32;
1026 		run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR);
1027 		r = RESUME_HOST;
1028 		break;
1029 
1030 	case BOOKE_INTERRUPT_EXTERNAL:
1031 		kvmppc_account_exit(vcpu, EXT_INTR_EXITS);
1032 		r = RESUME_GUEST;
1033 		break;
1034 
1035 	case BOOKE_INTERRUPT_DECREMENTER:
1036 		kvmppc_account_exit(vcpu, DEC_EXITS);
1037 		r = RESUME_GUEST;
1038 		break;
1039 
1040 	case BOOKE_INTERRUPT_WATCHDOG:
1041 		r = RESUME_GUEST;
1042 		break;
1043 
1044 	case BOOKE_INTERRUPT_DOORBELL:
1045 		kvmppc_account_exit(vcpu, DBELL_EXITS);
1046 		r = RESUME_GUEST;
1047 		break;
1048 
1049 	case BOOKE_INTERRUPT_GUEST_DBELL_CRIT:
1050 		kvmppc_account_exit(vcpu, GDBELL_EXITS);
1051 
1052 		/*
1053 		 * We are here because there is a pending guest interrupt
1054 		 * which could not be delivered as MSR_CE or MSR_ME was not
1055 		 * set.  Once we break from here we will retry delivery.
1056 		 */
1057 		r = RESUME_GUEST;
1058 		break;
1059 
1060 	case BOOKE_INTERRUPT_GUEST_DBELL:
1061 		kvmppc_account_exit(vcpu, GDBELL_EXITS);
1062 
1063 		/*
1064 		 * We are here because there is a pending guest interrupt
1065 		 * which could not be delivered as MSR_EE was not set.  Once
1066 		 * we break from here we will retry delivery.
1067 		 */
1068 		r = RESUME_GUEST;
1069 		break;
1070 
1071 	case BOOKE_INTERRUPT_PERFORMANCE_MONITOR:
1072 		r = RESUME_GUEST;
1073 		break;
1074 
1075 	case BOOKE_INTERRUPT_HV_PRIV:
1076 		r = emulation_exit(run, vcpu);
1077 		break;
1078 
1079 	case BOOKE_INTERRUPT_PROGRAM:
1080 		if ((vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) &&
1081 			(last_inst == KVMPPC_INST_SW_BREAKPOINT)) {
1082 			/*
1083 			 * We are here because of an SW breakpoint instr,
1084 			 * so lets return to host to handle.
1085 			 */
1086 			r = kvmppc_handle_debug(run, vcpu);
1087 			run->exit_reason = KVM_EXIT_DEBUG;
1088 			kvmppc_account_exit(vcpu, DEBUG_EXITS);
1089 			break;
1090 		}
1091 
1092 		if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) {
1093 			/*
1094 			 * Program traps generated by user-level software must
1095 			 * be handled by the guest kernel.
1096 			 *
1097 			 * In GS mode, hypervisor privileged instructions trap
1098 			 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are
1099 			 * actual program interrupts, handled by the guest.
1100 			 */
1101 			kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
1102 			r = RESUME_GUEST;
1103 			kvmppc_account_exit(vcpu, USR_PR_INST);
1104 			break;
1105 		}
1106 
1107 		r = emulation_exit(run, vcpu);
1108 		break;
1109 
1110 	case BOOKE_INTERRUPT_FP_UNAVAIL:
1111 		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL);
1112 		kvmppc_account_exit(vcpu, FP_UNAVAIL);
1113 		r = RESUME_GUEST;
1114 		break;
1115 
1116 #ifdef CONFIG_SPE
1117 	case BOOKE_INTERRUPT_SPE_UNAVAIL: {
1118 		if (vcpu->arch.shared->msr & MSR_SPE)
1119 			kvmppc_vcpu_enable_spe(vcpu);
1120 		else
1121 			kvmppc_booke_queue_irqprio(vcpu,
1122 						   BOOKE_IRQPRIO_SPE_UNAVAIL);
1123 		r = RESUME_GUEST;
1124 		break;
1125 	}
1126 
1127 	case BOOKE_INTERRUPT_SPE_FP_DATA:
1128 		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA);
1129 		r = RESUME_GUEST;
1130 		break;
1131 
1132 	case BOOKE_INTERRUPT_SPE_FP_ROUND:
1133 		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND);
1134 		r = RESUME_GUEST;
1135 		break;
1136 #elif defined(CONFIG_SPE_POSSIBLE)
1137 	case BOOKE_INTERRUPT_SPE_UNAVAIL:
1138 		/*
1139 		 * Guest wants SPE, but host kernel doesn't support it.  Send
1140 		 * an "unimplemented operation" program check to the guest.
1141 		 */
1142 		kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV);
1143 		r = RESUME_GUEST;
1144 		break;
1145 
1146 	/*
1147 	 * These really should never happen without CONFIG_SPE,
1148 	 * as we should never enable the real MSR[SPE] in the guest.
1149 	 */
1150 	case BOOKE_INTERRUPT_SPE_FP_DATA:
1151 	case BOOKE_INTERRUPT_SPE_FP_ROUND:
1152 		printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n",
1153 		       __func__, exit_nr, vcpu->arch.pc);
1154 		run->hw.hardware_exit_reason = exit_nr;
1155 		r = RESUME_HOST;
1156 		break;
1157 #endif /* CONFIG_SPE_POSSIBLE */
1158 
1159 /*
1160  * On cores with Vector category, KVM is loaded only if CONFIG_ALTIVEC,
1161  * see kvmppc_core_check_processor_compat().
1162  */
1163 #ifdef CONFIG_ALTIVEC
1164 	case BOOKE_INTERRUPT_ALTIVEC_UNAVAIL:
1165 		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL);
1166 		r = RESUME_GUEST;
1167 		break;
1168 
1169 	case BOOKE_INTERRUPT_ALTIVEC_ASSIST:
1170 		kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_ASSIST);
1171 		r = RESUME_GUEST;
1172 		break;
1173 #endif
1174 
1175 	case BOOKE_INTERRUPT_DATA_STORAGE:
1176 		kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear,
1177 		                               vcpu->arch.fault_esr);
1178 		kvmppc_account_exit(vcpu, DSI_EXITS);
1179 		r = RESUME_GUEST;
1180 		break;
1181 
1182 	case BOOKE_INTERRUPT_INST_STORAGE:
1183 		kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr);
1184 		kvmppc_account_exit(vcpu, ISI_EXITS);
1185 		r = RESUME_GUEST;
1186 		break;
1187 
1188 	case BOOKE_INTERRUPT_ALIGNMENT:
1189 		kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear,
1190 		                            vcpu->arch.fault_esr);
1191 		r = RESUME_GUEST;
1192 		break;
1193 
1194 #ifdef CONFIG_KVM_BOOKE_HV
1195 	case BOOKE_INTERRUPT_HV_SYSCALL:
1196 		if (!(vcpu->arch.shared->msr & MSR_PR)) {
1197 			kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1198 		} else {
1199 			/*
1200 			 * hcall from guest userspace -- send privileged
1201 			 * instruction program check.
1202 			 */
1203 			kvmppc_core_queue_program(vcpu, ESR_PPR);
1204 		}
1205 
1206 		r = RESUME_GUEST;
1207 		break;
1208 #else
1209 	case BOOKE_INTERRUPT_SYSCALL:
1210 		if (!(vcpu->arch.shared->msr & MSR_PR) &&
1211 		    (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
1212 			/* KVM PV hypercalls */
1213 			kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
1214 			r = RESUME_GUEST;
1215 		} else {
1216 			/* Guest syscalls */
1217 			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
1218 		}
1219 		kvmppc_account_exit(vcpu, SYSCALL_EXITS);
1220 		r = RESUME_GUEST;
1221 		break;
1222 #endif
1223 
1224 	case BOOKE_INTERRUPT_DTLB_MISS: {
1225 		unsigned long eaddr = vcpu->arch.fault_dear;
1226 		int gtlb_index;
1227 		gpa_t gpaddr;
1228 		gfn_t gfn;
1229 
1230 #ifdef CONFIG_KVM_E500V2
1231 		if (!(vcpu->arch.shared->msr & MSR_PR) &&
1232 		    (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1233 			kvmppc_map_magic(vcpu);
1234 			kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1235 			r = RESUME_GUEST;
1236 
1237 			break;
1238 		}
1239 #endif
1240 
1241 		/* Check the guest TLB. */
1242 		gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1243 		if (gtlb_index < 0) {
1244 			/* The guest didn't have a mapping for it. */
1245 			kvmppc_core_queue_dtlb_miss(vcpu,
1246 			                            vcpu->arch.fault_dear,
1247 			                            vcpu->arch.fault_esr);
1248 			kvmppc_mmu_dtlb_miss(vcpu);
1249 			kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS);
1250 			r = RESUME_GUEST;
1251 			break;
1252 		}
1253 
1254 		idx = srcu_read_lock(&vcpu->kvm->srcu);
1255 
1256 		gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1257 		gfn = gpaddr >> PAGE_SHIFT;
1258 
1259 		if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1260 			/* The guest TLB had a mapping, but the shadow TLB
1261 			 * didn't, and it is RAM. This could be because:
1262 			 * a) the entry is mapping the host kernel, or
1263 			 * b) the guest used a large mapping which we're faking
1264 			 * Either way, we need to satisfy the fault without
1265 			 * invoking the guest. */
1266 			kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1267 			kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS);
1268 			r = RESUME_GUEST;
1269 		} else {
1270 			/* Guest has mapped and accessed a page which is not
1271 			 * actually RAM. */
1272 			vcpu->arch.paddr_accessed = gpaddr;
1273 			vcpu->arch.vaddr_accessed = eaddr;
1274 			r = kvmppc_emulate_mmio(run, vcpu);
1275 			kvmppc_account_exit(vcpu, MMIO_EXITS);
1276 		}
1277 
1278 		srcu_read_unlock(&vcpu->kvm->srcu, idx);
1279 		break;
1280 	}
1281 
1282 	case BOOKE_INTERRUPT_ITLB_MISS: {
1283 		unsigned long eaddr = vcpu->arch.pc;
1284 		gpa_t gpaddr;
1285 		gfn_t gfn;
1286 		int gtlb_index;
1287 
1288 		r = RESUME_GUEST;
1289 
1290 		/* Check the guest TLB. */
1291 		gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1292 		if (gtlb_index < 0) {
1293 			/* The guest didn't have a mapping for it. */
1294 			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS);
1295 			kvmppc_mmu_itlb_miss(vcpu);
1296 			kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS);
1297 			break;
1298 		}
1299 
1300 		kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS);
1301 
1302 		idx = srcu_read_lock(&vcpu->kvm->srcu);
1303 
1304 		gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1305 		gfn = gpaddr >> PAGE_SHIFT;
1306 
1307 		if (kvm_is_visible_gfn(vcpu->kvm, gfn)) {
1308 			/* The guest TLB had a mapping, but the shadow TLB
1309 			 * didn't. This could be because:
1310 			 * a) the entry is mapping the host kernel, or
1311 			 * b) the guest used a large mapping which we're faking
1312 			 * Either way, we need to satisfy the fault without
1313 			 * invoking the guest. */
1314 			kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index);
1315 		} else {
1316 			/* Guest mapped and leaped at non-RAM! */
1317 			kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK);
1318 		}
1319 
1320 		srcu_read_unlock(&vcpu->kvm->srcu, idx);
1321 		break;
1322 	}
1323 
1324 	case BOOKE_INTERRUPT_DEBUG: {
1325 		r = kvmppc_handle_debug(run, vcpu);
1326 		if (r == RESUME_HOST)
1327 			run->exit_reason = KVM_EXIT_DEBUG;
1328 		kvmppc_account_exit(vcpu, DEBUG_EXITS);
1329 		break;
1330 	}
1331 
1332 	default:
1333 		printk(KERN_EMERG "exit_nr %d\n", exit_nr);
1334 		BUG();
1335 	}
1336 
1337 out:
1338 	/*
1339 	 * To avoid clobbering exit_reason, only check for signals if we
1340 	 * aren't already exiting to userspace for some other reason.
1341 	 */
1342 	if (!(r & RESUME_HOST)) {
1343 		s = kvmppc_prepare_to_enter(vcpu);
1344 		if (s <= 0)
1345 			r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV);
1346 		else {
1347 			/* interrupts now hard-disabled */
1348 			kvmppc_fix_ee_before_entry();
1349 			kvmppc_load_guest_fp(vcpu);
1350 			kvmppc_load_guest_altivec(vcpu);
1351 		}
1352 	}
1353 
1354 	return r;
1355 }
1356 
1357 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr)
1358 {
1359 	u32 old_tsr = vcpu->arch.tsr;
1360 
1361 	vcpu->arch.tsr = new_tsr;
1362 
1363 	if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS))
1364 		arm_next_watchdog(vcpu);
1365 
1366 	update_timer_ints(vcpu);
1367 }
1368 
1369 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
1370 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1371 {
1372 	int i;
1373 	int r;
1374 
1375 	vcpu->arch.pc = 0;
1376 	vcpu->arch.shared->pir = vcpu->vcpu_id;
1377 	kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
1378 	kvmppc_set_msr(vcpu, 0);
1379 
1380 #ifndef CONFIG_KVM_BOOKE_HV
1381 	vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS;
1382 	vcpu->arch.shadow_pid = 1;
1383 	vcpu->arch.shared->msr = 0;
1384 #endif
1385 
1386 	/* Eye-catching numbers so we know if the guest takes an interrupt
1387 	 * before it's programmed its own IVPR/IVORs. */
1388 	vcpu->arch.ivpr = 0x55550000;
1389 	for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
1390 		vcpu->arch.ivor[i] = 0x7700 | i * 4;
1391 
1392 	kvmppc_init_timing_stats(vcpu);
1393 
1394 	r = kvmppc_core_vcpu_setup(vcpu);
1395 	kvmppc_sanity_check(vcpu);
1396 	return r;
1397 }
1398 
1399 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu)
1400 {
1401 	/* setup watchdog timer once */
1402 	spin_lock_init(&vcpu->arch.wdt_lock);
1403 	setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func,
1404 		    (unsigned long)vcpu);
1405 
1406 	/*
1407 	 * Clear DBSR.MRR to avoid guest debug interrupt as
1408 	 * this is of host interest
1409 	 */
1410 	mtspr(SPRN_DBSR, DBSR_MRR);
1411 	return 0;
1412 }
1413 
1414 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu)
1415 {
1416 	del_timer_sync(&vcpu->arch.wdt_timer);
1417 }
1418 
1419 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1420 {
1421 	int i;
1422 
1423 	regs->pc = vcpu->arch.pc;
1424 	regs->cr = kvmppc_get_cr(vcpu);
1425 	regs->ctr = vcpu->arch.ctr;
1426 	regs->lr = vcpu->arch.lr;
1427 	regs->xer = kvmppc_get_xer(vcpu);
1428 	regs->msr = vcpu->arch.shared->msr;
1429 	regs->srr0 = kvmppc_get_srr0(vcpu);
1430 	regs->srr1 = kvmppc_get_srr1(vcpu);
1431 	regs->pid = vcpu->arch.pid;
1432 	regs->sprg0 = kvmppc_get_sprg0(vcpu);
1433 	regs->sprg1 = kvmppc_get_sprg1(vcpu);
1434 	regs->sprg2 = kvmppc_get_sprg2(vcpu);
1435 	regs->sprg3 = kvmppc_get_sprg3(vcpu);
1436 	regs->sprg4 = kvmppc_get_sprg4(vcpu);
1437 	regs->sprg5 = kvmppc_get_sprg5(vcpu);
1438 	regs->sprg6 = kvmppc_get_sprg6(vcpu);
1439 	regs->sprg7 = kvmppc_get_sprg7(vcpu);
1440 
1441 	for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1442 		regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
1443 
1444 	return 0;
1445 }
1446 
1447 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
1448 {
1449 	int i;
1450 
1451 	vcpu->arch.pc = regs->pc;
1452 	kvmppc_set_cr(vcpu, regs->cr);
1453 	vcpu->arch.ctr = regs->ctr;
1454 	vcpu->arch.lr = regs->lr;
1455 	kvmppc_set_xer(vcpu, regs->xer);
1456 	kvmppc_set_msr(vcpu, regs->msr);
1457 	kvmppc_set_srr0(vcpu, regs->srr0);
1458 	kvmppc_set_srr1(vcpu, regs->srr1);
1459 	kvmppc_set_pid(vcpu, regs->pid);
1460 	kvmppc_set_sprg0(vcpu, regs->sprg0);
1461 	kvmppc_set_sprg1(vcpu, regs->sprg1);
1462 	kvmppc_set_sprg2(vcpu, regs->sprg2);
1463 	kvmppc_set_sprg3(vcpu, regs->sprg3);
1464 	kvmppc_set_sprg4(vcpu, regs->sprg4);
1465 	kvmppc_set_sprg5(vcpu, regs->sprg5);
1466 	kvmppc_set_sprg6(vcpu, regs->sprg6);
1467 	kvmppc_set_sprg7(vcpu, regs->sprg7);
1468 
1469 	for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
1470 		kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
1471 
1472 	return 0;
1473 }
1474 
1475 static void get_sregs_base(struct kvm_vcpu *vcpu,
1476                            struct kvm_sregs *sregs)
1477 {
1478 	u64 tb = get_tb();
1479 
1480 	sregs->u.e.features |= KVM_SREGS_E_BASE;
1481 
1482 	sregs->u.e.csrr0 = vcpu->arch.csrr0;
1483 	sregs->u.e.csrr1 = vcpu->arch.csrr1;
1484 	sregs->u.e.mcsr = vcpu->arch.mcsr;
1485 	sregs->u.e.esr = kvmppc_get_esr(vcpu);
1486 	sregs->u.e.dear = kvmppc_get_dar(vcpu);
1487 	sregs->u.e.tsr = vcpu->arch.tsr;
1488 	sregs->u.e.tcr = vcpu->arch.tcr;
1489 	sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
1490 	sregs->u.e.tb = tb;
1491 	sregs->u.e.vrsave = vcpu->arch.vrsave;
1492 }
1493 
1494 static int set_sregs_base(struct kvm_vcpu *vcpu,
1495                           struct kvm_sregs *sregs)
1496 {
1497 	if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
1498 		return 0;
1499 
1500 	vcpu->arch.csrr0 = sregs->u.e.csrr0;
1501 	vcpu->arch.csrr1 = sregs->u.e.csrr1;
1502 	vcpu->arch.mcsr = sregs->u.e.mcsr;
1503 	kvmppc_set_esr(vcpu, sregs->u.e.esr);
1504 	kvmppc_set_dar(vcpu, sregs->u.e.dear);
1505 	vcpu->arch.vrsave = sregs->u.e.vrsave;
1506 	kvmppc_set_tcr(vcpu, sregs->u.e.tcr);
1507 
1508 	if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) {
1509 		vcpu->arch.dec = sregs->u.e.dec;
1510 		kvmppc_emulate_dec(vcpu);
1511 	}
1512 
1513 	if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR)
1514 		kvmppc_set_tsr(vcpu, sregs->u.e.tsr);
1515 
1516 	return 0;
1517 }
1518 
1519 static void get_sregs_arch206(struct kvm_vcpu *vcpu,
1520                               struct kvm_sregs *sregs)
1521 {
1522 	sregs->u.e.features |= KVM_SREGS_E_ARCH206;
1523 
1524 	sregs->u.e.pir = vcpu->vcpu_id;
1525 	sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
1526 	sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
1527 	sregs->u.e.decar = vcpu->arch.decar;
1528 	sregs->u.e.ivpr = vcpu->arch.ivpr;
1529 }
1530 
1531 static int set_sregs_arch206(struct kvm_vcpu *vcpu,
1532                              struct kvm_sregs *sregs)
1533 {
1534 	if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
1535 		return 0;
1536 
1537 	if (sregs->u.e.pir != vcpu->vcpu_id)
1538 		return -EINVAL;
1539 
1540 	vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
1541 	vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
1542 	vcpu->arch.decar = sregs->u.e.decar;
1543 	vcpu->arch.ivpr = sregs->u.e.ivpr;
1544 
1545 	return 0;
1546 }
1547 
1548 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1549 {
1550 	sregs->u.e.features |= KVM_SREGS_E_IVOR;
1551 
1552 	sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
1553 	sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
1554 	sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
1555 	sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
1556 	sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
1557 	sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
1558 	sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
1559 	sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
1560 	sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
1561 	sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
1562 	sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
1563 	sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
1564 	sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
1565 	sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
1566 	sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
1567 	sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
1568 	return 0;
1569 }
1570 
1571 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
1572 {
1573 	if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
1574 		return 0;
1575 
1576 	vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
1577 	vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
1578 	vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
1579 	vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
1580 	vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
1581 	vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
1582 	vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
1583 	vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
1584 	vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
1585 	vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
1586 	vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
1587 	vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
1588 	vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
1589 	vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
1590 	vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
1591 	vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
1592 
1593 	return 0;
1594 }
1595 
1596 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
1597                                   struct kvm_sregs *sregs)
1598 {
1599 	sregs->pvr = vcpu->arch.pvr;
1600 
1601 	get_sregs_base(vcpu, sregs);
1602 	get_sregs_arch206(vcpu, sregs);
1603 	return vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs);
1604 }
1605 
1606 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
1607                                   struct kvm_sregs *sregs)
1608 {
1609 	int ret;
1610 
1611 	if (vcpu->arch.pvr != sregs->pvr)
1612 		return -EINVAL;
1613 
1614 	ret = set_sregs_base(vcpu, sregs);
1615 	if (ret < 0)
1616 		return ret;
1617 
1618 	ret = set_sregs_arch206(vcpu, sregs);
1619 	if (ret < 0)
1620 		return ret;
1621 
1622 	return vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs);
1623 }
1624 
1625 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id,
1626 			union kvmppc_one_reg *val)
1627 {
1628 	int r = 0;
1629 
1630 	switch (id) {
1631 	case KVM_REG_PPC_IAC1:
1632 		*val = get_reg_val(id, vcpu->arch.dbg_reg.iac1);
1633 		break;
1634 	case KVM_REG_PPC_IAC2:
1635 		*val = get_reg_val(id, vcpu->arch.dbg_reg.iac2);
1636 		break;
1637 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1638 	case KVM_REG_PPC_IAC3:
1639 		*val = get_reg_val(id, vcpu->arch.dbg_reg.iac3);
1640 		break;
1641 	case KVM_REG_PPC_IAC4:
1642 		*val = get_reg_val(id, vcpu->arch.dbg_reg.iac4);
1643 		break;
1644 #endif
1645 	case KVM_REG_PPC_DAC1:
1646 		*val = get_reg_val(id, vcpu->arch.dbg_reg.dac1);
1647 		break;
1648 	case KVM_REG_PPC_DAC2:
1649 		*val = get_reg_val(id, vcpu->arch.dbg_reg.dac2);
1650 		break;
1651 	case KVM_REG_PPC_EPR: {
1652 		u32 epr = kvmppc_get_epr(vcpu);
1653 		*val = get_reg_val(id, epr);
1654 		break;
1655 	}
1656 #if defined(CONFIG_64BIT)
1657 	case KVM_REG_PPC_EPCR:
1658 		*val = get_reg_val(id, vcpu->arch.epcr);
1659 		break;
1660 #endif
1661 	case KVM_REG_PPC_TCR:
1662 		*val = get_reg_val(id, vcpu->arch.tcr);
1663 		break;
1664 	case KVM_REG_PPC_TSR:
1665 		*val = get_reg_val(id, vcpu->arch.tsr);
1666 		break;
1667 	case KVM_REG_PPC_DEBUG_INST:
1668 		*val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1669 		break;
1670 	case KVM_REG_PPC_VRSAVE:
1671 		*val = get_reg_val(id, vcpu->arch.vrsave);
1672 		break;
1673 	default:
1674 		r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val);
1675 		break;
1676 	}
1677 
1678 	return r;
1679 }
1680 
1681 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id,
1682 			union kvmppc_one_reg *val)
1683 {
1684 	int r = 0;
1685 
1686 	switch (id) {
1687 	case KVM_REG_PPC_IAC1:
1688 		vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val);
1689 		break;
1690 	case KVM_REG_PPC_IAC2:
1691 		vcpu->arch.dbg_reg.iac2 = set_reg_val(id, *val);
1692 		break;
1693 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1694 	case KVM_REG_PPC_IAC3:
1695 		vcpu->arch.dbg_reg.iac3 = set_reg_val(id, *val);
1696 		break;
1697 	case KVM_REG_PPC_IAC4:
1698 		vcpu->arch.dbg_reg.iac4 = set_reg_val(id, *val);
1699 		break;
1700 #endif
1701 	case KVM_REG_PPC_DAC1:
1702 		vcpu->arch.dbg_reg.dac1 = set_reg_val(id, *val);
1703 		break;
1704 	case KVM_REG_PPC_DAC2:
1705 		vcpu->arch.dbg_reg.dac2 = set_reg_val(id, *val);
1706 		break;
1707 	case KVM_REG_PPC_EPR: {
1708 		u32 new_epr = set_reg_val(id, *val);
1709 		kvmppc_set_epr(vcpu, new_epr);
1710 		break;
1711 	}
1712 #if defined(CONFIG_64BIT)
1713 	case KVM_REG_PPC_EPCR: {
1714 		u32 new_epcr = set_reg_val(id, *val);
1715 		kvmppc_set_epcr(vcpu, new_epcr);
1716 		break;
1717 	}
1718 #endif
1719 	case KVM_REG_PPC_OR_TSR: {
1720 		u32 tsr_bits = set_reg_val(id, *val);
1721 		kvmppc_set_tsr_bits(vcpu, tsr_bits);
1722 		break;
1723 	}
1724 	case KVM_REG_PPC_CLEAR_TSR: {
1725 		u32 tsr_bits = set_reg_val(id, *val);
1726 		kvmppc_clr_tsr_bits(vcpu, tsr_bits);
1727 		break;
1728 	}
1729 	case KVM_REG_PPC_TSR: {
1730 		u32 tsr = set_reg_val(id, *val);
1731 		kvmppc_set_tsr(vcpu, tsr);
1732 		break;
1733 	}
1734 	case KVM_REG_PPC_TCR: {
1735 		u32 tcr = set_reg_val(id, *val);
1736 		kvmppc_set_tcr(vcpu, tcr);
1737 		break;
1738 	}
1739 	case KVM_REG_PPC_VRSAVE:
1740 		vcpu->arch.vrsave = set_reg_val(id, *val);
1741 		break;
1742 	default:
1743 		r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val);
1744 		break;
1745 	}
1746 
1747 	return r;
1748 }
1749 
1750 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1751 {
1752 	return -ENOTSUPP;
1753 }
1754 
1755 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
1756 {
1757 	return -ENOTSUPP;
1758 }
1759 
1760 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
1761                                   struct kvm_translation *tr)
1762 {
1763 	int r;
1764 
1765 	r = kvmppc_core_vcpu_translate(vcpu, tr);
1766 	return r;
1767 }
1768 
1769 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
1770 {
1771 	return -ENOTSUPP;
1772 }
1773 
1774 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
1775 			      struct kvm_memory_slot *dont)
1776 {
1777 }
1778 
1779 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
1780 			       unsigned long npages)
1781 {
1782 	return 0;
1783 }
1784 
1785 int kvmppc_core_prepare_memory_region(struct kvm *kvm,
1786 				      struct kvm_memory_slot *memslot,
1787 				      struct kvm_userspace_memory_region *mem)
1788 {
1789 	return 0;
1790 }
1791 
1792 void kvmppc_core_commit_memory_region(struct kvm *kvm,
1793 				struct kvm_userspace_memory_region *mem,
1794 				const struct kvm_memory_slot *old)
1795 {
1796 }
1797 
1798 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot)
1799 {
1800 }
1801 
1802 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr)
1803 {
1804 #if defined(CONFIG_64BIT)
1805 	vcpu->arch.epcr = new_epcr;
1806 #ifdef CONFIG_KVM_BOOKE_HV
1807 	vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM;
1808 	if (vcpu->arch.epcr  & SPRN_EPCR_ICM)
1809 		vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM;
1810 #endif
1811 #endif
1812 }
1813 
1814 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr)
1815 {
1816 	vcpu->arch.tcr = new_tcr;
1817 	arm_next_watchdog(vcpu);
1818 	update_timer_ints(vcpu);
1819 }
1820 
1821 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1822 {
1823 	set_bits(tsr_bits, &vcpu->arch.tsr);
1824 	smp_wmb();
1825 	kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1826 	kvm_vcpu_kick(vcpu);
1827 }
1828 
1829 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits)
1830 {
1831 	clear_bits(tsr_bits, &vcpu->arch.tsr);
1832 
1833 	/*
1834 	 * We may have stopped the watchdog due to
1835 	 * being stuck on final expiration.
1836 	 */
1837 	if (tsr_bits & (TSR_ENW | TSR_WIS))
1838 		arm_next_watchdog(vcpu);
1839 
1840 	update_timer_ints(vcpu);
1841 }
1842 
1843 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu)
1844 {
1845 	if (vcpu->arch.tcr & TCR_ARE) {
1846 		vcpu->arch.dec = vcpu->arch.decar;
1847 		kvmppc_emulate_dec(vcpu);
1848 	}
1849 
1850 	kvmppc_set_tsr_bits(vcpu, TSR_DIS);
1851 }
1852 
1853 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg,
1854 				       uint64_t addr, int index)
1855 {
1856 	switch (index) {
1857 	case 0:
1858 		dbg_reg->dbcr0 |= DBCR0_IAC1;
1859 		dbg_reg->iac1 = addr;
1860 		break;
1861 	case 1:
1862 		dbg_reg->dbcr0 |= DBCR0_IAC2;
1863 		dbg_reg->iac2 = addr;
1864 		break;
1865 #if CONFIG_PPC_ADV_DEBUG_IACS > 2
1866 	case 2:
1867 		dbg_reg->dbcr0 |= DBCR0_IAC3;
1868 		dbg_reg->iac3 = addr;
1869 		break;
1870 	case 3:
1871 		dbg_reg->dbcr0 |= DBCR0_IAC4;
1872 		dbg_reg->iac4 = addr;
1873 		break;
1874 #endif
1875 	default:
1876 		return -EINVAL;
1877 	}
1878 
1879 	dbg_reg->dbcr0 |= DBCR0_IDM;
1880 	return 0;
1881 }
1882 
1883 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr,
1884 				       int type, int index)
1885 {
1886 	switch (index) {
1887 	case 0:
1888 		if (type & KVMPPC_DEBUG_WATCH_READ)
1889 			dbg_reg->dbcr0 |= DBCR0_DAC1R;
1890 		if (type & KVMPPC_DEBUG_WATCH_WRITE)
1891 			dbg_reg->dbcr0 |= DBCR0_DAC1W;
1892 		dbg_reg->dac1 = addr;
1893 		break;
1894 	case 1:
1895 		if (type & KVMPPC_DEBUG_WATCH_READ)
1896 			dbg_reg->dbcr0 |= DBCR0_DAC2R;
1897 		if (type & KVMPPC_DEBUG_WATCH_WRITE)
1898 			dbg_reg->dbcr0 |= DBCR0_DAC2W;
1899 		dbg_reg->dac2 = addr;
1900 		break;
1901 	default:
1902 		return -EINVAL;
1903 	}
1904 
1905 	dbg_reg->dbcr0 |= DBCR0_IDM;
1906 	return 0;
1907 }
1908 void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set)
1909 {
1910 	/* XXX: Add similar MSR protection for BookE-PR */
1911 #ifdef CONFIG_KVM_BOOKE_HV
1912 	BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP));
1913 	if (set) {
1914 		if (prot_bitmap & MSR_UCLE)
1915 			vcpu->arch.shadow_msrp |= MSRP_UCLEP;
1916 		if (prot_bitmap & MSR_DE)
1917 			vcpu->arch.shadow_msrp |= MSRP_DEP;
1918 		if (prot_bitmap & MSR_PMM)
1919 			vcpu->arch.shadow_msrp |= MSRP_PMMP;
1920 	} else {
1921 		if (prot_bitmap & MSR_UCLE)
1922 			vcpu->arch.shadow_msrp &= ~MSRP_UCLEP;
1923 		if (prot_bitmap & MSR_DE)
1924 			vcpu->arch.shadow_msrp &= ~MSRP_DEP;
1925 		if (prot_bitmap & MSR_PMM)
1926 			vcpu->arch.shadow_msrp &= ~MSRP_PMMP;
1927 	}
1928 #endif
1929 }
1930 
1931 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid,
1932 		 enum xlate_readwrite xlrw, struct kvmppc_pte *pte)
1933 {
1934 	int gtlb_index;
1935 	gpa_t gpaddr;
1936 
1937 #ifdef CONFIG_KVM_E500V2
1938 	if (!(vcpu->arch.shared->msr & MSR_PR) &&
1939 	    (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) {
1940 		pte->eaddr = eaddr;
1941 		pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) |
1942 			     (eaddr & ~PAGE_MASK);
1943 		pte->vpage = eaddr >> PAGE_SHIFT;
1944 		pte->may_read = true;
1945 		pte->may_write = true;
1946 		pte->may_execute = true;
1947 
1948 		return 0;
1949 	}
1950 #endif
1951 
1952 	/* Check the guest TLB. */
1953 	switch (xlid) {
1954 	case XLATE_INST:
1955 		gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr);
1956 		break;
1957 	case XLATE_DATA:
1958 		gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr);
1959 		break;
1960 	default:
1961 		BUG();
1962 	}
1963 
1964 	/* Do we have a TLB entry at all? */
1965 	if (gtlb_index < 0)
1966 		return -ENOENT;
1967 
1968 	gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr);
1969 
1970 	pte->eaddr = eaddr;
1971 	pte->raddr = (gpaddr & PAGE_MASK) | (eaddr & ~PAGE_MASK);
1972 	pte->vpage = eaddr >> PAGE_SHIFT;
1973 
1974 	/* XXX read permissions from the guest TLB */
1975 	pte->may_read = true;
1976 	pte->may_write = true;
1977 	pte->may_execute = true;
1978 
1979 	return 0;
1980 }
1981 
1982 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
1983 					 struct kvm_guest_debug *dbg)
1984 {
1985 	struct debug_reg *dbg_reg;
1986 	int n, b = 0, w = 0;
1987 
1988 	if (!(dbg->control & KVM_GUESTDBG_ENABLE)) {
1989 		vcpu->arch.dbg_reg.dbcr0 = 0;
1990 		vcpu->guest_debug = 0;
1991 		kvm_guest_protect_msr(vcpu, MSR_DE, false);
1992 		return 0;
1993 	}
1994 
1995 	kvm_guest_protect_msr(vcpu, MSR_DE, true);
1996 	vcpu->guest_debug = dbg->control;
1997 	vcpu->arch.dbg_reg.dbcr0 = 0;
1998 
1999 	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
2000 		vcpu->arch.dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC;
2001 
2002 	/* Code below handles only HW breakpoints */
2003 	dbg_reg = &(vcpu->arch.dbg_reg);
2004 
2005 #ifdef CONFIG_KVM_BOOKE_HV
2006 	/*
2007 	 * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1
2008 	 * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0
2009 	 */
2010 	dbg_reg->dbcr1 = 0;
2011 	dbg_reg->dbcr2 = 0;
2012 #else
2013 	/*
2014 	 * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1
2015 	 * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR
2016 	 * is set.
2017 	 */
2018 	dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US |
2019 			  DBCR1_IAC4US;
2020 	dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US;
2021 #endif
2022 
2023 	if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
2024 		return 0;
2025 
2026 	for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) {
2027 		uint64_t addr = dbg->arch.bp[n].addr;
2028 		uint32_t type = dbg->arch.bp[n].type;
2029 
2030 		if (type == KVMPPC_DEBUG_NONE)
2031 			continue;
2032 
2033 		if (type & !(KVMPPC_DEBUG_WATCH_READ |
2034 			     KVMPPC_DEBUG_WATCH_WRITE |
2035 			     KVMPPC_DEBUG_BREAKPOINT))
2036 			return -EINVAL;
2037 
2038 		if (type & KVMPPC_DEBUG_BREAKPOINT) {
2039 			/* Setting H/W breakpoint */
2040 			if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++))
2041 				return -EINVAL;
2042 		} else {
2043 			/* Setting H/W watchpoint */
2044 			if (kvmppc_booke_add_watchpoint(dbg_reg, addr,
2045 							type, w++))
2046 				return -EINVAL;
2047 		}
2048 	}
2049 
2050 	return 0;
2051 }
2052 
2053 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2054 {
2055 	vcpu->cpu = smp_processor_id();
2056 	current->thread.kvm_vcpu = vcpu;
2057 }
2058 
2059 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu)
2060 {
2061 	current->thread.kvm_vcpu = NULL;
2062 	vcpu->cpu = -1;
2063 
2064 	/* Clear pending debug event in DBSR */
2065 	kvmppc_clear_dbsr();
2066 }
2067 
2068 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
2069 {
2070 	vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu);
2071 }
2072 
2073 int kvmppc_core_init_vm(struct kvm *kvm)
2074 {
2075 	return kvm->arch.kvm_ops->init_vm(kvm);
2076 }
2077 
2078 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
2079 {
2080 	return kvm->arch.kvm_ops->vcpu_create(kvm, id);
2081 }
2082 
2083 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
2084 {
2085 	vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu);
2086 }
2087 
2088 void kvmppc_core_destroy_vm(struct kvm *kvm)
2089 {
2090 	kvm->arch.kvm_ops->destroy_vm(kvm);
2091 }
2092 
2093 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2094 {
2095 	vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu);
2096 }
2097 
2098 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
2099 {
2100 	vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu);
2101 }
2102 
2103 int __init kvmppc_booke_init(void)
2104 {
2105 #ifndef CONFIG_KVM_BOOKE_HV
2106 	unsigned long ivor[16];
2107 	unsigned long *handler = kvmppc_booke_handler_addr;
2108 	unsigned long max_ivor = 0;
2109 	unsigned long handler_len;
2110 	int i;
2111 
2112 	/* We install our own exception handlers by hijacking IVPR. IVPR must
2113 	 * be 16-bit aligned, so we need a 64KB allocation. */
2114 	kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO,
2115 	                                         VCPU_SIZE_ORDER);
2116 	if (!kvmppc_booke_handlers)
2117 		return -ENOMEM;
2118 
2119 	/* XXX make sure our handlers are smaller than Linux's */
2120 
2121 	/* Copy our interrupt handlers to match host IVORs. That way we don't
2122 	 * have to swap the IVORs on every guest/host transition. */
2123 	ivor[0] = mfspr(SPRN_IVOR0);
2124 	ivor[1] = mfspr(SPRN_IVOR1);
2125 	ivor[2] = mfspr(SPRN_IVOR2);
2126 	ivor[3] = mfspr(SPRN_IVOR3);
2127 	ivor[4] = mfspr(SPRN_IVOR4);
2128 	ivor[5] = mfspr(SPRN_IVOR5);
2129 	ivor[6] = mfspr(SPRN_IVOR6);
2130 	ivor[7] = mfspr(SPRN_IVOR7);
2131 	ivor[8] = mfspr(SPRN_IVOR8);
2132 	ivor[9] = mfspr(SPRN_IVOR9);
2133 	ivor[10] = mfspr(SPRN_IVOR10);
2134 	ivor[11] = mfspr(SPRN_IVOR11);
2135 	ivor[12] = mfspr(SPRN_IVOR12);
2136 	ivor[13] = mfspr(SPRN_IVOR13);
2137 	ivor[14] = mfspr(SPRN_IVOR14);
2138 	ivor[15] = mfspr(SPRN_IVOR15);
2139 
2140 	for (i = 0; i < 16; i++) {
2141 		if (ivor[i] > max_ivor)
2142 			max_ivor = i;
2143 
2144 		handler_len = handler[i + 1] - handler[i];
2145 		memcpy((void *)kvmppc_booke_handlers + ivor[i],
2146 		       (void *)handler[i], handler_len);
2147 	}
2148 
2149 	handler_len = handler[max_ivor + 1] - handler[max_ivor];
2150 	flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers +
2151 			   ivor[max_ivor] + handler_len);
2152 #endif /* !BOOKE_HV */
2153 	return 0;
2154 }
2155 
2156 void __exit kvmppc_booke_exit(void)
2157 {
2158 	free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER);
2159 	kvm_exit();
2160 }
2161