1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * 4 * Copyright IBM Corp. 2007 5 * Copyright 2010-2011 Freescale Semiconductor, Inc. 6 * 7 * Authors: Hollis Blanchard <hollisb@us.ibm.com> 8 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 9 * Scott Wood <scottwood@freescale.com> 10 * Varun Sethi <varun.sethi@freescale.com> 11 */ 12 13 #include <linux/errno.h> 14 #include <linux/err.h> 15 #include <linux/kvm_host.h> 16 #include <linux/gfp.h> 17 #include <linux/module.h> 18 #include <linux/vmalloc.h> 19 #include <linux/fs.h> 20 21 #include <asm/cputable.h> 22 #include <linux/uaccess.h> 23 #include <asm/interrupt.h> 24 #include <asm/kvm_ppc.h> 25 #include <asm/cacheflush.h> 26 #include <asm/dbell.h> 27 #include <asm/hw_irq.h> 28 #include <asm/irq.h> 29 #include <asm/time.h> 30 31 #include "timing.h" 32 #include "booke.h" 33 34 #define CREATE_TRACE_POINTS 35 #include "trace_booke.h" 36 37 unsigned long kvmppc_booke_handlers; 38 39 const struct _kvm_stats_desc kvm_vm_stats_desc[] = { 40 KVM_GENERIC_VM_STATS(), 41 STATS_DESC_ICOUNTER(VM, num_2M_pages), 42 STATS_DESC_ICOUNTER(VM, num_1G_pages) 43 }; 44 static_assert(ARRAY_SIZE(kvm_vm_stats_desc) == 45 sizeof(struct kvm_vm_stat) / sizeof(u64)); 46 47 const struct kvm_stats_header kvm_vm_stats_header = { 48 .name_size = KVM_STATS_NAME_SIZE, 49 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc), 50 .id_offset = sizeof(struct kvm_stats_header), 51 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE, 52 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE + 53 sizeof(kvm_vm_stats_desc), 54 }; 55 56 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = { 57 KVM_GENERIC_VCPU_STATS(), 58 STATS_DESC_COUNTER(VCPU, sum_exits), 59 STATS_DESC_COUNTER(VCPU, mmio_exits), 60 STATS_DESC_COUNTER(VCPU, signal_exits), 61 STATS_DESC_COUNTER(VCPU, light_exits), 62 STATS_DESC_COUNTER(VCPU, itlb_real_miss_exits), 63 STATS_DESC_COUNTER(VCPU, itlb_virt_miss_exits), 64 STATS_DESC_COUNTER(VCPU, dtlb_real_miss_exits), 65 STATS_DESC_COUNTER(VCPU, dtlb_virt_miss_exits), 66 STATS_DESC_COUNTER(VCPU, syscall_exits), 67 STATS_DESC_COUNTER(VCPU, isi_exits), 68 STATS_DESC_COUNTER(VCPU, dsi_exits), 69 STATS_DESC_COUNTER(VCPU, emulated_inst_exits), 70 STATS_DESC_COUNTER(VCPU, dec_exits), 71 STATS_DESC_COUNTER(VCPU, ext_intr_exits), 72 STATS_DESC_TIME_NSEC(VCPU, halt_wait_ns), 73 STATS_DESC_COUNTER(VCPU, halt_successful_wait), 74 STATS_DESC_COUNTER(VCPU, dbell_exits), 75 STATS_DESC_COUNTER(VCPU, gdbell_exits), 76 STATS_DESC_COUNTER(VCPU, ld), 77 STATS_DESC_COUNTER(VCPU, st), 78 STATS_DESC_COUNTER(VCPU, pthru_all), 79 STATS_DESC_COUNTER(VCPU, pthru_host), 80 STATS_DESC_COUNTER(VCPU, pthru_bad_aff) 81 }; 82 static_assert(ARRAY_SIZE(kvm_vcpu_stats_desc) == 83 sizeof(struct kvm_vcpu_stat) / sizeof(u64)); 84 85 const struct kvm_stats_header kvm_vcpu_stats_header = { 86 .name_size = KVM_STATS_NAME_SIZE, 87 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc), 88 .id_offset = sizeof(struct kvm_stats_header), 89 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE, 90 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE + 91 sizeof(kvm_vcpu_stats_desc), 92 }; 93 94 /* TODO: use vcpu_printf() */ 95 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) 96 { 97 int i; 98 99 printk("pc: %08lx msr: %08llx\n", vcpu->arch.regs.nip, 100 vcpu->arch.shared->msr); 101 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.regs.link, 102 vcpu->arch.regs.ctr); 103 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, 104 vcpu->arch.shared->srr1); 105 106 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); 107 108 for (i = 0; i < 32; i += 4) { 109 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, 110 kvmppc_get_gpr(vcpu, i), 111 kvmppc_get_gpr(vcpu, i+1), 112 kvmppc_get_gpr(vcpu, i+2), 113 kvmppc_get_gpr(vcpu, i+3)); 114 } 115 } 116 117 #ifdef CONFIG_SPE 118 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) 119 { 120 preempt_disable(); 121 enable_kernel_spe(); 122 kvmppc_save_guest_spe(vcpu); 123 disable_kernel_spe(); 124 vcpu->arch.shadow_msr &= ~MSR_SPE; 125 preempt_enable(); 126 } 127 128 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) 129 { 130 preempt_disable(); 131 enable_kernel_spe(); 132 kvmppc_load_guest_spe(vcpu); 133 disable_kernel_spe(); 134 vcpu->arch.shadow_msr |= MSR_SPE; 135 preempt_enable(); 136 } 137 138 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 139 { 140 if (vcpu->arch.shared->msr & MSR_SPE) { 141 if (!(vcpu->arch.shadow_msr & MSR_SPE)) 142 kvmppc_vcpu_enable_spe(vcpu); 143 } else if (vcpu->arch.shadow_msr & MSR_SPE) { 144 kvmppc_vcpu_disable_spe(vcpu); 145 } 146 } 147 #else 148 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 149 { 150 } 151 #endif 152 153 /* 154 * Load up guest vcpu FP state if it's needed. 155 * It also set the MSR_FP in thread so that host know 156 * we're holding FPU, and then host can help to save 157 * guest vcpu FP state if other threads require to use FPU. 158 * This simulates an FP unavailable fault. 159 * 160 * It requires to be called with preemption disabled. 161 */ 162 static inline void kvmppc_load_guest_fp(struct kvm_vcpu *vcpu) 163 { 164 #ifdef CONFIG_PPC_FPU 165 if (!(current->thread.regs->msr & MSR_FP)) { 166 enable_kernel_fp(); 167 load_fp_state(&vcpu->arch.fp); 168 disable_kernel_fp(); 169 current->thread.fp_save_area = &vcpu->arch.fp; 170 current->thread.regs->msr |= MSR_FP; 171 } 172 #endif 173 } 174 175 /* 176 * Save guest vcpu FP state into thread. 177 * It requires to be called with preemption disabled. 178 */ 179 static inline void kvmppc_save_guest_fp(struct kvm_vcpu *vcpu) 180 { 181 #ifdef CONFIG_PPC_FPU 182 if (current->thread.regs->msr & MSR_FP) 183 giveup_fpu(current); 184 current->thread.fp_save_area = NULL; 185 #endif 186 } 187 188 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu) 189 { 190 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV) 191 /* We always treat the FP bit as enabled from the host 192 perspective, so only need to adjust the shadow MSR */ 193 vcpu->arch.shadow_msr &= ~MSR_FP; 194 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP; 195 #endif 196 } 197 198 /* 199 * Simulate AltiVec unavailable fault to load guest state 200 * from thread to AltiVec unit. 201 * It requires to be called with preemption disabled. 202 */ 203 static inline void kvmppc_load_guest_altivec(struct kvm_vcpu *vcpu) 204 { 205 #ifdef CONFIG_ALTIVEC 206 if (cpu_has_feature(CPU_FTR_ALTIVEC)) { 207 if (!(current->thread.regs->msr & MSR_VEC)) { 208 enable_kernel_altivec(); 209 load_vr_state(&vcpu->arch.vr); 210 disable_kernel_altivec(); 211 current->thread.vr_save_area = &vcpu->arch.vr; 212 current->thread.regs->msr |= MSR_VEC; 213 } 214 } 215 #endif 216 } 217 218 /* 219 * Save guest vcpu AltiVec state into thread. 220 * It requires to be called with preemption disabled. 221 */ 222 static inline void kvmppc_save_guest_altivec(struct kvm_vcpu *vcpu) 223 { 224 #ifdef CONFIG_ALTIVEC 225 if (cpu_has_feature(CPU_FTR_ALTIVEC)) { 226 if (current->thread.regs->msr & MSR_VEC) 227 giveup_altivec(current); 228 current->thread.vr_save_area = NULL; 229 } 230 #endif 231 } 232 233 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu) 234 { 235 /* Synchronize guest's desire to get debug interrupts into shadow MSR */ 236 #ifndef CONFIG_KVM_BOOKE_HV 237 vcpu->arch.shadow_msr &= ~MSR_DE; 238 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE; 239 #endif 240 241 /* Force enable debug interrupts when user space wants to debug */ 242 if (vcpu->guest_debug) { 243 #ifdef CONFIG_KVM_BOOKE_HV 244 /* 245 * Since there is no shadow MSR, sync MSR_DE into the guest 246 * visible MSR. 247 */ 248 vcpu->arch.shared->msr |= MSR_DE; 249 #else 250 vcpu->arch.shadow_msr |= MSR_DE; 251 vcpu->arch.shared->msr &= ~MSR_DE; 252 #endif 253 } 254 } 255 256 /* 257 * Helper function for "full" MSR writes. No need to call this if only 258 * EE/CE/ME/DE/RI are changing. 259 */ 260 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) 261 { 262 u32 old_msr = vcpu->arch.shared->msr; 263 264 #ifdef CONFIG_KVM_BOOKE_HV 265 new_msr |= MSR_GS; 266 #endif 267 268 vcpu->arch.shared->msr = new_msr; 269 270 kvmppc_mmu_msr_notify(vcpu, old_msr); 271 kvmppc_vcpu_sync_spe(vcpu); 272 kvmppc_vcpu_sync_fpu(vcpu); 273 kvmppc_vcpu_sync_debug(vcpu); 274 } 275 276 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, 277 unsigned int priority) 278 { 279 trace_kvm_booke_queue_irqprio(vcpu, priority); 280 set_bit(priority, &vcpu->arch.pending_exceptions); 281 } 282 283 void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu, 284 ulong dear_flags, ulong esr_flags) 285 { 286 vcpu->arch.queued_dear = dear_flags; 287 vcpu->arch.queued_esr = esr_flags; 288 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); 289 } 290 291 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, 292 ulong dear_flags, ulong esr_flags) 293 { 294 vcpu->arch.queued_dear = dear_flags; 295 vcpu->arch.queued_esr = esr_flags; 296 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE); 297 } 298 299 void kvmppc_core_queue_itlb_miss(struct kvm_vcpu *vcpu) 300 { 301 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 302 } 303 304 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong esr_flags) 305 { 306 vcpu->arch.queued_esr = esr_flags; 307 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE); 308 } 309 310 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags, 311 ulong esr_flags) 312 { 313 vcpu->arch.queued_dear = dear_flags; 314 vcpu->arch.queued_esr = esr_flags; 315 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT); 316 } 317 318 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags) 319 { 320 vcpu->arch.queued_esr = esr_flags; 321 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); 322 } 323 324 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu) 325 { 326 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 327 } 328 329 #ifdef CONFIG_ALTIVEC 330 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu) 331 { 332 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL); 333 } 334 #endif 335 336 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 337 { 338 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER); 339 } 340 341 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 342 { 343 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 344 } 345 346 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 347 { 348 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 349 } 350 351 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 352 struct kvm_interrupt *irq) 353 { 354 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL; 355 356 if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 357 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL; 358 359 kvmppc_booke_queue_irqprio(vcpu, prio); 360 } 361 362 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 363 { 364 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); 365 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions); 366 } 367 368 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu) 369 { 370 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG); 371 } 372 373 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu) 374 { 375 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions); 376 } 377 378 void kvmppc_core_queue_debug(struct kvm_vcpu *vcpu) 379 { 380 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DEBUG); 381 } 382 383 void kvmppc_core_dequeue_debug(struct kvm_vcpu *vcpu) 384 { 385 clear_bit(BOOKE_IRQPRIO_DEBUG, &vcpu->arch.pending_exceptions); 386 } 387 388 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 389 { 390 kvmppc_set_srr0(vcpu, srr0); 391 kvmppc_set_srr1(vcpu, srr1); 392 } 393 394 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 395 { 396 vcpu->arch.csrr0 = srr0; 397 vcpu->arch.csrr1 = srr1; 398 } 399 400 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 401 { 402 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) { 403 vcpu->arch.dsrr0 = srr0; 404 vcpu->arch.dsrr1 = srr1; 405 } else { 406 set_guest_csrr(vcpu, srr0, srr1); 407 } 408 } 409 410 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 411 { 412 vcpu->arch.mcsrr0 = srr0; 413 vcpu->arch.mcsrr1 = srr1; 414 } 415 416 /* Deliver the interrupt of the corresponding priority, if possible. */ 417 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, 418 unsigned int priority) 419 { 420 int allowed = 0; 421 ulong msr_mask = 0; 422 bool update_esr = false, update_dear = false, update_epr = false; 423 ulong crit_raw = vcpu->arch.shared->critical; 424 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1); 425 bool crit; 426 bool keep_irq = false; 427 enum int_class int_class; 428 ulong new_msr = vcpu->arch.shared->msr; 429 430 /* Truncate crit indicators in 32 bit mode */ 431 if (!(vcpu->arch.shared->msr & MSR_SF)) { 432 crit_raw &= 0xffffffff; 433 crit_r1 &= 0xffffffff; 434 } 435 436 /* Critical section when crit == r1 */ 437 crit = (crit_raw == crit_r1); 438 /* ... and we're in supervisor mode */ 439 crit = crit && !(vcpu->arch.shared->msr & MSR_PR); 440 441 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) { 442 priority = BOOKE_IRQPRIO_EXTERNAL; 443 keep_irq = true; 444 } 445 446 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags) 447 update_epr = true; 448 449 switch (priority) { 450 case BOOKE_IRQPRIO_DTLB_MISS: 451 case BOOKE_IRQPRIO_DATA_STORAGE: 452 case BOOKE_IRQPRIO_ALIGNMENT: 453 update_dear = true; 454 fallthrough; 455 case BOOKE_IRQPRIO_INST_STORAGE: 456 case BOOKE_IRQPRIO_PROGRAM: 457 update_esr = true; 458 fallthrough; 459 case BOOKE_IRQPRIO_ITLB_MISS: 460 case BOOKE_IRQPRIO_SYSCALL: 461 case BOOKE_IRQPRIO_FP_UNAVAIL: 462 #ifdef CONFIG_SPE_POSSIBLE 463 case BOOKE_IRQPRIO_SPE_UNAVAIL: 464 case BOOKE_IRQPRIO_SPE_FP_DATA: 465 case BOOKE_IRQPRIO_SPE_FP_ROUND: 466 #endif 467 #ifdef CONFIG_ALTIVEC 468 case BOOKE_IRQPRIO_ALTIVEC_UNAVAIL: 469 case BOOKE_IRQPRIO_ALTIVEC_ASSIST: 470 #endif 471 case BOOKE_IRQPRIO_AP_UNAVAIL: 472 allowed = 1; 473 msr_mask = MSR_CE | MSR_ME | MSR_DE; 474 int_class = INT_CLASS_NONCRIT; 475 break; 476 case BOOKE_IRQPRIO_WATCHDOG: 477 case BOOKE_IRQPRIO_CRITICAL: 478 case BOOKE_IRQPRIO_DBELL_CRIT: 479 allowed = vcpu->arch.shared->msr & MSR_CE; 480 allowed = allowed && !crit; 481 msr_mask = MSR_ME; 482 int_class = INT_CLASS_CRIT; 483 break; 484 case BOOKE_IRQPRIO_MACHINE_CHECK: 485 allowed = vcpu->arch.shared->msr & MSR_ME; 486 allowed = allowed && !crit; 487 int_class = INT_CLASS_MC; 488 break; 489 case BOOKE_IRQPRIO_DECREMENTER: 490 case BOOKE_IRQPRIO_FIT: 491 keep_irq = true; 492 fallthrough; 493 case BOOKE_IRQPRIO_EXTERNAL: 494 case BOOKE_IRQPRIO_DBELL: 495 allowed = vcpu->arch.shared->msr & MSR_EE; 496 allowed = allowed && !crit; 497 msr_mask = MSR_CE | MSR_ME | MSR_DE; 498 int_class = INT_CLASS_NONCRIT; 499 break; 500 case BOOKE_IRQPRIO_DEBUG: 501 allowed = vcpu->arch.shared->msr & MSR_DE; 502 allowed = allowed && !crit; 503 msr_mask = MSR_ME; 504 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) 505 int_class = INT_CLASS_DBG; 506 else 507 int_class = INT_CLASS_CRIT; 508 509 break; 510 } 511 512 if (allowed) { 513 switch (int_class) { 514 case INT_CLASS_NONCRIT: 515 set_guest_srr(vcpu, vcpu->arch.regs.nip, 516 vcpu->arch.shared->msr); 517 break; 518 case INT_CLASS_CRIT: 519 set_guest_csrr(vcpu, vcpu->arch.regs.nip, 520 vcpu->arch.shared->msr); 521 break; 522 case INT_CLASS_DBG: 523 set_guest_dsrr(vcpu, vcpu->arch.regs.nip, 524 vcpu->arch.shared->msr); 525 break; 526 case INT_CLASS_MC: 527 set_guest_mcsrr(vcpu, vcpu->arch.regs.nip, 528 vcpu->arch.shared->msr); 529 break; 530 } 531 532 vcpu->arch.regs.nip = vcpu->arch.ivpr | 533 vcpu->arch.ivor[priority]; 534 if (update_esr) 535 kvmppc_set_esr(vcpu, vcpu->arch.queued_esr); 536 if (update_dear) 537 kvmppc_set_dar(vcpu, vcpu->arch.queued_dear); 538 if (update_epr) { 539 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER) 540 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu); 541 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) { 542 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC); 543 kvmppc_mpic_set_epr(vcpu); 544 } 545 } 546 547 new_msr &= msr_mask; 548 #if defined(CONFIG_64BIT) 549 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 550 new_msr |= MSR_CM; 551 #endif 552 kvmppc_set_msr(vcpu, new_msr); 553 554 if (!keep_irq) 555 clear_bit(priority, &vcpu->arch.pending_exceptions); 556 } 557 558 #ifdef CONFIG_KVM_BOOKE_HV 559 /* 560 * If an interrupt is pending but masked, raise a guest doorbell 561 * so that we are notified when the guest enables the relevant 562 * MSR bit. 563 */ 564 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE) 565 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT); 566 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE) 567 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT); 568 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK) 569 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC); 570 #endif 571 572 return allowed; 573 } 574 575 /* 576 * Return the number of jiffies until the next timeout. If the timeout is 577 * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA 578 * because the larger value can break the timer APIs. 579 */ 580 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu) 581 { 582 u64 tb, wdt_tb, wdt_ticks = 0; 583 u64 nr_jiffies = 0; 584 u32 period = TCR_GET_WP(vcpu->arch.tcr); 585 586 wdt_tb = 1ULL << (63 - period); 587 tb = get_tb(); 588 /* 589 * The watchdog timeout will hapeen when TB bit corresponding 590 * to watchdog will toggle from 0 to 1. 591 */ 592 if (tb & wdt_tb) 593 wdt_ticks = wdt_tb; 594 595 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1)); 596 597 /* Convert timebase ticks to jiffies */ 598 nr_jiffies = wdt_ticks; 599 600 if (do_div(nr_jiffies, tb_ticks_per_jiffy)) 601 nr_jiffies++; 602 603 return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA); 604 } 605 606 static void arm_next_watchdog(struct kvm_vcpu *vcpu) 607 { 608 unsigned long nr_jiffies; 609 unsigned long flags; 610 611 /* 612 * If TSR_ENW and TSR_WIS are not set then no need to exit to 613 * userspace, so clear the KVM_REQ_WATCHDOG request. 614 */ 615 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS)) 616 kvm_clear_request(KVM_REQ_WATCHDOG, vcpu); 617 618 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags); 619 nr_jiffies = watchdog_next_timeout(vcpu); 620 /* 621 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA 622 * then do not run the watchdog timer as this can break timer APIs. 623 */ 624 if (nr_jiffies < NEXT_TIMER_MAX_DELTA) 625 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies); 626 else 627 del_timer(&vcpu->arch.wdt_timer); 628 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags); 629 } 630 631 void kvmppc_watchdog_func(struct timer_list *t) 632 { 633 struct kvm_vcpu *vcpu = from_timer(vcpu, t, arch.wdt_timer); 634 u32 tsr, new_tsr; 635 int final; 636 637 do { 638 new_tsr = tsr = vcpu->arch.tsr; 639 final = 0; 640 641 /* Time out event */ 642 if (tsr & TSR_ENW) { 643 if (tsr & TSR_WIS) 644 final = 1; 645 else 646 new_tsr = tsr | TSR_WIS; 647 } else { 648 new_tsr = tsr | TSR_ENW; 649 } 650 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr); 651 652 if (new_tsr & TSR_WIS) { 653 smp_wmb(); 654 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 655 kvm_vcpu_kick(vcpu); 656 } 657 658 /* 659 * If this is final watchdog expiry and some action is required 660 * then exit to userspace. 661 */ 662 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) && 663 vcpu->arch.watchdog_enabled) { 664 smp_wmb(); 665 kvm_make_request(KVM_REQ_WATCHDOG, vcpu); 666 kvm_vcpu_kick(vcpu); 667 } 668 669 /* 670 * Stop running the watchdog timer after final expiration to 671 * prevent the host from being flooded with timers if the 672 * guest sets a short period. 673 * Timers will resume when TSR/TCR is updated next time. 674 */ 675 if (!final) 676 arm_next_watchdog(vcpu); 677 } 678 679 static void update_timer_ints(struct kvm_vcpu *vcpu) 680 { 681 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) 682 kvmppc_core_queue_dec(vcpu); 683 else 684 kvmppc_core_dequeue_dec(vcpu); 685 686 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) 687 kvmppc_core_queue_watchdog(vcpu); 688 else 689 kvmppc_core_dequeue_watchdog(vcpu); 690 } 691 692 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu) 693 { 694 unsigned long *pending = &vcpu->arch.pending_exceptions; 695 unsigned int priority; 696 697 priority = __ffs(*pending); 698 while (priority < BOOKE_IRQPRIO_MAX) { 699 if (kvmppc_booke_irqprio_deliver(vcpu, priority)) 700 break; 701 702 priority = find_next_bit(pending, 703 BITS_PER_BYTE * sizeof(*pending), 704 priority + 1); 705 } 706 707 /* Tell the guest about our interrupt status */ 708 vcpu->arch.shared->int_pending = !!*pending; 709 } 710 711 /* Check pending exceptions and deliver one, if possible. */ 712 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 713 { 714 int r = 0; 715 WARN_ON_ONCE(!irqs_disabled()); 716 717 kvmppc_core_check_exceptions(vcpu); 718 719 if (kvm_request_pending(vcpu)) { 720 /* Exception delivery raised request; start over */ 721 return 1; 722 } 723 724 if (vcpu->arch.shared->msr & MSR_WE) { 725 local_irq_enable(); 726 kvm_vcpu_block(vcpu); 727 kvm_clear_request(KVM_REQ_UNHALT, vcpu); 728 hard_irq_disable(); 729 730 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS); 731 r = 1; 732 } 733 734 return r; 735 } 736 737 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 738 { 739 int r = 1; /* Indicate we want to get back into the guest */ 740 741 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) 742 update_timer_ints(vcpu); 743 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 744 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) 745 kvmppc_core_flush_tlb(vcpu); 746 #endif 747 748 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) { 749 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG; 750 r = 0; 751 } 752 753 if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) { 754 vcpu->run->epr.epr = 0; 755 vcpu->arch.epr_needed = true; 756 vcpu->run->exit_reason = KVM_EXIT_EPR; 757 r = 0; 758 } 759 760 return r; 761 } 762 763 int kvmppc_vcpu_run(struct kvm_vcpu *vcpu) 764 { 765 int ret, s; 766 struct debug_reg debug; 767 768 if (!vcpu->arch.sane) { 769 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 770 return -EINVAL; 771 } 772 773 s = kvmppc_prepare_to_enter(vcpu); 774 if (s <= 0) { 775 ret = s; 776 goto out; 777 } 778 /* interrupts now hard-disabled */ 779 780 #ifdef CONFIG_PPC_FPU 781 /* Save userspace FPU state in stack */ 782 enable_kernel_fp(); 783 784 /* 785 * Since we can't trap on MSR_FP in GS-mode, we consider the guest 786 * as always using the FPU. 787 */ 788 kvmppc_load_guest_fp(vcpu); 789 #endif 790 791 #ifdef CONFIG_ALTIVEC 792 /* Save userspace AltiVec state in stack */ 793 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 794 enable_kernel_altivec(); 795 /* 796 * Since we can't trap on MSR_VEC in GS-mode, we consider the guest 797 * as always using the AltiVec. 798 */ 799 kvmppc_load_guest_altivec(vcpu); 800 #endif 801 802 /* Switch to guest debug context */ 803 debug = vcpu->arch.dbg_reg; 804 switch_booke_debug_regs(&debug); 805 debug = current->thread.debug; 806 current->thread.debug = vcpu->arch.dbg_reg; 807 808 vcpu->arch.pgdir = vcpu->kvm->mm->pgd; 809 kvmppc_fix_ee_before_entry(); 810 811 ret = __kvmppc_vcpu_run(vcpu); 812 813 /* No need for guest_exit. It's done in handle_exit. 814 We also get here with interrupts enabled. */ 815 816 /* Switch back to user space debug context */ 817 switch_booke_debug_regs(&debug); 818 current->thread.debug = debug; 819 820 #ifdef CONFIG_PPC_FPU 821 kvmppc_save_guest_fp(vcpu); 822 #endif 823 824 #ifdef CONFIG_ALTIVEC 825 kvmppc_save_guest_altivec(vcpu); 826 #endif 827 828 out: 829 vcpu->mode = OUTSIDE_GUEST_MODE; 830 return ret; 831 } 832 833 static int emulation_exit(struct kvm_vcpu *vcpu) 834 { 835 enum emulation_result er; 836 837 er = kvmppc_emulate_instruction(vcpu); 838 switch (er) { 839 case EMULATE_DONE: 840 /* don't overwrite subtypes, just account kvm_stats */ 841 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS); 842 /* Future optimization: only reload non-volatiles if 843 * they were actually modified by emulation. */ 844 return RESUME_GUEST_NV; 845 846 case EMULATE_AGAIN: 847 return RESUME_GUEST; 848 849 case EMULATE_FAIL: 850 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 851 __func__, vcpu->arch.regs.nip, vcpu->arch.last_inst); 852 /* For debugging, encode the failing instruction and 853 * report it to userspace. */ 854 vcpu->run->hw.hardware_exit_reason = ~0ULL << 32; 855 vcpu->run->hw.hardware_exit_reason |= vcpu->arch.last_inst; 856 kvmppc_core_queue_program(vcpu, ESR_PIL); 857 return RESUME_HOST; 858 859 case EMULATE_EXIT_USER: 860 return RESUME_HOST; 861 862 default: 863 BUG(); 864 } 865 } 866 867 static int kvmppc_handle_debug(struct kvm_vcpu *vcpu) 868 { 869 struct kvm_run *run = vcpu->run; 870 struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg); 871 u32 dbsr = vcpu->arch.dbsr; 872 873 if (vcpu->guest_debug == 0) { 874 /* 875 * Debug resources belong to Guest. 876 * Imprecise debug event is not injected 877 */ 878 if (dbsr & DBSR_IDE) { 879 dbsr &= ~DBSR_IDE; 880 if (!dbsr) 881 return RESUME_GUEST; 882 } 883 884 if (dbsr && (vcpu->arch.shared->msr & MSR_DE) && 885 (vcpu->arch.dbg_reg.dbcr0 & DBCR0_IDM)) 886 kvmppc_core_queue_debug(vcpu); 887 888 /* Inject a program interrupt if trap debug is not allowed */ 889 if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE)) 890 kvmppc_core_queue_program(vcpu, ESR_PTR); 891 892 return RESUME_GUEST; 893 } 894 895 /* 896 * Debug resource owned by userspace. 897 * Clear guest dbsr (vcpu->arch.dbsr) 898 */ 899 vcpu->arch.dbsr = 0; 900 run->debug.arch.status = 0; 901 run->debug.arch.address = vcpu->arch.regs.nip; 902 903 if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) { 904 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT; 905 } else { 906 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W)) 907 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE; 908 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R)) 909 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ; 910 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W)) 911 run->debug.arch.address = dbg_reg->dac1; 912 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W)) 913 run->debug.arch.address = dbg_reg->dac2; 914 } 915 916 return RESUME_HOST; 917 } 918 919 static void kvmppc_fill_pt_regs(struct pt_regs *regs) 920 { 921 ulong r1, ip, msr, lr; 922 923 asm("mr %0, 1" : "=r"(r1)); 924 asm("mflr %0" : "=r"(lr)); 925 asm("mfmsr %0" : "=r"(msr)); 926 asm("bl 1f; 1: mflr %0" : "=r"(ip)); 927 928 memset(regs, 0, sizeof(*regs)); 929 regs->gpr[1] = r1; 930 regs->nip = ip; 931 regs->msr = msr; 932 regs->link = lr; 933 } 934 935 /* 936 * For interrupts needed to be handled by host interrupt handlers, 937 * corresponding host handler are called from here in similar way 938 * (but not exact) as they are called from low level handler 939 * (such as from arch/powerpc/kernel/head_fsl_booke.S). 940 */ 941 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu, 942 unsigned int exit_nr) 943 { 944 struct pt_regs regs; 945 946 switch (exit_nr) { 947 case BOOKE_INTERRUPT_EXTERNAL: 948 kvmppc_fill_pt_regs(®s); 949 do_IRQ(®s); 950 break; 951 case BOOKE_INTERRUPT_DECREMENTER: 952 kvmppc_fill_pt_regs(®s); 953 timer_interrupt(®s); 954 break; 955 #if defined(CONFIG_PPC_DOORBELL) 956 case BOOKE_INTERRUPT_DOORBELL: 957 kvmppc_fill_pt_regs(®s); 958 doorbell_exception(®s); 959 break; 960 #endif 961 case BOOKE_INTERRUPT_MACHINE_CHECK: 962 /* FIXME */ 963 break; 964 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 965 kvmppc_fill_pt_regs(®s); 966 performance_monitor_exception(®s); 967 break; 968 case BOOKE_INTERRUPT_WATCHDOG: 969 kvmppc_fill_pt_regs(®s); 970 #ifdef CONFIG_BOOKE_WDT 971 WatchdogException(®s); 972 #else 973 unknown_exception(®s); 974 #endif 975 break; 976 case BOOKE_INTERRUPT_CRITICAL: 977 kvmppc_fill_pt_regs(®s); 978 unknown_exception(®s); 979 break; 980 case BOOKE_INTERRUPT_DEBUG: 981 /* Save DBSR before preemption is enabled */ 982 vcpu->arch.dbsr = mfspr(SPRN_DBSR); 983 kvmppc_clear_dbsr(); 984 break; 985 } 986 } 987 988 static int kvmppc_resume_inst_load(struct kvm_vcpu *vcpu, 989 enum emulation_result emulated, u32 last_inst) 990 { 991 switch (emulated) { 992 case EMULATE_AGAIN: 993 return RESUME_GUEST; 994 995 case EMULATE_FAIL: 996 pr_debug("%s: load instruction from guest address %lx failed\n", 997 __func__, vcpu->arch.regs.nip); 998 /* For debugging, encode the failing instruction and 999 * report it to userspace. */ 1000 vcpu->run->hw.hardware_exit_reason = ~0ULL << 32; 1001 vcpu->run->hw.hardware_exit_reason |= last_inst; 1002 kvmppc_core_queue_program(vcpu, ESR_PIL); 1003 return RESUME_HOST; 1004 1005 default: 1006 BUG(); 1007 } 1008 } 1009 1010 /** 1011 * kvmppc_handle_exit 1012 * 1013 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) 1014 */ 1015 int kvmppc_handle_exit(struct kvm_vcpu *vcpu, unsigned int exit_nr) 1016 { 1017 struct kvm_run *run = vcpu->run; 1018 int r = RESUME_HOST; 1019 int s; 1020 int idx; 1021 u32 last_inst = KVM_INST_FETCH_FAILED; 1022 enum emulation_result emulated = EMULATE_DONE; 1023 1024 /* update before a new last_exit_type is rewritten */ 1025 kvmppc_update_timing_stats(vcpu); 1026 1027 /* restart interrupts if they were meant for the host */ 1028 kvmppc_restart_interrupt(vcpu, exit_nr); 1029 1030 /* 1031 * get last instruction before being preempted 1032 * TODO: for e6500 check also BOOKE_INTERRUPT_LRAT_ERROR & ESR_DATA 1033 */ 1034 switch (exit_nr) { 1035 case BOOKE_INTERRUPT_DATA_STORAGE: 1036 case BOOKE_INTERRUPT_DTLB_MISS: 1037 case BOOKE_INTERRUPT_HV_PRIV: 1038 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst); 1039 break; 1040 case BOOKE_INTERRUPT_PROGRAM: 1041 /* SW breakpoints arrive as illegal instructions on HV */ 1042 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) 1043 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst); 1044 break; 1045 default: 1046 break; 1047 } 1048 1049 trace_kvm_exit(exit_nr, vcpu); 1050 guest_exit_irqoff(); 1051 1052 local_irq_enable(); 1053 1054 run->exit_reason = KVM_EXIT_UNKNOWN; 1055 run->ready_for_interrupt_injection = 1; 1056 1057 if (emulated != EMULATE_DONE) { 1058 r = kvmppc_resume_inst_load(vcpu, emulated, last_inst); 1059 goto out; 1060 } 1061 1062 switch (exit_nr) { 1063 case BOOKE_INTERRUPT_MACHINE_CHECK: 1064 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); 1065 kvmppc_dump_vcpu(vcpu); 1066 /* For debugging, send invalid exit reason to user space */ 1067 run->hw.hardware_exit_reason = ~1ULL << 32; 1068 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR); 1069 r = RESUME_HOST; 1070 break; 1071 1072 case BOOKE_INTERRUPT_EXTERNAL: 1073 kvmppc_account_exit(vcpu, EXT_INTR_EXITS); 1074 r = RESUME_GUEST; 1075 break; 1076 1077 case BOOKE_INTERRUPT_DECREMENTER: 1078 kvmppc_account_exit(vcpu, DEC_EXITS); 1079 r = RESUME_GUEST; 1080 break; 1081 1082 case BOOKE_INTERRUPT_WATCHDOG: 1083 r = RESUME_GUEST; 1084 break; 1085 1086 case BOOKE_INTERRUPT_DOORBELL: 1087 kvmppc_account_exit(vcpu, DBELL_EXITS); 1088 r = RESUME_GUEST; 1089 break; 1090 1091 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT: 1092 kvmppc_account_exit(vcpu, GDBELL_EXITS); 1093 1094 /* 1095 * We are here because there is a pending guest interrupt 1096 * which could not be delivered as MSR_CE or MSR_ME was not 1097 * set. Once we break from here we will retry delivery. 1098 */ 1099 r = RESUME_GUEST; 1100 break; 1101 1102 case BOOKE_INTERRUPT_GUEST_DBELL: 1103 kvmppc_account_exit(vcpu, GDBELL_EXITS); 1104 1105 /* 1106 * We are here because there is a pending guest interrupt 1107 * which could not be delivered as MSR_EE was not set. Once 1108 * we break from here we will retry delivery. 1109 */ 1110 r = RESUME_GUEST; 1111 break; 1112 1113 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 1114 r = RESUME_GUEST; 1115 break; 1116 1117 case BOOKE_INTERRUPT_HV_PRIV: 1118 r = emulation_exit(vcpu); 1119 break; 1120 1121 case BOOKE_INTERRUPT_PROGRAM: 1122 if ((vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) && 1123 (last_inst == KVMPPC_INST_SW_BREAKPOINT)) { 1124 /* 1125 * We are here because of an SW breakpoint instr, 1126 * so lets return to host to handle. 1127 */ 1128 r = kvmppc_handle_debug(vcpu); 1129 run->exit_reason = KVM_EXIT_DEBUG; 1130 kvmppc_account_exit(vcpu, DEBUG_EXITS); 1131 break; 1132 } 1133 1134 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) { 1135 /* 1136 * Program traps generated by user-level software must 1137 * be handled by the guest kernel. 1138 * 1139 * In GS mode, hypervisor privileged instructions trap 1140 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are 1141 * actual program interrupts, handled by the guest. 1142 */ 1143 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr); 1144 r = RESUME_GUEST; 1145 kvmppc_account_exit(vcpu, USR_PR_INST); 1146 break; 1147 } 1148 1149 r = emulation_exit(vcpu); 1150 break; 1151 1152 case BOOKE_INTERRUPT_FP_UNAVAIL: 1153 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 1154 kvmppc_account_exit(vcpu, FP_UNAVAIL); 1155 r = RESUME_GUEST; 1156 break; 1157 1158 #ifdef CONFIG_SPE 1159 case BOOKE_INTERRUPT_SPE_UNAVAIL: { 1160 if (vcpu->arch.shared->msr & MSR_SPE) 1161 kvmppc_vcpu_enable_spe(vcpu); 1162 else 1163 kvmppc_booke_queue_irqprio(vcpu, 1164 BOOKE_IRQPRIO_SPE_UNAVAIL); 1165 r = RESUME_GUEST; 1166 break; 1167 } 1168 1169 case BOOKE_INTERRUPT_SPE_FP_DATA: 1170 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA); 1171 r = RESUME_GUEST; 1172 break; 1173 1174 case BOOKE_INTERRUPT_SPE_FP_ROUND: 1175 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); 1176 r = RESUME_GUEST; 1177 break; 1178 #elif defined(CONFIG_SPE_POSSIBLE) 1179 case BOOKE_INTERRUPT_SPE_UNAVAIL: 1180 /* 1181 * Guest wants SPE, but host kernel doesn't support it. Send 1182 * an "unimplemented operation" program check to the guest. 1183 */ 1184 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); 1185 r = RESUME_GUEST; 1186 break; 1187 1188 /* 1189 * These really should never happen without CONFIG_SPE, 1190 * as we should never enable the real MSR[SPE] in the guest. 1191 */ 1192 case BOOKE_INTERRUPT_SPE_FP_DATA: 1193 case BOOKE_INTERRUPT_SPE_FP_ROUND: 1194 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", 1195 __func__, exit_nr, vcpu->arch.regs.nip); 1196 run->hw.hardware_exit_reason = exit_nr; 1197 r = RESUME_HOST; 1198 break; 1199 #endif /* CONFIG_SPE_POSSIBLE */ 1200 1201 /* 1202 * On cores with Vector category, KVM is loaded only if CONFIG_ALTIVEC, 1203 * see kvmppc_core_check_processor_compat(). 1204 */ 1205 #ifdef CONFIG_ALTIVEC 1206 case BOOKE_INTERRUPT_ALTIVEC_UNAVAIL: 1207 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL); 1208 r = RESUME_GUEST; 1209 break; 1210 1211 case BOOKE_INTERRUPT_ALTIVEC_ASSIST: 1212 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_ASSIST); 1213 r = RESUME_GUEST; 1214 break; 1215 #endif 1216 1217 case BOOKE_INTERRUPT_DATA_STORAGE: 1218 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear, 1219 vcpu->arch.fault_esr); 1220 kvmppc_account_exit(vcpu, DSI_EXITS); 1221 r = RESUME_GUEST; 1222 break; 1223 1224 case BOOKE_INTERRUPT_INST_STORAGE: 1225 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr); 1226 kvmppc_account_exit(vcpu, ISI_EXITS); 1227 r = RESUME_GUEST; 1228 break; 1229 1230 case BOOKE_INTERRUPT_ALIGNMENT: 1231 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear, 1232 vcpu->arch.fault_esr); 1233 r = RESUME_GUEST; 1234 break; 1235 1236 #ifdef CONFIG_KVM_BOOKE_HV 1237 case BOOKE_INTERRUPT_HV_SYSCALL: 1238 if (!(vcpu->arch.shared->msr & MSR_PR)) { 1239 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1240 } else { 1241 /* 1242 * hcall from guest userspace -- send privileged 1243 * instruction program check. 1244 */ 1245 kvmppc_core_queue_program(vcpu, ESR_PPR); 1246 } 1247 1248 r = RESUME_GUEST; 1249 break; 1250 #else 1251 case BOOKE_INTERRUPT_SYSCALL: 1252 if (!(vcpu->arch.shared->msr & MSR_PR) && 1253 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 1254 /* KVM PV hypercalls */ 1255 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1256 r = RESUME_GUEST; 1257 } else { 1258 /* Guest syscalls */ 1259 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL); 1260 } 1261 kvmppc_account_exit(vcpu, SYSCALL_EXITS); 1262 r = RESUME_GUEST; 1263 break; 1264 #endif 1265 1266 case BOOKE_INTERRUPT_DTLB_MISS: { 1267 unsigned long eaddr = vcpu->arch.fault_dear; 1268 int gtlb_index; 1269 gpa_t gpaddr; 1270 gfn_t gfn; 1271 1272 #ifdef CONFIG_KVM_E500V2 1273 if (!(vcpu->arch.shared->msr & MSR_PR) && 1274 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1275 kvmppc_map_magic(vcpu); 1276 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1277 r = RESUME_GUEST; 1278 1279 break; 1280 } 1281 #endif 1282 1283 /* Check the guest TLB. */ 1284 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 1285 if (gtlb_index < 0) { 1286 /* The guest didn't have a mapping for it. */ 1287 kvmppc_core_queue_dtlb_miss(vcpu, 1288 vcpu->arch.fault_dear, 1289 vcpu->arch.fault_esr); 1290 kvmppc_mmu_dtlb_miss(vcpu); 1291 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); 1292 r = RESUME_GUEST; 1293 break; 1294 } 1295 1296 idx = srcu_read_lock(&vcpu->kvm->srcu); 1297 1298 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1299 gfn = gpaddr >> PAGE_SHIFT; 1300 1301 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1302 /* The guest TLB had a mapping, but the shadow TLB 1303 * didn't, and it is RAM. This could be because: 1304 * a) the entry is mapping the host kernel, or 1305 * b) the guest used a large mapping which we're faking 1306 * Either way, we need to satisfy the fault without 1307 * invoking the guest. */ 1308 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1309 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1310 r = RESUME_GUEST; 1311 } else { 1312 /* Guest has mapped and accessed a page which is not 1313 * actually RAM. */ 1314 vcpu->arch.paddr_accessed = gpaddr; 1315 vcpu->arch.vaddr_accessed = eaddr; 1316 r = kvmppc_emulate_mmio(vcpu); 1317 kvmppc_account_exit(vcpu, MMIO_EXITS); 1318 } 1319 1320 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1321 break; 1322 } 1323 1324 case BOOKE_INTERRUPT_ITLB_MISS: { 1325 unsigned long eaddr = vcpu->arch.regs.nip; 1326 gpa_t gpaddr; 1327 gfn_t gfn; 1328 int gtlb_index; 1329 1330 r = RESUME_GUEST; 1331 1332 /* Check the guest TLB. */ 1333 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 1334 if (gtlb_index < 0) { 1335 /* The guest didn't have a mapping for it. */ 1336 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 1337 kvmppc_mmu_itlb_miss(vcpu); 1338 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); 1339 break; 1340 } 1341 1342 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); 1343 1344 idx = srcu_read_lock(&vcpu->kvm->srcu); 1345 1346 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1347 gfn = gpaddr >> PAGE_SHIFT; 1348 1349 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1350 /* The guest TLB had a mapping, but the shadow TLB 1351 * didn't. This could be because: 1352 * a) the entry is mapping the host kernel, or 1353 * b) the guest used a large mapping which we're faking 1354 * Either way, we need to satisfy the fault without 1355 * invoking the guest. */ 1356 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1357 } else { 1358 /* Guest mapped and leaped at non-RAM! */ 1359 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); 1360 } 1361 1362 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1363 break; 1364 } 1365 1366 case BOOKE_INTERRUPT_DEBUG: { 1367 r = kvmppc_handle_debug(vcpu); 1368 if (r == RESUME_HOST) 1369 run->exit_reason = KVM_EXIT_DEBUG; 1370 kvmppc_account_exit(vcpu, DEBUG_EXITS); 1371 break; 1372 } 1373 1374 default: 1375 printk(KERN_EMERG "exit_nr %d\n", exit_nr); 1376 BUG(); 1377 } 1378 1379 out: 1380 /* 1381 * To avoid clobbering exit_reason, only check for signals if we 1382 * aren't already exiting to userspace for some other reason. 1383 */ 1384 if (!(r & RESUME_HOST)) { 1385 s = kvmppc_prepare_to_enter(vcpu); 1386 if (s <= 0) 1387 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); 1388 else { 1389 /* interrupts now hard-disabled */ 1390 kvmppc_fix_ee_before_entry(); 1391 kvmppc_load_guest_fp(vcpu); 1392 kvmppc_load_guest_altivec(vcpu); 1393 } 1394 } 1395 1396 return r; 1397 } 1398 1399 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr) 1400 { 1401 u32 old_tsr = vcpu->arch.tsr; 1402 1403 vcpu->arch.tsr = new_tsr; 1404 1405 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS)) 1406 arm_next_watchdog(vcpu); 1407 1408 update_timer_ints(vcpu); 1409 } 1410 1411 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 1412 { 1413 /* setup watchdog timer once */ 1414 spin_lock_init(&vcpu->arch.wdt_lock); 1415 timer_setup(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 0); 1416 1417 /* 1418 * Clear DBSR.MRR to avoid guest debug interrupt as 1419 * this is of host interest 1420 */ 1421 mtspr(SPRN_DBSR, DBSR_MRR); 1422 return 0; 1423 } 1424 1425 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 1426 { 1427 del_timer_sync(&vcpu->arch.wdt_timer); 1428 } 1429 1430 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1431 { 1432 int i; 1433 1434 vcpu_load(vcpu); 1435 1436 regs->pc = vcpu->arch.regs.nip; 1437 regs->cr = kvmppc_get_cr(vcpu); 1438 regs->ctr = vcpu->arch.regs.ctr; 1439 regs->lr = vcpu->arch.regs.link; 1440 regs->xer = kvmppc_get_xer(vcpu); 1441 regs->msr = vcpu->arch.shared->msr; 1442 regs->srr0 = kvmppc_get_srr0(vcpu); 1443 regs->srr1 = kvmppc_get_srr1(vcpu); 1444 regs->pid = vcpu->arch.pid; 1445 regs->sprg0 = kvmppc_get_sprg0(vcpu); 1446 regs->sprg1 = kvmppc_get_sprg1(vcpu); 1447 regs->sprg2 = kvmppc_get_sprg2(vcpu); 1448 regs->sprg3 = kvmppc_get_sprg3(vcpu); 1449 regs->sprg4 = kvmppc_get_sprg4(vcpu); 1450 regs->sprg5 = kvmppc_get_sprg5(vcpu); 1451 regs->sprg6 = kvmppc_get_sprg6(vcpu); 1452 regs->sprg7 = kvmppc_get_sprg7(vcpu); 1453 1454 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1455 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 1456 1457 vcpu_put(vcpu); 1458 return 0; 1459 } 1460 1461 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1462 { 1463 int i; 1464 1465 vcpu_load(vcpu); 1466 1467 vcpu->arch.regs.nip = regs->pc; 1468 kvmppc_set_cr(vcpu, regs->cr); 1469 vcpu->arch.regs.ctr = regs->ctr; 1470 vcpu->arch.regs.link = regs->lr; 1471 kvmppc_set_xer(vcpu, regs->xer); 1472 kvmppc_set_msr(vcpu, regs->msr); 1473 kvmppc_set_srr0(vcpu, regs->srr0); 1474 kvmppc_set_srr1(vcpu, regs->srr1); 1475 kvmppc_set_pid(vcpu, regs->pid); 1476 kvmppc_set_sprg0(vcpu, regs->sprg0); 1477 kvmppc_set_sprg1(vcpu, regs->sprg1); 1478 kvmppc_set_sprg2(vcpu, regs->sprg2); 1479 kvmppc_set_sprg3(vcpu, regs->sprg3); 1480 kvmppc_set_sprg4(vcpu, regs->sprg4); 1481 kvmppc_set_sprg5(vcpu, regs->sprg5); 1482 kvmppc_set_sprg6(vcpu, regs->sprg6); 1483 kvmppc_set_sprg7(vcpu, regs->sprg7); 1484 1485 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1486 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 1487 1488 vcpu_put(vcpu); 1489 return 0; 1490 } 1491 1492 static void get_sregs_base(struct kvm_vcpu *vcpu, 1493 struct kvm_sregs *sregs) 1494 { 1495 u64 tb = get_tb(); 1496 1497 sregs->u.e.features |= KVM_SREGS_E_BASE; 1498 1499 sregs->u.e.csrr0 = vcpu->arch.csrr0; 1500 sregs->u.e.csrr1 = vcpu->arch.csrr1; 1501 sregs->u.e.mcsr = vcpu->arch.mcsr; 1502 sregs->u.e.esr = kvmppc_get_esr(vcpu); 1503 sregs->u.e.dear = kvmppc_get_dar(vcpu); 1504 sregs->u.e.tsr = vcpu->arch.tsr; 1505 sregs->u.e.tcr = vcpu->arch.tcr; 1506 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb); 1507 sregs->u.e.tb = tb; 1508 sregs->u.e.vrsave = vcpu->arch.vrsave; 1509 } 1510 1511 static int set_sregs_base(struct kvm_vcpu *vcpu, 1512 struct kvm_sregs *sregs) 1513 { 1514 if (!(sregs->u.e.features & KVM_SREGS_E_BASE)) 1515 return 0; 1516 1517 vcpu->arch.csrr0 = sregs->u.e.csrr0; 1518 vcpu->arch.csrr1 = sregs->u.e.csrr1; 1519 vcpu->arch.mcsr = sregs->u.e.mcsr; 1520 kvmppc_set_esr(vcpu, sregs->u.e.esr); 1521 kvmppc_set_dar(vcpu, sregs->u.e.dear); 1522 vcpu->arch.vrsave = sregs->u.e.vrsave; 1523 kvmppc_set_tcr(vcpu, sregs->u.e.tcr); 1524 1525 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) { 1526 vcpu->arch.dec = sregs->u.e.dec; 1527 kvmppc_emulate_dec(vcpu); 1528 } 1529 1530 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) 1531 kvmppc_set_tsr(vcpu, sregs->u.e.tsr); 1532 1533 return 0; 1534 } 1535 1536 static void get_sregs_arch206(struct kvm_vcpu *vcpu, 1537 struct kvm_sregs *sregs) 1538 { 1539 sregs->u.e.features |= KVM_SREGS_E_ARCH206; 1540 1541 sregs->u.e.pir = vcpu->vcpu_id; 1542 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0; 1543 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1; 1544 sregs->u.e.decar = vcpu->arch.decar; 1545 sregs->u.e.ivpr = vcpu->arch.ivpr; 1546 } 1547 1548 static int set_sregs_arch206(struct kvm_vcpu *vcpu, 1549 struct kvm_sregs *sregs) 1550 { 1551 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206)) 1552 return 0; 1553 1554 if (sregs->u.e.pir != vcpu->vcpu_id) 1555 return -EINVAL; 1556 1557 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0; 1558 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1; 1559 vcpu->arch.decar = sregs->u.e.decar; 1560 vcpu->arch.ivpr = sregs->u.e.ivpr; 1561 1562 return 0; 1563 } 1564 1565 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1566 { 1567 sregs->u.e.features |= KVM_SREGS_E_IVOR; 1568 1569 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; 1570 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; 1571 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; 1572 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; 1573 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; 1574 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; 1575 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; 1576 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; 1577 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; 1578 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; 1579 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; 1580 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; 1581 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; 1582 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; 1583 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; 1584 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; 1585 return 0; 1586 } 1587 1588 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1589 { 1590 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR)) 1591 return 0; 1592 1593 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0]; 1594 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1]; 1595 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2]; 1596 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3]; 1597 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4]; 1598 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5]; 1599 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6]; 1600 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7]; 1601 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8]; 1602 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9]; 1603 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10]; 1604 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11]; 1605 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12]; 1606 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13]; 1607 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14]; 1608 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15]; 1609 1610 return 0; 1611 } 1612 1613 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 1614 struct kvm_sregs *sregs) 1615 { 1616 int ret; 1617 1618 vcpu_load(vcpu); 1619 1620 sregs->pvr = vcpu->arch.pvr; 1621 1622 get_sregs_base(vcpu, sregs); 1623 get_sregs_arch206(vcpu, sregs); 1624 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs); 1625 1626 vcpu_put(vcpu); 1627 return ret; 1628 } 1629 1630 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 1631 struct kvm_sregs *sregs) 1632 { 1633 int ret = -EINVAL; 1634 1635 vcpu_load(vcpu); 1636 if (vcpu->arch.pvr != sregs->pvr) 1637 goto out; 1638 1639 ret = set_sregs_base(vcpu, sregs); 1640 if (ret < 0) 1641 goto out; 1642 1643 ret = set_sregs_arch206(vcpu, sregs); 1644 if (ret < 0) 1645 goto out; 1646 1647 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs); 1648 1649 out: 1650 vcpu_put(vcpu); 1651 return ret; 1652 } 1653 1654 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, 1655 union kvmppc_one_reg *val) 1656 { 1657 int r = 0; 1658 1659 switch (id) { 1660 case KVM_REG_PPC_IAC1: 1661 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac1); 1662 break; 1663 case KVM_REG_PPC_IAC2: 1664 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac2); 1665 break; 1666 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1667 case KVM_REG_PPC_IAC3: 1668 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac3); 1669 break; 1670 case KVM_REG_PPC_IAC4: 1671 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac4); 1672 break; 1673 #endif 1674 case KVM_REG_PPC_DAC1: 1675 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac1); 1676 break; 1677 case KVM_REG_PPC_DAC2: 1678 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac2); 1679 break; 1680 case KVM_REG_PPC_EPR: { 1681 u32 epr = kvmppc_get_epr(vcpu); 1682 *val = get_reg_val(id, epr); 1683 break; 1684 } 1685 #if defined(CONFIG_64BIT) 1686 case KVM_REG_PPC_EPCR: 1687 *val = get_reg_val(id, vcpu->arch.epcr); 1688 break; 1689 #endif 1690 case KVM_REG_PPC_TCR: 1691 *val = get_reg_val(id, vcpu->arch.tcr); 1692 break; 1693 case KVM_REG_PPC_TSR: 1694 *val = get_reg_val(id, vcpu->arch.tsr); 1695 break; 1696 case KVM_REG_PPC_DEBUG_INST: 1697 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 1698 break; 1699 case KVM_REG_PPC_VRSAVE: 1700 *val = get_reg_val(id, vcpu->arch.vrsave); 1701 break; 1702 default: 1703 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val); 1704 break; 1705 } 1706 1707 return r; 1708 } 1709 1710 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, 1711 union kvmppc_one_reg *val) 1712 { 1713 int r = 0; 1714 1715 switch (id) { 1716 case KVM_REG_PPC_IAC1: 1717 vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val); 1718 break; 1719 case KVM_REG_PPC_IAC2: 1720 vcpu->arch.dbg_reg.iac2 = set_reg_val(id, *val); 1721 break; 1722 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1723 case KVM_REG_PPC_IAC3: 1724 vcpu->arch.dbg_reg.iac3 = set_reg_val(id, *val); 1725 break; 1726 case KVM_REG_PPC_IAC4: 1727 vcpu->arch.dbg_reg.iac4 = set_reg_val(id, *val); 1728 break; 1729 #endif 1730 case KVM_REG_PPC_DAC1: 1731 vcpu->arch.dbg_reg.dac1 = set_reg_val(id, *val); 1732 break; 1733 case KVM_REG_PPC_DAC2: 1734 vcpu->arch.dbg_reg.dac2 = set_reg_val(id, *val); 1735 break; 1736 case KVM_REG_PPC_EPR: { 1737 u32 new_epr = set_reg_val(id, *val); 1738 kvmppc_set_epr(vcpu, new_epr); 1739 break; 1740 } 1741 #if defined(CONFIG_64BIT) 1742 case KVM_REG_PPC_EPCR: { 1743 u32 new_epcr = set_reg_val(id, *val); 1744 kvmppc_set_epcr(vcpu, new_epcr); 1745 break; 1746 } 1747 #endif 1748 case KVM_REG_PPC_OR_TSR: { 1749 u32 tsr_bits = set_reg_val(id, *val); 1750 kvmppc_set_tsr_bits(vcpu, tsr_bits); 1751 break; 1752 } 1753 case KVM_REG_PPC_CLEAR_TSR: { 1754 u32 tsr_bits = set_reg_val(id, *val); 1755 kvmppc_clr_tsr_bits(vcpu, tsr_bits); 1756 break; 1757 } 1758 case KVM_REG_PPC_TSR: { 1759 u32 tsr = set_reg_val(id, *val); 1760 kvmppc_set_tsr(vcpu, tsr); 1761 break; 1762 } 1763 case KVM_REG_PPC_TCR: { 1764 u32 tcr = set_reg_val(id, *val); 1765 kvmppc_set_tcr(vcpu, tcr); 1766 break; 1767 } 1768 case KVM_REG_PPC_VRSAVE: 1769 vcpu->arch.vrsave = set_reg_val(id, *val); 1770 break; 1771 default: 1772 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val); 1773 break; 1774 } 1775 1776 return r; 1777 } 1778 1779 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1780 { 1781 return -EOPNOTSUPP; 1782 } 1783 1784 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1785 { 1786 return -EOPNOTSUPP; 1787 } 1788 1789 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 1790 struct kvm_translation *tr) 1791 { 1792 int r; 1793 1794 vcpu_load(vcpu); 1795 r = kvmppc_core_vcpu_translate(vcpu, tr); 1796 vcpu_put(vcpu); 1797 return r; 1798 } 1799 1800 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot) 1801 { 1802 1803 } 1804 1805 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 1806 { 1807 return -EOPNOTSUPP; 1808 } 1809 1810 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot) 1811 { 1812 } 1813 1814 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 1815 struct kvm_memory_slot *memslot, 1816 const struct kvm_userspace_memory_region *mem, 1817 enum kvm_mr_change change) 1818 { 1819 return 0; 1820 } 1821 1822 void kvmppc_core_commit_memory_region(struct kvm *kvm, 1823 const struct kvm_userspace_memory_region *mem, 1824 const struct kvm_memory_slot *old, 1825 const struct kvm_memory_slot *new, 1826 enum kvm_mr_change change) 1827 { 1828 } 1829 1830 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 1831 { 1832 } 1833 1834 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr) 1835 { 1836 #if defined(CONFIG_64BIT) 1837 vcpu->arch.epcr = new_epcr; 1838 #ifdef CONFIG_KVM_BOOKE_HV 1839 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM; 1840 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 1841 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM; 1842 #endif 1843 #endif 1844 } 1845 1846 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr) 1847 { 1848 vcpu->arch.tcr = new_tcr; 1849 arm_next_watchdog(vcpu); 1850 update_timer_ints(vcpu); 1851 } 1852 1853 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1854 { 1855 set_bits(tsr_bits, &vcpu->arch.tsr); 1856 smp_wmb(); 1857 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 1858 kvm_vcpu_kick(vcpu); 1859 } 1860 1861 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1862 { 1863 clear_bits(tsr_bits, &vcpu->arch.tsr); 1864 1865 /* 1866 * We may have stopped the watchdog due to 1867 * being stuck on final expiration. 1868 */ 1869 if (tsr_bits & (TSR_ENW | TSR_WIS)) 1870 arm_next_watchdog(vcpu); 1871 1872 update_timer_ints(vcpu); 1873 } 1874 1875 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu) 1876 { 1877 if (vcpu->arch.tcr & TCR_ARE) { 1878 vcpu->arch.dec = vcpu->arch.decar; 1879 kvmppc_emulate_dec(vcpu); 1880 } 1881 1882 kvmppc_set_tsr_bits(vcpu, TSR_DIS); 1883 } 1884 1885 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg, 1886 uint64_t addr, int index) 1887 { 1888 switch (index) { 1889 case 0: 1890 dbg_reg->dbcr0 |= DBCR0_IAC1; 1891 dbg_reg->iac1 = addr; 1892 break; 1893 case 1: 1894 dbg_reg->dbcr0 |= DBCR0_IAC2; 1895 dbg_reg->iac2 = addr; 1896 break; 1897 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1898 case 2: 1899 dbg_reg->dbcr0 |= DBCR0_IAC3; 1900 dbg_reg->iac3 = addr; 1901 break; 1902 case 3: 1903 dbg_reg->dbcr0 |= DBCR0_IAC4; 1904 dbg_reg->iac4 = addr; 1905 break; 1906 #endif 1907 default: 1908 return -EINVAL; 1909 } 1910 1911 dbg_reg->dbcr0 |= DBCR0_IDM; 1912 return 0; 1913 } 1914 1915 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr, 1916 int type, int index) 1917 { 1918 switch (index) { 1919 case 0: 1920 if (type & KVMPPC_DEBUG_WATCH_READ) 1921 dbg_reg->dbcr0 |= DBCR0_DAC1R; 1922 if (type & KVMPPC_DEBUG_WATCH_WRITE) 1923 dbg_reg->dbcr0 |= DBCR0_DAC1W; 1924 dbg_reg->dac1 = addr; 1925 break; 1926 case 1: 1927 if (type & KVMPPC_DEBUG_WATCH_READ) 1928 dbg_reg->dbcr0 |= DBCR0_DAC2R; 1929 if (type & KVMPPC_DEBUG_WATCH_WRITE) 1930 dbg_reg->dbcr0 |= DBCR0_DAC2W; 1931 dbg_reg->dac2 = addr; 1932 break; 1933 default: 1934 return -EINVAL; 1935 } 1936 1937 dbg_reg->dbcr0 |= DBCR0_IDM; 1938 return 0; 1939 } 1940 void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set) 1941 { 1942 /* XXX: Add similar MSR protection for BookE-PR */ 1943 #ifdef CONFIG_KVM_BOOKE_HV 1944 BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP)); 1945 if (set) { 1946 if (prot_bitmap & MSR_UCLE) 1947 vcpu->arch.shadow_msrp |= MSRP_UCLEP; 1948 if (prot_bitmap & MSR_DE) 1949 vcpu->arch.shadow_msrp |= MSRP_DEP; 1950 if (prot_bitmap & MSR_PMM) 1951 vcpu->arch.shadow_msrp |= MSRP_PMMP; 1952 } else { 1953 if (prot_bitmap & MSR_UCLE) 1954 vcpu->arch.shadow_msrp &= ~MSRP_UCLEP; 1955 if (prot_bitmap & MSR_DE) 1956 vcpu->arch.shadow_msrp &= ~MSRP_DEP; 1957 if (prot_bitmap & MSR_PMM) 1958 vcpu->arch.shadow_msrp &= ~MSRP_PMMP; 1959 } 1960 #endif 1961 } 1962 1963 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid, 1964 enum xlate_readwrite xlrw, struct kvmppc_pte *pte) 1965 { 1966 int gtlb_index; 1967 gpa_t gpaddr; 1968 1969 #ifdef CONFIG_KVM_E500V2 1970 if (!(vcpu->arch.shared->msr & MSR_PR) && 1971 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1972 pte->eaddr = eaddr; 1973 pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) | 1974 (eaddr & ~PAGE_MASK); 1975 pte->vpage = eaddr >> PAGE_SHIFT; 1976 pte->may_read = true; 1977 pte->may_write = true; 1978 pte->may_execute = true; 1979 1980 return 0; 1981 } 1982 #endif 1983 1984 /* Check the guest TLB. */ 1985 switch (xlid) { 1986 case XLATE_INST: 1987 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 1988 break; 1989 case XLATE_DATA: 1990 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 1991 break; 1992 default: 1993 BUG(); 1994 } 1995 1996 /* Do we have a TLB entry at all? */ 1997 if (gtlb_index < 0) 1998 return -ENOENT; 1999 2000 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 2001 2002 pte->eaddr = eaddr; 2003 pte->raddr = (gpaddr & PAGE_MASK) | (eaddr & ~PAGE_MASK); 2004 pte->vpage = eaddr >> PAGE_SHIFT; 2005 2006 /* XXX read permissions from the guest TLB */ 2007 pte->may_read = true; 2008 pte->may_write = true; 2009 pte->may_execute = true; 2010 2011 return 0; 2012 } 2013 2014 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 2015 struct kvm_guest_debug *dbg) 2016 { 2017 struct debug_reg *dbg_reg; 2018 int n, b = 0, w = 0; 2019 int ret = 0; 2020 2021 vcpu_load(vcpu); 2022 2023 if (!(dbg->control & KVM_GUESTDBG_ENABLE)) { 2024 vcpu->arch.dbg_reg.dbcr0 = 0; 2025 vcpu->guest_debug = 0; 2026 kvm_guest_protect_msr(vcpu, MSR_DE, false); 2027 goto out; 2028 } 2029 2030 kvm_guest_protect_msr(vcpu, MSR_DE, true); 2031 vcpu->guest_debug = dbg->control; 2032 vcpu->arch.dbg_reg.dbcr0 = 0; 2033 2034 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) 2035 vcpu->arch.dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC; 2036 2037 /* Code below handles only HW breakpoints */ 2038 dbg_reg = &(vcpu->arch.dbg_reg); 2039 2040 #ifdef CONFIG_KVM_BOOKE_HV 2041 /* 2042 * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1 2043 * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0 2044 */ 2045 dbg_reg->dbcr1 = 0; 2046 dbg_reg->dbcr2 = 0; 2047 #else 2048 /* 2049 * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1 2050 * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR 2051 * is set. 2052 */ 2053 dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US | 2054 DBCR1_IAC4US; 2055 dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 2056 #endif 2057 2058 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) 2059 goto out; 2060 2061 ret = -EINVAL; 2062 for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) { 2063 uint64_t addr = dbg->arch.bp[n].addr; 2064 uint32_t type = dbg->arch.bp[n].type; 2065 2066 if (type == KVMPPC_DEBUG_NONE) 2067 continue; 2068 2069 if (type & ~(KVMPPC_DEBUG_WATCH_READ | 2070 KVMPPC_DEBUG_WATCH_WRITE | 2071 KVMPPC_DEBUG_BREAKPOINT)) 2072 goto out; 2073 2074 if (type & KVMPPC_DEBUG_BREAKPOINT) { 2075 /* Setting H/W breakpoint */ 2076 if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++)) 2077 goto out; 2078 } else { 2079 /* Setting H/W watchpoint */ 2080 if (kvmppc_booke_add_watchpoint(dbg_reg, addr, 2081 type, w++)) 2082 goto out; 2083 } 2084 } 2085 2086 ret = 0; 2087 out: 2088 vcpu_put(vcpu); 2089 return ret; 2090 } 2091 2092 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 2093 { 2094 vcpu->cpu = smp_processor_id(); 2095 current->thread.kvm_vcpu = vcpu; 2096 } 2097 2098 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu) 2099 { 2100 current->thread.kvm_vcpu = NULL; 2101 vcpu->cpu = -1; 2102 2103 /* Clear pending debug event in DBSR */ 2104 kvmppc_clear_dbsr(); 2105 } 2106 2107 int kvmppc_core_init_vm(struct kvm *kvm) 2108 { 2109 return kvm->arch.kvm_ops->init_vm(kvm); 2110 } 2111 2112 int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu) 2113 { 2114 int i; 2115 int r; 2116 2117 r = vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu); 2118 if (r) 2119 return r; 2120 2121 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ 2122 vcpu->arch.regs.nip = 0; 2123 vcpu->arch.shared->pir = vcpu->vcpu_id; 2124 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */ 2125 kvmppc_set_msr(vcpu, 0); 2126 2127 #ifndef CONFIG_KVM_BOOKE_HV 2128 vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS; 2129 vcpu->arch.shadow_pid = 1; 2130 vcpu->arch.shared->msr = 0; 2131 #endif 2132 2133 /* Eye-catching numbers so we know if the guest takes an interrupt 2134 * before it's programmed its own IVPR/IVORs. */ 2135 vcpu->arch.ivpr = 0x55550000; 2136 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++) 2137 vcpu->arch.ivor[i] = 0x7700 | i * 4; 2138 2139 kvmppc_init_timing_stats(vcpu); 2140 2141 r = kvmppc_core_vcpu_setup(vcpu); 2142 if (r) 2143 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 2144 kvmppc_sanity_check(vcpu); 2145 return r; 2146 } 2147 2148 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) 2149 { 2150 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 2151 } 2152 2153 void kvmppc_core_destroy_vm(struct kvm *kvm) 2154 { 2155 kvm->arch.kvm_ops->destroy_vm(kvm); 2156 } 2157 2158 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 2159 { 2160 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu); 2161 } 2162 2163 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) 2164 { 2165 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu); 2166 } 2167 2168 int __init kvmppc_booke_init(void) 2169 { 2170 #ifndef CONFIG_KVM_BOOKE_HV 2171 unsigned long ivor[16]; 2172 unsigned long *handler = kvmppc_booke_handler_addr; 2173 unsigned long max_ivor = 0; 2174 unsigned long handler_len; 2175 int i; 2176 2177 /* We install our own exception handlers by hijacking IVPR. IVPR must 2178 * be 16-bit aligned, so we need a 64KB allocation. */ 2179 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 2180 VCPU_SIZE_ORDER); 2181 if (!kvmppc_booke_handlers) 2182 return -ENOMEM; 2183 2184 /* XXX make sure our handlers are smaller than Linux's */ 2185 2186 /* Copy our interrupt handlers to match host IVORs. That way we don't 2187 * have to swap the IVORs on every guest/host transition. */ 2188 ivor[0] = mfspr(SPRN_IVOR0); 2189 ivor[1] = mfspr(SPRN_IVOR1); 2190 ivor[2] = mfspr(SPRN_IVOR2); 2191 ivor[3] = mfspr(SPRN_IVOR3); 2192 ivor[4] = mfspr(SPRN_IVOR4); 2193 ivor[5] = mfspr(SPRN_IVOR5); 2194 ivor[6] = mfspr(SPRN_IVOR6); 2195 ivor[7] = mfspr(SPRN_IVOR7); 2196 ivor[8] = mfspr(SPRN_IVOR8); 2197 ivor[9] = mfspr(SPRN_IVOR9); 2198 ivor[10] = mfspr(SPRN_IVOR10); 2199 ivor[11] = mfspr(SPRN_IVOR11); 2200 ivor[12] = mfspr(SPRN_IVOR12); 2201 ivor[13] = mfspr(SPRN_IVOR13); 2202 ivor[14] = mfspr(SPRN_IVOR14); 2203 ivor[15] = mfspr(SPRN_IVOR15); 2204 2205 for (i = 0; i < 16; i++) { 2206 if (ivor[i] > max_ivor) 2207 max_ivor = i; 2208 2209 handler_len = handler[i + 1] - handler[i]; 2210 memcpy((void *)kvmppc_booke_handlers + ivor[i], 2211 (void *)handler[i], handler_len); 2212 } 2213 2214 handler_len = handler[max_ivor + 1] - handler[max_ivor]; 2215 flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers + 2216 ivor[max_ivor] + handler_len); 2217 #endif /* !BOOKE_HV */ 2218 return 0; 2219 } 2220 2221 void __exit kvmppc_booke_exit(void) 2222 { 2223 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); 2224 kvm_exit(); 2225 } 2226