1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * 4 * Copyright IBM Corp. 2007 5 * Copyright 2010-2011 Freescale Semiconductor, Inc. 6 * 7 * Authors: Hollis Blanchard <hollisb@us.ibm.com> 8 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 9 * Scott Wood <scottwood@freescale.com> 10 * Varun Sethi <varun.sethi@freescale.com> 11 */ 12 13 #include <linux/errno.h> 14 #include <linux/err.h> 15 #include <linux/kvm_host.h> 16 #include <linux/gfp.h> 17 #include <linux/module.h> 18 #include <linux/vmalloc.h> 19 #include <linux/fs.h> 20 21 #include <asm/cputable.h> 22 #include <linux/uaccess.h> 23 #include <asm/kvm_ppc.h> 24 #include <asm/cacheflush.h> 25 #include <asm/dbell.h> 26 #include <asm/hw_irq.h> 27 #include <asm/irq.h> 28 #include <asm/time.h> 29 30 #include "timing.h" 31 #include "booke.h" 32 33 #define CREATE_TRACE_POINTS 34 #include "trace_booke.h" 35 36 unsigned long kvmppc_booke_handlers; 37 38 struct kvm_stats_debugfs_item debugfs_entries[] = { 39 VCPU_STAT("mmio", mmio_exits), 40 VCPU_STAT("sig", signal_exits), 41 VCPU_STAT("itlb_r", itlb_real_miss_exits), 42 VCPU_STAT("itlb_v", itlb_virt_miss_exits), 43 VCPU_STAT("dtlb_r", dtlb_real_miss_exits), 44 VCPU_STAT("dtlb_v", dtlb_virt_miss_exits), 45 VCPU_STAT("sysc", syscall_exits), 46 VCPU_STAT("isi", isi_exits), 47 VCPU_STAT("dsi", dsi_exits), 48 VCPU_STAT("inst_emu", emulated_inst_exits), 49 VCPU_STAT("dec", dec_exits), 50 VCPU_STAT("ext_intr", ext_intr_exits), 51 VCPU_STAT("halt_successful_poll", halt_successful_poll), 52 VCPU_STAT("halt_attempted_poll", halt_attempted_poll), 53 VCPU_STAT("halt_poll_invalid", halt_poll_invalid), 54 VCPU_STAT("halt_wakeup", halt_wakeup), 55 VCPU_STAT("doorbell", dbell_exits), 56 VCPU_STAT("guest doorbell", gdbell_exits), 57 VCPU_STAT("halt_poll_success_ns", halt_poll_success_ns), 58 VCPU_STAT("halt_poll_fail_ns", halt_poll_fail_ns), 59 VM_STAT("remote_tlb_flush", remote_tlb_flush), 60 { NULL } 61 }; 62 63 /* TODO: use vcpu_printf() */ 64 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) 65 { 66 int i; 67 68 printk("pc: %08lx msr: %08llx\n", vcpu->arch.regs.nip, 69 vcpu->arch.shared->msr); 70 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.regs.link, 71 vcpu->arch.regs.ctr); 72 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, 73 vcpu->arch.shared->srr1); 74 75 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); 76 77 for (i = 0; i < 32; i += 4) { 78 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, 79 kvmppc_get_gpr(vcpu, i), 80 kvmppc_get_gpr(vcpu, i+1), 81 kvmppc_get_gpr(vcpu, i+2), 82 kvmppc_get_gpr(vcpu, i+3)); 83 } 84 } 85 86 #ifdef CONFIG_SPE 87 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) 88 { 89 preempt_disable(); 90 enable_kernel_spe(); 91 kvmppc_save_guest_spe(vcpu); 92 disable_kernel_spe(); 93 vcpu->arch.shadow_msr &= ~MSR_SPE; 94 preempt_enable(); 95 } 96 97 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) 98 { 99 preempt_disable(); 100 enable_kernel_spe(); 101 kvmppc_load_guest_spe(vcpu); 102 disable_kernel_spe(); 103 vcpu->arch.shadow_msr |= MSR_SPE; 104 preempt_enable(); 105 } 106 107 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 108 { 109 if (vcpu->arch.shared->msr & MSR_SPE) { 110 if (!(vcpu->arch.shadow_msr & MSR_SPE)) 111 kvmppc_vcpu_enable_spe(vcpu); 112 } else if (vcpu->arch.shadow_msr & MSR_SPE) { 113 kvmppc_vcpu_disable_spe(vcpu); 114 } 115 } 116 #else 117 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 118 { 119 } 120 #endif 121 122 /* 123 * Load up guest vcpu FP state if it's needed. 124 * It also set the MSR_FP in thread so that host know 125 * we're holding FPU, and then host can help to save 126 * guest vcpu FP state if other threads require to use FPU. 127 * This simulates an FP unavailable fault. 128 * 129 * It requires to be called with preemption disabled. 130 */ 131 static inline void kvmppc_load_guest_fp(struct kvm_vcpu *vcpu) 132 { 133 #ifdef CONFIG_PPC_FPU 134 if (!(current->thread.regs->msr & MSR_FP)) { 135 enable_kernel_fp(); 136 load_fp_state(&vcpu->arch.fp); 137 disable_kernel_fp(); 138 current->thread.fp_save_area = &vcpu->arch.fp; 139 current->thread.regs->msr |= MSR_FP; 140 } 141 #endif 142 } 143 144 /* 145 * Save guest vcpu FP state into thread. 146 * It requires to be called with preemption disabled. 147 */ 148 static inline void kvmppc_save_guest_fp(struct kvm_vcpu *vcpu) 149 { 150 #ifdef CONFIG_PPC_FPU 151 if (current->thread.regs->msr & MSR_FP) 152 giveup_fpu(current); 153 current->thread.fp_save_area = NULL; 154 #endif 155 } 156 157 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu) 158 { 159 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV) 160 /* We always treat the FP bit as enabled from the host 161 perspective, so only need to adjust the shadow MSR */ 162 vcpu->arch.shadow_msr &= ~MSR_FP; 163 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP; 164 #endif 165 } 166 167 /* 168 * Simulate AltiVec unavailable fault to load guest state 169 * from thread to AltiVec unit. 170 * It requires to be called with preemption disabled. 171 */ 172 static inline void kvmppc_load_guest_altivec(struct kvm_vcpu *vcpu) 173 { 174 #ifdef CONFIG_ALTIVEC 175 if (cpu_has_feature(CPU_FTR_ALTIVEC)) { 176 if (!(current->thread.regs->msr & MSR_VEC)) { 177 enable_kernel_altivec(); 178 load_vr_state(&vcpu->arch.vr); 179 disable_kernel_altivec(); 180 current->thread.vr_save_area = &vcpu->arch.vr; 181 current->thread.regs->msr |= MSR_VEC; 182 } 183 } 184 #endif 185 } 186 187 /* 188 * Save guest vcpu AltiVec state into thread. 189 * It requires to be called with preemption disabled. 190 */ 191 static inline void kvmppc_save_guest_altivec(struct kvm_vcpu *vcpu) 192 { 193 #ifdef CONFIG_ALTIVEC 194 if (cpu_has_feature(CPU_FTR_ALTIVEC)) { 195 if (current->thread.regs->msr & MSR_VEC) 196 giveup_altivec(current); 197 current->thread.vr_save_area = NULL; 198 } 199 #endif 200 } 201 202 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu) 203 { 204 /* Synchronize guest's desire to get debug interrupts into shadow MSR */ 205 #ifndef CONFIG_KVM_BOOKE_HV 206 vcpu->arch.shadow_msr &= ~MSR_DE; 207 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE; 208 #endif 209 210 /* Force enable debug interrupts when user space wants to debug */ 211 if (vcpu->guest_debug) { 212 #ifdef CONFIG_KVM_BOOKE_HV 213 /* 214 * Since there is no shadow MSR, sync MSR_DE into the guest 215 * visible MSR. 216 */ 217 vcpu->arch.shared->msr |= MSR_DE; 218 #else 219 vcpu->arch.shadow_msr |= MSR_DE; 220 vcpu->arch.shared->msr &= ~MSR_DE; 221 #endif 222 } 223 } 224 225 /* 226 * Helper function for "full" MSR writes. No need to call this if only 227 * EE/CE/ME/DE/RI are changing. 228 */ 229 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) 230 { 231 u32 old_msr = vcpu->arch.shared->msr; 232 233 #ifdef CONFIG_KVM_BOOKE_HV 234 new_msr |= MSR_GS; 235 #endif 236 237 vcpu->arch.shared->msr = new_msr; 238 239 kvmppc_mmu_msr_notify(vcpu, old_msr); 240 kvmppc_vcpu_sync_spe(vcpu); 241 kvmppc_vcpu_sync_fpu(vcpu); 242 kvmppc_vcpu_sync_debug(vcpu); 243 } 244 245 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, 246 unsigned int priority) 247 { 248 trace_kvm_booke_queue_irqprio(vcpu, priority); 249 set_bit(priority, &vcpu->arch.pending_exceptions); 250 } 251 252 void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu, 253 ulong dear_flags, ulong esr_flags) 254 { 255 vcpu->arch.queued_dear = dear_flags; 256 vcpu->arch.queued_esr = esr_flags; 257 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); 258 } 259 260 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, 261 ulong dear_flags, ulong esr_flags) 262 { 263 vcpu->arch.queued_dear = dear_flags; 264 vcpu->arch.queued_esr = esr_flags; 265 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE); 266 } 267 268 void kvmppc_core_queue_itlb_miss(struct kvm_vcpu *vcpu) 269 { 270 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 271 } 272 273 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong esr_flags) 274 { 275 vcpu->arch.queued_esr = esr_flags; 276 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE); 277 } 278 279 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags, 280 ulong esr_flags) 281 { 282 vcpu->arch.queued_dear = dear_flags; 283 vcpu->arch.queued_esr = esr_flags; 284 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT); 285 } 286 287 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags) 288 { 289 vcpu->arch.queued_esr = esr_flags; 290 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); 291 } 292 293 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu) 294 { 295 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 296 } 297 298 #ifdef CONFIG_ALTIVEC 299 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu) 300 { 301 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL); 302 } 303 #endif 304 305 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 306 { 307 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER); 308 } 309 310 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 311 { 312 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 313 } 314 315 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 316 { 317 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 318 } 319 320 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 321 struct kvm_interrupt *irq) 322 { 323 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL; 324 325 if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 326 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL; 327 328 kvmppc_booke_queue_irqprio(vcpu, prio); 329 } 330 331 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 332 { 333 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); 334 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions); 335 } 336 337 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu) 338 { 339 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG); 340 } 341 342 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu) 343 { 344 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions); 345 } 346 347 void kvmppc_core_queue_debug(struct kvm_vcpu *vcpu) 348 { 349 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DEBUG); 350 } 351 352 void kvmppc_core_dequeue_debug(struct kvm_vcpu *vcpu) 353 { 354 clear_bit(BOOKE_IRQPRIO_DEBUG, &vcpu->arch.pending_exceptions); 355 } 356 357 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 358 { 359 kvmppc_set_srr0(vcpu, srr0); 360 kvmppc_set_srr1(vcpu, srr1); 361 } 362 363 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 364 { 365 vcpu->arch.csrr0 = srr0; 366 vcpu->arch.csrr1 = srr1; 367 } 368 369 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 370 { 371 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) { 372 vcpu->arch.dsrr0 = srr0; 373 vcpu->arch.dsrr1 = srr1; 374 } else { 375 set_guest_csrr(vcpu, srr0, srr1); 376 } 377 } 378 379 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 380 { 381 vcpu->arch.mcsrr0 = srr0; 382 vcpu->arch.mcsrr1 = srr1; 383 } 384 385 /* Deliver the interrupt of the corresponding priority, if possible. */ 386 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, 387 unsigned int priority) 388 { 389 int allowed = 0; 390 ulong msr_mask = 0; 391 bool update_esr = false, update_dear = false, update_epr = false; 392 ulong crit_raw = vcpu->arch.shared->critical; 393 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1); 394 bool crit; 395 bool keep_irq = false; 396 enum int_class int_class; 397 ulong new_msr = vcpu->arch.shared->msr; 398 399 /* Truncate crit indicators in 32 bit mode */ 400 if (!(vcpu->arch.shared->msr & MSR_SF)) { 401 crit_raw &= 0xffffffff; 402 crit_r1 &= 0xffffffff; 403 } 404 405 /* Critical section when crit == r1 */ 406 crit = (crit_raw == crit_r1); 407 /* ... and we're in supervisor mode */ 408 crit = crit && !(vcpu->arch.shared->msr & MSR_PR); 409 410 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) { 411 priority = BOOKE_IRQPRIO_EXTERNAL; 412 keep_irq = true; 413 } 414 415 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags) 416 update_epr = true; 417 418 switch (priority) { 419 case BOOKE_IRQPRIO_DTLB_MISS: 420 case BOOKE_IRQPRIO_DATA_STORAGE: 421 case BOOKE_IRQPRIO_ALIGNMENT: 422 update_dear = true; 423 fallthrough; 424 case BOOKE_IRQPRIO_INST_STORAGE: 425 case BOOKE_IRQPRIO_PROGRAM: 426 update_esr = true; 427 fallthrough; 428 case BOOKE_IRQPRIO_ITLB_MISS: 429 case BOOKE_IRQPRIO_SYSCALL: 430 case BOOKE_IRQPRIO_FP_UNAVAIL: 431 #ifdef CONFIG_SPE_POSSIBLE 432 case BOOKE_IRQPRIO_SPE_UNAVAIL: 433 case BOOKE_IRQPRIO_SPE_FP_DATA: 434 case BOOKE_IRQPRIO_SPE_FP_ROUND: 435 #endif 436 #ifdef CONFIG_ALTIVEC 437 case BOOKE_IRQPRIO_ALTIVEC_UNAVAIL: 438 case BOOKE_IRQPRIO_ALTIVEC_ASSIST: 439 #endif 440 case BOOKE_IRQPRIO_AP_UNAVAIL: 441 allowed = 1; 442 msr_mask = MSR_CE | MSR_ME | MSR_DE; 443 int_class = INT_CLASS_NONCRIT; 444 break; 445 case BOOKE_IRQPRIO_WATCHDOG: 446 case BOOKE_IRQPRIO_CRITICAL: 447 case BOOKE_IRQPRIO_DBELL_CRIT: 448 allowed = vcpu->arch.shared->msr & MSR_CE; 449 allowed = allowed && !crit; 450 msr_mask = MSR_ME; 451 int_class = INT_CLASS_CRIT; 452 break; 453 case BOOKE_IRQPRIO_MACHINE_CHECK: 454 allowed = vcpu->arch.shared->msr & MSR_ME; 455 allowed = allowed && !crit; 456 int_class = INT_CLASS_MC; 457 break; 458 case BOOKE_IRQPRIO_DECREMENTER: 459 case BOOKE_IRQPRIO_FIT: 460 keep_irq = true; 461 fallthrough; 462 case BOOKE_IRQPRIO_EXTERNAL: 463 case BOOKE_IRQPRIO_DBELL: 464 allowed = vcpu->arch.shared->msr & MSR_EE; 465 allowed = allowed && !crit; 466 msr_mask = MSR_CE | MSR_ME | MSR_DE; 467 int_class = INT_CLASS_NONCRIT; 468 break; 469 case BOOKE_IRQPRIO_DEBUG: 470 allowed = vcpu->arch.shared->msr & MSR_DE; 471 allowed = allowed && !crit; 472 msr_mask = MSR_ME; 473 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) 474 int_class = INT_CLASS_DBG; 475 else 476 int_class = INT_CLASS_CRIT; 477 478 break; 479 } 480 481 if (allowed) { 482 switch (int_class) { 483 case INT_CLASS_NONCRIT: 484 set_guest_srr(vcpu, vcpu->arch.regs.nip, 485 vcpu->arch.shared->msr); 486 break; 487 case INT_CLASS_CRIT: 488 set_guest_csrr(vcpu, vcpu->arch.regs.nip, 489 vcpu->arch.shared->msr); 490 break; 491 case INT_CLASS_DBG: 492 set_guest_dsrr(vcpu, vcpu->arch.regs.nip, 493 vcpu->arch.shared->msr); 494 break; 495 case INT_CLASS_MC: 496 set_guest_mcsrr(vcpu, vcpu->arch.regs.nip, 497 vcpu->arch.shared->msr); 498 break; 499 } 500 501 vcpu->arch.regs.nip = vcpu->arch.ivpr | 502 vcpu->arch.ivor[priority]; 503 if (update_esr == true) 504 kvmppc_set_esr(vcpu, vcpu->arch.queued_esr); 505 if (update_dear == true) 506 kvmppc_set_dar(vcpu, vcpu->arch.queued_dear); 507 if (update_epr == true) { 508 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER) 509 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu); 510 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) { 511 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC); 512 kvmppc_mpic_set_epr(vcpu); 513 } 514 } 515 516 new_msr &= msr_mask; 517 #if defined(CONFIG_64BIT) 518 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 519 new_msr |= MSR_CM; 520 #endif 521 kvmppc_set_msr(vcpu, new_msr); 522 523 if (!keep_irq) 524 clear_bit(priority, &vcpu->arch.pending_exceptions); 525 } 526 527 #ifdef CONFIG_KVM_BOOKE_HV 528 /* 529 * If an interrupt is pending but masked, raise a guest doorbell 530 * so that we are notified when the guest enables the relevant 531 * MSR bit. 532 */ 533 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE) 534 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT); 535 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE) 536 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT); 537 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK) 538 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC); 539 #endif 540 541 return allowed; 542 } 543 544 /* 545 * Return the number of jiffies until the next timeout. If the timeout is 546 * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA 547 * because the larger value can break the timer APIs. 548 */ 549 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu) 550 { 551 u64 tb, wdt_tb, wdt_ticks = 0; 552 u64 nr_jiffies = 0; 553 u32 period = TCR_GET_WP(vcpu->arch.tcr); 554 555 wdt_tb = 1ULL << (63 - period); 556 tb = get_tb(); 557 /* 558 * The watchdog timeout will hapeen when TB bit corresponding 559 * to watchdog will toggle from 0 to 1. 560 */ 561 if (tb & wdt_tb) 562 wdt_ticks = wdt_tb; 563 564 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1)); 565 566 /* Convert timebase ticks to jiffies */ 567 nr_jiffies = wdt_ticks; 568 569 if (do_div(nr_jiffies, tb_ticks_per_jiffy)) 570 nr_jiffies++; 571 572 return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA); 573 } 574 575 static void arm_next_watchdog(struct kvm_vcpu *vcpu) 576 { 577 unsigned long nr_jiffies; 578 unsigned long flags; 579 580 /* 581 * If TSR_ENW and TSR_WIS are not set then no need to exit to 582 * userspace, so clear the KVM_REQ_WATCHDOG request. 583 */ 584 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS)) 585 kvm_clear_request(KVM_REQ_WATCHDOG, vcpu); 586 587 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags); 588 nr_jiffies = watchdog_next_timeout(vcpu); 589 /* 590 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA 591 * then do not run the watchdog timer as this can break timer APIs. 592 */ 593 if (nr_jiffies < NEXT_TIMER_MAX_DELTA) 594 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies); 595 else 596 del_timer(&vcpu->arch.wdt_timer); 597 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags); 598 } 599 600 void kvmppc_watchdog_func(struct timer_list *t) 601 { 602 struct kvm_vcpu *vcpu = from_timer(vcpu, t, arch.wdt_timer); 603 u32 tsr, new_tsr; 604 int final; 605 606 do { 607 new_tsr = tsr = vcpu->arch.tsr; 608 final = 0; 609 610 /* Time out event */ 611 if (tsr & TSR_ENW) { 612 if (tsr & TSR_WIS) 613 final = 1; 614 else 615 new_tsr = tsr | TSR_WIS; 616 } else { 617 new_tsr = tsr | TSR_ENW; 618 } 619 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr); 620 621 if (new_tsr & TSR_WIS) { 622 smp_wmb(); 623 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 624 kvm_vcpu_kick(vcpu); 625 } 626 627 /* 628 * If this is final watchdog expiry and some action is required 629 * then exit to userspace. 630 */ 631 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) && 632 vcpu->arch.watchdog_enabled) { 633 smp_wmb(); 634 kvm_make_request(KVM_REQ_WATCHDOG, vcpu); 635 kvm_vcpu_kick(vcpu); 636 } 637 638 /* 639 * Stop running the watchdog timer after final expiration to 640 * prevent the host from being flooded with timers if the 641 * guest sets a short period. 642 * Timers will resume when TSR/TCR is updated next time. 643 */ 644 if (!final) 645 arm_next_watchdog(vcpu); 646 } 647 648 static void update_timer_ints(struct kvm_vcpu *vcpu) 649 { 650 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) 651 kvmppc_core_queue_dec(vcpu); 652 else 653 kvmppc_core_dequeue_dec(vcpu); 654 655 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) 656 kvmppc_core_queue_watchdog(vcpu); 657 else 658 kvmppc_core_dequeue_watchdog(vcpu); 659 } 660 661 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu) 662 { 663 unsigned long *pending = &vcpu->arch.pending_exceptions; 664 unsigned int priority; 665 666 priority = __ffs(*pending); 667 while (priority < BOOKE_IRQPRIO_MAX) { 668 if (kvmppc_booke_irqprio_deliver(vcpu, priority)) 669 break; 670 671 priority = find_next_bit(pending, 672 BITS_PER_BYTE * sizeof(*pending), 673 priority + 1); 674 } 675 676 /* Tell the guest about our interrupt status */ 677 vcpu->arch.shared->int_pending = !!*pending; 678 } 679 680 /* Check pending exceptions and deliver one, if possible. */ 681 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 682 { 683 int r = 0; 684 WARN_ON_ONCE(!irqs_disabled()); 685 686 kvmppc_core_check_exceptions(vcpu); 687 688 if (kvm_request_pending(vcpu)) { 689 /* Exception delivery raised request; start over */ 690 return 1; 691 } 692 693 if (vcpu->arch.shared->msr & MSR_WE) { 694 local_irq_enable(); 695 kvm_vcpu_block(vcpu); 696 kvm_clear_request(KVM_REQ_UNHALT, vcpu); 697 hard_irq_disable(); 698 699 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS); 700 r = 1; 701 }; 702 703 return r; 704 } 705 706 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 707 { 708 int r = 1; /* Indicate we want to get back into the guest */ 709 710 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) 711 update_timer_ints(vcpu); 712 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 713 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) 714 kvmppc_core_flush_tlb(vcpu); 715 #endif 716 717 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) { 718 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG; 719 r = 0; 720 } 721 722 if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) { 723 vcpu->run->epr.epr = 0; 724 vcpu->arch.epr_needed = true; 725 vcpu->run->exit_reason = KVM_EXIT_EPR; 726 r = 0; 727 } 728 729 return r; 730 } 731 732 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 733 { 734 int ret, s; 735 struct debug_reg debug; 736 737 if (!vcpu->arch.sane) { 738 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 739 return -EINVAL; 740 } 741 742 s = kvmppc_prepare_to_enter(vcpu); 743 if (s <= 0) { 744 ret = s; 745 goto out; 746 } 747 /* interrupts now hard-disabled */ 748 749 #ifdef CONFIG_PPC_FPU 750 /* Save userspace FPU state in stack */ 751 enable_kernel_fp(); 752 753 /* 754 * Since we can't trap on MSR_FP in GS-mode, we consider the guest 755 * as always using the FPU. 756 */ 757 kvmppc_load_guest_fp(vcpu); 758 #endif 759 760 #ifdef CONFIG_ALTIVEC 761 /* Save userspace AltiVec state in stack */ 762 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 763 enable_kernel_altivec(); 764 /* 765 * Since we can't trap on MSR_VEC in GS-mode, we consider the guest 766 * as always using the AltiVec. 767 */ 768 kvmppc_load_guest_altivec(vcpu); 769 #endif 770 771 /* Switch to guest debug context */ 772 debug = vcpu->arch.dbg_reg; 773 switch_booke_debug_regs(&debug); 774 debug = current->thread.debug; 775 current->thread.debug = vcpu->arch.dbg_reg; 776 777 vcpu->arch.pgdir = vcpu->kvm->mm->pgd; 778 kvmppc_fix_ee_before_entry(); 779 780 ret = __kvmppc_vcpu_run(kvm_run, vcpu); 781 782 /* No need for guest_exit. It's done in handle_exit. 783 We also get here with interrupts enabled. */ 784 785 /* Switch back to user space debug context */ 786 switch_booke_debug_regs(&debug); 787 current->thread.debug = debug; 788 789 #ifdef CONFIG_PPC_FPU 790 kvmppc_save_guest_fp(vcpu); 791 #endif 792 793 #ifdef CONFIG_ALTIVEC 794 kvmppc_save_guest_altivec(vcpu); 795 #endif 796 797 out: 798 vcpu->mode = OUTSIDE_GUEST_MODE; 799 return ret; 800 } 801 802 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) 803 { 804 enum emulation_result er; 805 806 er = kvmppc_emulate_instruction(run, vcpu); 807 switch (er) { 808 case EMULATE_DONE: 809 /* don't overwrite subtypes, just account kvm_stats */ 810 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS); 811 /* Future optimization: only reload non-volatiles if 812 * they were actually modified by emulation. */ 813 return RESUME_GUEST_NV; 814 815 case EMULATE_AGAIN: 816 return RESUME_GUEST; 817 818 case EMULATE_FAIL: 819 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 820 __func__, vcpu->arch.regs.nip, vcpu->arch.last_inst); 821 /* For debugging, encode the failing instruction and 822 * report it to userspace. */ 823 run->hw.hardware_exit_reason = ~0ULL << 32; 824 run->hw.hardware_exit_reason |= vcpu->arch.last_inst; 825 kvmppc_core_queue_program(vcpu, ESR_PIL); 826 return RESUME_HOST; 827 828 case EMULATE_EXIT_USER: 829 return RESUME_HOST; 830 831 default: 832 BUG(); 833 } 834 } 835 836 static int kvmppc_handle_debug(struct kvm_run *run, struct kvm_vcpu *vcpu) 837 { 838 struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg); 839 u32 dbsr = vcpu->arch.dbsr; 840 841 if (vcpu->guest_debug == 0) { 842 /* 843 * Debug resources belong to Guest. 844 * Imprecise debug event is not injected 845 */ 846 if (dbsr & DBSR_IDE) { 847 dbsr &= ~DBSR_IDE; 848 if (!dbsr) 849 return RESUME_GUEST; 850 } 851 852 if (dbsr && (vcpu->arch.shared->msr & MSR_DE) && 853 (vcpu->arch.dbg_reg.dbcr0 & DBCR0_IDM)) 854 kvmppc_core_queue_debug(vcpu); 855 856 /* Inject a program interrupt if trap debug is not allowed */ 857 if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE)) 858 kvmppc_core_queue_program(vcpu, ESR_PTR); 859 860 return RESUME_GUEST; 861 } 862 863 /* 864 * Debug resource owned by userspace. 865 * Clear guest dbsr (vcpu->arch.dbsr) 866 */ 867 vcpu->arch.dbsr = 0; 868 run->debug.arch.status = 0; 869 run->debug.arch.address = vcpu->arch.regs.nip; 870 871 if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) { 872 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT; 873 } else { 874 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W)) 875 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE; 876 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R)) 877 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ; 878 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W)) 879 run->debug.arch.address = dbg_reg->dac1; 880 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W)) 881 run->debug.arch.address = dbg_reg->dac2; 882 } 883 884 return RESUME_HOST; 885 } 886 887 static void kvmppc_fill_pt_regs(struct pt_regs *regs) 888 { 889 ulong r1, ip, msr, lr; 890 891 asm("mr %0, 1" : "=r"(r1)); 892 asm("mflr %0" : "=r"(lr)); 893 asm("mfmsr %0" : "=r"(msr)); 894 asm("bl 1f; 1: mflr %0" : "=r"(ip)); 895 896 memset(regs, 0, sizeof(*regs)); 897 regs->gpr[1] = r1; 898 regs->nip = ip; 899 regs->msr = msr; 900 regs->link = lr; 901 } 902 903 /* 904 * For interrupts needed to be handled by host interrupt handlers, 905 * corresponding host handler are called from here in similar way 906 * (but not exact) as they are called from low level handler 907 * (such as from arch/powerpc/kernel/head_fsl_booke.S). 908 */ 909 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu, 910 unsigned int exit_nr) 911 { 912 struct pt_regs regs; 913 914 switch (exit_nr) { 915 case BOOKE_INTERRUPT_EXTERNAL: 916 kvmppc_fill_pt_regs(®s); 917 do_IRQ(®s); 918 break; 919 case BOOKE_INTERRUPT_DECREMENTER: 920 kvmppc_fill_pt_regs(®s); 921 timer_interrupt(®s); 922 break; 923 #if defined(CONFIG_PPC_DOORBELL) 924 case BOOKE_INTERRUPT_DOORBELL: 925 kvmppc_fill_pt_regs(®s); 926 doorbell_exception(®s); 927 break; 928 #endif 929 case BOOKE_INTERRUPT_MACHINE_CHECK: 930 /* FIXME */ 931 break; 932 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 933 kvmppc_fill_pt_regs(®s); 934 performance_monitor_exception(®s); 935 break; 936 case BOOKE_INTERRUPT_WATCHDOG: 937 kvmppc_fill_pt_regs(®s); 938 #ifdef CONFIG_BOOKE_WDT 939 WatchdogException(®s); 940 #else 941 unknown_exception(®s); 942 #endif 943 break; 944 case BOOKE_INTERRUPT_CRITICAL: 945 kvmppc_fill_pt_regs(®s); 946 unknown_exception(®s); 947 break; 948 case BOOKE_INTERRUPT_DEBUG: 949 /* Save DBSR before preemption is enabled */ 950 vcpu->arch.dbsr = mfspr(SPRN_DBSR); 951 kvmppc_clear_dbsr(); 952 break; 953 } 954 } 955 956 static int kvmppc_resume_inst_load(struct kvm_run *run, struct kvm_vcpu *vcpu, 957 enum emulation_result emulated, u32 last_inst) 958 { 959 switch (emulated) { 960 case EMULATE_AGAIN: 961 return RESUME_GUEST; 962 963 case EMULATE_FAIL: 964 pr_debug("%s: load instruction from guest address %lx failed\n", 965 __func__, vcpu->arch.regs.nip); 966 /* For debugging, encode the failing instruction and 967 * report it to userspace. */ 968 run->hw.hardware_exit_reason = ~0ULL << 32; 969 run->hw.hardware_exit_reason |= last_inst; 970 kvmppc_core_queue_program(vcpu, ESR_PIL); 971 return RESUME_HOST; 972 973 default: 974 BUG(); 975 } 976 } 977 978 /** 979 * kvmppc_handle_exit 980 * 981 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) 982 */ 983 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, 984 unsigned int exit_nr) 985 { 986 int r = RESUME_HOST; 987 int s; 988 int idx; 989 u32 last_inst = KVM_INST_FETCH_FAILED; 990 enum emulation_result emulated = EMULATE_DONE; 991 992 /* update before a new last_exit_type is rewritten */ 993 kvmppc_update_timing_stats(vcpu); 994 995 /* restart interrupts if they were meant for the host */ 996 kvmppc_restart_interrupt(vcpu, exit_nr); 997 998 /* 999 * get last instruction before being preempted 1000 * TODO: for e6500 check also BOOKE_INTERRUPT_LRAT_ERROR & ESR_DATA 1001 */ 1002 switch (exit_nr) { 1003 case BOOKE_INTERRUPT_DATA_STORAGE: 1004 case BOOKE_INTERRUPT_DTLB_MISS: 1005 case BOOKE_INTERRUPT_HV_PRIV: 1006 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst); 1007 break; 1008 case BOOKE_INTERRUPT_PROGRAM: 1009 /* SW breakpoints arrive as illegal instructions on HV */ 1010 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) 1011 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst); 1012 break; 1013 default: 1014 break; 1015 } 1016 1017 trace_kvm_exit(exit_nr, vcpu); 1018 guest_exit_irqoff(); 1019 1020 local_irq_enable(); 1021 1022 run->exit_reason = KVM_EXIT_UNKNOWN; 1023 run->ready_for_interrupt_injection = 1; 1024 1025 if (emulated != EMULATE_DONE) { 1026 r = kvmppc_resume_inst_load(run, vcpu, emulated, last_inst); 1027 goto out; 1028 } 1029 1030 switch (exit_nr) { 1031 case BOOKE_INTERRUPT_MACHINE_CHECK: 1032 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); 1033 kvmppc_dump_vcpu(vcpu); 1034 /* For debugging, send invalid exit reason to user space */ 1035 run->hw.hardware_exit_reason = ~1ULL << 32; 1036 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR); 1037 r = RESUME_HOST; 1038 break; 1039 1040 case BOOKE_INTERRUPT_EXTERNAL: 1041 kvmppc_account_exit(vcpu, EXT_INTR_EXITS); 1042 r = RESUME_GUEST; 1043 break; 1044 1045 case BOOKE_INTERRUPT_DECREMENTER: 1046 kvmppc_account_exit(vcpu, DEC_EXITS); 1047 r = RESUME_GUEST; 1048 break; 1049 1050 case BOOKE_INTERRUPT_WATCHDOG: 1051 r = RESUME_GUEST; 1052 break; 1053 1054 case BOOKE_INTERRUPT_DOORBELL: 1055 kvmppc_account_exit(vcpu, DBELL_EXITS); 1056 r = RESUME_GUEST; 1057 break; 1058 1059 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT: 1060 kvmppc_account_exit(vcpu, GDBELL_EXITS); 1061 1062 /* 1063 * We are here because there is a pending guest interrupt 1064 * which could not be delivered as MSR_CE or MSR_ME was not 1065 * set. Once we break from here we will retry delivery. 1066 */ 1067 r = RESUME_GUEST; 1068 break; 1069 1070 case BOOKE_INTERRUPT_GUEST_DBELL: 1071 kvmppc_account_exit(vcpu, GDBELL_EXITS); 1072 1073 /* 1074 * We are here because there is a pending guest interrupt 1075 * which could not be delivered as MSR_EE was not set. Once 1076 * we break from here we will retry delivery. 1077 */ 1078 r = RESUME_GUEST; 1079 break; 1080 1081 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 1082 r = RESUME_GUEST; 1083 break; 1084 1085 case BOOKE_INTERRUPT_HV_PRIV: 1086 r = emulation_exit(run, vcpu); 1087 break; 1088 1089 case BOOKE_INTERRUPT_PROGRAM: 1090 if ((vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) && 1091 (last_inst == KVMPPC_INST_SW_BREAKPOINT)) { 1092 /* 1093 * We are here because of an SW breakpoint instr, 1094 * so lets return to host to handle. 1095 */ 1096 r = kvmppc_handle_debug(run, vcpu); 1097 run->exit_reason = KVM_EXIT_DEBUG; 1098 kvmppc_account_exit(vcpu, DEBUG_EXITS); 1099 break; 1100 } 1101 1102 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) { 1103 /* 1104 * Program traps generated by user-level software must 1105 * be handled by the guest kernel. 1106 * 1107 * In GS mode, hypervisor privileged instructions trap 1108 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are 1109 * actual program interrupts, handled by the guest. 1110 */ 1111 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr); 1112 r = RESUME_GUEST; 1113 kvmppc_account_exit(vcpu, USR_PR_INST); 1114 break; 1115 } 1116 1117 r = emulation_exit(run, vcpu); 1118 break; 1119 1120 case BOOKE_INTERRUPT_FP_UNAVAIL: 1121 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 1122 kvmppc_account_exit(vcpu, FP_UNAVAIL); 1123 r = RESUME_GUEST; 1124 break; 1125 1126 #ifdef CONFIG_SPE 1127 case BOOKE_INTERRUPT_SPE_UNAVAIL: { 1128 if (vcpu->arch.shared->msr & MSR_SPE) 1129 kvmppc_vcpu_enable_spe(vcpu); 1130 else 1131 kvmppc_booke_queue_irqprio(vcpu, 1132 BOOKE_IRQPRIO_SPE_UNAVAIL); 1133 r = RESUME_GUEST; 1134 break; 1135 } 1136 1137 case BOOKE_INTERRUPT_SPE_FP_DATA: 1138 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA); 1139 r = RESUME_GUEST; 1140 break; 1141 1142 case BOOKE_INTERRUPT_SPE_FP_ROUND: 1143 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); 1144 r = RESUME_GUEST; 1145 break; 1146 #elif defined(CONFIG_SPE_POSSIBLE) 1147 case BOOKE_INTERRUPT_SPE_UNAVAIL: 1148 /* 1149 * Guest wants SPE, but host kernel doesn't support it. Send 1150 * an "unimplemented operation" program check to the guest. 1151 */ 1152 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); 1153 r = RESUME_GUEST; 1154 break; 1155 1156 /* 1157 * These really should never happen without CONFIG_SPE, 1158 * as we should never enable the real MSR[SPE] in the guest. 1159 */ 1160 case BOOKE_INTERRUPT_SPE_FP_DATA: 1161 case BOOKE_INTERRUPT_SPE_FP_ROUND: 1162 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", 1163 __func__, exit_nr, vcpu->arch.regs.nip); 1164 run->hw.hardware_exit_reason = exit_nr; 1165 r = RESUME_HOST; 1166 break; 1167 #endif /* CONFIG_SPE_POSSIBLE */ 1168 1169 /* 1170 * On cores with Vector category, KVM is loaded only if CONFIG_ALTIVEC, 1171 * see kvmppc_core_check_processor_compat(). 1172 */ 1173 #ifdef CONFIG_ALTIVEC 1174 case BOOKE_INTERRUPT_ALTIVEC_UNAVAIL: 1175 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL); 1176 r = RESUME_GUEST; 1177 break; 1178 1179 case BOOKE_INTERRUPT_ALTIVEC_ASSIST: 1180 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_ASSIST); 1181 r = RESUME_GUEST; 1182 break; 1183 #endif 1184 1185 case BOOKE_INTERRUPT_DATA_STORAGE: 1186 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear, 1187 vcpu->arch.fault_esr); 1188 kvmppc_account_exit(vcpu, DSI_EXITS); 1189 r = RESUME_GUEST; 1190 break; 1191 1192 case BOOKE_INTERRUPT_INST_STORAGE: 1193 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr); 1194 kvmppc_account_exit(vcpu, ISI_EXITS); 1195 r = RESUME_GUEST; 1196 break; 1197 1198 case BOOKE_INTERRUPT_ALIGNMENT: 1199 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear, 1200 vcpu->arch.fault_esr); 1201 r = RESUME_GUEST; 1202 break; 1203 1204 #ifdef CONFIG_KVM_BOOKE_HV 1205 case BOOKE_INTERRUPT_HV_SYSCALL: 1206 if (!(vcpu->arch.shared->msr & MSR_PR)) { 1207 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1208 } else { 1209 /* 1210 * hcall from guest userspace -- send privileged 1211 * instruction program check. 1212 */ 1213 kvmppc_core_queue_program(vcpu, ESR_PPR); 1214 } 1215 1216 r = RESUME_GUEST; 1217 break; 1218 #else 1219 case BOOKE_INTERRUPT_SYSCALL: 1220 if (!(vcpu->arch.shared->msr & MSR_PR) && 1221 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 1222 /* KVM PV hypercalls */ 1223 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1224 r = RESUME_GUEST; 1225 } else { 1226 /* Guest syscalls */ 1227 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL); 1228 } 1229 kvmppc_account_exit(vcpu, SYSCALL_EXITS); 1230 r = RESUME_GUEST; 1231 break; 1232 #endif 1233 1234 case BOOKE_INTERRUPT_DTLB_MISS: { 1235 unsigned long eaddr = vcpu->arch.fault_dear; 1236 int gtlb_index; 1237 gpa_t gpaddr; 1238 gfn_t gfn; 1239 1240 #ifdef CONFIG_KVM_E500V2 1241 if (!(vcpu->arch.shared->msr & MSR_PR) && 1242 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1243 kvmppc_map_magic(vcpu); 1244 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1245 r = RESUME_GUEST; 1246 1247 break; 1248 } 1249 #endif 1250 1251 /* Check the guest TLB. */ 1252 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 1253 if (gtlb_index < 0) { 1254 /* The guest didn't have a mapping for it. */ 1255 kvmppc_core_queue_dtlb_miss(vcpu, 1256 vcpu->arch.fault_dear, 1257 vcpu->arch.fault_esr); 1258 kvmppc_mmu_dtlb_miss(vcpu); 1259 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); 1260 r = RESUME_GUEST; 1261 break; 1262 } 1263 1264 idx = srcu_read_lock(&vcpu->kvm->srcu); 1265 1266 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1267 gfn = gpaddr >> PAGE_SHIFT; 1268 1269 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1270 /* The guest TLB had a mapping, but the shadow TLB 1271 * didn't, and it is RAM. This could be because: 1272 * a) the entry is mapping the host kernel, or 1273 * b) the guest used a large mapping which we're faking 1274 * Either way, we need to satisfy the fault without 1275 * invoking the guest. */ 1276 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1277 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1278 r = RESUME_GUEST; 1279 } else { 1280 /* Guest has mapped and accessed a page which is not 1281 * actually RAM. */ 1282 vcpu->arch.paddr_accessed = gpaddr; 1283 vcpu->arch.vaddr_accessed = eaddr; 1284 r = kvmppc_emulate_mmio(run, vcpu); 1285 kvmppc_account_exit(vcpu, MMIO_EXITS); 1286 } 1287 1288 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1289 break; 1290 } 1291 1292 case BOOKE_INTERRUPT_ITLB_MISS: { 1293 unsigned long eaddr = vcpu->arch.regs.nip; 1294 gpa_t gpaddr; 1295 gfn_t gfn; 1296 int gtlb_index; 1297 1298 r = RESUME_GUEST; 1299 1300 /* Check the guest TLB. */ 1301 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 1302 if (gtlb_index < 0) { 1303 /* The guest didn't have a mapping for it. */ 1304 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 1305 kvmppc_mmu_itlb_miss(vcpu); 1306 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); 1307 break; 1308 } 1309 1310 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); 1311 1312 idx = srcu_read_lock(&vcpu->kvm->srcu); 1313 1314 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1315 gfn = gpaddr >> PAGE_SHIFT; 1316 1317 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1318 /* The guest TLB had a mapping, but the shadow TLB 1319 * didn't. This could be because: 1320 * a) the entry is mapping the host kernel, or 1321 * b) the guest used a large mapping which we're faking 1322 * Either way, we need to satisfy the fault without 1323 * invoking the guest. */ 1324 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1325 } else { 1326 /* Guest mapped and leaped at non-RAM! */ 1327 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); 1328 } 1329 1330 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1331 break; 1332 } 1333 1334 case BOOKE_INTERRUPT_DEBUG: { 1335 r = kvmppc_handle_debug(run, vcpu); 1336 if (r == RESUME_HOST) 1337 run->exit_reason = KVM_EXIT_DEBUG; 1338 kvmppc_account_exit(vcpu, DEBUG_EXITS); 1339 break; 1340 } 1341 1342 default: 1343 printk(KERN_EMERG "exit_nr %d\n", exit_nr); 1344 BUG(); 1345 } 1346 1347 out: 1348 /* 1349 * To avoid clobbering exit_reason, only check for signals if we 1350 * aren't already exiting to userspace for some other reason. 1351 */ 1352 if (!(r & RESUME_HOST)) { 1353 s = kvmppc_prepare_to_enter(vcpu); 1354 if (s <= 0) 1355 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); 1356 else { 1357 /* interrupts now hard-disabled */ 1358 kvmppc_fix_ee_before_entry(); 1359 kvmppc_load_guest_fp(vcpu); 1360 kvmppc_load_guest_altivec(vcpu); 1361 } 1362 } 1363 1364 return r; 1365 } 1366 1367 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr) 1368 { 1369 u32 old_tsr = vcpu->arch.tsr; 1370 1371 vcpu->arch.tsr = new_tsr; 1372 1373 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS)) 1374 arm_next_watchdog(vcpu); 1375 1376 update_timer_ints(vcpu); 1377 } 1378 1379 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 1380 { 1381 /* setup watchdog timer once */ 1382 spin_lock_init(&vcpu->arch.wdt_lock); 1383 timer_setup(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 0); 1384 1385 /* 1386 * Clear DBSR.MRR to avoid guest debug interrupt as 1387 * this is of host interest 1388 */ 1389 mtspr(SPRN_DBSR, DBSR_MRR); 1390 return 0; 1391 } 1392 1393 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 1394 { 1395 del_timer_sync(&vcpu->arch.wdt_timer); 1396 } 1397 1398 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1399 { 1400 int i; 1401 1402 vcpu_load(vcpu); 1403 1404 regs->pc = vcpu->arch.regs.nip; 1405 regs->cr = kvmppc_get_cr(vcpu); 1406 regs->ctr = vcpu->arch.regs.ctr; 1407 regs->lr = vcpu->arch.regs.link; 1408 regs->xer = kvmppc_get_xer(vcpu); 1409 regs->msr = vcpu->arch.shared->msr; 1410 regs->srr0 = kvmppc_get_srr0(vcpu); 1411 regs->srr1 = kvmppc_get_srr1(vcpu); 1412 regs->pid = vcpu->arch.pid; 1413 regs->sprg0 = kvmppc_get_sprg0(vcpu); 1414 regs->sprg1 = kvmppc_get_sprg1(vcpu); 1415 regs->sprg2 = kvmppc_get_sprg2(vcpu); 1416 regs->sprg3 = kvmppc_get_sprg3(vcpu); 1417 regs->sprg4 = kvmppc_get_sprg4(vcpu); 1418 regs->sprg5 = kvmppc_get_sprg5(vcpu); 1419 regs->sprg6 = kvmppc_get_sprg6(vcpu); 1420 regs->sprg7 = kvmppc_get_sprg7(vcpu); 1421 1422 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1423 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 1424 1425 vcpu_put(vcpu); 1426 return 0; 1427 } 1428 1429 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1430 { 1431 int i; 1432 1433 vcpu_load(vcpu); 1434 1435 vcpu->arch.regs.nip = regs->pc; 1436 kvmppc_set_cr(vcpu, regs->cr); 1437 vcpu->arch.regs.ctr = regs->ctr; 1438 vcpu->arch.regs.link = regs->lr; 1439 kvmppc_set_xer(vcpu, regs->xer); 1440 kvmppc_set_msr(vcpu, regs->msr); 1441 kvmppc_set_srr0(vcpu, regs->srr0); 1442 kvmppc_set_srr1(vcpu, regs->srr1); 1443 kvmppc_set_pid(vcpu, regs->pid); 1444 kvmppc_set_sprg0(vcpu, regs->sprg0); 1445 kvmppc_set_sprg1(vcpu, regs->sprg1); 1446 kvmppc_set_sprg2(vcpu, regs->sprg2); 1447 kvmppc_set_sprg3(vcpu, regs->sprg3); 1448 kvmppc_set_sprg4(vcpu, regs->sprg4); 1449 kvmppc_set_sprg5(vcpu, regs->sprg5); 1450 kvmppc_set_sprg6(vcpu, regs->sprg6); 1451 kvmppc_set_sprg7(vcpu, regs->sprg7); 1452 1453 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1454 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 1455 1456 vcpu_put(vcpu); 1457 return 0; 1458 } 1459 1460 static void get_sregs_base(struct kvm_vcpu *vcpu, 1461 struct kvm_sregs *sregs) 1462 { 1463 u64 tb = get_tb(); 1464 1465 sregs->u.e.features |= KVM_SREGS_E_BASE; 1466 1467 sregs->u.e.csrr0 = vcpu->arch.csrr0; 1468 sregs->u.e.csrr1 = vcpu->arch.csrr1; 1469 sregs->u.e.mcsr = vcpu->arch.mcsr; 1470 sregs->u.e.esr = kvmppc_get_esr(vcpu); 1471 sregs->u.e.dear = kvmppc_get_dar(vcpu); 1472 sregs->u.e.tsr = vcpu->arch.tsr; 1473 sregs->u.e.tcr = vcpu->arch.tcr; 1474 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb); 1475 sregs->u.e.tb = tb; 1476 sregs->u.e.vrsave = vcpu->arch.vrsave; 1477 } 1478 1479 static int set_sregs_base(struct kvm_vcpu *vcpu, 1480 struct kvm_sregs *sregs) 1481 { 1482 if (!(sregs->u.e.features & KVM_SREGS_E_BASE)) 1483 return 0; 1484 1485 vcpu->arch.csrr0 = sregs->u.e.csrr0; 1486 vcpu->arch.csrr1 = sregs->u.e.csrr1; 1487 vcpu->arch.mcsr = sregs->u.e.mcsr; 1488 kvmppc_set_esr(vcpu, sregs->u.e.esr); 1489 kvmppc_set_dar(vcpu, sregs->u.e.dear); 1490 vcpu->arch.vrsave = sregs->u.e.vrsave; 1491 kvmppc_set_tcr(vcpu, sregs->u.e.tcr); 1492 1493 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) { 1494 vcpu->arch.dec = sregs->u.e.dec; 1495 kvmppc_emulate_dec(vcpu); 1496 } 1497 1498 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) 1499 kvmppc_set_tsr(vcpu, sregs->u.e.tsr); 1500 1501 return 0; 1502 } 1503 1504 static void get_sregs_arch206(struct kvm_vcpu *vcpu, 1505 struct kvm_sregs *sregs) 1506 { 1507 sregs->u.e.features |= KVM_SREGS_E_ARCH206; 1508 1509 sregs->u.e.pir = vcpu->vcpu_id; 1510 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0; 1511 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1; 1512 sregs->u.e.decar = vcpu->arch.decar; 1513 sregs->u.e.ivpr = vcpu->arch.ivpr; 1514 } 1515 1516 static int set_sregs_arch206(struct kvm_vcpu *vcpu, 1517 struct kvm_sregs *sregs) 1518 { 1519 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206)) 1520 return 0; 1521 1522 if (sregs->u.e.pir != vcpu->vcpu_id) 1523 return -EINVAL; 1524 1525 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0; 1526 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1; 1527 vcpu->arch.decar = sregs->u.e.decar; 1528 vcpu->arch.ivpr = sregs->u.e.ivpr; 1529 1530 return 0; 1531 } 1532 1533 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1534 { 1535 sregs->u.e.features |= KVM_SREGS_E_IVOR; 1536 1537 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; 1538 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; 1539 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; 1540 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; 1541 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; 1542 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; 1543 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; 1544 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; 1545 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; 1546 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; 1547 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; 1548 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; 1549 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; 1550 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; 1551 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; 1552 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; 1553 return 0; 1554 } 1555 1556 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1557 { 1558 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR)) 1559 return 0; 1560 1561 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0]; 1562 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1]; 1563 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2]; 1564 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3]; 1565 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4]; 1566 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5]; 1567 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6]; 1568 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7]; 1569 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8]; 1570 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9]; 1571 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10]; 1572 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11]; 1573 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12]; 1574 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13]; 1575 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14]; 1576 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15]; 1577 1578 return 0; 1579 } 1580 1581 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 1582 struct kvm_sregs *sregs) 1583 { 1584 int ret; 1585 1586 vcpu_load(vcpu); 1587 1588 sregs->pvr = vcpu->arch.pvr; 1589 1590 get_sregs_base(vcpu, sregs); 1591 get_sregs_arch206(vcpu, sregs); 1592 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs); 1593 1594 vcpu_put(vcpu); 1595 return ret; 1596 } 1597 1598 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 1599 struct kvm_sregs *sregs) 1600 { 1601 int ret = -EINVAL; 1602 1603 vcpu_load(vcpu); 1604 if (vcpu->arch.pvr != sregs->pvr) 1605 goto out; 1606 1607 ret = set_sregs_base(vcpu, sregs); 1608 if (ret < 0) 1609 goto out; 1610 1611 ret = set_sregs_arch206(vcpu, sregs); 1612 if (ret < 0) 1613 goto out; 1614 1615 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs); 1616 1617 out: 1618 vcpu_put(vcpu); 1619 return ret; 1620 } 1621 1622 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, 1623 union kvmppc_one_reg *val) 1624 { 1625 int r = 0; 1626 1627 switch (id) { 1628 case KVM_REG_PPC_IAC1: 1629 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac1); 1630 break; 1631 case KVM_REG_PPC_IAC2: 1632 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac2); 1633 break; 1634 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1635 case KVM_REG_PPC_IAC3: 1636 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac3); 1637 break; 1638 case KVM_REG_PPC_IAC4: 1639 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac4); 1640 break; 1641 #endif 1642 case KVM_REG_PPC_DAC1: 1643 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac1); 1644 break; 1645 case KVM_REG_PPC_DAC2: 1646 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac2); 1647 break; 1648 case KVM_REG_PPC_EPR: { 1649 u32 epr = kvmppc_get_epr(vcpu); 1650 *val = get_reg_val(id, epr); 1651 break; 1652 } 1653 #if defined(CONFIG_64BIT) 1654 case KVM_REG_PPC_EPCR: 1655 *val = get_reg_val(id, vcpu->arch.epcr); 1656 break; 1657 #endif 1658 case KVM_REG_PPC_TCR: 1659 *val = get_reg_val(id, vcpu->arch.tcr); 1660 break; 1661 case KVM_REG_PPC_TSR: 1662 *val = get_reg_val(id, vcpu->arch.tsr); 1663 break; 1664 case KVM_REG_PPC_DEBUG_INST: 1665 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 1666 break; 1667 case KVM_REG_PPC_VRSAVE: 1668 *val = get_reg_val(id, vcpu->arch.vrsave); 1669 break; 1670 default: 1671 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val); 1672 break; 1673 } 1674 1675 return r; 1676 } 1677 1678 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, 1679 union kvmppc_one_reg *val) 1680 { 1681 int r = 0; 1682 1683 switch (id) { 1684 case KVM_REG_PPC_IAC1: 1685 vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val); 1686 break; 1687 case KVM_REG_PPC_IAC2: 1688 vcpu->arch.dbg_reg.iac2 = set_reg_val(id, *val); 1689 break; 1690 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1691 case KVM_REG_PPC_IAC3: 1692 vcpu->arch.dbg_reg.iac3 = set_reg_val(id, *val); 1693 break; 1694 case KVM_REG_PPC_IAC4: 1695 vcpu->arch.dbg_reg.iac4 = set_reg_val(id, *val); 1696 break; 1697 #endif 1698 case KVM_REG_PPC_DAC1: 1699 vcpu->arch.dbg_reg.dac1 = set_reg_val(id, *val); 1700 break; 1701 case KVM_REG_PPC_DAC2: 1702 vcpu->arch.dbg_reg.dac2 = set_reg_val(id, *val); 1703 break; 1704 case KVM_REG_PPC_EPR: { 1705 u32 new_epr = set_reg_val(id, *val); 1706 kvmppc_set_epr(vcpu, new_epr); 1707 break; 1708 } 1709 #if defined(CONFIG_64BIT) 1710 case KVM_REG_PPC_EPCR: { 1711 u32 new_epcr = set_reg_val(id, *val); 1712 kvmppc_set_epcr(vcpu, new_epcr); 1713 break; 1714 } 1715 #endif 1716 case KVM_REG_PPC_OR_TSR: { 1717 u32 tsr_bits = set_reg_val(id, *val); 1718 kvmppc_set_tsr_bits(vcpu, tsr_bits); 1719 break; 1720 } 1721 case KVM_REG_PPC_CLEAR_TSR: { 1722 u32 tsr_bits = set_reg_val(id, *val); 1723 kvmppc_clr_tsr_bits(vcpu, tsr_bits); 1724 break; 1725 } 1726 case KVM_REG_PPC_TSR: { 1727 u32 tsr = set_reg_val(id, *val); 1728 kvmppc_set_tsr(vcpu, tsr); 1729 break; 1730 } 1731 case KVM_REG_PPC_TCR: { 1732 u32 tcr = set_reg_val(id, *val); 1733 kvmppc_set_tcr(vcpu, tcr); 1734 break; 1735 } 1736 case KVM_REG_PPC_VRSAVE: 1737 vcpu->arch.vrsave = set_reg_val(id, *val); 1738 break; 1739 default: 1740 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val); 1741 break; 1742 } 1743 1744 return r; 1745 } 1746 1747 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1748 { 1749 return -ENOTSUPP; 1750 } 1751 1752 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1753 { 1754 return -ENOTSUPP; 1755 } 1756 1757 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 1758 struct kvm_translation *tr) 1759 { 1760 int r; 1761 1762 vcpu_load(vcpu); 1763 r = kvmppc_core_vcpu_translate(vcpu, tr); 1764 vcpu_put(vcpu); 1765 return r; 1766 } 1767 1768 void kvm_arch_sync_dirty_log(struct kvm *kvm, struct kvm_memory_slot *memslot) 1769 { 1770 1771 } 1772 1773 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 1774 { 1775 return -ENOTSUPP; 1776 } 1777 1778 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *slot) 1779 { 1780 } 1781 1782 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 1783 struct kvm_memory_slot *memslot, 1784 const struct kvm_userspace_memory_region *mem, 1785 enum kvm_mr_change change) 1786 { 1787 return 0; 1788 } 1789 1790 void kvmppc_core_commit_memory_region(struct kvm *kvm, 1791 const struct kvm_userspace_memory_region *mem, 1792 const struct kvm_memory_slot *old, 1793 const struct kvm_memory_slot *new, 1794 enum kvm_mr_change change) 1795 { 1796 } 1797 1798 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 1799 { 1800 } 1801 1802 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr) 1803 { 1804 #if defined(CONFIG_64BIT) 1805 vcpu->arch.epcr = new_epcr; 1806 #ifdef CONFIG_KVM_BOOKE_HV 1807 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM; 1808 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 1809 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM; 1810 #endif 1811 #endif 1812 } 1813 1814 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr) 1815 { 1816 vcpu->arch.tcr = new_tcr; 1817 arm_next_watchdog(vcpu); 1818 update_timer_ints(vcpu); 1819 } 1820 1821 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1822 { 1823 set_bits(tsr_bits, &vcpu->arch.tsr); 1824 smp_wmb(); 1825 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 1826 kvm_vcpu_kick(vcpu); 1827 } 1828 1829 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1830 { 1831 clear_bits(tsr_bits, &vcpu->arch.tsr); 1832 1833 /* 1834 * We may have stopped the watchdog due to 1835 * being stuck on final expiration. 1836 */ 1837 if (tsr_bits & (TSR_ENW | TSR_WIS)) 1838 arm_next_watchdog(vcpu); 1839 1840 update_timer_ints(vcpu); 1841 } 1842 1843 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu) 1844 { 1845 if (vcpu->arch.tcr & TCR_ARE) { 1846 vcpu->arch.dec = vcpu->arch.decar; 1847 kvmppc_emulate_dec(vcpu); 1848 } 1849 1850 kvmppc_set_tsr_bits(vcpu, TSR_DIS); 1851 } 1852 1853 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg, 1854 uint64_t addr, int index) 1855 { 1856 switch (index) { 1857 case 0: 1858 dbg_reg->dbcr0 |= DBCR0_IAC1; 1859 dbg_reg->iac1 = addr; 1860 break; 1861 case 1: 1862 dbg_reg->dbcr0 |= DBCR0_IAC2; 1863 dbg_reg->iac2 = addr; 1864 break; 1865 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1866 case 2: 1867 dbg_reg->dbcr0 |= DBCR0_IAC3; 1868 dbg_reg->iac3 = addr; 1869 break; 1870 case 3: 1871 dbg_reg->dbcr0 |= DBCR0_IAC4; 1872 dbg_reg->iac4 = addr; 1873 break; 1874 #endif 1875 default: 1876 return -EINVAL; 1877 } 1878 1879 dbg_reg->dbcr0 |= DBCR0_IDM; 1880 return 0; 1881 } 1882 1883 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr, 1884 int type, int index) 1885 { 1886 switch (index) { 1887 case 0: 1888 if (type & KVMPPC_DEBUG_WATCH_READ) 1889 dbg_reg->dbcr0 |= DBCR0_DAC1R; 1890 if (type & KVMPPC_DEBUG_WATCH_WRITE) 1891 dbg_reg->dbcr0 |= DBCR0_DAC1W; 1892 dbg_reg->dac1 = addr; 1893 break; 1894 case 1: 1895 if (type & KVMPPC_DEBUG_WATCH_READ) 1896 dbg_reg->dbcr0 |= DBCR0_DAC2R; 1897 if (type & KVMPPC_DEBUG_WATCH_WRITE) 1898 dbg_reg->dbcr0 |= DBCR0_DAC2W; 1899 dbg_reg->dac2 = addr; 1900 break; 1901 default: 1902 return -EINVAL; 1903 } 1904 1905 dbg_reg->dbcr0 |= DBCR0_IDM; 1906 return 0; 1907 } 1908 void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set) 1909 { 1910 /* XXX: Add similar MSR protection for BookE-PR */ 1911 #ifdef CONFIG_KVM_BOOKE_HV 1912 BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP)); 1913 if (set) { 1914 if (prot_bitmap & MSR_UCLE) 1915 vcpu->arch.shadow_msrp |= MSRP_UCLEP; 1916 if (prot_bitmap & MSR_DE) 1917 vcpu->arch.shadow_msrp |= MSRP_DEP; 1918 if (prot_bitmap & MSR_PMM) 1919 vcpu->arch.shadow_msrp |= MSRP_PMMP; 1920 } else { 1921 if (prot_bitmap & MSR_UCLE) 1922 vcpu->arch.shadow_msrp &= ~MSRP_UCLEP; 1923 if (prot_bitmap & MSR_DE) 1924 vcpu->arch.shadow_msrp &= ~MSRP_DEP; 1925 if (prot_bitmap & MSR_PMM) 1926 vcpu->arch.shadow_msrp &= ~MSRP_PMMP; 1927 } 1928 #endif 1929 } 1930 1931 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid, 1932 enum xlate_readwrite xlrw, struct kvmppc_pte *pte) 1933 { 1934 int gtlb_index; 1935 gpa_t gpaddr; 1936 1937 #ifdef CONFIG_KVM_E500V2 1938 if (!(vcpu->arch.shared->msr & MSR_PR) && 1939 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1940 pte->eaddr = eaddr; 1941 pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) | 1942 (eaddr & ~PAGE_MASK); 1943 pte->vpage = eaddr >> PAGE_SHIFT; 1944 pte->may_read = true; 1945 pte->may_write = true; 1946 pte->may_execute = true; 1947 1948 return 0; 1949 } 1950 #endif 1951 1952 /* Check the guest TLB. */ 1953 switch (xlid) { 1954 case XLATE_INST: 1955 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 1956 break; 1957 case XLATE_DATA: 1958 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 1959 break; 1960 default: 1961 BUG(); 1962 } 1963 1964 /* Do we have a TLB entry at all? */ 1965 if (gtlb_index < 0) 1966 return -ENOENT; 1967 1968 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1969 1970 pte->eaddr = eaddr; 1971 pte->raddr = (gpaddr & PAGE_MASK) | (eaddr & ~PAGE_MASK); 1972 pte->vpage = eaddr >> PAGE_SHIFT; 1973 1974 /* XXX read permissions from the guest TLB */ 1975 pte->may_read = true; 1976 pte->may_write = true; 1977 pte->may_execute = true; 1978 1979 return 0; 1980 } 1981 1982 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 1983 struct kvm_guest_debug *dbg) 1984 { 1985 struct debug_reg *dbg_reg; 1986 int n, b = 0, w = 0; 1987 int ret = 0; 1988 1989 vcpu_load(vcpu); 1990 1991 if (!(dbg->control & KVM_GUESTDBG_ENABLE)) { 1992 vcpu->arch.dbg_reg.dbcr0 = 0; 1993 vcpu->guest_debug = 0; 1994 kvm_guest_protect_msr(vcpu, MSR_DE, false); 1995 goto out; 1996 } 1997 1998 kvm_guest_protect_msr(vcpu, MSR_DE, true); 1999 vcpu->guest_debug = dbg->control; 2000 vcpu->arch.dbg_reg.dbcr0 = 0; 2001 2002 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) 2003 vcpu->arch.dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC; 2004 2005 /* Code below handles only HW breakpoints */ 2006 dbg_reg = &(vcpu->arch.dbg_reg); 2007 2008 #ifdef CONFIG_KVM_BOOKE_HV 2009 /* 2010 * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1 2011 * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0 2012 */ 2013 dbg_reg->dbcr1 = 0; 2014 dbg_reg->dbcr2 = 0; 2015 #else 2016 /* 2017 * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1 2018 * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR 2019 * is set. 2020 */ 2021 dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US | 2022 DBCR1_IAC4US; 2023 dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 2024 #endif 2025 2026 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) 2027 goto out; 2028 2029 ret = -EINVAL; 2030 for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) { 2031 uint64_t addr = dbg->arch.bp[n].addr; 2032 uint32_t type = dbg->arch.bp[n].type; 2033 2034 if (type == KVMPPC_DEBUG_NONE) 2035 continue; 2036 2037 if (type & ~(KVMPPC_DEBUG_WATCH_READ | 2038 KVMPPC_DEBUG_WATCH_WRITE | 2039 KVMPPC_DEBUG_BREAKPOINT)) 2040 goto out; 2041 2042 if (type & KVMPPC_DEBUG_BREAKPOINT) { 2043 /* Setting H/W breakpoint */ 2044 if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++)) 2045 goto out; 2046 } else { 2047 /* Setting H/W watchpoint */ 2048 if (kvmppc_booke_add_watchpoint(dbg_reg, addr, 2049 type, w++)) 2050 goto out; 2051 } 2052 } 2053 2054 ret = 0; 2055 out: 2056 vcpu_put(vcpu); 2057 return ret; 2058 } 2059 2060 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 2061 { 2062 vcpu->cpu = smp_processor_id(); 2063 current->thread.kvm_vcpu = vcpu; 2064 } 2065 2066 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu) 2067 { 2068 current->thread.kvm_vcpu = NULL; 2069 vcpu->cpu = -1; 2070 2071 /* Clear pending debug event in DBSR */ 2072 kvmppc_clear_dbsr(); 2073 } 2074 2075 int kvmppc_core_init_vm(struct kvm *kvm) 2076 { 2077 return kvm->arch.kvm_ops->init_vm(kvm); 2078 } 2079 2080 int kvmppc_core_vcpu_create(struct kvm_vcpu *vcpu) 2081 { 2082 int i; 2083 int r; 2084 2085 r = vcpu->kvm->arch.kvm_ops->vcpu_create(vcpu); 2086 if (r) 2087 return r; 2088 2089 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ 2090 vcpu->arch.regs.nip = 0; 2091 vcpu->arch.shared->pir = vcpu->vcpu_id; 2092 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */ 2093 kvmppc_set_msr(vcpu, 0); 2094 2095 #ifndef CONFIG_KVM_BOOKE_HV 2096 vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS; 2097 vcpu->arch.shadow_pid = 1; 2098 vcpu->arch.shared->msr = 0; 2099 #endif 2100 2101 /* Eye-catching numbers so we know if the guest takes an interrupt 2102 * before it's programmed its own IVPR/IVORs. */ 2103 vcpu->arch.ivpr = 0x55550000; 2104 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++) 2105 vcpu->arch.ivor[i] = 0x7700 | i * 4; 2106 2107 kvmppc_init_timing_stats(vcpu); 2108 2109 r = kvmppc_core_vcpu_setup(vcpu); 2110 if (r) 2111 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 2112 kvmppc_sanity_check(vcpu); 2113 return r; 2114 } 2115 2116 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) 2117 { 2118 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 2119 } 2120 2121 void kvmppc_core_destroy_vm(struct kvm *kvm) 2122 { 2123 kvm->arch.kvm_ops->destroy_vm(kvm); 2124 } 2125 2126 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 2127 { 2128 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu); 2129 } 2130 2131 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) 2132 { 2133 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu); 2134 } 2135 2136 int __init kvmppc_booke_init(void) 2137 { 2138 #ifndef CONFIG_KVM_BOOKE_HV 2139 unsigned long ivor[16]; 2140 unsigned long *handler = kvmppc_booke_handler_addr; 2141 unsigned long max_ivor = 0; 2142 unsigned long handler_len; 2143 int i; 2144 2145 /* We install our own exception handlers by hijacking IVPR. IVPR must 2146 * be 16-bit aligned, so we need a 64KB allocation. */ 2147 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 2148 VCPU_SIZE_ORDER); 2149 if (!kvmppc_booke_handlers) 2150 return -ENOMEM; 2151 2152 /* XXX make sure our handlers are smaller than Linux's */ 2153 2154 /* Copy our interrupt handlers to match host IVORs. That way we don't 2155 * have to swap the IVORs on every guest/host transition. */ 2156 ivor[0] = mfspr(SPRN_IVOR0); 2157 ivor[1] = mfspr(SPRN_IVOR1); 2158 ivor[2] = mfspr(SPRN_IVOR2); 2159 ivor[3] = mfspr(SPRN_IVOR3); 2160 ivor[4] = mfspr(SPRN_IVOR4); 2161 ivor[5] = mfspr(SPRN_IVOR5); 2162 ivor[6] = mfspr(SPRN_IVOR6); 2163 ivor[7] = mfspr(SPRN_IVOR7); 2164 ivor[8] = mfspr(SPRN_IVOR8); 2165 ivor[9] = mfspr(SPRN_IVOR9); 2166 ivor[10] = mfspr(SPRN_IVOR10); 2167 ivor[11] = mfspr(SPRN_IVOR11); 2168 ivor[12] = mfspr(SPRN_IVOR12); 2169 ivor[13] = mfspr(SPRN_IVOR13); 2170 ivor[14] = mfspr(SPRN_IVOR14); 2171 ivor[15] = mfspr(SPRN_IVOR15); 2172 2173 for (i = 0; i < 16; i++) { 2174 if (ivor[i] > max_ivor) 2175 max_ivor = i; 2176 2177 handler_len = handler[i + 1] - handler[i]; 2178 memcpy((void *)kvmppc_booke_handlers + ivor[i], 2179 (void *)handler[i], handler_len); 2180 } 2181 2182 handler_len = handler[max_ivor + 1] - handler[max_ivor]; 2183 flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers + 2184 ivor[max_ivor] + handler_len); 2185 #endif /* !BOOKE_HV */ 2186 return 0; 2187 } 2188 2189 void __exit kvmppc_booke_exit(void) 2190 { 2191 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); 2192 kvm_exit(); 2193 } 2194