1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License, version 2, as 4 * published by the Free Software Foundation. 5 * 6 * This program is distributed in the hope that it will be useful, 7 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * GNU General Public License for more details. 10 * 11 * You should have received a copy of the GNU General Public License 12 * along with this program; if not, write to the Free Software 13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14 * 15 * Copyright IBM Corp. 2007 16 * Copyright 2010-2011 Freescale Semiconductor, Inc. 17 * 18 * Authors: Hollis Blanchard <hollisb@us.ibm.com> 19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 20 * Scott Wood <scottwood@freescale.com> 21 * Varun Sethi <varun.sethi@freescale.com> 22 */ 23 24 #include <linux/errno.h> 25 #include <linux/err.h> 26 #include <linux/kvm_host.h> 27 #include <linux/gfp.h> 28 #include <linux/module.h> 29 #include <linux/vmalloc.h> 30 #include <linux/fs.h> 31 32 #include <asm/cputable.h> 33 #include <linux/uaccess.h> 34 #include <asm/kvm_ppc.h> 35 #include <asm/cacheflush.h> 36 #include <asm/dbell.h> 37 #include <asm/hw_irq.h> 38 #include <asm/irq.h> 39 #include <asm/time.h> 40 41 #include "timing.h" 42 #include "booke.h" 43 44 #define CREATE_TRACE_POINTS 45 #include "trace_booke.h" 46 47 unsigned long kvmppc_booke_handlers; 48 49 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM 50 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 51 52 struct kvm_stats_debugfs_item debugfs_entries[] = { 53 { "mmio", VCPU_STAT(mmio_exits) }, 54 { "sig", VCPU_STAT(signal_exits) }, 55 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) }, 56 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) }, 57 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) }, 58 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) }, 59 { "sysc", VCPU_STAT(syscall_exits) }, 60 { "isi", VCPU_STAT(isi_exits) }, 61 { "dsi", VCPU_STAT(dsi_exits) }, 62 { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 63 { "dec", VCPU_STAT(dec_exits) }, 64 { "ext_intr", VCPU_STAT(ext_intr_exits) }, 65 { "halt_successful_poll", VCPU_STAT(halt_successful_poll) }, 66 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) }, 67 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) }, 68 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 69 { "doorbell", VCPU_STAT(dbell_exits) }, 70 { "guest doorbell", VCPU_STAT(gdbell_exits) }, 71 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) }, 72 { NULL } 73 }; 74 75 /* TODO: use vcpu_printf() */ 76 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) 77 { 78 int i; 79 80 printk("pc: %08lx msr: %08llx\n", vcpu->arch.regs.nip, 81 vcpu->arch.shared->msr); 82 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.regs.link, 83 vcpu->arch.regs.ctr); 84 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, 85 vcpu->arch.shared->srr1); 86 87 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); 88 89 for (i = 0; i < 32; i += 4) { 90 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, 91 kvmppc_get_gpr(vcpu, i), 92 kvmppc_get_gpr(vcpu, i+1), 93 kvmppc_get_gpr(vcpu, i+2), 94 kvmppc_get_gpr(vcpu, i+3)); 95 } 96 } 97 98 #ifdef CONFIG_SPE 99 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) 100 { 101 preempt_disable(); 102 enable_kernel_spe(); 103 kvmppc_save_guest_spe(vcpu); 104 disable_kernel_spe(); 105 vcpu->arch.shadow_msr &= ~MSR_SPE; 106 preempt_enable(); 107 } 108 109 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) 110 { 111 preempt_disable(); 112 enable_kernel_spe(); 113 kvmppc_load_guest_spe(vcpu); 114 disable_kernel_spe(); 115 vcpu->arch.shadow_msr |= MSR_SPE; 116 preempt_enable(); 117 } 118 119 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 120 { 121 if (vcpu->arch.shared->msr & MSR_SPE) { 122 if (!(vcpu->arch.shadow_msr & MSR_SPE)) 123 kvmppc_vcpu_enable_spe(vcpu); 124 } else if (vcpu->arch.shadow_msr & MSR_SPE) { 125 kvmppc_vcpu_disable_spe(vcpu); 126 } 127 } 128 #else 129 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 130 { 131 } 132 #endif 133 134 /* 135 * Load up guest vcpu FP state if it's needed. 136 * It also set the MSR_FP in thread so that host know 137 * we're holding FPU, and then host can help to save 138 * guest vcpu FP state if other threads require to use FPU. 139 * This simulates an FP unavailable fault. 140 * 141 * It requires to be called with preemption disabled. 142 */ 143 static inline void kvmppc_load_guest_fp(struct kvm_vcpu *vcpu) 144 { 145 #ifdef CONFIG_PPC_FPU 146 if (!(current->thread.regs->msr & MSR_FP)) { 147 enable_kernel_fp(); 148 load_fp_state(&vcpu->arch.fp); 149 disable_kernel_fp(); 150 current->thread.fp_save_area = &vcpu->arch.fp; 151 current->thread.regs->msr |= MSR_FP; 152 } 153 #endif 154 } 155 156 /* 157 * Save guest vcpu FP state into thread. 158 * It requires to be called with preemption disabled. 159 */ 160 static inline void kvmppc_save_guest_fp(struct kvm_vcpu *vcpu) 161 { 162 #ifdef CONFIG_PPC_FPU 163 if (current->thread.regs->msr & MSR_FP) 164 giveup_fpu(current); 165 current->thread.fp_save_area = NULL; 166 #endif 167 } 168 169 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu) 170 { 171 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV) 172 /* We always treat the FP bit as enabled from the host 173 perspective, so only need to adjust the shadow MSR */ 174 vcpu->arch.shadow_msr &= ~MSR_FP; 175 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP; 176 #endif 177 } 178 179 /* 180 * Simulate AltiVec unavailable fault to load guest state 181 * from thread to AltiVec unit. 182 * It requires to be called with preemption disabled. 183 */ 184 static inline void kvmppc_load_guest_altivec(struct kvm_vcpu *vcpu) 185 { 186 #ifdef CONFIG_ALTIVEC 187 if (cpu_has_feature(CPU_FTR_ALTIVEC)) { 188 if (!(current->thread.regs->msr & MSR_VEC)) { 189 enable_kernel_altivec(); 190 load_vr_state(&vcpu->arch.vr); 191 disable_kernel_altivec(); 192 current->thread.vr_save_area = &vcpu->arch.vr; 193 current->thread.regs->msr |= MSR_VEC; 194 } 195 } 196 #endif 197 } 198 199 /* 200 * Save guest vcpu AltiVec state into thread. 201 * It requires to be called with preemption disabled. 202 */ 203 static inline void kvmppc_save_guest_altivec(struct kvm_vcpu *vcpu) 204 { 205 #ifdef CONFIG_ALTIVEC 206 if (cpu_has_feature(CPU_FTR_ALTIVEC)) { 207 if (current->thread.regs->msr & MSR_VEC) 208 giveup_altivec(current); 209 current->thread.vr_save_area = NULL; 210 } 211 #endif 212 } 213 214 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu) 215 { 216 /* Synchronize guest's desire to get debug interrupts into shadow MSR */ 217 #ifndef CONFIG_KVM_BOOKE_HV 218 vcpu->arch.shadow_msr &= ~MSR_DE; 219 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE; 220 #endif 221 222 /* Force enable debug interrupts when user space wants to debug */ 223 if (vcpu->guest_debug) { 224 #ifdef CONFIG_KVM_BOOKE_HV 225 /* 226 * Since there is no shadow MSR, sync MSR_DE into the guest 227 * visible MSR. 228 */ 229 vcpu->arch.shared->msr |= MSR_DE; 230 #else 231 vcpu->arch.shadow_msr |= MSR_DE; 232 vcpu->arch.shared->msr &= ~MSR_DE; 233 #endif 234 } 235 } 236 237 /* 238 * Helper function for "full" MSR writes. No need to call this if only 239 * EE/CE/ME/DE/RI are changing. 240 */ 241 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) 242 { 243 u32 old_msr = vcpu->arch.shared->msr; 244 245 #ifdef CONFIG_KVM_BOOKE_HV 246 new_msr |= MSR_GS; 247 #endif 248 249 vcpu->arch.shared->msr = new_msr; 250 251 kvmppc_mmu_msr_notify(vcpu, old_msr); 252 kvmppc_vcpu_sync_spe(vcpu); 253 kvmppc_vcpu_sync_fpu(vcpu); 254 kvmppc_vcpu_sync_debug(vcpu); 255 } 256 257 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, 258 unsigned int priority) 259 { 260 trace_kvm_booke_queue_irqprio(vcpu, priority); 261 set_bit(priority, &vcpu->arch.pending_exceptions); 262 } 263 264 void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu, 265 ulong dear_flags, ulong esr_flags) 266 { 267 vcpu->arch.queued_dear = dear_flags; 268 vcpu->arch.queued_esr = esr_flags; 269 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); 270 } 271 272 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, 273 ulong dear_flags, ulong esr_flags) 274 { 275 vcpu->arch.queued_dear = dear_flags; 276 vcpu->arch.queued_esr = esr_flags; 277 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE); 278 } 279 280 void kvmppc_core_queue_itlb_miss(struct kvm_vcpu *vcpu) 281 { 282 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 283 } 284 285 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong esr_flags) 286 { 287 vcpu->arch.queued_esr = esr_flags; 288 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE); 289 } 290 291 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags, 292 ulong esr_flags) 293 { 294 vcpu->arch.queued_dear = dear_flags; 295 vcpu->arch.queued_esr = esr_flags; 296 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT); 297 } 298 299 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags) 300 { 301 vcpu->arch.queued_esr = esr_flags; 302 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); 303 } 304 305 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu) 306 { 307 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 308 } 309 310 #ifdef CONFIG_ALTIVEC 311 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu) 312 { 313 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL); 314 } 315 #endif 316 317 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 318 { 319 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER); 320 } 321 322 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 323 { 324 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 325 } 326 327 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 328 { 329 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 330 } 331 332 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 333 struct kvm_interrupt *irq) 334 { 335 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL; 336 337 if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 338 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL; 339 340 kvmppc_booke_queue_irqprio(vcpu, prio); 341 } 342 343 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 344 { 345 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); 346 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions); 347 } 348 349 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu) 350 { 351 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG); 352 } 353 354 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu) 355 { 356 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions); 357 } 358 359 void kvmppc_core_queue_debug(struct kvm_vcpu *vcpu) 360 { 361 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DEBUG); 362 } 363 364 void kvmppc_core_dequeue_debug(struct kvm_vcpu *vcpu) 365 { 366 clear_bit(BOOKE_IRQPRIO_DEBUG, &vcpu->arch.pending_exceptions); 367 } 368 369 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 370 { 371 kvmppc_set_srr0(vcpu, srr0); 372 kvmppc_set_srr1(vcpu, srr1); 373 } 374 375 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 376 { 377 vcpu->arch.csrr0 = srr0; 378 vcpu->arch.csrr1 = srr1; 379 } 380 381 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 382 { 383 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) { 384 vcpu->arch.dsrr0 = srr0; 385 vcpu->arch.dsrr1 = srr1; 386 } else { 387 set_guest_csrr(vcpu, srr0, srr1); 388 } 389 } 390 391 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 392 { 393 vcpu->arch.mcsrr0 = srr0; 394 vcpu->arch.mcsrr1 = srr1; 395 } 396 397 /* Deliver the interrupt of the corresponding priority, if possible. */ 398 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, 399 unsigned int priority) 400 { 401 int allowed = 0; 402 ulong msr_mask = 0; 403 bool update_esr = false, update_dear = false, update_epr = false; 404 ulong crit_raw = vcpu->arch.shared->critical; 405 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1); 406 bool crit; 407 bool keep_irq = false; 408 enum int_class int_class; 409 ulong new_msr = vcpu->arch.shared->msr; 410 411 /* Truncate crit indicators in 32 bit mode */ 412 if (!(vcpu->arch.shared->msr & MSR_SF)) { 413 crit_raw &= 0xffffffff; 414 crit_r1 &= 0xffffffff; 415 } 416 417 /* Critical section when crit == r1 */ 418 crit = (crit_raw == crit_r1); 419 /* ... and we're in supervisor mode */ 420 crit = crit && !(vcpu->arch.shared->msr & MSR_PR); 421 422 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) { 423 priority = BOOKE_IRQPRIO_EXTERNAL; 424 keep_irq = true; 425 } 426 427 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags) 428 update_epr = true; 429 430 switch (priority) { 431 case BOOKE_IRQPRIO_DTLB_MISS: 432 case BOOKE_IRQPRIO_DATA_STORAGE: 433 case BOOKE_IRQPRIO_ALIGNMENT: 434 update_dear = true; 435 /* fall through */ 436 case BOOKE_IRQPRIO_INST_STORAGE: 437 case BOOKE_IRQPRIO_PROGRAM: 438 update_esr = true; 439 /* fall through */ 440 case BOOKE_IRQPRIO_ITLB_MISS: 441 case BOOKE_IRQPRIO_SYSCALL: 442 case BOOKE_IRQPRIO_FP_UNAVAIL: 443 #ifdef CONFIG_SPE_POSSIBLE 444 case BOOKE_IRQPRIO_SPE_UNAVAIL: 445 case BOOKE_IRQPRIO_SPE_FP_DATA: 446 case BOOKE_IRQPRIO_SPE_FP_ROUND: 447 #endif 448 #ifdef CONFIG_ALTIVEC 449 case BOOKE_IRQPRIO_ALTIVEC_UNAVAIL: 450 case BOOKE_IRQPRIO_ALTIVEC_ASSIST: 451 #endif 452 case BOOKE_IRQPRIO_AP_UNAVAIL: 453 allowed = 1; 454 msr_mask = MSR_CE | MSR_ME | MSR_DE; 455 int_class = INT_CLASS_NONCRIT; 456 break; 457 case BOOKE_IRQPRIO_WATCHDOG: 458 case BOOKE_IRQPRIO_CRITICAL: 459 case BOOKE_IRQPRIO_DBELL_CRIT: 460 allowed = vcpu->arch.shared->msr & MSR_CE; 461 allowed = allowed && !crit; 462 msr_mask = MSR_ME; 463 int_class = INT_CLASS_CRIT; 464 break; 465 case BOOKE_IRQPRIO_MACHINE_CHECK: 466 allowed = vcpu->arch.shared->msr & MSR_ME; 467 allowed = allowed && !crit; 468 int_class = INT_CLASS_MC; 469 break; 470 case BOOKE_IRQPRIO_DECREMENTER: 471 case BOOKE_IRQPRIO_FIT: 472 keep_irq = true; 473 /* fall through */ 474 case BOOKE_IRQPRIO_EXTERNAL: 475 case BOOKE_IRQPRIO_DBELL: 476 allowed = vcpu->arch.shared->msr & MSR_EE; 477 allowed = allowed && !crit; 478 msr_mask = MSR_CE | MSR_ME | MSR_DE; 479 int_class = INT_CLASS_NONCRIT; 480 break; 481 case BOOKE_IRQPRIO_DEBUG: 482 allowed = vcpu->arch.shared->msr & MSR_DE; 483 allowed = allowed && !crit; 484 msr_mask = MSR_ME; 485 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) 486 int_class = INT_CLASS_DBG; 487 else 488 int_class = INT_CLASS_CRIT; 489 490 break; 491 } 492 493 if (allowed) { 494 switch (int_class) { 495 case INT_CLASS_NONCRIT: 496 set_guest_srr(vcpu, vcpu->arch.regs.nip, 497 vcpu->arch.shared->msr); 498 break; 499 case INT_CLASS_CRIT: 500 set_guest_csrr(vcpu, vcpu->arch.regs.nip, 501 vcpu->arch.shared->msr); 502 break; 503 case INT_CLASS_DBG: 504 set_guest_dsrr(vcpu, vcpu->arch.regs.nip, 505 vcpu->arch.shared->msr); 506 break; 507 case INT_CLASS_MC: 508 set_guest_mcsrr(vcpu, vcpu->arch.regs.nip, 509 vcpu->arch.shared->msr); 510 break; 511 } 512 513 vcpu->arch.regs.nip = vcpu->arch.ivpr | 514 vcpu->arch.ivor[priority]; 515 if (update_esr == true) 516 kvmppc_set_esr(vcpu, vcpu->arch.queued_esr); 517 if (update_dear == true) 518 kvmppc_set_dar(vcpu, vcpu->arch.queued_dear); 519 if (update_epr == true) { 520 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER) 521 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu); 522 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) { 523 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC); 524 kvmppc_mpic_set_epr(vcpu); 525 } 526 } 527 528 new_msr &= msr_mask; 529 #if defined(CONFIG_64BIT) 530 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 531 new_msr |= MSR_CM; 532 #endif 533 kvmppc_set_msr(vcpu, new_msr); 534 535 if (!keep_irq) 536 clear_bit(priority, &vcpu->arch.pending_exceptions); 537 } 538 539 #ifdef CONFIG_KVM_BOOKE_HV 540 /* 541 * If an interrupt is pending but masked, raise a guest doorbell 542 * so that we are notified when the guest enables the relevant 543 * MSR bit. 544 */ 545 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE) 546 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT); 547 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE) 548 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT); 549 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK) 550 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC); 551 #endif 552 553 return allowed; 554 } 555 556 /* 557 * Return the number of jiffies until the next timeout. If the timeout is 558 * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA 559 * because the larger value can break the timer APIs. 560 */ 561 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu) 562 { 563 u64 tb, wdt_tb, wdt_ticks = 0; 564 u64 nr_jiffies = 0; 565 u32 period = TCR_GET_WP(vcpu->arch.tcr); 566 567 wdt_tb = 1ULL << (63 - period); 568 tb = get_tb(); 569 /* 570 * The watchdog timeout will hapeen when TB bit corresponding 571 * to watchdog will toggle from 0 to 1. 572 */ 573 if (tb & wdt_tb) 574 wdt_ticks = wdt_tb; 575 576 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1)); 577 578 /* Convert timebase ticks to jiffies */ 579 nr_jiffies = wdt_ticks; 580 581 if (do_div(nr_jiffies, tb_ticks_per_jiffy)) 582 nr_jiffies++; 583 584 return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA); 585 } 586 587 static void arm_next_watchdog(struct kvm_vcpu *vcpu) 588 { 589 unsigned long nr_jiffies; 590 unsigned long flags; 591 592 /* 593 * If TSR_ENW and TSR_WIS are not set then no need to exit to 594 * userspace, so clear the KVM_REQ_WATCHDOG request. 595 */ 596 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS)) 597 kvm_clear_request(KVM_REQ_WATCHDOG, vcpu); 598 599 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags); 600 nr_jiffies = watchdog_next_timeout(vcpu); 601 /* 602 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA 603 * then do not run the watchdog timer as this can break timer APIs. 604 */ 605 if (nr_jiffies < NEXT_TIMER_MAX_DELTA) 606 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies); 607 else 608 del_timer(&vcpu->arch.wdt_timer); 609 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags); 610 } 611 612 void kvmppc_watchdog_func(struct timer_list *t) 613 { 614 struct kvm_vcpu *vcpu = from_timer(vcpu, t, arch.wdt_timer); 615 u32 tsr, new_tsr; 616 int final; 617 618 do { 619 new_tsr = tsr = vcpu->arch.tsr; 620 final = 0; 621 622 /* Time out event */ 623 if (tsr & TSR_ENW) { 624 if (tsr & TSR_WIS) 625 final = 1; 626 else 627 new_tsr = tsr | TSR_WIS; 628 } else { 629 new_tsr = tsr | TSR_ENW; 630 } 631 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr); 632 633 if (new_tsr & TSR_WIS) { 634 smp_wmb(); 635 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 636 kvm_vcpu_kick(vcpu); 637 } 638 639 /* 640 * If this is final watchdog expiry and some action is required 641 * then exit to userspace. 642 */ 643 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) && 644 vcpu->arch.watchdog_enabled) { 645 smp_wmb(); 646 kvm_make_request(KVM_REQ_WATCHDOG, vcpu); 647 kvm_vcpu_kick(vcpu); 648 } 649 650 /* 651 * Stop running the watchdog timer after final expiration to 652 * prevent the host from being flooded with timers if the 653 * guest sets a short period. 654 * Timers will resume when TSR/TCR is updated next time. 655 */ 656 if (!final) 657 arm_next_watchdog(vcpu); 658 } 659 660 static void update_timer_ints(struct kvm_vcpu *vcpu) 661 { 662 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) 663 kvmppc_core_queue_dec(vcpu); 664 else 665 kvmppc_core_dequeue_dec(vcpu); 666 667 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) 668 kvmppc_core_queue_watchdog(vcpu); 669 else 670 kvmppc_core_dequeue_watchdog(vcpu); 671 } 672 673 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu) 674 { 675 unsigned long *pending = &vcpu->arch.pending_exceptions; 676 unsigned int priority; 677 678 priority = __ffs(*pending); 679 while (priority < BOOKE_IRQPRIO_MAX) { 680 if (kvmppc_booke_irqprio_deliver(vcpu, priority)) 681 break; 682 683 priority = find_next_bit(pending, 684 BITS_PER_BYTE * sizeof(*pending), 685 priority + 1); 686 } 687 688 /* Tell the guest about our interrupt status */ 689 vcpu->arch.shared->int_pending = !!*pending; 690 } 691 692 /* Check pending exceptions and deliver one, if possible. */ 693 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 694 { 695 int r = 0; 696 WARN_ON_ONCE(!irqs_disabled()); 697 698 kvmppc_core_check_exceptions(vcpu); 699 700 if (kvm_request_pending(vcpu)) { 701 /* Exception delivery raised request; start over */ 702 return 1; 703 } 704 705 if (vcpu->arch.shared->msr & MSR_WE) { 706 local_irq_enable(); 707 kvm_vcpu_block(vcpu); 708 kvm_clear_request(KVM_REQ_UNHALT, vcpu); 709 hard_irq_disable(); 710 711 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS); 712 r = 1; 713 }; 714 715 return r; 716 } 717 718 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 719 { 720 int r = 1; /* Indicate we want to get back into the guest */ 721 722 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) 723 update_timer_ints(vcpu); 724 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 725 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) 726 kvmppc_core_flush_tlb(vcpu); 727 #endif 728 729 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) { 730 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG; 731 r = 0; 732 } 733 734 if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) { 735 vcpu->run->epr.epr = 0; 736 vcpu->arch.epr_needed = true; 737 vcpu->run->exit_reason = KVM_EXIT_EPR; 738 r = 0; 739 } 740 741 return r; 742 } 743 744 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 745 { 746 int ret, s; 747 struct debug_reg debug; 748 749 if (!vcpu->arch.sane) { 750 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 751 return -EINVAL; 752 } 753 754 s = kvmppc_prepare_to_enter(vcpu); 755 if (s <= 0) { 756 ret = s; 757 goto out; 758 } 759 /* interrupts now hard-disabled */ 760 761 #ifdef CONFIG_PPC_FPU 762 /* Save userspace FPU state in stack */ 763 enable_kernel_fp(); 764 765 /* 766 * Since we can't trap on MSR_FP in GS-mode, we consider the guest 767 * as always using the FPU. 768 */ 769 kvmppc_load_guest_fp(vcpu); 770 #endif 771 772 #ifdef CONFIG_ALTIVEC 773 /* Save userspace AltiVec state in stack */ 774 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 775 enable_kernel_altivec(); 776 /* 777 * Since we can't trap on MSR_VEC in GS-mode, we consider the guest 778 * as always using the AltiVec. 779 */ 780 kvmppc_load_guest_altivec(vcpu); 781 #endif 782 783 /* Switch to guest debug context */ 784 debug = vcpu->arch.dbg_reg; 785 switch_booke_debug_regs(&debug); 786 debug = current->thread.debug; 787 current->thread.debug = vcpu->arch.dbg_reg; 788 789 vcpu->arch.pgdir = current->mm->pgd; 790 kvmppc_fix_ee_before_entry(); 791 792 ret = __kvmppc_vcpu_run(kvm_run, vcpu); 793 794 /* No need for guest_exit. It's done in handle_exit. 795 We also get here with interrupts enabled. */ 796 797 /* Switch back to user space debug context */ 798 switch_booke_debug_regs(&debug); 799 current->thread.debug = debug; 800 801 #ifdef CONFIG_PPC_FPU 802 kvmppc_save_guest_fp(vcpu); 803 #endif 804 805 #ifdef CONFIG_ALTIVEC 806 kvmppc_save_guest_altivec(vcpu); 807 #endif 808 809 out: 810 vcpu->mode = OUTSIDE_GUEST_MODE; 811 return ret; 812 } 813 814 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) 815 { 816 enum emulation_result er; 817 818 er = kvmppc_emulate_instruction(run, vcpu); 819 switch (er) { 820 case EMULATE_DONE: 821 /* don't overwrite subtypes, just account kvm_stats */ 822 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS); 823 /* Future optimization: only reload non-volatiles if 824 * they were actually modified by emulation. */ 825 return RESUME_GUEST_NV; 826 827 case EMULATE_AGAIN: 828 return RESUME_GUEST; 829 830 case EMULATE_FAIL: 831 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 832 __func__, vcpu->arch.regs.nip, vcpu->arch.last_inst); 833 /* For debugging, encode the failing instruction and 834 * report it to userspace. */ 835 run->hw.hardware_exit_reason = ~0ULL << 32; 836 run->hw.hardware_exit_reason |= vcpu->arch.last_inst; 837 kvmppc_core_queue_program(vcpu, ESR_PIL); 838 return RESUME_HOST; 839 840 case EMULATE_EXIT_USER: 841 return RESUME_HOST; 842 843 default: 844 BUG(); 845 } 846 } 847 848 static int kvmppc_handle_debug(struct kvm_run *run, struct kvm_vcpu *vcpu) 849 { 850 struct debug_reg *dbg_reg = &(vcpu->arch.dbg_reg); 851 u32 dbsr = vcpu->arch.dbsr; 852 853 if (vcpu->guest_debug == 0) { 854 /* 855 * Debug resources belong to Guest. 856 * Imprecise debug event is not injected 857 */ 858 if (dbsr & DBSR_IDE) { 859 dbsr &= ~DBSR_IDE; 860 if (!dbsr) 861 return RESUME_GUEST; 862 } 863 864 if (dbsr && (vcpu->arch.shared->msr & MSR_DE) && 865 (vcpu->arch.dbg_reg.dbcr0 & DBCR0_IDM)) 866 kvmppc_core_queue_debug(vcpu); 867 868 /* Inject a program interrupt if trap debug is not allowed */ 869 if ((dbsr & DBSR_TIE) && !(vcpu->arch.shared->msr & MSR_DE)) 870 kvmppc_core_queue_program(vcpu, ESR_PTR); 871 872 return RESUME_GUEST; 873 } 874 875 /* 876 * Debug resource owned by userspace. 877 * Clear guest dbsr (vcpu->arch.dbsr) 878 */ 879 vcpu->arch.dbsr = 0; 880 run->debug.arch.status = 0; 881 run->debug.arch.address = vcpu->arch.regs.nip; 882 883 if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) { 884 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT; 885 } else { 886 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W)) 887 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE; 888 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R)) 889 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ; 890 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W)) 891 run->debug.arch.address = dbg_reg->dac1; 892 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W)) 893 run->debug.arch.address = dbg_reg->dac2; 894 } 895 896 return RESUME_HOST; 897 } 898 899 static void kvmppc_fill_pt_regs(struct pt_regs *regs) 900 { 901 ulong r1, ip, msr, lr; 902 903 asm("mr %0, 1" : "=r"(r1)); 904 asm("mflr %0" : "=r"(lr)); 905 asm("mfmsr %0" : "=r"(msr)); 906 asm("bl 1f; 1: mflr %0" : "=r"(ip)); 907 908 memset(regs, 0, sizeof(*regs)); 909 regs->gpr[1] = r1; 910 regs->nip = ip; 911 regs->msr = msr; 912 regs->link = lr; 913 } 914 915 /* 916 * For interrupts needed to be handled by host interrupt handlers, 917 * corresponding host handler are called from here in similar way 918 * (but not exact) as they are called from low level handler 919 * (such as from arch/powerpc/kernel/head_fsl_booke.S). 920 */ 921 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu, 922 unsigned int exit_nr) 923 { 924 struct pt_regs regs; 925 926 switch (exit_nr) { 927 case BOOKE_INTERRUPT_EXTERNAL: 928 kvmppc_fill_pt_regs(®s); 929 do_IRQ(®s); 930 break; 931 case BOOKE_INTERRUPT_DECREMENTER: 932 kvmppc_fill_pt_regs(®s); 933 timer_interrupt(®s); 934 break; 935 #if defined(CONFIG_PPC_DOORBELL) 936 case BOOKE_INTERRUPT_DOORBELL: 937 kvmppc_fill_pt_regs(®s); 938 doorbell_exception(®s); 939 break; 940 #endif 941 case BOOKE_INTERRUPT_MACHINE_CHECK: 942 /* FIXME */ 943 break; 944 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 945 kvmppc_fill_pt_regs(®s); 946 performance_monitor_exception(®s); 947 break; 948 case BOOKE_INTERRUPT_WATCHDOG: 949 kvmppc_fill_pt_regs(®s); 950 #ifdef CONFIG_BOOKE_WDT 951 WatchdogException(®s); 952 #else 953 unknown_exception(®s); 954 #endif 955 break; 956 case BOOKE_INTERRUPT_CRITICAL: 957 kvmppc_fill_pt_regs(®s); 958 unknown_exception(®s); 959 break; 960 case BOOKE_INTERRUPT_DEBUG: 961 /* Save DBSR before preemption is enabled */ 962 vcpu->arch.dbsr = mfspr(SPRN_DBSR); 963 kvmppc_clear_dbsr(); 964 break; 965 } 966 } 967 968 static int kvmppc_resume_inst_load(struct kvm_run *run, struct kvm_vcpu *vcpu, 969 enum emulation_result emulated, u32 last_inst) 970 { 971 switch (emulated) { 972 case EMULATE_AGAIN: 973 return RESUME_GUEST; 974 975 case EMULATE_FAIL: 976 pr_debug("%s: load instruction from guest address %lx failed\n", 977 __func__, vcpu->arch.regs.nip); 978 /* For debugging, encode the failing instruction and 979 * report it to userspace. */ 980 run->hw.hardware_exit_reason = ~0ULL << 32; 981 run->hw.hardware_exit_reason |= last_inst; 982 kvmppc_core_queue_program(vcpu, ESR_PIL); 983 return RESUME_HOST; 984 985 default: 986 BUG(); 987 } 988 } 989 990 /** 991 * kvmppc_handle_exit 992 * 993 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) 994 */ 995 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, 996 unsigned int exit_nr) 997 { 998 int r = RESUME_HOST; 999 int s; 1000 int idx; 1001 u32 last_inst = KVM_INST_FETCH_FAILED; 1002 enum emulation_result emulated = EMULATE_DONE; 1003 1004 /* update before a new last_exit_type is rewritten */ 1005 kvmppc_update_timing_stats(vcpu); 1006 1007 /* restart interrupts if they were meant for the host */ 1008 kvmppc_restart_interrupt(vcpu, exit_nr); 1009 1010 /* 1011 * get last instruction before being preempted 1012 * TODO: for e6500 check also BOOKE_INTERRUPT_LRAT_ERROR & ESR_DATA 1013 */ 1014 switch (exit_nr) { 1015 case BOOKE_INTERRUPT_DATA_STORAGE: 1016 case BOOKE_INTERRUPT_DTLB_MISS: 1017 case BOOKE_INTERRUPT_HV_PRIV: 1018 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst); 1019 break; 1020 case BOOKE_INTERRUPT_PROGRAM: 1021 /* SW breakpoints arrive as illegal instructions on HV */ 1022 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) 1023 emulated = kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst); 1024 break; 1025 default: 1026 break; 1027 } 1028 1029 trace_kvm_exit(exit_nr, vcpu); 1030 guest_exit_irqoff(); 1031 1032 local_irq_enable(); 1033 1034 run->exit_reason = KVM_EXIT_UNKNOWN; 1035 run->ready_for_interrupt_injection = 1; 1036 1037 if (emulated != EMULATE_DONE) { 1038 r = kvmppc_resume_inst_load(run, vcpu, emulated, last_inst); 1039 goto out; 1040 } 1041 1042 switch (exit_nr) { 1043 case BOOKE_INTERRUPT_MACHINE_CHECK: 1044 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); 1045 kvmppc_dump_vcpu(vcpu); 1046 /* For debugging, send invalid exit reason to user space */ 1047 run->hw.hardware_exit_reason = ~1ULL << 32; 1048 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR); 1049 r = RESUME_HOST; 1050 break; 1051 1052 case BOOKE_INTERRUPT_EXTERNAL: 1053 kvmppc_account_exit(vcpu, EXT_INTR_EXITS); 1054 r = RESUME_GUEST; 1055 break; 1056 1057 case BOOKE_INTERRUPT_DECREMENTER: 1058 kvmppc_account_exit(vcpu, DEC_EXITS); 1059 r = RESUME_GUEST; 1060 break; 1061 1062 case BOOKE_INTERRUPT_WATCHDOG: 1063 r = RESUME_GUEST; 1064 break; 1065 1066 case BOOKE_INTERRUPT_DOORBELL: 1067 kvmppc_account_exit(vcpu, DBELL_EXITS); 1068 r = RESUME_GUEST; 1069 break; 1070 1071 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT: 1072 kvmppc_account_exit(vcpu, GDBELL_EXITS); 1073 1074 /* 1075 * We are here because there is a pending guest interrupt 1076 * which could not be delivered as MSR_CE or MSR_ME was not 1077 * set. Once we break from here we will retry delivery. 1078 */ 1079 r = RESUME_GUEST; 1080 break; 1081 1082 case BOOKE_INTERRUPT_GUEST_DBELL: 1083 kvmppc_account_exit(vcpu, GDBELL_EXITS); 1084 1085 /* 1086 * We are here because there is a pending guest interrupt 1087 * which could not be delivered as MSR_EE was not set. Once 1088 * we break from here we will retry delivery. 1089 */ 1090 r = RESUME_GUEST; 1091 break; 1092 1093 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 1094 r = RESUME_GUEST; 1095 break; 1096 1097 case BOOKE_INTERRUPT_HV_PRIV: 1098 r = emulation_exit(run, vcpu); 1099 break; 1100 1101 case BOOKE_INTERRUPT_PROGRAM: 1102 if ((vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) && 1103 (last_inst == KVMPPC_INST_SW_BREAKPOINT)) { 1104 /* 1105 * We are here because of an SW breakpoint instr, 1106 * so lets return to host to handle. 1107 */ 1108 r = kvmppc_handle_debug(run, vcpu); 1109 run->exit_reason = KVM_EXIT_DEBUG; 1110 kvmppc_account_exit(vcpu, DEBUG_EXITS); 1111 break; 1112 } 1113 1114 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) { 1115 /* 1116 * Program traps generated by user-level software must 1117 * be handled by the guest kernel. 1118 * 1119 * In GS mode, hypervisor privileged instructions trap 1120 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are 1121 * actual program interrupts, handled by the guest. 1122 */ 1123 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr); 1124 r = RESUME_GUEST; 1125 kvmppc_account_exit(vcpu, USR_PR_INST); 1126 break; 1127 } 1128 1129 r = emulation_exit(run, vcpu); 1130 break; 1131 1132 case BOOKE_INTERRUPT_FP_UNAVAIL: 1133 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 1134 kvmppc_account_exit(vcpu, FP_UNAVAIL); 1135 r = RESUME_GUEST; 1136 break; 1137 1138 #ifdef CONFIG_SPE 1139 case BOOKE_INTERRUPT_SPE_UNAVAIL: { 1140 if (vcpu->arch.shared->msr & MSR_SPE) 1141 kvmppc_vcpu_enable_spe(vcpu); 1142 else 1143 kvmppc_booke_queue_irqprio(vcpu, 1144 BOOKE_IRQPRIO_SPE_UNAVAIL); 1145 r = RESUME_GUEST; 1146 break; 1147 } 1148 1149 case BOOKE_INTERRUPT_SPE_FP_DATA: 1150 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA); 1151 r = RESUME_GUEST; 1152 break; 1153 1154 case BOOKE_INTERRUPT_SPE_FP_ROUND: 1155 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); 1156 r = RESUME_GUEST; 1157 break; 1158 #elif defined(CONFIG_SPE_POSSIBLE) 1159 case BOOKE_INTERRUPT_SPE_UNAVAIL: 1160 /* 1161 * Guest wants SPE, but host kernel doesn't support it. Send 1162 * an "unimplemented operation" program check to the guest. 1163 */ 1164 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); 1165 r = RESUME_GUEST; 1166 break; 1167 1168 /* 1169 * These really should never happen without CONFIG_SPE, 1170 * as we should never enable the real MSR[SPE] in the guest. 1171 */ 1172 case BOOKE_INTERRUPT_SPE_FP_DATA: 1173 case BOOKE_INTERRUPT_SPE_FP_ROUND: 1174 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", 1175 __func__, exit_nr, vcpu->arch.regs.nip); 1176 run->hw.hardware_exit_reason = exit_nr; 1177 r = RESUME_HOST; 1178 break; 1179 #endif /* CONFIG_SPE_POSSIBLE */ 1180 1181 /* 1182 * On cores with Vector category, KVM is loaded only if CONFIG_ALTIVEC, 1183 * see kvmppc_core_check_processor_compat(). 1184 */ 1185 #ifdef CONFIG_ALTIVEC 1186 case BOOKE_INTERRUPT_ALTIVEC_UNAVAIL: 1187 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_UNAVAIL); 1188 r = RESUME_GUEST; 1189 break; 1190 1191 case BOOKE_INTERRUPT_ALTIVEC_ASSIST: 1192 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALTIVEC_ASSIST); 1193 r = RESUME_GUEST; 1194 break; 1195 #endif 1196 1197 case BOOKE_INTERRUPT_DATA_STORAGE: 1198 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear, 1199 vcpu->arch.fault_esr); 1200 kvmppc_account_exit(vcpu, DSI_EXITS); 1201 r = RESUME_GUEST; 1202 break; 1203 1204 case BOOKE_INTERRUPT_INST_STORAGE: 1205 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr); 1206 kvmppc_account_exit(vcpu, ISI_EXITS); 1207 r = RESUME_GUEST; 1208 break; 1209 1210 case BOOKE_INTERRUPT_ALIGNMENT: 1211 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear, 1212 vcpu->arch.fault_esr); 1213 r = RESUME_GUEST; 1214 break; 1215 1216 #ifdef CONFIG_KVM_BOOKE_HV 1217 case BOOKE_INTERRUPT_HV_SYSCALL: 1218 if (!(vcpu->arch.shared->msr & MSR_PR)) { 1219 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1220 } else { 1221 /* 1222 * hcall from guest userspace -- send privileged 1223 * instruction program check. 1224 */ 1225 kvmppc_core_queue_program(vcpu, ESR_PPR); 1226 } 1227 1228 r = RESUME_GUEST; 1229 break; 1230 #else 1231 case BOOKE_INTERRUPT_SYSCALL: 1232 if (!(vcpu->arch.shared->msr & MSR_PR) && 1233 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 1234 /* KVM PV hypercalls */ 1235 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1236 r = RESUME_GUEST; 1237 } else { 1238 /* Guest syscalls */ 1239 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL); 1240 } 1241 kvmppc_account_exit(vcpu, SYSCALL_EXITS); 1242 r = RESUME_GUEST; 1243 break; 1244 #endif 1245 1246 case BOOKE_INTERRUPT_DTLB_MISS: { 1247 unsigned long eaddr = vcpu->arch.fault_dear; 1248 int gtlb_index; 1249 gpa_t gpaddr; 1250 gfn_t gfn; 1251 1252 #ifdef CONFIG_KVM_E500V2 1253 if (!(vcpu->arch.shared->msr & MSR_PR) && 1254 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1255 kvmppc_map_magic(vcpu); 1256 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1257 r = RESUME_GUEST; 1258 1259 break; 1260 } 1261 #endif 1262 1263 /* Check the guest TLB. */ 1264 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 1265 if (gtlb_index < 0) { 1266 /* The guest didn't have a mapping for it. */ 1267 kvmppc_core_queue_dtlb_miss(vcpu, 1268 vcpu->arch.fault_dear, 1269 vcpu->arch.fault_esr); 1270 kvmppc_mmu_dtlb_miss(vcpu); 1271 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); 1272 r = RESUME_GUEST; 1273 break; 1274 } 1275 1276 idx = srcu_read_lock(&vcpu->kvm->srcu); 1277 1278 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1279 gfn = gpaddr >> PAGE_SHIFT; 1280 1281 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1282 /* The guest TLB had a mapping, but the shadow TLB 1283 * didn't, and it is RAM. This could be because: 1284 * a) the entry is mapping the host kernel, or 1285 * b) the guest used a large mapping which we're faking 1286 * Either way, we need to satisfy the fault without 1287 * invoking the guest. */ 1288 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1289 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1290 r = RESUME_GUEST; 1291 } else { 1292 /* Guest has mapped and accessed a page which is not 1293 * actually RAM. */ 1294 vcpu->arch.paddr_accessed = gpaddr; 1295 vcpu->arch.vaddr_accessed = eaddr; 1296 r = kvmppc_emulate_mmio(run, vcpu); 1297 kvmppc_account_exit(vcpu, MMIO_EXITS); 1298 } 1299 1300 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1301 break; 1302 } 1303 1304 case BOOKE_INTERRUPT_ITLB_MISS: { 1305 unsigned long eaddr = vcpu->arch.regs.nip; 1306 gpa_t gpaddr; 1307 gfn_t gfn; 1308 int gtlb_index; 1309 1310 r = RESUME_GUEST; 1311 1312 /* Check the guest TLB. */ 1313 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 1314 if (gtlb_index < 0) { 1315 /* The guest didn't have a mapping for it. */ 1316 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 1317 kvmppc_mmu_itlb_miss(vcpu); 1318 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); 1319 break; 1320 } 1321 1322 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); 1323 1324 idx = srcu_read_lock(&vcpu->kvm->srcu); 1325 1326 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1327 gfn = gpaddr >> PAGE_SHIFT; 1328 1329 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1330 /* The guest TLB had a mapping, but the shadow TLB 1331 * didn't. This could be because: 1332 * a) the entry is mapping the host kernel, or 1333 * b) the guest used a large mapping which we're faking 1334 * Either way, we need to satisfy the fault without 1335 * invoking the guest. */ 1336 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1337 } else { 1338 /* Guest mapped and leaped at non-RAM! */ 1339 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); 1340 } 1341 1342 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1343 break; 1344 } 1345 1346 case BOOKE_INTERRUPT_DEBUG: { 1347 r = kvmppc_handle_debug(run, vcpu); 1348 if (r == RESUME_HOST) 1349 run->exit_reason = KVM_EXIT_DEBUG; 1350 kvmppc_account_exit(vcpu, DEBUG_EXITS); 1351 break; 1352 } 1353 1354 default: 1355 printk(KERN_EMERG "exit_nr %d\n", exit_nr); 1356 BUG(); 1357 } 1358 1359 out: 1360 /* 1361 * To avoid clobbering exit_reason, only check for signals if we 1362 * aren't already exiting to userspace for some other reason. 1363 */ 1364 if (!(r & RESUME_HOST)) { 1365 s = kvmppc_prepare_to_enter(vcpu); 1366 if (s <= 0) 1367 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); 1368 else { 1369 /* interrupts now hard-disabled */ 1370 kvmppc_fix_ee_before_entry(); 1371 kvmppc_load_guest_fp(vcpu); 1372 kvmppc_load_guest_altivec(vcpu); 1373 } 1374 } 1375 1376 return r; 1377 } 1378 1379 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr) 1380 { 1381 u32 old_tsr = vcpu->arch.tsr; 1382 1383 vcpu->arch.tsr = new_tsr; 1384 1385 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS)) 1386 arm_next_watchdog(vcpu); 1387 1388 update_timer_ints(vcpu); 1389 } 1390 1391 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ 1392 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 1393 { 1394 int i; 1395 int r; 1396 1397 vcpu->arch.regs.nip = 0; 1398 vcpu->arch.shared->pir = vcpu->vcpu_id; 1399 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */ 1400 kvmppc_set_msr(vcpu, 0); 1401 1402 #ifndef CONFIG_KVM_BOOKE_HV 1403 vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS; 1404 vcpu->arch.shadow_pid = 1; 1405 vcpu->arch.shared->msr = 0; 1406 #endif 1407 1408 /* Eye-catching numbers so we know if the guest takes an interrupt 1409 * before it's programmed its own IVPR/IVORs. */ 1410 vcpu->arch.ivpr = 0x55550000; 1411 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++) 1412 vcpu->arch.ivor[i] = 0x7700 | i * 4; 1413 1414 kvmppc_init_timing_stats(vcpu); 1415 1416 r = kvmppc_core_vcpu_setup(vcpu); 1417 kvmppc_sanity_check(vcpu); 1418 return r; 1419 } 1420 1421 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 1422 { 1423 /* setup watchdog timer once */ 1424 spin_lock_init(&vcpu->arch.wdt_lock); 1425 timer_setup(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 0); 1426 1427 /* 1428 * Clear DBSR.MRR to avoid guest debug interrupt as 1429 * this is of host interest 1430 */ 1431 mtspr(SPRN_DBSR, DBSR_MRR); 1432 return 0; 1433 } 1434 1435 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 1436 { 1437 del_timer_sync(&vcpu->arch.wdt_timer); 1438 } 1439 1440 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1441 { 1442 int i; 1443 1444 vcpu_load(vcpu); 1445 1446 regs->pc = vcpu->arch.regs.nip; 1447 regs->cr = kvmppc_get_cr(vcpu); 1448 regs->ctr = vcpu->arch.regs.ctr; 1449 regs->lr = vcpu->arch.regs.link; 1450 regs->xer = kvmppc_get_xer(vcpu); 1451 regs->msr = vcpu->arch.shared->msr; 1452 regs->srr0 = kvmppc_get_srr0(vcpu); 1453 regs->srr1 = kvmppc_get_srr1(vcpu); 1454 regs->pid = vcpu->arch.pid; 1455 regs->sprg0 = kvmppc_get_sprg0(vcpu); 1456 regs->sprg1 = kvmppc_get_sprg1(vcpu); 1457 regs->sprg2 = kvmppc_get_sprg2(vcpu); 1458 regs->sprg3 = kvmppc_get_sprg3(vcpu); 1459 regs->sprg4 = kvmppc_get_sprg4(vcpu); 1460 regs->sprg5 = kvmppc_get_sprg5(vcpu); 1461 regs->sprg6 = kvmppc_get_sprg6(vcpu); 1462 regs->sprg7 = kvmppc_get_sprg7(vcpu); 1463 1464 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1465 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 1466 1467 vcpu_put(vcpu); 1468 return 0; 1469 } 1470 1471 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1472 { 1473 int i; 1474 1475 vcpu_load(vcpu); 1476 1477 vcpu->arch.regs.nip = regs->pc; 1478 kvmppc_set_cr(vcpu, regs->cr); 1479 vcpu->arch.regs.ctr = regs->ctr; 1480 vcpu->arch.regs.link = regs->lr; 1481 kvmppc_set_xer(vcpu, regs->xer); 1482 kvmppc_set_msr(vcpu, regs->msr); 1483 kvmppc_set_srr0(vcpu, regs->srr0); 1484 kvmppc_set_srr1(vcpu, regs->srr1); 1485 kvmppc_set_pid(vcpu, regs->pid); 1486 kvmppc_set_sprg0(vcpu, regs->sprg0); 1487 kvmppc_set_sprg1(vcpu, regs->sprg1); 1488 kvmppc_set_sprg2(vcpu, regs->sprg2); 1489 kvmppc_set_sprg3(vcpu, regs->sprg3); 1490 kvmppc_set_sprg4(vcpu, regs->sprg4); 1491 kvmppc_set_sprg5(vcpu, regs->sprg5); 1492 kvmppc_set_sprg6(vcpu, regs->sprg6); 1493 kvmppc_set_sprg7(vcpu, regs->sprg7); 1494 1495 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1496 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 1497 1498 vcpu_put(vcpu); 1499 return 0; 1500 } 1501 1502 static void get_sregs_base(struct kvm_vcpu *vcpu, 1503 struct kvm_sregs *sregs) 1504 { 1505 u64 tb = get_tb(); 1506 1507 sregs->u.e.features |= KVM_SREGS_E_BASE; 1508 1509 sregs->u.e.csrr0 = vcpu->arch.csrr0; 1510 sregs->u.e.csrr1 = vcpu->arch.csrr1; 1511 sregs->u.e.mcsr = vcpu->arch.mcsr; 1512 sregs->u.e.esr = kvmppc_get_esr(vcpu); 1513 sregs->u.e.dear = kvmppc_get_dar(vcpu); 1514 sregs->u.e.tsr = vcpu->arch.tsr; 1515 sregs->u.e.tcr = vcpu->arch.tcr; 1516 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb); 1517 sregs->u.e.tb = tb; 1518 sregs->u.e.vrsave = vcpu->arch.vrsave; 1519 } 1520 1521 static int set_sregs_base(struct kvm_vcpu *vcpu, 1522 struct kvm_sregs *sregs) 1523 { 1524 if (!(sregs->u.e.features & KVM_SREGS_E_BASE)) 1525 return 0; 1526 1527 vcpu->arch.csrr0 = sregs->u.e.csrr0; 1528 vcpu->arch.csrr1 = sregs->u.e.csrr1; 1529 vcpu->arch.mcsr = sregs->u.e.mcsr; 1530 kvmppc_set_esr(vcpu, sregs->u.e.esr); 1531 kvmppc_set_dar(vcpu, sregs->u.e.dear); 1532 vcpu->arch.vrsave = sregs->u.e.vrsave; 1533 kvmppc_set_tcr(vcpu, sregs->u.e.tcr); 1534 1535 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) { 1536 vcpu->arch.dec = sregs->u.e.dec; 1537 kvmppc_emulate_dec(vcpu); 1538 } 1539 1540 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) 1541 kvmppc_set_tsr(vcpu, sregs->u.e.tsr); 1542 1543 return 0; 1544 } 1545 1546 static void get_sregs_arch206(struct kvm_vcpu *vcpu, 1547 struct kvm_sregs *sregs) 1548 { 1549 sregs->u.e.features |= KVM_SREGS_E_ARCH206; 1550 1551 sregs->u.e.pir = vcpu->vcpu_id; 1552 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0; 1553 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1; 1554 sregs->u.e.decar = vcpu->arch.decar; 1555 sregs->u.e.ivpr = vcpu->arch.ivpr; 1556 } 1557 1558 static int set_sregs_arch206(struct kvm_vcpu *vcpu, 1559 struct kvm_sregs *sregs) 1560 { 1561 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206)) 1562 return 0; 1563 1564 if (sregs->u.e.pir != vcpu->vcpu_id) 1565 return -EINVAL; 1566 1567 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0; 1568 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1; 1569 vcpu->arch.decar = sregs->u.e.decar; 1570 vcpu->arch.ivpr = sregs->u.e.ivpr; 1571 1572 return 0; 1573 } 1574 1575 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1576 { 1577 sregs->u.e.features |= KVM_SREGS_E_IVOR; 1578 1579 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; 1580 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; 1581 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; 1582 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; 1583 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; 1584 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; 1585 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; 1586 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; 1587 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; 1588 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; 1589 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; 1590 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; 1591 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; 1592 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; 1593 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; 1594 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; 1595 return 0; 1596 } 1597 1598 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1599 { 1600 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR)) 1601 return 0; 1602 1603 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0]; 1604 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1]; 1605 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2]; 1606 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3]; 1607 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4]; 1608 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5]; 1609 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6]; 1610 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7]; 1611 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8]; 1612 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9]; 1613 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10]; 1614 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11]; 1615 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12]; 1616 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13]; 1617 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14]; 1618 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15]; 1619 1620 return 0; 1621 } 1622 1623 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 1624 struct kvm_sregs *sregs) 1625 { 1626 int ret; 1627 1628 vcpu_load(vcpu); 1629 1630 sregs->pvr = vcpu->arch.pvr; 1631 1632 get_sregs_base(vcpu, sregs); 1633 get_sregs_arch206(vcpu, sregs); 1634 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs); 1635 1636 vcpu_put(vcpu); 1637 return ret; 1638 } 1639 1640 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 1641 struct kvm_sregs *sregs) 1642 { 1643 int ret = -EINVAL; 1644 1645 vcpu_load(vcpu); 1646 if (vcpu->arch.pvr != sregs->pvr) 1647 goto out; 1648 1649 ret = set_sregs_base(vcpu, sregs); 1650 if (ret < 0) 1651 goto out; 1652 1653 ret = set_sregs_arch206(vcpu, sregs); 1654 if (ret < 0) 1655 goto out; 1656 1657 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs); 1658 1659 out: 1660 vcpu_put(vcpu); 1661 return ret; 1662 } 1663 1664 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, 1665 union kvmppc_one_reg *val) 1666 { 1667 int r = 0; 1668 1669 switch (id) { 1670 case KVM_REG_PPC_IAC1: 1671 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac1); 1672 break; 1673 case KVM_REG_PPC_IAC2: 1674 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac2); 1675 break; 1676 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1677 case KVM_REG_PPC_IAC3: 1678 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac3); 1679 break; 1680 case KVM_REG_PPC_IAC4: 1681 *val = get_reg_val(id, vcpu->arch.dbg_reg.iac4); 1682 break; 1683 #endif 1684 case KVM_REG_PPC_DAC1: 1685 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac1); 1686 break; 1687 case KVM_REG_PPC_DAC2: 1688 *val = get_reg_val(id, vcpu->arch.dbg_reg.dac2); 1689 break; 1690 case KVM_REG_PPC_EPR: { 1691 u32 epr = kvmppc_get_epr(vcpu); 1692 *val = get_reg_val(id, epr); 1693 break; 1694 } 1695 #if defined(CONFIG_64BIT) 1696 case KVM_REG_PPC_EPCR: 1697 *val = get_reg_val(id, vcpu->arch.epcr); 1698 break; 1699 #endif 1700 case KVM_REG_PPC_TCR: 1701 *val = get_reg_val(id, vcpu->arch.tcr); 1702 break; 1703 case KVM_REG_PPC_TSR: 1704 *val = get_reg_val(id, vcpu->arch.tsr); 1705 break; 1706 case KVM_REG_PPC_DEBUG_INST: 1707 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 1708 break; 1709 case KVM_REG_PPC_VRSAVE: 1710 *val = get_reg_val(id, vcpu->arch.vrsave); 1711 break; 1712 default: 1713 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val); 1714 break; 1715 } 1716 1717 return r; 1718 } 1719 1720 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, 1721 union kvmppc_one_reg *val) 1722 { 1723 int r = 0; 1724 1725 switch (id) { 1726 case KVM_REG_PPC_IAC1: 1727 vcpu->arch.dbg_reg.iac1 = set_reg_val(id, *val); 1728 break; 1729 case KVM_REG_PPC_IAC2: 1730 vcpu->arch.dbg_reg.iac2 = set_reg_val(id, *val); 1731 break; 1732 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1733 case KVM_REG_PPC_IAC3: 1734 vcpu->arch.dbg_reg.iac3 = set_reg_val(id, *val); 1735 break; 1736 case KVM_REG_PPC_IAC4: 1737 vcpu->arch.dbg_reg.iac4 = set_reg_val(id, *val); 1738 break; 1739 #endif 1740 case KVM_REG_PPC_DAC1: 1741 vcpu->arch.dbg_reg.dac1 = set_reg_val(id, *val); 1742 break; 1743 case KVM_REG_PPC_DAC2: 1744 vcpu->arch.dbg_reg.dac2 = set_reg_val(id, *val); 1745 break; 1746 case KVM_REG_PPC_EPR: { 1747 u32 new_epr = set_reg_val(id, *val); 1748 kvmppc_set_epr(vcpu, new_epr); 1749 break; 1750 } 1751 #if defined(CONFIG_64BIT) 1752 case KVM_REG_PPC_EPCR: { 1753 u32 new_epcr = set_reg_val(id, *val); 1754 kvmppc_set_epcr(vcpu, new_epcr); 1755 break; 1756 } 1757 #endif 1758 case KVM_REG_PPC_OR_TSR: { 1759 u32 tsr_bits = set_reg_val(id, *val); 1760 kvmppc_set_tsr_bits(vcpu, tsr_bits); 1761 break; 1762 } 1763 case KVM_REG_PPC_CLEAR_TSR: { 1764 u32 tsr_bits = set_reg_val(id, *val); 1765 kvmppc_clr_tsr_bits(vcpu, tsr_bits); 1766 break; 1767 } 1768 case KVM_REG_PPC_TSR: { 1769 u32 tsr = set_reg_val(id, *val); 1770 kvmppc_set_tsr(vcpu, tsr); 1771 break; 1772 } 1773 case KVM_REG_PPC_TCR: { 1774 u32 tcr = set_reg_val(id, *val); 1775 kvmppc_set_tcr(vcpu, tcr); 1776 break; 1777 } 1778 case KVM_REG_PPC_VRSAVE: 1779 vcpu->arch.vrsave = set_reg_val(id, *val); 1780 break; 1781 default: 1782 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val); 1783 break; 1784 } 1785 1786 return r; 1787 } 1788 1789 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1790 { 1791 return -ENOTSUPP; 1792 } 1793 1794 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1795 { 1796 return -ENOTSUPP; 1797 } 1798 1799 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 1800 struct kvm_translation *tr) 1801 { 1802 int r; 1803 1804 vcpu_load(vcpu); 1805 r = kvmppc_core_vcpu_translate(vcpu, tr); 1806 vcpu_put(vcpu); 1807 return r; 1808 } 1809 1810 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 1811 { 1812 return -ENOTSUPP; 1813 } 1814 1815 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, 1816 struct kvm_memory_slot *dont) 1817 { 1818 } 1819 1820 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, 1821 unsigned long npages) 1822 { 1823 return 0; 1824 } 1825 1826 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 1827 struct kvm_memory_slot *memslot, 1828 const struct kvm_userspace_memory_region *mem) 1829 { 1830 return 0; 1831 } 1832 1833 void kvmppc_core_commit_memory_region(struct kvm *kvm, 1834 const struct kvm_userspace_memory_region *mem, 1835 const struct kvm_memory_slot *old, 1836 const struct kvm_memory_slot *new, 1837 enum kvm_mr_change change) 1838 { 1839 } 1840 1841 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 1842 { 1843 } 1844 1845 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr) 1846 { 1847 #if defined(CONFIG_64BIT) 1848 vcpu->arch.epcr = new_epcr; 1849 #ifdef CONFIG_KVM_BOOKE_HV 1850 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM; 1851 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 1852 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM; 1853 #endif 1854 #endif 1855 } 1856 1857 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr) 1858 { 1859 vcpu->arch.tcr = new_tcr; 1860 arm_next_watchdog(vcpu); 1861 update_timer_ints(vcpu); 1862 } 1863 1864 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1865 { 1866 set_bits(tsr_bits, &vcpu->arch.tsr); 1867 smp_wmb(); 1868 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 1869 kvm_vcpu_kick(vcpu); 1870 } 1871 1872 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1873 { 1874 clear_bits(tsr_bits, &vcpu->arch.tsr); 1875 1876 /* 1877 * We may have stopped the watchdog due to 1878 * being stuck on final expiration. 1879 */ 1880 if (tsr_bits & (TSR_ENW | TSR_WIS)) 1881 arm_next_watchdog(vcpu); 1882 1883 update_timer_ints(vcpu); 1884 } 1885 1886 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu) 1887 { 1888 if (vcpu->arch.tcr & TCR_ARE) { 1889 vcpu->arch.dec = vcpu->arch.decar; 1890 kvmppc_emulate_dec(vcpu); 1891 } 1892 1893 kvmppc_set_tsr_bits(vcpu, TSR_DIS); 1894 } 1895 1896 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg, 1897 uint64_t addr, int index) 1898 { 1899 switch (index) { 1900 case 0: 1901 dbg_reg->dbcr0 |= DBCR0_IAC1; 1902 dbg_reg->iac1 = addr; 1903 break; 1904 case 1: 1905 dbg_reg->dbcr0 |= DBCR0_IAC2; 1906 dbg_reg->iac2 = addr; 1907 break; 1908 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1909 case 2: 1910 dbg_reg->dbcr0 |= DBCR0_IAC3; 1911 dbg_reg->iac3 = addr; 1912 break; 1913 case 3: 1914 dbg_reg->dbcr0 |= DBCR0_IAC4; 1915 dbg_reg->iac4 = addr; 1916 break; 1917 #endif 1918 default: 1919 return -EINVAL; 1920 } 1921 1922 dbg_reg->dbcr0 |= DBCR0_IDM; 1923 return 0; 1924 } 1925 1926 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr, 1927 int type, int index) 1928 { 1929 switch (index) { 1930 case 0: 1931 if (type & KVMPPC_DEBUG_WATCH_READ) 1932 dbg_reg->dbcr0 |= DBCR0_DAC1R; 1933 if (type & KVMPPC_DEBUG_WATCH_WRITE) 1934 dbg_reg->dbcr0 |= DBCR0_DAC1W; 1935 dbg_reg->dac1 = addr; 1936 break; 1937 case 1: 1938 if (type & KVMPPC_DEBUG_WATCH_READ) 1939 dbg_reg->dbcr0 |= DBCR0_DAC2R; 1940 if (type & KVMPPC_DEBUG_WATCH_WRITE) 1941 dbg_reg->dbcr0 |= DBCR0_DAC2W; 1942 dbg_reg->dac2 = addr; 1943 break; 1944 default: 1945 return -EINVAL; 1946 } 1947 1948 dbg_reg->dbcr0 |= DBCR0_IDM; 1949 return 0; 1950 } 1951 void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set) 1952 { 1953 /* XXX: Add similar MSR protection for BookE-PR */ 1954 #ifdef CONFIG_KVM_BOOKE_HV 1955 BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP)); 1956 if (set) { 1957 if (prot_bitmap & MSR_UCLE) 1958 vcpu->arch.shadow_msrp |= MSRP_UCLEP; 1959 if (prot_bitmap & MSR_DE) 1960 vcpu->arch.shadow_msrp |= MSRP_DEP; 1961 if (prot_bitmap & MSR_PMM) 1962 vcpu->arch.shadow_msrp |= MSRP_PMMP; 1963 } else { 1964 if (prot_bitmap & MSR_UCLE) 1965 vcpu->arch.shadow_msrp &= ~MSRP_UCLEP; 1966 if (prot_bitmap & MSR_DE) 1967 vcpu->arch.shadow_msrp &= ~MSRP_DEP; 1968 if (prot_bitmap & MSR_PMM) 1969 vcpu->arch.shadow_msrp &= ~MSRP_PMMP; 1970 } 1971 #endif 1972 } 1973 1974 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid, 1975 enum xlate_readwrite xlrw, struct kvmppc_pte *pte) 1976 { 1977 int gtlb_index; 1978 gpa_t gpaddr; 1979 1980 #ifdef CONFIG_KVM_E500V2 1981 if (!(vcpu->arch.shared->msr & MSR_PR) && 1982 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1983 pte->eaddr = eaddr; 1984 pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) | 1985 (eaddr & ~PAGE_MASK); 1986 pte->vpage = eaddr >> PAGE_SHIFT; 1987 pte->may_read = true; 1988 pte->may_write = true; 1989 pte->may_execute = true; 1990 1991 return 0; 1992 } 1993 #endif 1994 1995 /* Check the guest TLB. */ 1996 switch (xlid) { 1997 case XLATE_INST: 1998 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 1999 break; 2000 case XLATE_DATA: 2001 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 2002 break; 2003 default: 2004 BUG(); 2005 } 2006 2007 /* Do we have a TLB entry at all? */ 2008 if (gtlb_index < 0) 2009 return -ENOENT; 2010 2011 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 2012 2013 pte->eaddr = eaddr; 2014 pte->raddr = (gpaddr & PAGE_MASK) | (eaddr & ~PAGE_MASK); 2015 pte->vpage = eaddr >> PAGE_SHIFT; 2016 2017 /* XXX read permissions from the guest TLB */ 2018 pte->may_read = true; 2019 pte->may_write = true; 2020 pte->may_execute = true; 2021 2022 return 0; 2023 } 2024 2025 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 2026 struct kvm_guest_debug *dbg) 2027 { 2028 struct debug_reg *dbg_reg; 2029 int n, b = 0, w = 0; 2030 int ret = 0; 2031 2032 vcpu_load(vcpu); 2033 2034 if (!(dbg->control & KVM_GUESTDBG_ENABLE)) { 2035 vcpu->arch.dbg_reg.dbcr0 = 0; 2036 vcpu->guest_debug = 0; 2037 kvm_guest_protect_msr(vcpu, MSR_DE, false); 2038 goto out; 2039 } 2040 2041 kvm_guest_protect_msr(vcpu, MSR_DE, true); 2042 vcpu->guest_debug = dbg->control; 2043 vcpu->arch.dbg_reg.dbcr0 = 0; 2044 2045 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) 2046 vcpu->arch.dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC; 2047 2048 /* Code below handles only HW breakpoints */ 2049 dbg_reg = &(vcpu->arch.dbg_reg); 2050 2051 #ifdef CONFIG_KVM_BOOKE_HV 2052 /* 2053 * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1 2054 * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0 2055 */ 2056 dbg_reg->dbcr1 = 0; 2057 dbg_reg->dbcr2 = 0; 2058 #else 2059 /* 2060 * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1 2061 * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR 2062 * is set. 2063 */ 2064 dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US | 2065 DBCR1_IAC4US; 2066 dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 2067 #endif 2068 2069 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) 2070 goto out; 2071 2072 ret = -EINVAL; 2073 for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) { 2074 uint64_t addr = dbg->arch.bp[n].addr; 2075 uint32_t type = dbg->arch.bp[n].type; 2076 2077 if (type == KVMPPC_DEBUG_NONE) 2078 continue; 2079 2080 if (type & ~(KVMPPC_DEBUG_WATCH_READ | 2081 KVMPPC_DEBUG_WATCH_WRITE | 2082 KVMPPC_DEBUG_BREAKPOINT)) 2083 goto out; 2084 2085 if (type & KVMPPC_DEBUG_BREAKPOINT) { 2086 /* Setting H/W breakpoint */ 2087 if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++)) 2088 goto out; 2089 } else { 2090 /* Setting H/W watchpoint */ 2091 if (kvmppc_booke_add_watchpoint(dbg_reg, addr, 2092 type, w++)) 2093 goto out; 2094 } 2095 } 2096 2097 ret = 0; 2098 out: 2099 vcpu_put(vcpu); 2100 return ret; 2101 } 2102 2103 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 2104 { 2105 vcpu->cpu = smp_processor_id(); 2106 current->thread.kvm_vcpu = vcpu; 2107 } 2108 2109 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu) 2110 { 2111 current->thread.kvm_vcpu = NULL; 2112 vcpu->cpu = -1; 2113 2114 /* Clear pending debug event in DBSR */ 2115 kvmppc_clear_dbsr(); 2116 } 2117 2118 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) 2119 { 2120 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu); 2121 } 2122 2123 int kvmppc_core_init_vm(struct kvm *kvm) 2124 { 2125 return kvm->arch.kvm_ops->init_vm(kvm); 2126 } 2127 2128 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) 2129 { 2130 return kvm->arch.kvm_ops->vcpu_create(kvm, id); 2131 } 2132 2133 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) 2134 { 2135 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 2136 } 2137 2138 void kvmppc_core_destroy_vm(struct kvm *kvm) 2139 { 2140 kvm->arch.kvm_ops->destroy_vm(kvm); 2141 } 2142 2143 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 2144 { 2145 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu); 2146 } 2147 2148 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) 2149 { 2150 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu); 2151 } 2152 2153 int __init kvmppc_booke_init(void) 2154 { 2155 #ifndef CONFIG_KVM_BOOKE_HV 2156 unsigned long ivor[16]; 2157 unsigned long *handler = kvmppc_booke_handler_addr; 2158 unsigned long max_ivor = 0; 2159 unsigned long handler_len; 2160 int i; 2161 2162 /* We install our own exception handlers by hijacking IVPR. IVPR must 2163 * be 16-bit aligned, so we need a 64KB allocation. */ 2164 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 2165 VCPU_SIZE_ORDER); 2166 if (!kvmppc_booke_handlers) 2167 return -ENOMEM; 2168 2169 /* XXX make sure our handlers are smaller than Linux's */ 2170 2171 /* Copy our interrupt handlers to match host IVORs. That way we don't 2172 * have to swap the IVORs on every guest/host transition. */ 2173 ivor[0] = mfspr(SPRN_IVOR0); 2174 ivor[1] = mfspr(SPRN_IVOR1); 2175 ivor[2] = mfspr(SPRN_IVOR2); 2176 ivor[3] = mfspr(SPRN_IVOR3); 2177 ivor[4] = mfspr(SPRN_IVOR4); 2178 ivor[5] = mfspr(SPRN_IVOR5); 2179 ivor[6] = mfspr(SPRN_IVOR6); 2180 ivor[7] = mfspr(SPRN_IVOR7); 2181 ivor[8] = mfspr(SPRN_IVOR8); 2182 ivor[9] = mfspr(SPRN_IVOR9); 2183 ivor[10] = mfspr(SPRN_IVOR10); 2184 ivor[11] = mfspr(SPRN_IVOR11); 2185 ivor[12] = mfspr(SPRN_IVOR12); 2186 ivor[13] = mfspr(SPRN_IVOR13); 2187 ivor[14] = mfspr(SPRN_IVOR14); 2188 ivor[15] = mfspr(SPRN_IVOR15); 2189 2190 for (i = 0; i < 16; i++) { 2191 if (ivor[i] > max_ivor) 2192 max_ivor = i; 2193 2194 handler_len = handler[i + 1] - handler[i]; 2195 memcpy((void *)kvmppc_booke_handlers + ivor[i], 2196 (void *)handler[i], handler_len); 2197 } 2198 2199 handler_len = handler[max_ivor + 1] - handler[max_ivor]; 2200 flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers + 2201 ivor[max_ivor] + handler_len); 2202 #endif /* !BOOKE_HV */ 2203 return 0; 2204 } 2205 2206 void __exit kvmppc_booke_exit(void) 2207 { 2208 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); 2209 kvm_exit(); 2210 } 2211