1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License, version 2, as 4 * published by the Free Software Foundation. 5 * 6 * This program is distributed in the hope that it will be useful, 7 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * GNU General Public License for more details. 10 * 11 * You should have received a copy of the GNU General Public License 12 * along with this program; if not, write to the Free Software 13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14 * 15 * Copyright IBM Corp. 2007 16 * Copyright 2010-2011 Freescale Semiconductor, Inc. 17 * 18 * Authors: Hollis Blanchard <hollisb@us.ibm.com> 19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 20 * Scott Wood <scottwood@freescale.com> 21 * Varun Sethi <varun.sethi@freescale.com> 22 */ 23 24 #include <linux/errno.h> 25 #include <linux/err.h> 26 #include <linux/kvm_host.h> 27 #include <linux/gfp.h> 28 #include <linux/module.h> 29 #include <linux/vmalloc.h> 30 #include <linux/fs.h> 31 32 #include <asm/cputable.h> 33 #include <asm/uaccess.h> 34 #include <asm/kvm_ppc.h> 35 #include <asm/cacheflush.h> 36 #include <asm/dbell.h> 37 #include <asm/hw_irq.h> 38 #include <asm/irq.h> 39 #include <asm/time.h> 40 41 #include "timing.h" 42 #include "booke.h" 43 44 #define CREATE_TRACE_POINTS 45 #include "trace_booke.h" 46 47 unsigned long kvmppc_booke_handlers; 48 49 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM 50 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 51 52 struct kvm_stats_debugfs_item debugfs_entries[] = { 53 { "mmio", VCPU_STAT(mmio_exits) }, 54 { "sig", VCPU_STAT(signal_exits) }, 55 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) }, 56 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) }, 57 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) }, 58 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) }, 59 { "sysc", VCPU_STAT(syscall_exits) }, 60 { "isi", VCPU_STAT(isi_exits) }, 61 { "dsi", VCPU_STAT(dsi_exits) }, 62 { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 63 { "dec", VCPU_STAT(dec_exits) }, 64 { "ext_intr", VCPU_STAT(ext_intr_exits) }, 65 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 66 { "doorbell", VCPU_STAT(dbell_exits) }, 67 { "guest doorbell", VCPU_STAT(gdbell_exits) }, 68 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) }, 69 { NULL } 70 }; 71 72 /* TODO: use vcpu_printf() */ 73 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) 74 { 75 int i; 76 77 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr); 78 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr); 79 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, 80 vcpu->arch.shared->srr1); 81 82 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); 83 84 for (i = 0; i < 32; i += 4) { 85 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, 86 kvmppc_get_gpr(vcpu, i), 87 kvmppc_get_gpr(vcpu, i+1), 88 kvmppc_get_gpr(vcpu, i+2), 89 kvmppc_get_gpr(vcpu, i+3)); 90 } 91 } 92 93 #ifdef CONFIG_SPE 94 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) 95 { 96 preempt_disable(); 97 enable_kernel_spe(); 98 kvmppc_save_guest_spe(vcpu); 99 vcpu->arch.shadow_msr &= ~MSR_SPE; 100 preempt_enable(); 101 } 102 103 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) 104 { 105 preempt_disable(); 106 enable_kernel_spe(); 107 kvmppc_load_guest_spe(vcpu); 108 vcpu->arch.shadow_msr |= MSR_SPE; 109 preempt_enable(); 110 } 111 112 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 113 { 114 if (vcpu->arch.shared->msr & MSR_SPE) { 115 if (!(vcpu->arch.shadow_msr & MSR_SPE)) 116 kvmppc_vcpu_enable_spe(vcpu); 117 } else if (vcpu->arch.shadow_msr & MSR_SPE) { 118 kvmppc_vcpu_disable_spe(vcpu); 119 } 120 } 121 #else 122 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 123 { 124 } 125 #endif 126 127 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu) 128 { 129 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV) 130 /* We always treat the FP bit as enabled from the host 131 perspective, so only need to adjust the shadow MSR */ 132 vcpu->arch.shadow_msr &= ~MSR_FP; 133 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP; 134 #endif 135 } 136 137 static void kvmppc_vcpu_sync_debug(struct kvm_vcpu *vcpu) 138 { 139 /* Synchronize guest's desire to get debug interrupts into shadow MSR */ 140 #ifndef CONFIG_KVM_BOOKE_HV 141 vcpu->arch.shadow_msr &= ~MSR_DE; 142 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_DE; 143 #endif 144 145 /* Force enable debug interrupts when user space wants to debug */ 146 if (vcpu->guest_debug) { 147 #ifdef CONFIG_KVM_BOOKE_HV 148 /* 149 * Since there is no shadow MSR, sync MSR_DE into the guest 150 * visible MSR. 151 */ 152 vcpu->arch.shared->msr |= MSR_DE; 153 #else 154 vcpu->arch.shadow_msr |= MSR_DE; 155 vcpu->arch.shared->msr &= ~MSR_DE; 156 #endif 157 } 158 } 159 160 /* 161 * Helper function for "full" MSR writes. No need to call this if only 162 * EE/CE/ME/DE/RI are changing. 163 */ 164 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) 165 { 166 u32 old_msr = vcpu->arch.shared->msr; 167 168 #ifdef CONFIG_KVM_BOOKE_HV 169 new_msr |= MSR_GS; 170 #endif 171 172 vcpu->arch.shared->msr = new_msr; 173 174 kvmppc_mmu_msr_notify(vcpu, old_msr); 175 kvmppc_vcpu_sync_spe(vcpu); 176 kvmppc_vcpu_sync_fpu(vcpu); 177 kvmppc_vcpu_sync_debug(vcpu); 178 } 179 180 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, 181 unsigned int priority) 182 { 183 trace_kvm_booke_queue_irqprio(vcpu, priority); 184 set_bit(priority, &vcpu->arch.pending_exceptions); 185 } 186 187 void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu, 188 ulong dear_flags, ulong esr_flags) 189 { 190 vcpu->arch.queued_dear = dear_flags; 191 vcpu->arch.queued_esr = esr_flags; 192 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); 193 } 194 195 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, 196 ulong dear_flags, ulong esr_flags) 197 { 198 vcpu->arch.queued_dear = dear_flags; 199 vcpu->arch.queued_esr = esr_flags; 200 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE); 201 } 202 203 void kvmppc_core_queue_itlb_miss(struct kvm_vcpu *vcpu) 204 { 205 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 206 } 207 208 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong esr_flags) 209 { 210 vcpu->arch.queued_esr = esr_flags; 211 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE); 212 } 213 214 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags, 215 ulong esr_flags) 216 { 217 vcpu->arch.queued_dear = dear_flags; 218 vcpu->arch.queued_esr = esr_flags; 219 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT); 220 } 221 222 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags) 223 { 224 vcpu->arch.queued_esr = esr_flags; 225 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); 226 } 227 228 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 229 { 230 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER); 231 } 232 233 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 234 { 235 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 236 } 237 238 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 239 { 240 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 241 } 242 243 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 244 struct kvm_interrupt *irq) 245 { 246 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL; 247 248 if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 249 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL; 250 251 kvmppc_booke_queue_irqprio(vcpu, prio); 252 } 253 254 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 255 { 256 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); 257 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions); 258 } 259 260 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu) 261 { 262 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG); 263 } 264 265 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu) 266 { 267 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions); 268 } 269 270 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 271 { 272 kvmppc_set_srr0(vcpu, srr0); 273 kvmppc_set_srr1(vcpu, srr1); 274 } 275 276 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 277 { 278 vcpu->arch.csrr0 = srr0; 279 vcpu->arch.csrr1 = srr1; 280 } 281 282 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 283 { 284 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) { 285 vcpu->arch.dsrr0 = srr0; 286 vcpu->arch.dsrr1 = srr1; 287 } else { 288 set_guest_csrr(vcpu, srr0, srr1); 289 } 290 } 291 292 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 293 { 294 vcpu->arch.mcsrr0 = srr0; 295 vcpu->arch.mcsrr1 = srr1; 296 } 297 298 /* Deliver the interrupt of the corresponding priority, if possible. */ 299 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, 300 unsigned int priority) 301 { 302 int allowed = 0; 303 ulong msr_mask = 0; 304 bool update_esr = false, update_dear = false, update_epr = false; 305 ulong crit_raw = vcpu->arch.shared->critical; 306 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1); 307 bool crit; 308 bool keep_irq = false; 309 enum int_class int_class; 310 ulong new_msr = vcpu->arch.shared->msr; 311 312 /* Truncate crit indicators in 32 bit mode */ 313 if (!(vcpu->arch.shared->msr & MSR_SF)) { 314 crit_raw &= 0xffffffff; 315 crit_r1 &= 0xffffffff; 316 } 317 318 /* Critical section when crit == r1 */ 319 crit = (crit_raw == crit_r1); 320 /* ... and we're in supervisor mode */ 321 crit = crit && !(vcpu->arch.shared->msr & MSR_PR); 322 323 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) { 324 priority = BOOKE_IRQPRIO_EXTERNAL; 325 keep_irq = true; 326 } 327 328 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags) 329 update_epr = true; 330 331 switch (priority) { 332 case BOOKE_IRQPRIO_DTLB_MISS: 333 case BOOKE_IRQPRIO_DATA_STORAGE: 334 case BOOKE_IRQPRIO_ALIGNMENT: 335 update_dear = true; 336 /* fall through */ 337 case BOOKE_IRQPRIO_INST_STORAGE: 338 case BOOKE_IRQPRIO_PROGRAM: 339 update_esr = true; 340 /* fall through */ 341 case BOOKE_IRQPRIO_ITLB_MISS: 342 case BOOKE_IRQPRIO_SYSCALL: 343 case BOOKE_IRQPRIO_FP_UNAVAIL: 344 case BOOKE_IRQPRIO_SPE_UNAVAIL: 345 case BOOKE_IRQPRIO_SPE_FP_DATA: 346 case BOOKE_IRQPRIO_SPE_FP_ROUND: 347 case BOOKE_IRQPRIO_AP_UNAVAIL: 348 allowed = 1; 349 msr_mask = MSR_CE | MSR_ME | MSR_DE; 350 int_class = INT_CLASS_NONCRIT; 351 break; 352 case BOOKE_IRQPRIO_WATCHDOG: 353 case BOOKE_IRQPRIO_CRITICAL: 354 case BOOKE_IRQPRIO_DBELL_CRIT: 355 allowed = vcpu->arch.shared->msr & MSR_CE; 356 allowed = allowed && !crit; 357 msr_mask = MSR_ME; 358 int_class = INT_CLASS_CRIT; 359 break; 360 case BOOKE_IRQPRIO_MACHINE_CHECK: 361 allowed = vcpu->arch.shared->msr & MSR_ME; 362 allowed = allowed && !crit; 363 int_class = INT_CLASS_MC; 364 break; 365 case BOOKE_IRQPRIO_DECREMENTER: 366 case BOOKE_IRQPRIO_FIT: 367 keep_irq = true; 368 /* fall through */ 369 case BOOKE_IRQPRIO_EXTERNAL: 370 case BOOKE_IRQPRIO_DBELL: 371 allowed = vcpu->arch.shared->msr & MSR_EE; 372 allowed = allowed && !crit; 373 msr_mask = MSR_CE | MSR_ME | MSR_DE; 374 int_class = INT_CLASS_NONCRIT; 375 break; 376 case BOOKE_IRQPRIO_DEBUG: 377 allowed = vcpu->arch.shared->msr & MSR_DE; 378 allowed = allowed && !crit; 379 msr_mask = MSR_ME; 380 int_class = INT_CLASS_CRIT; 381 break; 382 } 383 384 if (allowed) { 385 switch (int_class) { 386 case INT_CLASS_NONCRIT: 387 set_guest_srr(vcpu, vcpu->arch.pc, 388 vcpu->arch.shared->msr); 389 break; 390 case INT_CLASS_CRIT: 391 set_guest_csrr(vcpu, vcpu->arch.pc, 392 vcpu->arch.shared->msr); 393 break; 394 case INT_CLASS_DBG: 395 set_guest_dsrr(vcpu, vcpu->arch.pc, 396 vcpu->arch.shared->msr); 397 break; 398 case INT_CLASS_MC: 399 set_guest_mcsrr(vcpu, vcpu->arch.pc, 400 vcpu->arch.shared->msr); 401 break; 402 } 403 404 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority]; 405 if (update_esr == true) 406 kvmppc_set_esr(vcpu, vcpu->arch.queued_esr); 407 if (update_dear == true) 408 kvmppc_set_dar(vcpu, vcpu->arch.queued_dear); 409 if (update_epr == true) { 410 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER) 411 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu); 412 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) { 413 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC); 414 kvmppc_mpic_set_epr(vcpu); 415 } 416 } 417 418 new_msr &= msr_mask; 419 #if defined(CONFIG_64BIT) 420 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 421 new_msr |= MSR_CM; 422 #endif 423 kvmppc_set_msr(vcpu, new_msr); 424 425 if (!keep_irq) 426 clear_bit(priority, &vcpu->arch.pending_exceptions); 427 } 428 429 #ifdef CONFIG_KVM_BOOKE_HV 430 /* 431 * If an interrupt is pending but masked, raise a guest doorbell 432 * so that we are notified when the guest enables the relevant 433 * MSR bit. 434 */ 435 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE) 436 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT); 437 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE) 438 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT); 439 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK) 440 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC); 441 #endif 442 443 return allowed; 444 } 445 446 /* 447 * Return the number of jiffies until the next timeout. If the timeout is 448 * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA 449 * because the larger value can break the timer APIs. 450 */ 451 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu) 452 { 453 u64 tb, wdt_tb, wdt_ticks = 0; 454 u64 nr_jiffies = 0; 455 u32 period = TCR_GET_WP(vcpu->arch.tcr); 456 457 wdt_tb = 1ULL << (63 - period); 458 tb = get_tb(); 459 /* 460 * The watchdog timeout will hapeen when TB bit corresponding 461 * to watchdog will toggle from 0 to 1. 462 */ 463 if (tb & wdt_tb) 464 wdt_ticks = wdt_tb; 465 466 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1)); 467 468 /* Convert timebase ticks to jiffies */ 469 nr_jiffies = wdt_ticks; 470 471 if (do_div(nr_jiffies, tb_ticks_per_jiffy)) 472 nr_jiffies++; 473 474 return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA); 475 } 476 477 static void arm_next_watchdog(struct kvm_vcpu *vcpu) 478 { 479 unsigned long nr_jiffies; 480 unsigned long flags; 481 482 /* 483 * If TSR_ENW and TSR_WIS are not set then no need to exit to 484 * userspace, so clear the KVM_REQ_WATCHDOG request. 485 */ 486 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS)) 487 clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests); 488 489 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags); 490 nr_jiffies = watchdog_next_timeout(vcpu); 491 /* 492 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA 493 * then do not run the watchdog timer as this can break timer APIs. 494 */ 495 if (nr_jiffies < NEXT_TIMER_MAX_DELTA) 496 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies); 497 else 498 del_timer(&vcpu->arch.wdt_timer); 499 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags); 500 } 501 502 void kvmppc_watchdog_func(unsigned long data) 503 { 504 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; 505 u32 tsr, new_tsr; 506 int final; 507 508 do { 509 new_tsr = tsr = vcpu->arch.tsr; 510 final = 0; 511 512 /* Time out event */ 513 if (tsr & TSR_ENW) { 514 if (tsr & TSR_WIS) 515 final = 1; 516 else 517 new_tsr = tsr | TSR_WIS; 518 } else { 519 new_tsr = tsr | TSR_ENW; 520 } 521 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr); 522 523 if (new_tsr & TSR_WIS) { 524 smp_wmb(); 525 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 526 kvm_vcpu_kick(vcpu); 527 } 528 529 /* 530 * If this is final watchdog expiry and some action is required 531 * then exit to userspace. 532 */ 533 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) && 534 vcpu->arch.watchdog_enabled) { 535 smp_wmb(); 536 kvm_make_request(KVM_REQ_WATCHDOG, vcpu); 537 kvm_vcpu_kick(vcpu); 538 } 539 540 /* 541 * Stop running the watchdog timer after final expiration to 542 * prevent the host from being flooded with timers if the 543 * guest sets a short period. 544 * Timers will resume when TSR/TCR is updated next time. 545 */ 546 if (!final) 547 arm_next_watchdog(vcpu); 548 } 549 550 static void update_timer_ints(struct kvm_vcpu *vcpu) 551 { 552 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) 553 kvmppc_core_queue_dec(vcpu); 554 else 555 kvmppc_core_dequeue_dec(vcpu); 556 557 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) 558 kvmppc_core_queue_watchdog(vcpu); 559 else 560 kvmppc_core_dequeue_watchdog(vcpu); 561 } 562 563 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu) 564 { 565 unsigned long *pending = &vcpu->arch.pending_exceptions; 566 unsigned int priority; 567 568 priority = __ffs(*pending); 569 while (priority < BOOKE_IRQPRIO_MAX) { 570 if (kvmppc_booke_irqprio_deliver(vcpu, priority)) 571 break; 572 573 priority = find_next_bit(pending, 574 BITS_PER_BYTE * sizeof(*pending), 575 priority + 1); 576 } 577 578 /* Tell the guest about our interrupt status */ 579 vcpu->arch.shared->int_pending = !!*pending; 580 } 581 582 /* Check pending exceptions and deliver one, if possible. */ 583 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 584 { 585 int r = 0; 586 WARN_ON_ONCE(!irqs_disabled()); 587 588 kvmppc_core_check_exceptions(vcpu); 589 590 if (vcpu->requests) { 591 /* Exception delivery raised request; start over */ 592 return 1; 593 } 594 595 if (vcpu->arch.shared->msr & MSR_WE) { 596 local_irq_enable(); 597 kvm_vcpu_block(vcpu); 598 clear_bit(KVM_REQ_UNHALT, &vcpu->requests); 599 hard_irq_disable(); 600 601 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS); 602 r = 1; 603 }; 604 605 return r; 606 } 607 608 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 609 { 610 int r = 1; /* Indicate we want to get back into the guest */ 611 612 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) 613 update_timer_ints(vcpu); 614 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 615 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) 616 kvmppc_core_flush_tlb(vcpu); 617 #endif 618 619 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) { 620 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG; 621 r = 0; 622 } 623 624 if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) { 625 vcpu->run->epr.epr = 0; 626 vcpu->arch.epr_needed = true; 627 vcpu->run->exit_reason = KVM_EXIT_EPR; 628 r = 0; 629 } 630 631 return r; 632 } 633 634 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 635 { 636 int ret, s; 637 struct debug_reg debug; 638 639 if (!vcpu->arch.sane) { 640 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 641 return -EINVAL; 642 } 643 644 s = kvmppc_prepare_to_enter(vcpu); 645 if (s <= 0) { 646 ret = s; 647 goto out; 648 } 649 /* interrupts now hard-disabled */ 650 651 #ifdef CONFIG_PPC_FPU 652 /* Save userspace FPU state in stack */ 653 enable_kernel_fp(); 654 655 /* 656 * Since we can't trap on MSR_FP in GS-mode, we consider the guest 657 * as always using the FPU. Kernel usage of FP (via 658 * enable_kernel_fp()) in this thread must not occur while 659 * vcpu->fpu_active is set. 660 */ 661 vcpu->fpu_active = 1; 662 663 kvmppc_load_guest_fp(vcpu); 664 #endif 665 666 /* Switch to guest debug context */ 667 debug = vcpu->arch.shadow_dbg_reg; 668 switch_booke_debug_regs(&debug); 669 debug = current->thread.debug; 670 current->thread.debug = vcpu->arch.shadow_dbg_reg; 671 672 vcpu->arch.pgdir = current->mm->pgd; 673 kvmppc_fix_ee_before_entry(); 674 675 ret = __kvmppc_vcpu_run(kvm_run, vcpu); 676 677 /* No need for kvm_guest_exit. It's done in handle_exit. 678 We also get here with interrupts enabled. */ 679 680 /* Switch back to user space debug context */ 681 switch_booke_debug_regs(&debug); 682 current->thread.debug = debug; 683 684 #ifdef CONFIG_PPC_FPU 685 kvmppc_save_guest_fp(vcpu); 686 687 vcpu->fpu_active = 0; 688 #endif 689 690 out: 691 vcpu->mode = OUTSIDE_GUEST_MODE; 692 return ret; 693 } 694 695 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) 696 { 697 enum emulation_result er; 698 699 er = kvmppc_emulate_instruction(run, vcpu); 700 switch (er) { 701 case EMULATE_DONE: 702 /* don't overwrite subtypes, just account kvm_stats */ 703 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS); 704 /* Future optimization: only reload non-volatiles if 705 * they were actually modified by emulation. */ 706 return RESUME_GUEST_NV; 707 708 case EMULATE_AGAIN: 709 return RESUME_GUEST; 710 711 case EMULATE_FAIL: 712 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 713 __func__, vcpu->arch.pc, vcpu->arch.last_inst); 714 /* For debugging, encode the failing instruction and 715 * report it to userspace. */ 716 run->hw.hardware_exit_reason = ~0ULL << 32; 717 run->hw.hardware_exit_reason |= vcpu->arch.last_inst; 718 kvmppc_core_queue_program(vcpu, ESR_PIL); 719 return RESUME_HOST; 720 721 case EMULATE_EXIT_USER: 722 return RESUME_HOST; 723 724 default: 725 BUG(); 726 } 727 } 728 729 static int kvmppc_handle_debug(struct kvm_run *run, struct kvm_vcpu *vcpu) 730 { 731 struct debug_reg *dbg_reg = &(vcpu->arch.shadow_dbg_reg); 732 u32 dbsr = vcpu->arch.dbsr; 733 734 run->debug.arch.status = 0; 735 run->debug.arch.address = vcpu->arch.pc; 736 737 if (dbsr & (DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4)) { 738 run->debug.arch.status |= KVMPPC_DEBUG_BREAKPOINT; 739 } else { 740 if (dbsr & (DBSR_DAC1W | DBSR_DAC2W)) 741 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_WRITE; 742 else if (dbsr & (DBSR_DAC1R | DBSR_DAC2R)) 743 run->debug.arch.status |= KVMPPC_DEBUG_WATCH_READ; 744 if (dbsr & (DBSR_DAC1R | DBSR_DAC1W)) 745 run->debug.arch.address = dbg_reg->dac1; 746 else if (dbsr & (DBSR_DAC2R | DBSR_DAC2W)) 747 run->debug.arch.address = dbg_reg->dac2; 748 } 749 750 return RESUME_HOST; 751 } 752 753 static void kvmppc_fill_pt_regs(struct pt_regs *regs) 754 { 755 ulong r1, ip, msr, lr; 756 757 asm("mr %0, 1" : "=r"(r1)); 758 asm("mflr %0" : "=r"(lr)); 759 asm("mfmsr %0" : "=r"(msr)); 760 asm("bl 1f; 1: mflr %0" : "=r"(ip)); 761 762 memset(regs, 0, sizeof(*regs)); 763 regs->gpr[1] = r1; 764 regs->nip = ip; 765 regs->msr = msr; 766 regs->link = lr; 767 } 768 769 /* 770 * For interrupts needed to be handled by host interrupt handlers, 771 * corresponding host handler are called from here in similar way 772 * (but not exact) as they are called from low level handler 773 * (such as from arch/powerpc/kernel/head_fsl_booke.S). 774 */ 775 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu, 776 unsigned int exit_nr) 777 { 778 struct pt_regs regs; 779 780 switch (exit_nr) { 781 case BOOKE_INTERRUPT_EXTERNAL: 782 kvmppc_fill_pt_regs(®s); 783 do_IRQ(®s); 784 break; 785 case BOOKE_INTERRUPT_DECREMENTER: 786 kvmppc_fill_pt_regs(®s); 787 timer_interrupt(®s); 788 break; 789 #if defined(CONFIG_PPC_DOORBELL) 790 case BOOKE_INTERRUPT_DOORBELL: 791 kvmppc_fill_pt_regs(®s); 792 doorbell_exception(®s); 793 break; 794 #endif 795 case BOOKE_INTERRUPT_MACHINE_CHECK: 796 /* FIXME */ 797 break; 798 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 799 kvmppc_fill_pt_regs(®s); 800 performance_monitor_exception(®s); 801 break; 802 case BOOKE_INTERRUPT_WATCHDOG: 803 kvmppc_fill_pt_regs(®s); 804 #ifdef CONFIG_BOOKE_WDT 805 WatchdogException(®s); 806 #else 807 unknown_exception(®s); 808 #endif 809 break; 810 case BOOKE_INTERRUPT_CRITICAL: 811 unknown_exception(®s); 812 break; 813 case BOOKE_INTERRUPT_DEBUG: 814 /* Save DBSR before preemption is enabled */ 815 vcpu->arch.dbsr = mfspr(SPRN_DBSR); 816 kvmppc_clear_dbsr(); 817 break; 818 } 819 } 820 821 static int kvmppc_resume_inst_load(struct kvm_run *run, struct kvm_vcpu *vcpu, 822 enum emulation_result emulated, u32 last_inst) 823 { 824 switch (emulated) { 825 case EMULATE_AGAIN: 826 return RESUME_GUEST; 827 828 case EMULATE_FAIL: 829 pr_debug("%s: load instruction from guest address %lx failed\n", 830 __func__, vcpu->arch.pc); 831 /* For debugging, encode the failing instruction and 832 * report it to userspace. */ 833 run->hw.hardware_exit_reason = ~0ULL << 32; 834 run->hw.hardware_exit_reason |= last_inst; 835 kvmppc_core_queue_program(vcpu, ESR_PIL); 836 return RESUME_HOST; 837 838 default: 839 BUG(); 840 } 841 } 842 843 /** 844 * kvmppc_handle_exit 845 * 846 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) 847 */ 848 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, 849 unsigned int exit_nr) 850 { 851 int r = RESUME_HOST; 852 int s; 853 int idx; 854 u32 last_inst = KVM_INST_FETCH_FAILED; 855 enum emulation_result emulated = EMULATE_DONE; 856 857 /* update before a new last_exit_type is rewritten */ 858 kvmppc_update_timing_stats(vcpu); 859 860 /* restart interrupts if they were meant for the host */ 861 kvmppc_restart_interrupt(vcpu, exit_nr); 862 863 /* 864 * get last instruction before beeing preempted 865 * TODO: for e6500 check also BOOKE_INTERRUPT_LRAT_ERROR & ESR_DATA 866 */ 867 switch (exit_nr) { 868 case BOOKE_INTERRUPT_DATA_STORAGE: 869 case BOOKE_INTERRUPT_DTLB_MISS: 870 case BOOKE_INTERRUPT_HV_PRIV: 871 emulated = kvmppc_get_last_inst(vcpu, false, &last_inst); 872 break; 873 default: 874 break; 875 } 876 877 local_irq_enable(); 878 879 trace_kvm_exit(exit_nr, vcpu); 880 kvm_guest_exit(); 881 882 run->exit_reason = KVM_EXIT_UNKNOWN; 883 run->ready_for_interrupt_injection = 1; 884 885 if (emulated != EMULATE_DONE) { 886 r = kvmppc_resume_inst_load(run, vcpu, emulated, last_inst); 887 goto out; 888 } 889 890 switch (exit_nr) { 891 case BOOKE_INTERRUPT_MACHINE_CHECK: 892 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); 893 kvmppc_dump_vcpu(vcpu); 894 /* For debugging, send invalid exit reason to user space */ 895 run->hw.hardware_exit_reason = ~1ULL << 32; 896 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR); 897 r = RESUME_HOST; 898 break; 899 900 case BOOKE_INTERRUPT_EXTERNAL: 901 kvmppc_account_exit(vcpu, EXT_INTR_EXITS); 902 r = RESUME_GUEST; 903 break; 904 905 case BOOKE_INTERRUPT_DECREMENTER: 906 kvmppc_account_exit(vcpu, DEC_EXITS); 907 r = RESUME_GUEST; 908 break; 909 910 case BOOKE_INTERRUPT_WATCHDOG: 911 r = RESUME_GUEST; 912 break; 913 914 case BOOKE_INTERRUPT_DOORBELL: 915 kvmppc_account_exit(vcpu, DBELL_EXITS); 916 r = RESUME_GUEST; 917 break; 918 919 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT: 920 kvmppc_account_exit(vcpu, GDBELL_EXITS); 921 922 /* 923 * We are here because there is a pending guest interrupt 924 * which could not be delivered as MSR_CE or MSR_ME was not 925 * set. Once we break from here we will retry delivery. 926 */ 927 r = RESUME_GUEST; 928 break; 929 930 case BOOKE_INTERRUPT_GUEST_DBELL: 931 kvmppc_account_exit(vcpu, GDBELL_EXITS); 932 933 /* 934 * We are here because there is a pending guest interrupt 935 * which could not be delivered as MSR_EE was not set. Once 936 * we break from here we will retry delivery. 937 */ 938 r = RESUME_GUEST; 939 break; 940 941 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 942 r = RESUME_GUEST; 943 break; 944 945 case BOOKE_INTERRUPT_HV_PRIV: 946 r = emulation_exit(run, vcpu); 947 break; 948 949 case BOOKE_INTERRUPT_PROGRAM: 950 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) { 951 /* 952 * Program traps generated by user-level software must 953 * be handled by the guest kernel. 954 * 955 * In GS mode, hypervisor privileged instructions trap 956 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are 957 * actual program interrupts, handled by the guest. 958 */ 959 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr); 960 r = RESUME_GUEST; 961 kvmppc_account_exit(vcpu, USR_PR_INST); 962 break; 963 } 964 965 r = emulation_exit(run, vcpu); 966 break; 967 968 case BOOKE_INTERRUPT_FP_UNAVAIL: 969 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 970 kvmppc_account_exit(vcpu, FP_UNAVAIL); 971 r = RESUME_GUEST; 972 break; 973 974 #ifdef CONFIG_SPE 975 case BOOKE_INTERRUPT_SPE_UNAVAIL: { 976 if (vcpu->arch.shared->msr & MSR_SPE) 977 kvmppc_vcpu_enable_spe(vcpu); 978 else 979 kvmppc_booke_queue_irqprio(vcpu, 980 BOOKE_IRQPRIO_SPE_UNAVAIL); 981 r = RESUME_GUEST; 982 break; 983 } 984 985 case BOOKE_INTERRUPT_SPE_FP_DATA: 986 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA); 987 r = RESUME_GUEST; 988 break; 989 990 case BOOKE_INTERRUPT_SPE_FP_ROUND: 991 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); 992 r = RESUME_GUEST; 993 break; 994 #else 995 case BOOKE_INTERRUPT_SPE_UNAVAIL: 996 /* 997 * Guest wants SPE, but host kernel doesn't support it. Send 998 * an "unimplemented operation" program check to the guest. 999 */ 1000 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); 1001 r = RESUME_GUEST; 1002 break; 1003 1004 /* 1005 * These really should never happen without CONFIG_SPE, 1006 * as we should never enable the real MSR[SPE] in the guest. 1007 */ 1008 case BOOKE_INTERRUPT_SPE_FP_DATA: 1009 case BOOKE_INTERRUPT_SPE_FP_ROUND: 1010 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", 1011 __func__, exit_nr, vcpu->arch.pc); 1012 run->hw.hardware_exit_reason = exit_nr; 1013 r = RESUME_HOST; 1014 break; 1015 #endif 1016 1017 case BOOKE_INTERRUPT_DATA_STORAGE: 1018 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear, 1019 vcpu->arch.fault_esr); 1020 kvmppc_account_exit(vcpu, DSI_EXITS); 1021 r = RESUME_GUEST; 1022 break; 1023 1024 case BOOKE_INTERRUPT_INST_STORAGE: 1025 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr); 1026 kvmppc_account_exit(vcpu, ISI_EXITS); 1027 r = RESUME_GUEST; 1028 break; 1029 1030 case BOOKE_INTERRUPT_ALIGNMENT: 1031 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear, 1032 vcpu->arch.fault_esr); 1033 r = RESUME_GUEST; 1034 break; 1035 1036 #ifdef CONFIG_KVM_BOOKE_HV 1037 case BOOKE_INTERRUPT_HV_SYSCALL: 1038 if (!(vcpu->arch.shared->msr & MSR_PR)) { 1039 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1040 } else { 1041 /* 1042 * hcall from guest userspace -- send privileged 1043 * instruction program check. 1044 */ 1045 kvmppc_core_queue_program(vcpu, ESR_PPR); 1046 } 1047 1048 r = RESUME_GUEST; 1049 break; 1050 #else 1051 case BOOKE_INTERRUPT_SYSCALL: 1052 if (!(vcpu->arch.shared->msr & MSR_PR) && 1053 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 1054 /* KVM PV hypercalls */ 1055 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1056 r = RESUME_GUEST; 1057 } else { 1058 /* Guest syscalls */ 1059 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL); 1060 } 1061 kvmppc_account_exit(vcpu, SYSCALL_EXITS); 1062 r = RESUME_GUEST; 1063 break; 1064 #endif 1065 1066 case BOOKE_INTERRUPT_DTLB_MISS: { 1067 unsigned long eaddr = vcpu->arch.fault_dear; 1068 int gtlb_index; 1069 gpa_t gpaddr; 1070 gfn_t gfn; 1071 1072 #ifdef CONFIG_KVM_E500V2 1073 if (!(vcpu->arch.shared->msr & MSR_PR) && 1074 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1075 kvmppc_map_magic(vcpu); 1076 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1077 r = RESUME_GUEST; 1078 1079 break; 1080 } 1081 #endif 1082 1083 /* Check the guest TLB. */ 1084 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 1085 if (gtlb_index < 0) { 1086 /* The guest didn't have a mapping for it. */ 1087 kvmppc_core_queue_dtlb_miss(vcpu, 1088 vcpu->arch.fault_dear, 1089 vcpu->arch.fault_esr); 1090 kvmppc_mmu_dtlb_miss(vcpu); 1091 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); 1092 r = RESUME_GUEST; 1093 break; 1094 } 1095 1096 idx = srcu_read_lock(&vcpu->kvm->srcu); 1097 1098 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1099 gfn = gpaddr >> PAGE_SHIFT; 1100 1101 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1102 /* The guest TLB had a mapping, but the shadow TLB 1103 * didn't, and it is RAM. This could be because: 1104 * a) the entry is mapping the host kernel, or 1105 * b) the guest used a large mapping which we're faking 1106 * Either way, we need to satisfy the fault without 1107 * invoking the guest. */ 1108 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1109 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1110 r = RESUME_GUEST; 1111 } else { 1112 /* Guest has mapped and accessed a page which is not 1113 * actually RAM. */ 1114 vcpu->arch.paddr_accessed = gpaddr; 1115 vcpu->arch.vaddr_accessed = eaddr; 1116 r = kvmppc_emulate_mmio(run, vcpu); 1117 kvmppc_account_exit(vcpu, MMIO_EXITS); 1118 } 1119 1120 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1121 break; 1122 } 1123 1124 case BOOKE_INTERRUPT_ITLB_MISS: { 1125 unsigned long eaddr = vcpu->arch.pc; 1126 gpa_t gpaddr; 1127 gfn_t gfn; 1128 int gtlb_index; 1129 1130 r = RESUME_GUEST; 1131 1132 /* Check the guest TLB. */ 1133 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 1134 if (gtlb_index < 0) { 1135 /* The guest didn't have a mapping for it. */ 1136 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 1137 kvmppc_mmu_itlb_miss(vcpu); 1138 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); 1139 break; 1140 } 1141 1142 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); 1143 1144 idx = srcu_read_lock(&vcpu->kvm->srcu); 1145 1146 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1147 gfn = gpaddr >> PAGE_SHIFT; 1148 1149 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1150 /* The guest TLB had a mapping, but the shadow TLB 1151 * didn't. This could be because: 1152 * a) the entry is mapping the host kernel, or 1153 * b) the guest used a large mapping which we're faking 1154 * Either way, we need to satisfy the fault without 1155 * invoking the guest. */ 1156 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1157 } else { 1158 /* Guest mapped and leaped at non-RAM! */ 1159 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); 1160 } 1161 1162 srcu_read_unlock(&vcpu->kvm->srcu, idx); 1163 break; 1164 } 1165 1166 case BOOKE_INTERRUPT_DEBUG: { 1167 r = kvmppc_handle_debug(run, vcpu); 1168 if (r == RESUME_HOST) 1169 run->exit_reason = KVM_EXIT_DEBUG; 1170 kvmppc_account_exit(vcpu, DEBUG_EXITS); 1171 break; 1172 } 1173 1174 default: 1175 printk(KERN_EMERG "exit_nr %d\n", exit_nr); 1176 BUG(); 1177 } 1178 1179 out: 1180 /* 1181 * To avoid clobbering exit_reason, only check for signals if we 1182 * aren't already exiting to userspace for some other reason. 1183 */ 1184 if (!(r & RESUME_HOST)) { 1185 s = kvmppc_prepare_to_enter(vcpu); 1186 if (s <= 0) 1187 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); 1188 else { 1189 /* interrupts now hard-disabled */ 1190 kvmppc_fix_ee_before_entry(); 1191 } 1192 } 1193 1194 return r; 1195 } 1196 1197 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr) 1198 { 1199 u32 old_tsr = vcpu->arch.tsr; 1200 1201 vcpu->arch.tsr = new_tsr; 1202 1203 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS)) 1204 arm_next_watchdog(vcpu); 1205 1206 update_timer_ints(vcpu); 1207 } 1208 1209 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ 1210 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 1211 { 1212 int i; 1213 int r; 1214 1215 vcpu->arch.pc = 0; 1216 vcpu->arch.shared->pir = vcpu->vcpu_id; 1217 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */ 1218 kvmppc_set_msr(vcpu, 0); 1219 1220 #ifndef CONFIG_KVM_BOOKE_HV 1221 vcpu->arch.shadow_msr = MSR_USER | MSR_IS | MSR_DS; 1222 vcpu->arch.shadow_pid = 1; 1223 vcpu->arch.shared->msr = 0; 1224 #endif 1225 1226 /* Eye-catching numbers so we know if the guest takes an interrupt 1227 * before it's programmed its own IVPR/IVORs. */ 1228 vcpu->arch.ivpr = 0x55550000; 1229 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++) 1230 vcpu->arch.ivor[i] = 0x7700 | i * 4; 1231 1232 kvmppc_init_timing_stats(vcpu); 1233 1234 r = kvmppc_core_vcpu_setup(vcpu); 1235 kvmppc_sanity_check(vcpu); 1236 return r; 1237 } 1238 1239 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 1240 { 1241 /* setup watchdog timer once */ 1242 spin_lock_init(&vcpu->arch.wdt_lock); 1243 setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 1244 (unsigned long)vcpu); 1245 1246 return 0; 1247 } 1248 1249 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 1250 { 1251 del_timer_sync(&vcpu->arch.wdt_timer); 1252 } 1253 1254 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1255 { 1256 int i; 1257 1258 regs->pc = vcpu->arch.pc; 1259 regs->cr = kvmppc_get_cr(vcpu); 1260 regs->ctr = vcpu->arch.ctr; 1261 regs->lr = vcpu->arch.lr; 1262 regs->xer = kvmppc_get_xer(vcpu); 1263 regs->msr = vcpu->arch.shared->msr; 1264 regs->srr0 = kvmppc_get_srr0(vcpu); 1265 regs->srr1 = kvmppc_get_srr1(vcpu); 1266 regs->pid = vcpu->arch.pid; 1267 regs->sprg0 = kvmppc_get_sprg0(vcpu); 1268 regs->sprg1 = kvmppc_get_sprg1(vcpu); 1269 regs->sprg2 = kvmppc_get_sprg2(vcpu); 1270 regs->sprg3 = kvmppc_get_sprg3(vcpu); 1271 regs->sprg4 = kvmppc_get_sprg4(vcpu); 1272 regs->sprg5 = kvmppc_get_sprg5(vcpu); 1273 regs->sprg6 = kvmppc_get_sprg6(vcpu); 1274 regs->sprg7 = kvmppc_get_sprg7(vcpu); 1275 1276 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1277 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 1278 1279 return 0; 1280 } 1281 1282 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1283 { 1284 int i; 1285 1286 vcpu->arch.pc = regs->pc; 1287 kvmppc_set_cr(vcpu, regs->cr); 1288 vcpu->arch.ctr = regs->ctr; 1289 vcpu->arch.lr = regs->lr; 1290 kvmppc_set_xer(vcpu, regs->xer); 1291 kvmppc_set_msr(vcpu, regs->msr); 1292 kvmppc_set_srr0(vcpu, regs->srr0); 1293 kvmppc_set_srr1(vcpu, regs->srr1); 1294 kvmppc_set_pid(vcpu, regs->pid); 1295 kvmppc_set_sprg0(vcpu, regs->sprg0); 1296 kvmppc_set_sprg1(vcpu, regs->sprg1); 1297 kvmppc_set_sprg2(vcpu, regs->sprg2); 1298 kvmppc_set_sprg3(vcpu, regs->sprg3); 1299 kvmppc_set_sprg4(vcpu, regs->sprg4); 1300 kvmppc_set_sprg5(vcpu, regs->sprg5); 1301 kvmppc_set_sprg6(vcpu, regs->sprg6); 1302 kvmppc_set_sprg7(vcpu, regs->sprg7); 1303 1304 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1305 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 1306 1307 return 0; 1308 } 1309 1310 static void get_sregs_base(struct kvm_vcpu *vcpu, 1311 struct kvm_sregs *sregs) 1312 { 1313 u64 tb = get_tb(); 1314 1315 sregs->u.e.features |= KVM_SREGS_E_BASE; 1316 1317 sregs->u.e.csrr0 = vcpu->arch.csrr0; 1318 sregs->u.e.csrr1 = vcpu->arch.csrr1; 1319 sregs->u.e.mcsr = vcpu->arch.mcsr; 1320 sregs->u.e.esr = kvmppc_get_esr(vcpu); 1321 sregs->u.e.dear = kvmppc_get_dar(vcpu); 1322 sregs->u.e.tsr = vcpu->arch.tsr; 1323 sregs->u.e.tcr = vcpu->arch.tcr; 1324 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb); 1325 sregs->u.e.tb = tb; 1326 sregs->u.e.vrsave = vcpu->arch.vrsave; 1327 } 1328 1329 static int set_sregs_base(struct kvm_vcpu *vcpu, 1330 struct kvm_sregs *sregs) 1331 { 1332 if (!(sregs->u.e.features & KVM_SREGS_E_BASE)) 1333 return 0; 1334 1335 vcpu->arch.csrr0 = sregs->u.e.csrr0; 1336 vcpu->arch.csrr1 = sregs->u.e.csrr1; 1337 vcpu->arch.mcsr = sregs->u.e.mcsr; 1338 kvmppc_set_esr(vcpu, sregs->u.e.esr); 1339 kvmppc_set_dar(vcpu, sregs->u.e.dear); 1340 vcpu->arch.vrsave = sregs->u.e.vrsave; 1341 kvmppc_set_tcr(vcpu, sregs->u.e.tcr); 1342 1343 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) { 1344 vcpu->arch.dec = sregs->u.e.dec; 1345 kvmppc_emulate_dec(vcpu); 1346 } 1347 1348 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) 1349 kvmppc_set_tsr(vcpu, sregs->u.e.tsr); 1350 1351 return 0; 1352 } 1353 1354 static void get_sregs_arch206(struct kvm_vcpu *vcpu, 1355 struct kvm_sregs *sregs) 1356 { 1357 sregs->u.e.features |= KVM_SREGS_E_ARCH206; 1358 1359 sregs->u.e.pir = vcpu->vcpu_id; 1360 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0; 1361 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1; 1362 sregs->u.e.decar = vcpu->arch.decar; 1363 sregs->u.e.ivpr = vcpu->arch.ivpr; 1364 } 1365 1366 static int set_sregs_arch206(struct kvm_vcpu *vcpu, 1367 struct kvm_sregs *sregs) 1368 { 1369 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206)) 1370 return 0; 1371 1372 if (sregs->u.e.pir != vcpu->vcpu_id) 1373 return -EINVAL; 1374 1375 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0; 1376 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1; 1377 vcpu->arch.decar = sregs->u.e.decar; 1378 vcpu->arch.ivpr = sregs->u.e.ivpr; 1379 1380 return 0; 1381 } 1382 1383 int kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1384 { 1385 sregs->u.e.features |= KVM_SREGS_E_IVOR; 1386 1387 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; 1388 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; 1389 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; 1390 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; 1391 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; 1392 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; 1393 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; 1394 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; 1395 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; 1396 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; 1397 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; 1398 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; 1399 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; 1400 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; 1401 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; 1402 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; 1403 return 0; 1404 } 1405 1406 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1407 { 1408 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR)) 1409 return 0; 1410 1411 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0]; 1412 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1]; 1413 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2]; 1414 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3]; 1415 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4]; 1416 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5]; 1417 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6]; 1418 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7]; 1419 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8]; 1420 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9]; 1421 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10]; 1422 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11]; 1423 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12]; 1424 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13]; 1425 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14]; 1426 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15]; 1427 1428 return 0; 1429 } 1430 1431 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 1432 struct kvm_sregs *sregs) 1433 { 1434 sregs->pvr = vcpu->arch.pvr; 1435 1436 get_sregs_base(vcpu, sregs); 1437 get_sregs_arch206(vcpu, sregs); 1438 return vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs); 1439 } 1440 1441 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 1442 struct kvm_sregs *sregs) 1443 { 1444 int ret; 1445 1446 if (vcpu->arch.pvr != sregs->pvr) 1447 return -EINVAL; 1448 1449 ret = set_sregs_base(vcpu, sregs); 1450 if (ret < 0) 1451 return ret; 1452 1453 ret = set_sregs_arch206(vcpu, sregs); 1454 if (ret < 0) 1455 return ret; 1456 1457 return vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs); 1458 } 1459 1460 int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 1461 { 1462 int r = 0; 1463 union kvmppc_one_reg val; 1464 int size; 1465 1466 size = one_reg_size(reg->id); 1467 if (size > sizeof(val)) 1468 return -EINVAL; 1469 1470 switch (reg->id) { 1471 case KVM_REG_PPC_IAC1: 1472 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac1); 1473 break; 1474 case KVM_REG_PPC_IAC2: 1475 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac2); 1476 break; 1477 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1478 case KVM_REG_PPC_IAC3: 1479 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac3); 1480 break; 1481 case KVM_REG_PPC_IAC4: 1482 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac4); 1483 break; 1484 #endif 1485 case KVM_REG_PPC_DAC1: 1486 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac1); 1487 break; 1488 case KVM_REG_PPC_DAC2: 1489 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac2); 1490 break; 1491 case KVM_REG_PPC_EPR: { 1492 u32 epr = kvmppc_get_epr(vcpu); 1493 val = get_reg_val(reg->id, epr); 1494 break; 1495 } 1496 #if defined(CONFIG_64BIT) 1497 case KVM_REG_PPC_EPCR: 1498 val = get_reg_val(reg->id, vcpu->arch.epcr); 1499 break; 1500 #endif 1501 case KVM_REG_PPC_TCR: 1502 val = get_reg_val(reg->id, vcpu->arch.tcr); 1503 break; 1504 case KVM_REG_PPC_TSR: 1505 val = get_reg_val(reg->id, vcpu->arch.tsr); 1506 break; 1507 case KVM_REG_PPC_DEBUG_INST: 1508 val = get_reg_val(reg->id, KVMPPC_INST_EHPRIV_DEBUG); 1509 break; 1510 case KVM_REG_PPC_VRSAVE: 1511 val = get_reg_val(reg->id, vcpu->arch.vrsave); 1512 break; 1513 default: 1514 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, reg->id, &val); 1515 break; 1516 } 1517 1518 if (r) 1519 return r; 1520 1521 if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size)) 1522 r = -EFAULT; 1523 1524 return r; 1525 } 1526 1527 int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 1528 { 1529 int r = 0; 1530 union kvmppc_one_reg val; 1531 int size; 1532 1533 size = one_reg_size(reg->id); 1534 if (size > sizeof(val)) 1535 return -EINVAL; 1536 1537 if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size)) 1538 return -EFAULT; 1539 1540 switch (reg->id) { 1541 case KVM_REG_PPC_IAC1: 1542 vcpu->arch.dbg_reg.iac1 = set_reg_val(reg->id, val); 1543 break; 1544 case KVM_REG_PPC_IAC2: 1545 vcpu->arch.dbg_reg.iac2 = set_reg_val(reg->id, val); 1546 break; 1547 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1548 case KVM_REG_PPC_IAC3: 1549 vcpu->arch.dbg_reg.iac3 = set_reg_val(reg->id, val); 1550 break; 1551 case KVM_REG_PPC_IAC4: 1552 vcpu->arch.dbg_reg.iac4 = set_reg_val(reg->id, val); 1553 break; 1554 #endif 1555 case KVM_REG_PPC_DAC1: 1556 vcpu->arch.dbg_reg.dac1 = set_reg_val(reg->id, val); 1557 break; 1558 case KVM_REG_PPC_DAC2: 1559 vcpu->arch.dbg_reg.dac2 = set_reg_val(reg->id, val); 1560 break; 1561 case KVM_REG_PPC_EPR: { 1562 u32 new_epr = set_reg_val(reg->id, val); 1563 kvmppc_set_epr(vcpu, new_epr); 1564 break; 1565 } 1566 #if defined(CONFIG_64BIT) 1567 case KVM_REG_PPC_EPCR: { 1568 u32 new_epcr = set_reg_val(reg->id, val); 1569 kvmppc_set_epcr(vcpu, new_epcr); 1570 break; 1571 } 1572 #endif 1573 case KVM_REG_PPC_OR_TSR: { 1574 u32 tsr_bits = set_reg_val(reg->id, val); 1575 kvmppc_set_tsr_bits(vcpu, tsr_bits); 1576 break; 1577 } 1578 case KVM_REG_PPC_CLEAR_TSR: { 1579 u32 tsr_bits = set_reg_val(reg->id, val); 1580 kvmppc_clr_tsr_bits(vcpu, tsr_bits); 1581 break; 1582 } 1583 case KVM_REG_PPC_TSR: { 1584 u32 tsr = set_reg_val(reg->id, val); 1585 kvmppc_set_tsr(vcpu, tsr); 1586 break; 1587 } 1588 case KVM_REG_PPC_TCR: { 1589 u32 tcr = set_reg_val(reg->id, val); 1590 kvmppc_set_tcr(vcpu, tcr); 1591 break; 1592 } 1593 case KVM_REG_PPC_VRSAVE: 1594 vcpu->arch.vrsave = set_reg_val(reg->id, val); 1595 break; 1596 default: 1597 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, reg->id, &val); 1598 break; 1599 } 1600 1601 return r; 1602 } 1603 1604 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1605 { 1606 return -ENOTSUPP; 1607 } 1608 1609 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1610 { 1611 return -ENOTSUPP; 1612 } 1613 1614 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 1615 struct kvm_translation *tr) 1616 { 1617 int r; 1618 1619 r = kvmppc_core_vcpu_translate(vcpu, tr); 1620 return r; 1621 } 1622 1623 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 1624 { 1625 return -ENOTSUPP; 1626 } 1627 1628 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, 1629 struct kvm_memory_slot *dont) 1630 { 1631 } 1632 1633 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, 1634 unsigned long npages) 1635 { 1636 return 0; 1637 } 1638 1639 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 1640 struct kvm_memory_slot *memslot, 1641 struct kvm_userspace_memory_region *mem) 1642 { 1643 return 0; 1644 } 1645 1646 void kvmppc_core_commit_memory_region(struct kvm *kvm, 1647 struct kvm_userspace_memory_region *mem, 1648 const struct kvm_memory_slot *old) 1649 { 1650 } 1651 1652 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 1653 { 1654 } 1655 1656 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr) 1657 { 1658 #if defined(CONFIG_64BIT) 1659 vcpu->arch.epcr = new_epcr; 1660 #ifdef CONFIG_KVM_BOOKE_HV 1661 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM; 1662 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 1663 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM; 1664 #endif 1665 #endif 1666 } 1667 1668 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr) 1669 { 1670 vcpu->arch.tcr = new_tcr; 1671 arm_next_watchdog(vcpu); 1672 update_timer_ints(vcpu); 1673 } 1674 1675 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1676 { 1677 set_bits(tsr_bits, &vcpu->arch.tsr); 1678 smp_wmb(); 1679 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 1680 kvm_vcpu_kick(vcpu); 1681 } 1682 1683 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1684 { 1685 clear_bits(tsr_bits, &vcpu->arch.tsr); 1686 1687 /* 1688 * We may have stopped the watchdog due to 1689 * being stuck on final expiration. 1690 */ 1691 if (tsr_bits & (TSR_ENW | TSR_WIS)) 1692 arm_next_watchdog(vcpu); 1693 1694 update_timer_ints(vcpu); 1695 } 1696 1697 void kvmppc_decrementer_func(unsigned long data) 1698 { 1699 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; 1700 1701 if (vcpu->arch.tcr & TCR_ARE) { 1702 vcpu->arch.dec = vcpu->arch.decar; 1703 kvmppc_emulate_dec(vcpu); 1704 } 1705 1706 kvmppc_set_tsr_bits(vcpu, TSR_DIS); 1707 } 1708 1709 static int kvmppc_booke_add_breakpoint(struct debug_reg *dbg_reg, 1710 uint64_t addr, int index) 1711 { 1712 switch (index) { 1713 case 0: 1714 dbg_reg->dbcr0 |= DBCR0_IAC1; 1715 dbg_reg->iac1 = addr; 1716 break; 1717 case 1: 1718 dbg_reg->dbcr0 |= DBCR0_IAC2; 1719 dbg_reg->iac2 = addr; 1720 break; 1721 #if CONFIG_PPC_ADV_DEBUG_IACS > 2 1722 case 2: 1723 dbg_reg->dbcr0 |= DBCR0_IAC3; 1724 dbg_reg->iac3 = addr; 1725 break; 1726 case 3: 1727 dbg_reg->dbcr0 |= DBCR0_IAC4; 1728 dbg_reg->iac4 = addr; 1729 break; 1730 #endif 1731 default: 1732 return -EINVAL; 1733 } 1734 1735 dbg_reg->dbcr0 |= DBCR0_IDM; 1736 return 0; 1737 } 1738 1739 static int kvmppc_booke_add_watchpoint(struct debug_reg *dbg_reg, uint64_t addr, 1740 int type, int index) 1741 { 1742 switch (index) { 1743 case 0: 1744 if (type & KVMPPC_DEBUG_WATCH_READ) 1745 dbg_reg->dbcr0 |= DBCR0_DAC1R; 1746 if (type & KVMPPC_DEBUG_WATCH_WRITE) 1747 dbg_reg->dbcr0 |= DBCR0_DAC1W; 1748 dbg_reg->dac1 = addr; 1749 break; 1750 case 1: 1751 if (type & KVMPPC_DEBUG_WATCH_READ) 1752 dbg_reg->dbcr0 |= DBCR0_DAC2R; 1753 if (type & KVMPPC_DEBUG_WATCH_WRITE) 1754 dbg_reg->dbcr0 |= DBCR0_DAC2W; 1755 dbg_reg->dac2 = addr; 1756 break; 1757 default: 1758 return -EINVAL; 1759 } 1760 1761 dbg_reg->dbcr0 |= DBCR0_IDM; 1762 return 0; 1763 } 1764 void kvm_guest_protect_msr(struct kvm_vcpu *vcpu, ulong prot_bitmap, bool set) 1765 { 1766 /* XXX: Add similar MSR protection for BookE-PR */ 1767 #ifdef CONFIG_KVM_BOOKE_HV 1768 BUG_ON(prot_bitmap & ~(MSRP_UCLEP | MSRP_DEP | MSRP_PMMP)); 1769 if (set) { 1770 if (prot_bitmap & MSR_UCLE) 1771 vcpu->arch.shadow_msrp |= MSRP_UCLEP; 1772 if (prot_bitmap & MSR_DE) 1773 vcpu->arch.shadow_msrp |= MSRP_DEP; 1774 if (prot_bitmap & MSR_PMM) 1775 vcpu->arch.shadow_msrp |= MSRP_PMMP; 1776 } else { 1777 if (prot_bitmap & MSR_UCLE) 1778 vcpu->arch.shadow_msrp &= ~MSRP_UCLEP; 1779 if (prot_bitmap & MSR_DE) 1780 vcpu->arch.shadow_msrp &= ~MSRP_DEP; 1781 if (prot_bitmap & MSR_PMM) 1782 vcpu->arch.shadow_msrp &= ~MSRP_PMMP; 1783 } 1784 #endif 1785 } 1786 1787 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid, 1788 enum xlate_readwrite xlrw, struct kvmppc_pte *pte) 1789 { 1790 int gtlb_index; 1791 gpa_t gpaddr; 1792 1793 #ifdef CONFIG_KVM_E500V2 1794 if (!(vcpu->arch.shared->msr & MSR_PR) && 1795 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1796 pte->eaddr = eaddr; 1797 pte->raddr = (vcpu->arch.magic_page_pa & PAGE_MASK) | 1798 (eaddr & ~PAGE_MASK); 1799 pte->vpage = eaddr >> PAGE_SHIFT; 1800 pte->may_read = true; 1801 pte->may_write = true; 1802 pte->may_execute = true; 1803 1804 return 0; 1805 } 1806 #endif 1807 1808 /* Check the guest TLB. */ 1809 switch (xlid) { 1810 case XLATE_INST: 1811 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 1812 break; 1813 case XLATE_DATA: 1814 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 1815 break; 1816 default: 1817 BUG(); 1818 } 1819 1820 /* Do we have a TLB entry at all? */ 1821 if (gtlb_index < 0) 1822 return -ENOENT; 1823 1824 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1825 1826 pte->eaddr = eaddr; 1827 pte->raddr = (gpaddr & PAGE_MASK) | (eaddr & ~PAGE_MASK); 1828 pte->vpage = eaddr >> PAGE_SHIFT; 1829 1830 /* XXX read permissions from the guest TLB */ 1831 pte->may_read = true; 1832 pte->may_write = true; 1833 pte->may_execute = true; 1834 1835 return 0; 1836 } 1837 1838 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 1839 struct kvm_guest_debug *dbg) 1840 { 1841 struct debug_reg *dbg_reg; 1842 int n, b = 0, w = 0; 1843 1844 if (!(dbg->control & KVM_GUESTDBG_ENABLE)) { 1845 vcpu->arch.shadow_dbg_reg.dbcr0 = 0; 1846 vcpu->guest_debug = 0; 1847 kvm_guest_protect_msr(vcpu, MSR_DE, false); 1848 return 0; 1849 } 1850 1851 kvm_guest_protect_msr(vcpu, MSR_DE, true); 1852 vcpu->guest_debug = dbg->control; 1853 vcpu->arch.shadow_dbg_reg.dbcr0 = 0; 1854 /* Set DBCR0_EDM in guest visible DBCR0 register. */ 1855 vcpu->arch.dbg_reg.dbcr0 = DBCR0_EDM; 1856 1857 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) 1858 vcpu->arch.shadow_dbg_reg.dbcr0 |= DBCR0_IDM | DBCR0_IC; 1859 1860 /* Code below handles only HW breakpoints */ 1861 dbg_reg = &(vcpu->arch.shadow_dbg_reg); 1862 1863 #ifdef CONFIG_KVM_BOOKE_HV 1864 /* 1865 * On BookE-HV (e500mc) the guest is always executed with MSR.GS=1 1866 * DBCR1 and DBCR2 are set to trigger debug events when MSR.PR is 0 1867 */ 1868 dbg_reg->dbcr1 = 0; 1869 dbg_reg->dbcr2 = 0; 1870 #else 1871 /* 1872 * On BookE-PR (e500v2) the guest is always executed with MSR.PR=1 1873 * We set DBCR1 and DBCR2 to only trigger debug events when MSR.PR 1874 * is set. 1875 */ 1876 dbg_reg->dbcr1 = DBCR1_IAC1US | DBCR1_IAC2US | DBCR1_IAC3US | 1877 DBCR1_IAC4US; 1878 dbg_reg->dbcr2 = DBCR2_DAC1US | DBCR2_DAC2US; 1879 #endif 1880 1881 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) 1882 return 0; 1883 1884 for (n = 0; n < (KVMPPC_BOOKE_IAC_NUM + KVMPPC_BOOKE_DAC_NUM); n++) { 1885 uint64_t addr = dbg->arch.bp[n].addr; 1886 uint32_t type = dbg->arch.bp[n].type; 1887 1888 if (type == KVMPPC_DEBUG_NONE) 1889 continue; 1890 1891 if (type & !(KVMPPC_DEBUG_WATCH_READ | 1892 KVMPPC_DEBUG_WATCH_WRITE | 1893 KVMPPC_DEBUG_BREAKPOINT)) 1894 return -EINVAL; 1895 1896 if (type & KVMPPC_DEBUG_BREAKPOINT) { 1897 /* Setting H/W breakpoint */ 1898 if (kvmppc_booke_add_breakpoint(dbg_reg, addr, b++)) 1899 return -EINVAL; 1900 } else { 1901 /* Setting H/W watchpoint */ 1902 if (kvmppc_booke_add_watchpoint(dbg_reg, addr, 1903 type, w++)) 1904 return -EINVAL; 1905 } 1906 } 1907 1908 return 0; 1909 } 1910 1911 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 1912 { 1913 vcpu->cpu = smp_processor_id(); 1914 current->thread.kvm_vcpu = vcpu; 1915 } 1916 1917 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu) 1918 { 1919 current->thread.kvm_vcpu = NULL; 1920 vcpu->cpu = -1; 1921 1922 /* Clear pending debug event in DBSR */ 1923 kvmppc_clear_dbsr(); 1924 } 1925 1926 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) 1927 { 1928 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu); 1929 } 1930 1931 int kvmppc_core_init_vm(struct kvm *kvm) 1932 { 1933 return kvm->arch.kvm_ops->init_vm(kvm); 1934 } 1935 1936 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) 1937 { 1938 return kvm->arch.kvm_ops->vcpu_create(kvm, id); 1939 } 1940 1941 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) 1942 { 1943 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 1944 } 1945 1946 void kvmppc_core_destroy_vm(struct kvm *kvm) 1947 { 1948 kvm->arch.kvm_ops->destroy_vm(kvm); 1949 } 1950 1951 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 1952 { 1953 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu); 1954 } 1955 1956 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) 1957 { 1958 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu); 1959 } 1960 1961 int __init kvmppc_booke_init(void) 1962 { 1963 #ifndef CONFIG_KVM_BOOKE_HV 1964 unsigned long ivor[16]; 1965 unsigned long *handler = kvmppc_booke_handler_addr; 1966 unsigned long max_ivor = 0; 1967 unsigned long handler_len; 1968 int i; 1969 1970 /* We install our own exception handlers by hijacking IVPR. IVPR must 1971 * be 16-bit aligned, so we need a 64KB allocation. */ 1972 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 1973 VCPU_SIZE_ORDER); 1974 if (!kvmppc_booke_handlers) 1975 return -ENOMEM; 1976 1977 /* XXX make sure our handlers are smaller than Linux's */ 1978 1979 /* Copy our interrupt handlers to match host IVORs. That way we don't 1980 * have to swap the IVORs on every guest/host transition. */ 1981 ivor[0] = mfspr(SPRN_IVOR0); 1982 ivor[1] = mfspr(SPRN_IVOR1); 1983 ivor[2] = mfspr(SPRN_IVOR2); 1984 ivor[3] = mfspr(SPRN_IVOR3); 1985 ivor[4] = mfspr(SPRN_IVOR4); 1986 ivor[5] = mfspr(SPRN_IVOR5); 1987 ivor[6] = mfspr(SPRN_IVOR6); 1988 ivor[7] = mfspr(SPRN_IVOR7); 1989 ivor[8] = mfspr(SPRN_IVOR8); 1990 ivor[9] = mfspr(SPRN_IVOR9); 1991 ivor[10] = mfspr(SPRN_IVOR10); 1992 ivor[11] = mfspr(SPRN_IVOR11); 1993 ivor[12] = mfspr(SPRN_IVOR12); 1994 ivor[13] = mfspr(SPRN_IVOR13); 1995 ivor[14] = mfspr(SPRN_IVOR14); 1996 ivor[15] = mfspr(SPRN_IVOR15); 1997 1998 for (i = 0; i < 16; i++) { 1999 if (ivor[i] > max_ivor) 2000 max_ivor = i; 2001 2002 handler_len = handler[i + 1] - handler[i]; 2003 memcpy((void *)kvmppc_booke_handlers + ivor[i], 2004 (void *)handler[i], handler_len); 2005 } 2006 2007 handler_len = handler[max_ivor + 1] - handler[max_ivor]; 2008 flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers + 2009 ivor[max_ivor] + handler_len); 2010 #endif /* !BOOKE_HV */ 2011 return 0; 2012 } 2013 2014 void __exit kvmppc_booke_exit(void) 2015 { 2016 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); 2017 kvm_exit(); 2018 } 2019