1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License, version 2, as 4 * published by the Free Software Foundation. 5 * 6 * This program is distributed in the hope that it will be useful, 7 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * GNU General Public License for more details. 10 * 11 * You should have received a copy of the GNU General Public License 12 * along with this program; if not, write to the Free Software 13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14 * 15 * Copyright IBM Corp. 2007 16 * Copyright 2010-2011 Freescale Semiconductor, Inc. 17 * 18 * Authors: Hollis Blanchard <hollisb@us.ibm.com> 19 * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> 20 * Scott Wood <scottwood@freescale.com> 21 * Varun Sethi <varun.sethi@freescale.com> 22 */ 23 24 #include <linux/errno.h> 25 #include <linux/err.h> 26 #include <linux/kvm_host.h> 27 #include <linux/gfp.h> 28 #include <linux/module.h> 29 #include <linux/vmalloc.h> 30 #include <linux/fs.h> 31 32 #include <asm/cputable.h> 33 #include <asm/uaccess.h> 34 #include <asm/kvm_ppc.h> 35 #include <asm/cacheflush.h> 36 #include <asm/dbell.h> 37 #include <asm/hw_irq.h> 38 #include <asm/irq.h> 39 #include <asm/time.h> 40 41 #include "timing.h" 42 #include "booke.h" 43 #include "trace.h" 44 45 unsigned long kvmppc_booke_handlers; 46 47 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM 48 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 49 50 struct kvm_stats_debugfs_item debugfs_entries[] = { 51 { "mmio", VCPU_STAT(mmio_exits) }, 52 { "dcr", VCPU_STAT(dcr_exits) }, 53 { "sig", VCPU_STAT(signal_exits) }, 54 { "itlb_r", VCPU_STAT(itlb_real_miss_exits) }, 55 { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) }, 56 { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) }, 57 { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) }, 58 { "sysc", VCPU_STAT(syscall_exits) }, 59 { "isi", VCPU_STAT(isi_exits) }, 60 { "dsi", VCPU_STAT(dsi_exits) }, 61 { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 62 { "dec", VCPU_STAT(dec_exits) }, 63 { "ext_intr", VCPU_STAT(ext_intr_exits) }, 64 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 65 { "doorbell", VCPU_STAT(dbell_exits) }, 66 { "guest doorbell", VCPU_STAT(gdbell_exits) }, 67 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) }, 68 { NULL } 69 }; 70 71 /* TODO: use vcpu_printf() */ 72 void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) 73 { 74 int i; 75 76 printk("pc: %08lx msr: %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr); 77 printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr); 78 printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0, 79 vcpu->arch.shared->srr1); 80 81 printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); 82 83 for (i = 0; i < 32; i += 4) { 84 printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, 85 kvmppc_get_gpr(vcpu, i), 86 kvmppc_get_gpr(vcpu, i+1), 87 kvmppc_get_gpr(vcpu, i+2), 88 kvmppc_get_gpr(vcpu, i+3)); 89 } 90 } 91 92 #ifdef CONFIG_SPE 93 void kvmppc_vcpu_disable_spe(struct kvm_vcpu *vcpu) 94 { 95 preempt_disable(); 96 enable_kernel_spe(); 97 kvmppc_save_guest_spe(vcpu); 98 vcpu->arch.shadow_msr &= ~MSR_SPE; 99 preempt_enable(); 100 } 101 102 static void kvmppc_vcpu_enable_spe(struct kvm_vcpu *vcpu) 103 { 104 preempt_disable(); 105 enable_kernel_spe(); 106 kvmppc_load_guest_spe(vcpu); 107 vcpu->arch.shadow_msr |= MSR_SPE; 108 preempt_enable(); 109 } 110 111 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 112 { 113 if (vcpu->arch.shared->msr & MSR_SPE) { 114 if (!(vcpu->arch.shadow_msr & MSR_SPE)) 115 kvmppc_vcpu_enable_spe(vcpu); 116 } else if (vcpu->arch.shadow_msr & MSR_SPE) { 117 kvmppc_vcpu_disable_spe(vcpu); 118 } 119 } 120 #else 121 static void kvmppc_vcpu_sync_spe(struct kvm_vcpu *vcpu) 122 { 123 } 124 #endif 125 126 static void kvmppc_vcpu_sync_fpu(struct kvm_vcpu *vcpu) 127 { 128 #if defined(CONFIG_PPC_FPU) && !defined(CONFIG_KVM_BOOKE_HV) 129 /* We always treat the FP bit as enabled from the host 130 perspective, so only need to adjust the shadow MSR */ 131 vcpu->arch.shadow_msr &= ~MSR_FP; 132 vcpu->arch.shadow_msr |= vcpu->arch.shared->msr & MSR_FP; 133 #endif 134 } 135 136 /* 137 * Helper function for "full" MSR writes. No need to call this if only 138 * EE/CE/ME/DE/RI are changing. 139 */ 140 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr) 141 { 142 u32 old_msr = vcpu->arch.shared->msr; 143 144 #ifdef CONFIG_KVM_BOOKE_HV 145 new_msr |= MSR_GS; 146 #endif 147 148 vcpu->arch.shared->msr = new_msr; 149 150 kvmppc_mmu_msr_notify(vcpu, old_msr); 151 kvmppc_vcpu_sync_spe(vcpu); 152 kvmppc_vcpu_sync_fpu(vcpu); 153 } 154 155 static void kvmppc_booke_queue_irqprio(struct kvm_vcpu *vcpu, 156 unsigned int priority) 157 { 158 trace_kvm_booke_queue_irqprio(vcpu, priority); 159 set_bit(priority, &vcpu->arch.pending_exceptions); 160 } 161 162 static void kvmppc_core_queue_dtlb_miss(struct kvm_vcpu *vcpu, 163 ulong dear_flags, ulong esr_flags) 164 { 165 vcpu->arch.queued_dear = dear_flags; 166 vcpu->arch.queued_esr = esr_flags; 167 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DTLB_MISS); 168 } 169 170 static void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, 171 ulong dear_flags, ulong esr_flags) 172 { 173 vcpu->arch.queued_dear = dear_flags; 174 vcpu->arch.queued_esr = esr_flags; 175 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DATA_STORAGE); 176 } 177 178 static void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, 179 ulong esr_flags) 180 { 181 vcpu->arch.queued_esr = esr_flags; 182 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_INST_STORAGE); 183 } 184 185 static void kvmppc_core_queue_alignment(struct kvm_vcpu *vcpu, ulong dear_flags, 186 ulong esr_flags) 187 { 188 vcpu->arch.queued_dear = dear_flags; 189 vcpu->arch.queued_esr = esr_flags; 190 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ALIGNMENT); 191 } 192 193 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong esr_flags) 194 { 195 vcpu->arch.queued_esr = esr_flags; 196 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_PROGRAM); 197 } 198 199 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 200 { 201 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_DECREMENTER); 202 } 203 204 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 205 { 206 return test_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 207 } 208 209 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 210 { 211 clear_bit(BOOKE_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 212 } 213 214 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 215 struct kvm_interrupt *irq) 216 { 217 unsigned int prio = BOOKE_IRQPRIO_EXTERNAL; 218 219 if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 220 prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL; 221 222 kvmppc_booke_queue_irqprio(vcpu, prio); 223 } 224 225 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 226 { 227 clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions); 228 clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions); 229 } 230 231 static void kvmppc_core_queue_watchdog(struct kvm_vcpu *vcpu) 232 { 233 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_WATCHDOG); 234 } 235 236 static void kvmppc_core_dequeue_watchdog(struct kvm_vcpu *vcpu) 237 { 238 clear_bit(BOOKE_IRQPRIO_WATCHDOG, &vcpu->arch.pending_exceptions); 239 } 240 241 static void set_guest_srr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 242 { 243 #ifdef CONFIG_KVM_BOOKE_HV 244 mtspr(SPRN_GSRR0, srr0); 245 mtspr(SPRN_GSRR1, srr1); 246 #else 247 vcpu->arch.shared->srr0 = srr0; 248 vcpu->arch.shared->srr1 = srr1; 249 #endif 250 } 251 252 static void set_guest_csrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 253 { 254 vcpu->arch.csrr0 = srr0; 255 vcpu->arch.csrr1 = srr1; 256 } 257 258 static void set_guest_dsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 259 { 260 if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC)) { 261 vcpu->arch.dsrr0 = srr0; 262 vcpu->arch.dsrr1 = srr1; 263 } else { 264 set_guest_csrr(vcpu, srr0, srr1); 265 } 266 } 267 268 static void set_guest_mcsrr(struct kvm_vcpu *vcpu, unsigned long srr0, u32 srr1) 269 { 270 vcpu->arch.mcsrr0 = srr0; 271 vcpu->arch.mcsrr1 = srr1; 272 } 273 274 static unsigned long get_guest_dear(struct kvm_vcpu *vcpu) 275 { 276 #ifdef CONFIG_KVM_BOOKE_HV 277 return mfspr(SPRN_GDEAR); 278 #else 279 return vcpu->arch.shared->dar; 280 #endif 281 } 282 283 static void set_guest_dear(struct kvm_vcpu *vcpu, unsigned long dear) 284 { 285 #ifdef CONFIG_KVM_BOOKE_HV 286 mtspr(SPRN_GDEAR, dear); 287 #else 288 vcpu->arch.shared->dar = dear; 289 #endif 290 } 291 292 static unsigned long get_guest_esr(struct kvm_vcpu *vcpu) 293 { 294 #ifdef CONFIG_KVM_BOOKE_HV 295 return mfspr(SPRN_GESR); 296 #else 297 return vcpu->arch.shared->esr; 298 #endif 299 } 300 301 static void set_guest_esr(struct kvm_vcpu *vcpu, u32 esr) 302 { 303 #ifdef CONFIG_KVM_BOOKE_HV 304 mtspr(SPRN_GESR, esr); 305 #else 306 vcpu->arch.shared->esr = esr; 307 #endif 308 } 309 310 static unsigned long get_guest_epr(struct kvm_vcpu *vcpu) 311 { 312 #ifdef CONFIG_KVM_BOOKE_HV 313 return mfspr(SPRN_GEPR); 314 #else 315 return vcpu->arch.epr; 316 #endif 317 } 318 319 /* Deliver the interrupt of the corresponding priority, if possible. */ 320 static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu, 321 unsigned int priority) 322 { 323 int allowed = 0; 324 ulong msr_mask = 0; 325 bool update_esr = false, update_dear = false, update_epr = false; 326 ulong crit_raw = vcpu->arch.shared->critical; 327 ulong crit_r1 = kvmppc_get_gpr(vcpu, 1); 328 bool crit; 329 bool keep_irq = false; 330 enum int_class int_class; 331 ulong new_msr = vcpu->arch.shared->msr; 332 333 /* Truncate crit indicators in 32 bit mode */ 334 if (!(vcpu->arch.shared->msr & MSR_SF)) { 335 crit_raw &= 0xffffffff; 336 crit_r1 &= 0xffffffff; 337 } 338 339 /* Critical section when crit == r1 */ 340 crit = (crit_raw == crit_r1); 341 /* ... and we're in supervisor mode */ 342 crit = crit && !(vcpu->arch.shared->msr & MSR_PR); 343 344 if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) { 345 priority = BOOKE_IRQPRIO_EXTERNAL; 346 keep_irq = true; 347 } 348 349 if ((priority == BOOKE_IRQPRIO_EXTERNAL) && vcpu->arch.epr_flags) 350 update_epr = true; 351 352 switch (priority) { 353 case BOOKE_IRQPRIO_DTLB_MISS: 354 case BOOKE_IRQPRIO_DATA_STORAGE: 355 case BOOKE_IRQPRIO_ALIGNMENT: 356 update_dear = true; 357 /* fall through */ 358 case BOOKE_IRQPRIO_INST_STORAGE: 359 case BOOKE_IRQPRIO_PROGRAM: 360 update_esr = true; 361 /* fall through */ 362 case BOOKE_IRQPRIO_ITLB_MISS: 363 case BOOKE_IRQPRIO_SYSCALL: 364 case BOOKE_IRQPRIO_FP_UNAVAIL: 365 case BOOKE_IRQPRIO_SPE_UNAVAIL: 366 case BOOKE_IRQPRIO_SPE_FP_DATA: 367 case BOOKE_IRQPRIO_SPE_FP_ROUND: 368 case BOOKE_IRQPRIO_AP_UNAVAIL: 369 allowed = 1; 370 msr_mask = MSR_CE | MSR_ME | MSR_DE; 371 int_class = INT_CLASS_NONCRIT; 372 break; 373 case BOOKE_IRQPRIO_WATCHDOG: 374 case BOOKE_IRQPRIO_CRITICAL: 375 case BOOKE_IRQPRIO_DBELL_CRIT: 376 allowed = vcpu->arch.shared->msr & MSR_CE; 377 allowed = allowed && !crit; 378 msr_mask = MSR_ME; 379 int_class = INT_CLASS_CRIT; 380 break; 381 case BOOKE_IRQPRIO_MACHINE_CHECK: 382 allowed = vcpu->arch.shared->msr & MSR_ME; 383 allowed = allowed && !crit; 384 int_class = INT_CLASS_MC; 385 break; 386 case BOOKE_IRQPRIO_DECREMENTER: 387 case BOOKE_IRQPRIO_FIT: 388 keep_irq = true; 389 /* fall through */ 390 case BOOKE_IRQPRIO_EXTERNAL: 391 case BOOKE_IRQPRIO_DBELL: 392 allowed = vcpu->arch.shared->msr & MSR_EE; 393 allowed = allowed && !crit; 394 msr_mask = MSR_CE | MSR_ME | MSR_DE; 395 int_class = INT_CLASS_NONCRIT; 396 break; 397 case BOOKE_IRQPRIO_DEBUG: 398 allowed = vcpu->arch.shared->msr & MSR_DE; 399 allowed = allowed && !crit; 400 msr_mask = MSR_ME; 401 int_class = INT_CLASS_CRIT; 402 break; 403 } 404 405 if (allowed) { 406 switch (int_class) { 407 case INT_CLASS_NONCRIT: 408 set_guest_srr(vcpu, vcpu->arch.pc, 409 vcpu->arch.shared->msr); 410 break; 411 case INT_CLASS_CRIT: 412 set_guest_csrr(vcpu, vcpu->arch.pc, 413 vcpu->arch.shared->msr); 414 break; 415 case INT_CLASS_DBG: 416 set_guest_dsrr(vcpu, vcpu->arch.pc, 417 vcpu->arch.shared->msr); 418 break; 419 case INT_CLASS_MC: 420 set_guest_mcsrr(vcpu, vcpu->arch.pc, 421 vcpu->arch.shared->msr); 422 break; 423 } 424 425 vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority]; 426 if (update_esr == true) 427 set_guest_esr(vcpu, vcpu->arch.queued_esr); 428 if (update_dear == true) 429 set_guest_dear(vcpu, vcpu->arch.queued_dear); 430 if (update_epr == true) { 431 if (vcpu->arch.epr_flags & KVMPPC_EPR_USER) 432 kvm_make_request(KVM_REQ_EPR_EXIT, vcpu); 433 else if (vcpu->arch.epr_flags & KVMPPC_EPR_KERNEL) { 434 BUG_ON(vcpu->arch.irq_type != KVMPPC_IRQ_MPIC); 435 kvmppc_mpic_set_epr(vcpu); 436 } 437 } 438 439 new_msr &= msr_mask; 440 #if defined(CONFIG_64BIT) 441 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 442 new_msr |= MSR_CM; 443 #endif 444 kvmppc_set_msr(vcpu, new_msr); 445 446 if (!keep_irq) 447 clear_bit(priority, &vcpu->arch.pending_exceptions); 448 } 449 450 #ifdef CONFIG_KVM_BOOKE_HV 451 /* 452 * If an interrupt is pending but masked, raise a guest doorbell 453 * so that we are notified when the guest enables the relevant 454 * MSR bit. 455 */ 456 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_EE) 457 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_NONCRIT); 458 if (vcpu->arch.pending_exceptions & BOOKE_IRQMASK_CE) 459 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_CRIT); 460 if (vcpu->arch.pending_exceptions & BOOKE_IRQPRIO_MACHINE_CHECK) 461 kvmppc_set_pending_interrupt(vcpu, INT_CLASS_MC); 462 #endif 463 464 return allowed; 465 } 466 467 /* 468 * Return the number of jiffies until the next timeout. If the timeout is 469 * longer than the NEXT_TIMER_MAX_DELTA, then return NEXT_TIMER_MAX_DELTA 470 * because the larger value can break the timer APIs. 471 */ 472 static unsigned long watchdog_next_timeout(struct kvm_vcpu *vcpu) 473 { 474 u64 tb, wdt_tb, wdt_ticks = 0; 475 u64 nr_jiffies = 0; 476 u32 period = TCR_GET_WP(vcpu->arch.tcr); 477 478 wdt_tb = 1ULL << (63 - period); 479 tb = get_tb(); 480 /* 481 * The watchdog timeout will hapeen when TB bit corresponding 482 * to watchdog will toggle from 0 to 1. 483 */ 484 if (tb & wdt_tb) 485 wdt_ticks = wdt_tb; 486 487 wdt_ticks += wdt_tb - (tb & (wdt_tb - 1)); 488 489 /* Convert timebase ticks to jiffies */ 490 nr_jiffies = wdt_ticks; 491 492 if (do_div(nr_jiffies, tb_ticks_per_jiffy)) 493 nr_jiffies++; 494 495 return min_t(unsigned long long, nr_jiffies, NEXT_TIMER_MAX_DELTA); 496 } 497 498 static void arm_next_watchdog(struct kvm_vcpu *vcpu) 499 { 500 unsigned long nr_jiffies; 501 unsigned long flags; 502 503 /* 504 * If TSR_ENW and TSR_WIS are not set then no need to exit to 505 * userspace, so clear the KVM_REQ_WATCHDOG request. 506 */ 507 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS)) 508 clear_bit(KVM_REQ_WATCHDOG, &vcpu->requests); 509 510 spin_lock_irqsave(&vcpu->arch.wdt_lock, flags); 511 nr_jiffies = watchdog_next_timeout(vcpu); 512 /* 513 * If the number of jiffies of watchdog timer >= NEXT_TIMER_MAX_DELTA 514 * then do not run the watchdog timer as this can break timer APIs. 515 */ 516 if (nr_jiffies < NEXT_TIMER_MAX_DELTA) 517 mod_timer(&vcpu->arch.wdt_timer, jiffies + nr_jiffies); 518 else 519 del_timer(&vcpu->arch.wdt_timer); 520 spin_unlock_irqrestore(&vcpu->arch.wdt_lock, flags); 521 } 522 523 void kvmppc_watchdog_func(unsigned long data) 524 { 525 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; 526 u32 tsr, new_tsr; 527 int final; 528 529 do { 530 new_tsr = tsr = vcpu->arch.tsr; 531 final = 0; 532 533 /* Time out event */ 534 if (tsr & TSR_ENW) { 535 if (tsr & TSR_WIS) 536 final = 1; 537 else 538 new_tsr = tsr | TSR_WIS; 539 } else { 540 new_tsr = tsr | TSR_ENW; 541 } 542 } while (cmpxchg(&vcpu->arch.tsr, tsr, new_tsr) != tsr); 543 544 if (new_tsr & TSR_WIS) { 545 smp_wmb(); 546 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 547 kvm_vcpu_kick(vcpu); 548 } 549 550 /* 551 * If this is final watchdog expiry and some action is required 552 * then exit to userspace. 553 */ 554 if (final && (vcpu->arch.tcr & TCR_WRC_MASK) && 555 vcpu->arch.watchdog_enabled) { 556 smp_wmb(); 557 kvm_make_request(KVM_REQ_WATCHDOG, vcpu); 558 kvm_vcpu_kick(vcpu); 559 } 560 561 /* 562 * Stop running the watchdog timer after final expiration to 563 * prevent the host from being flooded with timers if the 564 * guest sets a short period. 565 * Timers will resume when TSR/TCR is updated next time. 566 */ 567 if (!final) 568 arm_next_watchdog(vcpu); 569 } 570 571 static void update_timer_ints(struct kvm_vcpu *vcpu) 572 { 573 if ((vcpu->arch.tcr & TCR_DIE) && (vcpu->arch.tsr & TSR_DIS)) 574 kvmppc_core_queue_dec(vcpu); 575 else 576 kvmppc_core_dequeue_dec(vcpu); 577 578 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) 579 kvmppc_core_queue_watchdog(vcpu); 580 else 581 kvmppc_core_dequeue_watchdog(vcpu); 582 } 583 584 static void kvmppc_core_check_exceptions(struct kvm_vcpu *vcpu) 585 { 586 unsigned long *pending = &vcpu->arch.pending_exceptions; 587 unsigned int priority; 588 589 priority = __ffs(*pending); 590 while (priority < BOOKE_IRQPRIO_MAX) { 591 if (kvmppc_booke_irqprio_deliver(vcpu, priority)) 592 break; 593 594 priority = find_next_bit(pending, 595 BITS_PER_BYTE * sizeof(*pending), 596 priority + 1); 597 } 598 599 /* Tell the guest about our interrupt status */ 600 vcpu->arch.shared->int_pending = !!*pending; 601 } 602 603 /* Check pending exceptions and deliver one, if possible. */ 604 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 605 { 606 int r = 0; 607 WARN_ON_ONCE(!irqs_disabled()); 608 609 kvmppc_core_check_exceptions(vcpu); 610 611 if (vcpu->requests) { 612 /* Exception delivery raised request; start over */ 613 return 1; 614 } 615 616 if (vcpu->arch.shared->msr & MSR_WE) { 617 local_irq_enable(); 618 kvm_vcpu_block(vcpu); 619 clear_bit(KVM_REQ_UNHALT, &vcpu->requests); 620 local_irq_disable(); 621 622 kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS); 623 r = 1; 624 }; 625 626 return r; 627 } 628 629 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 630 { 631 int r = 1; /* Indicate we want to get back into the guest */ 632 633 if (kvm_check_request(KVM_REQ_PENDING_TIMER, vcpu)) 634 update_timer_ints(vcpu); 635 #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) 636 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) 637 kvmppc_core_flush_tlb(vcpu); 638 #endif 639 640 if (kvm_check_request(KVM_REQ_WATCHDOG, vcpu)) { 641 vcpu->run->exit_reason = KVM_EXIT_WATCHDOG; 642 r = 0; 643 } 644 645 if (kvm_check_request(KVM_REQ_EPR_EXIT, vcpu)) { 646 vcpu->run->epr.epr = 0; 647 vcpu->arch.epr_needed = true; 648 vcpu->run->exit_reason = KVM_EXIT_EPR; 649 r = 0; 650 } 651 652 return r; 653 } 654 655 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 656 { 657 int ret, s; 658 #ifdef CONFIG_PPC_FPU 659 unsigned int fpscr; 660 int fpexc_mode; 661 u64 fpr[32]; 662 #endif 663 664 if (!vcpu->arch.sane) { 665 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 666 return -EINVAL; 667 } 668 669 local_irq_disable(); 670 s = kvmppc_prepare_to_enter(vcpu); 671 if (s <= 0) { 672 local_irq_enable(); 673 ret = s; 674 goto out; 675 } 676 kvmppc_lazy_ee_enable(); 677 678 kvm_guest_enter(); 679 680 #ifdef CONFIG_PPC_FPU 681 /* Save userspace FPU state in stack */ 682 enable_kernel_fp(); 683 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr)); 684 fpscr = current->thread.fpscr.val; 685 fpexc_mode = current->thread.fpexc_mode; 686 687 /* Restore guest FPU state to thread */ 688 memcpy(current->thread.fpr, vcpu->arch.fpr, sizeof(vcpu->arch.fpr)); 689 current->thread.fpscr.val = vcpu->arch.fpscr; 690 691 /* 692 * Since we can't trap on MSR_FP in GS-mode, we consider the guest 693 * as always using the FPU. Kernel usage of FP (via 694 * enable_kernel_fp()) in this thread must not occur while 695 * vcpu->fpu_active is set. 696 */ 697 vcpu->fpu_active = 1; 698 699 kvmppc_load_guest_fp(vcpu); 700 #endif 701 702 ret = __kvmppc_vcpu_run(kvm_run, vcpu); 703 704 /* No need for kvm_guest_exit. It's done in handle_exit. 705 We also get here with interrupts enabled. */ 706 707 #ifdef CONFIG_PPC_FPU 708 kvmppc_save_guest_fp(vcpu); 709 710 vcpu->fpu_active = 0; 711 712 /* Save guest FPU state from thread */ 713 memcpy(vcpu->arch.fpr, current->thread.fpr, sizeof(vcpu->arch.fpr)); 714 vcpu->arch.fpscr = current->thread.fpscr.val; 715 716 /* Restore userspace FPU state from stack */ 717 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr)); 718 current->thread.fpscr.val = fpscr; 719 current->thread.fpexc_mode = fpexc_mode; 720 #endif 721 722 out: 723 vcpu->mode = OUTSIDE_GUEST_MODE; 724 return ret; 725 } 726 727 static int emulation_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) 728 { 729 enum emulation_result er; 730 731 er = kvmppc_emulate_instruction(run, vcpu); 732 switch (er) { 733 case EMULATE_DONE: 734 /* don't overwrite subtypes, just account kvm_stats */ 735 kvmppc_account_exit_stat(vcpu, EMULATED_INST_EXITS); 736 /* Future optimization: only reload non-volatiles if 737 * they were actually modified by emulation. */ 738 return RESUME_GUEST_NV; 739 740 case EMULATE_DO_DCR: 741 run->exit_reason = KVM_EXIT_DCR; 742 return RESUME_HOST; 743 744 case EMULATE_FAIL: 745 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 746 __func__, vcpu->arch.pc, vcpu->arch.last_inst); 747 /* For debugging, encode the failing instruction and 748 * report it to userspace. */ 749 run->hw.hardware_exit_reason = ~0ULL << 32; 750 run->hw.hardware_exit_reason |= vcpu->arch.last_inst; 751 kvmppc_core_queue_program(vcpu, ESR_PIL); 752 return RESUME_HOST; 753 754 case EMULATE_EXIT_USER: 755 return RESUME_HOST; 756 757 default: 758 BUG(); 759 } 760 } 761 762 static void kvmppc_fill_pt_regs(struct pt_regs *regs) 763 { 764 ulong r1, ip, msr, lr; 765 766 asm("mr %0, 1" : "=r"(r1)); 767 asm("mflr %0" : "=r"(lr)); 768 asm("mfmsr %0" : "=r"(msr)); 769 asm("bl 1f; 1: mflr %0" : "=r"(ip)); 770 771 memset(regs, 0, sizeof(*regs)); 772 regs->gpr[1] = r1; 773 regs->nip = ip; 774 regs->msr = msr; 775 regs->link = lr; 776 } 777 778 /* 779 * For interrupts needed to be handled by host interrupt handlers, 780 * corresponding host handler are called from here in similar way 781 * (but not exact) as they are called from low level handler 782 * (such as from arch/powerpc/kernel/head_fsl_booke.S). 783 */ 784 static void kvmppc_restart_interrupt(struct kvm_vcpu *vcpu, 785 unsigned int exit_nr) 786 { 787 struct pt_regs regs; 788 789 switch (exit_nr) { 790 case BOOKE_INTERRUPT_EXTERNAL: 791 kvmppc_fill_pt_regs(®s); 792 do_IRQ(®s); 793 break; 794 case BOOKE_INTERRUPT_DECREMENTER: 795 kvmppc_fill_pt_regs(®s); 796 timer_interrupt(®s); 797 break; 798 #if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_BOOK3E_64) 799 case BOOKE_INTERRUPT_DOORBELL: 800 kvmppc_fill_pt_regs(®s); 801 doorbell_exception(®s); 802 break; 803 #endif 804 case BOOKE_INTERRUPT_MACHINE_CHECK: 805 /* FIXME */ 806 break; 807 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 808 kvmppc_fill_pt_regs(®s); 809 performance_monitor_exception(®s); 810 break; 811 case BOOKE_INTERRUPT_WATCHDOG: 812 kvmppc_fill_pt_regs(®s); 813 #ifdef CONFIG_BOOKE_WDT 814 WatchdogException(®s); 815 #else 816 unknown_exception(®s); 817 #endif 818 break; 819 case BOOKE_INTERRUPT_CRITICAL: 820 unknown_exception(®s); 821 break; 822 } 823 } 824 825 /** 826 * kvmppc_handle_exit 827 * 828 * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) 829 */ 830 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, 831 unsigned int exit_nr) 832 { 833 int r = RESUME_HOST; 834 int s; 835 836 /* update before a new last_exit_type is rewritten */ 837 kvmppc_update_timing_stats(vcpu); 838 839 /* restart interrupts if they were meant for the host */ 840 kvmppc_restart_interrupt(vcpu, exit_nr); 841 842 local_irq_enable(); 843 844 trace_kvm_exit(exit_nr, vcpu); 845 kvm_guest_exit(); 846 847 run->exit_reason = KVM_EXIT_UNKNOWN; 848 run->ready_for_interrupt_injection = 1; 849 850 switch (exit_nr) { 851 case BOOKE_INTERRUPT_MACHINE_CHECK: 852 printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); 853 kvmppc_dump_vcpu(vcpu); 854 /* For debugging, send invalid exit reason to user space */ 855 run->hw.hardware_exit_reason = ~1ULL << 32; 856 run->hw.hardware_exit_reason |= mfspr(SPRN_MCSR); 857 r = RESUME_HOST; 858 break; 859 860 case BOOKE_INTERRUPT_EXTERNAL: 861 kvmppc_account_exit(vcpu, EXT_INTR_EXITS); 862 r = RESUME_GUEST; 863 break; 864 865 case BOOKE_INTERRUPT_DECREMENTER: 866 kvmppc_account_exit(vcpu, DEC_EXITS); 867 r = RESUME_GUEST; 868 break; 869 870 case BOOKE_INTERRUPT_WATCHDOG: 871 r = RESUME_GUEST; 872 break; 873 874 case BOOKE_INTERRUPT_DOORBELL: 875 kvmppc_account_exit(vcpu, DBELL_EXITS); 876 r = RESUME_GUEST; 877 break; 878 879 case BOOKE_INTERRUPT_GUEST_DBELL_CRIT: 880 kvmppc_account_exit(vcpu, GDBELL_EXITS); 881 882 /* 883 * We are here because there is a pending guest interrupt 884 * which could not be delivered as MSR_CE or MSR_ME was not 885 * set. Once we break from here we will retry delivery. 886 */ 887 r = RESUME_GUEST; 888 break; 889 890 case BOOKE_INTERRUPT_GUEST_DBELL: 891 kvmppc_account_exit(vcpu, GDBELL_EXITS); 892 893 /* 894 * We are here because there is a pending guest interrupt 895 * which could not be delivered as MSR_EE was not set. Once 896 * we break from here we will retry delivery. 897 */ 898 r = RESUME_GUEST; 899 break; 900 901 case BOOKE_INTERRUPT_PERFORMANCE_MONITOR: 902 r = RESUME_GUEST; 903 break; 904 905 case BOOKE_INTERRUPT_HV_PRIV: 906 r = emulation_exit(run, vcpu); 907 break; 908 909 case BOOKE_INTERRUPT_PROGRAM: 910 if (vcpu->arch.shared->msr & (MSR_PR | MSR_GS)) { 911 /* 912 * Program traps generated by user-level software must 913 * be handled by the guest kernel. 914 * 915 * In GS mode, hypervisor privileged instructions trap 916 * on BOOKE_INTERRUPT_HV_PRIV, not here, so these are 917 * actual program interrupts, handled by the guest. 918 */ 919 kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr); 920 r = RESUME_GUEST; 921 kvmppc_account_exit(vcpu, USR_PR_INST); 922 break; 923 } 924 925 r = emulation_exit(run, vcpu); 926 break; 927 928 case BOOKE_INTERRUPT_FP_UNAVAIL: 929 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_FP_UNAVAIL); 930 kvmppc_account_exit(vcpu, FP_UNAVAIL); 931 r = RESUME_GUEST; 932 break; 933 934 #ifdef CONFIG_SPE 935 case BOOKE_INTERRUPT_SPE_UNAVAIL: { 936 if (vcpu->arch.shared->msr & MSR_SPE) 937 kvmppc_vcpu_enable_spe(vcpu); 938 else 939 kvmppc_booke_queue_irqprio(vcpu, 940 BOOKE_IRQPRIO_SPE_UNAVAIL); 941 r = RESUME_GUEST; 942 break; 943 } 944 945 case BOOKE_INTERRUPT_SPE_FP_DATA: 946 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_DATA); 947 r = RESUME_GUEST; 948 break; 949 950 case BOOKE_INTERRUPT_SPE_FP_ROUND: 951 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SPE_FP_ROUND); 952 r = RESUME_GUEST; 953 break; 954 #else 955 case BOOKE_INTERRUPT_SPE_UNAVAIL: 956 /* 957 * Guest wants SPE, but host kernel doesn't support it. Send 958 * an "unimplemented operation" program check to the guest. 959 */ 960 kvmppc_core_queue_program(vcpu, ESR_PUO | ESR_SPV); 961 r = RESUME_GUEST; 962 break; 963 964 /* 965 * These really should never happen without CONFIG_SPE, 966 * as we should never enable the real MSR[SPE] in the guest. 967 */ 968 case BOOKE_INTERRUPT_SPE_FP_DATA: 969 case BOOKE_INTERRUPT_SPE_FP_ROUND: 970 printk(KERN_CRIT "%s: unexpected SPE interrupt %u at %08lx\n", 971 __func__, exit_nr, vcpu->arch.pc); 972 run->hw.hardware_exit_reason = exit_nr; 973 r = RESUME_HOST; 974 break; 975 #endif 976 977 case BOOKE_INTERRUPT_DATA_STORAGE: 978 kvmppc_core_queue_data_storage(vcpu, vcpu->arch.fault_dear, 979 vcpu->arch.fault_esr); 980 kvmppc_account_exit(vcpu, DSI_EXITS); 981 r = RESUME_GUEST; 982 break; 983 984 case BOOKE_INTERRUPT_INST_STORAGE: 985 kvmppc_core_queue_inst_storage(vcpu, vcpu->arch.fault_esr); 986 kvmppc_account_exit(vcpu, ISI_EXITS); 987 r = RESUME_GUEST; 988 break; 989 990 case BOOKE_INTERRUPT_ALIGNMENT: 991 kvmppc_core_queue_alignment(vcpu, vcpu->arch.fault_dear, 992 vcpu->arch.fault_esr); 993 r = RESUME_GUEST; 994 break; 995 996 #ifdef CONFIG_KVM_BOOKE_HV 997 case BOOKE_INTERRUPT_HV_SYSCALL: 998 if (!(vcpu->arch.shared->msr & MSR_PR)) { 999 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1000 } else { 1001 /* 1002 * hcall from guest userspace -- send privileged 1003 * instruction program check. 1004 */ 1005 kvmppc_core_queue_program(vcpu, ESR_PPR); 1006 } 1007 1008 r = RESUME_GUEST; 1009 break; 1010 #else 1011 case BOOKE_INTERRUPT_SYSCALL: 1012 if (!(vcpu->arch.shared->msr & MSR_PR) && 1013 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 1014 /* KVM PV hypercalls */ 1015 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 1016 r = RESUME_GUEST; 1017 } else { 1018 /* Guest syscalls */ 1019 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL); 1020 } 1021 kvmppc_account_exit(vcpu, SYSCALL_EXITS); 1022 r = RESUME_GUEST; 1023 break; 1024 #endif 1025 1026 case BOOKE_INTERRUPT_DTLB_MISS: { 1027 unsigned long eaddr = vcpu->arch.fault_dear; 1028 int gtlb_index; 1029 gpa_t gpaddr; 1030 gfn_t gfn; 1031 1032 #ifdef CONFIG_KVM_E500V2 1033 if (!(vcpu->arch.shared->msr & MSR_PR) && 1034 (eaddr & PAGE_MASK) == vcpu->arch.magic_page_ea) { 1035 kvmppc_map_magic(vcpu); 1036 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1037 r = RESUME_GUEST; 1038 1039 break; 1040 } 1041 #endif 1042 1043 /* Check the guest TLB. */ 1044 gtlb_index = kvmppc_mmu_dtlb_index(vcpu, eaddr); 1045 if (gtlb_index < 0) { 1046 /* The guest didn't have a mapping for it. */ 1047 kvmppc_core_queue_dtlb_miss(vcpu, 1048 vcpu->arch.fault_dear, 1049 vcpu->arch.fault_esr); 1050 kvmppc_mmu_dtlb_miss(vcpu); 1051 kvmppc_account_exit(vcpu, DTLB_REAL_MISS_EXITS); 1052 r = RESUME_GUEST; 1053 break; 1054 } 1055 1056 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1057 gfn = gpaddr >> PAGE_SHIFT; 1058 1059 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1060 /* The guest TLB had a mapping, but the shadow TLB 1061 * didn't, and it is RAM. This could be because: 1062 * a) the entry is mapping the host kernel, or 1063 * b) the guest used a large mapping which we're faking 1064 * Either way, we need to satisfy the fault without 1065 * invoking the guest. */ 1066 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1067 kvmppc_account_exit(vcpu, DTLB_VIRT_MISS_EXITS); 1068 r = RESUME_GUEST; 1069 } else { 1070 /* Guest has mapped and accessed a page which is not 1071 * actually RAM. */ 1072 vcpu->arch.paddr_accessed = gpaddr; 1073 vcpu->arch.vaddr_accessed = eaddr; 1074 r = kvmppc_emulate_mmio(run, vcpu); 1075 kvmppc_account_exit(vcpu, MMIO_EXITS); 1076 } 1077 1078 break; 1079 } 1080 1081 case BOOKE_INTERRUPT_ITLB_MISS: { 1082 unsigned long eaddr = vcpu->arch.pc; 1083 gpa_t gpaddr; 1084 gfn_t gfn; 1085 int gtlb_index; 1086 1087 r = RESUME_GUEST; 1088 1089 /* Check the guest TLB. */ 1090 gtlb_index = kvmppc_mmu_itlb_index(vcpu, eaddr); 1091 if (gtlb_index < 0) { 1092 /* The guest didn't have a mapping for it. */ 1093 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_ITLB_MISS); 1094 kvmppc_mmu_itlb_miss(vcpu); 1095 kvmppc_account_exit(vcpu, ITLB_REAL_MISS_EXITS); 1096 break; 1097 } 1098 1099 kvmppc_account_exit(vcpu, ITLB_VIRT_MISS_EXITS); 1100 1101 gpaddr = kvmppc_mmu_xlate(vcpu, gtlb_index, eaddr); 1102 gfn = gpaddr >> PAGE_SHIFT; 1103 1104 if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { 1105 /* The guest TLB had a mapping, but the shadow TLB 1106 * didn't. This could be because: 1107 * a) the entry is mapping the host kernel, or 1108 * b) the guest used a large mapping which we're faking 1109 * Either way, we need to satisfy the fault without 1110 * invoking the guest. */ 1111 kvmppc_mmu_map(vcpu, eaddr, gpaddr, gtlb_index); 1112 } else { 1113 /* Guest mapped and leaped at non-RAM! */ 1114 kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_MACHINE_CHECK); 1115 } 1116 1117 break; 1118 } 1119 1120 case BOOKE_INTERRUPT_DEBUG: { 1121 u32 dbsr; 1122 1123 vcpu->arch.pc = mfspr(SPRN_CSRR0); 1124 1125 /* clear IAC events in DBSR register */ 1126 dbsr = mfspr(SPRN_DBSR); 1127 dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4; 1128 mtspr(SPRN_DBSR, dbsr); 1129 1130 run->exit_reason = KVM_EXIT_DEBUG; 1131 kvmppc_account_exit(vcpu, DEBUG_EXITS); 1132 r = RESUME_HOST; 1133 break; 1134 } 1135 1136 default: 1137 printk(KERN_EMERG "exit_nr %d\n", exit_nr); 1138 BUG(); 1139 } 1140 1141 /* 1142 * To avoid clobbering exit_reason, only check for signals if we 1143 * aren't already exiting to userspace for some other reason. 1144 */ 1145 if (!(r & RESUME_HOST)) { 1146 local_irq_disable(); 1147 s = kvmppc_prepare_to_enter(vcpu); 1148 if (s <= 0) { 1149 local_irq_enable(); 1150 r = (s << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); 1151 } else { 1152 kvmppc_lazy_ee_enable(); 1153 } 1154 } 1155 1156 return r; 1157 } 1158 1159 static void kvmppc_set_tsr(struct kvm_vcpu *vcpu, u32 new_tsr) 1160 { 1161 u32 old_tsr = vcpu->arch.tsr; 1162 1163 vcpu->arch.tsr = new_tsr; 1164 1165 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS)) 1166 arm_next_watchdog(vcpu); 1167 1168 update_timer_ints(vcpu); 1169 } 1170 1171 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ 1172 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 1173 { 1174 int i; 1175 int r; 1176 1177 vcpu->arch.pc = 0; 1178 vcpu->arch.shared->pir = vcpu->vcpu_id; 1179 kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */ 1180 kvmppc_set_msr(vcpu, 0); 1181 1182 #ifndef CONFIG_KVM_BOOKE_HV 1183 vcpu->arch.shadow_msr = MSR_USER | MSR_DE | MSR_IS | MSR_DS; 1184 vcpu->arch.shadow_pid = 1; 1185 vcpu->arch.shared->msr = 0; 1186 #endif 1187 1188 /* Eye-catching numbers so we know if the guest takes an interrupt 1189 * before it's programmed its own IVPR/IVORs. */ 1190 vcpu->arch.ivpr = 0x55550000; 1191 for (i = 0; i < BOOKE_IRQPRIO_MAX; i++) 1192 vcpu->arch.ivor[i] = 0x7700 | i * 4; 1193 1194 kvmppc_init_timing_stats(vcpu); 1195 1196 r = kvmppc_core_vcpu_setup(vcpu); 1197 kvmppc_sanity_check(vcpu); 1198 return r; 1199 } 1200 1201 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 1202 { 1203 /* setup watchdog timer once */ 1204 spin_lock_init(&vcpu->arch.wdt_lock); 1205 setup_timer(&vcpu->arch.wdt_timer, kvmppc_watchdog_func, 1206 (unsigned long)vcpu); 1207 1208 return 0; 1209 } 1210 1211 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 1212 { 1213 del_timer_sync(&vcpu->arch.wdt_timer); 1214 } 1215 1216 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1217 { 1218 int i; 1219 1220 regs->pc = vcpu->arch.pc; 1221 regs->cr = kvmppc_get_cr(vcpu); 1222 regs->ctr = vcpu->arch.ctr; 1223 regs->lr = vcpu->arch.lr; 1224 regs->xer = kvmppc_get_xer(vcpu); 1225 regs->msr = vcpu->arch.shared->msr; 1226 regs->srr0 = vcpu->arch.shared->srr0; 1227 regs->srr1 = vcpu->arch.shared->srr1; 1228 regs->pid = vcpu->arch.pid; 1229 regs->sprg0 = vcpu->arch.shared->sprg0; 1230 regs->sprg1 = vcpu->arch.shared->sprg1; 1231 regs->sprg2 = vcpu->arch.shared->sprg2; 1232 regs->sprg3 = vcpu->arch.shared->sprg3; 1233 regs->sprg4 = vcpu->arch.shared->sprg4; 1234 regs->sprg5 = vcpu->arch.shared->sprg5; 1235 regs->sprg6 = vcpu->arch.shared->sprg6; 1236 regs->sprg7 = vcpu->arch.shared->sprg7; 1237 1238 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1239 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 1240 1241 return 0; 1242 } 1243 1244 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 1245 { 1246 int i; 1247 1248 vcpu->arch.pc = regs->pc; 1249 kvmppc_set_cr(vcpu, regs->cr); 1250 vcpu->arch.ctr = regs->ctr; 1251 vcpu->arch.lr = regs->lr; 1252 kvmppc_set_xer(vcpu, regs->xer); 1253 kvmppc_set_msr(vcpu, regs->msr); 1254 vcpu->arch.shared->srr0 = regs->srr0; 1255 vcpu->arch.shared->srr1 = regs->srr1; 1256 kvmppc_set_pid(vcpu, regs->pid); 1257 vcpu->arch.shared->sprg0 = regs->sprg0; 1258 vcpu->arch.shared->sprg1 = regs->sprg1; 1259 vcpu->arch.shared->sprg2 = regs->sprg2; 1260 vcpu->arch.shared->sprg3 = regs->sprg3; 1261 vcpu->arch.shared->sprg4 = regs->sprg4; 1262 vcpu->arch.shared->sprg5 = regs->sprg5; 1263 vcpu->arch.shared->sprg6 = regs->sprg6; 1264 vcpu->arch.shared->sprg7 = regs->sprg7; 1265 1266 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 1267 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 1268 1269 return 0; 1270 } 1271 1272 static void get_sregs_base(struct kvm_vcpu *vcpu, 1273 struct kvm_sregs *sregs) 1274 { 1275 u64 tb = get_tb(); 1276 1277 sregs->u.e.features |= KVM_SREGS_E_BASE; 1278 1279 sregs->u.e.csrr0 = vcpu->arch.csrr0; 1280 sregs->u.e.csrr1 = vcpu->arch.csrr1; 1281 sregs->u.e.mcsr = vcpu->arch.mcsr; 1282 sregs->u.e.esr = get_guest_esr(vcpu); 1283 sregs->u.e.dear = get_guest_dear(vcpu); 1284 sregs->u.e.tsr = vcpu->arch.tsr; 1285 sregs->u.e.tcr = vcpu->arch.tcr; 1286 sregs->u.e.dec = kvmppc_get_dec(vcpu, tb); 1287 sregs->u.e.tb = tb; 1288 sregs->u.e.vrsave = vcpu->arch.vrsave; 1289 } 1290 1291 static int set_sregs_base(struct kvm_vcpu *vcpu, 1292 struct kvm_sregs *sregs) 1293 { 1294 if (!(sregs->u.e.features & KVM_SREGS_E_BASE)) 1295 return 0; 1296 1297 vcpu->arch.csrr0 = sregs->u.e.csrr0; 1298 vcpu->arch.csrr1 = sregs->u.e.csrr1; 1299 vcpu->arch.mcsr = sregs->u.e.mcsr; 1300 set_guest_esr(vcpu, sregs->u.e.esr); 1301 set_guest_dear(vcpu, sregs->u.e.dear); 1302 vcpu->arch.vrsave = sregs->u.e.vrsave; 1303 kvmppc_set_tcr(vcpu, sregs->u.e.tcr); 1304 1305 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC) { 1306 vcpu->arch.dec = sregs->u.e.dec; 1307 kvmppc_emulate_dec(vcpu); 1308 } 1309 1310 if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) 1311 kvmppc_set_tsr(vcpu, sregs->u.e.tsr); 1312 1313 return 0; 1314 } 1315 1316 static void get_sregs_arch206(struct kvm_vcpu *vcpu, 1317 struct kvm_sregs *sregs) 1318 { 1319 sregs->u.e.features |= KVM_SREGS_E_ARCH206; 1320 1321 sregs->u.e.pir = vcpu->vcpu_id; 1322 sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0; 1323 sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1; 1324 sregs->u.e.decar = vcpu->arch.decar; 1325 sregs->u.e.ivpr = vcpu->arch.ivpr; 1326 } 1327 1328 static int set_sregs_arch206(struct kvm_vcpu *vcpu, 1329 struct kvm_sregs *sregs) 1330 { 1331 if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206)) 1332 return 0; 1333 1334 if (sregs->u.e.pir != vcpu->vcpu_id) 1335 return -EINVAL; 1336 1337 vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0; 1338 vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1; 1339 vcpu->arch.decar = sregs->u.e.decar; 1340 vcpu->arch.ivpr = sregs->u.e.ivpr; 1341 1342 return 0; 1343 } 1344 1345 void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1346 { 1347 sregs->u.e.features |= KVM_SREGS_E_IVOR; 1348 1349 sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL]; 1350 sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK]; 1351 sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE]; 1352 sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE]; 1353 sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL]; 1354 sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT]; 1355 sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM]; 1356 sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL]; 1357 sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL]; 1358 sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL]; 1359 sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER]; 1360 sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT]; 1361 sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG]; 1362 sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS]; 1363 sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS]; 1364 sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG]; 1365 } 1366 1367 int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) 1368 { 1369 if (!(sregs->u.e.features & KVM_SREGS_E_IVOR)) 1370 return 0; 1371 1372 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0]; 1373 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1]; 1374 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2]; 1375 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3]; 1376 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4]; 1377 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5]; 1378 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6]; 1379 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7]; 1380 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8]; 1381 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9]; 1382 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10]; 1383 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11]; 1384 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12]; 1385 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13]; 1386 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14]; 1387 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15]; 1388 1389 return 0; 1390 } 1391 1392 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 1393 struct kvm_sregs *sregs) 1394 { 1395 sregs->pvr = vcpu->arch.pvr; 1396 1397 get_sregs_base(vcpu, sregs); 1398 get_sregs_arch206(vcpu, sregs); 1399 kvmppc_core_get_sregs(vcpu, sregs); 1400 return 0; 1401 } 1402 1403 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 1404 struct kvm_sregs *sregs) 1405 { 1406 int ret; 1407 1408 if (vcpu->arch.pvr != sregs->pvr) 1409 return -EINVAL; 1410 1411 ret = set_sregs_base(vcpu, sregs); 1412 if (ret < 0) 1413 return ret; 1414 1415 ret = set_sregs_arch206(vcpu, sregs); 1416 if (ret < 0) 1417 return ret; 1418 1419 return kvmppc_core_set_sregs(vcpu, sregs); 1420 } 1421 1422 int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 1423 { 1424 int r = 0; 1425 union kvmppc_one_reg val; 1426 int size; 1427 long int i; 1428 1429 size = one_reg_size(reg->id); 1430 if (size > sizeof(val)) 1431 return -EINVAL; 1432 1433 switch (reg->id) { 1434 case KVM_REG_PPC_IAC1: 1435 case KVM_REG_PPC_IAC2: 1436 case KVM_REG_PPC_IAC3: 1437 case KVM_REG_PPC_IAC4: 1438 i = reg->id - KVM_REG_PPC_IAC1; 1439 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.iac[i]); 1440 break; 1441 case KVM_REG_PPC_DAC1: 1442 case KVM_REG_PPC_DAC2: 1443 i = reg->id - KVM_REG_PPC_DAC1; 1444 val = get_reg_val(reg->id, vcpu->arch.dbg_reg.dac[i]); 1445 break; 1446 case KVM_REG_PPC_EPR: { 1447 u32 epr = get_guest_epr(vcpu); 1448 val = get_reg_val(reg->id, epr); 1449 break; 1450 } 1451 #if defined(CONFIG_64BIT) 1452 case KVM_REG_PPC_EPCR: 1453 val = get_reg_val(reg->id, vcpu->arch.epcr); 1454 break; 1455 #endif 1456 case KVM_REG_PPC_TCR: 1457 val = get_reg_val(reg->id, vcpu->arch.tcr); 1458 break; 1459 case KVM_REG_PPC_TSR: 1460 val = get_reg_val(reg->id, vcpu->arch.tsr); 1461 break; 1462 case KVM_REG_PPC_DEBUG_INST: 1463 val = get_reg_val(reg->id, KVMPPC_INST_EHPRIV); 1464 break; 1465 default: 1466 r = kvmppc_get_one_reg(vcpu, reg->id, &val); 1467 break; 1468 } 1469 1470 if (r) 1471 return r; 1472 1473 if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size)) 1474 r = -EFAULT; 1475 1476 return r; 1477 } 1478 1479 int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) 1480 { 1481 int r = 0; 1482 union kvmppc_one_reg val; 1483 int size; 1484 long int i; 1485 1486 size = one_reg_size(reg->id); 1487 if (size > sizeof(val)) 1488 return -EINVAL; 1489 1490 if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size)) 1491 return -EFAULT; 1492 1493 switch (reg->id) { 1494 case KVM_REG_PPC_IAC1: 1495 case KVM_REG_PPC_IAC2: 1496 case KVM_REG_PPC_IAC3: 1497 case KVM_REG_PPC_IAC4: 1498 i = reg->id - KVM_REG_PPC_IAC1; 1499 vcpu->arch.dbg_reg.iac[i] = set_reg_val(reg->id, val); 1500 break; 1501 case KVM_REG_PPC_DAC1: 1502 case KVM_REG_PPC_DAC2: 1503 i = reg->id - KVM_REG_PPC_DAC1; 1504 vcpu->arch.dbg_reg.dac[i] = set_reg_val(reg->id, val); 1505 break; 1506 case KVM_REG_PPC_EPR: { 1507 u32 new_epr = set_reg_val(reg->id, val); 1508 kvmppc_set_epr(vcpu, new_epr); 1509 break; 1510 } 1511 #if defined(CONFIG_64BIT) 1512 case KVM_REG_PPC_EPCR: { 1513 u32 new_epcr = set_reg_val(reg->id, val); 1514 kvmppc_set_epcr(vcpu, new_epcr); 1515 break; 1516 } 1517 #endif 1518 case KVM_REG_PPC_OR_TSR: { 1519 u32 tsr_bits = set_reg_val(reg->id, val); 1520 kvmppc_set_tsr_bits(vcpu, tsr_bits); 1521 break; 1522 } 1523 case KVM_REG_PPC_CLEAR_TSR: { 1524 u32 tsr_bits = set_reg_val(reg->id, val); 1525 kvmppc_clr_tsr_bits(vcpu, tsr_bits); 1526 break; 1527 } 1528 case KVM_REG_PPC_TSR: { 1529 u32 tsr = set_reg_val(reg->id, val); 1530 kvmppc_set_tsr(vcpu, tsr); 1531 break; 1532 } 1533 case KVM_REG_PPC_TCR: { 1534 u32 tcr = set_reg_val(reg->id, val); 1535 kvmppc_set_tcr(vcpu, tcr); 1536 break; 1537 } 1538 default: 1539 r = kvmppc_set_one_reg(vcpu, reg->id, &val); 1540 break; 1541 } 1542 1543 return r; 1544 } 1545 1546 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 1547 struct kvm_guest_debug *dbg) 1548 { 1549 return -EINVAL; 1550 } 1551 1552 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1553 { 1554 return -ENOTSUPP; 1555 } 1556 1557 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 1558 { 1559 return -ENOTSUPP; 1560 } 1561 1562 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 1563 struct kvm_translation *tr) 1564 { 1565 int r; 1566 1567 r = kvmppc_core_vcpu_translate(vcpu, tr); 1568 return r; 1569 } 1570 1571 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 1572 { 1573 return -ENOTSUPP; 1574 } 1575 1576 void kvmppc_core_free_memslot(struct kvm_memory_slot *free, 1577 struct kvm_memory_slot *dont) 1578 { 1579 } 1580 1581 int kvmppc_core_create_memslot(struct kvm_memory_slot *slot, 1582 unsigned long npages) 1583 { 1584 return 0; 1585 } 1586 1587 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 1588 struct kvm_memory_slot *memslot, 1589 struct kvm_userspace_memory_region *mem) 1590 { 1591 return 0; 1592 } 1593 1594 void kvmppc_core_commit_memory_region(struct kvm *kvm, 1595 struct kvm_userspace_memory_region *mem, 1596 const struct kvm_memory_slot *old) 1597 { 1598 } 1599 1600 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 1601 { 1602 } 1603 1604 void kvmppc_set_epcr(struct kvm_vcpu *vcpu, u32 new_epcr) 1605 { 1606 #if defined(CONFIG_64BIT) 1607 vcpu->arch.epcr = new_epcr; 1608 #ifdef CONFIG_KVM_BOOKE_HV 1609 vcpu->arch.shadow_epcr &= ~SPRN_EPCR_GICM; 1610 if (vcpu->arch.epcr & SPRN_EPCR_ICM) 1611 vcpu->arch.shadow_epcr |= SPRN_EPCR_GICM; 1612 #endif 1613 #endif 1614 } 1615 1616 void kvmppc_set_tcr(struct kvm_vcpu *vcpu, u32 new_tcr) 1617 { 1618 vcpu->arch.tcr = new_tcr; 1619 arm_next_watchdog(vcpu); 1620 update_timer_ints(vcpu); 1621 } 1622 1623 void kvmppc_set_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1624 { 1625 set_bits(tsr_bits, &vcpu->arch.tsr); 1626 smp_wmb(); 1627 kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu); 1628 kvm_vcpu_kick(vcpu); 1629 } 1630 1631 void kvmppc_clr_tsr_bits(struct kvm_vcpu *vcpu, u32 tsr_bits) 1632 { 1633 clear_bits(tsr_bits, &vcpu->arch.tsr); 1634 1635 /* 1636 * We may have stopped the watchdog due to 1637 * being stuck on final expiration. 1638 */ 1639 if (tsr_bits & (TSR_ENW | TSR_WIS)) 1640 arm_next_watchdog(vcpu); 1641 1642 update_timer_ints(vcpu); 1643 } 1644 1645 void kvmppc_decrementer_func(unsigned long data) 1646 { 1647 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)data; 1648 1649 if (vcpu->arch.tcr & TCR_ARE) { 1650 vcpu->arch.dec = vcpu->arch.decar; 1651 kvmppc_emulate_dec(vcpu); 1652 } 1653 1654 kvmppc_set_tsr_bits(vcpu, TSR_DIS); 1655 } 1656 1657 void kvmppc_booke_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 1658 { 1659 vcpu->cpu = smp_processor_id(); 1660 current->thread.kvm_vcpu = vcpu; 1661 } 1662 1663 void kvmppc_booke_vcpu_put(struct kvm_vcpu *vcpu) 1664 { 1665 current->thread.kvm_vcpu = NULL; 1666 vcpu->cpu = -1; 1667 } 1668 1669 int __init kvmppc_booke_init(void) 1670 { 1671 #ifndef CONFIG_KVM_BOOKE_HV 1672 unsigned long ivor[16]; 1673 unsigned long *handler = kvmppc_booke_handler_addr; 1674 unsigned long max_ivor = 0; 1675 unsigned long handler_len; 1676 int i; 1677 1678 /* We install our own exception handlers by hijacking IVPR. IVPR must 1679 * be 16-bit aligned, so we need a 64KB allocation. */ 1680 kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, 1681 VCPU_SIZE_ORDER); 1682 if (!kvmppc_booke_handlers) 1683 return -ENOMEM; 1684 1685 /* XXX make sure our handlers are smaller than Linux's */ 1686 1687 /* Copy our interrupt handlers to match host IVORs. That way we don't 1688 * have to swap the IVORs on every guest/host transition. */ 1689 ivor[0] = mfspr(SPRN_IVOR0); 1690 ivor[1] = mfspr(SPRN_IVOR1); 1691 ivor[2] = mfspr(SPRN_IVOR2); 1692 ivor[3] = mfspr(SPRN_IVOR3); 1693 ivor[4] = mfspr(SPRN_IVOR4); 1694 ivor[5] = mfspr(SPRN_IVOR5); 1695 ivor[6] = mfspr(SPRN_IVOR6); 1696 ivor[7] = mfspr(SPRN_IVOR7); 1697 ivor[8] = mfspr(SPRN_IVOR8); 1698 ivor[9] = mfspr(SPRN_IVOR9); 1699 ivor[10] = mfspr(SPRN_IVOR10); 1700 ivor[11] = mfspr(SPRN_IVOR11); 1701 ivor[12] = mfspr(SPRN_IVOR12); 1702 ivor[13] = mfspr(SPRN_IVOR13); 1703 ivor[14] = mfspr(SPRN_IVOR14); 1704 ivor[15] = mfspr(SPRN_IVOR15); 1705 1706 for (i = 0; i < 16; i++) { 1707 if (ivor[i] > max_ivor) 1708 max_ivor = i; 1709 1710 handler_len = handler[i + 1] - handler[i]; 1711 memcpy((void *)kvmppc_booke_handlers + ivor[i], 1712 (void *)handler[i], handler_len); 1713 } 1714 1715 handler_len = handler[max_ivor + 1] - handler[max_ivor]; 1716 flush_icache_range(kvmppc_booke_handlers, kvmppc_booke_handlers + 1717 ivor[max_ivor] + handler_len); 1718 #endif /* !BOOKE_HV */ 1719 return 0; 1720 } 1721 1722 void __exit kvmppc_booke_exit(void) 1723 { 1724 free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); 1725 kvm_exit(); 1726 } 1727