1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14 *
15 * Copyright SUSE Linux Products GmbH 2009
16 *
17 * Authors: Alexander Graf <agraf@suse.de>
18 */
19
20#include <asm/ppc_asm.h>
21#include <asm/kvm_asm.h>
22#include <asm/reg.h>
23#include <asm/page.h>
24#include <asm/asm-offsets.h>
25
26#ifdef CONFIG_PPC_BOOK3S_64
27#include <asm/exception-64s.h>
28#endif
29
30/*****************************************************************************
31 *                                                                           *
32 *        Real Mode handlers that need to be in low physical memory          *
33 *                                                                           *
34 ****************************************************************************/
35
36#if defined(CONFIG_PPC_BOOK3S_64)
37
38#define LOAD_SHADOW_VCPU(reg)	GET_PACA(reg)
39#define SHADOW_VCPU_OFF		PACA_KVM_SVCPU
40#define MSR_NOIRQ		MSR_KERNEL & ~(MSR_IR | MSR_DR)
41#define FUNC(name) 		GLUE(.,name)
42
43#elif defined(CONFIG_PPC_BOOK3S_32)
44
45#define LOAD_SHADOW_VCPU(reg)						\
46	mfspr	reg, SPRN_SPRG_THREAD;					\
47	lwz	reg, THREAD_KVM_SVCPU(reg);				\
48	/* PPC32 can have a NULL pointer - let's check for that */	\
49	mtspr   SPRN_SPRG_SCRATCH1, r12;	/* Save r12 */		\
50	mfcr	r12;							\
51	cmpwi	reg, 0;							\
52	bne	1f;							\
53	mfspr	reg, SPRN_SPRG_SCRATCH0;				\
54	mtcr	r12;							\
55	mfspr	r12, SPRN_SPRG_SCRATCH1;				\
56	b	kvmppc_resume_\intno;					\
571:;									\
58	mtcr	r12;							\
59	mfspr	r12, SPRN_SPRG_SCRATCH1;				\
60	tophys(reg, reg)
61
62#define SHADOW_VCPU_OFF		0
63#define MSR_NOIRQ		MSR_KERNEL
64#define FUNC(name)		name
65
66#endif
67
68.macro INTERRUPT_TRAMPOLINE intno
69
70.global kvmppc_trampoline_\intno
71kvmppc_trampoline_\intno:
72
73	SET_SCRATCH0(r13)		/* Save r13 */
74
75	/*
76	 * First thing to do is to find out if we're coming
77	 * from a KVM guest or a Linux process.
78	 *
79	 * To distinguish, we check a magic byte in the PACA/current
80	 */
81	LOAD_SHADOW_VCPU(r13)
82	PPC_STL	r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
83	mfcr	r12
84	stw	r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
85	lbz	r12, (SHADOW_VCPU_OFF + SVCPU_IN_GUEST)(r13)
86	cmpwi	r12, KVM_GUEST_MODE_NONE
87	bne	..kvmppc_handler_hasmagic_\intno
88	/* No KVM guest? Then jump back to the Linux handler! */
89	lwz	r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
90	mtcr	r12
91	PPC_LL	r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
92	GET_SCRATCH0(r13)			/* r13 = original r13 */
93	b	kvmppc_resume_\intno		/* Get back original handler */
94
95	/* Now we know we're handling a KVM guest */
96..kvmppc_handler_hasmagic_\intno:
97
98	/* Should we just skip the faulting instruction? */
99	cmpwi	r12, KVM_GUEST_MODE_SKIP
100	beq	kvmppc_handler_skip_ins
101
102	/* Let's store which interrupt we're handling */
103	li	r12, \intno
104
105	/* Jump into the SLB exit code that goes to the highmem handler */
106	b	kvmppc_handler_trampoline_exit
107
108.endm
109
110INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_SYSTEM_RESET
111INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_MACHINE_CHECK
112INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_DATA_STORAGE
113INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_INST_STORAGE
114INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_EXTERNAL
115#ifdef CONFIG_PPC_BOOK3S_64
116INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_EXTERNAL_HV
117#endif
118INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_ALIGNMENT
119INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_PROGRAM
120INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_FP_UNAVAIL
121INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_DECREMENTER
122INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_SYSCALL
123INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_TRACE
124INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_PERFMON
125INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_ALTIVEC
126
127/* Those are only available on 64 bit machines */
128
129#ifdef CONFIG_PPC_BOOK3S_64
130INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_DATA_SEGMENT
131INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_INST_SEGMENT
132INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_VSX
133#endif
134
135/*
136 * Bring us back to the faulting code, but skip the
137 * faulting instruction.
138 *
139 * This is a generic exit path from the interrupt
140 * trampolines above.
141 *
142 * Input Registers:
143 *
144 * R12            = free
145 * R13            = Shadow VCPU (PACA)
146 * SVCPU.SCRATCH0 = guest R12
147 * SVCPU.SCRATCH1 = guest CR
148 * SPRG_SCRATCH0  = guest R13
149 *
150 */
151kvmppc_handler_skip_ins:
152
153	/* Patch the IP to the next instruction */
154	mfsrr0	r12
155	addi	r12, r12, 4
156	mtsrr0	r12
157
158	/* Clean up all state */
159	lwz	r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
160	mtcr	r12
161	PPC_LL	r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
162	GET_SCRATCH0(r13)
163
164	/* And get back into the code */
165	RFI
166
167/*
168 * This trampoline brings us back to a real mode handler
169 *
170 * Input Registers:
171 *
172 * R5 = SRR0
173 * R6 = SRR1
174 * LR = real-mode IP
175 *
176 */
177.global kvmppc_handler_lowmem_trampoline
178kvmppc_handler_lowmem_trampoline:
179
180	mtsrr0	r5
181	mtsrr1	r6
182	blr
183kvmppc_handler_lowmem_trampoline_end:
184
185/*
186 * Call a function in real mode
187 *
188 * Input Registers:
189 *
190 * R3 = function
191 * R4 = MSR
192 * R5 = scratch register
193 *
194 */
195_GLOBAL(kvmppc_rmcall)
196	LOAD_REG_IMMEDIATE(r5, MSR_NOIRQ)
197	mtmsr	r5		/* Disable relocation and interrupts, so mtsrr
198				   doesn't get interrupted */
199	sync
200	mtsrr0	r3
201	mtsrr1	r4
202	RFI
203
204#if defined(CONFIG_PPC_BOOK3S_32)
205#define STACK_LR	INT_FRAME_SIZE+4
206
207/* load_up_xxx have to run with MSR_DR=0 on Book3S_32 */
208#define MSR_EXT_START						\
209	PPC_STL	r20, _NIP(r1);					\
210	mfmsr	r20;						\
211	LOAD_REG_IMMEDIATE(r3, MSR_DR|MSR_EE);			\
212	andc	r3,r20,r3;		/* Disable DR,EE */	\
213	mtmsr	r3;						\
214	sync
215
216#define MSR_EXT_END						\
217	mtmsr	r20;			/* Enable DR,EE */	\
218	sync;							\
219	PPC_LL	r20, _NIP(r1)
220
221#elif defined(CONFIG_PPC_BOOK3S_64)
222#define STACK_LR	_LINK
223#define MSR_EXT_START
224#define MSR_EXT_END
225#endif
226
227/*
228 * Activate current's external feature (FPU/Altivec/VSX)
229 */
230#define define_load_up(what) 					\
231								\
232_GLOBAL(kvmppc_load_up_ ## what);				\
233	PPC_STLU r1, -INT_FRAME_SIZE(r1);			\
234	mflr	r3;						\
235	PPC_STL	r3, STACK_LR(r1);				\
236	MSR_EXT_START;						\
237								\
238	bl	FUNC(load_up_ ## what);				\
239								\
240	MSR_EXT_END;						\
241	PPC_LL	r3, STACK_LR(r1);				\
242	mtlr	r3;						\
243	addi	r1, r1, INT_FRAME_SIZE;				\
244	blr
245
246define_load_up(fpu)
247#ifdef CONFIG_ALTIVEC
248define_load_up(altivec)
249#endif
250#ifdef CONFIG_VSX
251define_load_up(vsx)
252#endif
253
254.global kvmppc_trampoline_lowmem
255kvmppc_trampoline_lowmem:
256	PPC_LONG kvmppc_handler_lowmem_trampoline - CONFIG_KERNEL_START
257
258.global kvmppc_trampoline_enter
259kvmppc_trampoline_enter:
260	PPC_LONG kvmppc_handler_trampoline_enter - CONFIG_KERNEL_START
261
262#include "book3s_segment.S"
263