1 /* 2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 3 * 4 * Authors: 5 * Alexander Graf <agraf@suse.de> 6 * Kevin Wolf <mail@kevin-wolf.de> 7 * Paul Mackerras <paulus@samba.org> 8 * 9 * Description: 10 * Functions relating to running KVM on Book 3S processors where 11 * we don't have access to hypervisor mode, and we run the guest 12 * in problem state (user mode). 13 * 14 * This file is derived from arch/powerpc/kvm/44x.c, 15 * by Hollis Blanchard <hollisb@us.ibm.com>. 16 * 17 * This program is free software; you can redistribute it and/or modify 18 * it under the terms of the GNU General Public License, version 2, as 19 * published by the Free Software Foundation. 20 */ 21 22 #include <linux/kvm_host.h> 23 #include <linux/export.h> 24 #include <linux/err.h> 25 #include <linux/slab.h> 26 27 #include <asm/reg.h> 28 #include <asm/cputable.h> 29 #include <asm/cacheflush.h> 30 #include <asm/tlbflush.h> 31 #include <asm/uaccess.h> 32 #include <asm/io.h> 33 #include <asm/kvm_ppc.h> 34 #include <asm/kvm_book3s.h> 35 #include <asm/mmu_context.h> 36 #include <asm/switch_to.h> 37 #include <linux/gfp.h> 38 #include <linux/sched.h> 39 #include <linux/vmalloc.h> 40 #include <linux/highmem.h> 41 42 #include "trace.h" 43 44 /* #define EXIT_DEBUG */ 45 /* #define DEBUG_EXT */ 46 47 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr, 48 ulong msr); 49 50 /* Some compatibility defines */ 51 #ifdef CONFIG_PPC_BOOK3S_32 52 #define MSR_USER32 MSR_USER 53 #define MSR_USER64 MSR_USER 54 #define HW_PAGE_SIZE PAGE_SIZE 55 #endif 56 57 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 58 { 59 #ifdef CONFIG_PPC_BOOK3S_64 60 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 61 memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb)); 62 memcpy(&get_paca()->shadow_vcpu, to_book3s(vcpu)->shadow_vcpu, 63 sizeof(get_paca()->shadow_vcpu)); 64 svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max; 65 svcpu_put(svcpu); 66 #endif 67 vcpu->cpu = smp_processor_id(); 68 #ifdef CONFIG_PPC_BOOK3S_32 69 current->thread.kvm_shadow_vcpu = to_book3s(vcpu)->shadow_vcpu; 70 #endif 71 } 72 73 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) 74 { 75 #ifdef CONFIG_PPC_BOOK3S_64 76 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 77 memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb)); 78 memcpy(to_book3s(vcpu)->shadow_vcpu, &get_paca()->shadow_vcpu, 79 sizeof(get_paca()->shadow_vcpu)); 80 to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max; 81 svcpu_put(svcpu); 82 #endif 83 84 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX); 85 vcpu->cpu = -1; 86 } 87 88 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 89 { 90 int r = 1; /* Indicate we want to get back into the guest */ 91 92 /* We misuse TLB_FLUSH to indicate that we want to clear 93 all shadow cache entries */ 94 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) 95 kvmppc_mmu_pte_flush(vcpu, 0, 0); 96 97 return r; 98 } 99 100 /************* MMU Notifiers *************/ 101 102 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) 103 { 104 trace_kvm_unmap_hva(hva); 105 106 /* 107 * Flush all shadow tlb entries everywhere. This is slow, but 108 * we are 100% sure that we catch the to be unmapped page 109 */ 110 kvm_flush_remote_tlbs(kvm); 111 112 return 0; 113 } 114 115 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end) 116 { 117 /* kvm_unmap_hva flushes everything anyways */ 118 kvm_unmap_hva(kvm, start); 119 120 return 0; 121 } 122 123 int kvm_age_hva(struct kvm *kvm, unsigned long hva) 124 { 125 /* XXX could be more clever ;) */ 126 return 0; 127 } 128 129 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) 130 { 131 /* XXX could be more clever ;) */ 132 return 0; 133 } 134 135 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) 136 { 137 /* The page will get remapped properly on its next fault */ 138 kvm_unmap_hva(kvm, hva); 139 } 140 141 /*****************************************/ 142 143 static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu) 144 { 145 ulong smsr = vcpu->arch.shared->msr; 146 147 /* Guest MSR values */ 148 smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE; 149 /* Process MSR values */ 150 smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE; 151 /* External providers the guest reserved */ 152 smsr |= (vcpu->arch.shared->msr & vcpu->arch.guest_owned_ext); 153 /* 64-bit Process MSR values */ 154 #ifdef CONFIG_PPC_BOOK3S_64 155 smsr |= MSR_ISF | MSR_HV; 156 #endif 157 vcpu->arch.shadow_msr = smsr; 158 } 159 160 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr) 161 { 162 ulong old_msr = vcpu->arch.shared->msr; 163 164 #ifdef EXIT_DEBUG 165 printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr); 166 #endif 167 168 msr &= to_book3s(vcpu)->msr_mask; 169 vcpu->arch.shared->msr = msr; 170 kvmppc_recalc_shadow_msr(vcpu); 171 172 if (msr & MSR_POW) { 173 if (!vcpu->arch.pending_exceptions) { 174 kvm_vcpu_block(vcpu); 175 clear_bit(KVM_REQ_UNHALT, &vcpu->requests); 176 vcpu->stat.halt_wakeup++; 177 178 /* Unset POW bit after we woke up */ 179 msr &= ~MSR_POW; 180 vcpu->arch.shared->msr = msr; 181 } 182 } 183 184 if ((vcpu->arch.shared->msr & (MSR_PR|MSR_IR|MSR_DR)) != 185 (old_msr & (MSR_PR|MSR_IR|MSR_DR))) { 186 kvmppc_mmu_flush_segments(vcpu); 187 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); 188 189 /* Preload magic page segment when in kernel mode */ 190 if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) { 191 struct kvm_vcpu_arch *a = &vcpu->arch; 192 193 if (msr & MSR_DR) 194 kvmppc_mmu_map_segment(vcpu, a->magic_page_ea); 195 else 196 kvmppc_mmu_map_segment(vcpu, a->magic_page_pa); 197 } 198 } 199 200 /* 201 * When switching from 32 to 64-bit, we may have a stale 32-bit 202 * magic page around, we need to flush it. Typically 32-bit magic 203 * page will be instanciated when calling into RTAS. Note: We 204 * assume that such transition only happens while in kernel mode, 205 * ie, we never transition from user 32-bit to kernel 64-bit with 206 * a 32-bit magic page around. 207 */ 208 if (vcpu->arch.magic_page_pa && 209 !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) { 210 /* going from RTAS to normal kernel code */ 211 kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa, 212 ~0xFFFUL); 213 } 214 215 /* Preload FPU if it's enabled */ 216 if (vcpu->arch.shared->msr & MSR_FP) 217 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP); 218 } 219 220 void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr) 221 { 222 u32 host_pvr; 223 224 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB; 225 vcpu->arch.pvr = pvr; 226 #ifdef CONFIG_PPC_BOOK3S_64 227 if ((pvr >= 0x330000) && (pvr < 0x70330000)) { 228 kvmppc_mmu_book3s_64_init(vcpu); 229 if (!to_book3s(vcpu)->hior_explicit) 230 to_book3s(vcpu)->hior = 0xfff00000; 231 to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL; 232 vcpu->arch.cpu_type = KVM_CPU_3S_64; 233 } else 234 #endif 235 { 236 kvmppc_mmu_book3s_32_init(vcpu); 237 if (!to_book3s(vcpu)->hior_explicit) 238 to_book3s(vcpu)->hior = 0; 239 to_book3s(vcpu)->msr_mask = 0xffffffffULL; 240 vcpu->arch.cpu_type = KVM_CPU_3S_32; 241 } 242 243 kvmppc_sanity_check(vcpu); 244 245 /* If we are in hypervisor level on 970, we can tell the CPU to 246 * treat DCBZ as 32 bytes store */ 247 vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32; 248 if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) && 249 !strcmp(cur_cpu_spec->platform, "ppc970")) 250 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; 251 252 /* Cell performs badly if MSR_FEx are set. So let's hope nobody 253 really needs them in a VM on Cell and force disable them. */ 254 if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be")) 255 to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1); 256 257 #ifdef CONFIG_PPC_BOOK3S_32 258 /* 32 bit Book3S always has 32 byte dcbz */ 259 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; 260 #endif 261 262 /* On some CPUs we can execute paired single operations natively */ 263 asm ( "mfpvr %0" : "=r"(host_pvr)); 264 switch (host_pvr) { 265 case 0x00080200: /* lonestar 2.0 */ 266 case 0x00088202: /* lonestar 2.2 */ 267 case 0x70000100: /* gekko 1.0 */ 268 case 0x00080100: /* gekko 2.0 */ 269 case 0x00083203: /* gekko 2.3a */ 270 case 0x00083213: /* gekko 2.3b */ 271 case 0x00083204: /* gekko 2.4 */ 272 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */ 273 case 0x00087200: /* broadway */ 274 vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS; 275 /* Enable HID2.PSE - in case we need it later */ 276 mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29)); 277 } 278 } 279 280 /* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To 281 * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to 282 * emulate 32 bytes dcbz length. 283 * 284 * The Book3s_64 inventors also realized this case and implemented a special bit 285 * in the HID5 register, which is a hypervisor ressource. Thus we can't use it. 286 * 287 * My approach here is to patch the dcbz instruction on executing pages. 288 */ 289 static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte) 290 { 291 struct page *hpage; 292 u64 hpage_offset; 293 u32 *page; 294 int i; 295 296 hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT); 297 if (is_error_page(hpage)) 298 return; 299 300 hpage_offset = pte->raddr & ~PAGE_MASK; 301 hpage_offset &= ~0xFFFULL; 302 hpage_offset /= 4; 303 304 get_page(hpage); 305 page = kmap_atomic(hpage); 306 307 /* patch dcbz into reserved instruction, so we trap */ 308 for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++) 309 if ((page[i] & 0xff0007ff) == INS_DCBZ) 310 page[i] &= 0xfffffff7; 311 312 kunmap_atomic(page); 313 put_page(hpage); 314 } 315 316 static int kvmppc_visible_gfn(struct kvm_vcpu *vcpu, gfn_t gfn) 317 { 318 ulong mp_pa = vcpu->arch.magic_page_pa; 319 320 if (!(vcpu->arch.shared->msr & MSR_SF)) 321 mp_pa = (uint32_t)mp_pa; 322 323 if (unlikely(mp_pa) && 324 unlikely((mp_pa & KVM_PAM) >> PAGE_SHIFT == gfn)) { 325 return 1; 326 } 327 328 return kvm_is_visible_gfn(vcpu->kvm, gfn); 329 } 330 331 int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu, 332 ulong eaddr, int vec) 333 { 334 bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE); 335 int r = RESUME_GUEST; 336 int relocated; 337 int page_found = 0; 338 struct kvmppc_pte pte; 339 bool is_mmio = false; 340 bool dr = (vcpu->arch.shared->msr & MSR_DR) ? true : false; 341 bool ir = (vcpu->arch.shared->msr & MSR_IR) ? true : false; 342 u64 vsid; 343 344 relocated = data ? dr : ir; 345 346 /* Resolve real address if translation turned on */ 347 if (relocated) { 348 page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data); 349 } else { 350 pte.may_execute = true; 351 pte.may_read = true; 352 pte.may_write = true; 353 pte.raddr = eaddr & KVM_PAM; 354 pte.eaddr = eaddr; 355 pte.vpage = eaddr >> 12; 356 } 357 358 switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) { 359 case 0: 360 pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12)); 361 break; 362 case MSR_DR: 363 case MSR_IR: 364 vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid); 365 366 if ((vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) == MSR_DR) 367 pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12)); 368 else 369 pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12)); 370 pte.vpage |= vsid; 371 372 if (vsid == -1) 373 page_found = -EINVAL; 374 break; 375 } 376 377 if (vcpu->arch.mmu.is_dcbz32(vcpu) && 378 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) { 379 /* 380 * If we do the dcbz hack, we have to NX on every execution, 381 * so we can patch the executing code. This renders our guest 382 * NX-less. 383 */ 384 pte.may_execute = !data; 385 } 386 387 if (page_found == -ENOENT) { 388 /* Page not found in guest PTE entries */ 389 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 390 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); 391 vcpu->arch.shared->dsisr = svcpu->fault_dsisr; 392 vcpu->arch.shared->msr |= 393 (svcpu->shadow_srr1 & 0x00000000f8000000ULL); 394 svcpu_put(svcpu); 395 kvmppc_book3s_queue_irqprio(vcpu, vec); 396 } else if (page_found == -EPERM) { 397 /* Storage protection */ 398 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 399 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); 400 vcpu->arch.shared->dsisr = svcpu->fault_dsisr & ~DSISR_NOHPTE; 401 vcpu->arch.shared->dsisr |= DSISR_PROTFAULT; 402 vcpu->arch.shared->msr |= 403 svcpu->shadow_srr1 & 0x00000000f8000000ULL; 404 svcpu_put(svcpu); 405 kvmppc_book3s_queue_irqprio(vcpu, vec); 406 } else if (page_found == -EINVAL) { 407 /* Page not found in guest SLB */ 408 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); 409 kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80); 410 } else if (!is_mmio && 411 kvmppc_visible_gfn(vcpu, pte.raddr >> PAGE_SHIFT)) { 412 /* The guest's PTE is not mapped yet. Map on the host */ 413 kvmppc_mmu_map_page(vcpu, &pte); 414 if (data) 415 vcpu->stat.sp_storage++; 416 else if (vcpu->arch.mmu.is_dcbz32(vcpu) && 417 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) 418 kvmppc_patch_dcbz(vcpu, &pte); 419 } else { 420 /* MMIO */ 421 vcpu->stat.mmio_exits++; 422 vcpu->arch.paddr_accessed = pte.raddr; 423 vcpu->arch.vaddr_accessed = pte.eaddr; 424 r = kvmppc_emulate_mmio(run, vcpu); 425 if ( r == RESUME_HOST_NV ) 426 r = RESUME_HOST; 427 } 428 429 return r; 430 } 431 432 static inline int get_fpr_index(int i) 433 { 434 return i * TS_FPRWIDTH; 435 } 436 437 /* Give up external provider (FPU, Altivec, VSX) */ 438 void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr) 439 { 440 struct thread_struct *t = ¤t->thread; 441 u64 *vcpu_fpr = vcpu->arch.fpr; 442 #ifdef CONFIG_VSX 443 u64 *vcpu_vsx = vcpu->arch.vsr; 444 #endif 445 u64 *thread_fpr = (u64*)t->fpr; 446 int i; 447 448 /* 449 * VSX instructions can access FP and vector registers, so if 450 * we are giving up VSX, make sure we give up FP and VMX as well. 451 */ 452 if (msr & MSR_VSX) 453 msr |= MSR_FP | MSR_VEC; 454 455 msr &= vcpu->arch.guest_owned_ext; 456 if (!msr) 457 return; 458 459 #ifdef DEBUG_EXT 460 printk(KERN_INFO "Giving up ext 0x%lx\n", msr); 461 #endif 462 463 if (msr & MSR_FP) { 464 /* 465 * Note that on CPUs with VSX, giveup_fpu stores 466 * both the traditional FP registers and the added VSX 467 * registers into thread.fpr[]. 468 */ 469 giveup_fpu(current); 470 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) 471 vcpu_fpr[i] = thread_fpr[get_fpr_index(i)]; 472 473 vcpu->arch.fpscr = t->fpscr.val; 474 475 #ifdef CONFIG_VSX 476 if (cpu_has_feature(CPU_FTR_VSX)) 477 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr) / 2; i++) 478 vcpu_vsx[i] = thread_fpr[get_fpr_index(i) + 1]; 479 #endif 480 } 481 482 #ifdef CONFIG_ALTIVEC 483 if (msr & MSR_VEC) { 484 giveup_altivec(current); 485 memcpy(vcpu->arch.vr, t->vr, sizeof(vcpu->arch.vr)); 486 vcpu->arch.vscr = t->vscr; 487 } 488 #endif 489 490 vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX); 491 kvmppc_recalc_shadow_msr(vcpu); 492 } 493 494 static int kvmppc_read_inst(struct kvm_vcpu *vcpu) 495 { 496 ulong srr0 = kvmppc_get_pc(vcpu); 497 u32 last_inst = kvmppc_get_last_inst(vcpu); 498 int ret; 499 500 ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false); 501 if (ret == -ENOENT) { 502 ulong msr = vcpu->arch.shared->msr; 503 504 msr = kvmppc_set_field(msr, 33, 33, 1); 505 msr = kvmppc_set_field(msr, 34, 36, 0); 506 vcpu->arch.shared->msr = kvmppc_set_field(msr, 42, 47, 0); 507 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE); 508 return EMULATE_AGAIN; 509 } 510 511 return EMULATE_DONE; 512 } 513 514 static int kvmppc_check_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr) 515 { 516 517 /* Need to do paired single emulation? */ 518 if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)) 519 return EMULATE_DONE; 520 521 /* Read out the instruction */ 522 if (kvmppc_read_inst(vcpu) == EMULATE_DONE) 523 /* Need to emulate */ 524 return EMULATE_FAIL; 525 526 return EMULATE_AGAIN; 527 } 528 529 /* Handle external providers (FPU, Altivec, VSX) */ 530 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr, 531 ulong msr) 532 { 533 struct thread_struct *t = ¤t->thread; 534 u64 *vcpu_fpr = vcpu->arch.fpr; 535 #ifdef CONFIG_VSX 536 u64 *vcpu_vsx = vcpu->arch.vsr; 537 #endif 538 u64 *thread_fpr = (u64*)t->fpr; 539 int i; 540 541 /* When we have paired singles, we emulate in software */ 542 if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) 543 return RESUME_GUEST; 544 545 if (!(vcpu->arch.shared->msr & msr)) { 546 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 547 return RESUME_GUEST; 548 } 549 550 if (msr == MSR_VSX) { 551 /* No VSX? Give an illegal instruction interrupt */ 552 #ifdef CONFIG_VSX 553 if (!cpu_has_feature(CPU_FTR_VSX)) 554 #endif 555 { 556 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 557 return RESUME_GUEST; 558 } 559 560 /* 561 * We have to load up all the FP and VMX registers before 562 * we can let the guest use VSX instructions. 563 */ 564 msr = MSR_FP | MSR_VEC | MSR_VSX; 565 } 566 567 /* See if we already own all the ext(s) needed */ 568 msr &= ~vcpu->arch.guest_owned_ext; 569 if (!msr) 570 return RESUME_GUEST; 571 572 #ifdef DEBUG_EXT 573 printk(KERN_INFO "Loading up ext 0x%lx\n", msr); 574 #endif 575 576 current->thread.regs->msr |= msr; 577 578 if (msr & MSR_FP) { 579 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) 580 thread_fpr[get_fpr_index(i)] = vcpu_fpr[i]; 581 #ifdef CONFIG_VSX 582 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr) / 2; i++) 583 thread_fpr[get_fpr_index(i) + 1] = vcpu_vsx[i]; 584 #endif 585 t->fpscr.val = vcpu->arch.fpscr; 586 t->fpexc_mode = 0; 587 kvmppc_load_up_fpu(); 588 } 589 590 if (msr & MSR_VEC) { 591 #ifdef CONFIG_ALTIVEC 592 memcpy(t->vr, vcpu->arch.vr, sizeof(vcpu->arch.vr)); 593 t->vscr = vcpu->arch.vscr; 594 t->vrsave = -1; 595 kvmppc_load_up_altivec(); 596 #endif 597 } 598 599 vcpu->arch.guest_owned_ext |= msr; 600 kvmppc_recalc_shadow_msr(vcpu); 601 602 return RESUME_GUEST; 603 } 604 605 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, 606 unsigned int exit_nr) 607 { 608 int r = RESUME_HOST; 609 int s; 610 611 vcpu->stat.sum_exits++; 612 613 run->exit_reason = KVM_EXIT_UNKNOWN; 614 run->ready_for_interrupt_injection = 1; 615 616 /* We get here with MSR.EE=1 */ 617 618 trace_kvm_exit(exit_nr, vcpu); 619 kvm_guest_exit(); 620 621 switch (exit_nr) { 622 case BOOK3S_INTERRUPT_INST_STORAGE: 623 { 624 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 625 ulong shadow_srr1 = svcpu->shadow_srr1; 626 vcpu->stat.pf_instruc++; 627 628 #ifdef CONFIG_PPC_BOOK3S_32 629 /* We set segments as unused segments when invalidating them. So 630 * treat the respective fault as segment fault. */ 631 if (svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT] == SR_INVALID) { 632 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); 633 r = RESUME_GUEST; 634 svcpu_put(svcpu); 635 break; 636 } 637 #endif 638 svcpu_put(svcpu); 639 640 /* only care about PTEG not found errors, but leave NX alone */ 641 if (shadow_srr1 & 0x40000000) { 642 r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr); 643 vcpu->stat.sp_instruc++; 644 } else if (vcpu->arch.mmu.is_dcbz32(vcpu) && 645 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) { 646 /* 647 * XXX If we do the dcbz hack we use the NX bit to flush&patch the page, 648 * so we can't use the NX bit inside the guest. Let's cross our fingers, 649 * that no guest that needs the dcbz hack does NX. 650 */ 651 kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL); 652 r = RESUME_GUEST; 653 } else { 654 vcpu->arch.shared->msr |= shadow_srr1 & 0x58000000; 655 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 656 r = RESUME_GUEST; 657 } 658 break; 659 } 660 case BOOK3S_INTERRUPT_DATA_STORAGE: 661 { 662 ulong dar = kvmppc_get_fault_dar(vcpu); 663 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 664 u32 fault_dsisr = svcpu->fault_dsisr; 665 vcpu->stat.pf_storage++; 666 667 #ifdef CONFIG_PPC_BOOK3S_32 668 /* We set segments as unused segments when invalidating them. So 669 * treat the respective fault as segment fault. */ 670 if ((svcpu->sr[dar >> SID_SHIFT]) == SR_INVALID) { 671 kvmppc_mmu_map_segment(vcpu, dar); 672 r = RESUME_GUEST; 673 svcpu_put(svcpu); 674 break; 675 } 676 #endif 677 svcpu_put(svcpu); 678 679 /* The only case we need to handle is missing shadow PTEs */ 680 if (fault_dsisr & DSISR_NOHPTE) { 681 r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr); 682 } else { 683 vcpu->arch.shared->dar = dar; 684 vcpu->arch.shared->dsisr = fault_dsisr; 685 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 686 r = RESUME_GUEST; 687 } 688 break; 689 } 690 case BOOK3S_INTERRUPT_DATA_SEGMENT: 691 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) { 692 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); 693 kvmppc_book3s_queue_irqprio(vcpu, 694 BOOK3S_INTERRUPT_DATA_SEGMENT); 695 } 696 r = RESUME_GUEST; 697 break; 698 case BOOK3S_INTERRUPT_INST_SEGMENT: 699 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) { 700 kvmppc_book3s_queue_irqprio(vcpu, 701 BOOK3S_INTERRUPT_INST_SEGMENT); 702 } 703 r = RESUME_GUEST; 704 break; 705 /* We're good on these - the host merely wanted to get our attention */ 706 case BOOK3S_INTERRUPT_DECREMENTER: 707 case BOOK3S_INTERRUPT_HV_DECREMENTER: 708 vcpu->stat.dec_exits++; 709 r = RESUME_GUEST; 710 break; 711 case BOOK3S_INTERRUPT_EXTERNAL: 712 case BOOK3S_INTERRUPT_EXTERNAL_LEVEL: 713 case BOOK3S_INTERRUPT_EXTERNAL_HV: 714 vcpu->stat.ext_intr_exits++; 715 r = RESUME_GUEST; 716 break; 717 case BOOK3S_INTERRUPT_PERFMON: 718 r = RESUME_GUEST; 719 break; 720 case BOOK3S_INTERRUPT_PROGRAM: 721 case BOOK3S_INTERRUPT_H_EMUL_ASSIST: 722 { 723 enum emulation_result er; 724 struct kvmppc_book3s_shadow_vcpu *svcpu; 725 ulong flags; 726 727 program_interrupt: 728 svcpu = svcpu_get(vcpu); 729 flags = svcpu->shadow_srr1 & 0x1f0000ull; 730 svcpu_put(svcpu); 731 732 if (vcpu->arch.shared->msr & MSR_PR) { 733 #ifdef EXIT_DEBUG 734 printk(KERN_INFO "Userspace triggered 0x700 exception at 0x%lx (0x%x)\n", kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu)); 735 #endif 736 if ((kvmppc_get_last_inst(vcpu) & 0xff0007ff) != 737 (INS_DCBZ & 0xfffffff7)) { 738 kvmppc_core_queue_program(vcpu, flags); 739 r = RESUME_GUEST; 740 break; 741 } 742 } 743 744 vcpu->stat.emulated_inst_exits++; 745 er = kvmppc_emulate_instruction(run, vcpu); 746 switch (er) { 747 case EMULATE_DONE: 748 r = RESUME_GUEST_NV; 749 break; 750 case EMULATE_AGAIN: 751 r = RESUME_GUEST; 752 break; 753 case EMULATE_FAIL: 754 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 755 __func__, kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu)); 756 kvmppc_core_queue_program(vcpu, flags); 757 r = RESUME_GUEST; 758 break; 759 case EMULATE_DO_MMIO: 760 run->exit_reason = KVM_EXIT_MMIO; 761 r = RESUME_HOST_NV; 762 break; 763 default: 764 BUG(); 765 } 766 break; 767 } 768 case BOOK3S_INTERRUPT_SYSCALL: 769 if (vcpu->arch.papr_enabled && 770 (kvmppc_get_last_inst(vcpu) == 0x44000022) && 771 !(vcpu->arch.shared->msr & MSR_PR)) { 772 /* SC 1 papr hypercalls */ 773 ulong cmd = kvmppc_get_gpr(vcpu, 3); 774 int i; 775 776 #ifdef CONFIG_KVM_BOOK3S_64_PR 777 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) { 778 r = RESUME_GUEST; 779 break; 780 } 781 #endif 782 783 run->papr_hcall.nr = cmd; 784 for (i = 0; i < 9; ++i) { 785 ulong gpr = kvmppc_get_gpr(vcpu, 4 + i); 786 run->papr_hcall.args[i] = gpr; 787 } 788 run->exit_reason = KVM_EXIT_PAPR_HCALL; 789 vcpu->arch.hcall_needed = 1; 790 r = RESUME_HOST; 791 } else if (vcpu->arch.osi_enabled && 792 (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) && 793 (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) { 794 /* MOL hypercalls */ 795 u64 *gprs = run->osi.gprs; 796 int i; 797 798 run->exit_reason = KVM_EXIT_OSI; 799 for (i = 0; i < 32; i++) 800 gprs[i] = kvmppc_get_gpr(vcpu, i); 801 vcpu->arch.osi_needed = 1; 802 r = RESUME_HOST_NV; 803 } else if (!(vcpu->arch.shared->msr & MSR_PR) && 804 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 805 /* KVM PV hypercalls */ 806 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 807 r = RESUME_GUEST; 808 } else { 809 /* Guest syscalls */ 810 vcpu->stat.syscall_exits++; 811 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 812 r = RESUME_GUEST; 813 } 814 break; 815 case BOOK3S_INTERRUPT_FP_UNAVAIL: 816 case BOOK3S_INTERRUPT_ALTIVEC: 817 case BOOK3S_INTERRUPT_VSX: 818 { 819 int ext_msr = 0; 820 821 switch (exit_nr) { 822 case BOOK3S_INTERRUPT_FP_UNAVAIL: ext_msr = MSR_FP; break; 823 case BOOK3S_INTERRUPT_ALTIVEC: ext_msr = MSR_VEC; break; 824 case BOOK3S_INTERRUPT_VSX: ext_msr = MSR_VSX; break; 825 } 826 827 switch (kvmppc_check_ext(vcpu, exit_nr)) { 828 case EMULATE_DONE: 829 /* everything ok - let's enable the ext */ 830 r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr); 831 break; 832 case EMULATE_FAIL: 833 /* we need to emulate this instruction */ 834 goto program_interrupt; 835 break; 836 default: 837 /* nothing to worry about - go again */ 838 break; 839 } 840 break; 841 } 842 case BOOK3S_INTERRUPT_ALIGNMENT: 843 if (kvmppc_read_inst(vcpu) == EMULATE_DONE) { 844 vcpu->arch.shared->dsisr = kvmppc_alignment_dsisr(vcpu, 845 kvmppc_get_last_inst(vcpu)); 846 vcpu->arch.shared->dar = kvmppc_alignment_dar(vcpu, 847 kvmppc_get_last_inst(vcpu)); 848 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 849 } 850 r = RESUME_GUEST; 851 break; 852 case BOOK3S_INTERRUPT_MACHINE_CHECK: 853 case BOOK3S_INTERRUPT_TRACE: 854 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 855 r = RESUME_GUEST; 856 break; 857 default: 858 { 859 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 860 ulong shadow_srr1 = svcpu->shadow_srr1; 861 svcpu_put(svcpu); 862 /* Ugh - bork here! What did we get? */ 863 printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n", 864 exit_nr, kvmppc_get_pc(vcpu), shadow_srr1); 865 r = RESUME_HOST; 866 BUG(); 867 break; 868 } 869 } 870 871 if (!(r & RESUME_HOST)) { 872 /* To avoid clobbering exit_reason, only check for signals if 873 * we aren't already exiting to userspace for some other 874 * reason. */ 875 876 /* 877 * Interrupts could be timers for the guest which we have to 878 * inject again, so let's postpone them until we're in the guest 879 * and if we really did time things so badly, then we just exit 880 * again due to a host external interrupt. 881 */ 882 local_irq_disable(); 883 s = kvmppc_prepare_to_enter(vcpu); 884 if (s <= 0) { 885 local_irq_enable(); 886 r = s; 887 } else { 888 kvmppc_lazy_ee_enable(); 889 } 890 } 891 892 trace_kvm_book3s_reenter(r, vcpu); 893 894 return r; 895 } 896 897 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 898 struct kvm_sregs *sregs) 899 { 900 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); 901 int i; 902 903 sregs->pvr = vcpu->arch.pvr; 904 905 sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1; 906 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) { 907 for (i = 0; i < 64; i++) { 908 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i; 909 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; 910 } 911 } else { 912 for (i = 0; i < 16; i++) 913 sregs->u.s.ppc32.sr[i] = vcpu->arch.shared->sr[i]; 914 915 for (i = 0; i < 8; i++) { 916 sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw; 917 sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw; 918 } 919 } 920 921 return 0; 922 } 923 924 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 925 struct kvm_sregs *sregs) 926 { 927 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); 928 int i; 929 930 kvmppc_set_pvr(vcpu, sregs->pvr); 931 932 vcpu3s->sdr1 = sregs->u.s.sdr1; 933 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) { 934 for (i = 0; i < 64; i++) { 935 vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv, 936 sregs->u.s.ppc64.slb[i].slbe); 937 } 938 } else { 939 for (i = 0; i < 16; i++) { 940 vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]); 941 } 942 for (i = 0; i < 8; i++) { 943 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false, 944 (u32)sregs->u.s.ppc32.ibat[i]); 945 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true, 946 (u32)(sregs->u.s.ppc32.ibat[i] >> 32)); 947 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false, 948 (u32)sregs->u.s.ppc32.dbat[i]); 949 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true, 950 (u32)(sregs->u.s.ppc32.dbat[i] >> 32)); 951 } 952 } 953 954 /* Flush the MMU after messing with the segments */ 955 kvmppc_mmu_pte_flush(vcpu, 0, 0); 956 957 return 0; 958 } 959 960 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, union kvmppc_one_reg *val) 961 { 962 int r = 0; 963 964 switch (id) { 965 case KVM_REG_PPC_HIOR: 966 *val = get_reg_val(id, to_book3s(vcpu)->hior); 967 break; 968 #ifdef CONFIG_VSX 969 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: { 970 long int i = id - KVM_REG_PPC_VSR0; 971 972 if (!cpu_has_feature(CPU_FTR_VSX)) { 973 r = -ENXIO; 974 break; 975 } 976 val->vsxval[0] = vcpu->arch.fpr[i]; 977 val->vsxval[1] = vcpu->arch.vsr[i]; 978 break; 979 } 980 #endif /* CONFIG_VSX */ 981 default: 982 r = -EINVAL; 983 break; 984 } 985 986 return r; 987 } 988 989 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, union kvmppc_one_reg *val) 990 { 991 int r = 0; 992 993 switch (id) { 994 case KVM_REG_PPC_HIOR: 995 to_book3s(vcpu)->hior = set_reg_val(id, *val); 996 to_book3s(vcpu)->hior_explicit = true; 997 break; 998 #ifdef CONFIG_VSX 999 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: { 1000 long int i = id - KVM_REG_PPC_VSR0; 1001 1002 if (!cpu_has_feature(CPU_FTR_VSX)) { 1003 r = -ENXIO; 1004 break; 1005 } 1006 vcpu->arch.fpr[i] = val->vsxval[0]; 1007 vcpu->arch.vsr[i] = val->vsxval[1]; 1008 break; 1009 } 1010 #endif /* CONFIG_VSX */ 1011 default: 1012 r = -EINVAL; 1013 break; 1014 } 1015 1016 return r; 1017 } 1018 1019 int kvmppc_core_check_processor_compat(void) 1020 { 1021 return 0; 1022 } 1023 1024 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) 1025 { 1026 struct kvmppc_vcpu_book3s *vcpu_book3s; 1027 struct kvm_vcpu *vcpu; 1028 int err = -ENOMEM; 1029 unsigned long p; 1030 1031 vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s)); 1032 if (!vcpu_book3s) 1033 goto out; 1034 1035 vcpu_book3s->shadow_vcpu = (struct kvmppc_book3s_shadow_vcpu *) 1036 kzalloc(sizeof(*vcpu_book3s->shadow_vcpu), GFP_KERNEL); 1037 if (!vcpu_book3s->shadow_vcpu) 1038 goto free_vcpu; 1039 1040 vcpu = &vcpu_book3s->vcpu; 1041 err = kvm_vcpu_init(vcpu, kvm, id); 1042 if (err) 1043 goto free_shadow_vcpu; 1044 1045 p = __get_free_page(GFP_KERNEL|__GFP_ZERO); 1046 /* the real shared page fills the last 4k of our page */ 1047 vcpu->arch.shared = (void*)(p + PAGE_SIZE - 4096); 1048 if (!p) 1049 goto uninit_vcpu; 1050 1051 #ifdef CONFIG_PPC_BOOK3S_64 1052 /* default to book3s_64 (970fx) */ 1053 vcpu->arch.pvr = 0x3C0301; 1054 #else 1055 /* default to book3s_32 (750) */ 1056 vcpu->arch.pvr = 0x84202; 1057 #endif 1058 kvmppc_set_pvr(vcpu, vcpu->arch.pvr); 1059 vcpu->arch.slb_nr = 64; 1060 1061 vcpu->arch.shadow_msr = MSR_USER64; 1062 1063 err = kvmppc_mmu_init(vcpu); 1064 if (err < 0) 1065 goto uninit_vcpu; 1066 1067 return vcpu; 1068 1069 uninit_vcpu: 1070 kvm_vcpu_uninit(vcpu); 1071 free_shadow_vcpu: 1072 kfree(vcpu_book3s->shadow_vcpu); 1073 free_vcpu: 1074 vfree(vcpu_book3s); 1075 out: 1076 return ERR_PTR(err); 1077 } 1078 1079 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) 1080 { 1081 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); 1082 1083 free_page((unsigned long)vcpu->arch.shared & PAGE_MASK); 1084 kvm_vcpu_uninit(vcpu); 1085 kfree(vcpu_book3s->shadow_vcpu); 1086 vfree(vcpu_book3s); 1087 } 1088 1089 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 1090 { 1091 int ret; 1092 double fpr[32][TS_FPRWIDTH]; 1093 unsigned int fpscr; 1094 int fpexc_mode; 1095 #ifdef CONFIG_ALTIVEC 1096 vector128 vr[32]; 1097 vector128 vscr; 1098 unsigned long uninitialized_var(vrsave); 1099 int used_vr; 1100 #endif 1101 #ifdef CONFIG_VSX 1102 int used_vsr; 1103 #endif 1104 ulong ext_msr; 1105 1106 /* Check if we can run the vcpu at all */ 1107 if (!vcpu->arch.sane) { 1108 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1109 ret = -EINVAL; 1110 goto out; 1111 } 1112 1113 /* 1114 * Interrupts could be timers for the guest which we have to inject 1115 * again, so let's postpone them until we're in the guest and if we 1116 * really did time things so badly, then we just exit again due to 1117 * a host external interrupt. 1118 */ 1119 local_irq_disable(); 1120 ret = kvmppc_prepare_to_enter(vcpu); 1121 if (ret <= 0) { 1122 local_irq_enable(); 1123 goto out; 1124 } 1125 1126 /* Save FPU state in stack */ 1127 if (current->thread.regs->msr & MSR_FP) 1128 giveup_fpu(current); 1129 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr)); 1130 fpscr = current->thread.fpscr.val; 1131 fpexc_mode = current->thread.fpexc_mode; 1132 1133 #ifdef CONFIG_ALTIVEC 1134 /* Save Altivec state in stack */ 1135 used_vr = current->thread.used_vr; 1136 if (used_vr) { 1137 if (current->thread.regs->msr & MSR_VEC) 1138 giveup_altivec(current); 1139 memcpy(vr, current->thread.vr, sizeof(current->thread.vr)); 1140 vscr = current->thread.vscr; 1141 vrsave = current->thread.vrsave; 1142 } 1143 #endif 1144 1145 #ifdef CONFIG_VSX 1146 /* Save VSX state in stack */ 1147 used_vsr = current->thread.used_vsr; 1148 if (used_vsr && (current->thread.regs->msr & MSR_VSX)) 1149 __giveup_vsx(current); 1150 #endif 1151 1152 /* Remember the MSR with disabled extensions */ 1153 ext_msr = current->thread.regs->msr; 1154 1155 /* Preload FPU if it's enabled */ 1156 if (vcpu->arch.shared->msr & MSR_FP) 1157 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP); 1158 1159 kvmppc_lazy_ee_enable(); 1160 1161 ret = __kvmppc_vcpu_run(kvm_run, vcpu); 1162 1163 /* No need for kvm_guest_exit. It's done in handle_exit. 1164 We also get here with interrupts enabled. */ 1165 1166 /* Make sure we save the guest FPU/Altivec/VSX state */ 1167 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX); 1168 1169 current->thread.regs->msr = ext_msr; 1170 1171 /* Restore FPU/VSX state from stack */ 1172 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr)); 1173 current->thread.fpscr.val = fpscr; 1174 current->thread.fpexc_mode = fpexc_mode; 1175 1176 #ifdef CONFIG_ALTIVEC 1177 /* Restore Altivec state from stack */ 1178 if (used_vr && current->thread.used_vr) { 1179 memcpy(current->thread.vr, vr, sizeof(current->thread.vr)); 1180 current->thread.vscr = vscr; 1181 current->thread.vrsave = vrsave; 1182 } 1183 current->thread.used_vr = used_vr; 1184 #endif 1185 1186 #ifdef CONFIG_VSX 1187 current->thread.used_vsr = used_vsr; 1188 #endif 1189 1190 out: 1191 vcpu->mode = OUTSIDE_GUEST_MODE; 1192 return ret; 1193 } 1194 1195 /* 1196 * Get (and clear) the dirty memory log for a memory slot. 1197 */ 1198 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, 1199 struct kvm_dirty_log *log) 1200 { 1201 struct kvm_memory_slot *memslot; 1202 struct kvm_vcpu *vcpu; 1203 ulong ga, ga_end; 1204 int is_dirty = 0; 1205 int r; 1206 unsigned long n; 1207 1208 mutex_lock(&kvm->slots_lock); 1209 1210 r = kvm_get_dirty_log(kvm, log, &is_dirty); 1211 if (r) 1212 goto out; 1213 1214 /* If nothing is dirty, don't bother messing with page tables. */ 1215 if (is_dirty) { 1216 memslot = id_to_memslot(kvm->memslots, log->slot); 1217 1218 ga = memslot->base_gfn << PAGE_SHIFT; 1219 ga_end = ga + (memslot->npages << PAGE_SHIFT); 1220 1221 kvm_for_each_vcpu(n, vcpu, kvm) 1222 kvmppc_mmu_pte_pflush(vcpu, ga, ga_end); 1223 1224 n = kvm_dirty_bitmap_bytes(memslot); 1225 memset(memslot->dirty_bitmap, 0, n); 1226 } 1227 1228 r = 0; 1229 out: 1230 mutex_unlock(&kvm->slots_lock); 1231 return r; 1232 } 1233 1234 #ifdef CONFIG_PPC64 1235 int kvm_vm_ioctl_get_smmu_info(struct kvm *kvm, struct kvm_ppc_smmu_info *info) 1236 { 1237 /* No flags */ 1238 info->flags = 0; 1239 1240 /* SLB is always 64 entries */ 1241 info->slb_size = 64; 1242 1243 /* Standard 4k base page size segment */ 1244 info->sps[0].page_shift = 12; 1245 info->sps[0].slb_enc = 0; 1246 info->sps[0].enc[0].page_shift = 12; 1247 info->sps[0].enc[0].pte_enc = 0; 1248 1249 /* Standard 16M large page size segment */ 1250 info->sps[1].page_shift = 24; 1251 info->sps[1].slb_enc = SLB_VSID_L; 1252 info->sps[1].enc[0].page_shift = 24; 1253 info->sps[1].enc[0].pte_enc = 0; 1254 1255 return 0; 1256 } 1257 #endif /* CONFIG_PPC64 */ 1258 1259 void kvmppc_core_free_memslot(struct kvm_memory_slot *free, 1260 struct kvm_memory_slot *dont) 1261 { 1262 } 1263 1264 int kvmppc_core_create_memslot(struct kvm_memory_slot *slot, 1265 unsigned long npages) 1266 { 1267 return 0; 1268 } 1269 1270 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 1271 struct kvm_memory_slot *memslot, 1272 struct kvm_userspace_memory_region *mem) 1273 { 1274 return 0; 1275 } 1276 1277 void kvmppc_core_commit_memory_region(struct kvm *kvm, 1278 struct kvm_userspace_memory_region *mem, 1279 struct kvm_memory_slot old) 1280 { 1281 } 1282 1283 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 1284 { 1285 } 1286 1287 int kvmppc_core_init_vm(struct kvm *kvm) 1288 { 1289 #ifdef CONFIG_PPC64 1290 INIT_LIST_HEAD(&kvm->arch.spapr_tce_tables); 1291 #endif 1292 1293 return 0; 1294 } 1295 1296 void kvmppc_core_destroy_vm(struct kvm *kvm) 1297 { 1298 #ifdef CONFIG_PPC64 1299 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables)); 1300 #endif 1301 } 1302 1303 static int kvmppc_book3s_init(void) 1304 { 1305 int r; 1306 1307 r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_book3s), 0, 1308 THIS_MODULE); 1309 1310 if (r) 1311 return r; 1312 1313 r = kvmppc_mmu_hpte_sysinit(); 1314 1315 return r; 1316 } 1317 1318 static void kvmppc_book3s_exit(void) 1319 { 1320 kvmppc_mmu_hpte_sysexit(); 1321 kvm_exit(); 1322 } 1323 1324 module_init(kvmppc_book3s_init); 1325 module_exit(kvmppc_book3s_exit); 1326