1 /* 2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 3 * 4 * Authors: 5 * Alexander Graf <agraf@suse.de> 6 * Kevin Wolf <mail@kevin-wolf.de> 7 * Paul Mackerras <paulus@samba.org> 8 * 9 * Description: 10 * Functions relating to running KVM on Book 3S processors where 11 * we don't have access to hypervisor mode, and we run the guest 12 * in problem state (user mode). 13 * 14 * This file is derived from arch/powerpc/kvm/44x.c, 15 * by Hollis Blanchard <hollisb@us.ibm.com>. 16 * 17 * This program is free software; you can redistribute it and/or modify 18 * it under the terms of the GNU General Public License, version 2, as 19 * published by the Free Software Foundation. 20 */ 21 22 #include <linux/kvm_host.h> 23 #include <linux/export.h> 24 #include <linux/err.h> 25 #include <linux/slab.h> 26 27 #include <asm/reg.h> 28 #include <asm/cputable.h> 29 #include <asm/cacheflush.h> 30 #include <asm/tlbflush.h> 31 #include <asm/uaccess.h> 32 #include <asm/io.h> 33 #include <asm/kvm_ppc.h> 34 #include <asm/kvm_book3s.h> 35 #include <asm/mmu_context.h> 36 #include <asm/switch_to.h> 37 #include <asm/firmware.h> 38 #include <asm/hvcall.h> 39 #include <linux/gfp.h> 40 #include <linux/sched.h> 41 #include <linux/vmalloc.h> 42 #include <linux/highmem.h> 43 44 #include "trace.h" 45 46 /* #define EXIT_DEBUG */ 47 /* #define DEBUG_EXT */ 48 49 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr, 50 ulong msr); 51 52 /* Some compatibility defines */ 53 #ifdef CONFIG_PPC_BOOK3S_32 54 #define MSR_USER32 MSR_USER 55 #define MSR_USER64 MSR_USER 56 #define HW_PAGE_SIZE PAGE_SIZE 57 #endif 58 59 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 60 { 61 #ifdef CONFIG_PPC_BOOK3S_64 62 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 63 memcpy(svcpu->slb, to_book3s(vcpu)->slb_shadow, sizeof(svcpu->slb)); 64 memcpy(&get_paca()->shadow_vcpu, to_book3s(vcpu)->shadow_vcpu, 65 sizeof(get_paca()->shadow_vcpu)); 66 svcpu->slb_max = to_book3s(vcpu)->slb_shadow_max; 67 svcpu_put(svcpu); 68 #endif 69 vcpu->cpu = smp_processor_id(); 70 #ifdef CONFIG_PPC_BOOK3S_32 71 current->thread.kvm_shadow_vcpu = to_book3s(vcpu)->shadow_vcpu; 72 #endif 73 } 74 75 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) 76 { 77 #ifdef CONFIG_PPC_BOOK3S_64 78 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 79 memcpy(to_book3s(vcpu)->slb_shadow, svcpu->slb, sizeof(svcpu->slb)); 80 memcpy(to_book3s(vcpu)->shadow_vcpu, &get_paca()->shadow_vcpu, 81 sizeof(get_paca()->shadow_vcpu)); 82 to_book3s(vcpu)->slb_shadow_max = svcpu->slb_max; 83 svcpu_put(svcpu); 84 #endif 85 86 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX); 87 vcpu->cpu = -1; 88 } 89 90 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 91 { 92 int r = 1; /* Indicate we want to get back into the guest */ 93 94 /* We misuse TLB_FLUSH to indicate that we want to clear 95 all shadow cache entries */ 96 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu)) 97 kvmppc_mmu_pte_flush(vcpu, 0, 0); 98 99 return r; 100 } 101 102 /************* MMU Notifiers *************/ 103 104 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) 105 { 106 trace_kvm_unmap_hva(hva); 107 108 /* 109 * Flush all shadow tlb entries everywhere. This is slow, but 110 * we are 100% sure that we catch the to be unmapped page 111 */ 112 kvm_flush_remote_tlbs(kvm); 113 114 return 0; 115 } 116 117 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end) 118 { 119 /* kvm_unmap_hva flushes everything anyways */ 120 kvm_unmap_hva(kvm, start); 121 122 return 0; 123 } 124 125 int kvm_age_hva(struct kvm *kvm, unsigned long hva) 126 { 127 /* XXX could be more clever ;) */ 128 return 0; 129 } 130 131 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) 132 { 133 /* XXX could be more clever ;) */ 134 return 0; 135 } 136 137 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) 138 { 139 /* The page will get remapped properly on its next fault */ 140 kvm_unmap_hva(kvm, hva); 141 } 142 143 /*****************************************/ 144 145 static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu) 146 { 147 ulong smsr = vcpu->arch.shared->msr; 148 149 /* Guest MSR values */ 150 smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE; 151 /* Process MSR values */ 152 smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE; 153 /* External providers the guest reserved */ 154 smsr |= (vcpu->arch.shared->msr & vcpu->arch.guest_owned_ext); 155 /* 64-bit Process MSR values */ 156 #ifdef CONFIG_PPC_BOOK3S_64 157 smsr |= MSR_ISF | MSR_HV; 158 #endif 159 vcpu->arch.shadow_msr = smsr; 160 } 161 162 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr) 163 { 164 ulong old_msr = vcpu->arch.shared->msr; 165 166 #ifdef EXIT_DEBUG 167 printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr); 168 #endif 169 170 msr &= to_book3s(vcpu)->msr_mask; 171 vcpu->arch.shared->msr = msr; 172 kvmppc_recalc_shadow_msr(vcpu); 173 174 if (msr & MSR_POW) { 175 if (!vcpu->arch.pending_exceptions) { 176 kvm_vcpu_block(vcpu); 177 clear_bit(KVM_REQ_UNHALT, &vcpu->requests); 178 vcpu->stat.halt_wakeup++; 179 180 /* Unset POW bit after we woke up */ 181 msr &= ~MSR_POW; 182 vcpu->arch.shared->msr = msr; 183 } 184 } 185 186 if ((vcpu->arch.shared->msr & (MSR_PR|MSR_IR|MSR_DR)) != 187 (old_msr & (MSR_PR|MSR_IR|MSR_DR))) { 188 kvmppc_mmu_flush_segments(vcpu); 189 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); 190 191 /* Preload magic page segment when in kernel mode */ 192 if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) { 193 struct kvm_vcpu_arch *a = &vcpu->arch; 194 195 if (msr & MSR_DR) 196 kvmppc_mmu_map_segment(vcpu, a->magic_page_ea); 197 else 198 kvmppc_mmu_map_segment(vcpu, a->magic_page_pa); 199 } 200 } 201 202 /* 203 * When switching from 32 to 64-bit, we may have a stale 32-bit 204 * magic page around, we need to flush it. Typically 32-bit magic 205 * page will be instanciated when calling into RTAS. Note: We 206 * assume that such transition only happens while in kernel mode, 207 * ie, we never transition from user 32-bit to kernel 64-bit with 208 * a 32-bit magic page around. 209 */ 210 if (vcpu->arch.magic_page_pa && 211 !(old_msr & MSR_PR) && !(old_msr & MSR_SF) && (msr & MSR_SF)) { 212 /* going from RTAS to normal kernel code */ 213 kvmppc_mmu_pte_flush(vcpu, (uint32_t)vcpu->arch.magic_page_pa, 214 ~0xFFFUL); 215 } 216 217 /* Preload FPU if it's enabled */ 218 if (vcpu->arch.shared->msr & MSR_FP) 219 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP); 220 } 221 222 void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr) 223 { 224 u32 host_pvr; 225 226 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SLB; 227 vcpu->arch.pvr = pvr; 228 #ifdef CONFIG_PPC_BOOK3S_64 229 if ((pvr >= 0x330000) && (pvr < 0x70330000)) { 230 kvmppc_mmu_book3s_64_init(vcpu); 231 if (!to_book3s(vcpu)->hior_explicit) 232 to_book3s(vcpu)->hior = 0xfff00000; 233 to_book3s(vcpu)->msr_mask = 0xffffffffffffffffULL; 234 vcpu->arch.cpu_type = KVM_CPU_3S_64; 235 } else 236 #endif 237 { 238 kvmppc_mmu_book3s_32_init(vcpu); 239 if (!to_book3s(vcpu)->hior_explicit) 240 to_book3s(vcpu)->hior = 0; 241 to_book3s(vcpu)->msr_mask = 0xffffffffULL; 242 vcpu->arch.cpu_type = KVM_CPU_3S_32; 243 } 244 245 kvmppc_sanity_check(vcpu); 246 247 /* If we are in hypervisor level on 970, we can tell the CPU to 248 * treat DCBZ as 32 bytes store */ 249 vcpu->arch.hflags &= ~BOOK3S_HFLAG_DCBZ32; 250 if (vcpu->arch.mmu.is_dcbz32(vcpu) && (mfmsr() & MSR_HV) && 251 !strcmp(cur_cpu_spec->platform, "ppc970")) 252 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; 253 254 /* Cell performs badly if MSR_FEx are set. So let's hope nobody 255 really needs them in a VM on Cell and force disable them. */ 256 if (!strcmp(cur_cpu_spec->platform, "ppc-cell-be")) 257 to_book3s(vcpu)->msr_mask &= ~(MSR_FE0 | MSR_FE1); 258 259 #ifdef CONFIG_PPC_BOOK3S_32 260 /* 32 bit Book3S always has 32 byte dcbz */ 261 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; 262 #endif 263 264 /* On some CPUs we can execute paired single operations natively */ 265 asm ( "mfpvr %0" : "=r"(host_pvr)); 266 switch (host_pvr) { 267 case 0x00080200: /* lonestar 2.0 */ 268 case 0x00088202: /* lonestar 2.2 */ 269 case 0x70000100: /* gekko 1.0 */ 270 case 0x00080100: /* gekko 2.0 */ 271 case 0x00083203: /* gekko 2.3a */ 272 case 0x00083213: /* gekko 2.3b */ 273 case 0x00083204: /* gekko 2.4 */ 274 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */ 275 case 0x00087200: /* broadway */ 276 vcpu->arch.hflags |= BOOK3S_HFLAG_NATIVE_PS; 277 /* Enable HID2.PSE - in case we need it later */ 278 mtspr(SPRN_HID2_GEKKO, mfspr(SPRN_HID2_GEKKO) | (1 << 29)); 279 } 280 } 281 282 /* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To 283 * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to 284 * emulate 32 bytes dcbz length. 285 * 286 * The Book3s_64 inventors also realized this case and implemented a special bit 287 * in the HID5 register, which is a hypervisor ressource. Thus we can't use it. 288 * 289 * My approach here is to patch the dcbz instruction on executing pages. 290 */ 291 static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte) 292 { 293 struct page *hpage; 294 u64 hpage_offset; 295 u32 *page; 296 int i; 297 298 hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT); 299 if (is_error_page(hpage)) 300 return; 301 302 hpage_offset = pte->raddr & ~PAGE_MASK; 303 hpage_offset &= ~0xFFFULL; 304 hpage_offset /= 4; 305 306 get_page(hpage); 307 page = kmap_atomic(hpage); 308 309 /* patch dcbz into reserved instruction, so we trap */ 310 for (i=hpage_offset; i < hpage_offset + (HW_PAGE_SIZE / 4); i++) 311 if ((page[i] & 0xff0007ff) == INS_DCBZ) 312 page[i] &= 0xfffffff7; 313 314 kunmap_atomic(page); 315 put_page(hpage); 316 } 317 318 static int kvmppc_visible_gfn(struct kvm_vcpu *vcpu, gfn_t gfn) 319 { 320 ulong mp_pa = vcpu->arch.magic_page_pa; 321 322 if (!(vcpu->arch.shared->msr & MSR_SF)) 323 mp_pa = (uint32_t)mp_pa; 324 325 if (unlikely(mp_pa) && 326 unlikely((mp_pa & KVM_PAM) >> PAGE_SHIFT == gfn)) { 327 return 1; 328 } 329 330 return kvm_is_visible_gfn(vcpu->kvm, gfn); 331 } 332 333 int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu, 334 ulong eaddr, int vec) 335 { 336 bool data = (vec == BOOK3S_INTERRUPT_DATA_STORAGE); 337 int r = RESUME_GUEST; 338 int relocated; 339 int page_found = 0; 340 struct kvmppc_pte pte; 341 bool is_mmio = false; 342 bool dr = (vcpu->arch.shared->msr & MSR_DR) ? true : false; 343 bool ir = (vcpu->arch.shared->msr & MSR_IR) ? true : false; 344 u64 vsid; 345 346 relocated = data ? dr : ir; 347 348 /* Resolve real address if translation turned on */ 349 if (relocated) { 350 page_found = vcpu->arch.mmu.xlate(vcpu, eaddr, &pte, data); 351 } else { 352 pte.may_execute = true; 353 pte.may_read = true; 354 pte.may_write = true; 355 pte.raddr = eaddr & KVM_PAM; 356 pte.eaddr = eaddr; 357 pte.vpage = eaddr >> 12; 358 } 359 360 switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) { 361 case 0: 362 pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12)); 363 break; 364 case MSR_DR: 365 case MSR_IR: 366 vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid); 367 368 if ((vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) == MSR_DR) 369 pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12)); 370 else 371 pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12)); 372 pte.vpage |= vsid; 373 374 if (vsid == -1) 375 page_found = -EINVAL; 376 break; 377 } 378 379 if (vcpu->arch.mmu.is_dcbz32(vcpu) && 380 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) { 381 /* 382 * If we do the dcbz hack, we have to NX on every execution, 383 * so we can patch the executing code. This renders our guest 384 * NX-less. 385 */ 386 pte.may_execute = !data; 387 } 388 389 if (page_found == -ENOENT) { 390 /* Page not found in guest PTE entries */ 391 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 392 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); 393 vcpu->arch.shared->dsisr = svcpu->fault_dsisr; 394 vcpu->arch.shared->msr |= 395 (svcpu->shadow_srr1 & 0x00000000f8000000ULL); 396 svcpu_put(svcpu); 397 kvmppc_book3s_queue_irqprio(vcpu, vec); 398 } else if (page_found == -EPERM) { 399 /* Storage protection */ 400 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 401 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); 402 vcpu->arch.shared->dsisr = svcpu->fault_dsisr & ~DSISR_NOHPTE; 403 vcpu->arch.shared->dsisr |= DSISR_PROTFAULT; 404 vcpu->arch.shared->msr |= 405 svcpu->shadow_srr1 & 0x00000000f8000000ULL; 406 svcpu_put(svcpu); 407 kvmppc_book3s_queue_irqprio(vcpu, vec); 408 } else if (page_found == -EINVAL) { 409 /* Page not found in guest SLB */ 410 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); 411 kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80); 412 } else if (!is_mmio && 413 kvmppc_visible_gfn(vcpu, pte.raddr >> PAGE_SHIFT)) { 414 /* The guest's PTE is not mapped yet. Map on the host */ 415 kvmppc_mmu_map_page(vcpu, &pte); 416 if (data) 417 vcpu->stat.sp_storage++; 418 else if (vcpu->arch.mmu.is_dcbz32(vcpu) && 419 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) 420 kvmppc_patch_dcbz(vcpu, &pte); 421 } else { 422 /* MMIO */ 423 vcpu->stat.mmio_exits++; 424 vcpu->arch.paddr_accessed = pte.raddr; 425 vcpu->arch.vaddr_accessed = pte.eaddr; 426 r = kvmppc_emulate_mmio(run, vcpu); 427 if ( r == RESUME_HOST_NV ) 428 r = RESUME_HOST; 429 } 430 431 return r; 432 } 433 434 static inline int get_fpr_index(int i) 435 { 436 return i * TS_FPRWIDTH; 437 } 438 439 /* Give up external provider (FPU, Altivec, VSX) */ 440 void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr) 441 { 442 struct thread_struct *t = ¤t->thread; 443 u64 *vcpu_fpr = vcpu->arch.fpr; 444 #ifdef CONFIG_VSX 445 u64 *vcpu_vsx = vcpu->arch.vsr; 446 #endif 447 u64 *thread_fpr = (u64*)t->fpr; 448 int i; 449 450 /* 451 * VSX instructions can access FP and vector registers, so if 452 * we are giving up VSX, make sure we give up FP and VMX as well. 453 */ 454 if (msr & MSR_VSX) 455 msr |= MSR_FP | MSR_VEC; 456 457 msr &= vcpu->arch.guest_owned_ext; 458 if (!msr) 459 return; 460 461 #ifdef DEBUG_EXT 462 printk(KERN_INFO "Giving up ext 0x%lx\n", msr); 463 #endif 464 465 if (msr & MSR_FP) { 466 /* 467 * Note that on CPUs with VSX, giveup_fpu stores 468 * both the traditional FP registers and the added VSX 469 * registers into thread.fpr[]. 470 */ 471 giveup_fpu(current); 472 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) 473 vcpu_fpr[i] = thread_fpr[get_fpr_index(i)]; 474 475 vcpu->arch.fpscr = t->fpscr.val; 476 477 #ifdef CONFIG_VSX 478 if (cpu_has_feature(CPU_FTR_VSX)) 479 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr) / 2; i++) 480 vcpu_vsx[i] = thread_fpr[get_fpr_index(i) + 1]; 481 #endif 482 } 483 484 #ifdef CONFIG_ALTIVEC 485 if (msr & MSR_VEC) { 486 giveup_altivec(current); 487 memcpy(vcpu->arch.vr, t->vr, sizeof(vcpu->arch.vr)); 488 vcpu->arch.vscr = t->vscr; 489 } 490 #endif 491 492 vcpu->arch.guest_owned_ext &= ~(msr | MSR_VSX); 493 kvmppc_recalc_shadow_msr(vcpu); 494 } 495 496 static int kvmppc_read_inst(struct kvm_vcpu *vcpu) 497 { 498 ulong srr0 = kvmppc_get_pc(vcpu); 499 u32 last_inst = kvmppc_get_last_inst(vcpu); 500 int ret; 501 502 ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false); 503 if (ret == -ENOENT) { 504 ulong msr = vcpu->arch.shared->msr; 505 506 msr = kvmppc_set_field(msr, 33, 33, 1); 507 msr = kvmppc_set_field(msr, 34, 36, 0); 508 vcpu->arch.shared->msr = kvmppc_set_field(msr, 42, 47, 0); 509 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE); 510 return EMULATE_AGAIN; 511 } 512 513 return EMULATE_DONE; 514 } 515 516 static int kvmppc_check_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr) 517 { 518 519 /* Need to do paired single emulation? */ 520 if (!(vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)) 521 return EMULATE_DONE; 522 523 /* Read out the instruction */ 524 if (kvmppc_read_inst(vcpu) == EMULATE_DONE) 525 /* Need to emulate */ 526 return EMULATE_FAIL; 527 528 return EMULATE_AGAIN; 529 } 530 531 /* Handle external providers (FPU, Altivec, VSX) */ 532 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr, 533 ulong msr) 534 { 535 struct thread_struct *t = ¤t->thread; 536 u64 *vcpu_fpr = vcpu->arch.fpr; 537 #ifdef CONFIG_VSX 538 u64 *vcpu_vsx = vcpu->arch.vsr; 539 #endif 540 u64 *thread_fpr = (u64*)t->fpr; 541 int i; 542 543 /* When we have paired singles, we emulate in software */ 544 if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE) 545 return RESUME_GUEST; 546 547 if (!(vcpu->arch.shared->msr & msr)) { 548 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 549 return RESUME_GUEST; 550 } 551 552 if (msr == MSR_VSX) { 553 /* No VSX? Give an illegal instruction interrupt */ 554 #ifdef CONFIG_VSX 555 if (!cpu_has_feature(CPU_FTR_VSX)) 556 #endif 557 { 558 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 559 return RESUME_GUEST; 560 } 561 562 /* 563 * We have to load up all the FP and VMX registers before 564 * we can let the guest use VSX instructions. 565 */ 566 msr = MSR_FP | MSR_VEC | MSR_VSX; 567 } 568 569 /* See if we already own all the ext(s) needed */ 570 msr &= ~vcpu->arch.guest_owned_ext; 571 if (!msr) 572 return RESUME_GUEST; 573 574 #ifdef DEBUG_EXT 575 printk(KERN_INFO "Loading up ext 0x%lx\n", msr); 576 #endif 577 578 current->thread.regs->msr |= msr; 579 580 if (msr & MSR_FP) { 581 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) 582 thread_fpr[get_fpr_index(i)] = vcpu_fpr[i]; 583 #ifdef CONFIG_VSX 584 for (i = 0; i < ARRAY_SIZE(vcpu->arch.vsr) / 2; i++) 585 thread_fpr[get_fpr_index(i) + 1] = vcpu_vsx[i]; 586 #endif 587 t->fpscr.val = vcpu->arch.fpscr; 588 t->fpexc_mode = 0; 589 kvmppc_load_up_fpu(); 590 } 591 592 if (msr & MSR_VEC) { 593 #ifdef CONFIG_ALTIVEC 594 memcpy(t->vr, vcpu->arch.vr, sizeof(vcpu->arch.vr)); 595 t->vscr = vcpu->arch.vscr; 596 t->vrsave = -1; 597 kvmppc_load_up_altivec(); 598 #endif 599 } 600 601 vcpu->arch.guest_owned_ext |= msr; 602 kvmppc_recalc_shadow_msr(vcpu); 603 604 return RESUME_GUEST; 605 } 606 607 int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, 608 unsigned int exit_nr) 609 { 610 int r = RESUME_HOST; 611 int s; 612 613 vcpu->stat.sum_exits++; 614 615 run->exit_reason = KVM_EXIT_UNKNOWN; 616 run->ready_for_interrupt_injection = 1; 617 618 /* We get here with MSR.EE=1 */ 619 620 trace_kvm_exit(exit_nr, vcpu); 621 kvm_guest_exit(); 622 623 switch (exit_nr) { 624 case BOOK3S_INTERRUPT_INST_STORAGE: 625 { 626 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 627 ulong shadow_srr1 = svcpu->shadow_srr1; 628 vcpu->stat.pf_instruc++; 629 630 #ifdef CONFIG_PPC_BOOK3S_32 631 /* We set segments as unused segments when invalidating them. So 632 * treat the respective fault as segment fault. */ 633 if (svcpu->sr[kvmppc_get_pc(vcpu) >> SID_SHIFT] == SR_INVALID) { 634 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); 635 r = RESUME_GUEST; 636 svcpu_put(svcpu); 637 break; 638 } 639 #endif 640 svcpu_put(svcpu); 641 642 /* only care about PTEG not found errors, but leave NX alone */ 643 if (shadow_srr1 & 0x40000000) { 644 r = kvmppc_handle_pagefault(run, vcpu, kvmppc_get_pc(vcpu), exit_nr); 645 vcpu->stat.sp_instruc++; 646 } else if (vcpu->arch.mmu.is_dcbz32(vcpu) && 647 (!(vcpu->arch.hflags & BOOK3S_HFLAG_DCBZ32))) { 648 /* 649 * XXX If we do the dcbz hack we use the NX bit to flush&patch the page, 650 * so we can't use the NX bit inside the guest. Let's cross our fingers, 651 * that no guest that needs the dcbz hack does NX. 652 */ 653 kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL); 654 r = RESUME_GUEST; 655 } else { 656 vcpu->arch.shared->msr |= shadow_srr1 & 0x58000000; 657 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 658 r = RESUME_GUEST; 659 } 660 break; 661 } 662 case BOOK3S_INTERRUPT_DATA_STORAGE: 663 { 664 ulong dar = kvmppc_get_fault_dar(vcpu); 665 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 666 u32 fault_dsisr = svcpu->fault_dsisr; 667 vcpu->stat.pf_storage++; 668 669 #ifdef CONFIG_PPC_BOOK3S_32 670 /* We set segments as unused segments when invalidating them. So 671 * treat the respective fault as segment fault. */ 672 if ((svcpu->sr[dar >> SID_SHIFT]) == SR_INVALID) { 673 kvmppc_mmu_map_segment(vcpu, dar); 674 r = RESUME_GUEST; 675 svcpu_put(svcpu); 676 break; 677 } 678 #endif 679 svcpu_put(svcpu); 680 681 /* The only case we need to handle is missing shadow PTEs */ 682 if (fault_dsisr & DSISR_NOHPTE) { 683 r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr); 684 } else { 685 vcpu->arch.shared->dar = dar; 686 vcpu->arch.shared->dsisr = fault_dsisr; 687 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 688 r = RESUME_GUEST; 689 } 690 break; 691 } 692 case BOOK3S_INTERRUPT_DATA_SEGMENT: 693 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) { 694 vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu); 695 kvmppc_book3s_queue_irqprio(vcpu, 696 BOOK3S_INTERRUPT_DATA_SEGMENT); 697 } 698 r = RESUME_GUEST; 699 break; 700 case BOOK3S_INTERRUPT_INST_SEGMENT: 701 if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)) < 0) { 702 kvmppc_book3s_queue_irqprio(vcpu, 703 BOOK3S_INTERRUPT_INST_SEGMENT); 704 } 705 r = RESUME_GUEST; 706 break; 707 /* We're good on these - the host merely wanted to get our attention */ 708 case BOOK3S_INTERRUPT_DECREMENTER: 709 case BOOK3S_INTERRUPT_HV_DECREMENTER: 710 vcpu->stat.dec_exits++; 711 r = RESUME_GUEST; 712 break; 713 case BOOK3S_INTERRUPT_EXTERNAL: 714 case BOOK3S_INTERRUPT_EXTERNAL_LEVEL: 715 case BOOK3S_INTERRUPT_EXTERNAL_HV: 716 vcpu->stat.ext_intr_exits++; 717 r = RESUME_GUEST; 718 break; 719 case BOOK3S_INTERRUPT_PERFMON: 720 r = RESUME_GUEST; 721 break; 722 case BOOK3S_INTERRUPT_PROGRAM: 723 case BOOK3S_INTERRUPT_H_EMUL_ASSIST: 724 { 725 enum emulation_result er; 726 struct kvmppc_book3s_shadow_vcpu *svcpu; 727 ulong flags; 728 729 program_interrupt: 730 svcpu = svcpu_get(vcpu); 731 flags = svcpu->shadow_srr1 & 0x1f0000ull; 732 svcpu_put(svcpu); 733 734 if (vcpu->arch.shared->msr & MSR_PR) { 735 #ifdef EXIT_DEBUG 736 printk(KERN_INFO "Userspace triggered 0x700 exception at 0x%lx (0x%x)\n", kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu)); 737 #endif 738 if ((kvmppc_get_last_inst(vcpu) & 0xff0007ff) != 739 (INS_DCBZ & 0xfffffff7)) { 740 kvmppc_core_queue_program(vcpu, flags); 741 r = RESUME_GUEST; 742 break; 743 } 744 } 745 746 vcpu->stat.emulated_inst_exits++; 747 er = kvmppc_emulate_instruction(run, vcpu); 748 switch (er) { 749 case EMULATE_DONE: 750 r = RESUME_GUEST_NV; 751 break; 752 case EMULATE_AGAIN: 753 r = RESUME_GUEST; 754 break; 755 case EMULATE_FAIL: 756 printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", 757 __func__, kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu)); 758 kvmppc_core_queue_program(vcpu, flags); 759 r = RESUME_GUEST; 760 break; 761 case EMULATE_DO_MMIO: 762 run->exit_reason = KVM_EXIT_MMIO; 763 r = RESUME_HOST_NV; 764 break; 765 case EMULATE_DO_PAPR: 766 run->exit_reason = KVM_EXIT_PAPR_HCALL; 767 vcpu->arch.hcall_needed = 1; 768 r = RESUME_HOST_NV; 769 break; 770 default: 771 BUG(); 772 } 773 break; 774 } 775 case BOOK3S_INTERRUPT_SYSCALL: 776 if (vcpu->arch.papr_enabled && 777 (kvmppc_get_last_inst(vcpu) == 0x44000022) && 778 !(vcpu->arch.shared->msr & MSR_PR)) { 779 /* SC 1 papr hypercalls */ 780 ulong cmd = kvmppc_get_gpr(vcpu, 3); 781 int i; 782 783 #ifdef CONFIG_KVM_BOOK3S_64_PR 784 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) { 785 r = RESUME_GUEST; 786 break; 787 } 788 #endif 789 790 run->papr_hcall.nr = cmd; 791 for (i = 0; i < 9; ++i) { 792 ulong gpr = kvmppc_get_gpr(vcpu, 4 + i); 793 run->papr_hcall.args[i] = gpr; 794 } 795 run->exit_reason = KVM_EXIT_PAPR_HCALL; 796 vcpu->arch.hcall_needed = 1; 797 r = RESUME_HOST; 798 } else if (vcpu->arch.osi_enabled && 799 (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) && 800 (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) { 801 /* MOL hypercalls */ 802 u64 *gprs = run->osi.gprs; 803 int i; 804 805 run->exit_reason = KVM_EXIT_OSI; 806 for (i = 0; i < 32; i++) 807 gprs[i] = kvmppc_get_gpr(vcpu, i); 808 vcpu->arch.osi_needed = 1; 809 r = RESUME_HOST_NV; 810 } else if (!(vcpu->arch.shared->msr & MSR_PR) && 811 (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) { 812 /* KVM PV hypercalls */ 813 kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu)); 814 r = RESUME_GUEST; 815 } else { 816 /* Guest syscalls */ 817 vcpu->stat.syscall_exits++; 818 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 819 r = RESUME_GUEST; 820 } 821 break; 822 case BOOK3S_INTERRUPT_FP_UNAVAIL: 823 case BOOK3S_INTERRUPT_ALTIVEC: 824 case BOOK3S_INTERRUPT_VSX: 825 { 826 int ext_msr = 0; 827 828 switch (exit_nr) { 829 case BOOK3S_INTERRUPT_FP_UNAVAIL: ext_msr = MSR_FP; break; 830 case BOOK3S_INTERRUPT_ALTIVEC: ext_msr = MSR_VEC; break; 831 case BOOK3S_INTERRUPT_VSX: ext_msr = MSR_VSX; break; 832 } 833 834 switch (kvmppc_check_ext(vcpu, exit_nr)) { 835 case EMULATE_DONE: 836 /* everything ok - let's enable the ext */ 837 r = kvmppc_handle_ext(vcpu, exit_nr, ext_msr); 838 break; 839 case EMULATE_FAIL: 840 /* we need to emulate this instruction */ 841 goto program_interrupt; 842 break; 843 default: 844 /* nothing to worry about - go again */ 845 break; 846 } 847 break; 848 } 849 case BOOK3S_INTERRUPT_ALIGNMENT: 850 if (kvmppc_read_inst(vcpu) == EMULATE_DONE) { 851 vcpu->arch.shared->dsisr = kvmppc_alignment_dsisr(vcpu, 852 kvmppc_get_last_inst(vcpu)); 853 vcpu->arch.shared->dar = kvmppc_alignment_dar(vcpu, 854 kvmppc_get_last_inst(vcpu)); 855 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 856 } 857 r = RESUME_GUEST; 858 break; 859 case BOOK3S_INTERRUPT_MACHINE_CHECK: 860 case BOOK3S_INTERRUPT_TRACE: 861 kvmppc_book3s_queue_irqprio(vcpu, exit_nr); 862 r = RESUME_GUEST; 863 break; 864 default: 865 { 866 struct kvmppc_book3s_shadow_vcpu *svcpu = svcpu_get(vcpu); 867 ulong shadow_srr1 = svcpu->shadow_srr1; 868 svcpu_put(svcpu); 869 /* Ugh - bork here! What did we get? */ 870 printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | msr=0x%lx\n", 871 exit_nr, kvmppc_get_pc(vcpu), shadow_srr1); 872 r = RESUME_HOST; 873 BUG(); 874 break; 875 } 876 } 877 878 if (!(r & RESUME_HOST)) { 879 /* To avoid clobbering exit_reason, only check for signals if 880 * we aren't already exiting to userspace for some other 881 * reason. */ 882 883 /* 884 * Interrupts could be timers for the guest which we have to 885 * inject again, so let's postpone them until we're in the guest 886 * and if we really did time things so badly, then we just exit 887 * again due to a host external interrupt. 888 */ 889 local_irq_disable(); 890 s = kvmppc_prepare_to_enter(vcpu); 891 if (s <= 0) { 892 local_irq_enable(); 893 r = s; 894 } else { 895 kvmppc_lazy_ee_enable(); 896 } 897 } 898 899 trace_kvm_book3s_reenter(r, vcpu); 900 901 return r; 902 } 903 904 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 905 struct kvm_sregs *sregs) 906 { 907 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); 908 int i; 909 910 sregs->pvr = vcpu->arch.pvr; 911 912 sregs->u.s.sdr1 = to_book3s(vcpu)->sdr1; 913 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) { 914 for (i = 0; i < 64; i++) { 915 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige | i; 916 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; 917 } 918 } else { 919 for (i = 0; i < 16; i++) 920 sregs->u.s.ppc32.sr[i] = vcpu->arch.shared->sr[i]; 921 922 for (i = 0; i < 8; i++) { 923 sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw; 924 sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw; 925 } 926 } 927 928 return 0; 929 } 930 931 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 932 struct kvm_sregs *sregs) 933 { 934 struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu); 935 int i; 936 937 kvmppc_set_pvr(vcpu, sregs->pvr); 938 939 vcpu3s->sdr1 = sregs->u.s.sdr1; 940 if (vcpu->arch.hflags & BOOK3S_HFLAG_SLB) { 941 for (i = 0; i < 64; i++) { 942 vcpu->arch.mmu.slbmte(vcpu, sregs->u.s.ppc64.slb[i].slbv, 943 sregs->u.s.ppc64.slb[i].slbe); 944 } 945 } else { 946 for (i = 0; i < 16; i++) { 947 vcpu->arch.mmu.mtsrin(vcpu, i, sregs->u.s.ppc32.sr[i]); 948 } 949 for (i = 0; i < 8; i++) { 950 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), false, 951 (u32)sregs->u.s.ppc32.ibat[i]); 952 kvmppc_set_bat(vcpu, &(vcpu3s->ibat[i]), true, 953 (u32)(sregs->u.s.ppc32.ibat[i] >> 32)); 954 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), false, 955 (u32)sregs->u.s.ppc32.dbat[i]); 956 kvmppc_set_bat(vcpu, &(vcpu3s->dbat[i]), true, 957 (u32)(sregs->u.s.ppc32.dbat[i] >> 32)); 958 } 959 } 960 961 /* Flush the MMU after messing with the segments */ 962 kvmppc_mmu_pte_flush(vcpu, 0, 0); 963 964 return 0; 965 } 966 967 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, union kvmppc_one_reg *val) 968 { 969 int r = 0; 970 971 switch (id) { 972 case KVM_REG_PPC_HIOR: 973 *val = get_reg_val(id, to_book3s(vcpu)->hior); 974 break; 975 #ifdef CONFIG_VSX 976 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: { 977 long int i = id - KVM_REG_PPC_VSR0; 978 979 if (!cpu_has_feature(CPU_FTR_VSX)) { 980 r = -ENXIO; 981 break; 982 } 983 val->vsxval[0] = vcpu->arch.fpr[i]; 984 val->vsxval[1] = vcpu->arch.vsr[i]; 985 break; 986 } 987 #endif /* CONFIG_VSX */ 988 default: 989 r = -EINVAL; 990 break; 991 } 992 993 return r; 994 } 995 996 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, union kvmppc_one_reg *val) 997 { 998 int r = 0; 999 1000 switch (id) { 1001 case KVM_REG_PPC_HIOR: 1002 to_book3s(vcpu)->hior = set_reg_val(id, *val); 1003 to_book3s(vcpu)->hior_explicit = true; 1004 break; 1005 #ifdef CONFIG_VSX 1006 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: { 1007 long int i = id - KVM_REG_PPC_VSR0; 1008 1009 if (!cpu_has_feature(CPU_FTR_VSX)) { 1010 r = -ENXIO; 1011 break; 1012 } 1013 vcpu->arch.fpr[i] = val->vsxval[0]; 1014 vcpu->arch.vsr[i] = val->vsxval[1]; 1015 break; 1016 } 1017 #endif /* CONFIG_VSX */ 1018 default: 1019 r = -EINVAL; 1020 break; 1021 } 1022 1023 return r; 1024 } 1025 1026 int kvmppc_core_check_processor_compat(void) 1027 { 1028 return 0; 1029 } 1030 1031 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) 1032 { 1033 struct kvmppc_vcpu_book3s *vcpu_book3s; 1034 struct kvm_vcpu *vcpu; 1035 int err = -ENOMEM; 1036 unsigned long p; 1037 1038 vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s)); 1039 if (!vcpu_book3s) 1040 goto out; 1041 1042 vcpu_book3s->shadow_vcpu = (struct kvmppc_book3s_shadow_vcpu *) 1043 kzalloc(sizeof(*vcpu_book3s->shadow_vcpu), GFP_KERNEL); 1044 if (!vcpu_book3s->shadow_vcpu) 1045 goto free_vcpu; 1046 1047 vcpu = &vcpu_book3s->vcpu; 1048 err = kvm_vcpu_init(vcpu, kvm, id); 1049 if (err) 1050 goto free_shadow_vcpu; 1051 1052 p = __get_free_page(GFP_KERNEL|__GFP_ZERO); 1053 /* the real shared page fills the last 4k of our page */ 1054 vcpu->arch.shared = (void*)(p + PAGE_SIZE - 4096); 1055 if (!p) 1056 goto uninit_vcpu; 1057 1058 #ifdef CONFIG_PPC_BOOK3S_64 1059 /* default to book3s_64 (970fx) */ 1060 vcpu->arch.pvr = 0x3C0301; 1061 #else 1062 /* default to book3s_32 (750) */ 1063 vcpu->arch.pvr = 0x84202; 1064 #endif 1065 kvmppc_set_pvr(vcpu, vcpu->arch.pvr); 1066 vcpu->arch.slb_nr = 64; 1067 1068 vcpu->arch.shadow_msr = MSR_USER64; 1069 1070 err = kvmppc_mmu_init(vcpu); 1071 if (err < 0) 1072 goto uninit_vcpu; 1073 1074 return vcpu; 1075 1076 uninit_vcpu: 1077 kvm_vcpu_uninit(vcpu); 1078 free_shadow_vcpu: 1079 kfree(vcpu_book3s->shadow_vcpu); 1080 free_vcpu: 1081 vfree(vcpu_book3s); 1082 out: 1083 return ERR_PTR(err); 1084 } 1085 1086 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) 1087 { 1088 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); 1089 1090 free_page((unsigned long)vcpu->arch.shared & PAGE_MASK); 1091 kvm_vcpu_uninit(vcpu); 1092 kfree(vcpu_book3s->shadow_vcpu); 1093 vfree(vcpu_book3s); 1094 } 1095 1096 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 1097 { 1098 int ret; 1099 double fpr[32][TS_FPRWIDTH]; 1100 unsigned int fpscr; 1101 int fpexc_mode; 1102 #ifdef CONFIG_ALTIVEC 1103 vector128 vr[32]; 1104 vector128 vscr; 1105 unsigned long uninitialized_var(vrsave); 1106 int used_vr; 1107 #endif 1108 #ifdef CONFIG_VSX 1109 int used_vsr; 1110 #endif 1111 ulong ext_msr; 1112 1113 /* Check if we can run the vcpu at all */ 1114 if (!vcpu->arch.sane) { 1115 kvm_run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1116 ret = -EINVAL; 1117 goto out; 1118 } 1119 1120 /* 1121 * Interrupts could be timers for the guest which we have to inject 1122 * again, so let's postpone them until we're in the guest and if we 1123 * really did time things so badly, then we just exit again due to 1124 * a host external interrupt. 1125 */ 1126 local_irq_disable(); 1127 ret = kvmppc_prepare_to_enter(vcpu); 1128 if (ret <= 0) { 1129 local_irq_enable(); 1130 goto out; 1131 } 1132 1133 /* Save FPU state in stack */ 1134 if (current->thread.regs->msr & MSR_FP) 1135 giveup_fpu(current); 1136 memcpy(fpr, current->thread.fpr, sizeof(current->thread.fpr)); 1137 fpscr = current->thread.fpscr.val; 1138 fpexc_mode = current->thread.fpexc_mode; 1139 1140 #ifdef CONFIG_ALTIVEC 1141 /* Save Altivec state in stack */ 1142 used_vr = current->thread.used_vr; 1143 if (used_vr) { 1144 if (current->thread.regs->msr & MSR_VEC) 1145 giveup_altivec(current); 1146 memcpy(vr, current->thread.vr, sizeof(current->thread.vr)); 1147 vscr = current->thread.vscr; 1148 vrsave = current->thread.vrsave; 1149 } 1150 #endif 1151 1152 #ifdef CONFIG_VSX 1153 /* Save VSX state in stack */ 1154 used_vsr = current->thread.used_vsr; 1155 if (used_vsr && (current->thread.regs->msr & MSR_VSX)) 1156 __giveup_vsx(current); 1157 #endif 1158 1159 /* Remember the MSR with disabled extensions */ 1160 ext_msr = current->thread.regs->msr; 1161 1162 /* Preload FPU if it's enabled */ 1163 if (vcpu->arch.shared->msr & MSR_FP) 1164 kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP); 1165 1166 kvmppc_lazy_ee_enable(); 1167 1168 ret = __kvmppc_vcpu_run(kvm_run, vcpu); 1169 1170 /* No need for kvm_guest_exit. It's done in handle_exit. 1171 We also get here with interrupts enabled. */ 1172 1173 /* Make sure we save the guest FPU/Altivec/VSX state */ 1174 kvmppc_giveup_ext(vcpu, MSR_FP | MSR_VEC | MSR_VSX); 1175 1176 current->thread.regs->msr = ext_msr; 1177 1178 /* Restore FPU/VSX state from stack */ 1179 memcpy(current->thread.fpr, fpr, sizeof(current->thread.fpr)); 1180 current->thread.fpscr.val = fpscr; 1181 current->thread.fpexc_mode = fpexc_mode; 1182 1183 #ifdef CONFIG_ALTIVEC 1184 /* Restore Altivec state from stack */ 1185 if (used_vr && current->thread.used_vr) { 1186 memcpy(current->thread.vr, vr, sizeof(current->thread.vr)); 1187 current->thread.vscr = vscr; 1188 current->thread.vrsave = vrsave; 1189 } 1190 current->thread.used_vr = used_vr; 1191 #endif 1192 1193 #ifdef CONFIG_VSX 1194 current->thread.used_vsr = used_vsr; 1195 #endif 1196 1197 out: 1198 vcpu->mode = OUTSIDE_GUEST_MODE; 1199 return ret; 1200 } 1201 1202 /* 1203 * Get (and clear) the dirty memory log for a memory slot. 1204 */ 1205 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, 1206 struct kvm_dirty_log *log) 1207 { 1208 struct kvm_memory_slot *memslot; 1209 struct kvm_vcpu *vcpu; 1210 ulong ga, ga_end; 1211 int is_dirty = 0; 1212 int r; 1213 unsigned long n; 1214 1215 mutex_lock(&kvm->slots_lock); 1216 1217 r = kvm_get_dirty_log(kvm, log, &is_dirty); 1218 if (r) 1219 goto out; 1220 1221 /* If nothing is dirty, don't bother messing with page tables. */ 1222 if (is_dirty) { 1223 memslot = id_to_memslot(kvm->memslots, log->slot); 1224 1225 ga = memslot->base_gfn << PAGE_SHIFT; 1226 ga_end = ga + (memslot->npages << PAGE_SHIFT); 1227 1228 kvm_for_each_vcpu(n, vcpu, kvm) 1229 kvmppc_mmu_pte_pflush(vcpu, ga, ga_end); 1230 1231 n = kvm_dirty_bitmap_bytes(memslot); 1232 memset(memslot->dirty_bitmap, 0, n); 1233 } 1234 1235 r = 0; 1236 out: 1237 mutex_unlock(&kvm->slots_lock); 1238 return r; 1239 } 1240 1241 #ifdef CONFIG_PPC64 1242 int kvm_vm_ioctl_get_smmu_info(struct kvm *kvm, struct kvm_ppc_smmu_info *info) 1243 { 1244 /* No flags */ 1245 info->flags = 0; 1246 1247 /* SLB is always 64 entries */ 1248 info->slb_size = 64; 1249 1250 /* Standard 4k base page size segment */ 1251 info->sps[0].page_shift = 12; 1252 info->sps[0].slb_enc = 0; 1253 info->sps[0].enc[0].page_shift = 12; 1254 info->sps[0].enc[0].pte_enc = 0; 1255 1256 /* Standard 16M large page size segment */ 1257 info->sps[1].page_shift = 24; 1258 info->sps[1].slb_enc = SLB_VSID_L; 1259 info->sps[1].enc[0].page_shift = 24; 1260 info->sps[1].enc[0].pte_enc = 0; 1261 1262 return 0; 1263 } 1264 #endif /* CONFIG_PPC64 */ 1265 1266 void kvmppc_core_free_memslot(struct kvm_memory_slot *free, 1267 struct kvm_memory_slot *dont) 1268 { 1269 } 1270 1271 int kvmppc_core_create_memslot(struct kvm_memory_slot *slot, 1272 unsigned long npages) 1273 { 1274 return 0; 1275 } 1276 1277 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 1278 struct kvm_memory_slot *memslot, 1279 struct kvm_userspace_memory_region *mem) 1280 { 1281 return 0; 1282 } 1283 1284 void kvmppc_core_commit_memory_region(struct kvm *kvm, 1285 struct kvm_userspace_memory_region *mem, 1286 struct kvm_memory_slot old) 1287 { 1288 } 1289 1290 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 1291 { 1292 } 1293 1294 static unsigned int kvm_global_user_count = 0; 1295 static DEFINE_SPINLOCK(kvm_global_user_count_lock); 1296 1297 int kvmppc_core_init_vm(struct kvm *kvm) 1298 { 1299 #ifdef CONFIG_PPC64 1300 INIT_LIST_HEAD(&kvm->arch.spapr_tce_tables); 1301 #endif 1302 1303 if (firmware_has_feature(FW_FEATURE_SET_MODE)) { 1304 spin_lock(&kvm_global_user_count_lock); 1305 if (++kvm_global_user_count == 1) 1306 pSeries_disable_reloc_on_exc(); 1307 spin_unlock(&kvm_global_user_count_lock); 1308 } 1309 return 0; 1310 } 1311 1312 void kvmppc_core_destroy_vm(struct kvm *kvm) 1313 { 1314 #ifdef CONFIG_PPC64 1315 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables)); 1316 #endif 1317 1318 if (firmware_has_feature(FW_FEATURE_SET_MODE)) { 1319 spin_lock(&kvm_global_user_count_lock); 1320 BUG_ON(kvm_global_user_count == 0); 1321 if (--kvm_global_user_count == 0) 1322 pSeries_enable_reloc_on_exc(); 1323 spin_unlock(&kvm_global_user_count_lock); 1324 } 1325 } 1326 1327 static int kvmppc_book3s_init(void) 1328 { 1329 int r; 1330 1331 r = kvm_init(NULL, sizeof(struct kvmppc_vcpu_book3s), 0, 1332 THIS_MODULE); 1333 1334 if (r) 1335 return r; 1336 1337 r = kvmppc_mmu_hpte_sysinit(); 1338 1339 return r; 1340 } 1341 1342 static void kvmppc_book3s_exit(void) 1343 { 1344 kvmppc_mmu_hpte_sysexit(); 1345 kvm_exit(); 1346 } 1347 1348 module_init(kvmppc_book3s_init); 1349 module_exit(kvmppc_book3s_exit); 1350