1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License, version 2, as 4 * published by the Free Software Foundation. 5 * 6 * Copyright 2010-2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 7 */ 8 9 #include <linux/types.h> 10 #include <linux/string.h> 11 #include <linux/kvm.h> 12 #include <linux/kvm_host.h> 13 #include <linux/hugetlb.h> 14 #include <linux/module.h> 15 #include <linux/log2.h> 16 #include <linux/sizes.h> 17 18 #include <asm/trace.h> 19 #include <asm/kvm_ppc.h> 20 #include <asm/kvm_book3s.h> 21 #include <asm/book3s/64/mmu-hash.h> 22 #include <asm/hvcall.h> 23 #include <asm/synch.h> 24 #include <asm/ppc-opcode.h> 25 #include <asm/pte-walk.h> 26 27 /* Translate address of a vmalloc'd thing to a linear map address */ 28 static void *real_vmalloc_addr(void *x) 29 { 30 unsigned long addr = (unsigned long) x; 31 pte_t *p; 32 /* 33 * assume we don't have huge pages in vmalloc space... 34 * So don't worry about THP collapse/split. Called 35 * Only in realmode with MSR_EE = 0, hence won't need irq_save/restore. 36 */ 37 p = find_init_mm_pte(addr, NULL); 38 if (!p || !pte_present(*p)) 39 return NULL; 40 addr = (pte_pfn(*p) << PAGE_SHIFT) | (addr & ~PAGE_MASK); 41 return __va(addr); 42 } 43 44 /* Return 1 if we need to do a global tlbie, 0 if we can use tlbiel */ 45 static int global_invalidates(struct kvm *kvm) 46 { 47 int global; 48 int cpu; 49 50 /* 51 * If there is only one vcore, and it's currently running, 52 * as indicated by local_paca->kvm_hstate.kvm_vcpu being set, 53 * we can use tlbiel as long as we mark all other physical 54 * cores as potentially having stale TLB entries for this lpid. 55 * Otherwise, don't use tlbiel. 56 */ 57 if (kvm->arch.online_vcores == 1 && local_paca->kvm_hstate.kvm_vcpu) 58 global = 0; 59 else 60 global = 1; 61 62 if (!global) { 63 /* any other core might now have stale TLB entries... */ 64 smp_wmb(); 65 cpumask_setall(&kvm->arch.need_tlb_flush); 66 cpu = local_paca->kvm_hstate.kvm_vcore->pcpu; 67 /* 68 * On POWER9, threads are independent but the TLB is shared, 69 * so use the bit for the first thread to represent the core. 70 */ 71 if (cpu_has_feature(CPU_FTR_ARCH_300)) 72 cpu = cpu_first_thread_sibling(cpu); 73 cpumask_clear_cpu(cpu, &kvm->arch.need_tlb_flush); 74 } 75 76 return global; 77 } 78 79 /* 80 * Add this HPTE into the chain for the real page. 81 * Must be called with the chain locked; it unlocks the chain. 82 */ 83 void kvmppc_add_revmap_chain(struct kvm *kvm, struct revmap_entry *rev, 84 unsigned long *rmap, long pte_index, int realmode) 85 { 86 struct revmap_entry *head, *tail; 87 unsigned long i; 88 89 if (*rmap & KVMPPC_RMAP_PRESENT) { 90 i = *rmap & KVMPPC_RMAP_INDEX; 91 head = &kvm->arch.hpt.rev[i]; 92 if (realmode) 93 head = real_vmalloc_addr(head); 94 tail = &kvm->arch.hpt.rev[head->back]; 95 if (realmode) 96 tail = real_vmalloc_addr(tail); 97 rev->forw = i; 98 rev->back = head->back; 99 tail->forw = pte_index; 100 head->back = pte_index; 101 } else { 102 rev->forw = rev->back = pte_index; 103 *rmap = (*rmap & ~KVMPPC_RMAP_INDEX) | 104 pte_index | KVMPPC_RMAP_PRESENT; 105 } 106 unlock_rmap(rmap); 107 } 108 EXPORT_SYMBOL_GPL(kvmppc_add_revmap_chain); 109 110 /* Update the dirty bitmap of a memslot */ 111 void kvmppc_update_dirty_map(const struct kvm_memory_slot *memslot, 112 unsigned long gfn, unsigned long psize) 113 { 114 unsigned long npages; 115 116 if (!psize || !memslot->dirty_bitmap) 117 return; 118 npages = (psize + PAGE_SIZE - 1) / PAGE_SIZE; 119 gfn -= memslot->base_gfn; 120 set_dirty_bits_atomic(memslot->dirty_bitmap, gfn, npages); 121 } 122 EXPORT_SYMBOL_GPL(kvmppc_update_dirty_map); 123 124 static void kvmppc_set_dirty_from_hpte(struct kvm *kvm, 125 unsigned long hpte_v, unsigned long hpte_gr) 126 { 127 struct kvm_memory_slot *memslot; 128 unsigned long gfn; 129 unsigned long psize; 130 131 psize = kvmppc_actual_pgsz(hpte_v, hpte_gr); 132 gfn = hpte_rpn(hpte_gr, psize); 133 memslot = __gfn_to_memslot(kvm_memslots_raw(kvm), gfn); 134 if (memslot && memslot->dirty_bitmap) 135 kvmppc_update_dirty_map(memslot, gfn, psize); 136 } 137 138 /* Returns a pointer to the revmap entry for the page mapped by a HPTE */ 139 static unsigned long *revmap_for_hpte(struct kvm *kvm, unsigned long hpte_v, 140 unsigned long hpte_gr, 141 struct kvm_memory_slot **memslotp, 142 unsigned long *gfnp) 143 { 144 struct kvm_memory_slot *memslot; 145 unsigned long *rmap; 146 unsigned long gfn; 147 148 gfn = hpte_rpn(hpte_gr, kvmppc_actual_pgsz(hpte_v, hpte_gr)); 149 memslot = __gfn_to_memslot(kvm_memslots_raw(kvm), gfn); 150 if (memslotp) 151 *memslotp = memslot; 152 if (gfnp) 153 *gfnp = gfn; 154 if (!memslot) 155 return NULL; 156 157 rmap = real_vmalloc_addr(&memslot->arch.rmap[gfn - memslot->base_gfn]); 158 return rmap; 159 } 160 161 /* Remove this HPTE from the chain for a real page */ 162 static void remove_revmap_chain(struct kvm *kvm, long pte_index, 163 struct revmap_entry *rev, 164 unsigned long hpte_v, unsigned long hpte_r) 165 { 166 struct revmap_entry *next, *prev; 167 unsigned long ptel, head; 168 unsigned long *rmap; 169 unsigned long rcbits; 170 struct kvm_memory_slot *memslot; 171 unsigned long gfn; 172 173 rcbits = hpte_r & (HPTE_R_R | HPTE_R_C); 174 ptel = rev->guest_rpte |= rcbits; 175 rmap = revmap_for_hpte(kvm, hpte_v, ptel, &memslot, &gfn); 176 if (!rmap) 177 return; 178 lock_rmap(rmap); 179 180 head = *rmap & KVMPPC_RMAP_INDEX; 181 next = real_vmalloc_addr(&kvm->arch.hpt.rev[rev->forw]); 182 prev = real_vmalloc_addr(&kvm->arch.hpt.rev[rev->back]); 183 next->back = rev->back; 184 prev->forw = rev->forw; 185 if (head == pte_index) { 186 head = rev->forw; 187 if (head == pte_index) 188 *rmap &= ~(KVMPPC_RMAP_PRESENT | KVMPPC_RMAP_INDEX); 189 else 190 *rmap = (*rmap & ~KVMPPC_RMAP_INDEX) | head; 191 } 192 *rmap |= rcbits << KVMPPC_RMAP_RC_SHIFT; 193 if (rcbits & HPTE_R_C) 194 kvmppc_update_dirty_map(memslot, gfn, 195 kvmppc_actual_pgsz(hpte_v, hpte_r)); 196 unlock_rmap(rmap); 197 } 198 199 long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags, 200 long pte_index, unsigned long pteh, unsigned long ptel, 201 pgd_t *pgdir, bool realmode, unsigned long *pte_idx_ret) 202 { 203 unsigned long i, pa, gpa, gfn, psize; 204 unsigned long slot_fn, hva; 205 __be64 *hpte; 206 struct revmap_entry *rev; 207 unsigned long g_ptel; 208 struct kvm_memory_slot *memslot; 209 unsigned hpage_shift; 210 bool is_ci; 211 unsigned long *rmap; 212 pte_t *ptep; 213 unsigned int writing; 214 unsigned long mmu_seq; 215 unsigned long rcbits, irq_flags = 0; 216 217 if (kvm_is_radix(kvm)) 218 return H_FUNCTION; 219 psize = kvmppc_actual_pgsz(pteh, ptel); 220 if (!psize) 221 return H_PARAMETER; 222 writing = hpte_is_writable(ptel); 223 pteh &= ~(HPTE_V_HVLOCK | HPTE_V_ABSENT | HPTE_V_VALID); 224 ptel &= ~HPTE_GR_RESERVED; 225 g_ptel = ptel; 226 227 /* used later to detect if we might have been invalidated */ 228 mmu_seq = kvm->mmu_notifier_seq; 229 smp_rmb(); 230 231 /* Find the memslot (if any) for this address */ 232 gpa = (ptel & HPTE_R_RPN) & ~(psize - 1); 233 gfn = gpa >> PAGE_SHIFT; 234 memslot = __gfn_to_memslot(kvm_memslots_raw(kvm), gfn); 235 pa = 0; 236 is_ci = false; 237 rmap = NULL; 238 if (!(memslot && !(memslot->flags & KVM_MEMSLOT_INVALID))) { 239 /* Emulated MMIO - mark this with key=31 */ 240 pteh |= HPTE_V_ABSENT; 241 ptel |= HPTE_R_KEY_HI | HPTE_R_KEY_LO; 242 goto do_insert; 243 } 244 245 /* Check if the requested page fits entirely in the memslot. */ 246 if (!slot_is_aligned(memslot, psize)) 247 return H_PARAMETER; 248 slot_fn = gfn - memslot->base_gfn; 249 rmap = &memslot->arch.rmap[slot_fn]; 250 251 /* Translate to host virtual address */ 252 hva = __gfn_to_hva_memslot(memslot, gfn); 253 /* 254 * If we had a page table table change after lookup, we would 255 * retry via mmu_notifier_retry. 256 */ 257 if (!realmode) 258 local_irq_save(irq_flags); 259 /* 260 * If called in real mode we have MSR_EE = 0. Otherwise 261 * we disable irq above. 262 */ 263 ptep = __find_linux_pte(pgdir, hva, NULL, &hpage_shift); 264 if (ptep) { 265 pte_t pte; 266 unsigned int host_pte_size; 267 268 if (hpage_shift) 269 host_pte_size = 1ul << hpage_shift; 270 else 271 host_pte_size = PAGE_SIZE; 272 /* 273 * We should always find the guest page size 274 * to <= host page size, if host is using hugepage 275 */ 276 if (host_pte_size < psize) { 277 if (!realmode) 278 local_irq_restore(flags); 279 return H_PARAMETER; 280 } 281 pte = kvmppc_read_update_linux_pte(ptep, writing); 282 if (pte_present(pte) && !pte_protnone(pte)) { 283 if (writing && !__pte_write(pte)) 284 /* make the actual HPTE be read-only */ 285 ptel = hpte_make_readonly(ptel); 286 is_ci = pte_ci(pte); 287 pa = pte_pfn(pte) << PAGE_SHIFT; 288 pa |= hva & (host_pte_size - 1); 289 pa |= gpa & ~PAGE_MASK; 290 } 291 } 292 if (!realmode) 293 local_irq_restore(irq_flags); 294 295 ptel &= HPTE_R_KEY | HPTE_R_PP0 | (psize-1); 296 ptel |= pa; 297 298 if (pa) 299 pteh |= HPTE_V_VALID; 300 else { 301 pteh |= HPTE_V_ABSENT; 302 ptel &= ~(HPTE_R_KEY_HI | HPTE_R_KEY_LO); 303 } 304 305 /*If we had host pte mapping then Check WIMG */ 306 if (ptep && !hpte_cache_flags_ok(ptel, is_ci)) { 307 if (is_ci) 308 return H_PARAMETER; 309 /* 310 * Allow guest to map emulated device memory as 311 * uncacheable, but actually make it cacheable. 312 */ 313 ptel &= ~(HPTE_R_W|HPTE_R_I|HPTE_R_G); 314 ptel |= HPTE_R_M; 315 } 316 317 /* Find and lock the HPTEG slot to use */ 318 do_insert: 319 if (pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt)) 320 return H_PARAMETER; 321 if (likely((flags & H_EXACT) == 0)) { 322 pte_index &= ~7UL; 323 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); 324 for (i = 0; i < 8; ++i) { 325 if ((be64_to_cpu(*hpte) & HPTE_V_VALID) == 0 && 326 try_lock_hpte(hpte, HPTE_V_HVLOCK | HPTE_V_VALID | 327 HPTE_V_ABSENT)) 328 break; 329 hpte += 2; 330 } 331 if (i == 8) { 332 /* 333 * Since try_lock_hpte doesn't retry (not even stdcx. 334 * failures), it could be that there is a free slot 335 * but we transiently failed to lock it. Try again, 336 * actually locking each slot and checking it. 337 */ 338 hpte -= 16; 339 for (i = 0; i < 8; ++i) { 340 u64 pte; 341 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) 342 cpu_relax(); 343 pte = be64_to_cpu(hpte[0]); 344 if (!(pte & (HPTE_V_VALID | HPTE_V_ABSENT))) 345 break; 346 __unlock_hpte(hpte, pte); 347 hpte += 2; 348 } 349 if (i == 8) 350 return H_PTEG_FULL; 351 } 352 pte_index += i; 353 } else { 354 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); 355 if (!try_lock_hpte(hpte, HPTE_V_HVLOCK | HPTE_V_VALID | 356 HPTE_V_ABSENT)) { 357 /* Lock the slot and check again */ 358 u64 pte; 359 360 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) 361 cpu_relax(); 362 pte = be64_to_cpu(hpte[0]); 363 if (pte & (HPTE_V_VALID | HPTE_V_ABSENT)) { 364 __unlock_hpte(hpte, pte); 365 return H_PTEG_FULL; 366 } 367 } 368 } 369 370 /* Save away the guest's idea of the second HPTE dword */ 371 rev = &kvm->arch.hpt.rev[pte_index]; 372 if (realmode) 373 rev = real_vmalloc_addr(rev); 374 if (rev) { 375 rev->guest_rpte = g_ptel; 376 note_hpte_modification(kvm, rev); 377 } 378 379 /* Link HPTE into reverse-map chain */ 380 if (pteh & HPTE_V_VALID) { 381 if (realmode) 382 rmap = real_vmalloc_addr(rmap); 383 lock_rmap(rmap); 384 /* Check for pending invalidations under the rmap chain lock */ 385 if (mmu_notifier_retry(kvm, mmu_seq)) { 386 /* inval in progress, write a non-present HPTE */ 387 pteh |= HPTE_V_ABSENT; 388 pteh &= ~HPTE_V_VALID; 389 ptel &= ~(HPTE_R_KEY_HI | HPTE_R_KEY_LO); 390 unlock_rmap(rmap); 391 } else { 392 kvmppc_add_revmap_chain(kvm, rev, rmap, pte_index, 393 realmode); 394 /* Only set R/C in real HPTE if already set in *rmap */ 395 rcbits = *rmap >> KVMPPC_RMAP_RC_SHIFT; 396 ptel &= rcbits | ~(HPTE_R_R | HPTE_R_C); 397 } 398 } 399 400 /* Convert to new format on P9 */ 401 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 402 ptel = hpte_old_to_new_r(pteh, ptel); 403 pteh = hpte_old_to_new_v(pteh); 404 } 405 hpte[1] = cpu_to_be64(ptel); 406 407 /* Write the first HPTE dword, unlocking the HPTE and making it valid */ 408 eieio(); 409 __unlock_hpte(hpte, pteh); 410 asm volatile("ptesync" : : : "memory"); 411 412 *pte_idx_ret = pte_index; 413 return H_SUCCESS; 414 } 415 EXPORT_SYMBOL_GPL(kvmppc_do_h_enter); 416 417 long kvmppc_h_enter(struct kvm_vcpu *vcpu, unsigned long flags, 418 long pte_index, unsigned long pteh, unsigned long ptel) 419 { 420 return kvmppc_do_h_enter(vcpu->kvm, flags, pte_index, pteh, ptel, 421 vcpu->arch.pgdir, true, 422 &vcpu->arch.regs.gpr[4]); 423 } 424 425 #ifdef __BIG_ENDIAN__ 426 #define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token)) 427 #else 428 #define LOCK_TOKEN (*(u32 *)(&get_paca()->paca_index)) 429 #endif 430 431 static inline int is_mmio_hpte(unsigned long v, unsigned long r) 432 { 433 return ((v & HPTE_V_ABSENT) && 434 (r & (HPTE_R_KEY_HI | HPTE_R_KEY_LO)) == 435 (HPTE_R_KEY_HI | HPTE_R_KEY_LO)); 436 } 437 438 static void do_tlbies(struct kvm *kvm, unsigned long *rbvalues, 439 long npages, int global, bool need_sync) 440 { 441 long i; 442 443 /* 444 * We use the POWER9 5-operand versions of tlbie and tlbiel here. 445 * Since we are using RIC=0 PRS=0 R=0, and P7/P8 tlbiel ignores 446 * the RS field, this is backwards-compatible with P7 and P8. 447 */ 448 if (global) { 449 if (need_sync) 450 asm volatile("ptesync" : : : "memory"); 451 for (i = 0; i < npages; ++i) { 452 asm volatile(PPC_TLBIE_5(%0,%1,0,0,0) : : 453 "r" (rbvalues[i]), "r" (kvm->arch.lpid)); 454 } 455 456 if (cpu_has_feature(CPU_FTR_P9_TLBIE_BUG)) { 457 /* 458 * Need the extra ptesync to make sure we don't 459 * re-order the tlbie 460 */ 461 asm volatile("ptesync": : :"memory"); 462 asm volatile(PPC_TLBIE_5(%0,%1,0,0,0) : : 463 "r" (rbvalues[0]), "r" (kvm->arch.lpid)); 464 } 465 466 asm volatile("eieio; tlbsync; ptesync" : : : "memory"); 467 } else { 468 if (need_sync) 469 asm volatile("ptesync" : : : "memory"); 470 for (i = 0; i < npages; ++i) { 471 asm volatile(PPC_TLBIEL(%0,%1,0,0,0) : : 472 "r" (rbvalues[i]), "r" (0)); 473 } 474 asm volatile("ptesync" : : : "memory"); 475 } 476 } 477 478 long kvmppc_do_h_remove(struct kvm *kvm, unsigned long flags, 479 unsigned long pte_index, unsigned long avpn, 480 unsigned long *hpret) 481 { 482 __be64 *hpte; 483 unsigned long v, r, rb; 484 struct revmap_entry *rev; 485 u64 pte, orig_pte, pte_r; 486 487 if (kvm_is_radix(kvm)) 488 return H_FUNCTION; 489 if (pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt)) 490 return H_PARAMETER; 491 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); 492 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) 493 cpu_relax(); 494 pte = orig_pte = be64_to_cpu(hpte[0]); 495 pte_r = be64_to_cpu(hpte[1]); 496 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 497 pte = hpte_new_to_old_v(pte, pte_r); 498 pte_r = hpte_new_to_old_r(pte_r); 499 } 500 if ((pte & (HPTE_V_ABSENT | HPTE_V_VALID)) == 0 || 501 ((flags & H_AVPN) && (pte & ~0x7fUL) != avpn) || 502 ((flags & H_ANDCOND) && (pte & avpn) != 0)) { 503 __unlock_hpte(hpte, orig_pte); 504 return H_NOT_FOUND; 505 } 506 507 rev = real_vmalloc_addr(&kvm->arch.hpt.rev[pte_index]); 508 v = pte & ~HPTE_V_HVLOCK; 509 if (v & HPTE_V_VALID) { 510 hpte[0] &= ~cpu_to_be64(HPTE_V_VALID); 511 rb = compute_tlbie_rb(v, pte_r, pte_index); 512 do_tlbies(kvm, &rb, 1, global_invalidates(kvm), true); 513 /* 514 * The reference (R) and change (C) bits in a HPT 515 * entry can be set by hardware at any time up until 516 * the HPTE is invalidated and the TLB invalidation 517 * sequence has completed. This means that when 518 * removing a HPTE, we need to re-read the HPTE after 519 * the invalidation sequence has completed in order to 520 * obtain reliable values of R and C. 521 */ 522 remove_revmap_chain(kvm, pte_index, rev, v, 523 be64_to_cpu(hpte[1])); 524 } 525 r = rev->guest_rpte & ~HPTE_GR_RESERVED; 526 note_hpte_modification(kvm, rev); 527 unlock_hpte(hpte, 0); 528 529 if (is_mmio_hpte(v, pte_r)) 530 atomic64_inc(&kvm->arch.mmio_update); 531 532 if (v & HPTE_V_ABSENT) 533 v = (v & ~HPTE_V_ABSENT) | HPTE_V_VALID; 534 hpret[0] = v; 535 hpret[1] = r; 536 return H_SUCCESS; 537 } 538 EXPORT_SYMBOL_GPL(kvmppc_do_h_remove); 539 540 long kvmppc_h_remove(struct kvm_vcpu *vcpu, unsigned long flags, 541 unsigned long pte_index, unsigned long avpn) 542 { 543 return kvmppc_do_h_remove(vcpu->kvm, flags, pte_index, avpn, 544 &vcpu->arch.regs.gpr[4]); 545 } 546 547 long kvmppc_h_bulk_remove(struct kvm_vcpu *vcpu) 548 { 549 struct kvm *kvm = vcpu->kvm; 550 unsigned long *args = &vcpu->arch.regs.gpr[4]; 551 __be64 *hp, *hptes[4]; 552 unsigned long tlbrb[4]; 553 long int i, j, k, n, found, indexes[4]; 554 unsigned long flags, req, pte_index, rcbits; 555 int global; 556 long int ret = H_SUCCESS; 557 struct revmap_entry *rev, *revs[4]; 558 u64 hp0, hp1; 559 560 if (kvm_is_radix(kvm)) 561 return H_FUNCTION; 562 global = global_invalidates(kvm); 563 for (i = 0; i < 4 && ret == H_SUCCESS; ) { 564 n = 0; 565 for (; i < 4; ++i) { 566 j = i * 2; 567 pte_index = args[j]; 568 flags = pte_index >> 56; 569 pte_index &= ((1ul << 56) - 1); 570 req = flags >> 6; 571 flags &= 3; 572 if (req == 3) { /* no more requests */ 573 i = 4; 574 break; 575 } 576 if (req != 1 || flags == 3 || 577 pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt)) { 578 /* parameter error */ 579 args[j] = ((0xa0 | flags) << 56) + pte_index; 580 ret = H_PARAMETER; 581 break; 582 } 583 hp = (__be64 *) (kvm->arch.hpt.virt + (pte_index << 4)); 584 /* to avoid deadlock, don't spin except for first */ 585 if (!try_lock_hpte(hp, HPTE_V_HVLOCK)) { 586 if (n) 587 break; 588 while (!try_lock_hpte(hp, HPTE_V_HVLOCK)) 589 cpu_relax(); 590 } 591 found = 0; 592 hp0 = be64_to_cpu(hp[0]); 593 hp1 = be64_to_cpu(hp[1]); 594 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 595 hp0 = hpte_new_to_old_v(hp0, hp1); 596 hp1 = hpte_new_to_old_r(hp1); 597 } 598 if (hp0 & (HPTE_V_ABSENT | HPTE_V_VALID)) { 599 switch (flags & 3) { 600 case 0: /* absolute */ 601 found = 1; 602 break; 603 case 1: /* andcond */ 604 if (!(hp0 & args[j + 1])) 605 found = 1; 606 break; 607 case 2: /* AVPN */ 608 if ((hp0 & ~0x7fUL) == args[j + 1]) 609 found = 1; 610 break; 611 } 612 } 613 if (!found) { 614 hp[0] &= ~cpu_to_be64(HPTE_V_HVLOCK); 615 args[j] = ((0x90 | flags) << 56) + pte_index; 616 continue; 617 } 618 619 args[j] = ((0x80 | flags) << 56) + pte_index; 620 rev = real_vmalloc_addr(&kvm->arch.hpt.rev[pte_index]); 621 note_hpte_modification(kvm, rev); 622 623 if (!(hp0 & HPTE_V_VALID)) { 624 /* insert R and C bits from PTE */ 625 rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C); 626 args[j] |= rcbits << (56 - 5); 627 hp[0] = 0; 628 if (is_mmio_hpte(hp0, hp1)) 629 atomic64_inc(&kvm->arch.mmio_update); 630 continue; 631 } 632 633 /* leave it locked */ 634 hp[0] &= ~cpu_to_be64(HPTE_V_VALID); 635 tlbrb[n] = compute_tlbie_rb(hp0, hp1, pte_index); 636 indexes[n] = j; 637 hptes[n] = hp; 638 revs[n] = rev; 639 ++n; 640 } 641 642 if (!n) 643 break; 644 645 /* Now that we've collected a batch, do the tlbies */ 646 do_tlbies(kvm, tlbrb, n, global, true); 647 648 /* Read PTE low words after tlbie to get final R/C values */ 649 for (k = 0; k < n; ++k) { 650 j = indexes[k]; 651 pte_index = args[j] & ((1ul << 56) - 1); 652 hp = hptes[k]; 653 rev = revs[k]; 654 remove_revmap_chain(kvm, pte_index, rev, 655 be64_to_cpu(hp[0]), be64_to_cpu(hp[1])); 656 rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C); 657 args[j] |= rcbits << (56 - 5); 658 __unlock_hpte(hp, 0); 659 } 660 } 661 662 return ret; 663 } 664 665 long kvmppc_h_protect(struct kvm_vcpu *vcpu, unsigned long flags, 666 unsigned long pte_index, unsigned long avpn, 667 unsigned long va) 668 { 669 struct kvm *kvm = vcpu->kvm; 670 __be64 *hpte; 671 struct revmap_entry *rev; 672 unsigned long v, r, rb, mask, bits; 673 u64 pte_v, pte_r; 674 675 if (kvm_is_radix(kvm)) 676 return H_FUNCTION; 677 if (pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt)) 678 return H_PARAMETER; 679 680 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); 681 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) 682 cpu_relax(); 683 v = pte_v = be64_to_cpu(hpte[0]); 684 if (cpu_has_feature(CPU_FTR_ARCH_300)) 685 v = hpte_new_to_old_v(v, be64_to_cpu(hpte[1])); 686 if ((v & (HPTE_V_ABSENT | HPTE_V_VALID)) == 0 || 687 ((flags & H_AVPN) && (v & ~0x7fUL) != avpn)) { 688 __unlock_hpte(hpte, pte_v); 689 return H_NOT_FOUND; 690 } 691 692 pte_r = be64_to_cpu(hpte[1]); 693 bits = (flags << 55) & HPTE_R_PP0; 694 bits |= (flags << 48) & HPTE_R_KEY_HI; 695 bits |= flags & (HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_LO); 696 697 /* Update guest view of 2nd HPTE dword */ 698 mask = HPTE_R_PP0 | HPTE_R_PP | HPTE_R_N | 699 HPTE_R_KEY_HI | HPTE_R_KEY_LO; 700 rev = real_vmalloc_addr(&kvm->arch.hpt.rev[pte_index]); 701 if (rev) { 702 r = (rev->guest_rpte & ~mask) | bits; 703 rev->guest_rpte = r; 704 note_hpte_modification(kvm, rev); 705 } 706 707 /* Update HPTE */ 708 if (v & HPTE_V_VALID) { 709 /* 710 * If the page is valid, don't let it transition from 711 * readonly to writable. If it should be writable, we'll 712 * take a trap and let the page fault code sort it out. 713 */ 714 r = (pte_r & ~mask) | bits; 715 if (hpte_is_writable(r) && !hpte_is_writable(pte_r)) 716 r = hpte_make_readonly(r); 717 /* If the PTE is changing, invalidate it first */ 718 if (r != pte_r) { 719 rb = compute_tlbie_rb(v, r, pte_index); 720 hpte[0] = cpu_to_be64((pte_v & ~HPTE_V_VALID) | 721 HPTE_V_ABSENT); 722 do_tlbies(kvm, &rb, 1, global_invalidates(kvm), true); 723 /* Don't lose R/C bit updates done by hardware */ 724 r |= be64_to_cpu(hpte[1]) & (HPTE_R_R | HPTE_R_C); 725 hpte[1] = cpu_to_be64(r); 726 } 727 } 728 unlock_hpte(hpte, pte_v & ~HPTE_V_HVLOCK); 729 asm volatile("ptesync" : : : "memory"); 730 if (is_mmio_hpte(v, pte_r)) 731 atomic64_inc(&kvm->arch.mmio_update); 732 733 return H_SUCCESS; 734 } 735 736 long kvmppc_h_read(struct kvm_vcpu *vcpu, unsigned long flags, 737 unsigned long pte_index) 738 { 739 struct kvm *kvm = vcpu->kvm; 740 __be64 *hpte; 741 unsigned long v, r; 742 int i, n = 1; 743 struct revmap_entry *rev = NULL; 744 745 if (kvm_is_radix(kvm)) 746 return H_FUNCTION; 747 if (pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt)) 748 return H_PARAMETER; 749 if (flags & H_READ_4) { 750 pte_index &= ~3; 751 n = 4; 752 } 753 rev = real_vmalloc_addr(&kvm->arch.hpt.rev[pte_index]); 754 for (i = 0; i < n; ++i, ++pte_index) { 755 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); 756 v = be64_to_cpu(hpte[0]) & ~HPTE_V_HVLOCK; 757 r = be64_to_cpu(hpte[1]); 758 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 759 v = hpte_new_to_old_v(v, r); 760 r = hpte_new_to_old_r(r); 761 } 762 if (v & HPTE_V_ABSENT) { 763 v &= ~HPTE_V_ABSENT; 764 v |= HPTE_V_VALID; 765 } 766 if (v & HPTE_V_VALID) { 767 r = rev[i].guest_rpte | (r & (HPTE_R_R | HPTE_R_C)); 768 r &= ~HPTE_GR_RESERVED; 769 } 770 vcpu->arch.regs.gpr[4 + i * 2] = v; 771 vcpu->arch.regs.gpr[5 + i * 2] = r; 772 } 773 return H_SUCCESS; 774 } 775 776 long kvmppc_h_clear_ref(struct kvm_vcpu *vcpu, unsigned long flags, 777 unsigned long pte_index) 778 { 779 struct kvm *kvm = vcpu->kvm; 780 __be64 *hpte; 781 unsigned long v, r, gr; 782 struct revmap_entry *rev; 783 unsigned long *rmap; 784 long ret = H_NOT_FOUND; 785 786 if (kvm_is_radix(kvm)) 787 return H_FUNCTION; 788 if (pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt)) 789 return H_PARAMETER; 790 791 rev = real_vmalloc_addr(&kvm->arch.hpt.rev[pte_index]); 792 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); 793 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) 794 cpu_relax(); 795 v = be64_to_cpu(hpte[0]); 796 r = be64_to_cpu(hpte[1]); 797 if (!(v & (HPTE_V_VALID | HPTE_V_ABSENT))) 798 goto out; 799 800 gr = rev->guest_rpte; 801 if (rev->guest_rpte & HPTE_R_R) { 802 rev->guest_rpte &= ~HPTE_R_R; 803 note_hpte_modification(kvm, rev); 804 } 805 if (v & HPTE_V_VALID) { 806 gr |= r & (HPTE_R_R | HPTE_R_C); 807 if (r & HPTE_R_R) { 808 kvmppc_clear_ref_hpte(kvm, hpte, pte_index); 809 rmap = revmap_for_hpte(kvm, v, gr, NULL, NULL); 810 if (rmap) { 811 lock_rmap(rmap); 812 *rmap |= KVMPPC_RMAP_REFERENCED; 813 unlock_rmap(rmap); 814 } 815 } 816 } 817 vcpu->arch.regs.gpr[4] = gr; 818 ret = H_SUCCESS; 819 out: 820 unlock_hpte(hpte, v & ~HPTE_V_HVLOCK); 821 return ret; 822 } 823 824 long kvmppc_h_clear_mod(struct kvm_vcpu *vcpu, unsigned long flags, 825 unsigned long pte_index) 826 { 827 struct kvm *kvm = vcpu->kvm; 828 __be64 *hpte; 829 unsigned long v, r, gr; 830 struct revmap_entry *rev; 831 long ret = H_NOT_FOUND; 832 833 if (kvm_is_radix(kvm)) 834 return H_FUNCTION; 835 if (pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt)) 836 return H_PARAMETER; 837 838 rev = real_vmalloc_addr(&kvm->arch.hpt.rev[pte_index]); 839 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); 840 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) 841 cpu_relax(); 842 v = be64_to_cpu(hpte[0]); 843 r = be64_to_cpu(hpte[1]); 844 if (!(v & (HPTE_V_VALID | HPTE_V_ABSENT))) 845 goto out; 846 847 gr = rev->guest_rpte; 848 if (gr & HPTE_R_C) { 849 rev->guest_rpte &= ~HPTE_R_C; 850 note_hpte_modification(kvm, rev); 851 } 852 if (v & HPTE_V_VALID) { 853 /* need to make it temporarily absent so C is stable */ 854 hpte[0] |= cpu_to_be64(HPTE_V_ABSENT); 855 kvmppc_invalidate_hpte(kvm, hpte, pte_index); 856 r = be64_to_cpu(hpte[1]); 857 gr |= r & (HPTE_R_R | HPTE_R_C); 858 if (r & HPTE_R_C) { 859 hpte[1] = cpu_to_be64(r & ~HPTE_R_C); 860 eieio(); 861 kvmppc_set_dirty_from_hpte(kvm, v, gr); 862 } 863 } 864 vcpu->arch.regs.gpr[4] = gr; 865 ret = H_SUCCESS; 866 out: 867 unlock_hpte(hpte, v & ~HPTE_V_HVLOCK); 868 return ret; 869 } 870 871 static int kvmppc_get_hpa(struct kvm_vcpu *vcpu, unsigned long gpa, 872 int writing, unsigned long *hpa, 873 struct kvm_memory_slot **memslot_p) 874 { 875 struct kvm *kvm = vcpu->kvm; 876 struct kvm_memory_slot *memslot; 877 unsigned long gfn, hva, pa, psize = PAGE_SHIFT; 878 unsigned int shift; 879 pte_t *ptep, pte; 880 881 /* Find the memslot for this address */ 882 gfn = gpa >> PAGE_SHIFT; 883 memslot = __gfn_to_memslot(kvm_memslots_raw(kvm), gfn); 884 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) 885 return H_PARAMETER; 886 887 /* Translate to host virtual address */ 888 hva = __gfn_to_hva_memslot(memslot, gfn); 889 890 /* Try to find the host pte for that virtual address */ 891 ptep = __find_linux_pte(vcpu->arch.pgdir, hva, NULL, &shift); 892 if (!ptep) 893 return H_TOO_HARD; 894 pte = kvmppc_read_update_linux_pte(ptep, writing); 895 if (!pte_present(pte)) 896 return H_TOO_HARD; 897 898 /* Convert to a physical address */ 899 if (shift) 900 psize = 1UL << shift; 901 pa = pte_pfn(pte) << PAGE_SHIFT; 902 pa |= hva & (psize - 1); 903 pa |= gpa & ~PAGE_MASK; 904 905 if (hpa) 906 *hpa = pa; 907 if (memslot_p) 908 *memslot_p = memslot; 909 910 return H_SUCCESS; 911 } 912 913 static long kvmppc_do_h_page_init_zero(struct kvm_vcpu *vcpu, 914 unsigned long dest) 915 { 916 struct kvm_memory_slot *memslot; 917 struct kvm *kvm = vcpu->kvm; 918 unsigned long pa, mmu_seq; 919 long ret = H_SUCCESS; 920 int i; 921 922 /* Used later to detect if we might have been invalidated */ 923 mmu_seq = kvm->mmu_notifier_seq; 924 smp_rmb(); 925 926 ret = kvmppc_get_hpa(vcpu, dest, 1, &pa, &memslot); 927 if (ret != H_SUCCESS) 928 return ret; 929 930 /* Check if we've been invalidated */ 931 raw_spin_lock(&kvm->mmu_lock.rlock); 932 if (mmu_notifier_retry(kvm, mmu_seq)) { 933 ret = H_TOO_HARD; 934 goto out_unlock; 935 } 936 937 /* Zero the page */ 938 for (i = 0; i < SZ_4K; i += L1_CACHE_BYTES, pa += L1_CACHE_BYTES) 939 dcbz((void *)pa); 940 kvmppc_update_dirty_map(memslot, dest >> PAGE_SHIFT, PAGE_SIZE); 941 942 out_unlock: 943 raw_spin_unlock(&kvm->mmu_lock.rlock); 944 return ret; 945 } 946 947 static long kvmppc_do_h_page_init_copy(struct kvm_vcpu *vcpu, 948 unsigned long dest, unsigned long src) 949 { 950 unsigned long dest_pa, src_pa, mmu_seq; 951 struct kvm_memory_slot *dest_memslot; 952 struct kvm *kvm = vcpu->kvm; 953 long ret = H_SUCCESS; 954 955 /* Used later to detect if we might have been invalidated */ 956 mmu_seq = kvm->mmu_notifier_seq; 957 smp_rmb(); 958 959 ret = kvmppc_get_hpa(vcpu, dest, 1, &dest_pa, &dest_memslot); 960 if (ret != H_SUCCESS) 961 return ret; 962 ret = kvmppc_get_hpa(vcpu, src, 0, &src_pa, NULL); 963 if (ret != H_SUCCESS) 964 return ret; 965 966 /* Check if we've been invalidated */ 967 raw_spin_lock(&kvm->mmu_lock.rlock); 968 if (mmu_notifier_retry(kvm, mmu_seq)) { 969 ret = H_TOO_HARD; 970 goto out_unlock; 971 } 972 973 /* Copy the page */ 974 memcpy((void *)dest_pa, (void *)src_pa, SZ_4K); 975 976 kvmppc_update_dirty_map(dest_memslot, dest >> PAGE_SHIFT, PAGE_SIZE); 977 978 out_unlock: 979 raw_spin_unlock(&kvm->mmu_lock.rlock); 980 return ret; 981 } 982 983 long kvmppc_rm_h_page_init(struct kvm_vcpu *vcpu, unsigned long flags, 984 unsigned long dest, unsigned long src) 985 { 986 struct kvm *kvm = vcpu->kvm; 987 u64 pg_mask = SZ_4K - 1; /* 4K page size */ 988 long ret = H_SUCCESS; 989 990 /* Don't handle radix mode here, go up to the virtual mode handler */ 991 if (kvm_is_radix(kvm)) 992 return H_TOO_HARD; 993 994 /* Check for invalid flags (H_PAGE_SET_LOANED covers all CMO flags) */ 995 if (flags & ~(H_ICACHE_INVALIDATE | H_ICACHE_SYNCHRONIZE | 996 H_ZERO_PAGE | H_COPY_PAGE | H_PAGE_SET_LOANED)) 997 return H_PARAMETER; 998 999 /* dest (and src if copy_page flag set) must be page aligned */ 1000 if ((dest & pg_mask) || ((flags & H_COPY_PAGE) && (src & pg_mask))) 1001 return H_PARAMETER; 1002 1003 /* zero and/or copy the page as determined by the flags */ 1004 if (flags & H_COPY_PAGE) 1005 ret = kvmppc_do_h_page_init_copy(vcpu, dest, src); 1006 else if (flags & H_ZERO_PAGE) 1007 ret = kvmppc_do_h_page_init_zero(vcpu, dest); 1008 1009 /* We can ignore the other flags */ 1010 1011 return ret; 1012 } 1013 1014 void kvmppc_invalidate_hpte(struct kvm *kvm, __be64 *hptep, 1015 unsigned long pte_index) 1016 { 1017 unsigned long rb; 1018 u64 hp0, hp1; 1019 1020 hptep[0] &= ~cpu_to_be64(HPTE_V_VALID); 1021 hp0 = be64_to_cpu(hptep[0]); 1022 hp1 = be64_to_cpu(hptep[1]); 1023 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 1024 hp0 = hpte_new_to_old_v(hp0, hp1); 1025 hp1 = hpte_new_to_old_r(hp1); 1026 } 1027 rb = compute_tlbie_rb(hp0, hp1, pte_index); 1028 do_tlbies(kvm, &rb, 1, 1, true); 1029 } 1030 EXPORT_SYMBOL_GPL(kvmppc_invalidate_hpte); 1031 1032 void kvmppc_clear_ref_hpte(struct kvm *kvm, __be64 *hptep, 1033 unsigned long pte_index) 1034 { 1035 unsigned long rb; 1036 unsigned char rbyte; 1037 u64 hp0, hp1; 1038 1039 hp0 = be64_to_cpu(hptep[0]); 1040 hp1 = be64_to_cpu(hptep[1]); 1041 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 1042 hp0 = hpte_new_to_old_v(hp0, hp1); 1043 hp1 = hpte_new_to_old_r(hp1); 1044 } 1045 rb = compute_tlbie_rb(hp0, hp1, pte_index); 1046 rbyte = (be64_to_cpu(hptep[1]) & ~HPTE_R_R) >> 8; 1047 /* modify only the second-last byte, which contains the ref bit */ 1048 *((char *)hptep + 14) = rbyte; 1049 do_tlbies(kvm, &rb, 1, 1, false); 1050 } 1051 EXPORT_SYMBOL_GPL(kvmppc_clear_ref_hpte); 1052 1053 static int slb_base_page_shift[4] = { 1054 24, /* 16M */ 1055 16, /* 64k */ 1056 34, /* 16G */ 1057 20, /* 1M, unsupported */ 1058 }; 1059 1060 static struct mmio_hpte_cache_entry *mmio_cache_search(struct kvm_vcpu *vcpu, 1061 unsigned long eaddr, unsigned long slb_v, long mmio_update) 1062 { 1063 struct mmio_hpte_cache_entry *entry = NULL; 1064 unsigned int pshift; 1065 unsigned int i; 1066 1067 for (i = 0; i < MMIO_HPTE_CACHE_SIZE; i++) { 1068 entry = &vcpu->arch.mmio_cache.entry[i]; 1069 if (entry->mmio_update == mmio_update) { 1070 pshift = entry->slb_base_pshift; 1071 if ((entry->eaddr >> pshift) == (eaddr >> pshift) && 1072 entry->slb_v == slb_v) 1073 return entry; 1074 } 1075 } 1076 return NULL; 1077 } 1078 1079 static struct mmio_hpte_cache_entry * 1080 next_mmio_cache_entry(struct kvm_vcpu *vcpu) 1081 { 1082 unsigned int index = vcpu->arch.mmio_cache.index; 1083 1084 vcpu->arch.mmio_cache.index++; 1085 if (vcpu->arch.mmio_cache.index == MMIO_HPTE_CACHE_SIZE) 1086 vcpu->arch.mmio_cache.index = 0; 1087 1088 return &vcpu->arch.mmio_cache.entry[index]; 1089 } 1090 1091 /* When called from virtmode, this func should be protected by 1092 * preempt_disable(), otherwise, the holding of HPTE_V_HVLOCK 1093 * can trigger deadlock issue. 1094 */ 1095 long kvmppc_hv_find_lock_hpte(struct kvm *kvm, gva_t eaddr, unsigned long slb_v, 1096 unsigned long valid) 1097 { 1098 unsigned int i; 1099 unsigned int pshift; 1100 unsigned long somask; 1101 unsigned long vsid, hash; 1102 unsigned long avpn; 1103 __be64 *hpte; 1104 unsigned long mask, val; 1105 unsigned long v, r, orig_v; 1106 1107 /* Get page shift, work out hash and AVPN etc. */ 1108 mask = SLB_VSID_B | HPTE_V_AVPN | HPTE_V_SECONDARY; 1109 val = 0; 1110 pshift = 12; 1111 if (slb_v & SLB_VSID_L) { 1112 mask |= HPTE_V_LARGE; 1113 val |= HPTE_V_LARGE; 1114 pshift = slb_base_page_shift[(slb_v & SLB_VSID_LP) >> 4]; 1115 } 1116 if (slb_v & SLB_VSID_B_1T) { 1117 somask = (1UL << 40) - 1; 1118 vsid = (slb_v & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T; 1119 vsid ^= vsid << 25; 1120 } else { 1121 somask = (1UL << 28) - 1; 1122 vsid = (slb_v & ~SLB_VSID_B) >> SLB_VSID_SHIFT; 1123 } 1124 hash = (vsid ^ ((eaddr & somask) >> pshift)) & kvmppc_hpt_mask(&kvm->arch.hpt); 1125 avpn = slb_v & ~(somask >> 16); /* also includes B */ 1126 avpn |= (eaddr & somask) >> 16; 1127 1128 if (pshift >= 24) 1129 avpn &= ~((1UL << (pshift - 16)) - 1); 1130 else 1131 avpn &= ~0x7fUL; 1132 val |= avpn; 1133 1134 for (;;) { 1135 hpte = (__be64 *)(kvm->arch.hpt.virt + (hash << 7)); 1136 1137 for (i = 0; i < 16; i += 2) { 1138 /* Read the PTE racily */ 1139 v = be64_to_cpu(hpte[i]) & ~HPTE_V_HVLOCK; 1140 if (cpu_has_feature(CPU_FTR_ARCH_300)) 1141 v = hpte_new_to_old_v(v, be64_to_cpu(hpte[i+1])); 1142 1143 /* Check valid/absent, hash, segment size and AVPN */ 1144 if (!(v & valid) || (v & mask) != val) 1145 continue; 1146 1147 /* Lock the PTE and read it under the lock */ 1148 while (!try_lock_hpte(&hpte[i], HPTE_V_HVLOCK)) 1149 cpu_relax(); 1150 v = orig_v = be64_to_cpu(hpte[i]) & ~HPTE_V_HVLOCK; 1151 r = be64_to_cpu(hpte[i+1]); 1152 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 1153 v = hpte_new_to_old_v(v, r); 1154 r = hpte_new_to_old_r(r); 1155 } 1156 1157 /* 1158 * Check the HPTE again, including base page size 1159 */ 1160 if ((v & valid) && (v & mask) == val && 1161 kvmppc_hpte_base_page_shift(v, r) == pshift) 1162 /* Return with the HPTE still locked */ 1163 return (hash << 3) + (i >> 1); 1164 1165 __unlock_hpte(&hpte[i], orig_v); 1166 } 1167 1168 if (val & HPTE_V_SECONDARY) 1169 break; 1170 val |= HPTE_V_SECONDARY; 1171 hash = hash ^ kvmppc_hpt_mask(&kvm->arch.hpt); 1172 } 1173 return -1; 1174 } 1175 EXPORT_SYMBOL(kvmppc_hv_find_lock_hpte); 1176 1177 /* 1178 * Called in real mode to check whether an HPTE not found fault 1179 * is due to accessing a paged-out page or an emulated MMIO page, 1180 * or if a protection fault is due to accessing a page that the 1181 * guest wanted read/write access to but which we made read-only. 1182 * Returns a possibly modified status (DSISR) value if not 1183 * (i.e. pass the interrupt to the guest), 1184 * -1 to pass the fault up to host kernel mode code, -2 to do that 1185 * and also load the instruction word (for MMIO emulation), 1186 * or 0 if we should make the guest retry the access. 1187 */ 1188 long kvmppc_hpte_hv_fault(struct kvm_vcpu *vcpu, unsigned long addr, 1189 unsigned long slb_v, unsigned int status, bool data) 1190 { 1191 struct kvm *kvm = vcpu->kvm; 1192 long int index; 1193 unsigned long v, r, gr, orig_v; 1194 __be64 *hpte; 1195 unsigned long valid; 1196 struct revmap_entry *rev; 1197 unsigned long pp, key; 1198 struct mmio_hpte_cache_entry *cache_entry = NULL; 1199 long mmio_update = 0; 1200 1201 /* For protection fault, expect to find a valid HPTE */ 1202 valid = HPTE_V_VALID; 1203 if (status & DSISR_NOHPTE) { 1204 valid |= HPTE_V_ABSENT; 1205 mmio_update = atomic64_read(&kvm->arch.mmio_update); 1206 cache_entry = mmio_cache_search(vcpu, addr, slb_v, mmio_update); 1207 } 1208 if (cache_entry) { 1209 index = cache_entry->pte_index; 1210 v = cache_entry->hpte_v; 1211 r = cache_entry->hpte_r; 1212 gr = cache_entry->rpte; 1213 } else { 1214 index = kvmppc_hv_find_lock_hpte(kvm, addr, slb_v, valid); 1215 if (index < 0) { 1216 if (status & DSISR_NOHPTE) 1217 return status; /* there really was no HPTE */ 1218 return 0; /* for prot fault, HPTE disappeared */ 1219 } 1220 hpte = (__be64 *)(kvm->arch.hpt.virt + (index << 4)); 1221 v = orig_v = be64_to_cpu(hpte[0]) & ~HPTE_V_HVLOCK; 1222 r = be64_to_cpu(hpte[1]); 1223 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 1224 v = hpte_new_to_old_v(v, r); 1225 r = hpte_new_to_old_r(r); 1226 } 1227 rev = real_vmalloc_addr(&kvm->arch.hpt.rev[index]); 1228 gr = rev->guest_rpte; 1229 1230 unlock_hpte(hpte, orig_v); 1231 } 1232 1233 /* For not found, if the HPTE is valid by now, retry the instruction */ 1234 if ((status & DSISR_NOHPTE) && (v & HPTE_V_VALID)) 1235 return 0; 1236 1237 /* Check access permissions to the page */ 1238 pp = gr & (HPTE_R_PP0 | HPTE_R_PP); 1239 key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS; 1240 status &= ~DSISR_NOHPTE; /* DSISR_NOHPTE == SRR1_ISI_NOPT */ 1241 if (!data) { 1242 if (gr & (HPTE_R_N | HPTE_R_G)) 1243 return status | SRR1_ISI_N_OR_G; 1244 if (!hpte_read_permission(pp, slb_v & key)) 1245 return status | SRR1_ISI_PROT; 1246 } else if (status & DSISR_ISSTORE) { 1247 /* check write permission */ 1248 if (!hpte_write_permission(pp, slb_v & key)) 1249 return status | DSISR_PROTFAULT; 1250 } else { 1251 if (!hpte_read_permission(pp, slb_v & key)) 1252 return status | DSISR_PROTFAULT; 1253 } 1254 1255 /* Check storage key, if applicable */ 1256 if (data && (vcpu->arch.shregs.msr & MSR_DR)) { 1257 unsigned int perm = hpte_get_skey_perm(gr, vcpu->arch.amr); 1258 if (status & DSISR_ISSTORE) 1259 perm >>= 1; 1260 if (perm & 1) 1261 return status | DSISR_KEYFAULT; 1262 } 1263 1264 /* Save HPTE info for virtual-mode handler */ 1265 vcpu->arch.pgfault_addr = addr; 1266 vcpu->arch.pgfault_index = index; 1267 vcpu->arch.pgfault_hpte[0] = v; 1268 vcpu->arch.pgfault_hpte[1] = r; 1269 vcpu->arch.pgfault_cache = cache_entry; 1270 1271 /* Check the storage key to see if it is possibly emulated MMIO */ 1272 if ((r & (HPTE_R_KEY_HI | HPTE_R_KEY_LO)) == 1273 (HPTE_R_KEY_HI | HPTE_R_KEY_LO)) { 1274 if (!cache_entry) { 1275 unsigned int pshift = 12; 1276 unsigned int pshift_index; 1277 1278 if (slb_v & SLB_VSID_L) { 1279 pshift_index = ((slb_v & SLB_VSID_LP) >> 4); 1280 pshift = slb_base_page_shift[pshift_index]; 1281 } 1282 cache_entry = next_mmio_cache_entry(vcpu); 1283 cache_entry->eaddr = addr; 1284 cache_entry->slb_base_pshift = pshift; 1285 cache_entry->pte_index = index; 1286 cache_entry->hpte_v = v; 1287 cache_entry->hpte_r = r; 1288 cache_entry->rpte = gr; 1289 cache_entry->slb_v = slb_v; 1290 cache_entry->mmio_update = mmio_update; 1291 } 1292 if (data && (vcpu->arch.shregs.msr & MSR_IR)) 1293 return -2; /* MMIO emulation - load instr word */ 1294 } 1295 1296 return -1; /* send fault up to host kernel mode */ 1297 } 1298