1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * 4 * Copyright 2010-2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 5 */ 6 7 #include <linux/types.h> 8 #include <linux/string.h> 9 #include <linux/kvm.h> 10 #include <linux/kvm_host.h> 11 #include <linux/hugetlb.h> 12 #include <linux/module.h> 13 #include <linux/log2.h> 14 #include <linux/sizes.h> 15 16 #include <asm/trace.h> 17 #include <asm/kvm_ppc.h> 18 #include <asm/kvm_book3s.h> 19 #include <asm/book3s/64/mmu-hash.h> 20 #include <asm/hvcall.h> 21 #include <asm/synch.h> 22 #include <asm/ppc-opcode.h> 23 #include <asm/pte-walk.h> 24 25 /* Translate address of a vmalloc'd thing to a linear map address */ 26 static void *real_vmalloc_addr(void *addr) 27 { 28 return __va(ppc_find_vmap_phys((unsigned long)addr)); 29 } 30 31 /* Return 1 if we need to do a global tlbie, 0 if we can use tlbiel */ 32 static int global_invalidates(struct kvm *kvm) 33 { 34 int global; 35 int cpu; 36 37 /* 38 * If there is only one vcore, and it's currently running, 39 * as indicated by local_paca->kvm_hstate.kvm_vcpu being set, 40 * we can use tlbiel as long as we mark all other physical 41 * cores as potentially having stale TLB entries for this lpid. 42 * Otherwise, don't use tlbiel. 43 */ 44 if (kvm->arch.online_vcores == 1 && local_paca->kvm_hstate.kvm_vcpu) 45 global = 0; 46 else 47 global = 1; 48 49 if (!global) { 50 /* any other core might now have stale TLB entries... */ 51 smp_wmb(); 52 cpumask_setall(&kvm->arch.need_tlb_flush); 53 cpu = local_paca->kvm_hstate.kvm_vcore->pcpu; 54 /* 55 * On POWER9, threads are independent but the TLB is shared, 56 * so use the bit for the first thread to represent the core. 57 */ 58 if (cpu_has_feature(CPU_FTR_ARCH_300)) 59 cpu = cpu_first_thread_sibling(cpu); 60 cpumask_clear_cpu(cpu, &kvm->arch.need_tlb_flush); 61 } 62 63 return global; 64 } 65 66 /* 67 * Add this HPTE into the chain for the real page. 68 * Must be called with the chain locked; it unlocks the chain. 69 */ 70 void kvmppc_add_revmap_chain(struct kvm *kvm, struct revmap_entry *rev, 71 unsigned long *rmap, long pte_index, int realmode) 72 { 73 struct revmap_entry *head, *tail; 74 unsigned long i; 75 76 if (*rmap & KVMPPC_RMAP_PRESENT) { 77 i = *rmap & KVMPPC_RMAP_INDEX; 78 head = &kvm->arch.hpt.rev[i]; 79 if (realmode) 80 head = real_vmalloc_addr(head); 81 tail = &kvm->arch.hpt.rev[head->back]; 82 if (realmode) 83 tail = real_vmalloc_addr(tail); 84 rev->forw = i; 85 rev->back = head->back; 86 tail->forw = pte_index; 87 head->back = pte_index; 88 } else { 89 rev->forw = rev->back = pte_index; 90 *rmap = (*rmap & ~KVMPPC_RMAP_INDEX) | 91 pte_index | KVMPPC_RMAP_PRESENT | KVMPPC_RMAP_HPT; 92 } 93 unlock_rmap(rmap); 94 } 95 EXPORT_SYMBOL_GPL(kvmppc_add_revmap_chain); 96 97 /* Update the dirty bitmap of a memslot */ 98 void kvmppc_update_dirty_map(const struct kvm_memory_slot *memslot, 99 unsigned long gfn, unsigned long psize) 100 { 101 unsigned long npages; 102 103 if (!psize || !memslot->dirty_bitmap) 104 return; 105 npages = (psize + PAGE_SIZE - 1) / PAGE_SIZE; 106 gfn -= memslot->base_gfn; 107 set_dirty_bits_atomic(memslot->dirty_bitmap, gfn, npages); 108 } 109 EXPORT_SYMBOL_GPL(kvmppc_update_dirty_map); 110 111 static void kvmppc_set_dirty_from_hpte(struct kvm *kvm, 112 unsigned long hpte_v, unsigned long hpte_gr) 113 { 114 struct kvm_memory_slot *memslot; 115 unsigned long gfn; 116 unsigned long psize; 117 118 psize = kvmppc_actual_pgsz(hpte_v, hpte_gr); 119 gfn = hpte_rpn(hpte_gr, psize); 120 memslot = __gfn_to_memslot(kvm_memslots_raw(kvm), gfn); 121 if (memslot && memslot->dirty_bitmap) 122 kvmppc_update_dirty_map(memslot, gfn, psize); 123 } 124 125 /* Returns a pointer to the revmap entry for the page mapped by a HPTE */ 126 static unsigned long *revmap_for_hpte(struct kvm *kvm, unsigned long hpte_v, 127 unsigned long hpte_gr, 128 struct kvm_memory_slot **memslotp, 129 unsigned long *gfnp) 130 { 131 struct kvm_memory_slot *memslot; 132 unsigned long *rmap; 133 unsigned long gfn; 134 135 gfn = hpte_rpn(hpte_gr, kvmppc_actual_pgsz(hpte_v, hpte_gr)); 136 memslot = __gfn_to_memslot(kvm_memslots_raw(kvm), gfn); 137 if (memslotp) 138 *memslotp = memslot; 139 if (gfnp) 140 *gfnp = gfn; 141 if (!memslot) 142 return NULL; 143 144 rmap = real_vmalloc_addr(&memslot->arch.rmap[gfn - memslot->base_gfn]); 145 return rmap; 146 } 147 148 /* Remove this HPTE from the chain for a real page */ 149 static void remove_revmap_chain(struct kvm *kvm, long pte_index, 150 struct revmap_entry *rev, 151 unsigned long hpte_v, unsigned long hpte_r) 152 { 153 struct revmap_entry *next, *prev; 154 unsigned long ptel, head; 155 unsigned long *rmap; 156 unsigned long rcbits; 157 struct kvm_memory_slot *memslot; 158 unsigned long gfn; 159 160 rcbits = hpte_r & (HPTE_R_R | HPTE_R_C); 161 ptel = rev->guest_rpte |= rcbits; 162 rmap = revmap_for_hpte(kvm, hpte_v, ptel, &memslot, &gfn); 163 if (!rmap) 164 return; 165 lock_rmap(rmap); 166 167 head = *rmap & KVMPPC_RMAP_INDEX; 168 next = real_vmalloc_addr(&kvm->arch.hpt.rev[rev->forw]); 169 prev = real_vmalloc_addr(&kvm->arch.hpt.rev[rev->back]); 170 next->back = rev->back; 171 prev->forw = rev->forw; 172 if (head == pte_index) { 173 head = rev->forw; 174 if (head == pte_index) 175 *rmap &= ~(KVMPPC_RMAP_PRESENT | KVMPPC_RMAP_INDEX); 176 else 177 *rmap = (*rmap & ~KVMPPC_RMAP_INDEX) | head; 178 } 179 *rmap |= rcbits << KVMPPC_RMAP_RC_SHIFT; 180 if (rcbits & HPTE_R_C) 181 kvmppc_update_dirty_map(memslot, gfn, 182 kvmppc_actual_pgsz(hpte_v, hpte_r)); 183 unlock_rmap(rmap); 184 } 185 186 long kvmppc_do_h_enter(struct kvm *kvm, unsigned long flags, 187 long pte_index, unsigned long pteh, unsigned long ptel, 188 pgd_t *pgdir, bool realmode, unsigned long *pte_idx_ret) 189 { 190 unsigned long i, pa, gpa, gfn, psize; 191 unsigned long slot_fn, hva; 192 __be64 *hpte; 193 struct revmap_entry *rev; 194 unsigned long g_ptel; 195 struct kvm_memory_slot *memslot; 196 unsigned hpage_shift; 197 bool is_ci; 198 unsigned long *rmap; 199 pte_t *ptep; 200 unsigned int writing; 201 unsigned long mmu_seq; 202 unsigned long rcbits; 203 204 if (kvm_is_radix(kvm)) 205 return H_FUNCTION; 206 psize = kvmppc_actual_pgsz(pteh, ptel); 207 if (!psize) 208 return H_PARAMETER; 209 writing = hpte_is_writable(ptel); 210 pteh &= ~(HPTE_V_HVLOCK | HPTE_V_ABSENT | HPTE_V_VALID); 211 ptel &= ~HPTE_GR_RESERVED; 212 g_ptel = ptel; 213 214 /* used later to detect if we might have been invalidated */ 215 mmu_seq = kvm->mmu_notifier_seq; 216 smp_rmb(); 217 218 /* Find the memslot (if any) for this address */ 219 gpa = (ptel & HPTE_R_RPN) & ~(psize - 1); 220 gfn = gpa >> PAGE_SHIFT; 221 memslot = __gfn_to_memslot(kvm_memslots_raw(kvm), gfn); 222 pa = 0; 223 is_ci = false; 224 rmap = NULL; 225 if (!(memslot && !(memslot->flags & KVM_MEMSLOT_INVALID))) { 226 /* Emulated MMIO - mark this with key=31 */ 227 pteh |= HPTE_V_ABSENT; 228 ptel |= HPTE_R_KEY_HI | HPTE_R_KEY_LO; 229 goto do_insert; 230 } 231 232 /* Check if the requested page fits entirely in the memslot. */ 233 if (!slot_is_aligned(memslot, psize)) 234 return H_PARAMETER; 235 slot_fn = gfn - memslot->base_gfn; 236 rmap = &memslot->arch.rmap[slot_fn]; 237 238 /* Translate to host virtual address */ 239 hva = __gfn_to_hva_memslot(memslot, gfn); 240 241 arch_spin_lock(&kvm->mmu_lock.rlock.raw_lock); 242 ptep = find_kvm_host_pte(kvm, mmu_seq, hva, &hpage_shift); 243 if (ptep) { 244 pte_t pte; 245 unsigned int host_pte_size; 246 247 if (hpage_shift) 248 host_pte_size = 1ul << hpage_shift; 249 else 250 host_pte_size = PAGE_SIZE; 251 /* 252 * We should always find the guest page size 253 * to <= host page size, if host is using hugepage 254 */ 255 if (host_pte_size < psize) { 256 arch_spin_unlock(&kvm->mmu_lock.rlock.raw_lock); 257 return H_PARAMETER; 258 } 259 pte = kvmppc_read_update_linux_pte(ptep, writing); 260 if (pte_present(pte) && !pte_protnone(pte)) { 261 if (writing && !__pte_write(pte)) 262 /* make the actual HPTE be read-only */ 263 ptel = hpte_make_readonly(ptel); 264 is_ci = pte_ci(pte); 265 pa = pte_pfn(pte) << PAGE_SHIFT; 266 pa |= hva & (host_pte_size - 1); 267 pa |= gpa & ~PAGE_MASK; 268 } 269 } 270 arch_spin_unlock(&kvm->mmu_lock.rlock.raw_lock); 271 272 ptel &= HPTE_R_KEY | HPTE_R_PP0 | (psize-1); 273 ptel |= pa; 274 275 if (pa) 276 pteh |= HPTE_V_VALID; 277 else { 278 pteh |= HPTE_V_ABSENT; 279 ptel &= ~(HPTE_R_KEY_HI | HPTE_R_KEY_LO); 280 } 281 282 /*If we had host pte mapping then Check WIMG */ 283 if (ptep && !hpte_cache_flags_ok(ptel, is_ci)) { 284 if (is_ci) 285 return H_PARAMETER; 286 /* 287 * Allow guest to map emulated device memory as 288 * uncacheable, but actually make it cacheable. 289 */ 290 ptel &= ~(HPTE_R_W|HPTE_R_I|HPTE_R_G); 291 ptel |= HPTE_R_M; 292 } 293 294 /* Find and lock the HPTEG slot to use */ 295 do_insert: 296 if (pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt)) 297 return H_PARAMETER; 298 if (likely((flags & H_EXACT) == 0)) { 299 pte_index &= ~7UL; 300 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); 301 for (i = 0; i < 8; ++i) { 302 if ((be64_to_cpu(*hpte) & HPTE_V_VALID) == 0 && 303 try_lock_hpte(hpte, HPTE_V_HVLOCK | HPTE_V_VALID | 304 HPTE_V_ABSENT)) 305 break; 306 hpte += 2; 307 } 308 if (i == 8) { 309 /* 310 * Since try_lock_hpte doesn't retry (not even stdcx. 311 * failures), it could be that there is a free slot 312 * but we transiently failed to lock it. Try again, 313 * actually locking each slot and checking it. 314 */ 315 hpte -= 16; 316 for (i = 0; i < 8; ++i) { 317 u64 pte; 318 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) 319 cpu_relax(); 320 pte = be64_to_cpu(hpte[0]); 321 if (!(pte & (HPTE_V_VALID | HPTE_V_ABSENT))) 322 break; 323 __unlock_hpte(hpte, pte); 324 hpte += 2; 325 } 326 if (i == 8) 327 return H_PTEG_FULL; 328 } 329 pte_index += i; 330 } else { 331 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); 332 if (!try_lock_hpte(hpte, HPTE_V_HVLOCK | HPTE_V_VALID | 333 HPTE_V_ABSENT)) { 334 /* Lock the slot and check again */ 335 u64 pte; 336 337 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) 338 cpu_relax(); 339 pte = be64_to_cpu(hpte[0]); 340 if (pte & (HPTE_V_VALID | HPTE_V_ABSENT)) { 341 __unlock_hpte(hpte, pte); 342 return H_PTEG_FULL; 343 } 344 } 345 } 346 347 /* Save away the guest's idea of the second HPTE dword */ 348 rev = &kvm->arch.hpt.rev[pte_index]; 349 if (realmode) 350 rev = real_vmalloc_addr(rev); 351 if (rev) { 352 rev->guest_rpte = g_ptel; 353 note_hpte_modification(kvm, rev); 354 } 355 356 /* Link HPTE into reverse-map chain */ 357 if (pteh & HPTE_V_VALID) { 358 if (realmode) 359 rmap = real_vmalloc_addr(rmap); 360 lock_rmap(rmap); 361 /* Check for pending invalidations under the rmap chain lock */ 362 if (mmu_notifier_retry(kvm, mmu_seq)) { 363 /* inval in progress, write a non-present HPTE */ 364 pteh |= HPTE_V_ABSENT; 365 pteh &= ~HPTE_V_VALID; 366 ptel &= ~(HPTE_R_KEY_HI | HPTE_R_KEY_LO); 367 unlock_rmap(rmap); 368 } else { 369 kvmppc_add_revmap_chain(kvm, rev, rmap, pte_index, 370 realmode); 371 /* Only set R/C in real HPTE if already set in *rmap */ 372 rcbits = *rmap >> KVMPPC_RMAP_RC_SHIFT; 373 ptel &= rcbits | ~(HPTE_R_R | HPTE_R_C); 374 } 375 } 376 377 /* Convert to new format on P9 */ 378 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 379 ptel = hpte_old_to_new_r(pteh, ptel); 380 pteh = hpte_old_to_new_v(pteh); 381 } 382 hpte[1] = cpu_to_be64(ptel); 383 384 /* Write the first HPTE dword, unlocking the HPTE and making it valid */ 385 eieio(); 386 __unlock_hpte(hpte, pteh); 387 asm volatile("ptesync" : : : "memory"); 388 389 *pte_idx_ret = pte_index; 390 return H_SUCCESS; 391 } 392 EXPORT_SYMBOL_GPL(kvmppc_do_h_enter); 393 394 long kvmppc_h_enter(struct kvm_vcpu *vcpu, unsigned long flags, 395 long pte_index, unsigned long pteh, unsigned long ptel) 396 { 397 return kvmppc_do_h_enter(vcpu->kvm, flags, pte_index, pteh, ptel, 398 vcpu->arch.pgdir, true, 399 &vcpu->arch.regs.gpr[4]); 400 } 401 402 #ifdef __BIG_ENDIAN__ 403 #define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token)) 404 #else 405 #define LOCK_TOKEN (*(u32 *)(&get_paca()->paca_index)) 406 #endif 407 408 static inline int is_mmio_hpte(unsigned long v, unsigned long r) 409 { 410 return ((v & HPTE_V_ABSENT) && 411 (r & (HPTE_R_KEY_HI | HPTE_R_KEY_LO)) == 412 (HPTE_R_KEY_HI | HPTE_R_KEY_LO)); 413 } 414 415 static inline void fixup_tlbie_lpid(unsigned long rb_value, unsigned long lpid) 416 { 417 418 if (cpu_has_feature(CPU_FTR_P9_TLBIE_ERAT_BUG)) { 419 /* Radix flush for a hash guest */ 420 421 unsigned long rb,rs,prs,r,ric; 422 423 rb = PPC_BIT(52); /* IS = 2 */ 424 rs = 0; /* lpid = 0 */ 425 prs = 0; /* partition scoped */ 426 r = 1; /* radix format */ 427 ric = 0; /* RIC_FLSUH_TLB */ 428 429 /* 430 * Need the extra ptesync to make sure we don't 431 * re-order the tlbie 432 */ 433 asm volatile("ptesync": : :"memory"); 434 asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1) 435 : : "r"(rb), "i"(r), "i"(prs), 436 "i"(ric), "r"(rs) : "memory"); 437 } 438 439 if (cpu_has_feature(CPU_FTR_P9_TLBIE_STQ_BUG)) { 440 asm volatile("ptesync": : :"memory"); 441 asm volatile(PPC_TLBIE_5(%0,%1,0,0,0) : : 442 "r" (rb_value), "r" (lpid)); 443 } 444 } 445 446 static void do_tlbies(struct kvm *kvm, unsigned long *rbvalues, 447 long npages, int global, bool need_sync) 448 { 449 long i; 450 451 /* 452 * We use the POWER9 5-operand versions of tlbie and tlbiel here. 453 * Since we are using RIC=0 PRS=0 R=0, and P7/P8 tlbiel ignores 454 * the RS field, this is backwards-compatible with P7 and P8. 455 */ 456 if (global) { 457 if (need_sync) 458 asm volatile("ptesync" : : : "memory"); 459 for (i = 0; i < npages; ++i) { 460 asm volatile(PPC_TLBIE_5(%0,%1,0,0,0) : : 461 "r" (rbvalues[i]), "r" (kvm->arch.lpid)); 462 } 463 464 fixup_tlbie_lpid(rbvalues[i - 1], kvm->arch.lpid); 465 asm volatile("eieio; tlbsync; ptesync" : : : "memory"); 466 } else { 467 if (need_sync) 468 asm volatile("ptesync" : : : "memory"); 469 for (i = 0; i < npages; ++i) { 470 asm volatile(PPC_TLBIEL(%0,%1,0,0,0) : : 471 "r" (rbvalues[i]), "r" (0)); 472 } 473 asm volatile("ptesync" : : : "memory"); 474 } 475 } 476 477 long kvmppc_do_h_remove(struct kvm *kvm, unsigned long flags, 478 unsigned long pte_index, unsigned long avpn, 479 unsigned long *hpret) 480 { 481 __be64 *hpte; 482 unsigned long v, r, rb; 483 struct revmap_entry *rev; 484 u64 pte, orig_pte, pte_r; 485 486 if (kvm_is_radix(kvm)) 487 return H_FUNCTION; 488 if (pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt)) 489 return H_PARAMETER; 490 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); 491 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) 492 cpu_relax(); 493 pte = orig_pte = be64_to_cpu(hpte[0]); 494 pte_r = be64_to_cpu(hpte[1]); 495 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 496 pte = hpte_new_to_old_v(pte, pte_r); 497 pte_r = hpte_new_to_old_r(pte_r); 498 } 499 if ((pte & (HPTE_V_ABSENT | HPTE_V_VALID)) == 0 || 500 ((flags & H_AVPN) && (pte & ~0x7fUL) != avpn) || 501 ((flags & H_ANDCOND) && (pte & avpn) != 0)) { 502 __unlock_hpte(hpte, orig_pte); 503 return H_NOT_FOUND; 504 } 505 506 rev = real_vmalloc_addr(&kvm->arch.hpt.rev[pte_index]); 507 v = pte & ~HPTE_V_HVLOCK; 508 if (v & HPTE_V_VALID) { 509 hpte[0] &= ~cpu_to_be64(HPTE_V_VALID); 510 rb = compute_tlbie_rb(v, pte_r, pte_index); 511 do_tlbies(kvm, &rb, 1, global_invalidates(kvm), true); 512 /* 513 * The reference (R) and change (C) bits in a HPT 514 * entry can be set by hardware at any time up until 515 * the HPTE is invalidated and the TLB invalidation 516 * sequence has completed. This means that when 517 * removing a HPTE, we need to re-read the HPTE after 518 * the invalidation sequence has completed in order to 519 * obtain reliable values of R and C. 520 */ 521 remove_revmap_chain(kvm, pte_index, rev, v, 522 be64_to_cpu(hpte[1])); 523 } 524 r = rev->guest_rpte & ~HPTE_GR_RESERVED; 525 note_hpte_modification(kvm, rev); 526 unlock_hpte(hpte, 0); 527 528 if (is_mmio_hpte(v, pte_r)) 529 atomic64_inc(&kvm->arch.mmio_update); 530 531 if (v & HPTE_V_ABSENT) 532 v = (v & ~HPTE_V_ABSENT) | HPTE_V_VALID; 533 hpret[0] = v; 534 hpret[1] = r; 535 return H_SUCCESS; 536 } 537 EXPORT_SYMBOL_GPL(kvmppc_do_h_remove); 538 539 long kvmppc_h_remove(struct kvm_vcpu *vcpu, unsigned long flags, 540 unsigned long pte_index, unsigned long avpn) 541 { 542 return kvmppc_do_h_remove(vcpu->kvm, flags, pte_index, avpn, 543 &vcpu->arch.regs.gpr[4]); 544 } 545 546 long kvmppc_h_bulk_remove(struct kvm_vcpu *vcpu) 547 { 548 struct kvm *kvm = vcpu->kvm; 549 unsigned long *args = &vcpu->arch.regs.gpr[4]; 550 __be64 *hp, *hptes[4]; 551 unsigned long tlbrb[4]; 552 long int i, j, k, n, found, indexes[4]; 553 unsigned long flags, req, pte_index, rcbits; 554 int global; 555 long int ret = H_SUCCESS; 556 struct revmap_entry *rev, *revs[4]; 557 u64 hp0, hp1; 558 559 if (kvm_is_radix(kvm)) 560 return H_FUNCTION; 561 global = global_invalidates(kvm); 562 for (i = 0; i < 4 && ret == H_SUCCESS; ) { 563 n = 0; 564 for (; i < 4; ++i) { 565 j = i * 2; 566 pte_index = args[j]; 567 flags = pte_index >> 56; 568 pte_index &= ((1ul << 56) - 1); 569 req = flags >> 6; 570 flags &= 3; 571 if (req == 3) { /* no more requests */ 572 i = 4; 573 break; 574 } 575 if (req != 1 || flags == 3 || 576 pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt)) { 577 /* parameter error */ 578 args[j] = ((0xa0 | flags) << 56) + pte_index; 579 ret = H_PARAMETER; 580 break; 581 } 582 hp = (__be64 *) (kvm->arch.hpt.virt + (pte_index << 4)); 583 /* to avoid deadlock, don't spin except for first */ 584 if (!try_lock_hpte(hp, HPTE_V_HVLOCK)) { 585 if (n) 586 break; 587 while (!try_lock_hpte(hp, HPTE_V_HVLOCK)) 588 cpu_relax(); 589 } 590 found = 0; 591 hp0 = be64_to_cpu(hp[0]); 592 hp1 = be64_to_cpu(hp[1]); 593 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 594 hp0 = hpte_new_to_old_v(hp0, hp1); 595 hp1 = hpte_new_to_old_r(hp1); 596 } 597 if (hp0 & (HPTE_V_ABSENT | HPTE_V_VALID)) { 598 switch (flags & 3) { 599 case 0: /* absolute */ 600 found = 1; 601 break; 602 case 1: /* andcond */ 603 if (!(hp0 & args[j + 1])) 604 found = 1; 605 break; 606 case 2: /* AVPN */ 607 if ((hp0 & ~0x7fUL) == args[j + 1]) 608 found = 1; 609 break; 610 } 611 } 612 if (!found) { 613 hp[0] &= ~cpu_to_be64(HPTE_V_HVLOCK); 614 args[j] = ((0x90 | flags) << 56) + pte_index; 615 continue; 616 } 617 618 args[j] = ((0x80 | flags) << 56) + pte_index; 619 rev = real_vmalloc_addr(&kvm->arch.hpt.rev[pte_index]); 620 note_hpte_modification(kvm, rev); 621 622 if (!(hp0 & HPTE_V_VALID)) { 623 /* insert R and C bits from PTE */ 624 rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C); 625 args[j] |= rcbits << (56 - 5); 626 hp[0] = 0; 627 if (is_mmio_hpte(hp0, hp1)) 628 atomic64_inc(&kvm->arch.mmio_update); 629 continue; 630 } 631 632 /* leave it locked */ 633 hp[0] &= ~cpu_to_be64(HPTE_V_VALID); 634 tlbrb[n] = compute_tlbie_rb(hp0, hp1, pte_index); 635 indexes[n] = j; 636 hptes[n] = hp; 637 revs[n] = rev; 638 ++n; 639 } 640 641 if (!n) 642 break; 643 644 /* Now that we've collected a batch, do the tlbies */ 645 do_tlbies(kvm, tlbrb, n, global, true); 646 647 /* Read PTE low words after tlbie to get final R/C values */ 648 for (k = 0; k < n; ++k) { 649 j = indexes[k]; 650 pte_index = args[j] & ((1ul << 56) - 1); 651 hp = hptes[k]; 652 rev = revs[k]; 653 remove_revmap_chain(kvm, pte_index, rev, 654 be64_to_cpu(hp[0]), be64_to_cpu(hp[1])); 655 rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C); 656 args[j] |= rcbits << (56 - 5); 657 __unlock_hpte(hp, 0); 658 } 659 } 660 661 return ret; 662 } 663 664 long kvmppc_h_protect(struct kvm_vcpu *vcpu, unsigned long flags, 665 unsigned long pte_index, unsigned long avpn) 666 { 667 struct kvm *kvm = vcpu->kvm; 668 __be64 *hpte; 669 struct revmap_entry *rev; 670 unsigned long v, r, rb, mask, bits; 671 u64 pte_v, pte_r; 672 673 if (kvm_is_radix(kvm)) 674 return H_FUNCTION; 675 if (pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt)) 676 return H_PARAMETER; 677 678 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); 679 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) 680 cpu_relax(); 681 v = pte_v = be64_to_cpu(hpte[0]); 682 if (cpu_has_feature(CPU_FTR_ARCH_300)) 683 v = hpte_new_to_old_v(v, be64_to_cpu(hpte[1])); 684 if ((v & (HPTE_V_ABSENT | HPTE_V_VALID)) == 0 || 685 ((flags & H_AVPN) && (v & ~0x7fUL) != avpn)) { 686 __unlock_hpte(hpte, pte_v); 687 return H_NOT_FOUND; 688 } 689 690 pte_r = be64_to_cpu(hpte[1]); 691 bits = (flags << 55) & HPTE_R_PP0; 692 bits |= (flags << 48) & HPTE_R_KEY_HI; 693 bits |= flags & (HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_LO); 694 695 /* Update guest view of 2nd HPTE dword */ 696 mask = HPTE_R_PP0 | HPTE_R_PP | HPTE_R_N | 697 HPTE_R_KEY_HI | HPTE_R_KEY_LO; 698 rev = real_vmalloc_addr(&kvm->arch.hpt.rev[pte_index]); 699 if (rev) { 700 r = (rev->guest_rpte & ~mask) | bits; 701 rev->guest_rpte = r; 702 note_hpte_modification(kvm, rev); 703 } 704 705 /* Update HPTE */ 706 if (v & HPTE_V_VALID) { 707 /* 708 * If the page is valid, don't let it transition from 709 * readonly to writable. If it should be writable, we'll 710 * take a trap and let the page fault code sort it out. 711 */ 712 r = (pte_r & ~mask) | bits; 713 if (hpte_is_writable(r) && !hpte_is_writable(pte_r)) 714 r = hpte_make_readonly(r); 715 /* If the PTE is changing, invalidate it first */ 716 if (r != pte_r) { 717 rb = compute_tlbie_rb(v, r, pte_index); 718 hpte[0] = cpu_to_be64((pte_v & ~HPTE_V_VALID) | 719 HPTE_V_ABSENT); 720 do_tlbies(kvm, &rb, 1, global_invalidates(kvm), true); 721 /* Don't lose R/C bit updates done by hardware */ 722 r |= be64_to_cpu(hpte[1]) & (HPTE_R_R | HPTE_R_C); 723 hpte[1] = cpu_to_be64(r); 724 } 725 } 726 unlock_hpte(hpte, pte_v & ~HPTE_V_HVLOCK); 727 asm volatile("ptesync" : : : "memory"); 728 if (is_mmio_hpte(v, pte_r)) 729 atomic64_inc(&kvm->arch.mmio_update); 730 731 return H_SUCCESS; 732 } 733 734 long kvmppc_h_read(struct kvm_vcpu *vcpu, unsigned long flags, 735 unsigned long pte_index) 736 { 737 struct kvm *kvm = vcpu->kvm; 738 __be64 *hpte; 739 unsigned long v, r; 740 int i, n = 1; 741 struct revmap_entry *rev = NULL; 742 743 if (kvm_is_radix(kvm)) 744 return H_FUNCTION; 745 if (pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt)) 746 return H_PARAMETER; 747 if (flags & H_READ_4) { 748 pte_index &= ~3; 749 n = 4; 750 } 751 rev = real_vmalloc_addr(&kvm->arch.hpt.rev[pte_index]); 752 for (i = 0; i < n; ++i, ++pte_index) { 753 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); 754 v = be64_to_cpu(hpte[0]) & ~HPTE_V_HVLOCK; 755 r = be64_to_cpu(hpte[1]); 756 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 757 v = hpte_new_to_old_v(v, r); 758 r = hpte_new_to_old_r(r); 759 } 760 if (v & HPTE_V_ABSENT) { 761 v &= ~HPTE_V_ABSENT; 762 v |= HPTE_V_VALID; 763 } 764 if (v & HPTE_V_VALID) { 765 r = rev[i].guest_rpte | (r & (HPTE_R_R | HPTE_R_C)); 766 r &= ~HPTE_GR_RESERVED; 767 } 768 vcpu->arch.regs.gpr[4 + i * 2] = v; 769 vcpu->arch.regs.gpr[5 + i * 2] = r; 770 } 771 return H_SUCCESS; 772 } 773 774 long kvmppc_h_clear_ref(struct kvm_vcpu *vcpu, unsigned long flags, 775 unsigned long pte_index) 776 { 777 struct kvm *kvm = vcpu->kvm; 778 __be64 *hpte; 779 unsigned long v, r, gr; 780 struct revmap_entry *rev; 781 unsigned long *rmap; 782 long ret = H_NOT_FOUND; 783 784 if (kvm_is_radix(kvm)) 785 return H_FUNCTION; 786 if (pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt)) 787 return H_PARAMETER; 788 789 rev = real_vmalloc_addr(&kvm->arch.hpt.rev[pte_index]); 790 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); 791 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) 792 cpu_relax(); 793 v = be64_to_cpu(hpte[0]); 794 r = be64_to_cpu(hpte[1]); 795 if (!(v & (HPTE_V_VALID | HPTE_V_ABSENT))) 796 goto out; 797 798 gr = rev->guest_rpte; 799 if (rev->guest_rpte & HPTE_R_R) { 800 rev->guest_rpte &= ~HPTE_R_R; 801 note_hpte_modification(kvm, rev); 802 } 803 if (v & HPTE_V_VALID) { 804 gr |= r & (HPTE_R_R | HPTE_R_C); 805 if (r & HPTE_R_R) { 806 kvmppc_clear_ref_hpte(kvm, hpte, pte_index); 807 rmap = revmap_for_hpte(kvm, v, gr, NULL, NULL); 808 if (rmap) { 809 lock_rmap(rmap); 810 *rmap |= KVMPPC_RMAP_REFERENCED; 811 unlock_rmap(rmap); 812 } 813 } 814 } 815 vcpu->arch.regs.gpr[4] = gr; 816 ret = H_SUCCESS; 817 out: 818 unlock_hpte(hpte, v & ~HPTE_V_HVLOCK); 819 return ret; 820 } 821 822 long kvmppc_h_clear_mod(struct kvm_vcpu *vcpu, unsigned long flags, 823 unsigned long pte_index) 824 { 825 struct kvm *kvm = vcpu->kvm; 826 __be64 *hpte; 827 unsigned long v, r, gr; 828 struct revmap_entry *rev; 829 long ret = H_NOT_FOUND; 830 831 if (kvm_is_radix(kvm)) 832 return H_FUNCTION; 833 if (pte_index >= kvmppc_hpt_npte(&kvm->arch.hpt)) 834 return H_PARAMETER; 835 836 rev = real_vmalloc_addr(&kvm->arch.hpt.rev[pte_index]); 837 hpte = (__be64 *)(kvm->arch.hpt.virt + (pte_index << 4)); 838 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK)) 839 cpu_relax(); 840 v = be64_to_cpu(hpte[0]); 841 r = be64_to_cpu(hpte[1]); 842 if (!(v & (HPTE_V_VALID | HPTE_V_ABSENT))) 843 goto out; 844 845 gr = rev->guest_rpte; 846 if (gr & HPTE_R_C) { 847 rev->guest_rpte &= ~HPTE_R_C; 848 note_hpte_modification(kvm, rev); 849 } 850 if (v & HPTE_V_VALID) { 851 /* need to make it temporarily absent so C is stable */ 852 hpte[0] |= cpu_to_be64(HPTE_V_ABSENT); 853 kvmppc_invalidate_hpte(kvm, hpte, pte_index); 854 r = be64_to_cpu(hpte[1]); 855 gr |= r & (HPTE_R_R | HPTE_R_C); 856 if (r & HPTE_R_C) { 857 hpte[1] = cpu_to_be64(r & ~HPTE_R_C); 858 eieio(); 859 kvmppc_set_dirty_from_hpte(kvm, v, gr); 860 } 861 } 862 vcpu->arch.regs.gpr[4] = gr; 863 ret = H_SUCCESS; 864 out: 865 unlock_hpte(hpte, v & ~HPTE_V_HVLOCK); 866 return ret; 867 } 868 869 static int kvmppc_get_hpa(struct kvm_vcpu *vcpu, unsigned long mmu_seq, 870 unsigned long gpa, int writing, unsigned long *hpa, 871 struct kvm_memory_slot **memslot_p) 872 { 873 struct kvm *kvm = vcpu->kvm; 874 struct kvm_memory_slot *memslot; 875 unsigned long gfn, hva, pa, psize = PAGE_SHIFT; 876 unsigned int shift; 877 pte_t *ptep, pte; 878 879 /* Find the memslot for this address */ 880 gfn = gpa >> PAGE_SHIFT; 881 memslot = __gfn_to_memslot(kvm_memslots_raw(kvm), gfn); 882 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) 883 return H_PARAMETER; 884 885 /* Translate to host virtual address */ 886 hva = __gfn_to_hva_memslot(memslot, gfn); 887 888 /* Try to find the host pte for that virtual address */ 889 ptep = find_kvm_host_pte(kvm, mmu_seq, hva, &shift); 890 if (!ptep) 891 return H_TOO_HARD; 892 pte = kvmppc_read_update_linux_pte(ptep, writing); 893 if (!pte_present(pte)) 894 return H_TOO_HARD; 895 896 /* Convert to a physical address */ 897 if (shift) 898 psize = 1UL << shift; 899 pa = pte_pfn(pte) << PAGE_SHIFT; 900 pa |= hva & (psize - 1); 901 pa |= gpa & ~PAGE_MASK; 902 903 if (hpa) 904 *hpa = pa; 905 if (memslot_p) 906 *memslot_p = memslot; 907 908 return H_SUCCESS; 909 } 910 911 static long kvmppc_do_h_page_init_zero(struct kvm_vcpu *vcpu, 912 unsigned long dest) 913 { 914 struct kvm_memory_slot *memslot; 915 struct kvm *kvm = vcpu->kvm; 916 unsigned long pa, mmu_seq; 917 long ret = H_SUCCESS; 918 int i; 919 920 /* Used later to detect if we might have been invalidated */ 921 mmu_seq = kvm->mmu_notifier_seq; 922 smp_rmb(); 923 924 arch_spin_lock(&kvm->mmu_lock.rlock.raw_lock); 925 926 ret = kvmppc_get_hpa(vcpu, mmu_seq, dest, 1, &pa, &memslot); 927 if (ret != H_SUCCESS) 928 goto out_unlock; 929 930 /* Zero the page */ 931 for (i = 0; i < SZ_4K; i += L1_CACHE_BYTES, pa += L1_CACHE_BYTES) 932 dcbz((void *)pa); 933 kvmppc_update_dirty_map(memslot, dest >> PAGE_SHIFT, PAGE_SIZE); 934 935 out_unlock: 936 arch_spin_unlock(&kvm->mmu_lock.rlock.raw_lock); 937 return ret; 938 } 939 940 static long kvmppc_do_h_page_init_copy(struct kvm_vcpu *vcpu, 941 unsigned long dest, unsigned long src) 942 { 943 unsigned long dest_pa, src_pa, mmu_seq; 944 struct kvm_memory_slot *dest_memslot; 945 struct kvm *kvm = vcpu->kvm; 946 long ret = H_SUCCESS; 947 948 /* Used later to detect if we might have been invalidated */ 949 mmu_seq = kvm->mmu_notifier_seq; 950 smp_rmb(); 951 952 arch_spin_lock(&kvm->mmu_lock.rlock.raw_lock); 953 ret = kvmppc_get_hpa(vcpu, mmu_seq, dest, 1, &dest_pa, &dest_memslot); 954 if (ret != H_SUCCESS) 955 goto out_unlock; 956 957 ret = kvmppc_get_hpa(vcpu, mmu_seq, src, 0, &src_pa, NULL); 958 if (ret != H_SUCCESS) 959 goto out_unlock; 960 961 /* Copy the page */ 962 memcpy((void *)dest_pa, (void *)src_pa, SZ_4K); 963 964 kvmppc_update_dirty_map(dest_memslot, dest >> PAGE_SHIFT, PAGE_SIZE); 965 966 out_unlock: 967 arch_spin_unlock(&kvm->mmu_lock.rlock.raw_lock); 968 return ret; 969 } 970 971 long kvmppc_rm_h_page_init(struct kvm_vcpu *vcpu, unsigned long flags, 972 unsigned long dest, unsigned long src) 973 { 974 struct kvm *kvm = vcpu->kvm; 975 u64 pg_mask = SZ_4K - 1; /* 4K page size */ 976 long ret = H_SUCCESS; 977 978 /* Don't handle radix mode here, go up to the virtual mode handler */ 979 if (kvm_is_radix(kvm)) 980 return H_TOO_HARD; 981 982 /* Check for invalid flags (H_PAGE_SET_LOANED covers all CMO flags) */ 983 if (flags & ~(H_ICACHE_INVALIDATE | H_ICACHE_SYNCHRONIZE | 984 H_ZERO_PAGE | H_COPY_PAGE | H_PAGE_SET_LOANED)) 985 return H_PARAMETER; 986 987 /* dest (and src if copy_page flag set) must be page aligned */ 988 if ((dest & pg_mask) || ((flags & H_COPY_PAGE) && (src & pg_mask))) 989 return H_PARAMETER; 990 991 /* zero and/or copy the page as determined by the flags */ 992 if (flags & H_COPY_PAGE) 993 ret = kvmppc_do_h_page_init_copy(vcpu, dest, src); 994 else if (flags & H_ZERO_PAGE) 995 ret = kvmppc_do_h_page_init_zero(vcpu, dest); 996 997 /* We can ignore the other flags */ 998 999 return ret; 1000 } 1001 1002 void kvmppc_invalidate_hpte(struct kvm *kvm, __be64 *hptep, 1003 unsigned long pte_index) 1004 { 1005 unsigned long rb; 1006 u64 hp0, hp1; 1007 1008 hptep[0] &= ~cpu_to_be64(HPTE_V_VALID); 1009 hp0 = be64_to_cpu(hptep[0]); 1010 hp1 = be64_to_cpu(hptep[1]); 1011 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 1012 hp0 = hpte_new_to_old_v(hp0, hp1); 1013 hp1 = hpte_new_to_old_r(hp1); 1014 } 1015 rb = compute_tlbie_rb(hp0, hp1, pte_index); 1016 do_tlbies(kvm, &rb, 1, 1, true); 1017 } 1018 EXPORT_SYMBOL_GPL(kvmppc_invalidate_hpte); 1019 1020 void kvmppc_clear_ref_hpte(struct kvm *kvm, __be64 *hptep, 1021 unsigned long pte_index) 1022 { 1023 unsigned long rb; 1024 unsigned char rbyte; 1025 u64 hp0, hp1; 1026 1027 hp0 = be64_to_cpu(hptep[0]); 1028 hp1 = be64_to_cpu(hptep[1]); 1029 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 1030 hp0 = hpte_new_to_old_v(hp0, hp1); 1031 hp1 = hpte_new_to_old_r(hp1); 1032 } 1033 rb = compute_tlbie_rb(hp0, hp1, pte_index); 1034 rbyte = (be64_to_cpu(hptep[1]) & ~HPTE_R_R) >> 8; 1035 /* modify only the second-last byte, which contains the ref bit */ 1036 *((char *)hptep + 14) = rbyte; 1037 do_tlbies(kvm, &rb, 1, 1, false); 1038 } 1039 EXPORT_SYMBOL_GPL(kvmppc_clear_ref_hpte); 1040 1041 static int slb_base_page_shift[4] = { 1042 24, /* 16M */ 1043 16, /* 64k */ 1044 34, /* 16G */ 1045 20, /* 1M, unsupported */ 1046 }; 1047 1048 static struct mmio_hpte_cache_entry *mmio_cache_search(struct kvm_vcpu *vcpu, 1049 unsigned long eaddr, unsigned long slb_v, long mmio_update) 1050 { 1051 struct mmio_hpte_cache_entry *entry = NULL; 1052 unsigned int pshift; 1053 unsigned int i; 1054 1055 for (i = 0; i < MMIO_HPTE_CACHE_SIZE; i++) { 1056 entry = &vcpu->arch.mmio_cache.entry[i]; 1057 if (entry->mmio_update == mmio_update) { 1058 pshift = entry->slb_base_pshift; 1059 if ((entry->eaddr >> pshift) == (eaddr >> pshift) && 1060 entry->slb_v == slb_v) 1061 return entry; 1062 } 1063 } 1064 return NULL; 1065 } 1066 1067 static struct mmio_hpte_cache_entry * 1068 next_mmio_cache_entry(struct kvm_vcpu *vcpu) 1069 { 1070 unsigned int index = vcpu->arch.mmio_cache.index; 1071 1072 vcpu->arch.mmio_cache.index++; 1073 if (vcpu->arch.mmio_cache.index == MMIO_HPTE_CACHE_SIZE) 1074 vcpu->arch.mmio_cache.index = 0; 1075 1076 return &vcpu->arch.mmio_cache.entry[index]; 1077 } 1078 1079 /* When called from virtmode, this func should be protected by 1080 * preempt_disable(), otherwise, the holding of HPTE_V_HVLOCK 1081 * can trigger deadlock issue. 1082 */ 1083 long kvmppc_hv_find_lock_hpte(struct kvm *kvm, gva_t eaddr, unsigned long slb_v, 1084 unsigned long valid) 1085 { 1086 unsigned int i; 1087 unsigned int pshift; 1088 unsigned long somask; 1089 unsigned long vsid, hash; 1090 unsigned long avpn; 1091 __be64 *hpte; 1092 unsigned long mask, val; 1093 unsigned long v, r, orig_v; 1094 1095 /* Get page shift, work out hash and AVPN etc. */ 1096 mask = SLB_VSID_B | HPTE_V_AVPN | HPTE_V_SECONDARY; 1097 val = 0; 1098 pshift = 12; 1099 if (slb_v & SLB_VSID_L) { 1100 mask |= HPTE_V_LARGE; 1101 val |= HPTE_V_LARGE; 1102 pshift = slb_base_page_shift[(slb_v & SLB_VSID_LP) >> 4]; 1103 } 1104 if (slb_v & SLB_VSID_B_1T) { 1105 somask = (1UL << 40) - 1; 1106 vsid = (slb_v & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T; 1107 vsid ^= vsid << 25; 1108 } else { 1109 somask = (1UL << 28) - 1; 1110 vsid = (slb_v & ~SLB_VSID_B) >> SLB_VSID_SHIFT; 1111 } 1112 hash = (vsid ^ ((eaddr & somask) >> pshift)) & kvmppc_hpt_mask(&kvm->arch.hpt); 1113 avpn = slb_v & ~(somask >> 16); /* also includes B */ 1114 avpn |= (eaddr & somask) >> 16; 1115 1116 if (pshift >= 24) 1117 avpn &= ~((1UL << (pshift - 16)) - 1); 1118 else 1119 avpn &= ~0x7fUL; 1120 val |= avpn; 1121 1122 for (;;) { 1123 hpte = (__be64 *)(kvm->arch.hpt.virt + (hash << 7)); 1124 1125 for (i = 0; i < 16; i += 2) { 1126 /* Read the PTE racily */ 1127 v = be64_to_cpu(hpte[i]) & ~HPTE_V_HVLOCK; 1128 if (cpu_has_feature(CPU_FTR_ARCH_300)) 1129 v = hpte_new_to_old_v(v, be64_to_cpu(hpte[i+1])); 1130 1131 /* Check valid/absent, hash, segment size and AVPN */ 1132 if (!(v & valid) || (v & mask) != val) 1133 continue; 1134 1135 /* Lock the PTE and read it under the lock */ 1136 while (!try_lock_hpte(&hpte[i], HPTE_V_HVLOCK)) 1137 cpu_relax(); 1138 v = orig_v = be64_to_cpu(hpte[i]) & ~HPTE_V_HVLOCK; 1139 r = be64_to_cpu(hpte[i+1]); 1140 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 1141 v = hpte_new_to_old_v(v, r); 1142 r = hpte_new_to_old_r(r); 1143 } 1144 1145 /* 1146 * Check the HPTE again, including base page size 1147 */ 1148 if ((v & valid) && (v & mask) == val && 1149 kvmppc_hpte_base_page_shift(v, r) == pshift) 1150 /* Return with the HPTE still locked */ 1151 return (hash << 3) + (i >> 1); 1152 1153 __unlock_hpte(&hpte[i], orig_v); 1154 } 1155 1156 if (val & HPTE_V_SECONDARY) 1157 break; 1158 val |= HPTE_V_SECONDARY; 1159 hash = hash ^ kvmppc_hpt_mask(&kvm->arch.hpt); 1160 } 1161 return -1; 1162 } 1163 EXPORT_SYMBOL(kvmppc_hv_find_lock_hpte); 1164 1165 /* 1166 * Called in real mode to check whether an HPTE not found fault 1167 * is due to accessing a paged-out page or an emulated MMIO page, 1168 * or if a protection fault is due to accessing a page that the 1169 * guest wanted read/write access to but which we made read-only. 1170 * Returns a possibly modified status (DSISR) value if not 1171 * (i.e. pass the interrupt to the guest), 1172 * -1 to pass the fault up to host kernel mode code, -2 to do that 1173 * and also load the instruction word (for MMIO emulation), 1174 * or 0 if we should make the guest retry the access. 1175 */ 1176 long kvmppc_hpte_hv_fault(struct kvm_vcpu *vcpu, unsigned long addr, 1177 unsigned long slb_v, unsigned int status, bool data) 1178 { 1179 struct kvm *kvm = vcpu->kvm; 1180 long int index; 1181 unsigned long v, r, gr, orig_v; 1182 __be64 *hpte; 1183 unsigned long valid; 1184 struct revmap_entry *rev; 1185 unsigned long pp, key; 1186 struct mmio_hpte_cache_entry *cache_entry = NULL; 1187 long mmio_update = 0; 1188 1189 /* For protection fault, expect to find a valid HPTE */ 1190 valid = HPTE_V_VALID; 1191 if (status & DSISR_NOHPTE) { 1192 valid |= HPTE_V_ABSENT; 1193 mmio_update = atomic64_read(&kvm->arch.mmio_update); 1194 cache_entry = mmio_cache_search(vcpu, addr, slb_v, mmio_update); 1195 } 1196 if (cache_entry) { 1197 index = cache_entry->pte_index; 1198 v = cache_entry->hpte_v; 1199 r = cache_entry->hpte_r; 1200 gr = cache_entry->rpte; 1201 } else { 1202 index = kvmppc_hv_find_lock_hpte(kvm, addr, slb_v, valid); 1203 if (index < 0) { 1204 if (status & DSISR_NOHPTE) 1205 return status; /* there really was no HPTE */ 1206 return 0; /* for prot fault, HPTE disappeared */ 1207 } 1208 hpte = (__be64 *)(kvm->arch.hpt.virt + (index << 4)); 1209 v = orig_v = be64_to_cpu(hpte[0]) & ~HPTE_V_HVLOCK; 1210 r = be64_to_cpu(hpte[1]); 1211 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 1212 v = hpte_new_to_old_v(v, r); 1213 r = hpte_new_to_old_r(r); 1214 } 1215 rev = real_vmalloc_addr(&kvm->arch.hpt.rev[index]); 1216 gr = rev->guest_rpte; 1217 1218 unlock_hpte(hpte, orig_v); 1219 } 1220 1221 /* For not found, if the HPTE is valid by now, retry the instruction */ 1222 if ((status & DSISR_NOHPTE) && (v & HPTE_V_VALID)) 1223 return 0; 1224 1225 /* Check access permissions to the page */ 1226 pp = gr & (HPTE_R_PP0 | HPTE_R_PP); 1227 key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS; 1228 status &= ~DSISR_NOHPTE; /* DSISR_NOHPTE == SRR1_ISI_NOPT */ 1229 if (!data) { 1230 if (gr & (HPTE_R_N | HPTE_R_G)) 1231 return status | SRR1_ISI_N_G_OR_CIP; 1232 if (!hpte_read_permission(pp, slb_v & key)) 1233 return status | SRR1_ISI_PROT; 1234 } else if (status & DSISR_ISSTORE) { 1235 /* check write permission */ 1236 if (!hpte_write_permission(pp, slb_v & key)) 1237 return status | DSISR_PROTFAULT; 1238 } else { 1239 if (!hpte_read_permission(pp, slb_v & key)) 1240 return status | DSISR_PROTFAULT; 1241 } 1242 1243 /* Check storage key, if applicable */ 1244 if (data && (vcpu->arch.shregs.msr & MSR_DR)) { 1245 unsigned int perm = hpte_get_skey_perm(gr, vcpu->arch.amr); 1246 if (status & DSISR_ISSTORE) 1247 perm >>= 1; 1248 if (perm & 1) 1249 return status | DSISR_KEYFAULT; 1250 } 1251 1252 /* Save HPTE info for virtual-mode handler */ 1253 vcpu->arch.pgfault_addr = addr; 1254 vcpu->arch.pgfault_index = index; 1255 vcpu->arch.pgfault_hpte[0] = v; 1256 vcpu->arch.pgfault_hpte[1] = r; 1257 vcpu->arch.pgfault_cache = cache_entry; 1258 1259 /* Check the storage key to see if it is possibly emulated MMIO */ 1260 if ((r & (HPTE_R_KEY_HI | HPTE_R_KEY_LO)) == 1261 (HPTE_R_KEY_HI | HPTE_R_KEY_LO)) { 1262 if (!cache_entry) { 1263 unsigned int pshift = 12; 1264 unsigned int pshift_index; 1265 1266 if (slb_v & SLB_VSID_L) { 1267 pshift_index = ((slb_v & SLB_VSID_LP) >> 4); 1268 pshift = slb_base_page_shift[pshift_index]; 1269 } 1270 cache_entry = next_mmio_cache_entry(vcpu); 1271 cache_entry->eaddr = addr; 1272 cache_entry->slb_base_pshift = pshift; 1273 cache_entry->pte_index = index; 1274 cache_entry->hpte_v = v; 1275 cache_entry->hpte_r = r; 1276 cache_entry->rpte = gr; 1277 cache_entry->slb_v = slb_v; 1278 cache_entry->mmio_update = mmio_update; 1279 } 1280 if (data && (vcpu->arch.shregs.msr & MSR_IR)) 1281 return -2; /* MMIO emulation - load instr word */ 1282 } 1283 1284 return -1; /* send fault up to host kernel mode */ 1285 } 1286