1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License, version 2, as 4 * published by the Free Software Foundation. 5 * 6 * Copyright 2012 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 7 */ 8 9 #include <linux/types.h> 10 #include <linux/string.h> 11 #include <linux/kvm.h> 12 #include <linux/kvm_host.h> 13 #include <linux/kernel.h> 14 #include <asm/opal.h> 15 #include <asm/mce.h> 16 #include <asm/machdep.h> 17 #include <asm/cputhreads.h> 18 #include <asm/hmi.h> 19 #include <asm/kvm_ppc.h> 20 21 /* SRR1 bits for machine check on POWER7 */ 22 #define SRR1_MC_LDSTERR (1ul << (63-42)) 23 #define SRR1_MC_IFETCH_SH (63-45) 24 #define SRR1_MC_IFETCH_MASK 0x7 25 #define SRR1_MC_IFETCH_SLBPAR 2 /* SLB parity error */ 26 #define SRR1_MC_IFETCH_SLBMULTI 3 /* SLB multi-hit */ 27 #define SRR1_MC_IFETCH_SLBPARMULTI 4 /* SLB parity + multi-hit */ 28 #define SRR1_MC_IFETCH_TLBMULTI 5 /* I-TLB multi-hit */ 29 30 /* DSISR bits for machine check on POWER7 */ 31 #define DSISR_MC_DERAT_MULTI 0x800 /* D-ERAT multi-hit */ 32 #define DSISR_MC_TLB_MULTI 0x400 /* D-TLB multi-hit */ 33 #define DSISR_MC_SLB_PARITY 0x100 /* SLB parity error */ 34 #define DSISR_MC_SLB_MULTI 0x080 /* SLB multi-hit */ 35 #define DSISR_MC_SLB_PARMULTI 0x040 /* SLB parity + multi-hit */ 36 37 /* POWER7 SLB flush and reload */ 38 static void reload_slb(struct kvm_vcpu *vcpu) 39 { 40 struct slb_shadow *slb; 41 unsigned long i, n; 42 43 /* First clear out SLB */ 44 asm volatile("slbmte %0,%0; slbia" : : "r" (0)); 45 46 /* Do they have an SLB shadow buffer registered? */ 47 slb = vcpu->arch.slb_shadow.pinned_addr; 48 if (!slb) 49 return; 50 51 /* Sanity check */ 52 n = min_t(u32, be32_to_cpu(slb->persistent), SLB_MIN_SIZE); 53 if ((void *) &slb->save_area[n] > vcpu->arch.slb_shadow.pinned_end) 54 return; 55 56 /* Load up the SLB from that */ 57 for (i = 0; i < n; ++i) { 58 unsigned long rb = be64_to_cpu(slb->save_area[i].esid); 59 unsigned long rs = be64_to_cpu(slb->save_area[i].vsid); 60 61 rb = (rb & ~0xFFFul) | i; /* insert entry number */ 62 asm volatile("slbmte %0,%1" : : "r" (rs), "r" (rb)); 63 } 64 } 65 66 /* 67 * On POWER7, see if we can handle a machine check that occurred inside 68 * the guest in real mode, without switching to the host partition. 69 */ 70 static void kvmppc_realmode_mc_power7(struct kvm_vcpu *vcpu) 71 { 72 unsigned long srr1 = vcpu->arch.shregs.msr; 73 struct machine_check_event mce_evt; 74 long handled = 1; 75 76 if (srr1 & SRR1_MC_LDSTERR) { 77 /* error on load/store */ 78 unsigned long dsisr = vcpu->arch.shregs.dsisr; 79 80 if (dsisr & (DSISR_MC_SLB_PARMULTI | DSISR_MC_SLB_MULTI | 81 DSISR_MC_SLB_PARITY | DSISR_MC_DERAT_MULTI)) { 82 /* flush and reload SLB; flushes D-ERAT too */ 83 reload_slb(vcpu); 84 dsisr &= ~(DSISR_MC_SLB_PARMULTI | DSISR_MC_SLB_MULTI | 85 DSISR_MC_SLB_PARITY | DSISR_MC_DERAT_MULTI); 86 } 87 if (dsisr & DSISR_MC_TLB_MULTI) { 88 tlbiel_all_lpid(vcpu->kvm->arch.radix); 89 dsisr &= ~DSISR_MC_TLB_MULTI; 90 } 91 /* Any other errors we don't understand? */ 92 if (dsisr & 0xffffffffUL) 93 handled = 0; 94 } 95 96 switch ((srr1 >> SRR1_MC_IFETCH_SH) & SRR1_MC_IFETCH_MASK) { 97 case 0: 98 break; 99 case SRR1_MC_IFETCH_SLBPAR: 100 case SRR1_MC_IFETCH_SLBMULTI: 101 case SRR1_MC_IFETCH_SLBPARMULTI: 102 reload_slb(vcpu); 103 break; 104 case SRR1_MC_IFETCH_TLBMULTI: 105 tlbiel_all_lpid(vcpu->kvm->arch.radix); 106 break; 107 default: 108 handled = 0; 109 } 110 111 /* 112 * Now get the event and stash it in the vcpu struct so it can 113 * be handled by the primary thread in virtual mode. We can't 114 * call machine_check_queue_event() here if we are running on 115 * an offline secondary thread. 116 */ 117 if (get_mce_event(&mce_evt, MCE_EVENT_RELEASE)) { 118 if (handled && mce_evt.version == MCE_V1) 119 mce_evt.disposition = MCE_DISPOSITION_RECOVERED; 120 } else { 121 memset(&mce_evt, 0, sizeof(mce_evt)); 122 } 123 124 vcpu->arch.mce_evt = mce_evt; 125 } 126 127 void kvmppc_realmode_machine_check(struct kvm_vcpu *vcpu) 128 { 129 kvmppc_realmode_mc_power7(vcpu); 130 } 131 132 /* Check if dynamic split is in force and return subcore size accordingly. */ 133 static inline int kvmppc_cur_subcore_size(void) 134 { 135 if (local_paca->kvm_hstate.kvm_split_mode) 136 return local_paca->kvm_hstate.kvm_split_mode->subcore_size; 137 138 return threads_per_subcore; 139 } 140 141 void kvmppc_subcore_enter_guest(void) 142 { 143 int thread_id, subcore_id; 144 145 thread_id = cpu_thread_in_core(local_paca->paca_index); 146 subcore_id = thread_id / kvmppc_cur_subcore_size(); 147 148 local_paca->sibling_subcore_state->in_guest[subcore_id] = 1; 149 } 150 EXPORT_SYMBOL_GPL(kvmppc_subcore_enter_guest); 151 152 void kvmppc_subcore_exit_guest(void) 153 { 154 int thread_id, subcore_id; 155 156 thread_id = cpu_thread_in_core(local_paca->paca_index); 157 subcore_id = thread_id / kvmppc_cur_subcore_size(); 158 159 local_paca->sibling_subcore_state->in_guest[subcore_id] = 0; 160 } 161 EXPORT_SYMBOL_GPL(kvmppc_subcore_exit_guest); 162 163 static bool kvmppc_tb_resync_required(void) 164 { 165 if (test_and_set_bit(CORE_TB_RESYNC_REQ_BIT, 166 &local_paca->sibling_subcore_state->flags)) 167 return false; 168 169 return true; 170 } 171 172 static void kvmppc_tb_resync_done(void) 173 { 174 clear_bit(CORE_TB_RESYNC_REQ_BIT, 175 &local_paca->sibling_subcore_state->flags); 176 } 177 178 /* 179 * kvmppc_realmode_hmi_handler() is called only by primary thread during 180 * guest exit path. 181 * 182 * There are multiple reasons why HMI could occur, one of them is 183 * Timebase (TB) error. If this HMI is due to TB error, then TB would 184 * have been in stopped state. The opal hmi handler Will fix it and 185 * restore the TB value with host timebase value. For HMI caused due 186 * to non-TB errors, opal hmi handler will not touch/restore TB register 187 * and hence there won't be any change in TB value. 188 * 189 * Since we are not sure about the cause of this HMI, we can't be sure 190 * about the content of TB register whether it holds guest or host timebase 191 * value. Hence the idea is to resync the TB on every HMI, so that we 192 * know about the exact state of the TB value. Resync TB call will 193 * restore TB to host timebase. 194 * 195 * Things to consider: 196 * - On TB error, HMI interrupt is reported on all the threads of the core 197 * that has encountered TB error irrespective of split-core mode. 198 * - The very first thread on the core that get chance to fix TB error 199 * would rsync the TB with local chipTOD value. 200 * - The resync TB is a core level action i.e. it will sync all the TBs 201 * in that core independent of split-core mode. This means if we trigger 202 * TB sync from a thread from one subcore, it would affect TB values of 203 * sibling subcores of the same core. 204 * 205 * All threads need to co-ordinate before making opal hmi handler. 206 * All threads will use sibling_subcore_state->in_guest[] (shared by all 207 * threads in the core) in paca which holds information about whether 208 * sibling subcores are in Guest mode or host mode. The in_guest[] array 209 * is of size MAX_SUBCORE_PER_CORE=4, indexed using subcore id to set/unset 210 * subcore status. Only primary threads from each subcore is responsible 211 * to set/unset its designated array element while entering/exiting the 212 * guset. 213 * 214 * After invoking opal hmi handler call, one of the thread (of entire core) 215 * will need to resync the TB. Bit 63 from subcore state bitmap flags 216 * (sibling_subcore_state->flags) will be used to co-ordinate between 217 * primary threads to decide who takes up the responsibility. 218 * 219 * This is what we do: 220 * - Primary thread from each subcore tries to set resync required bit[63] 221 * of paca->sibling_subcore_state->flags. 222 * - The first primary thread that is able to set the flag takes the 223 * responsibility of TB resync. (Let us call it as thread leader) 224 * - All other threads which are in host will call 225 * wait_for_subcore_guest_exit() and wait for in_guest[0-3] from 226 * paca->sibling_subcore_state to get cleared. 227 * - All the primary thread will clear its subcore status from subcore 228 * state in_guest[] array respectively. 229 * - Once all primary threads clear in_guest[0-3], all of them will invoke 230 * opal hmi handler. 231 * - Now all threads will wait for TB resync to complete by invoking 232 * wait_for_tb_resync() except the thread leader. 233 * - Thread leader will do a TB resync by invoking opal_resync_timebase() 234 * call and the it will clear the resync required bit. 235 * - All other threads will now come out of resync wait loop and proceed 236 * with individual execution. 237 * - On return of this function, primary thread will signal all 238 * secondary threads to proceed. 239 * - All secondary threads will eventually call opal hmi handler on 240 * their exit path. 241 * 242 * Returns 1 if the timebase offset should be applied, 0 if not. 243 */ 244 245 long kvmppc_realmode_hmi_handler(void) 246 { 247 bool resync_req; 248 249 __this_cpu_inc(irq_stat.hmi_exceptions); 250 251 if (hmi_handle_debugtrig(NULL) >= 0) 252 return 1; 253 254 /* 255 * By now primary thread has already completed guest->host 256 * partition switch but haven't signaled secondaries yet. 257 * All the secondary threads on this subcore is waiting 258 * for primary thread to signal them to go ahead. 259 * 260 * For threads from subcore which isn't in guest, they all will 261 * wait until all other subcores on this core exit the guest. 262 * 263 * Now set the resync required bit. If you are the first to 264 * set this bit then kvmppc_tb_resync_required() function will 265 * return true. For rest all other subcores 266 * kvmppc_tb_resync_required() will return false. 267 * 268 * If resync_req == true, then this thread is responsible to 269 * initiate TB resync after hmi handler has completed. 270 * All other threads on this core will wait until this thread 271 * clears the resync required bit flag. 272 */ 273 resync_req = kvmppc_tb_resync_required(); 274 275 /* Reset the subcore status to indicate it has exited guest */ 276 kvmppc_subcore_exit_guest(); 277 278 /* 279 * Wait for other subcores on this core to exit the guest. 280 * All the primary threads and threads from subcore that are 281 * not in guest will wait here until all subcores are out 282 * of guest context. 283 */ 284 wait_for_subcore_guest_exit(); 285 286 /* 287 * At this point we are sure that primary threads from each 288 * subcore on this core have completed guest->host partition 289 * switch. Now it is safe to call HMI handler. 290 */ 291 if (ppc_md.hmi_exception_early) 292 ppc_md.hmi_exception_early(NULL); 293 294 /* 295 * Check if this thread is responsible to resync TB. 296 * All other threads will wait until this thread completes the 297 * TB resync. 298 */ 299 if (resync_req) { 300 opal_resync_timebase(); 301 /* Reset TB resync req bit */ 302 kvmppc_tb_resync_done(); 303 } else { 304 wait_for_tb_resync(); 305 } 306 307 /* 308 * Reset tb_offset_applied so the guest exit code won't try 309 * to subtract the previous timebase offset from the timebase. 310 */ 311 if (local_paca->kvm_hstate.kvm_vcore) 312 local_paca->kvm_hstate.kvm_vcore->tb_offset_applied = 0; 313 314 return 0; 315 } 316