1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14 *
15 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
16 *
17 * Derived from book3s_interrupts.S, which is:
18 * Copyright SUSE Linux Products GmbH 2009
19 *
20 * Authors: Alexander Graf <agraf@suse.de>
21 */
22
23#include <asm/ppc_asm.h>
24#include <asm/kvm_asm.h>
25#include <asm/reg.h>
26#include <asm/page.h>
27#include <asm/asm-offsets.h>
28#include <asm/exception-64s.h>
29#include <asm/ppc-opcode.h>
30
31/*****************************************************************************
32 *                                                                           *
33 *     Guest entry / exit code that is in kernel module memory (vmalloc)     *
34 *                                                                           *
35 ****************************************************************************/
36
37/* Registers:
38 *  none
39 */
40_GLOBAL(__kvmppc_vcore_entry)
41
42	/* Write correct stack frame */
43	mflr	r0
44	std	r0,PPC_LR_STKOFF(r1)
45
46	/* Save host state to the stack */
47	stdu	r1, -SWITCH_FRAME_SIZE(r1)
48
49	/* Save non-volatile registers (r14 - r31) and CR */
50	SAVE_NVGPRS(r1)
51	mfcr	r3
52	std	r3, _CCR(r1)
53
54	/* Save host DSCR */
55	mfspr	r3, SPRN_DSCR
56	std	r3, HSTATE_DSCR(r13)
57
58BEGIN_FTR_SECTION
59	/* Save host DABR */
60	mfspr	r3, SPRN_DABR
61	std	r3, HSTATE_DABR(r13)
62END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
63
64	/* Save host PMU registers */
65BEGIN_FTR_SECTION
66	/* Work around P8 PMAE bug */
67	li	r3, -1
68	clrrdi	r3, r3, 10
69	mfspr	r8, SPRN_MMCR2
70	mtspr	SPRN_MMCR2, r3		/* freeze all counters using MMCR2 */
71	isync
72END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
73	li	r3, 1
74	sldi	r3, r3, 31		/* MMCR0_FC (freeze counters) bit */
75	mfspr	r7, SPRN_MMCR0		/* save MMCR0 */
76	mtspr	SPRN_MMCR0, r3		/* freeze all counters, disable interrupts */
77	mfspr	r6, SPRN_MMCRA
78	/* Clear MMCRA in order to disable SDAR updates */
79	li	r5, 0
80	mtspr	SPRN_MMCRA, r5
81	isync
82	ld	r3, PACALPPACAPTR(r13)	/* is the host using the PMU? */
83	lbz	r5, LPPACA_PMCINUSE(r3)
84	cmpwi	r5, 0
85	beq	31f			/* skip if not */
86	mfspr	r5, SPRN_MMCR1
87	mfspr	r9, SPRN_SIAR
88	mfspr	r10, SPRN_SDAR
89	std	r7, HSTATE_MMCR0(r13)
90	std	r5, HSTATE_MMCR1(r13)
91	std	r6, HSTATE_MMCRA(r13)
92	std	r9, HSTATE_SIAR(r13)
93	std	r10, HSTATE_SDAR(r13)
94BEGIN_FTR_SECTION
95	mfspr	r9, SPRN_SIER
96	std	r8, HSTATE_MMCR2(r13)
97	std	r9, HSTATE_SIER(r13)
98END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
99	mfspr	r3, SPRN_PMC1
100	mfspr	r5, SPRN_PMC2
101	mfspr	r6, SPRN_PMC3
102	mfspr	r7, SPRN_PMC4
103	mfspr	r8, SPRN_PMC5
104	mfspr	r9, SPRN_PMC6
105	stw	r3, HSTATE_PMC1(r13)
106	stw	r5, HSTATE_PMC2(r13)
107	stw	r6, HSTATE_PMC3(r13)
108	stw	r7, HSTATE_PMC4(r13)
109	stw	r8, HSTATE_PMC5(r13)
110	stw	r9, HSTATE_PMC6(r13)
11131:
112
113	/*
114	 * Put whatever is in the decrementer into the
115	 * hypervisor decrementer.
116	 */
117BEGIN_FTR_SECTION
118	ld	r5, HSTATE_KVM_VCORE(r13)
119	ld	r6, VCORE_KVM(r5)
120	ld	r9, KVM_HOST_LPCR(r6)
121	andis.	r9, r9, LPCR_LD@h
122END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
123	mfspr	r8,SPRN_DEC
124	mftb	r7
125BEGIN_FTR_SECTION
126	/* On POWER9, don't sign-extend if host LPCR[LD] bit is set */
127	bne	32f
128END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
129	extsw	r8,r8
13032:	mtspr	SPRN_HDEC,r8
131	add	r8,r8,r7
132	std	r8,HSTATE_DECEXP(r13)
133
134	/* Jump to partition switch code */
135	bl	kvmppc_hv_entry_trampoline
136	nop
137
138/*
139 * We return here in virtual mode after the guest exits
140 * with something that we can't handle in real mode.
141 * Interrupts are enabled again at this point.
142 */
143
144	/*
145	 * Register usage at this point:
146	 *
147	 * R1       = host R1
148	 * R2       = host R2
149	 * R3       = trap number on this thread
150	 * R12      = exit handler id
151	 * R13      = PACA
152	 */
153
154	/* Restore non-volatile host registers (r14 - r31) and CR */
155	REST_NVGPRS(r1)
156	ld	r4, _CCR(r1)
157	mtcr	r4
158
159	addi    r1, r1, SWITCH_FRAME_SIZE
160	ld	r0, PPC_LR_STKOFF(r1)
161	mtlr	r0
162	blr
163