1 /* 2 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License, version 2, as 6 * published by the Free Software Foundation. 7 */ 8 9 #include <linux/cpu.h> 10 #include <linux/kvm_host.h> 11 #include <linux/preempt.h> 12 #include <linux/export.h> 13 #include <linux/sched.h> 14 #include <linux/spinlock.h> 15 #include <linux/init.h> 16 #include <linux/memblock.h> 17 #include <linux/sizes.h> 18 #include <linux/cma.h> 19 #include <linux/bitops.h> 20 21 #include <asm/cputable.h> 22 #include <asm/kvm_ppc.h> 23 #include <asm/kvm_book3s.h> 24 #include <asm/archrandom.h> 25 #include <asm/xics.h> 26 #include <asm/xive.h> 27 #include <asm/dbell.h> 28 #include <asm/cputhreads.h> 29 #include <asm/io.h> 30 #include <asm/opal.h> 31 #include <asm/smp.h> 32 33 #define KVM_CMA_CHUNK_ORDER 18 34 35 /* 36 * Hash page table alignment on newer cpus(CPU_FTR_ARCH_206) 37 * should be power of 2. 38 */ 39 #define HPT_ALIGN_PAGES ((1 << 18) >> PAGE_SHIFT) /* 256k */ 40 /* 41 * By default we reserve 5% of memory for hash pagetable allocation. 42 */ 43 static unsigned long kvm_cma_resv_ratio = 5; 44 45 static struct cma *kvm_cma; 46 47 static int __init early_parse_kvm_cma_resv(char *p) 48 { 49 pr_debug("%s(%s)\n", __func__, p); 50 if (!p) 51 return -EINVAL; 52 return kstrtoul(p, 0, &kvm_cma_resv_ratio); 53 } 54 early_param("kvm_cma_resv_ratio", early_parse_kvm_cma_resv); 55 56 struct page *kvm_alloc_hpt_cma(unsigned long nr_pages) 57 { 58 VM_BUG_ON(order_base_2(nr_pages) < KVM_CMA_CHUNK_ORDER - PAGE_SHIFT); 59 60 return cma_alloc(kvm_cma, nr_pages, order_base_2(HPT_ALIGN_PAGES), 61 GFP_KERNEL); 62 } 63 EXPORT_SYMBOL_GPL(kvm_alloc_hpt_cma); 64 65 void kvm_free_hpt_cma(struct page *page, unsigned long nr_pages) 66 { 67 cma_release(kvm_cma, page, nr_pages); 68 } 69 EXPORT_SYMBOL_GPL(kvm_free_hpt_cma); 70 71 /** 72 * kvm_cma_reserve() - reserve area for kvm hash pagetable 73 * 74 * This function reserves memory from early allocator. It should be 75 * called by arch specific code once the memblock allocator 76 * has been activated and all other subsystems have already allocated/reserved 77 * memory. 78 */ 79 void __init kvm_cma_reserve(void) 80 { 81 unsigned long align_size; 82 struct memblock_region *reg; 83 phys_addr_t selected_size = 0; 84 85 /* 86 * We need CMA reservation only when we are in HV mode 87 */ 88 if (!cpu_has_feature(CPU_FTR_HVMODE)) 89 return; 90 /* 91 * We cannot use memblock_phys_mem_size() here, because 92 * memblock_analyze() has not been called yet. 93 */ 94 for_each_memblock(memory, reg) 95 selected_size += memblock_region_memory_end_pfn(reg) - 96 memblock_region_memory_base_pfn(reg); 97 98 selected_size = (selected_size * kvm_cma_resv_ratio / 100) << PAGE_SHIFT; 99 if (selected_size) { 100 pr_debug("%s: reserving %ld MiB for global area\n", __func__, 101 (unsigned long)selected_size / SZ_1M); 102 align_size = HPT_ALIGN_PAGES << PAGE_SHIFT; 103 cma_declare_contiguous(0, selected_size, 0, align_size, 104 KVM_CMA_CHUNK_ORDER - PAGE_SHIFT, false, "kvm_cma", 105 &kvm_cma); 106 } 107 } 108 109 /* 110 * Real-mode H_CONFER implementation. 111 * We check if we are the only vcpu out of this virtual core 112 * still running in the guest and not ceded. If so, we pop up 113 * to the virtual-mode implementation; if not, just return to 114 * the guest. 115 */ 116 long int kvmppc_rm_h_confer(struct kvm_vcpu *vcpu, int target, 117 unsigned int yield_count) 118 { 119 struct kvmppc_vcore *vc = local_paca->kvm_hstate.kvm_vcore; 120 int ptid = local_paca->kvm_hstate.ptid; 121 int threads_running; 122 int threads_ceded; 123 int threads_conferring; 124 u64 stop = get_tb() + 10 * tb_ticks_per_usec; 125 int rv = H_SUCCESS; /* => don't yield */ 126 127 set_bit(ptid, &vc->conferring_threads); 128 while ((get_tb() < stop) && !VCORE_IS_EXITING(vc)) { 129 threads_running = VCORE_ENTRY_MAP(vc); 130 threads_ceded = vc->napping_threads; 131 threads_conferring = vc->conferring_threads; 132 if ((threads_ceded | threads_conferring) == threads_running) { 133 rv = H_TOO_HARD; /* => do yield */ 134 break; 135 } 136 } 137 clear_bit(ptid, &vc->conferring_threads); 138 return rv; 139 } 140 141 /* 142 * When running HV mode KVM we need to block certain operations while KVM VMs 143 * exist in the system. We use a counter of VMs to track this. 144 * 145 * One of the operations we need to block is onlining of secondaries, so we 146 * protect hv_vm_count with get/put_online_cpus(). 147 */ 148 static atomic_t hv_vm_count; 149 150 void kvm_hv_vm_activated(void) 151 { 152 get_online_cpus(); 153 atomic_inc(&hv_vm_count); 154 put_online_cpus(); 155 } 156 EXPORT_SYMBOL_GPL(kvm_hv_vm_activated); 157 158 void kvm_hv_vm_deactivated(void) 159 { 160 get_online_cpus(); 161 atomic_dec(&hv_vm_count); 162 put_online_cpus(); 163 } 164 EXPORT_SYMBOL_GPL(kvm_hv_vm_deactivated); 165 166 bool kvm_hv_mode_active(void) 167 { 168 return atomic_read(&hv_vm_count) != 0; 169 } 170 171 extern int hcall_real_table[], hcall_real_table_end[]; 172 173 int kvmppc_hcall_impl_hv_realmode(unsigned long cmd) 174 { 175 cmd /= 4; 176 if (cmd < hcall_real_table_end - hcall_real_table && 177 hcall_real_table[cmd]) 178 return 1; 179 180 return 0; 181 } 182 EXPORT_SYMBOL_GPL(kvmppc_hcall_impl_hv_realmode); 183 184 int kvmppc_hwrng_present(void) 185 { 186 return powernv_hwrng_present(); 187 } 188 EXPORT_SYMBOL_GPL(kvmppc_hwrng_present); 189 190 long kvmppc_h_random(struct kvm_vcpu *vcpu) 191 { 192 if (powernv_get_random_real_mode(&vcpu->arch.gpr[4])) 193 return H_SUCCESS; 194 195 return H_HARDWARE; 196 } 197 198 /* 199 * Send an interrupt or message to another CPU. 200 * The caller needs to include any barrier needed to order writes 201 * to memory vs. the IPI/message. 202 */ 203 void kvmhv_rm_send_ipi(int cpu) 204 { 205 void __iomem *xics_phys; 206 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 207 208 /* On POWER9 we can use msgsnd for any destination cpu. */ 209 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 210 msg |= get_hard_smp_processor_id(cpu); 211 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 212 return; 213 } 214 /* On POWER8 for IPIs to threads in the same core, use msgsnd. */ 215 if (cpu_has_feature(CPU_FTR_ARCH_207S) && 216 cpu_first_thread_sibling(cpu) == 217 cpu_first_thread_sibling(raw_smp_processor_id())) { 218 msg |= cpu_thread_in_core(cpu); 219 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 220 return; 221 } 222 223 /* We should never reach this */ 224 if (WARN_ON_ONCE(xive_enabled())) 225 return; 226 227 /* Else poke the target with an IPI */ 228 xics_phys = paca[cpu].kvm_hstate.xics_phys; 229 if (xics_phys) 230 __raw_rm_writeb(IPI_PRIORITY, xics_phys + XICS_MFRR); 231 else 232 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY); 233 } 234 235 /* 236 * The following functions are called from the assembly code 237 * in book3s_hv_rmhandlers.S. 238 */ 239 static void kvmhv_interrupt_vcore(struct kvmppc_vcore *vc, int active) 240 { 241 int cpu = vc->pcpu; 242 243 /* Order setting of exit map vs. msgsnd/IPI */ 244 smp_mb(); 245 for (; active; active >>= 1, ++cpu) 246 if (active & 1) 247 kvmhv_rm_send_ipi(cpu); 248 } 249 250 void kvmhv_commence_exit(int trap) 251 { 252 struct kvmppc_vcore *vc = local_paca->kvm_hstate.kvm_vcore; 253 int ptid = local_paca->kvm_hstate.ptid; 254 struct kvm_split_mode *sip = local_paca->kvm_hstate.kvm_split_mode; 255 int me, ee, i; 256 257 /* Set our bit in the threads-exiting-guest map in the 0xff00 258 bits of vcore->entry_exit_map */ 259 me = 0x100 << ptid; 260 do { 261 ee = vc->entry_exit_map; 262 } while (cmpxchg(&vc->entry_exit_map, ee, ee | me) != ee); 263 264 /* Are we the first here? */ 265 if ((ee >> 8) != 0) 266 return; 267 268 /* 269 * Trigger the other threads in this vcore to exit the guest. 270 * If this is a hypervisor decrementer interrupt then they 271 * will be already on their way out of the guest. 272 */ 273 if (trap != BOOK3S_INTERRUPT_HV_DECREMENTER) 274 kvmhv_interrupt_vcore(vc, ee & ~(1 << ptid)); 275 276 /* 277 * If we are doing dynamic micro-threading, interrupt the other 278 * subcores to pull them out of their guests too. 279 */ 280 if (!sip) 281 return; 282 283 for (i = 0; i < MAX_SUBCORES; ++i) { 284 vc = sip->master_vcs[i]; 285 if (!vc) 286 break; 287 do { 288 ee = vc->entry_exit_map; 289 /* Already asked to exit? */ 290 if ((ee >> 8) != 0) 291 break; 292 } while (cmpxchg(&vc->entry_exit_map, ee, 293 ee | VCORE_EXIT_REQ) != ee); 294 if ((ee >> 8) == 0) 295 kvmhv_interrupt_vcore(vc, ee); 296 } 297 } 298 299 struct kvmppc_host_rm_ops *kvmppc_host_rm_ops_hv; 300 EXPORT_SYMBOL_GPL(kvmppc_host_rm_ops_hv); 301 302 #ifdef CONFIG_KVM_XICS 303 static struct kvmppc_irq_map *get_irqmap(struct kvmppc_passthru_irqmap *pimap, 304 u32 xisr) 305 { 306 int i; 307 308 /* 309 * We access the mapped array here without a lock. That 310 * is safe because we never reduce the number of entries 311 * in the array and we never change the v_hwirq field of 312 * an entry once it is set. 313 * 314 * We have also carefully ordered the stores in the writer 315 * and the loads here in the reader, so that if we find a matching 316 * hwirq here, the associated GSI and irq_desc fields are valid. 317 */ 318 for (i = 0; i < pimap->n_mapped; i++) { 319 if (xisr == pimap->mapped[i].r_hwirq) { 320 /* 321 * Order subsequent reads in the caller to serialize 322 * with the writer. 323 */ 324 smp_rmb(); 325 return &pimap->mapped[i]; 326 } 327 } 328 return NULL; 329 } 330 331 /* 332 * If we have an interrupt that's not an IPI, check if we have a 333 * passthrough adapter and if so, check if this external interrupt 334 * is for the adapter. 335 * We will attempt to deliver the IRQ directly to the target VCPU's 336 * ICP, the virtual ICP (based on affinity - the xive value in ICS). 337 * 338 * If the delivery fails or if this is not for a passthrough adapter, 339 * return to the host to handle this interrupt. We earlier 340 * saved a copy of the XIRR in the PACA, it will be picked up by 341 * the host ICP driver. 342 */ 343 static int kvmppc_check_passthru(u32 xisr, __be32 xirr, bool *again) 344 { 345 struct kvmppc_passthru_irqmap *pimap; 346 struct kvmppc_irq_map *irq_map; 347 struct kvm_vcpu *vcpu; 348 349 vcpu = local_paca->kvm_hstate.kvm_vcpu; 350 if (!vcpu) 351 return 1; 352 pimap = kvmppc_get_passthru_irqmap(vcpu->kvm); 353 if (!pimap) 354 return 1; 355 irq_map = get_irqmap(pimap, xisr); 356 if (!irq_map) 357 return 1; 358 359 /* We're handling this interrupt, generic code doesn't need to */ 360 local_paca->kvm_hstate.saved_xirr = 0; 361 362 return kvmppc_deliver_irq_passthru(vcpu, xirr, irq_map, pimap, again); 363 } 364 365 #else 366 static inline int kvmppc_check_passthru(u32 xisr, __be32 xirr, bool *again) 367 { 368 return 1; 369 } 370 #endif 371 372 /* 373 * Determine what sort of external interrupt is pending (if any). 374 * Returns: 375 * 0 if no interrupt is pending 376 * 1 if an interrupt is pending that needs to be handled by the host 377 * 2 Passthrough that needs completion in the host 378 * -1 if there was a guest wakeup IPI (which has now been cleared) 379 * -2 if there is PCI passthrough external interrupt that was handled 380 */ 381 static long kvmppc_read_one_intr(bool *again); 382 383 long kvmppc_read_intr(void) 384 { 385 long ret = 0; 386 long rc; 387 bool again; 388 389 if (xive_enabled()) 390 return 1; 391 392 do { 393 again = false; 394 rc = kvmppc_read_one_intr(&again); 395 if (rc && (ret == 0 || rc > ret)) 396 ret = rc; 397 } while (again); 398 return ret; 399 } 400 401 static long kvmppc_read_one_intr(bool *again) 402 { 403 void __iomem *xics_phys; 404 u32 h_xirr; 405 __be32 xirr; 406 u32 xisr; 407 u8 host_ipi; 408 int64_t rc; 409 410 /* see if a host IPI is pending */ 411 host_ipi = local_paca->kvm_hstate.host_ipi; 412 if (host_ipi) 413 return 1; 414 415 /* Now read the interrupt from the ICP */ 416 xics_phys = local_paca->kvm_hstate.xics_phys; 417 rc = 0; 418 if (!xics_phys) 419 rc = opal_int_get_xirr(&xirr, false); 420 else 421 xirr = __raw_rm_readl(xics_phys + XICS_XIRR); 422 if (rc < 0) 423 return 1; 424 425 /* 426 * Save XIRR for later. Since we get control in reverse endian 427 * on LE systems, save it byte reversed and fetch it back in 428 * host endian. Note that xirr is the value read from the 429 * XIRR register, while h_xirr is the host endian version. 430 */ 431 h_xirr = be32_to_cpu(xirr); 432 local_paca->kvm_hstate.saved_xirr = h_xirr; 433 xisr = h_xirr & 0xffffff; 434 /* 435 * Ensure that the store/load complete to guarantee all side 436 * effects of loading from XIRR has completed 437 */ 438 smp_mb(); 439 440 /* if nothing pending in the ICP */ 441 if (!xisr) 442 return 0; 443 444 /* We found something in the ICP... 445 * 446 * If it is an IPI, clear the MFRR and EOI it. 447 */ 448 if (xisr == XICS_IPI) { 449 rc = 0; 450 if (xics_phys) { 451 __raw_rm_writeb(0xff, xics_phys + XICS_MFRR); 452 __raw_rm_writel(xirr, xics_phys + XICS_XIRR); 453 } else { 454 opal_int_set_mfrr(hard_smp_processor_id(), 0xff); 455 rc = opal_int_eoi(h_xirr); 456 } 457 /* If rc > 0, there is another interrupt pending */ 458 *again = rc > 0; 459 460 /* 461 * Need to ensure side effects of above stores 462 * complete before proceeding. 463 */ 464 smp_mb(); 465 466 /* 467 * We need to re-check host IPI now in case it got set in the 468 * meantime. If it's clear, we bounce the interrupt to the 469 * guest 470 */ 471 host_ipi = local_paca->kvm_hstate.host_ipi; 472 if (unlikely(host_ipi != 0)) { 473 /* We raced with the host, 474 * we need to resend that IPI, bummer 475 */ 476 if (xics_phys) 477 __raw_rm_writeb(IPI_PRIORITY, 478 xics_phys + XICS_MFRR); 479 else 480 opal_int_set_mfrr(hard_smp_processor_id(), 481 IPI_PRIORITY); 482 /* Let side effects complete */ 483 smp_mb(); 484 return 1; 485 } 486 487 /* OK, it's an IPI for us */ 488 local_paca->kvm_hstate.saved_xirr = 0; 489 return -1; 490 } 491 492 return kvmppc_check_passthru(xisr, xirr, again); 493 } 494