1 /* 2 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License, version 2, as 6 * published by the Free Software Foundation. 7 */ 8 9 #include <linux/cpu.h> 10 #include <linux/kvm_host.h> 11 #include <linux/preempt.h> 12 #include <linux/export.h> 13 #include <linux/sched.h> 14 #include <linux/spinlock.h> 15 #include <linux/init.h> 16 #include <linux/memblock.h> 17 #include <linux/sizes.h> 18 #include <linux/cma.h> 19 #include <linux/bitops.h> 20 21 #include <asm/cputable.h> 22 #include <asm/kvm_ppc.h> 23 #include <asm/kvm_book3s.h> 24 #include <asm/archrandom.h> 25 #include <asm/xics.h> 26 #include <asm/dbell.h> 27 #include <asm/cputhreads.h> 28 #include <asm/io.h> 29 #include <asm/opal.h> 30 #include <asm/smp.h> 31 32 #define KVM_CMA_CHUNK_ORDER 18 33 34 /* 35 * Hash page table alignment on newer cpus(CPU_FTR_ARCH_206) 36 * should be power of 2. 37 */ 38 #define HPT_ALIGN_PAGES ((1 << 18) >> PAGE_SHIFT) /* 256k */ 39 /* 40 * By default we reserve 5% of memory for hash pagetable allocation. 41 */ 42 static unsigned long kvm_cma_resv_ratio = 5; 43 44 static struct cma *kvm_cma; 45 46 static int __init early_parse_kvm_cma_resv(char *p) 47 { 48 pr_debug("%s(%s)\n", __func__, p); 49 if (!p) 50 return -EINVAL; 51 return kstrtoul(p, 0, &kvm_cma_resv_ratio); 52 } 53 early_param("kvm_cma_resv_ratio", early_parse_kvm_cma_resv); 54 55 struct page *kvm_alloc_hpt(unsigned long nr_pages) 56 { 57 VM_BUG_ON(order_base_2(nr_pages) < KVM_CMA_CHUNK_ORDER - PAGE_SHIFT); 58 59 return cma_alloc(kvm_cma, nr_pages, order_base_2(HPT_ALIGN_PAGES)); 60 } 61 EXPORT_SYMBOL_GPL(kvm_alloc_hpt); 62 63 void kvm_release_hpt(struct page *page, unsigned long nr_pages) 64 { 65 cma_release(kvm_cma, page, nr_pages); 66 } 67 EXPORT_SYMBOL_GPL(kvm_release_hpt); 68 69 /** 70 * kvm_cma_reserve() - reserve area for kvm hash pagetable 71 * 72 * This function reserves memory from early allocator. It should be 73 * called by arch specific code once the memblock allocator 74 * has been activated and all other subsystems have already allocated/reserved 75 * memory. 76 */ 77 void __init kvm_cma_reserve(void) 78 { 79 unsigned long align_size; 80 struct memblock_region *reg; 81 phys_addr_t selected_size = 0; 82 83 /* 84 * We need CMA reservation only when we are in HV mode 85 */ 86 if (!cpu_has_feature(CPU_FTR_HVMODE)) 87 return; 88 /* 89 * We cannot use memblock_phys_mem_size() here, because 90 * memblock_analyze() has not been called yet. 91 */ 92 for_each_memblock(memory, reg) 93 selected_size += memblock_region_memory_end_pfn(reg) - 94 memblock_region_memory_base_pfn(reg); 95 96 selected_size = (selected_size * kvm_cma_resv_ratio / 100) << PAGE_SHIFT; 97 if (selected_size) { 98 pr_debug("%s: reserving %ld MiB for global area\n", __func__, 99 (unsigned long)selected_size / SZ_1M); 100 align_size = HPT_ALIGN_PAGES << PAGE_SHIFT; 101 cma_declare_contiguous(0, selected_size, 0, align_size, 102 KVM_CMA_CHUNK_ORDER - PAGE_SHIFT, false, &kvm_cma); 103 } 104 } 105 106 /* 107 * Real-mode H_CONFER implementation. 108 * We check if we are the only vcpu out of this virtual core 109 * still running in the guest and not ceded. If so, we pop up 110 * to the virtual-mode implementation; if not, just return to 111 * the guest. 112 */ 113 long int kvmppc_rm_h_confer(struct kvm_vcpu *vcpu, int target, 114 unsigned int yield_count) 115 { 116 struct kvmppc_vcore *vc = local_paca->kvm_hstate.kvm_vcore; 117 int ptid = local_paca->kvm_hstate.ptid; 118 int threads_running; 119 int threads_ceded; 120 int threads_conferring; 121 u64 stop = get_tb() + 10 * tb_ticks_per_usec; 122 int rv = H_SUCCESS; /* => don't yield */ 123 124 set_bit(ptid, &vc->conferring_threads); 125 while ((get_tb() < stop) && !VCORE_IS_EXITING(vc)) { 126 threads_running = VCORE_ENTRY_MAP(vc); 127 threads_ceded = vc->napping_threads; 128 threads_conferring = vc->conferring_threads; 129 if ((threads_ceded | threads_conferring) == threads_running) { 130 rv = H_TOO_HARD; /* => do yield */ 131 break; 132 } 133 } 134 clear_bit(ptid, &vc->conferring_threads); 135 return rv; 136 } 137 138 /* 139 * When running HV mode KVM we need to block certain operations while KVM VMs 140 * exist in the system. We use a counter of VMs to track this. 141 * 142 * One of the operations we need to block is onlining of secondaries, so we 143 * protect hv_vm_count with get/put_online_cpus(). 144 */ 145 static atomic_t hv_vm_count; 146 147 void kvm_hv_vm_activated(void) 148 { 149 get_online_cpus(); 150 atomic_inc(&hv_vm_count); 151 put_online_cpus(); 152 } 153 EXPORT_SYMBOL_GPL(kvm_hv_vm_activated); 154 155 void kvm_hv_vm_deactivated(void) 156 { 157 get_online_cpus(); 158 atomic_dec(&hv_vm_count); 159 put_online_cpus(); 160 } 161 EXPORT_SYMBOL_GPL(kvm_hv_vm_deactivated); 162 163 bool kvm_hv_mode_active(void) 164 { 165 return atomic_read(&hv_vm_count) != 0; 166 } 167 168 extern int hcall_real_table[], hcall_real_table_end[]; 169 170 int kvmppc_hcall_impl_hv_realmode(unsigned long cmd) 171 { 172 cmd /= 4; 173 if (cmd < hcall_real_table_end - hcall_real_table && 174 hcall_real_table[cmd]) 175 return 1; 176 177 return 0; 178 } 179 EXPORT_SYMBOL_GPL(kvmppc_hcall_impl_hv_realmode); 180 181 int kvmppc_hwrng_present(void) 182 { 183 return powernv_hwrng_present(); 184 } 185 EXPORT_SYMBOL_GPL(kvmppc_hwrng_present); 186 187 long kvmppc_h_random(struct kvm_vcpu *vcpu) 188 { 189 if (powernv_get_random_real_mode(&vcpu->arch.gpr[4])) 190 return H_SUCCESS; 191 192 return H_HARDWARE; 193 } 194 195 static inline void rm_writeb(unsigned long paddr, u8 val) 196 { 197 __asm__ __volatile__("stbcix %0,0,%1" 198 : : "r" (val), "r" (paddr) : "memory"); 199 } 200 201 /* 202 * Send an interrupt or message to another CPU. 203 * This can only be called in real mode. 204 * The caller needs to include any barrier needed to order writes 205 * to memory vs. the IPI/message. 206 */ 207 void kvmhv_rm_send_ipi(int cpu) 208 { 209 unsigned long xics_phys; 210 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 211 212 /* On POWER9 we can use msgsnd for any destination cpu. */ 213 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 214 msg |= get_hard_smp_processor_id(cpu); 215 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 216 return; 217 } 218 /* On POWER8 for IPIs to threads in the same core, use msgsnd. */ 219 if (cpu_has_feature(CPU_FTR_ARCH_207S) && 220 cpu_first_thread_sibling(cpu) == 221 cpu_first_thread_sibling(raw_smp_processor_id())) { 222 msg |= cpu_thread_in_core(cpu); 223 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 224 return; 225 } 226 227 /* Else poke the target with an IPI */ 228 xics_phys = paca[cpu].kvm_hstate.xics_phys; 229 if (xics_phys) 230 rm_writeb(xics_phys + XICS_MFRR, IPI_PRIORITY); 231 else 232 opal_rm_int_set_mfrr(get_hard_smp_processor_id(cpu), 233 IPI_PRIORITY); 234 } 235 236 /* 237 * The following functions are called from the assembly code 238 * in book3s_hv_rmhandlers.S. 239 */ 240 static void kvmhv_interrupt_vcore(struct kvmppc_vcore *vc, int active) 241 { 242 int cpu = vc->pcpu; 243 244 /* Order setting of exit map vs. msgsnd/IPI */ 245 smp_mb(); 246 for (; active; active >>= 1, ++cpu) 247 if (active & 1) 248 kvmhv_rm_send_ipi(cpu); 249 } 250 251 void kvmhv_commence_exit(int trap) 252 { 253 struct kvmppc_vcore *vc = local_paca->kvm_hstate.kvm_vcore; 254 int ptid = local_paca->kvm_hstate.ptid; 255 struct kvm_split_mode *sip = local_paca->kvm_hstate.kvm_split_mode; 256 int me, ee, i; 257 258 /* Set our bit in the threads-exiting-guest map in the 0xff00 259 bits of vcore->entry_exit_map */ 260 me = 0x100 << ptid; 261 do { 262 ee = vc->entry_exit_map; 263 } while (cmpxchg(&vc->entry_exit_map, ee, ee | me) != ee); 264 265 /* Are we the first here? */ 266 if ((ee >> 8) != 0) 267 return; 268 269 /* 270 * Trigger the other threads in this vcore to exit the guest. 271 * If this is a hypervisor decrementer interrupt then they 272 * will be already on their way out of the guest. 273 */ 274 if (trap != BOOK3S_INTERRUPT_HV_DECREMENTER) 275 kvmhv_interrupt_vcore(vc, ee & ~(1 << ptid)); 276 277 /* 278 * If we are doing dynamic micro-threading, interrupt the other 279 * subcores to pull them out of their guests too. 280 */ 281 if (!sip) 282 return; 283 284 for (i = 0; i < MAX_SUBCORES; ++i) { 285 vc = sip->master_vcs[i]; 286 if (!vc) 287 break; 288 do { 289 ee = vc->entry_exit_map; 290 /* Already asked to exit? */ 291 if ((ee >> 8) != 0) 292 break; 293 } while (cmpxchg(&vc->entry_exit_map, ee, 294 ee | VCORE_EXIT_REQ) != ee); 295 if ((ee >> 8) == 0) 296 kvmhv_interrupt_vcore(vc, ee); 297 } 298 } 299 300 struct kvmppc_host_rm_ops *kvmppc_host_rm_ops_hv; 301 EXPORT_SYMBOL_GPL(kvmppc_host_rm_ops_hv); 302 303 #ifdef CONFIG_KVM_XICS 304 static struct kvmppc_irq_map *get_irqmap(struct kvmppc_passthru_irqmap *pimap, 305 u32 xisr) 306 { 307 int i; 308 309 /* 310 * We access the mapped array here without a lock. That 311 * is safe because we never reduce the number of entries 312 * in the array and we never change the v_hwirq field of 313 * an entry once it is set. 314 * 315 * We have also carefully ordered the stores in the writer 316 * and the loads here in the reader, so that if we find a matching 317 * hwirq here, the associated GSI and irq_desc fields are valid. 318 */ 319 for (i = 0; i < pimap->n_mapped; i++) { 320 if (xisr == pimap->mapped[i].r_hwirq) { 321 /* 322 * Order subsequent reads in the caller to serialize 323 * with the writer. 324 */ 325 smp_rmb(); 326 return &pimap->mapped[i]; 327 } 328 } 329 return NULL; 330 } 331 332 /* 333 * If we have an interrupt that's not an IPI, check if we have a 334 * passthrough adapter and if so, check if this external interrupt 335 * is for the adapter. 336 * We will attempt to deliver the IRQ directly to the target VCPU's 337 * ICP, the virtual ICP (based on affinity - the xive value in ICS). 338 * 339 * If the delivery fails or if this is not for a passthrough adapter, 340 * return to the host to handle this interrupt. We earlier 341 * saved a copy of the XIRR in the PACA, it will be picked up by 342 * the host ICP driver. 343 */ 344 static int kvmppc_check_passthru(u32 xisr, __be32 xirr, bool *again) 345 { 346 struct kvmppc_passthru_irqmap *pimap; 347 struct kvmppc_irq_map *irq_map; 348 struct kvm_vcpu *vcpu; 349 350 vcpu = local_paca->kvm_hstate.kvm_vcpu; 351 if (!vcpu) 352 return 1; 353 pimap = kvmppc_get_passthru_irqmap(vcpu->kvm); 354 if (!pimap) 355 return 1; 356 irq_map = get_irqmap(pimap, xisr); 357 if (!irq_map) 358 return 1; 359 360 /* We're handling this interrupt, generic code doesn't need to */ 361 local_paca->kvm_hstate.saved_xirr = 0; 362 363 return kvmppc_deliver_irq_passthru(vcpu, xirr, irq_map, pimap, again); 364 } 365 366 #else 367 static inline int kvmppc_check_passthru(u32 xisr, __be32 xirr, bool *again) 368 { 369 return 1; 370 } 371 #endif 372 373 /* 374 * Determine what sort of external interrupt is pending (if any). 375 * Returns: 376 * 0 if no interrupt is pending 377 * 1 if an interrupt is pending that needs to be handled by the host 378 * 2 Passthrough that needs completion in the host 379 * -1 if there was a guest wakeup IPI (which has now been cleared) 380 * -2 if there is PCI passthrough external interrupt that was handled 381 */ 382 static long kvmppc_read_one_intr(bool *again); 383 384 long kvmppc_read_intr(void) 385 { 386 long ret = 0; 387 long rc; 388 bool again; 389 390 do { 391 again = false; 392 rc = kvmppc_read_one_intr(&again); 393 if (rc && (ret == 0 || rc > ret)) 394 ret = rc; 395 } while (again); 396 return ret; 397 } 398 399 static long kvmppc_read_one_intr(bool *again) 400 { 401 unsigned long xics_phys; 402 u32 h_xirr; 403 __be32 xirr; 404 u32 xisr; 405 u8 host_ipi; 406 int64_t rc; 407 408 /* see if a host IPI is pending */ 409 host_ipi = local_paca->kvm_hstate.host_ipi; 410 if (host_ipi) 411 return 1; 412 413 /* Now read the interrupt from the ICP */ 414 xics_phys = local_paca->kvm_hstate.xics_phys; 415 if (!xics_phys) { 416 /* Use OPAL to read the XIRR */ 417 rc = opal_rm_int_get_xirr(&xirr, false); 418 if (rc < 0) 419 return 1; 420 } else { 421 xirr = _lwzcix(xics_phys + XICS_XIRR); 422 } 423 424 /* 425 * Save XIRR for later. Since we get control in reverse endian 426 * on LE systems, save it byte reversed and fetch it back in 427 * host endian. Note that xirr is the value read from the 428 * XIRR register, while h_xirr is the host endian version. 429 */ 430 h_xirr = be32_to_cpu(xirr); 431 local_paca->kvm_hstate.saved_xirr = h_xirr; 432 xisr = h_xirr & 0xffffff; 433 /* 434 * Ensure that the store/load complete to guarantee all side 435 * effects of loading from XIRR has completed 436 */ 437 smp_mb(); 438 439 /* if nothing pending in the ICP */ 440 if (!xisr) 441 return 0; 442 443 /* We found something in the ICP... 444 * 445 * If it is an IPI, clear the MFRR and EOI it. 446 */ 447 if (xisr == XICS_IPI) { 448 if (xics_phys) { 449 _stbcix(xics_phys + XICS_MFRR, 0xff); 450 _stwcix(xics_phys + XICS_XIRR, xirr); 451 } else { 452 opal_rm_int_set_mfrr(hard_smp_processor_id(), 0xff); 453 rc = opal_rm_int_eoi(h_xirr); 454 /* If rc > 0, there is another interrupt pending */ 455 *again = rc > 0; 456 } 457 458 /* 459 * Need to ensure side effects of above stores 460 * complete before proceeding. 461 */ 462 smp_mb(); 463 464 /* 465 * We need to re-check host IPI now in case it got set in the 466 * meantime. If it's clear, we bounce the interrupt to the 467 * guest 468 */ 469 host_ipi = local_paca->kvm_hstate.host_ipi; 470 if (unlikely(host_ipi != 0)) { 471 /* We raced with the host, 472 * we need to resend that IPI, bummer 473 */ 474 if (xics_phys) 475 _stbcix(xics_phys + XICS_MFRR, IPI_PRIORITY); 476 else 477 opal_rm_int_set_mfrr(hard_smp_processor_id(), 478 IPI_PRIORITY); 479 /* Let side effects complete */ 480 smp_mb(); 481 return 1; 482 } 483 484 /* OK, it's an IPI for us */ 485 local_paca->kvm_hstate.saved_xirr = 0; 486 return -1; 487 } 488 489 return kvmppc_check_passthru(xisr, xirr, again); 490 } 491