1aa04b4ccSPaul Mackerras /* 2aa04b4ccSPaul Mackerras * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 3aa04b4ccSPaul Mackerras * 4aa04b4ccSPaul Mackerras * This program is free software; you can redistribute it and/or modify 5aa04b4ccSPaul Mackerras * it under the terms of the GNU General Public License, version 2, as 6aa04b4ccSPaul Mackerras * published by the Free Software Foundation. 7aa04b4ccSPaul Mackerras */ 8aa04b4ccSPaul Mackerras 9441c19c8SMichael Ellerman #include <linux/cpu.h> 10aa04b4ccSPaul Mackerras #include <linux/kvm_host.h> 11aa04b4ccSPaul Mackerras #include <linux/preempt.h> 1266b15db6SPaul Gortmaker #include <linux/export.h> 13aa04b4ccSPaul Mackerras #include <linux/sched.h> 14aa04b4ccSPaul Mackerras #include <linux/spinlock.h> 15aa04b4ccSPaul Mackerras #include <linux/init.h> 16fa61a4e3SAneesh Kumar K.V #include <linux/memblock.h> 17fa61a4e3SAneesh Kumar K.V #include <linux/sizes.h> 18fc95ca72SJoonsoo Kim #include <linux/cma.h> 1990fd09f8SSam Bobroff #include <linux/bitops.h> 20aa04b4ccSPaul Mackerras 21aa04b4ccSPaul Mackerras #include <asm/cputable.h> 22aa04b4ccSPaul Mackerras #include <asm/kvm_ppc.h> 23aa04b4ccSPaul Mackerras #include <asm/kvm_book3s.h> 24e928e9cbSMichael Ellerman #include <asm/archrandom.h> 25eddb60fbSPaul Mackerras #include <asm/xics.h> 26243e2511SBenjamin Herrenschmidt #include <asm/xive.h> 2766feed61SPaul Mackerras #include <asm/dbell.h> 2866feed61SPaul Mackerras #include <asm/cputhreads.h> 2937f55d30SSuresh Warrier #include <asm/io.h> 30f725758bSPaul Mackerras #include <asm/opal.h> 31e2702871SPaul Mackerras #include <asm/smp.h> 32aa04b4ccSPaul Mackerras 33fc95ca72SJoonsoo Kim #define KVM_CMA_CHUNK_ORDER 18 34fc95ca72SJoonsoo Kim 355af50993SBenjamin Herrenschmidt #include "book3s_xics.h" 365af50993SBenjamin Herrenschmidt #include "book3s_xive.h" 375af50993SBenjamin Herrenschmidt 385af50993SBenjamin Herrenschmidt /* 395af50993SBenjamin Herrenschmidt * The XIVE module will populate these when it loads 405af50993SBenjamin Herrenschmidt */ 415af50993SBenjamin Herrenschmidt unsigned long (*__xive_vm_h_xirr)(struct kvm_vcpu *vcpu); 425af50993SBenjamin Herrenschmidt unsigned long (*__xive_vm_h_ipoll)(struct kvm_vcpu *vcpu, unsigned long server); 435af50993SBenjamin Herrenschmidt int (*__xive_vm_h_ipi)(struct kvm_vcpu *vcpu, unsigned long server, 445af50993SBenjamin Herrenschmidt unsigned long mfrr); 455af50993SBenjamin Herrenschmidt int (*__xive_vm_h_cppr)(struct kvm_vcpu *vcpu, unsigned long cppr); 465af50993SBenjamin Herrenschmidt int (*__xive_vm_h_eoi)(struct kvm_vcpu *vcpu, unsigned long xirr); 475af50993SBenjamin Herrenschmidt EXPORT_SYMBOL_GPL(__xive_vm_h_xirr); 485af50993SBenjamin Herrenschmidt EXPORT_SYMBOL_GPL(__xive_vm_h_ipoll); 495af50993SBenjamin Herrenschmidt EXPORT_SYMBOL_GPL(__xive_vm_h_ipi); 505af50993SBenjamin Herrenschmidt EXPORT_SYMBOL_GPL(__xive_vm_h_cppr); 515af50993SBenjamin Herrenschmidt EXPORT_SYMBOL_GPL(__xive_vm_h_eoi); 525af50993SBenjamin Herrenschmidt 53fa61a4e3SAneesh Kumar K.V /* 54fa61a4e3SAneesh Kumar K.V * Hash page table alignment on newer cpus(CPU_FTR_ARCH_206) 55fa61a4e3SAneesh Kumar K.V * should be power of 2. 56fa61a4e3SAneesh Kumar K.V */ 57fa61a4e3SAneesh Kumar K.V #define HPT_ALIGN_PAGES ((1 << 18) >> PAGE_SHIFT) /* 256k */ 58fa61a4e3SAneesh Kumar K.V /* 59fa61a4e3SAneesh Kumar K.V * By default we reserve 5% of memory for hash pagetable allocation. 60fa61a4e3SAneesh Kumar K.V */ 61fa61a4e3SAneesh Kumar K.V static unsigned long kvm_cma_resv_ratio = 5; 62aa04b4ccSPaul Mackerras 63fc95ca72SJoonsoo Kim static struct cma *kvm_cma; 64fc95ca72SJoonsoo Kim 65fa61a4e3SAneesh Kumar K.V static int __init early_parse_kvm_cma_resv(char *p) 66d2a1b483SAlexander Graf { 67fa61a4e3SAneesh Kumar K.V pr_debug("%s(%s)\n", __func__, p); 68d2a1b483SAlexander Graf if (!p) 69fa61a4e3SAneesh Kumar K.V return -EINVAL; 70fa61a4e3SAneesh Kumar K.V return kstrtoul(p, 0, &kvm_cma_resv_ratio); 71d2a1b483SAlexander Graf } 72fa61a4e3SAneesh Kumar K.V early_param("kvm_cma_resv_ratio", early_parse_kvm_cma_resv); 73d2a1b483SAlexander Graf 74db9a290dSDavid Gibson struct page *kvm_alloc_hpt_cma(unsigned long nr_pages) 75d2a1b483SAlexander Graf { 76c04fa583SAlexey Kardashevskiy VM_BUG_ON(order_base_2(nr_pages) < KVM_CMA_CHUNK_ORDER - PAGE_SHIFT); 77fc95ca72SJoonsoo Kim 78e2f466e3SLucas Stach return cma_alloc(kvm_cma, nr_pages, order_base_2(HPT_ALIGN_PAGES), 79e2f466e3SLucas Stach GFP_KERNEL); 80d2a1b483SAlexander Graf } 81db9a290dSDavid Gibson EXPORT_SYMBOL_GPL(kvm_alloc_hpt_cma); 82d2a1b483SAlexander Graf 83db9a290dSDavid Gibson void kvm_free_hpt_cma(struct page *page, unsigned long nr_pages) 84d2a1b483SAlexander Graf { 85fc95ca72SJoonsoo Kim cma_release(kvm_cma, page, nr_pages); 86d2a1b483SAlexander Graf } 87db9a290dSDavid Gibson EXPORT_SYMBOL_GPL(kvm_free_hpt_cma); 88d2a1b483SAlexander Graf 89fa61a4e3SAneesh Kumar K.V /** 90fa61a4e3SAneesh Kumar K.V * kvm_cma_reserve() - reserve area for kvm hash pagetable 91fa61a4e3SAneesh Kumar K.V * 92fa61a4e3SAneesh Kumar K.V * This function reserves memory from early allocator. It should be 9314ed7409SAnton Blanchard * called by arch specific code once the memblock allocator 94fa61a4e3SAneesh Kumar K.V * has been activated and all other subsystems have already allocated/reserved 95fa61a4e3SAneesh Kumar K.V * memory. 96fa61a4e3SAneesh Kumar K.V */ 97fa61a4e3SAneesh Kumar K.V void __init kvm_cma_reserve(void) 98fa61a4e3SAneesh Kumar K.V { 99fa61a4e3SAneesh Kumar K.V unsigned long align_size; 100fa61a4e3SAneesh Kumar K.V struct memblock_region *reg; 101fa61a4e3SAneesh Kumar K.V phys_addr_t selected_size = 0; 102cec26bc3SAneesh Kumar K.V 103cec26bc3SAneesh Kumar K.V /* 104cec26bc3SAneesh Kumar K.V * We need CMA reservation only when we are in HV mode 105cec26bc3SAneesh Kumar K.V */ 106cec26bc3SAneesh Kumar K.V if (!cpu_has_feature(CPU_FTR_HVMODE)) 107cec26bc3SAneesh Kumar K.V return; 108fa61a4e3SAneesh Kumar K.V /* 109fa61a4e3SAneesh Kumar K.V * We cannot use memblock_phys_mem_size() here, because 110fa61a4e3SAneesh Kumar K.V * memblock_analyze() has not been called yet. 111fa61a4e3SAneesh Kumar K.V */ 112fa61a4e3SAneesh Kumar K.V for_each_memblock(memory, reg) 113fa61a4e3SAneesh Kumar K.V selected_size += memblock_region_memory_end_pfn(reg) - 114fa61a4e3SAneesh Kumar K.V memblock_region_memory_base_pfn(reg); 115fa61a4e3SAneesh Kumar K.V 116fa61a4e3SAneesh Kumar K.V selected_size = (selected_size * kvm_cma_resv_ratio / 100) << PAGE_SHIFT; 117fa61a4e3SAneesh Kumar K.V if (selected_size) { 118fa61a4e3SAneesh Kumar K.V pr_debug("%s: reserving %ld MiB for global area\n", __func__, 119fa61a4e3SAneesh Kumar K.V (unsigned long)selected_size / SZ_1M); 120fa61a4e3SAneesh Kumar K.V align_size = HPT_ALIGN_PAGES << PAGE_SHIFT; 121c1f733aaSJoonsoo Kim cma_declare_contiguous(0, selected_size, 0, align_size, 122f318dd08SLaura Abbott KVM_CMA_CHUNK_ORDER - PAGE_SHIFT, false, "kvm_cma", 123f318dd08SLaura Abbott &kvm_cma); 124fa61a4e3SAneesh Kumar K.V } 125fa61a4e3SAneesh Kumar K.V } 126441c19c8SMichael Ellerman 127441c19c8SMichael Ellerman /* 12890fd09f8SSam Bobroff * Real-mode H_CONFER implementation. 12990fd09f8SSam Bobroff * We check if we are the only vcpu out of this virtual core 13090fd09f8SSam Bobroff * still running in the guest and not ceded. If so, we pop up 13190fd09f8SSam Bobroff * to the virtual-mode implementation; if not, just return to 13290fd09f8SSam Bobroff * the guest. 13390fd09f8SSam Bobroff */ 13490fd09f8SSam Bobroff long int kvmppc_rm_h_confer(struct kvm_vcpu *vcpu, int target, 13590fd09f8SSam Bobroff unsigned int yield_count) 13690fd09f8SSam Bobroff { 137ec257165SPaul Mackerras struct kvmppc_vcore *vc = local_paca->kvm_hstate.kvm_vcore; 138ec257165SPaul Mackerras int ptid = local_paca->kvm_hstate.ptid; 13990fd09f8SSam Bobroff int threads_running; 14090fd09f8SSam Bobroff int threads_ceded; 14190fd09f8SSam Bobroff int threads_conferring; 14290fd09f8SSam Bobroff u64 stop = get_tb() + 10 * tb_ticks_per_usec; 14390fd09f8SSam Bobroff int rv = H_SUCCESS; /* => don't yield */ 14490fd09f8SSam Bobroff 145ec257165SPaul Mackerras set_bit(ptid, &vc->conferring_threads); 1467d6c40daSPaul Mackerras while ((get_tb() < stop) && !VCORE_IS_EXITING(vc)) { 1477d6c40daSPaul Mackerras threads_running = VCORE_ENTRY_MAP(vc); 1487d6c40daSPaul Mackerras threads_ceded = vc->napping_threads; 1497d6c40daSPaul Mackerras threads_conferring = vc->conferring_threads; 1507d6c40daSPaul Mackerras if ((threads_ceded | threads_conferring) == threads_running) { 15190fd09f8SSam Bobroff rv = H_TOO_HARD; /* => do yield */ 15290fd09f8SSam Bobroff break; 15390fd09f8SSam Bobroff } 15490fd09f8SSam Bobroff } 155ec257165SPaul Mackerras clear_bit(ptid, &vc->conferring_threads); 15690fd09f8SSam Bobroff return rv; 15790fd09f8SSam Bobroff } 15890fd09f8SSam Bobroff 15990fd09f8SSam Bobroff /* 160441c19c8SMichael Ellerman * When running HV mode KVM we need to block certain operations while KVM VMs 161441c19c8SMichael Ellerman * exist in the system. We use a counter of VMs to track this. 162441c19c8SMichael Ellerman * 163441c19c8SMichael Ellerman * One of the operations we need to block is onlining of secondaries, so we 164441c19c8SMichael Ellerman * protect hv_vm_count with get/put_online_cpus(). 165441c19c8SMichael Ellerman */ 166441c19c8SMichael Ellerman static atomic_t hv_vm_count; 167441c19c8SMichael Ellerman 168441c19c8SMichael Ellerman void kvm_hv_vm_activated(void) 169441c19c8SMichael Ellerman { 170441c19c8SMichael Ellerman get_online_cpus(); 171441c19c8SMichael Ellerman atomic_inc(&hv_vm_count); 172441c19c8SMichael Ellerman put_online_cpus(); 173441c19c8SMichael Ellerman } 174441c19c8SMichael Ellerman EXPORT_SYMBOL_GPL(kvm_hv_vm_activated); 175441c19c8SMichael Ellerman 176441c19c8SMichael Ellerman void kvm_hv_vm_deactivated(void) 177441c19c8SMichael Ellerman { 178441c19c8SMichael Ellerman get_online_cpus(); 179441c19c8SMichael Ellerman atomic_dec(&hv_vm_count); 180441c19c8SMichael Ellerman put_online_cpus(); 181441c19c8SMichael Ellerman } 182441c19c8SMichael Ellerman EXPORT_SYMBOL_GPL(kvm_hv_vm_deactivated); 183441c19c8SMichael Ellerman 184441c19c8SMichael Ellerman bool kvm_hv_mode_active(void) 185441c19c8SMichael Ellerman { 186441c19c8SMichael Ellerman return atomic_read(&hv_vm_count) != 0; 187441c19c8SMichael Ellerman } 188ae2113a4SPaul Mackerras 189ae2113a4SPaul Mackerras extern int hcall_real_table[], hcall_real_table_end[]; 190ae2113a4SPaul Mackerras 191ae2113a4SPaul Mackerras int kvmppc_hcall_impl_hv_realmode(unsigned long cmd) 192ae2113a4SPaul Mackerras { 193ae2113a4SPaul Mackerras cmd /= 4; 194ae2113a4SPaul Mackerras if (cmd < hcall_real_table_end - hcall_real_table && 195ae2113a4SPaul Mackerras hcall_real_table[cmd]) 196ae2113a4SPaul Mackerras return 1; 197ae2113a4SPaul Mackerras 198ae2113a4SPaul Mackerras return 0; 199ae2113a4SPaul Mackerras } 200ae2113a4SPaul Mackerras EXPORT_SYMBOL_GPL(kvmppc_hcall_impl_hv_realmode); 201e928e9cbSMichael Ellerman 202e928e9cbSMichael Ellerman int kvmppc_hwrng_present(void) 203e928e9cbSMichael Ellerman { 204e928e9cbSMichael Ellerman return powernv_hwrng_present(); 205e928e9cbSMichael Ellerman } 206e928e9cbSMichael Ellerman EXPORT_SYMBOL_GPL(kvmppc_hwrng_present); 207e928e9cbSMichael Ellerman 208e928e9cbSMichael Ellerman long kvmppc_h_random(struct kvm_vcpu *vcpu) 209e928e9cbSMichael Ellerman { 210acde2572SPaul Mackerras int r; 211acde2572SPaul Mackerras 212acde2572SPaul Mackerras /* Only need to do the expensive mfmsr() on radix */ 213acde2572SPaul Mackerras if (kvm_is_radix(vcpu->kvm) && (mfmsr() & MSR_IR)) 214acde2572SPaul Mackerras r = powernv_get_random_long(&vcpu->arch.gpr[4]); 215acde2572SPaul Mackerras else 216acde2572SPaul Mackerras r = powernv_get_random_real_mode(&vcpu->arch.gpr[4]); 217acde2572SPaul Mackerras if (r) 218e928e9cbSMichael Ellerman return H_SUCCESS; 219e928e9cbSMichael Ellerman 220e928e9cbSMichael Ellerman return H_HARDWARE; 221e928e9cbSMichael Ellerman } 222eddb60fbSPaul Mackerras 223eddb60fbSPaul Mackerras /* 22466feed61SPaul Mackerras * Send an interrupt or message to another CPU. 225eddb60fbSPaul Mackerras * The caller needs to include any barrier needed to order writes 226eddb60fbSPaul Mackerras * to memory vs. the IPI/message. 227eddb60fbSPaul Mackerras */ 228eddb60fbSPaul Mackerras void kvmhv_rm_send_ipi(int cpu) 229eddb60fbSPaul Mackerras { 230d381d7caSBenjamin Herrenschmidt void __iomem *xics_phys; 2311704a81cSPaul Mackerras unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 232eddb60fbSPaul Mackerras 2331704a81cSPaul Mackerras /* On POWER9 we can use msgsnd for any destination cpu. */ 2341704a81cSPaul Mackerras if (cpu_has_feature(CPU_FTR_ARCH_300)) { 2351704a81cSPaul Mackerras msg |= get_hard_smp_processor_id(cpu); 2361704a81cSPaul Mackerras __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 2371704a81cSPaul Mackerras return; 2381704a81cSPaul Mackerras } 2395af50993SBenjamin Herrenschmidt 2401704a81cSPaul Mackerras /* On POWER8 for IPIs to threads in the same core, use msgsnd. */ 24166feed61SPaul Mackerras if (cpu_has_feature(CPU_FTR_ARCH_207S) && 24266feed61SPaul Mackerras cpu_first_thread_sibling(cpu) == 24366feed61SPaul Mackerras cpu_first_thread_sibling(raw_smp_processor_id())) { 24466feed61SPaul Mackerras msg |= cpu_thread_in_core(cpu); 24566feed61SPaul Mackerras __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 24666feed61SPaul Mackerras return; 24766feed61SPaul Mackerras } 24866feed61SPaul Mackerras 249243e2511SBenjamin Herrenschmidt /* We should never reach this */ 250243e2511SBenjamin Herrenschmidt if (WARN_ON_ONCE(xive_enabled())) 251243e2511SBenjamin Herrenschmidt return; 252243e2511SBenjamin Herrenschmidt 25366feed61SPaul Mackerras /* Else poke the target with an IPI */ 254d2e60075SNicholas Piggin xics_phys = paca_ptrs[cpu]->kvm_hstate.xics_phys; 255ab9bad0eSBenjamin Herrenschmidt if (xics_phys) 256d381d7caSBenjamin Herrenschmidt __raw_rm_writeb(IPI_PRIORITY, xics_phys + XICS_MFRR); 257f725758bSPaul Mackerras else 258ab9bad0eSBenjamin Herrenschmidt opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY); 259eddb60fbSPaul Mackerras } 260eddb60fbSPaul Mackerras 261eddb60fbSPaul Mackerras /* 262eddb60fbSPaul Mackerras * The following functions are called from the assembly code 263eddb60fbSPaul Mackerras * in book3s_hv_rmhandlers.S. 264eddb60fbSPaul Mackerras */ 265eddb60fbSPaul Mackerras static void kvmhv_interrupt_vcore(struct kvmppc_vcore *vc, int active) 266eddb60fbSPaul Mackerras { 267eddb60fbSPaul Mackerras int cpu = vc->pcpu; 268eddb60fbSPaul Mackerras 269eddb60fbSPaul Mackerras /* Order setting of exit map vs. msgsnd/IPI */ 270eddb60fbSPaul Mackerras smp_mb(); 271eddb60fbSPaul Mackerras for (; active; active >>= 1, ++cpu) 272eddb60fbSPaul Mackerras if (active & 1) 273eddb60fbSPaul Mackerras kvmhv_rm_send_ipi(cpu); 274eddb60fbSPaul Mackerras } 275eddb60fbSPaul Mackerras 276eddb60fbSPaul Mackerras void kvmhv_commence_exit(int trap) 277eddb60fbSPaul Mackerras { 278eddb60fbSPaul Mackerras struct kvmppc_vcore *vc = local_paca->kvm_hstate.kvm_vcore; 279eddb60fbSPaul Mackerras int ptid = local_paca->kvm_hstate.ptid; 280b4deba5cSPaul Mackerras struct kvm_split_mode *sip = local_paca->kvm_hstate.kvm_split_mode; 281c0101509SPaul Mackerras int me, ee, i, t; 282c0101509SPaul Mackerras int cpu0; 283eddb60fbSPaul Mackerras 284eddb60fbSPaul Mackerras /* Set our bit in the threads-exiting-guest map in the 0xff00 285eddb60fbSPaul Mackerras bits of vcore->entry_exit_map */ 286eddb60fbSPaul Mackerras me = 0x100 << ptid; 287eddb60fbSPaul Mackerras do { 288eddb60fbSPaul Mackerras ee = vc->entry_exit_map; 289eddb60fbSPaul Mackerras } while (cmpxchg(&vc->entry_exit_map, ee, ee | me) != ee); 290eddb60fbSPaul Mackerras 291eddb60fbSPaul Mackerras /* Are we the first here? */ 292eddb60fbSPaul Mackerras if ((ee >> 8) != 0) 293eddb60fbSPaul Mackerras return; 294eddb60fbSPaul Mackerras 295eddb60fbSPaul Mackerras /* 296eddb60fbSPaul Mackerras * Trigger the other threads in this vcore to exit the guest. 297eddb60fbSPaul Mackerras * If this is a hypervisor decrementer interrupt then they 298eddb60fbSPaul Mackerras * will be already on their way out of the guest. 299eddb60fbSPaul Mackerras */ 300eddb60fbSPaul Mackerras if (trap != BOOK3S_INTERRUPT_HV_DECREMENTER) 301eddb60fbSPaul Mackerras kvmhv_interrupt_vcore(vc, ee & ~(1 << ptid)); 302b4deba5cSPaul Mackerras 303b4deba5cSPaul Mackerras /* 304b4deba5cSPaul Mackerras * If we are doing dynamic micro-threading, interrupt the other 305b4deba5cSPaul Mackerras * subcores to pull them out of their guests too. 306b4deba5cSPaul Mackerras */ 307b4deba5cSPaul Mackerras if (!sip) 308b4deba5cSPaul Mackerras return; 309b4deba5cSPaul Mackerras 310b4deba5cSPaul Mackerras for (i = 0; i < MAX_SUBCORES; ++i) { 311898b25b2SPaul Mackerras vc = sip->vc[i]; 312b4deba5cSPaul Mackerras if (!vc) 313b4deba5cSPaul Mackerras break; 314b4deba5cSPaul Mackerras do { 315b4deba5cSPaul Mackerras ee = vc->entry_exit_map; 316b4deba5cSPaul Mackerras /* Already asked to exit? */ 317b4deba5cSPaul Mackerras if ((ee >> 8) != 0) 318b4deba5cSPaul Mackerras break; 319b4deba5cSPaul Mackerras } while (cmpxchg(&vc->entry_exit_map, ee, 320b4deba5cSPaul Mackerras ee | VCORE_EXIT_REQ) != ee); 321b4deba5cSPaul Mackerras if ((ee >> 8) == 0) 322b4deba5cSPaul Mackerras kvmhv_interrupt_vcore(vc, ee); 323b4deba5cSPaul Mackerras } 324c0101509SPaul Mackerras 325c0101509SPaul Mackerras /* 326c0101509SPaul Mackerras * On POWER9 when running a HPT guest on a radix host (sip != NULL), 327c0101509SPaul Mackerras * we have to interrupt inactive CPU threads to get them to 328c0101509SPaul Mackerras * restore the host LPCR value. 329c0101509SPaul Mackerras */ 330c0101509SPaul Mackerras if (sip->lpcr_req) { 331c0101509SPaul Mackerras if (cmpxchg(&sip->do_restore, 0, 1) == 0) { 332c0101509SPaul Mackerras vc = local_paca->kvm_hstate.kvm_vcore; 333c0101509SPaul Mackerras cpu0 = vc->pcpu + ptid - local_paca->kvm_hstate.tid; 334c0101509SPaul Mackerras for (t = 1; t < threads_per_core; ++t) { 335c0101509SPaul Mackerras if (sip->napped[t]) 336c0101509SPaul Mackerras kvmhv_rm_send_ipi(cpu0 + t); 337c0101509SPaul Mackerras } 338c0101509SPaul Mackerras } 339c0101509SPaul Mackerras } 340eddb60fbSPaul Mackerras } 34179b6c247SSuresh Warrier 34279b6c247SSuresh Warrier struct kvmppc_host_rm_ops *kvmppc_host_rm_ops_hv; 34379b6c247SSuresh Warrier EXPORT_SYMBOL_GPL(kvmppc_host_rm_ops_hv); 34437f55d30SSuresh Warrier 345e3c13e56SSuresh Warrier #ifdef CONFIG_KVM_XICS 346e3c13e56SSuresh Warrier static struct kvmppc_irq_map *get_irqmap(struct kvmppc_passthru_irqmap *pimap, 347e3c13e56SSuresh Warrier u32 xisr) 348e3c13e56SSuresh Warrier { 349e3c13e56SSuresh Warrier int i; 350e3c13e56SSuresh Warrier 351e3c13e56SSuresh Warrier /* 352e3c13e56SSuresh Warrier * We access the mapped array here without a lock. That 353e3c13e56SSuresh Warrier * is safe because we never reduce the number of entries 354e3c13e56SSuresh Warrier * in the array and we never change the v_hwirq field of 355e3c13e56SSuresh Warrier * an entry once it is set. 356e3c13e56SSuresh Warrier * 357e3c13e56SSuresh Warrier * We have also carefully ordered the stores in the writer 358e3c13e56SSuresh Warrier * and the loads here in the reader, so that if we find a matching 359e3c13e56SSuresh Warrier * hwirq here, the associated GSI and irq_desc fields are valid. 360e3c13e56SSuresh Warrier */ 361e3c13e56SSuresh Warrier for (i = 0; i < pimap->n_mapped; i++) { 362e3c13e56SSuresh Warrier if (xisr == pimap->mapped[i].r_hwirq) { 363e3c13e56SSuresh Warrier /* 364e3c13e56SSuresh Warrier * Order subsequent reads in the caller to serialize 365e3c13e56SSuresh Warrier * with the writer. 366e3c13e56SSuresh Warrier */ 367e3c13e56SSuresh Warrier smp_rmb(); 368e3c13e56SSuresh Warrier return &pimap->mapped[i]; 369e3c13e56SSuresh Warrier } 370e3c13e56SSuresh Warrier } 371e3c13e56SSuresh Warrier return NULL; 372e3c13e56SSuresh Warrier } 373e3c13e56SSuresh Warrier 374e3c13e56SSuresh Warrier /* 375e3c13e56SSuresh Warrier * If we have an interrupt that's not an IPI, check if we have a 376e3c13e56SSuresh Warrier * passthrough adapter and if so, check if this external interrupt 377e3c13e56SSuresh Warrier * is for the adapter. 378e3c13e56SSuresh Warrier * We will attempt to deliver the IRQ directly to the target VCPU's 379e3c13e56SSuresh Warrier * ICP, the virtual ICP (based on affinity - the xive value in ICS). 380e3c13e56SSuresh Warrier * 381e3c13e56SSuresh Warrier * If the delivery fails or if this is not for a passthrough adapter, 382e3c13e56SSuresh Warrier * return to the host to handle this interrupt. We earlier 383e3c13e56SSuresh Warrier * saved a copy of the XIRR in the PACA, it will be picked up by 384e3c13e56SSuresh Warrier * the host ICP driver. 385e3c13e56SSuresh Warrier */ 386f725758bSPaul Mackerras static int kvmppc_check_passthru(u32 xisr, __be32 xirr, bool *again) 387e3c13e56SSuresh Warrier { 388e3c13e56SSuresh Warrier struct kvmppc_passthru_irqmap *pimap; 389e3c13e56SSuresh Warrier struct kvmppc_irq_map *irq_map; 390e3c13e56SSuresh Warrier struct kvm_vcpu *vcpu; 391e3c13e56SSuresh Warrier 392e3c13e56SSuresh Warrier vcpu = local_paca->kvm_hstate.kvm_vcpu; 393e3c13e56SSuresh Warrier if (!vcpu) 394e3c13e56SSuresh Warrier return 1; 395e3c13e56SSuresh Warrier pimap = kvmppc_get_passthru_irqmap(vcpu->kvm); 396e3c13e56SSuresh Warrier if (!pimap) 397e3c13e56SSuresh Warrier return 1; 398e3c13e56SSuresh Warrier irq_map = get_irqmap(pimap, xisr); 399e3c13e56SSuresh Warrier if (!irq_map) 400e3c13e56SSuresh Warrier return 1; 401e3c13e56SSuresh Warrier 402e3c13e56SSuresh Warrier /* We're handling this interrupt, generic code doesn't need to */ 403e3c13e56SSuresh Warrier local_paca->kvm_hstate.saved_xirr = 0; 404e3c13e56SSuresh Warrier 405f725758bSPaul Mackerras return kvmppc_deliver_irq_passthru(vcpu, xirr, irq_map, pimap, again); 406e3c13e56SSuresh Warrier } 407e3c13e56SSuresh Warrier 408e3c13e56SSuresh Warrier #else 409e2702871SPaul Mackerras static inline int kvmppc_check_passthru(u32 xisr, __be32 xirr, bool *again) 410e3c13e56SSuresh Warrier { 411e3c13e56SSuresh Warrier return 1; 412e3c13e56SSuresh Warrier } 413e3c13e56SSuresh Warrier #endif 414e3c13e56SSuresh Warrier 41537f55d30SSuresh Warrier /* 41637f55d30SSuresh Warrier * Determine what sort of external interrupt is pending (if any). 41737f55d30SSuresh Warrier * Returns: 41837f55d30SSuresh Warrier * 0 if no interrupt is pending 41937f55d30SSuresh Warrier * 1 if an interrupt is pending that needs to be handled by the host 420f7af5209SSuresh Warrier * 2 Passthrough that needs completion in the host 42137f55d30SSuresh Warrier * -1 if there was a guest wakeup IPI (which has now been cleared) 422e3c13e56SSuresh Warrier * -2 if there is PCI passthrough external interrupt that was handled 42337f55d30SSuresh Warrier */ 424f725758bSPaul Mackerras static long kvmppc_read_one_intr(bool *again); 42537f55d30SSuresh Warrier 42637f55d30SSuresh Warrier long kvmppc_read_intr(void) 42737f55d30SSuresh Warrier { 428f725758bSPaul Mackerras long ret = 0; 429f725758bSPaul Mackerras long rc; 430f725758bSPaul Mackerras bool again; 431f725758bSPaul Mackerras 432243e2511SBenjamin Herrenschmidt if (xive_enabled()) 433243e2511SBenjamin Herrenschmidt return 1; 434243e2511SBenjamin Herrenschmidt 435f725758bSPaul Mackerras do { 436f725758bSPaul Mackerras again = false; 437f725758bSPaul Mackerras rc = kvmppc_read_one_intr(&again); 438f725758bSPaul Mackerras if (rc && (ret == 0 || rc > ret)) 439f725758bSPaul Mackerras ret = rc; 440f725758bSPaul Mackerras } while (again); 441f725758bSPaul Mackerras return ret; 442f725758bSPaul Mackerras } 443f725758bSPaul Mackerras 444f725758bSPaul Mackerras static long kvmppc_read_one_intr(bool *again) 445f725758bSPaul Mackerras { 446d381d7caSBenjamin Herrenschmidt void __iomem *xics_phys; 44737f55d30SSuresh Warrier u32 h_xirr; 44837f55d30SSuresh Warrier __be32 xirr; 44937f55d30SSuresh Warrier u32 xisr; 45037f55d30SSuresh Warrier u8 host_ipi; 451f725758bSPaul Mackerras int64_t rc; 45237f55d30SSuresh Warrier 4535af50993SBenjamin Herrenschmidt if (xive_enabled()) 4545af50993SBenjamin Herrenschmidt return 1; 4555af50993SBenjamin Herrenschmidt 45637f55d30SSuresh Warrier /* see if a host IPI is pending */ 45737f55d30SSuresh Warrier host_ipi = local_paca->kvm_hstate.host_ipi; 45837f55d30SSuresh Warrier if (host_ipi) 45937f55d30SSuresh Warrier return 1; 46037f55d30SSuresh Warrier 46137f55d30SSuresh Warrier /* Now read the interrupt from the ICP */ 46237f55d30SSuresh Warrier xics_phys = local_paca->kvm_hstate.xics_phys; 46353af3ba2SPaul Mackerras rc = 0; 464ab9bad0eSBenjamin Herrenschmidt if (!xics_phys) 46553af3ba2SPaul Mackerras rc = opal_int_get_xirr(&xirr, false); 46653af3ba2SPaul Mackerras else 467d381d7caSBenjamin Herrenschmidt xirr = __raw_rm_readl(xics_phys + XICS_XIRR); 468f725758bSPaul Mackerras if (rc < 0) 46937f55d30SSuresh Warrier return 1; 47037f55d30SSuresh Warrier 47137f55d30SSuresh Warrier /* 47237f55d30SSuresh Warrier * Save XIRR for later. Since we get control in reverse endian 47337f55d30SSuresh Warrier * on LE systems, save it byte reversed and fetch it back in 47437f55d30SSuresh Warrier * host endian. Note that xirr is the value read from the 47537f55d30SSuresh Warrier * XIRR register, while h_xirr is the host endian version. 47637f55d30SSuresh Warrier */ 47737f55d30SSuresh Warrier h_xirr = be32_to_cpu(xirr); 47837f55d30SSuresh Warrier local_paca->kvm_hstate.saved_xirr = h_xirr; 47937f55d30SSuresh Warrier xisr = h_xirr & 0xffffff; 48037f55d30SSuresh Warrier /* 48137f55d30SSuresh Warrier * Ensure that the store/load complete to guarantee all side 48237f55d30SSuresh Warrier * effects of loading from XIRR has completed 48337f55d30SSuresh Warrier */ 48437f55d30SSuresh Warrier smp_mb(); 48537f55d30SSuresh Warrier 48637f55d30SSuresh Warrier /* if nothing pending in the ICP */ 48737f55d30SSuresh Warrier if (!xisr) 48837f55d30SSuresh Warrier return 0; 48937f55d30SSuresh Warrier 49037f55d30SSuresh Warrier /* We found something in the ICP... 49137f55d30SSuresh Warrier * 49237f55d30SSuresh Warrier * If it is an IPI, clear the MFRR and EOI it. 49337f55d30SSuresh Warrier */ 49437f55d30SSuresh Warrier if (xisr == XICS_IPI) { 49553af3ba2SPaul Mackerras rc = 0; 496ab9bad0eSBenjamin Herrenschmidt if (xics_phys) { 497d381d7caSBenjamin Herrenschmidt __raw_rm_writeb(0xff, xics_phys + XICS_MFRR); 498d381d7caSBenjamin Herrenschmidt __raw_rm_writel(xirr, xics_phys + XICS_XIRR); 499f725758bSPaul Mackerras } else { 500ab9bad0eSBenjamin Herrenschmidt opal_int_set_mfrr(hard_smp_processor_id(), 0xff); 501ab9bad0eSBenjamin Herrenschmidt rc = opal_int_eoi(h_xirr); 50253af3ba2SPaul Mackerras } 503f725758bSPaul Mackerras /* If rc > 0, there is another interrupt pending */ 504f725758bSPaul Mackerras *again = rc > 0; 505f725758bSPaul Mackerras 50637f55d30SSuresh Warrier /* 50737f55d30SSuresh Warrier * Need to ensure side effects of above stores 50837f55d30SSuresh Warrier * complete before proceeding. 50937f55d30SSuresh Warrier */ 51037f55d30SSuresh Warrier smp_mb(); 51137f55d30SSuresh Warrier 51237f55d30SSuresh Warrier /* 51337f55d30SSuresh Warrier * We need to re-check host IPI now in case it got set in the 51437f55d30SSuresh Warrier * meantime. If it's clear, we bounce the interrupt to the 51537f55d30SSuresh Warrier * guest 51637f55d30SSuresh Warrier */ 51737f55d30SSuresh Warrier host_ipi = local_paca->kvm_hstate.host_ipi; 51837f55d30SSuresh Warrier if (unlikely(host_ipi != 0)) { 51937f55d30SSuresh Warrier /* We raced with the host, 52037f55d30SSuresh Warrier * we need to resend that IPI, bummer 52137f55d30SSuresh Warrier */ 522ab9bad0eSBenjamin Herrenschmidt if (xics_phys) 523d381d7caSBenjamin Herrenschmidt __raw_rm_writeb(IPI_PRIORITY, 524d381d7caSBenjamin Herrenschmidt xics_phys + XICS_MFRR); 525f725758bSPaul Mackerras else 526ab9bad0eSBenjamin Herrenschmidt opal_int_set_mfrr(hard_smp_processor_id(), 527f725758bSPaul Mackerras IPI_PRIORITY); 52837f55d30SSuresh Warrier /* Let side effects complete */ 52937f55d30SSuresh Warrier smp_mb(); 53037f55d30SSuresh Warrier return 1; 53137f55d30SSuresh Warrier } 53237f55d30SSuresh Warrier 53337f55d30SSuresh Warrier /* OK, it's an IPI for us */ 53437f55d30SSuresh Warrier local_paca->kvm_hstate.saved_xirr = 0; 53537f55d30SSuresh Warrier return -1; 53637f55d30SSuresh Warrier } 53737f55d30SSuresh Warrier 538f725758bSPaul Mackerras return kvmppc_check_passthru(xisr, xirr, again); 53937f55d30SSuresh Warrier } 5405af50993SBenjamin Herrenschmidt 5415af50993SBenjamin Herrenschmidt #ifdef CONFIG_KVM_XICS 5425af50993SBenjamin Herrenschmidt static inline bool is_rm(void) 5435af50993SBenjamin Herrenschmidt { 5445af50993SBenjamin Herrenschmidt return !(mfmsr() & MSR_DR); 5455af50993SBenjamin Herrenschmidt } 5465af50993SBenjamin Herrenschmidt 5475af50993SBenjamin Herrenschmidt unsigned long kvmppc_rm_h_xirr(struct kvm_vcpu *vcpu) 5485af50993SBenjamin Herrenschmidt { 54900bb6ae5SPaul Mackerras if (!kvmppc_xics_enabled(vcpu)) 55000bb6ae5SPaul Mackerras return H_TOO_HARD; 5515af50993SBenjamin Herrenschmidt if (xive_enabled()) { 5525af50993SBenjamin Herrenschmidt if (is_rm()) 5535af50993SBenjamin Herrenschmidt return xive_rm_h_xirr(vcpu); 5545af50993SBenjamin Herrenschmidt if (unlikely(!__xive_vm_h_xirr)) 5555af50993SBenjamin Herrenschmidt return H_NOT_AVAILABLE; 5565af50993SBenjamin Herrenschmidt return __xive_vm_h_xirr(vcpu); 5575af50993SBenjamin Herrenschmidt } else 5585af50993SBenjamin Herrenschmidt return xics_rm_h_xirr(vcpu); 5595af50993SBenjamin Herrenschmidt } 5605af50993SBenjamin Herrenschmidt 5615af50993SBenjamin Herrenschmidt unsigned long kvmppc_rm_h_xirr_x(struct kvm_vcpu *vcpu) 5625af50993SBenjamin Herrenschmidt { 56300bb6ae5SPaul Mackerras if (!kvmppc_xics_enabled(vcpu)) 56400bb6ae5SPaul Mackerras return H_TOO_HARD; 5655af50993SBenjamin Herrenschmidt vcpu->arch.gpr[5] = get_tb(); 5665af50993SBenjamin Herrenschmidt if (xive_enabled()) { 5675af50993SBenjamin Herrenschmidt if (is_rm()) 5685af50993SBenjamin Herrenschmidt return xive_rm_h_xirr(vcpu); 5695af50993SBenjamin Herrenschmidt if (unlikely(!__xive_vm_h_xirr)) 5705af50993SBenjamin Herrenschmidt return H_NOT_AVAILABLE; 5715af50993SBenjamin Herrenschmidt return __xive_vm_h_xirr(vcpu); 5725af50993SBenjamin Herrenschmidt } else 5735af50993SBenjamin Herrenschmidt return xics_rm_h_xirr(vcpu); 5745af50993SBenjamin Herrenschmidt } 5755af50993SBenjamin Herrenschmidt 5765af50993SBenjamin Herrenschmidt unsigned long kvmppc_rm_h_ipoll(struct kvm_vcpu *vcpu, unsigned long server) 5775af50993SBenjamin Herrenschmidt { 57800bb6ae5SPaul Mackerras if (!kvmppc_xics_enabled(vcpu)) 57900bb6ae5SPaul Mackerras return H_TOO_HARD; 5805af50993SBenjamin Herrenschmidt if (xive_enabled()) { 5815af50993SBenjamin Herrenschmidt if (is_rm()) 5825af50993SBenjamin Herrenschmidt return xive_rm_h_ipoll(vcpu, server); 5835af50993SBenjamin Herrenschmidt if (unlikely(!__xive_vm_h_ipoll)) 5845af50993SBenjamin Herrenschmidt return H_NOT_AVAILABLE; 5855af50993SBenjamin Herrenschmidt return __xive_vm_h_ipoll(vcpu, server); 5865af50993SBenjamin Herrenschmidt } else 5875af50993SBenjamin Herrenschmidt return H_TOO_HARD; 5885af50993SBenjamin Herrenschmidt } 5895af50993SBenjamin Herrenschmidt 5905af50993SBenjamin Herrenschmidt int kvmppc_rm_h_ipi(struct kvm_vcpu *vcpu, unsigned long server, 5915af50993SBenjamin Herrenschmidt unsigned long mfrr) 5925af50993SBenjamin Herrenschmidt { 59300bb6ae5SPaul Mackerras if (!kvmppc_xics_enabled(vcpu)) 59400bb6ae5SPaul Mackerras return H_TOO_HARD; 5955af50993SBenjamin Herrenschmidt if (xive_enabled()) { 5965af50993SBenjamin Herrenschmidt if (is_rm()) 5975af50993SBenjamin Herrenschmidt return xive_rm_h_ipi(vcpu, server, mfrr); 5985af50993SBenjamin Herrenschmidt if (unlikely(!__xive_vm_h_ipi)) 5995af50993SBenjamin Herrenschmidt return H_NOT_AVAILABLE; 6005af50993SBenjamin Herrenschmidt return __xive_vm_h_ipi(vcpu, server, mfrr); 6015af50993SBenjamin Herrenschmidt } else 6025af50993SBenjamin Herrenschmidt return xics_rm_h_ipi(vcpu, server, mfrr); 6035af50993SBenjamin Herrenschmidt } 6045af50993SBenjamin Herrenschmidt 6055af50993SBenjamin Herrenschmidt int kvmppc_rm_h_cppr(struct kvm_vcpu *vcpu, unsigned long cppr) 6065af50993SBenjamin Herrenschmidt { 60700bb6ae5SPaul Mackerras if (!kvmppc_xics_enabled(vcpu)) 60800bb6ae5SPaul Mackerras return H_TOO_HARD; 6095af50993SBenjamin Herrenschmidt if (xive_enabled()) { 6105af50993SBenjamin Herrenschmidt if (is_rm()) 6115af50993SBenjamin Herrenschmidt return xive_rm_h_cppr(vcpu, cppr); 6125af50993SBenjamin Herrenschmidt if (unlikely(!__xive_vm_h_cppr)) 6135af50993SBenjamin Herrenschmidt return H_NOT_AVAILABLE; 6145af50993SBenjamin Herrenschmidt return __xive_vm_h_cppr(vcpu, cppr); 6155af50993SBenjamin Herrenschmidt } else 6165af50993SBenjamin Herrenschmidt return xics_rm_h_cppr(vcpu, cppr); 6175af50993SBenjamin Herrenschmidt } 6185af50993SBenjamin Herrenschmidt 6195af50993SBenjamin Herrenschmidt int kvmppc_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr) 6205af50993SBenjamin Herrenschmidt { 62100bb6ae5SPaul Mackerras if (!kvmppc_xics_enabled(vcpu)) 62200bb6ae5SPaul Mackerras return H_TOO_HARD; 6235af50993SBenjamin Herrenschmidt if (xive_enabled()) { 6245af50993SBenjamin Herrenschmidt if (is_rm()) 6255af50993SBenjamin Herrenschmidt return xive_rm_h_eoi(vcpu, xirr); 6265af50993SBenjamin Herrenschmidt if (unlikely(!__xive_vm_h_eoi)) 6275af50993SBenjamin Herrenschmidt return H_NOT_AVAILABLE; 6285af50993SBenjamin Herrenschmidt return __xive_vm_h_eoi(vcpu, xirr); 6295af50993SBenjamin Herrenschmidt } else 6305af50993SBenjamin Herrenschmidt return xics_rm_h_eoi(vcpu, xirr); 6315af50993SBenjamin Herrenschmidt } 6325af50993SBenjamin Herrenschmidt #endif /* CONFIG_KVM_XICS */ 633857b99e1SPaul Mackerras 634857b99e1SPaul Mackerras void kvmppc_bad_interrupt(struct pt_regs *regs) 635857b99e1SPaul Mackerras { 636857b99e1SPaul Mackerras die("Bad interrupt in KVM entry/exit code", regs, SIGABRT); 637857b99e1SPaul Mackerras panic("Bad KVM trap"); 638857b99e1SPaul Mackerras } 639c0101509SPaul Mackerras 640c0101509SPaul Mackerras /* 641c0101509SPaul Mackerras * Functions used to switch LPCR HR and UPRT bits on all threads 642c0101509SPaul Mackerras * when entering and exiting HPT guests on a radix host. 643c0101509SPaul Mackerras */ 644c0101509SPaul Mackerras 645c0101509SPaul Mackerras #define PHASE_REALMODE 1 /* in real mode */ 646c0101509SPaul Mackerras #define PHASE_SET_LPCR 2 /* have set LPCR */ 647c0101509SPaul Mackerras #define PHASE_OUT_OF_GUEST 4 /* have finished executing in guest */ 648c0101509SPaul Mackerras #define PHASE_RESET_LPCR 8 /* have reset LPCR to host value */ 649c0101509SPaul Mackerras 650c0101509SPaul Mackerras #define ALL(p) (((p) << 24) | ((p) << 16) | ((p) << 8) | (p)) 651c0101509SPaul Mackerras 652c0101509SPaul Mackerras static void wait_for_sync(struct kvm_split_mode *sip, int phase) 653c0101509SPaul Mackerras { 654c0101509SPaul Mackerras int thr = local_paca->kvm_hstate.tid; 655c0101509SPaul Mackerras 656c0101509SPaul Mackerras sip->lpcr_sync.phase[thr] |= phase; 657c0101509SPaul Mackerras phase = ALL(phase); 658c0101509SPaul Mackerras while ((sip->lpcr_sync.allphases & phase) != phase) { 659c0101509SPaul Mackerras HMT_low(); 660c0101509SPaul Mackerras barrier(); 661c0101509SPaul Mackerras } 662c0101509SPaul Mackerras HMT_medium(); 663c0101509SPaul Mackerras } 664c0101509SPaul Mackerras 665c0101509SPaul Mackerras void kvmhv_p9_set_lpcr(struct kvm_split_mode *sip) 666c0101509SPaul Mackerras { 667c0101509SPaul Mackerras unsigned long rb, set; 668c0101509SPaul Mackerras 669c0101509SPaul Mackerras /* wait for every other thread to get to real mode */ 670c0101509SPaul Mackerras wait_for_sync(sip, PHASE_REALMODE); 671c0101509SPaul Mackerras 672c0101509SPaul Mackerras /* Set LPCR and LPIDR */ 673c0101509SPaul Mackerras mtspr(SPRN_LPCR, sip->lpcr_req); 674c0101509SPaul Mackerras mtspr(SPRN_LPID, sip->lpidr_req); 675c0101509SPaul Mackerras isync(); 676c0101509SPaul Mackerras 677c0101509SPaul Mackerras /* Invalidate the TLB on thread 0 */ 678c0101509SPaul Mackerras if (local_paca->kvm_hstate.tid == 0) { 679c0101509SPaul Mackerras sip->do_set = 0; 680c0101509SPaul Mackerras asm volatile("ptesync" : : : "memory"); 681c0101509SPaul Mackerras for (set = 0; set < POWER9_TLB_SETS_RADIX; ++set) { 682c0101509SPaul Mackerras rb = TLBIEL_INVAL_SET_LPID + 683c0101509SPaul Mackerras (set << TLBIEL_INVAL_SET_SHIFT); 684c0101509SPaul Mackerras asm volatile(PPC_TLBIEL(%0, %1, 0, 0, 0) : : 685c0101509SPaul Mackerras "r" (rb), "r" (0)); 686c0101509SPaul Mackerras } 687c0101509SPaul Mackerras asm volatile("ptesync" : : : "memory"); 688c0101509SPaul Mackerras } 689c0101509SPaul Mackerras 690c0101509SPaul Mackerras /* indicate that we have done so and wait for others */ 691c0101509SPaul Mackerras wait_for_sync(sip, PHASE_SET_LPCR); 692c0101509SPaul Mackerras /* order read of sip->lpcr_sync.allphases vs. sip->do_set */ 693c0101509SPaul Mackerras smp_rmb(); 694c0101509SPaul Mackerras } 695c0101509SPaul Mackerras 696c0101509SPaul Mackerras /* 697c0101509SPaul Mackerras * Called when a thread that has been in the guest needs 698c0101509SPaul Mackerras * to reload the host LPCR value - but only on POWER9 when 699c0101509SPaul Mackerras * running a HPT guest on a radix host. 700c0101509SPaul Mackerras */ 701c0101509SPaul Mackerras void kvmhv_p9_restore_lpcr(struct kvm_split_mode *sip) 702c0101509SPaul Mackerras { 703c0101509SPaul Mackerras /* we're out of the guest... */ 704c0101509SPaul Mackerras wait_for_sync(sip, PHASE_OUT_OF_GUEST); 705c0101509SPaul Mackerras 706c0101509SPaul Mackerras mtspr(SPRN_LPID, 0); 707c0101509SPaul Mackerras mtspr(SPRN_LPCR, sip->host_lpcr); 708c0101509SPaul Mackerras isync(); 709c0101509SPaul Mackerras 710c0101509SPaul Mackerras if (local_paca->kvm_hstate.tid == 0) { 711c0101509SPaul Mackerras sip->do_restore = 0; 712c0101509SPaul Mackerras smp_wmb(); /* order store of do_restore vs. phase */ 713c0101509SPaul Mackerras } 714c0101509SPaul Mackerras 715c0101509SPaul Mackerras wait_for_sync(sip, PHASE_RESET_LPCR); 716c0101509SPaul Mackerras smp_mb(); 717c0101509SPaul Mackerras local_paca->kvm_hstate.kvm_split_mode = NULL; 718c0101509SPaul Mackerras } 719