1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 4 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 5 * 6 * Authors: 7 * Paul Mackerras <paulus@au1.ibm.com> 8 * Alexander Graf <agraf@suse.de> 9 * Kevin Wolf <mail@kevin-wolf.de> 10 * 11 * Description: KVM functions specific to running on Book 3S 12 * processors in hypervisor mode (specifically POWER7 and later). 13 * 14 * This file is derived from arch/powerpc/kvm/book3s.c, 15 * by Alexander Graf <agraf@suse.de>. 16 */ 17 18 #include <linux/kvm_host.h> 19 #include <linux/kernel.h> 20 #include <linux/err.h> 21 #include <linux/slab.h> 22 #include <linux/preempt.h> 23 #include <linux/sched/signal.h> 24 #include <linux/sched/stat.h> 25 #include <linux/delay.h> 26 #include <linux/export.h> 27 #include <linux/fs.h> 28 #include <linux/anon_inodes.h> 29 #include <linux/cpu.h> 30 #include <linux/cpumask.h> 31 #include <linux/spinlock.h> 32 #include <linux/page-flags.h> 33 #include <linux/srcu.h> 34 #include <linux/miscdevice.h> 35 #include <linux/debugfs.h> 36 #include <linux/gfp.h> 37 #include <linux/vmalloc.h> 38 #include <linux/highmem.h> 39 #include <linux/hugetlb.h> 40 #include <linux/kvm_irqfd.h> 41 #include <linux/irqbypass.h> 42 #include <linux/module.h> 43 #include <linux/compiler.h> 44 #include <linux/of.h> 45 46 #include <asm/ftrace.h> 47 #include <asm/reg.h> 48 #include <asm/ppc-opcode.h> 49 #include <asm/asm-prototypes.h> 50 #include <asm/archrandom.h> 51 #include <asm/debug.h> 52 #include <asm/disassemble.h> 53 #include <asm/cputable.h> 54 #include <asm/cacheflush.h> 55 #include <linux/uaccess.h> 56 #include <asm/interrupt.h> 57 #include <asm/io.h> 58 #include <asm/kvm_ppc.h> 59 #include <asm/kvm_book3s.h> 60 #include <asm/mmu_context.h> 61 #include <asm/lppaca.h> 62 #include <asm/pmc.h> 63 #include <asm/processor.h> 64 #include <asm/cputhreads.h> 65 #include <asm/page.h> 66 #include <asm/hvcall.h> 67 #include <asm/switch_to.h> 68 #include <asm/smp.h> 69 #include <asm/dbell.h> 70 #include <asm/hmi.h> 71 #include <asm/pnv-pci.h> 72 #include <asm/mmu.h> 73 #include <asm/opal.h> 74 #include <asm/xics.h> 75 #include <asm/xive.h> 76 #include <asm/hw_breakpoint.h> 77 #include <asm/kvm_book3s_uvmem.h> 78 #include <asm/ultravisor.h> 79 #include <asm/dtl.h> 80 #include <asm/plpar_wrappers.h> 81 82 #include "book3s.h" 83 #include "book3s_hv.h" 84 85 #define CREATE_TRACE_POINTS 86 #include "trace_hv.h" 87 88 /* #define EXIT_DEBUG */ 89 /* #define EXIT_DEBUG_SIMPLE */ 90 /* #define EXIT_DEBUG_INT */ 91 92 /* Used to indicate that a guest page fault needs to be handled */ 93 #define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1) 94 /* Used to indicate that a guest passthrough interrupt needs to be handled */ 95 #define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2) 96 97 /* Used as a "null" value for timebase values */ 98 #define TB_NIL (~(u64)0) 99 100 static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1); 101 102 static int dynamic_mt_modes = 6; 103 module_param(dynamic_mt_modes, int, 0644); 104 MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)"); 105 static int target_smt_mode; 106 module_param(target_smt_mode, int, 0644); 107 MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)"); 108 109 static bool one_vm_per_core; 110 module_param(one_vm_per_core, bool, S_IRUGO | S_IWUSR); 111 MODULE_PARM_DESC(one_vm_per_core, "Only run vCPUs from the same VM on a core (requires POWER8 or older)"); 112 113 #ifdef CONFIG_KVM_XICS 114 static const struct kernel_param_ops module_param_ops = { 115 .set = param_set_int, 116 .get = param_get_int, 117 }; 118 119 module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644); 120 MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization"); 121 122 module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644); 123 MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core"); 124 #endif 125 126 /* If set, guests are allowed to create and control nested guests */ 127 static bool nested = true; 128 module_param(nested, bool, S_IRUGO | S_IWUSR); 129 MODULE_PARM_DESC(nested, "Enable nested virtualization (only on POWER9)"); 130 131 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu); 132 133 /* 134 * RWMR values for POWER8. These control the rate at which PURR 135 * and SPURR count and should be set according to the number of 136 * online threads in the vcore being run. 137 */ 138 #define RWMR_RPA_P8_1THREAD 0x164520C62609AECAUL 139 #define RWMR_RPA_P8_2THREAD 0x7FFF2908450D8DA9UL 140 #define RWMR_RPA_P8_3THREAD 0x164520C62609AECAUL 141 #define RWMR_RPA_P8_4THREAD 0x199A421245058DA9UL 142 #define RWMR_RPA_P8_5THREAD 0x164520C62609AECAUL 143 #define RWMR_RPA_P8_6THREAD 0x164520C62609AECAUL 144 #define RWMR_RPA_P8_7THREAD 0x164520C62609AECAUL 145 #define RWMR_RPA_P8_8THREAD 0x164520C62609AECAUL 146 147 static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = { 148 RWMR_RPA_P8_1THREAD, 149 RWMR_RPA_P8_1THREAD, 150 RWMR_RPA_P8_2THREAD, 151 RWMR_RPA_P8_3THREAD, 152 RWMR_RPA_P8_4THREAD, 153 RWMR_RPA_P8_5THREAD, 154 RWMR_RPA_P8_6THREAD, 155 RWMR_RPA_P8_7THREAD, 156 RWMR_RPA_P8_8THREAD, 157 }; 158 159 static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc, 160 int *ip) 161 { 162 int i = *ip; 163 struct kvm_vcpu *vcpu; 164 165 while (++i < MAX_SMT_THREADS) { 166 vcpu = READ_ONCE(vc->runnable_threads[i]); 167 if (vcpu) { 168 *ip = i; 169 return vcpu; 170 } 171 } 172 return NULL; 173 } 174 175 /* Used to traverse the list of runnable threads for a given vcore */ 176 #define for_each_runnable_thread(i, vcpu, vc) \ 177 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); ) 178 179 static bool kvmppc_ipi_thread(int cpu) 180 { 181 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 182 183 /* If we're a nested hypervisor, fall back to ordinary IPIs for now */ 184 if (kvmhv_on_pseries()) 185 return false; 186 187 /* On POWER9 we can use msgsnd to IPI any cpu */ 188 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 189 msg |= get_hard_smp_processor_id(cpu); 190 smp_mb(); 191 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 192 return true; 193 } 194 195 /* On POWER8 for IPIs to threads in the same core, use msgsnd */ 196 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 197 preempt_disable(); 198 if (cpu_first_thread_sibling(cpu) == 199 cpu_first_thread_sibling(smp_processor_id())) { 200 msg |= cpu_thread_in_core(cpu); 201 smp_mb(); 202 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 203 preempt_enable(); 204 return true; 205 } 206 preempt_enable(); 207 } 208 209 #if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP) 210 if (cpu >= 0 && cpu < nr_cpu_ids) { 211 if (paca_ptrs[cpu]->kvm_hstate.xics_phys) { 212 xics_wake_cpu(cpu); 213 return true; 214 } 215 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY); 216 return true; 217 } 218 #endif 219 220 return false; 221 } 222 223 static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu) 224 { 225 int cpu; 226 struct rcuwait *waitp; 227 228 waitp = kvm_arch_vcpu_get_wait(vcpu); 229 if (rcuwait_wake_up(waitp)) 230 ++vcpu->stat.generic.halt_wakeup; 231 232 cpu = READ_ONCE(vcpu->arch.thread_cpu); 233 if (cpu >= 0 && kvmppc_ipi_thread(cpu)) 234 return; 235 236 /* CPU points to the first thread of the core */ 237 cpu = vcpu->cpu; 238 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu)) 239 smp_send_reschedule(cpu); 240 } 241 242 /* 243 * We use the vcpu_load/put functions to measure stolen time. 244 * Stolen time is counted as time when either the vcpu is able to 245 * run as part of a virtual core, but the task running the vcore 246 * is preempted or sleeping, or when the vcpu needs something done 247 * in the kernel by the task running the vcpu, but that task is 248 * preempted or sleeping. Those two things have to be counted 249 * separately, since one of the vcpu tasks will take on the job 250 * of running the core, and the other vcpu tasks in the vcore will 251 * sleep waiting for it to do that, but that sleep shouldn't count 252 * as stolen time. 253 * 254 * Hence we accumulate stolen time when the vcpu can run as part of 255 * a vcore using vc->stolen_tb, and the stolen time when the vcpu 256 * needs its task to do other things in the kernel (for example, 257 * service a page fault) in busy_stolen. We don't accumulate 258 * stolen time for a vcore when it is inactive, or for a vcpu 259 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of 260 * a misnomer; it means that the vcpu task is not executing in 261 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in 262 * the kernel. We don't have any way of dividing up that time 263 * between time that the vcpu is genuinely stopped, time that 264 * the task is actively working on behalf of the vcpu, and time 265 * that the task is preempted, so we don't count any of it as 266 * stolen. 267 * 268 * Updates to busy_stolen are protected by arch.tbacct_lock; 269 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock 270 * lock. The stolen times are measured in units of timebase ticks. 271 * (Note that the != TB_NIL checks below are purely defensive; 272 * they should never fail.) 273 */ 274 275 static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc, u64 tb) 276 { 277 unsigned long flags; 278 279 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 280 281 spin_lock_irqsave(&vc->stoltb_lock, flags); 282 vc->preempt_tb = tb; 283 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 284 } 285 286 static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc, u64 tb) 287 { 288 unsigned long flags; 289 290 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 291 292 spin_lock_irqsave(&vc->stoltb_lock, flags); 293 if (vc->preempt_tb != TB_NIL) { 294 vc->stolen_tb += tb - vc->preempt_tb; 295 vc->preempt_tb = TB_NIL; 296 } 297 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 298 } 299 300 static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu) 301 { 302 struct kvmppc_vcore *vc = vcpu->arch.vcore; 303 unsigned long flags; 304 u64 now; 305 306 if (cpu_has_feature(CPU_FTR_ARCH_300)) 307 return; 308 309 now = mftb(); 310 311 /* 312 * We can test vc->runner without taking the vcore lock, 313 * because only this task ever sets vc->runner to this 314 * vcpu, and once it is set to this vcpu, only this task 315 * ever sets it to NULL. 316 */ 317 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 318 kvmppc_core_end_stolen(vc, now); 319 320 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 321 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST && 322 vcpu->arch.busy_preempt != TB_NIL) { 323 vcpu->arch.busy_stolen += now - vcpu->arch.busy_preempt; 324 vcpu->arch.busy_preempt = TB_NIL; 325 } 326 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 327 } 328 329 static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu) 330 { 331 struct kvmppc_vcore *vc = vcpu->arch.vcore; 332 unsigned long flags; 333 u64 now; 334 335 if (cpu_has_feature(CPU_FTR_ARCH_300)) 336 return; 337 338 now = mftb(); 339 340 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 341 kvmppc_core_start_stolen(vc, now); 342 343 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 344 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST) 345 vcpu->arch.busy_preempt = now; 346 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 347 } 348 349 static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr) 350 { 351 vcpu->arch.pvr = pvr; 352 } 353 354 /* Dummy value used in computing PCR value below */ 355 #define PCR_ARCH_31 (PCR_ARCH_300 << 1) 356 357 static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat) 358 { 359 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0; 360 struct kvmppc_vcore *vc = vcpu->arch.vcore; 361 362 /* We can (emulate) our own architecture version and anything older */ 363 if (cpu_has_feature(CPU_FTR_ARCH_31)) 364 host_pcr_bit = PCR_ARCH_31; 365 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 366 host_pcr_bit = PCR_ARCH_300; 367 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 368 host_pcr_bit = PCR_ARCH_207; 369 else if (cpu_has_feature(CPU_FTR_ARCH_206)) 370 host_pcr_bit = PCR_ARCH_206; 371 else 372 host_pcr_bit = PCR_ARCH_205; 373 374 /* Determine lowest PCR bit needed to run guest in given PVR level */ 375 guest_pcr_bit = host_pcr_bit; 376 if (arch_compat) { 377 switch (arch_compat) { 378 case PVR_ARCH_205: 379 guest_pcr_bit = PCR_ARCH_205; 380 break; 381 case PVR_ARCH_206: 382 case PVR_ARCH_206p: 383 guest_pcr_bit = PCR_ARCH_206; 384 break; 385 case PVR_ARCH_207: 386 guest_pcr_bit = PCR_ARCH_207; 387 break; 388 case PVR_ARCH_300: 389 guest_pcr_bit = PCR_ARCH_300; 390 break; 391 case PVR_ARCH_31: 392 guest_pcr_bit = PCR_ARCH_31; 393 break; 394 default: 395 return -EINVAL; 396 } 397 } 398 399 /* Check requested PCR bits don't exceed our capabilities */ 400 if (guest_pcr_bit > host_pcr_bit) 401 return -EINVAL; 402 403 spin_lock(&vc->lock); 404 vc->arch_compat = arch_compat; 405 /* 406 * Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit 407 * Also set all reserved PCR bits 408 */ 409 vc->pcr = (host_pcr_bit - guest_pcr_bit) | PCR_MASK; 410 spin_unlock(&vc->lock); 411 412 return 0; 413 } 414 415 static void kvmppc_dump_regs(struct kvm_vcpu *vcpu) 416 { 417 int r; 418 419 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id); 420 pr_err("pc = %.16lx msr = %.16llx trap = %x\n", 421 vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap); 422 for (r = 0; r < 16; ++r) 423 pr_err("r%2d = %.16lx r%d = %.16lx\n", 424 r, kvmppc_get_gpr(vcpu, r), 425 r+16, kvmppc_get_gpr(vcpu, r+16)); 426 pr_err("ctr = %.16lx lr = %.16lx\n", 427 vcpu->arch.regs.ctr, vcpu->arch.regs.link); 428 pr_err("srr0 = %.16llx srr1 = %.16llx\n", 429 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1); 430 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n", 431 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1); 432 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n", 433 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3); 434 pr_err("cr = %.8lx xer = %.16lx dsisr = %.8x\n", 435 vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr); 436 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar); 437 pr_err("fault dar = %.16lx dsisr = %.8x\n", 438 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 439 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max); 440 for (r = 0; r < vcpu->arch.slb_max; ++r) 441 pr_err(" ESID = %.16llx VSID = %.16llx\n", 442 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv); 443 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n", 444 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1, 445 vcpu->arch.last_inst); 446 } 447 448 static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id) 449 { 450 return kvm_get_vcpu_by_id(kvm, id); 451 } 452 453 static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa) 454 { 455 vpa->__old_status |= LPPACA_OLD_SHARED_PROC; 456 vpa->yield_count = cpu_to_be32(1); 457 } 458 459 static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v, 460 unsigned long addr, unsigned long len) 461 { 462 /* check address is cacheline aligned */ 463 if (addr & (L1_CACHE_BYTES - 1)) 464 return -EINVAL; 465 spin_lock(&vcpu->arch.vpa_update_lock); 466 if (v->next_gpa != addr || v->len != len) { 467 v->next_gpa = addr; 468 v->len = addr ? len : 0; 469 v->update_pending = 1; 470 } 471 spin_unlock(&vcpu->arch.vpa_update_lock); 472 return 0; 473 } 474 475 /* Length for a per-processor buffer is passed in at offset 4 in the buffer */ 476 struct reg_vpa { 477 u32 dummy; 478 union { 479 __be16 hword; 480 __be32 word; 481 } length; 482 }; 483 484 static int vpa_is_registered(struct kvmppc_vpa *vpap) 485 { 486 if (vpap->update_pending) 487 return vpap->next_gpa != 0; 488 return vpap->pinned_addr != NULL; 489 } 490 491 static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu, 492 unsigned long flags, 493 unsigned long vcpuid, unsigned long vpa) 494 { 495 struct kvm *kvm = vcpu->kvm; 496 unsigned long len, nb; 497 void *va; 498 struct kvm_vcpu *tvcpu; 499 int err; 500 int subfunc; 501 struct kvmppc_vpa *vpap; 502 503 tvcpu = kvmppc_find_vcpu(kvm, vcpuid); 504 if (!tvcpu) 505 return H_PARAMETER; 506 507 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK; 508 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL || 509 subfunc == H_VPA_REG_SLB) { 510 /* Registering new area - address must be cache-line aligned */ 511 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa) 512 return H_PARAMETER; 513 514 /* convert logical addr to kernel addr and read length */ 515 va = kvmppc_pin_guest_page(kvm, vpa, &nb); 516 if (va == NULL) 517 return H_PARAMETER; 518 if (subfunc == H_VPA_REG_VPA) 519 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword); 520 else 521 len = be32_to_cpu(((struct reg_vpa *)va)->length.word); 522 kvmppc_unpin_guest_page(kvm, va, vpa, false); 523 524 /* Check length */ 525 if (len > nb || len < sizeof(struct reg_vpa)) 526 return H_PARAMETER; 527 } else { 528 vpa = 0; 529 len = 0; 530 } 531 532 err = H_PARAMETER; 533 vpap = NULL; 534 spin_lock(&tvcpu->arch.vpa_update_lock); 535 536 switch (subfunc) { 537 case H_VPA_REG_VPA: /* register VPA */ 538 /* 539 * The size of our lppaca is 1kB because of the way we align 540 * it for the guest to avoid crossing a 4kB boundary. We only 541 * use 640 bytes of the structure though, so we should accept 542 * clients that set a size of 640. 543 */ 544 BUILD_BUG_ON(sizeof(struct lppaca) != 640); 545 if (len < sizeof(struct lppaca)) 546 break; 547 vpap = &tvcpu->arch.vpa; 548 err = 0; 549 break; 550 551 case H_VPA_REG_DTL: /* register DTL */ 552 if (len < sizeof(struct dtl_entry)) 553 break; 554 len -= len % sizeof(struct dtl_entry); 555 556 /* Check that they have previously registered a VPA */ 557 err = H_RESOURCE; 558 if (!vpa_is_registered(&tvcpu->arch.vpa)) 559 break; 560 561 vpap = &tvcpu->arch.dtl; 562 err = 0; 563 break; 564 565 case H_VPA_REG_SLB: /* register SLB shadow buffer */ 566 /* Check that they have previously registered a VPA */ 567 err = H_RESOURCE; 568 if (!vpa_is_registered(&tvcpu->arch.vpa)) 569 break; 570 571 vpap = &tvcpu->arch.slb_shadow; 572 err = 0; 573 break; 574 575 case H_VPA_DEREG_VPA: /* deregister VPA */ 576 /* Check they don't still have a DTL or SLB buf registered */ 577 err = H_RESOURCE; 578 if (vpa_is_registered(&tvcpu->arch.dtl) || 579 vpa_is_registered(&tvcpu->arch.slb_shadow)) 580 break; 581 582 vpap = &tvcpu->arch.vpa; 583 err = 0; 584 break; 585 586 case H_VPA_DEREG_DTL: /* deregister DTL */ 587 vpap = &tvcpu->arch.dtl; 588 err = 0; 589 break; 590 591 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */ 592 vpap = &tvcpu->arch.slb_shadow; 593 err = 0; 594 break; 595 } 596 597 if (vpap) { 598 vpap->next_gpa = vpa; 599 vpap->len = len; 600 vpap->update_pending = 1; 601 } 602 603 spin_unlock(&tvcpu->arch.vpa_update_lock); 604 605 return err; 606 } 607 608 static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap) 609 { 610 struct kvm *kvm = vcpu->kvm; 611 void *va; 612 unsigned long nb; 613 unsigned long gpa; 614 615 /* 616 * We need to pin the page pointed to by vpap->next_gpa, 617 * but we can't call kvmppc_pin_guest_page under the lock 618 * as it does get_user_pages() and down_read(). So we 619 * have to drop the lock, pin the page, then get the lock 620 * again and check that a new area didn't get registered 621 * in the meantime. 622 */ 623 for (;;) { 624 gpa = vpap->next_gpa; 625 spin_unlock(&vcpu->arch.vpa_update_lock); 626 va = NULL; 627 nb = 0; 628 if (gpa) 629 va = kvmppc_pin_guest_page(kvm, gpa, &nb); 630 spin_lock(&vcpu->arch.vpa_update_lock); 631 if (gpa == vpap->next_gpa) 632 break; 633 /* sigh... unpin that one and try again */ 634 if (va) 635 kvmppc_unpin_guest_page(kvm, va, gpa, false); 636 } 637 638 vpap->update_pending = 0; 639 if (va && nb < vpap->len) { 640 /* 641 * If it's now too short, it must be that userspace 642 * has changed the mappings underlying guest memory, 643 * so unregister the region. 644 */ 645 kvmppc_unpin_guest_page(kvm, va, gpa, false); 646 va = NULL; 647 } 648 if (vpap->pinned_addr) 649 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa, 650 vpap->dirty); 651 vpap->gpa = gpa; 652 vpap->pinned_addr = va; 653 vpap->dirty = false; 654 if (va) 655 vpap->pinned_end = va + vpap->len; 656 } 657 658 static void kvmppc_update_vpas(struct kvm_vcpu *vcpu) 659 { 660 if (!(vcpu->arch.vpa.update_pending || 661 vcpu->arch.slb_shadow.update_pending || 662 vcpu->arch.dtl.update_pending)) 663 return; 664 665 spin_lock(&vcpu->arch.vpa_update_lock); 666 if (vcpu->arch.vpa.update_pending) { 667 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa); 668 if (vcpu->arch.vpa.pinned_addr) 669 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr); 670 } 671 if (vcpu->arch.dtl.update_pending) { 672 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl); 673 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr; 674 vcpu->arch.dtl_index = 0; 675 } 676 if (vcpu->arch.slb_shadow.update_pending) 677 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow); 678 spin_unlock(&vcpu->arch.vpa_update_lock); 679 } 680 681 /* 682 * Return the accumulated stolen time for the vcore up until `now'. 683 * The caller should hold the vcore lock. 684 */ 685 static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now) 686 { 687 u64 p; 688 unsigned long flags; 689 690 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 691 692 spin_lock_irqsave(&vc->stoltb_lock, flags); 693 p = vc->stolen_tb; 694 if (vc->vcore_state != VCORE_INACTIVE && 695 vc->preempt_tb != TB_NIL) 696 p += now - vc->preempt_tb; 697 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 698 return p; 699 } 700 701 static void __kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu, 702 unsigned int pcpu, u64 now, 703 unsigned long stolen) 704 { 705 struct dtl_entry *dt; 706 struct lppaca *vpa; 707 708 dt = vcpu->arch.dtl_ptr; 709 vpa = vcpu->arch.vpa.pinned_addr; 710 711 if (!dt || !vpa) 712 return; 713 714 dt->dispatch_reason = 7; 715 dt->preempt_reason = 0; 716 dt->processor_id = cpu_to_be16(pcpu + vcpu->arch.ptid); 717 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen); 718 dt->ready_to_enqueue_time = 0; 719 dt->waiting_to_ready_time = 0; 720 dt->timebase = cpu_to_be64(now); 721 dt->fault_addr = 0; 722 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu)); 723 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr); 724 725 ++dt; 726 if (dt == vcpu->arch.dtl.pinned_end) 727 dt = vcpu->arch.dtl.pinned_addr; 728 vcpu->arch.dtl_ptr = dt; 729 /* order writing *dt vs. writing vpa->dtl_idx */ 730 smp_wmb(); 731 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index); 732 vcpu->arch.dtl.dirty = true; 733 } 734 735 static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu, 736 struct kvmppc_vcore *vc) 737 { 738 unsigned long stolen; 739 unsigned long core_stolen; 740 u64 now; 741 unsigned long flags; 742 743 now = mftb(); 744 745 core_stolen = vcore_stolen_time(vc, now); 746 stolen = core_stolen - vcpu->arch.stolen_logged; 747 vcpu->arch.stolen_logged = core_stolen; 748 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 749 stolen += vcpu->arch.busy_stolen; 750 vcpu->arch.busy_stolen = 0; 751 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 752 753 __kvmppc_create_dtl_entry(vcpu, vc->pcpu, now + vc->tb_offset, stolen); 754 } 755 756 /* See if there is a doorbell interrupt pending for a vcpu */ 757 static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu) 758 { 759 int thr; 760 struct kvmppc_vcore *vc; 761 762 if (vcpu->arch.doorbell_request) 763 return true; 764 if (cpu_has_feature(CPU_FTR_ARCH_300)) 765 return false; 766 /* 767 * Ensure that the read of vcore->dpdes comes after the read 768 * of vcpu->doorbell_request. This barrier matches the 769 * smp_wmb() in kvmppc_guest_entry_inject(). 770 */ 771 smp_rmb(); 772 vc = vcpu->arch.vcore; 773 thr = vcpu->vcpu_id - vc->first_vcpuid; 774 return !!(vc->dpdes & (1 << thr)); 775 } 776 777 static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu) 778 { 779 if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207) 780 return true; 781 if ((!vcpu->arch.vcore->arch_compat) && 782 cpu_has_feature(CPU_FTR_ARCH_207S)) 783 return true; 784 return false; 785 } 786 787 static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags, 788 unsigned long resource, unsigned long value1, 789 unsigned long value2) 790 { 791 switch (resource) { 792 case H_SET_MODE_RESOURCE_SET_CIABR: 793 if (!kvmppc_power8_compatible(vcpu)) 794 return H_P2; 795 if (value2) 796 return H_P4; 797 if (mflags) 798 return H_UNSUPPORTED_FLAG_START; 799 /* Guests can't breakpoint the hypervisor */ 800 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER) 801 return H_P3; 802 vcpu->arch.ciabr = value1; 803 return H_SUCCESS; 804 case H_SET_MODE_RESOURCE_SET_DAWR0: 805 if (!kvmppc_power8_compatible(vcpu)) 806 return H_P2; 807 if (!ppc_breakpoint_available()) 808 return H_P2; 809 if (mflags) 810 return H_UNSUPPORTED_FLAG_START; 811 if (value2 & DABRX_HYP) 812 return H_P4; 813 vcpu->arch.dawr0 = value1; 814 vcpu->arch.dawrx0 = value2; 815 return H_SUCCESS; 816 case H_SET_MODE_RESOURCE_SET_DAWR1: 817 if (!kvmppc_power8_compatible(vcpu)) 818 return H_P2; 819 if (!ppc_breakpoint_available()) 820 return H_P2; 821 if (!cpu_has_feature(CPU_FTR_DAWR1)) 822 return H_P2; 823 if (!vcpu->kvm->arch.dawr1_enabled) 824 return H_FUNCTION; 825 if (mflags) 826 return H_UNSUPPORTED_FLAG_START; 827 if (value2 & DABRX_HYP) 828 return H_P4; 829 vcpu->arch.dawr1 = value1; 830 vcpu->arch.dawrx1 = value2; 831 return H_SUCCESS; 832 case H_SET_MODE_RESOURCE_ADDR_TRANS_MODE: 833 /* 834 * KVM does not support mflags=2 (AIL=2) and AIL=1 is reserved. 835 * Keep this in synch with kvmppc_filter_guest_lpcr_hv. 836 */ 837 if (cpu_has_feature(CPU_FTR_P9_RADIX_PREFETCH_BUG) && 838 kvmhv_vcpu_is_radix(vcpu) && mflags == 3) 839 return H_UNSUPPORTED_FLAG_START; 840 return H_TOO_HARD; 841 default: 842 return H_TOO_HARD; 843 } 844 } 845 846 /* Copy guest memory in place - must reside within a single memslot */ 847 static int kvmppc_copy_guest(struct kvm *kvm, gpa_t to, gpa_t from, 848 unsigned long len) 849 { 850 struct kvm_memory_slot *to_memslot = NULL; 851 struct kvm_memory_slot *from_memslot = NULL; 852 unsigned long to_addr, from_addr; 853 int r; 854 855 /* Get HPA for from address */ 856 from_memslot = gfn_to_memslot(kvm, from >> PAGE_SHIFT); 857 if (!from_memslot) 858 return -EFAULT; 859 if ((from + len) >= ((from_memslot->base_gfn + from_memslot->npages) 860 << PAGE_SHIFT)) 861 return -EINVAL; 862 from_addr = gfn_to_hva_memslot(from_memslot, from >> PAGE_SHIFT); 863 if (kvm_is_error_hva(from_addr)) 864 return -EFAULT; 865 from_addr |= (from & (PAGE_SIZE - 1)); 866 867 /* Get HPA for to address */ 868 to_memslot = gfn_to_memslot(kvm, to >> PAGE_SHIFT); 869 if (!to_memslot) 870 return -EFAULT; 871 if ((to + len) >= ((to_memslot->base_gfn + to_memslot->npages) 872 << PAGE_SHIFT)) 873 return -EINVAL; 874 to_addr = gfn_to_hva_memslot(to_memslot, to >> PAGE_SHIFT); 875 if (kvm_is_error_hva(to_addr)) 876 return -EFAULT; 877 to_addr |= (to & (PAGE_SIZE - 1)); 878 879 /* Perform copy */ 880 r = raw_copy_in_user((void __user *)to_addr, (void __user *)from_addr, 881 len); 882 if (r) 883 return -EFAULT; 884 mark_page_dirty(kvm, to >> PAGE_SHIFT); 885 return 0; 886 } 887 888 static long kvmppc_h_page_init(struct kvm_vcpu *vcpu, unsigned long flags, 889 unsigned long dest, unsigned long src) 890 { 891 u64 pg_sz = SZ_4K; /* 4K page size */ 892 u64 pg_mask = SZ_4K - 1; 893 int ret; 894 895 /* Check for invalid flags (H_PAGE_SET_LOANED covers all CMO flags) */ 896 if (flags & ~(H_ICACHE_INVALIDATE | H_ICACHE_SYNCHRONIZE | 897 H_ZERO_PAGE | H_COPY_PAGE | H_PAGE_SET_LOANED)) 898 return H_PARAMETER; 899 900 /* dest (and src if copy_page flag set) must be page aligned */ 901 if ((dest & pg_mask) || ((flags & H_COPY_PAGE) && (src & pg_mask))) 902 return H_PARAMETER; 903 904 /* zero and/or copy the page as determined by the flags */ 905 if (flags & H_COPY_PAGE) { 906 ret = kvmppc_copy_guest(vcpu->kvm, dest, src, pg_sz); 907 if (ret < 0) 908 return H_PARAMETER; 909 } else if (flags & H_ZERO_PAGE) { 910 ret = kvm_clear_guest(vcpu->kvm, dest, pg_sz); 911 if (ret < 0) 912 return H_PARAMETER; 913 } 914 915 /* We can ignore the remaining flags */ 916 917 return H_SUCCESS; 918 } 919 920 static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target) 921 { 922 struct kvmppc_vcore *vcore = target->arch.vcore; 923 924 /* 925 * We expect to have been called by the real mode handler 926 * (kvmppc_rm_h_confer()) which would have directly returned 927 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may 928 * have useful work to do and should not confer) so we don't 929 * recheck that here. 930 * 931 * In the case of the P9 single vcpu per vcore case, the real 932 * mode handler is not called but no other threads are in the 933 * source vcore. 934 */ 935 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 936 spin_lock(&vcore->lock); 937 if (target->arch.state == KVMPPC_VCPU_RUNNABLE && 938 vcore->vcore_state != VCORE_INACTIVE && 939 vcore->runner) 940 target = vcore->runner; 941 spin_unlock(&vcore->lock); 942 } 943 944 return kvm_vcpu_yield_to(target); 945 } 946 947 static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu) 948 { 949 int yield_count = 0; 950 struct lppaca *lppaca; 951 952 spin_lock(&vcpu->arch.vpa_update_lock); 953 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr; 954 if (lppaca) 955 yield_count = be32_to_cpu(lppaca->yield_count); 956 spin_unlock(&vcpu->arch.vpa_update_lock); 957 return yield_count; 958 } 959 960 /* 961 * H_RPT_INVALIDATE hcall handler for nested guests. 962 * 963 * Handles only nested process-scoped invalidation requests in L0. 964 */ 965 static int kvmppc_nested_h_rpt_invalidate(struct kvm_vcpu *vcpu) 966 { 967 unsigned long type = kvmppc_get_gpr(vcpu, 6); 968 unsigned long pid, pg_sizes, start, end; 969 970 /* 971 * The partition-scoped invalidations aren't handled here in L0. 972 */ 973 if (type & H_RPTI_TYPE_NESTED) 974 return RESUME_HOST; 975 976 pid = kvmppc_get_gpr(vcpu, 4); 977 pg_sizes = kvmppc_get_gpr(vcpu, 7); 978 start = kvmppc_get_gpr(vcpu, 8); 979 end = kvmppc_get_gpr(vcpu, 9); 980 981 do_h_rpt_invalidate_prt(pid, vcpu->arch.nested->shadow_lpid, 982 type, pg_sizes, start, end); 983 984 kvmppc_set_gpr(vcpu, 3, H_SUCCESS); 985 return RESUME_GUEST; 986 } 987 988 static long kvmppc_h_rpt_invalidate(struct kvm_vcpu *vcpu, 989 unsigned long id, unsigned long target, 990 unsigned long type, unsigned long pg_sizes, 991 unsigned long start, unsigned long end) 992 { 993 if (!kvm_is_radix(vcpu->kvm)) 994 return H_UNSUPPORTED; 995 996 if (end < start) 997 return H_P5; 998 999 /* 1000 * Partition-scoped invalidation for nested guests. 1001 */ 1002 if (type & H_RPTI_TYPE_NESTED) { 1003 if (!nesting_enabled(vcpu->kvm)) 1004 return H_FUNCTION; 1005 1006 /* Support only cores as target */ 1007 if (target != H_RPTI_TARGET_CMMU) 1008 return H_P2; 1009 1010 return do_h_rpt_invalidate_pat(vcpu, id, type, pg_sizes, 1011 start, end); 1012 } 1013 1014 /* 1015 * Process-scoped invalidation for L1 guests. 1016 */ 1017 do_h_rpt_invalidate_prt(id, vcpu->kvm->arch.lpid, 1018 type, pg_sizes, start, end); 1019 return H_SUCCESS; 1020 } 1021 1022 int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu) 1023 { 1024 struct kvm *kvm = vcpu->kvm; 1025 unsigned long req = kvmppc_get_gpr(vcpu, 3); 1026 unsigned long target, ret = H_SUCCESS; 1027 int yield_count; 1028 struct kvm_vcpu *tvcpu; 1029 int idx, rc; 1030 1031 if (req <= MAX_HCALL_OPCODE && 1032 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls)) 1033 return RESUME_HOST; 1034 1035 switch (req) { 1036 case H_REMOVE: 1037 ret = kvmppc_h_remove(vcpu, kvmppc_get_gpr(vcpu, 4), 1038 kvmppc_get_gpr(vcpu, 5), 1039 kvmppc_get_gpr(vcpu, 6)); 1040 if (ret == H_TOO_HARD) 1041 return RESUME_HOST; 1042 break; 1043 case H_ENTER: 1044 ret = kvmppc_h_enter(vcpu, kvmppc_get_gpr(vcpu, 4), 1045 kvmppc_get_gpr(vcpu, 5), 1046 kvmppc_get_gpr(vcpu, 6), 1047 kvmppc_get_gpr(vcpu, 7)); 1048 if (ret == H_TOO_HARD) 1049 return RESUME_HOST; 1050 break; 1051 case H_READ: 1052 ret = kvmppc_h_read(vcpu, kvmppc_get_gpr(vcpu, 4), 1053 kvmppc_get_gpr(vcpu, 5)); 1054 if (ret == H_TOO_HARD) 1055 return RESUME_HOST; 1056 break; 1057 case H_CLEAR_MOD: 1058 ret = kvmppc_h_clear_mod(vcpu, kvmppc_get_gpr(vcpu, 4), 1059 kvmppc_get_gpr(vcpu, 5)); 1060 if (ret == H_TOO_HARD) 1061 return RESUME_HOST; 1062 break; 1063 case H_CLEAR_REF: 1064 ret = kvmppc_h_clear_ref(vcpu, kvmppc_get_gpr(vcpu, 4), 1065 kvmppc_get_gpr(vcpu, 5)); 1066 if (ret == H_TOO_HARD) 1067 return RESUME_HOST; 1068 break; 1069 case H_PROTECT: 1070 ret = kvmppc_h_protect(vcpu, kvmppc_get_gpr(vcpu, 4), 1071 kvmppc_get_gpr(vcpu, 5), 1072 kvmppc_get_gpr(vcpu, 6)); 1073 if (ret == H_TOO_HARD) 1074 return RESUME_HOST; 1075 break; 1076 case H_BULK_REMOVE: 1077 ret = kvmppc_h_bulk_remove(vcpu); 1078 if (ret == H_TOO_HARD) 1079 return RESUME_HOST; 1080 break; 1081 1082 case H_CEDE: 1083 break; 1084 case H_PROD: 1085 target = kvmppc_get_gpr(vcpu, 4); 1086 tvcpu = kvmppc_find_vcpu(kvm, target); 1087 if (!tvcpu) { 1088 ret = H_PARAMETER; 1089 break; 1090 } 1091 tvcpu->arch.prodded = 1; 1092 smp_mb(); 1093 if (tvcpu->arch.ceded) 1094 kvmppc_fast_vcpu_kick_hv(tvcpu); 1095 break; 1096 case H_CONFER: 1097 target = kvmppc_get_gpr(vcpu, 4); 1098 if (target == -1) 1099 break; 1100 tvcpu = kvmppc_find_vcpu(kvm, target); 1101 if (!tvcpu) { 1102 ret = H_PARAMETER; 1103 break; 1104 } 1105 yield_count = kvmppc_get_gpr(vcpu, 5); 1106 if (kvmppc_get_yield_count(tvcpu) != yield_count) 1107 break; 1108 kvm_arch_vcpu_yield_to(tvcpu); 1109 break; 1110 case H_REGISTER_VPA: 1111 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4), 1112 kvmppc_get_gpr(vcpu, 5), 1113 kvmppc_get_gpr(vcpu, 6)); 1114 break; 1115 case H_RTAS: 1116 if (list_empty(&kvm->arch.rtas_tokens)) 1117 return RESUME_HOST; 1118 1119 idx = srcu_read_lock(&kvm->srcu); 1120 rc = kvmppc_rtas_hcall(vcpu); 1121 srcu_read_unlock(&kvm->srcu, idx); 1122 1123 if (rc == -ENOENT) 1124 return RESUME_HOST; 1125 else if (rc == 0) 1126 break; 1127 1128 /* Send the error out to userspace via KVM_RUN */ 1129 return rc; 1130 case H_LOGICAL_CI_LOAD: 1131 ret = kvmppc_h_logical_ci_load(vcpu); 1132 if (ret == H_TOO_HARD) 1133 return RESUME_HOST; 1134 break; 1135 case H_LOGICAL_CI_STORE: 1136 ret = kvmppc_h_logical_ci_store(vcpu); 1137 if (ret == H_TOO_HARD) 1138 return RESUME_HOST; 1139 break; 1140 case H_SET_MODE: 1141 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4), 1142 kvmppc_get_gpr(vcpu, 5), 1143 kvmppc_get_gpr(vcpu, 6), 1144 kvmppc_get_gpr(vcpu, 7)); 1145 if (ret == H_TOO_HARD) 1146 return RESUME_HOST; 1147 break; 1148 case H_XIRR: 1149 case H_CPPR: 1150 case H_EOI: 1151 case H_IPI: 1152 case H_IPOLL: 1153 case H_XIRR_X: 1154 if (kvmppc_xics_enabled(vcpu)) { 1155 if (xics_on_xive()) { 1156 ret = H_NOT_AVAILABLE; 1157 return RESUME_GUEST; 1158 } 1159 ret = kvmppc_xics_hcall(vcpu, req); 1160 break; 1161 } 1162 return RESUME_HOST; 1163 case H_SET_DABR: 1164 ret = kvmppc_h_set_dabr(vcpu, kvmppc_get_gpr(vcpu, 4)); 1165 break; 1166 case H_SET_XDABR: 1167 ret = kvmppc_h_set_xdabr(vcpu, kvmppc_get_gpr(vcpu, 4), 1168 kvmppc_get_gpr(vcpu, 5)); 1169 break; 1170 #ifdef CONFIG_SPAPR_TCE_IOMMU 1171 case H_GET_TCE: 1172 ret = kvmppc_h_get_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1173 kvmppc_get_gpr(vcpu, 5)); 1174 if (ret == H_TOO_HARD) 1175 return RESUME_HOST; 1176 break; 1177 case H_PUT_TCE: 1178 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1179 kvmppc_get_gpr(vcpu, 5), 1180 kvmppc_get_gpr(vcpu, 6)); 1181 if (ret == H_TOO_HARD) 1182 return RESUME_HOST; 1183 break; 1184 case H_PUT_TCE_INDIRECT: 1185 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4), 1186 kvmppc_get_gpr(vcpu, 5), 1187 kvmppc_get_gpr(vcpu, 6), 1188 kvmppc_get_gpr(vcpu, 7)); 1189 if (ret == H_TOO_HARD) 1190 return RESUME_HOST; 1191 break; 1192 case H_STUFF_TCE: 1193 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1194 kvmppc_get_gpr(vcpu, 5), 1195 kvmppc_get_gpr(vcpu, 6), 1196 kvmppc_get_gpr(vcpu, 7)); 1197 if (ret == H_TOO_HARD) 1198 return RESUME_HOST; 1199 break; 1200 #endif 1201 case H_RANDOM: 1202 if (!arch_get_random_seed_long(&vcpu->arch.regs.gpr[4])) 1203 ret = H_HARDWARE; 1204 break; 1205 case H_RPT_INVALIDATE: 1206 ret = kvmppc_h_rpt_invalidate(vcpu, kvmppc_get_gpr(vcpu, 4), 1207 kvmppc_get_gpr(vcpu, 5), 1208 kvmppc_get_gpr(vcpu, 6), 1209 kvmppc_get_gpr(vcpu, 7), 1210 kvmppc_get_gpr(vcpu, 8), 1211 kvmppc_get_gpr(vcpu, 9)); 1212 break; 1213 1214 case H_SET_PARTITION_TABLE: 1215 ret = H_FUNCTION; 1216 if (nesting_enabled(kvm)) 1217 ret = kvmhv_set_partition_table(vcpu); 1218 break; 1219 case H_ENTER_NESTED: 1220 ret = H_FUNCTION; 1221 if (!nesting_enabled(kvm)) 1222 break; 1223 ret = kvmhv_enter_nested_guest(vcpu); 1224 if (ret == H_INTERRUPT) { 1225 kvmppc_set_gpr(vcpu, 3, 0); 1226 vcpu->arch.hcall_needed = 0; 1227 return -EINTR; 1228 } else if (ret == H_TOO_HARD) { 1229 kvmppc_set_gpr(vcpu, 3, 0); 1230 vcpu->arch.hcall_needed = 0; 1231 return RESUME_HOST; 1232 } 1233 break; 1234 case H_TLB_INVALIDATE: 1235 ret = H_FUNCTION; 1236 if (nesting_enabled(kvm)) 1237 ret = kvmhv_do_nested_tlbie(vcpu); 1238 break; 1239 case H_COPY_TOFROM_GUEST: 1240 ret = H_FUNCTION; 1241 if (nesting_enabled(kvm)) 1242 ret = kvmhv_copy_tofrom_guest_nested(vcpu); 1243 break; 1244 case H_PAGE_INIT: 1245 ret = kvmppc_h_page_init(vcpu, kvmppc_get_gpr(vcpu, 4), 1246 kvmppc_get_gpr(vcpu, 5), 1247 kvmppc_get_gpr(vcpu, 6)); 1248 break; 1249 case H_SVM_PAGE_IN: 1250 ret = H_UNSUPPORTED; 1251 if (kvmppc_get_srr1(vcpu) & MSR_S) 1252 ret = kvmppc_h_svm_page_in(kvm, 1253 kvmppc_get_gpr(vcpu, 4), 1254 kvmppc_get_gpr(vcpu, 5), 1255 kvmppc_get_gpr(vcpu, 6)); 1256 break; 1257 case H_SVM_PAGE_OUT: 1258 ret = H_UNSUPPORTED; 1259 if (kvmppc_get_srr1(vcpu) & MSR_S) 1260 ret = kvmppc_h_svm_page_out(kvm, 1261 kvmppc_get_gpr(vcpu, 4), 1262 kvmppc_get_gpr(vcpu, 5), 1263 kvmppc_get_gpr(vcpu, 6)); 1264 break; 1265 case H_SVM_INIT_START: 1266 ret = H_UNSUPPORTED; 1267 if (kvmppc_get_srr1(vcpu) & MSR_S) 1268 ret = kvmppc_h_svm_init_start(kvm); 1269 break; 1270 case H_SVM_INIT_DONE: 1271 ret = H_UNSUPPORTED; 1272 if (kvmppc_get_srr1(vcpu) & MSR_S) 1273 ret = kvmppc_h_svm_init_done(kvm); 1274 break; 1275 case H_SVM_INIT_ABORT: 1276 /* 1277 * Even if that call is made by the Ultravisor, the SSR1 value 1278 * is the guest context one, with the secure bit clear as it has 1279 * not yet been secured. So we can't check it here. 1280 * Instead the kvm->arch.secure_guest flag is checked inside 1281 * kvmppc_h_svm_init_abort(). 1282 */ 1283 ret = kvmppc_h_svm_init_abort(kvm); 1284 break; 1285 1286 default: 1287 return RESUME_HOST; 1288 } 1289 WARN_ON_ONCE(ret == H_TOO_HARD); 1290 kvmppc_set_gpr(vcpu, 3, ret); 1291 vcpu->arch.hcall_needed = 0; 1292 return RESUME_GUEST; 1293 } 1294 1295 /* 1296 * Handle H_CEDE in the P9 path where we don't call the real-mode hcall 1297 * handlers in book3s_hv_rmhandlers.S. 1298 * 1299 * This has to be done early, not in kvmppc_pseries_do_hcall(), so 1300 * that the cede logic in kvmppc_run_single_vcpu() works properly. 1301 */ 1302 static void kvmppc_cede(struct kvm_vcpu *vcpu) 1303 { 1304 vcpu->arch.shregs.msr |= MSR_EE; 1305 vcpu->arch.ceded = 1; 1306 smp_mb(); 1307 if (vcpu->arch.prodded) { 1308 vcpu->arch.prodded = 0; 1309 smp_mb(); 1310 vcpu->arch.ceded = 0; 1311 } 1312 } 1313 1314 static int kvmppc_hcall_impl_hv(unsigned long cmd) 1315 { 1316 switch (cmd) { 1317 case H_CEDE: 1318 case H_PROD: 1319 case H_CONFER: 1320 case H_REGISTER_VPA: 1321 case H_SET_MODE: 1322 case H_LOGICAL_CI_LOAD: 1323 case H_LOGICAL_CI_STORE: 1324 #ifdef CONFIG_KVM_XICS 1325 case H_XIRR: 1326 case H_CPPR: 1327 case H_EOI: 1328 case H_IPI: 1329 case H_IPOLL: 1330 case H_XIRR_X: 1331 #endif 1332 case H_PAGE_INIT: 1333 case H_RPT_INVALIDATE: 1334 return 1; 1335 } 1336 1337 /* See if it's in the real-mode table */ 1338 return kvmppc_hcall_impl_hv_realmode(cmd); 1339 } 1340 1341 static int kvmppc_emulate_debug_inst(struct kvm_vcpu *vcpu) 1342 { 1343 u32 last_inst; 1344 1345 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) != 1346 EMULATE_DONE) { 1347 /* 1348 * Fetch failed, so return to guest and 1349 * try executing it again. 1350 */ 1351 return RESUME_GUEST; 1352 } 1353 1354 if (last_inst == KVMPPC_INST_SW_BREAKPOINT) { 1355 vcpu->run->exit_reason = KVM_EXIT_DEBUG; 1356 vcpu->run->debug.arch.address = kvmppc_get_pc(vcpu); 1357 return RESUME_HOST; 1358 } else { 1359 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1360 return RESUME_GUEST; 1361 } 1362 } 1363 1364 static void do_nothing(void *x) 1365 { 1366 } 1367 1368 static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu) 1369 { 1370 int thr, cpu, pcpu, nthreads; 1371 struct kvm_vcpu *v; 1372 unsigned long dpdes; 1373 1374 nthreads = vcpu->kvm->arch.emul_smt_mode; 1375 dpdes = 0; 1376 cpu = vcpu->vcpu_id & ~(nthreads - 1); 1377 for (thr = 0; thr < nthreads; ++thr, ++cpu) { 1378 v = kvmppc_find_vcpu(vcpu->kvm, cpu); 1379 if (!v) 1380 continue; 1381 /* 1382 * If the vcpu is currently running on a physical cpu thread, 1383 * interrupt it in order to pull it out of the guest briefly, 1384 * which will update its vcore->dpdes value. 1385 */ 1386 pcpu = READ_ONCE(v->cpu); 1387 if (pcpu >= 0) 1388 smp_call_function_single(pcpu, do_nothing, NULL, 1); 1389 if (kvmppc_doorbell_pending(v)) 1390 dpdes |= 1 << thr; 1391 } 1392 return dpdes; 1393 } 1394 1395 /* 1396 * On POWER9, emulate doorbell-related instructions in order to 1397 * give the guest the illusion of running on a multi-threaded core. 1398 * The instructions emulated are msgsndp, msgclrp, mfspr TIR, 1399 * and mfspr DPDES. 1400 */ 1401 static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu) 1402 { 1403 u32 inst, rb, thr; 1404 unsigned long arg; 1405 struct kvm *kvm = vcpu->kvm; 1406 struct kvm_vcpu *tvcpu; 1407 1408 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE) 1409 return RESUME_GUEST; 1410 if (get_op(inst) != 31) 1411 return EMULATE_FAIL; 1412 rb = get_rb(inst); 1413 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1); 1414 switch (get_xop(inst)) { 1415 case OP_31_XOP_MSGSNDP: 1416 arg = kvmppc_get_gpr(vcpu, rb); 1417 if (((arg >> 27) & 0x1f) != PPC_DBELL_SERVER) 1418 break; 1419 arg &= 0x7f; 1420 if (arg >= kvm->arch.emul_smt_mode) 1421 break; 1422 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg); 1423 if (!tvcpu) 1424 break; 1425 if (!tvcpu->arch.doorbell_request) { 1426 tvcpu->arch.doorbell_request = 1; 1427 kvmppc_fast_vcpu_kick_hv(tvcpu); 1428 } 1429 break; 1430 case OP_31_XOP_MSGCLRP: 1431 arg = kvmppc_get_gpr(vcpu, rb); 1432 if (((arg >> 27) & 0x1f) != PPC_DBELL_SERVER) 1433 break; 1434 vcpu->arch.vcore->dpdes = 0; 1435 vcpu->arch.doorbell_request = 0; 1436 break; 1437 case OP_31_XOP_MFSPR: 1438 switch (get_sprn(inst)) { 1439 case SPRN_TIR: 1440 arg = thr; 1441 break; 1442 case SPRN_DPDES: 1443 arg = kvmppc_read_dpdes(vcpu); 1444 break; 1445 default: 1446 return EMULATE_FAIL; 1447 } 1448 kvmppc_set_gpr(vcpu, get_rt(inst), arg); 1449 break; 1450 default: 1451 return EMULATE_FAIL; 1452 } 1453 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4); 1454 return RESUME_GUEST; 1455 } 1456 1457 /* 1458 * If the lppaca had pmcregs_in_use clear when we exited the guest, then 1459 * HFSCR_PM is cleared for next entry. If the guest then tries to access 1460 * the PMU SPRs, we get this facility unavailable interrupt. Putting HFSCR_PM 1461 * back in the guest HFSCR will cause the next entry to load the PMU SPRs and 1462 * allow the guest access to continue. 1463 */ 1464 static int kvmppc_pmu_unavailable(struct kvm_vcpu *vcpu) 1465 { 1466 if (!(vcpu->arch.hfscr_permitted & HFSCR_PM)) 1467 return EMULATE_FAIL; 1468 1469 vcpu->arch.hfscr |= HFSCR_PM; 1470 1471 return RESUME_GUEST; 1472 } 1473 1474 static int kvmppc_ebb_unavailable(struct kvm_vcpu *vcpu) 1475 { 1476 if (!(vcpu->arch.hfscr_permitted & HFSCR_EBB)) 1477 return EMULATE_FAIL; 1478 1479 vcpu->arch.hfscr |= HFSCR_EBB; 1480 1481 return RESUME_GUEST; 1482 } 1483 1484 static int kvmppc_tm_unavailable(struct kvm_vcpu *vcpu) 1485 { 1486 if (!(vcpu->arch.hfscr_permitted & HFSCR_TM)) 1487 return EMULATE_FAIL; 1488 1489 vcpu->arch.hfscr |= HFSCR_TM; 1490 1491 return RESUME_GUEST; 1492 } 1493 1494 static int kvmppc_handle_exit_hv(struct kvm_vcpu *vcpu, 1495 struct task_struct *tsk) 1496 { 1497 struct kvm_run *run = vcpu->run; 1498 int r = RESUME_HOST; 1499 1500 vcpu->stat.sum_exits++; 1501 1502 /* 1503 * This can happen if an interrupt occurs in the last stages 1504 * of guest entry or the first stages of guest exit (i.e. after 1505 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1506 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1507 * That can happen due to a bug, or due to a machine check 1508 * occurring at just the wrong time. 1509 */ 1510 if (vcpu->arch.shregs.msr & MSR_HV) { 1511 printk(KERN_EMERG "KVM trap in HV mode!\n"); 1512 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1513 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1514 vcpu->arch.shregs.msr); 1515 kvmppc_dump_regs(vcpu); 1516 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1517 run->hw.hardware_exit_reason = vcpu->arch.trap; 1518 return RESUME_HOST; 1519 } 1520 run->exit_reason = KVM_EXIT_UNKNOWN; 1521 run->ready_for_interrupt_injection = 1; 1522 switch (vcpu->arch.trap) { 1523 /* We're good on these - the host merely wanted to get our attention */ 1524 case BOOK3S_INTERRUPT_NESTED_HV_DECREMENTER: 1525 WARN_ON_ONCE(1); /* Should never happen */ 1526 vcpu->arch.trap = BOOK3S_INTERRUPT_HV_DECREMENTER; 1527 fallthrough; 1528 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1529 vcpu->stat.dec_exits++; 1530 r = RESUME_GUEST; 1531 break; 1532 case BOOK3S_INTERRUPT_EXTERNAL: 1533 case BOOK3S_INTERRUPT_H_DOORBELL: 1534 case BOOK3S_INTERRUPT_H_VIRT: 1535 vcpu->stat.ext_intr_exits++; 1536 r = RESUME_GUEST; 1537 break; 1538 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1539 case BOOK3S_INTERRUPT_HMI: 1540 case BOOK3S_INTERRUPT_PERFMON: 1541 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1542 r = RESUME_GUEST; 1543 break; 1544 case BOOK3S_INTERRUPT_MACHINE_CHECK: { 1545 static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, 1546 DEFAULT_RATELIMIT_BURST); 1547 /* 1548 * Print the MCE event to host console. Ratelimit so the guest 1549 * can't flood the host log. 1550 */ 1551 if (__ratelimit(&rs)) 1552 machine_check_print_event_info(&vcpu->arch.mce_evt,false, true); 1553 1554 /* 1555 * If the guest can do FWNMI, exit to userspace so it can 1556 * deliver a FWNMI to the guest. 1557 * Otherwise we synthesize a machine check for the guest 1558 * so that it knows that the machine check occurred. 1559 */ 1560 if (!vcpu->kvm->arch.fwnmi_enabled) { 1561 ulong flags = vcpu->arch.shregs.msr & 0x083c0000; 1562 kvmppc_core_queue_machine_check(vcpu, flags); 1563 r = RESUME_GUEST; 1564 break; 1565 } 1566 1567 /* Exit to guest with KVM_EXIT_NMI as exit reason */ 1568 run->exit_reason = KVM_EXIT_NMI; 1569 run->hw.hardware_exit_reason = vcpu->arch.trap; 1570 /* Clear out the old NMI status from run->flags */ 1571 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK; 1572 /* Now set the NMI status */ 1573 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED) 1574 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV; 1575 else 1576 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV; 1577 1578 r = RESUME_HOST; 1579 break; 1580 } 1581 case BOOK3S_INTERRUPT_PROGRAM: 1582 { 1583 ulong flags; 1584 /* 1585 * Normally program interrupts are delivered directly 1586 * to the guest by the hardware, but we can get here 1587 * as a result of a hypervisor emulation interrupt 1588 * (e40) getting turned into a 700 by BML RTAS. 1589 */ 1590 flags = vcpu->arch.shregs.msr & 0x1f0000ull; 1591 kvmppc_core_queue_program(vcpu, flags); 1592 r = RESUME_GUEST; 1593 break; 1594 } 1595 case BOOK3S_INTERRUPT_SYSCALL: 1596 { 1597 int i; 1598 1599 if (unlikely(vcpu->arch.shregs.msr & MSR_PR)) { 1600 /* 1601 * Guest userspace executed sc 1. This can only be 1602 * reached by the P9 path because the old path 1603 * handles this case in realmode hcall handlers. 1604 */ 1605 if (!kvmhv_vcpu_is_radix(vcpu)) { 1606 /* 1607 * A guest could be running PR KVM, so this 1608 * may be a PR KVM hcall. It must be reflected 1609 * to the guest kernel as a sc interrupt. 1610 */ 1611 kvmppc_core_queue_syscall(vcpu); 1612 } else { 1613 /* 1614 * Radix guests can not run PR KVM or nested HV 1615 * hash guests which might run PR KVM, so this 1616 * is always a privilege fault. Send a program 1617 * check to guest kernel. 1618 */ 1619 kvmppc_core_queue_program(vcpu, SRR1_PROGPRIV); 1620 } 1621 r = RESUME_GUEST; 1622 break; 1623 } 1624 1625 /* 1626 * hcall - gather args and set exit_reason. This will next be 1627 * handled by kvmppc_pseries_do_hcall which may be able to deal 1628 * with it and resume guest, or may punt to userspace. 1629 */ 1630 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3); 1631 for (i = 0; i < 9; ++i) 1632 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i); 1633 run->exit_reason = KVM_EXIT_PAPR_HCALL; 1634 vcpu->arch.hcall_needed = 1; 1635 r = RESUME_HOST; 1636 break; 1637 } 1638 /* 1639 * We get these next two if the guest accesses a page which it thinks 1640 * it has mapped but which is not actually present, either because 1641 * it is for an emulated I/O device or because the corresonding 1642 * host page has been paged out. 1643 * 1644 * Any other HDSI/HISI interrupts have been handled already for P7/8 1645 * guests. For POWER9 hash guests not using rmhandlers, basic hash 1646 * fault handling is done here. 1647 */ 1648 case BOOK3S_INTERRUPT_H_DATA_STORAGE: { 1649 unsigned long vsid; 1650 long err; 1651 1652 if (cpu_has_feature(CPU_FTR_P9_RADIX_PREFETCH_BUG) && 1653 unlikely(vcpu->arch.fault_dsisr == HDSISR_CANARY)) { 1654 r = RESUME_GUEST; /* Just retry if it's the canary */ 1655 break; 1656 } 1657 1658 if (kvm_is_radix(vcpu->kvm) || !cpu_has_feature(CPU_FTR_ARCH_300)) { 1659 /* 1660 * Radix doesn't require anything, and pre-ISAv3.0 hash 1661 * already attempted to handle this in rmhandlers. The 1662 * hash fault handling below is v3 only (it uses ASDR 1663 * via fault_gpa). 1664 */ 1665 r = RESUME_PAGE_FAULT; 1666 break; 1667 } 1668 1669 if (!(vcpu->arch.fault_dsisr & (DSISR_NOHPTE | DSISR_PROTFAULT))) { 1670 kvmppc_core_queue_data_storage(vcpu, 1671 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 1672 r = RESUME_GUEST; 1673 break; 1674 } 1675 1676 if (!(vcpu->arch.shregs.msr & MSR_DR)) 1677 vsid = vcpu->kvm->arch.vrma_slb_v; 1678 else 1679 vsid = vcpu->arch.fault_gpa; 1680 1681 err = kvmppc_hpte_hv_fault(vcpu, vcpu->arch.fault_dar, 1682 vsid, vcpu->arch.fault_dsisr, true); 1683 if (err == 0) { 1684 r = RESUME_GUEST; 1685 } else if (err == -1 || err == -2) { 1686 r = RESUME_PAGE_FAULT; 1687 } else { 1688 kvmppc_core_queue_data_storage(vcpu, 1689 vcpu->arch.fault_dar, err); 1690 r = RESUME_GUEST; 1691 } 1692 break; 1693 } 1694 case BOOK3S_INTERRUPT_H_INST_STORAGE: { 1695 unsigned long vsid; 1696 long err; 1697 1698 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1699 vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr & 1700 DSISR_SRR1_MATCH_64S; 1701 if (kvm_is_radix(vcpu->kvm) || !cpu_has_feature(CPU_FTR_ARCH_300)) { 1702 /* 1703 * Radix doesn't require anything, and pre-ISAv3.0 hash 1704 * already attempted to handle this in rmhandlers. The 1705 * hash fault handling below is v3 only (it uses ASDR 1706 * via fault_gpa). 1707 */ 1708 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1709 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1710 r = RESUME_PAGE_FAULT; 1711 break; 1712 } 1713 1714 if (!(vcpu->arch.fault_dsisr & SRR1_ISI_NOPT)) { 1715 kvmppc_core_queue_inst_storage(vcpu, 1716 vcpu->arch.fault_dsisr); 1717 r = RESUME_GUEST; 1718 break; 1719 } 1720 1721 if (!(vcpu->arch.shregs.msr & MSR_IR)) 1722 vsid = vcpu->kvm->arch.vrma_slb_v; 1723 else 1724 vsid = vcpu->arch.fault_gpa; 1725 1726 err = kvmppc_hpte_hv_fault(vcpu, vcpu->arch.fault_dar, 1727 vsid, vcpu->arch.fault_dsisr, false); 1728 if (err == 0) { 1729 r = RESUME_GUEST; 1730 } else if (err == -1) { 1731 r = RESUME_PAGE_FAULT; 1732 } else { 1733 kvmppc_core_queue_inst_storage(vcpu, err); 1734 r = RESUME_GUEST; 1735 } 1736 break; 1737 } 1738 1739 /* 1740 * This occurs if the guest executes an illegal instruction. 1741 * If the guest debug is disabled, generate a program interrupt 1742 * to the guest. If guest debug is enabled, we need to check 1743 * whether the instruction is a software breakpoint instruction. 1744 * Accordingly return to Guest or Host. 1745 */ 1746 case BOOK3S_INTERRUPT_H_EMUL_ASSIST: 1747 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED) 1748 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ? 1749 swab32(vcpu->arch.emul_inst) : 1750 vcpu->arch.emul_inst; 1751 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) { 1752 r = kvmppc_emulate_debug_inst(vcpu); 1753 } else { 1754 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1755 r = RESUME_GUEST; 1756 } 1757 break; 1758 1759 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1760 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1761 /* 1762 * This occurs for various TM-related instructions that 1763 * we need to emulate on POWER9 DD2.2. We have already 1764 * handled the cases where the guest was in real-suspend 1765 * mode and was transitioning to transactional state. 1766 */ 1767 r = kvmhv_p9_tm_emulation(vcpu); 1768 if (r != -1) 1769 break; 1770 fallthrough; /* go to facility unavailable handler */ 1771 #endif 1772 1773 /* 1774 * This occurs if the guest (kernel or userspace), does something that 1775 * is prohibited by HFSCR. 1776 * On POWER9, this could be a doorbell instruction that we need 1777 * to emulate. 1778 * Otherwise, we just generate a program interrupt to the guest. 1779 */ 1780 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: { 1781 u64 cause = vcpu->arch.hfscr >> 56; 1782 1783 r = EMULATE_FAIL; 1784 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 1785 if (cause == FSCR_MSGP_LG) 1786 r = kvmppc_emulate_doorbell_instr(vcpu); 1787 if (cause == FSCR_PM_LG) 1788 r = kvmppc_pmu_unavailable(vcpu); 1789 if (cause == FSCR_EBB_LG) 1790 r = kvmppc_ebb_unavailable(vcpu); 1791 if (cause == FSCR_TM_LG) 1792 r = kvmppc_tm_unavailable(vcpu); 1793 } 1794 if (r == EMULATE_FAIL) { 1795 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1796 r = RESUME_GUEST; 1797 } 1798 break; 1799 } 1800 1801 case BOOK3S_INTERRUPT_HV_RM_HARD: 1802 r = RESUME_PASSTHROUGH; 1803 break; 1804 default: 1805 kvmppc_dump_regs(vcpu); 1806 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1807 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1808 vcpu->arch.shregs.msr); 1809 run->hw.hardware_exit_reason = vcpu->arch.trap; 1810 r = RESUME_HOST; 1811 break; 1812 } 1813 1814 return r; 1815 } 1816 1817 static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu) 1818 { 1819 struct kvm_nested_guest *nested = vcpu->arch.nested; 1820 int r; 1821 int srcu_idx; 1822 1823 vcpu->stat.sum_exits++; 1824 1825 /* 1826 * This can happen if an interrupt occurs in the last stages 1827 * of guest entry or the first stages of guest exit (i.e. after 1828 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1829 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1830 * That can happen due to a bug, or due to a machine check 1831 * occurring at just the wrong time. 1832 */ 1833 if (vcpu->arch.shregs.msr & MSR_HV) { 1834 pr_emerg("KVM trap in HV mode while nested!\n"); 1835 pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1836 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1837 vcpu->arch.shregs.msr); 1838 kvmppc_dump_regs(vcpu); 1839 return RESUME_HOST; 1840 } 1841 switch (vcpu->arch.trap) { 1842 /* We're good on these - the host merely wanted to get our attention */ 1843 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1844 vcpu->stat.dec_exits++; 1845 r = RESUME_GUEST; 1846 break; 1847 case BOOK3S_INTERRUPT_EXTERNAL: 1848 vcpu->stat.ext_intr_exits++; 1849 r = RESUME_HOST; 1850 break; 1851 case BOOK3S_INTERRUPT_H_DOORBELL: 1852 case BOOK3S_INTERRUPT_H_VIRT: 1853 vcpu->stat.ext_intr_exits++; 1854 r = RESUME_GUEST; 1855 break; 1856 /* These need to go to the nested HV */ 1857 case BOOK3S_INTERRUPT_NESTED_HV_DECREMENTER: 1858 vcpu->arch.trap = BOOK3S_INTERRUPT_HV_DECREMENTER; 1859 vcpu->stat.dec_exits++; 1860 r = RESUME_HOST; 1861 break; 1862 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1863 case BOOK3S_INTERRUPT_HMI: 1864 case BOOK3S_INTERRUPT_PERFMON: 1865 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1866 r = RESUME_GUEST; 1867 break; 1868 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1869 { 1870 static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, 1871 DEFAULT_RATELIMIT_BURST); 1872 /* Pass the machine check to the L1 guest */ 1873 r = RESUME_HOST; 1874 /* Print the MCE event to host console. */ 1875 if (__ratelimit(&rs)) 1876 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true); 1877 break; 1878 } 1879 /* 1880 * We get these next two if the guest accesses a page which it thinks 1881 * it has mapped but which is not actually present, either because 1882 * it is for an emulated I/O device or because the corresonding 1883 * host page has been paged out. 1884 */ 1885 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1886 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1887 r = kvmhv_nested_page_fault(vcpu); 1888 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1889 break; 1890 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1891 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1892 vcpu->arch.fault_dsisr = kvmppc_get_msr(vcpu) & 1893 DSISR_SRR1_MATCH_64S; 1894 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1895 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1896 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1897 r = kvmhv_nested_page_fault(vcpu); 1898 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1899 break; 1900 1901 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1902 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1903 /* 1904 * This occurs for various TM-related instructions that 1905 * we need to emulate on POWER9 DD2.2. We have already 1906 * handled the cases where the guest was in real-suspend 1907 * mode and was transitioning to transactional state. 1908 */ 1909 r = kvmhv_p9_tm_emulation(vcpu); 1910 if (r != -1) 1911 break; 1912 fallthrough; /* go to facility unavailable handler */ 1913 #endif 1914 1915 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: { 1916 u64 cause = vcpu->arch.hfscr >> 56; 1917 1918 /* 1919 * Only pass HFU interrupts to the L1 if the facility is 1920 * permitted but disabled by the L1's HFSCR, otherwise 1921 * the interrupt does not make sense to the L1 so turn 1922 * it into a HEAI. 1923 */ 1924 if (!(vcpu->arch.hfscr_permitted & (1UL << cause)) || 1925 (nested->hfscr & (1UL << cause))) { 1926 vcpu->arch.trap = BOOK3S_INTERRUPT_H_EMUL_ASSIST; 1927 1928 /* 1929 * If the fetch failed, return to guest and 1930 * try executing it again. 1931 */ 1932 r = kvmppc_get_last_inst(vcpu, INST_GENERIC, 1933 &vcpu->arch.emul_inst); 1934 if (r != EMULATE_DONE) 1935 r = RESUME_GUEST; 1936 else 1937 r = RESUME_HOST; 1938 } else { 1939 r = RESUME_HOST; 1940 } 1941 1942 break; 1943 } 1944 1945 case BOOK3S_INTERRUPT_HV_RM_HARD: 1946 vcpu->arch.trap = 0; 1947 r = RESUME_GUEST; 1948 if (!xics_on_xive()) 1949 kvmppc_xics_rm_complete(vcpu, 0); 1950 break; 1951 case BOOK3S_INTERRUPT_SYSCALL: 1952 { 1953 unsigned long req = kvmppc_get_gpr(vcpu, 3); 1954 1955 /* 1956 * The H_RPT_INVALIDATE hcalls issued by nested 1957 * guests for process-scoped invalidations when 1958 * GTSE=0, are handled here in L0. 1959 */ 1960 if (req == H_RPT_INVALIDATE) { 1961 r = kvmppc_nested_h_rpt_invalidate(vcpu); 1962 break; 1963 } 1964 1965 r = RESUME_HOST; 1966 break; 1967 } 1968 default: 1969 r = RESUME_HOST; 1970 break; 1971 } 1972 1973 return r; 1974 } 1975 1976 static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu, 1977 struct kvm_sregs *sregs) 1978 { 1979 int i; 1980 1981 memset(sregs, 0, sizeof(struct kvm_sregs)); 1982 sregs->pvr = vcpu->arch.pvr; 1983 for (i = 0; i < vcpu->arch.slb_max; i++) { 1984 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige; 1985 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; 1986 } 1987 1988 return 0; 1989 } 1990 1991 static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu, 1992 struct kvm_sregs *sregs) 1993 { 1994 int i, j; 1995 1996 /* Only accept the same PVR as the host's, since we can't spoof it */ 1997 if (sregs->pvr != vcpu->arch.pvr) 1998 return -EINVAL; 1999 2000 j = 0; 2001 for (i = 0; i < vcpu->arch.slb_nr; i++) { 2002 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) { 2003 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe; 2004 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv; 2005 ++j; 2006 } 2007 } 2008 vcpu->arch.slb_max = j; 2009 2010 return 0; 2011 } 2012 2013 /* 2014 * Enforce limits on guest LPCR values based on hardware availability, 2015 * guest configuration, and possibly hypervisor support and security 2016 * concerns. 2017 */ 2018 unsigned long kvmppc_filter_lpcr_hv(struct kvm *kvm, unsigned long lpcr) 2019 { 2020 /* LPCR_TC only applies to HPT guests */ 2021 if (kvm_is_radix(kvm)) 2022 lpcr &= ~LPCR_TC; 2023 2024 /* On POWER8 and above, userspace can modify AIL */ 2025 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 2026 lpcr &= ~LPCR_AIL; 2027 if ((lpcr & LPCR_AIL) != LPCR_AIL_3) 2028 lpcr &= ~LPCR_AIL; /* LPCR[AIL]=1/2 is disallowed */ 2029 /* 2030 * On some POWER9s we force AIL off for radix guests to prevent 2031 * executing in MSR[HV]=1 mode with the MMU enabled and PIDR set to 2032 * guest, which can result in Q0 translations with LPID=0 PID=PIDR to 2033 * be cached, which the host TLB management does not expect. 2034 */ 2035 if (kvm_is_radix(kvm) && cpu_has_feature(CPU_FTR_P9_RADIX_PREFETCH_BUG)) 2036 lpcr &= ~LPCR_AIL; 2037 2038 /* 2039 * On POWER9, allow userspace to enable large decrementer for the 2040 * guest, whether or not the host has it enabled. 2041 */ 2042 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 2043 lpcr &= ~LPCR_LD; 2044 2045 return lpcr; 2046 } 2047 2048 static void verify_lpcr(struct kvm *kvm, unsigned long lpcr) 2049 { 2050 if (lpcr != kvmppc_filter_lpcr_hv(kvm, lpcr)) { 2051 WARN_ONCE(1, "lpcr 0x%lx differs from filtered 0x%lx\n", 2052 lpcr, kvmppc_filter_lpcr_hv(kvm, lpcr)); 2053 } 2054 } 2055 2056 static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr, 2057 bool preserve_top32) 2058 { 2059 struct kvm *kvm = vcpu->kvm; 2060 struct kvmppc_vcore *vc = vcpu->arch.vcore; 2061 u64 mask; 2062 2063 spin_lock(&vc->lock); 2064 2065 /* 2066 * Userspace can only modify 2067 * DPFD (default prefetch depth), ILE (interrupt little-endian), 2068 * TC (translation control), AIL (alternate interrupt location), 2069 * LD (large decrementer). 2070 * These are subject to restrictions from kvmppc_filter_lcpr_hv(). 2071 */ 2072 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC | LPCR_AIL | LPCR_LD; 2073 2074 /* Broken 32-bit version of LPCR must not clear top bits */ 2075 if (preserve_top32) 2076 mask &= 0xFFFFFFFF; 2077 2078 new_lpcr = kvmppc_filter_lpcr_hv(kvm, 2079 (vc->lpcr & ~mask) | (new_lpcr & mask)); 2080 2081 /* 2082 * If ILE (interrupt little-endian) has changed, update the 2083 * MSR_LE bit in the intr_msr for each vcpu in this vcore. 2084 */ 2085 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) { 2086 struct kvm_vcpu *vcpu; 2087 int i; 2088 2089 kvm_for_each_vcpu(i, vcpu, kvm) { 2090 if (vcpu->arch.vcore != vc) 2091 continue; 2092 if (new_lpcr & LPCR_ILE) 2093 vcpu->arch.intr_msr |= MSR_LE; 2094 else 2095 vcpu->arch.intr_msr &= ~MSR_LE; 2096 } 2097 } 2098 2099 vc->lpcr = new_lpcr; 2100 2101 spin_unlock(&vc->lock); 2102 } 2103 2104 static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 2105 union kvmppc_one_reg *val) 2106 { 2107 int r = 0; 2108 long int i; 2109 2110 switch (id) { 2111 case KVM_REG_PPC_DEBUG_INST: 2112 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 2113 break; 2114 case KVM_REG_PPC_HIOR: 2115 *val = get_reg_val(id, 0); 2116 break; 2117 case KVM_REG_PPC_DABR: 2118 *val = get_reg_val(id, vcpu->arch.dabr); 2119 break; 2120 case KVM_REG_PPC_DABRX: 2121 *val = get_reg_val(id, vcpu->arch.dabrx); 2122 break; 2123 case KVM_REG_PPC_DSCR: 2124 *val = get_reg_val(id, vcpu->arch.dscr); 2125 break; 2126 case KVM_REG_PPC_PURR: 2127 *val = get_reg_val(id, vcpu->arch.purr); 2128 break; 2129 case KVM_REG_PPC_SPURR: 2130 *val = get_reg_val(id, vcpu->arch.spurr); 2131 break; 2132 case KVM_REG_PPC_AMR: 2133 *val = get_reg_val(id, vcpu->arch.amr); 2134 break; 2135 case KVM_REG_PPC_UAMOR: 2136 *val = get_reg_val(id, vcpu->arch.uamor); 2137 break; 2138 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCR1: 2139 i = id - KVM_REG_PPC_MMCR0; 2140 *val = get_reg_val(id, vcpu->arch.mmcr[i]); 2141 break; 2142 case KVM_REG_PPC_MMCR2: 2143 *val = get_reg_val(id, vcpu->arch.mmcr[2]); 2144 break; 2145 case KVM_REG_PPC_MMCRA: 2146 *val = get_reg_val(id, vcpu->arch.mmcra); 2147 break; 2148 case KVM_REG_PPC_MMCRS: 2149 *val = get_reg_val(id, vcpu->arch.mmcrs); 2150 break; 2151 case KVM_REG_PPC_MMCR3: 2152 *val = get_reg_val(id, vcpu->arch.mmcr[3]); 2153 break; 2154 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 2155 i = id - KVM_REG_PPC_PMC1; 2156 *val = get_reg_val(id, vcpu->arch.pmc[i]); 2157 break; 2158 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 2159 i = id - KVM_REG_PPC_SPMC1; 2160 *val = get_reg_val(id, vcpu->arch.spmc[i]); 2161 break; 2162 case KVM_REG_PPC_SIAR: 2163 *val = get_reg_val(id, vcpu->arch.siar); 2164 break; 2165 case KVM_REG_PPC_SDAR: 2166 *val = get_reg_val(id, vcpu->arch.sdar); 2167 break; 2168 case KVM_REG_PPC_SIER: 2169 *val = get_reg_val(id, vcpu->arch.sier[0]); 2170 break; 2171 case KVM_REG_PPC_SIER2: 2172 *val = get_reg_val(id, vcpu->arch.sier[1]); 2173 break; 2174 case KVM_REG_PPC_SIER3: 2175 *val = get_reg_val(id, vcpu->arch.sier[2]); 2176 break; 2177 case KVM_REG_PPC_IAMR: 2178 *val = get_reg_val(id, vcpu->arch.iamr); 2179 break; 2180 case KVM_REG_PPC_PSPB: 2181 *val = get_reg_val(id, vcpu->arch.pspb); 2182 break; 2183 case KVM_REG_PPC_DPDES: 2184 /* 2185 * On POWER9, where we are emulating msgsndp etc., 2186 * we return 1 bit for each vcpu, which can come from 2187 * either vcore->dpdes or doorbell_request. 2188 * On POWER8, doorbell_request is 0. 2189 */ 2190 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2191 *val = get_reg_val(id, vcpu->arch.doorbell_request); 2192 else 2193 *val = get_reg_val(id, vcpu->arch.vcore->dpdes); 2194 break; 2195 case KVM_REG_PPC_VTB: 2196 *val = get_reg_val(id, vcpu->arch.vcore->vtb); 2197 break; 2198 case KVM_REG_PPC_DAWR: 2199 *val = get_reg_val(id, vcpu->arch.dawr0); 2200 break; 2201 case KVM_REG_PPC_DAWRX: 2202 *val = get_reg_val(id, vcpu->arch.dawrx0); 2203 break; 2204 case KVM_REG_PPC_DAWR1: 2205 *val = get_reg_val(id, vcpu->arch.dawr1); 2206 break; 2207 case KVM_REG_PPC_DAWRX1: 2208 *val = get_reg_val(id, vcpu->arch.dawrx1); 2209 break; 2210 case KVM_REG_PPC_CIABR: 2211 *val = get_reg_val(id, vcpu->arch.ciabr); 2212 break; 2213 case KVM_REG_PPC_CSIGR: 2214 *val = get_reg_val(id, vcpu->arch.csigr); 2215 break; 2216 case KVM_REG_PPC_TACR: 2217 *val = get_reg_val(id, vcpu->arch.tacr); 2218 break; 2219 case KVM_REG_PPC_TCSCR: 2220 *val = get_reg_val(id, vcpu->arch.tcscr); 2221 break; 2222 case KVM_REG_PPC_PID: 2223 *val = get_reg_val(id, vcpu->arch.pid); 2224 break; 2225 case KVM_REG_PPC_ACOP: 2226 *val = get_reg_val(id, vcpu->arch.acop); 2227 break; 2228 case KVM_REG_PPC_WORT: 2229 *val = get_reg_val(id, vcpu->arch.wort); 2230 break; 2231 case KVM_REG_PPC_TIDR: 2232 *val = get_reg_val(id, vcpu->arch.tid); 2233 break; 2234 case KVM_REG_PPC_PSSCR: 2235 *val = get_reg_val(id, vcpu->arch.psscr); 2236 break; 2237 case KVM_REG_PPC_VPA_ADDR: 2238 spin_lock(&vcpu->arch.vpa_update_lock); 2239 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa); 2240 spin_unlock(&vcpu->arch.vpa_update_lock); 2241 break; 2242 case KVM_REG_PPC_VPA_SLB: 2243 spin_lock(&vcpu->arch.vpa_update_lock); 2244 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa; 2245 val->vpaval.length = vcpu->arch.slb_shadow.len; 2246 spin_unlock(&vcpu->arch.vpa_update_lock); 2247 break; 2248 case KVM_REG_PPC_VPA_DTL: 2249 spin_lock(&vcpu->arch.vpa_update_lock); 2250 val->vpaval.addr = vcpu->arch.dtl.next_gpa; 2251 val->vpaval.length = vcpu->arch.dtl.len; 2252 spin_unlock(&vcpu->arch.vpa_update_lock); 2253 break; 2254 case KVM_REG_PPC_TB_OFFSET: 2255 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset); 2256 break; 2257 case KVM_REG_PPC_LPCR: 2258 case KVM_REG_PPC_LPCR_64: 2259 *val = get_reg_val(id, vcpu->arch.vcore->lpcr); 2260 break; 2261 case KVM_REG_PPC_PPR: 2262 *val = get_reg_val(id, vcpu->arch.ppr); 2263 break; 2264 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2265 case KVM_REG_PPC_TFHAR: 2266 *val = get_reg_val(id, vcpu->arch.tfhar); 2267 break; 2268 case KVM_REG_PPC_TFIAR: 2269 *val = get_reg_val(id, vcpu->arch.tfiar); 2270 break; 2271 case KVM_REG_PPC_TEXASR: 2272 *val = get_reg_val(id, vcpu->arch.texasr); 2273 break; 2274 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 2275 i = id - KVM_REG_PPC_TM_GPR0; 2276 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]); 2277 break; 2278 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 2279 { 2280 int j; 2281 i = id - KVM_REG_PPC_TM_VSR0; 2282 if (i < 32) 2283 for (j = 0; j < TS_FPRWIDTH; j++) 2284 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j]; 2285 else { 2286 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2287 val->vval = vcpu->arch.vr_tm.vr[i-32]; 2288 else 2289 r = -ENXIO; 2290 } 2291 break; 2292 } 2293 case KVM_REG_PPC_TM_CR: 2294 *val = get_reg_val(id, vcpu->arch.cr_tm); 2295 break; 2296 case KVM_REG_PPC_TM_XER: 2297 *val = get_reg_val(id, vcpu->arch.xer_tm); 2298 break; 2299 case KVM_REG_PPC_TM_LR: 2300 *val = get_reg_val(id, vcpu->arch.lr_tm); 2301 break; 2302 case KVM_REG_PPC_TM_CTR: 2303 *val = get_reg_val(id, vcpu->arch.ctr_tm); 2304 break; 2305 case KVM_REG_PPC_TM_FPSCR: 2306 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr); 2307 break; 2308 case KVM_REG_PPC_TM_AMR: 2309 *val = get_reg_val(id, vcpu->arch.amr_tm); 2310 break; 2311 case KVM_REG_PPC_TM_PPR: 2312 *val = get_reg_val(id, vcpu->arch.ppr_tm); 2313 break; 2314 case KVM_REG_PPC_TM_VRSAVE: 2315 *val = get_reg_val(id, vcpu->arch.vrsave_tm); 2316 break; 2317 case KVM_REG_PPC_TM_VSCR: 2318 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2319 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]); 2320 else 2321 r = -ENXIO; 2322 break; 2323 case KVM_REG_PPC_TM_DSCR: 2324 *val = get_reg_val(id, vcpu->arch.dscr_tm); 2325 break; 2326 case KVM_REG_PPC_TM_TAR: 2327 *val = get_reg_val(id, vcpu->arch.tar_tm); 2328 break; 2329 #endif 2330 case KVM_REG_PPC_ARCH_COMPAT: 2331 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat); 2332 break; 2333 case KVM_REG_PPC_DEC_EXPIRY: 2334 *val = get_reg_val(id, vcpu->arch.dec_expires); 2335 break; 2336 case KVM_REG_PPC_ONLINE: 2337 *val = get_reg_val(id, vcpu->arch.online); 2338 break; 2339 case KVM_REG_PPC_PTCR: 2340 *val = get_reg_val(id, vcpu->kvm->arch.l1_ptcr); 2341 break; 2342 default: 2343 r = -EINVAL; 2344 break; 2345 } 2346 2347 return r; 2348 } 2349 2350 static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 2351 union kvmppc_one_reg *val) 2352 { 2353 int r = 0; 2354 long int i; 2355 unsigned long addr, len; 2356 2357 switch (id) { 2358 case KVM_REG_PPC_HIOR: 2359 /* Only allow this to be set to zero */ 2360 if (set_reg_val(id, *val)) 2361 r = -EINVAL; 2362 break; 2363 case KVM_REG_PPC_DABR: 2364 vcpu->arch.dabr = set_reg_val(id, *val); 2365 break; 2366 case KVM_REG_PPC_DABRX: 2367 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP; 2368 break; 2369 case KVM_REG_PPC_DSCR: 2370 vcpu->arch.dscr = set_reg_val(id, *val); 2371 break; 2372 case KVM_REG_PPC_PURR: 2373 vcpu->arch.purr = set_reg_val(id, *val); 2374 break; 2375 case KVM_REG_PPC_SPURR: 2376 vcpu->arch.spurr = set_reg_val(id, *val); 2377 break; 2378 case KVM_REG_PPC_AMR: 2379 vcpu->arch.amr = set_reg_val(id, *val); 2380 break; 2381 case KVM_REG_PPC_UAMOR: 2382 vcpu->arch.uamor = set_reg_val(id, *val); 2383 break; 2384 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCR1: 2385 i = id - KVM_REG_PPC_MMCR0; 2386 vcpu->arch.mmcr[i] = set_reg_val(id, *val); 2387 break; 2388 case KVM_REG_PPC_MMCR2: 2389 vcpu->arch.mmcr[2] = set_reg_val(id, *val); 2390 break; 2391 case KVM_REG_PPC_MMCRA: 2392 vcpu->arch.mmcra = set_reg_val(id, *val); 2393 break; 2394 case KVM_REG_PPC_MMCRS: 2395 vcpu->arch.mmcrs = set_reg_val(id, *val); 2396 break; 2397 case KVM_REG_PPC_MMCR3: 2398 *val = get_reg_val(id, vcpu->arch.mmcr[3]); 2399 break; 2400 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 2401 i = id - KVM_REG_PPC_PMC1; 2402 vcpu->arch.pmc[i] = set_reg_val(id, *val); 2403 break; 2404 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 2405 i = id - KVM_REG_PPC_SPMC1; 2406 vcpu->arch.spmc[i] = set_reg_val(id, *val); 2407 break; 2408 case KVM_REG_PPC_SIAR: 2409 vcpu->arch.siar = set_reg_val(id, *val); 2410 break; 2411 case KVM_REG_PPC_SDAR: 2412 vcpu->arch.sdar = set_reg_val(id, *val); 2413 break; 2414 case KVM_REG_PPC_SIER: 2415 vcpu->arch.sier[0] = set_reg_val(id, *val); 2416 break; 2417 case KVM_REG_PPC_SIER2: 2418 vcpu->arch.sier[1] = set_reg_val(id, *val); 2419 break; 2420 case KVM_REG_PPC_SIER3: 2421 vcpu->arch.sier[2] = set_reg_val(id, *val); 2422 break; 2423 case KVM_REG_PPC_IAMR: 2424 vcpu->arch.iamr = set_reg_val(id, *val); 2425 break; 2426 case KVM_REG_PPC_PSPB: 2427 vcpu->arch.pspb = set_reg_val(id, *val); 2428 break; 2429 case KVM_REG_PPC_DPDES: 2430 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2431 vcpu->arch.doorbell_request = set_reg_val(id, *val) & 1; 2432 else 2433 vcpu->arch.vcore->dpdes = set_reg_val(id, *val); 2434 break; 2435 case KVM_REG_PPC_VTB: 2436 vcpu->arch.vcore->vtb = set_reg_val(id, *val); 2437 break; 2438 case KVM_REG_PPC_DAWR: 2439 vcpu->arch.dawr0 = set_reg_val(id, *val); 2440 break; 2441 case KVM_REG_PPC_DAWRX: 2442 vcpu->arch.dawrx0 = set_reg_val(id, *val) & ~DAWRX_HYP; 2443 break; 2444 case KVM_REG_PPC_DAWR1: 2445 vcpu->arch.dawr1 = set_reg_val(id, *val); 2446 break; 2447 case KVM_REG_PPC_DAWRX1: 2448 vcpu->arch.dawrx1 = set_reg_val(id, *val) & ~DAWRX_HYP; 2449 break; 2450 case KVM_REG_PPC_CIABR: 2451 vcpu->arch.ciabr = set_reg_val(id, *val); 2452 /* Don't allow setting breakpoints in hypervisor code */ 2453 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER) 2454 vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */ 2455 break; 2456 case KVM_REG_PPC_CSIGR: 2457 vcpu->arch.csigr = set_reg_val(id, *val); 2458 break; 2459 case KVM_REG_PPC_TACR: 2460 vcpu->arch.tacr = set_reg_val(id, *val); 2461 break; 2462 case KVM_REG_PPC_TCSCR: 2463 vcpu->arch.tcscr = set_reg_val(id, *val); 2464 break; 2465 case KVM_REG_PPC_PID: 2466 vcpu->arch.pid = set_reg_val(id, *val); 2467 break; 2468 case KVM_REG_PPC_ACOP: 2469 vcpu->arch.acop = set_reg_val(id, *val); 2470 break; 2471 case KVM_REG_PPC_WORT: 2472 vcpu->arch.wort = set_reg_val(id, *val); 2473 break; 2474 case KVM_REG_PPC_TIDR: 2475 vcpu->arch.tid = set_reg_val(id, *val); 2476 break; 2477 case KVM_REG_PPC_PSSCR: 2478 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS; 2479 break; 2480 case KVM_REG_PPC_VPA_ADDR: 2481 addr = set_reg_val(id, *val); 2482 r = -EINVAL; 2483 if (!addr && (vcpu->arch.slb_shadow.next_gpa || 2484 vcpu->arch.dtl.next_gpa)) 2485 break; 2486 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca)); 2487 break; 2488 case KVM_REG_PPC_VPA_SLB: 2489 addr = val->vpaval.addr; 2490 len = val->vpaval.length; 2491 r = -EINVAL; 2492 if (addr && !vcpu->arch.vpa.next_gpa) 2493 break; 2494 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len); 2495 break; 2496 case KVM_REG_PPC_VPA_DTL: 2497 addr = val->vpaval.addr; 2498 len = val->vpaval.length; 2499 r = -EINVAL; 2500 if (addr && (len < sizeof(struct dtl_entry) || 2501 !vcpu->arch.vpa.next_gpa)) 2502 break; 2503 len -= len % sizeof(struct dtl_entry); 2504 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len); 2505 break; 2506 case KVM_REG_PPC_TB_OFFSET: 2507 /* round up to multiple of 2^24 */ 2508 vcpu->arch.vcore->tb_offset = 2509 ALIGN(set_reg_val(id, *val), 1UL << 24); 2510 break; 2511 case KVM_REG_PPC_LPCR: 2512 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true); 2513 break; 2514 case KVM_REG_PPC_LPCR_64: 2515 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false); 2516 break; 2517 case KVM_REG_PPC_PPR: 2518 vcpu->arch.ppr = set_reg_val(id, *val); 2519 break; 2520 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2521 case KVM_REG_PPC_TFHAR: 2522 vcpu->arch.tfhar = set_reg_val(id, *val); 2523 break; 2524 case KVM_REG_PPC_TFIAR: 2525 vcpu->arch.tfiar = set_reg_val(id, *val); 2526 break; 2527 case KVM_REG_PPC_TEXASR: 2528 vcpu->arch.texasr = set_reg_val(id, *val); 2529 break; 2530 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 2531 i = id - KVM_REG_PPC_TM_GPR0; 2532 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val); 2533 break; 2534 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 2535 { 2536 int j; 2537 i = id - KVM_REG_PPC_TM_VSR0; 2538 if (i < 32) 2539 for (j = 0; j < TS_FPRWIDTH; j++) 2540 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j]; 2541 else 2542 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2543 vcpu->arch.vr_tm.vr[i-32] = val->vval; 2544 else 2545 r = -ENXIO; 2546 break; 2547 } 2548 case KVM_REG_PPC_TM_CR: 2549 vcpu->arch.cr_tm = set_reg_val(id, *val); 2550 break; 2551 case KVM_REG_PPC_TM_XER: 2552 vcpu->arch.xer_tm = set_reg_val(id, *val); 2553 break; 2554 case KVM_REG_PPC_TM_LR: 2555 vcpu->arch.lr_tm = set_reg_val(id, *val); 2556 break; 2557 case KVM_REG_PPC_TM_CTR: 2558 vcpu->arch.ctr_tm = set_reg_val(id, *val); 2559 break; 2560 case KVM_REG_PPC_TM_FPSCR: 2561 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val); 2562 break; 2563 case KVM_REG_PPC_TM_AMR: 2564 vcpu->arch.amr_tm = set_reg_val(id, *val); 2565 break; 2566 case KVM_REG_PPC_TM_PPR: 2567 vcpu->arch.ppr_tm = set_reg_val(id, *val); 2568 break; 2569 case KVM_REG_PPC_TM_VRSAVE: 2570 vcpu->arch.vrsave_tm = set_reg_val(id, *val); 2571 break; 2572 case KVM_REG_PPC_TM_VSCR: 2573 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2574 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val); 2575 else 2576 r = - ENXIO; 2577 break; 2578 case KVM_REG_PPC_TM_DSCR: 2579 vcpu->arch.dscr_tm = set_reg_val(id, *val); 2580 break; 2581 case KVM_REG_PPC_TM_TAR: 2582 vcpu->arch.tar_tm = set_reg_val(id, *val); 2583 break; 2584 #endif 2585 case KVM_REG_PPC_ARCH_COMPAT: 2586 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val)); 2587 break; 2588 case KVM_REG_PPC_DEC_EXPIRY: 2589 vcpu->arch.dec_expires = set_reg_val(id, *val); 2590 break; 2591 case KVM_REG_PPC_ONLINE: 2592 i = set_reg_val(id, *val); 2593 if (i && !vcpu->arch.online) 2594 atomic_inc(&vcpu->arch.vcore->online_count); 2595 else if (!i && vcpu->arch.online) 2596 atomic_dec(&vcpu->arch.vcore->online_count); 2597 vcpu->arch.online = i; 2598 break; 2599 case KVM_REG_PPC_PTCR: 2600 vcpu->kvm->arch.l1_ptcr = set_reg_val(id, *val); 2601 break; 2602 default: 2603 r = -EINVAL; 2604 break; 2605 } 2606 2607 return r; 2608 } 2609 2610 /* 2611 * On POWER9, threads are independent and can be in different partitions. 2612 * Therefore we consider each thread to be a subcore. 2613 * There is a restriction that all threads have to be in the same 2614 * MMU mode (radix or HPT), unfortunately, but since we only support 2615 * HPT guests on a HPT host so far, that isn't an impediment yet. 2616 */ 2617 static int threads_per_vcore(struct kvm *kvm) 2618 { 2619 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2620 return 1; 2621 return threads_per_subcore; 2622 } 2623 2624 static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int id) 2625 { 2626 struct kvmppc_vcore *vcore; 2627 2628 vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL); 2629 2630 if (vcore == NULL) 2631 return NULL; 2632 2633 spin_lock_init(&vcore->lock); 2634 spin_lock_init(&vcore->stoltb_lock); 2635 rcuwait_init(&vcore->wait); 2636 vcore->preempt_tb = TB_NIL; 2637 vcore->lpcr = kvm->arch.lpcr; 2638 vcore->first_vcpuid = id; 2639 vcore->kvm = kvm; 2640 INIT_LIST_HEAD(&vcore->preempt_list); 2641 2642 return vcore; 2643 } 2644 2645 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING 2646 static struct debugfs_timings_element { 2647 const char *name; 2648 size_t offset; 2649 } timings[] = { 2650 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)}, 2651 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)}, 2652 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)}, 2653 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)}, 2654 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)}, 2655 }; 2656 2657 #define N_TIMINGS (ARRAY_SIZE(timings)) 2658 2659 struct debugfs_timings_state { 2660 struct kvm_vcpu *vcpu; 2661 unsigned int buflen; 2662 char buf[N_TIMINGS * 100]; 2663 }; 2664 2665 static int debugfs_timings_open(struct inode *inode, struct file *file) 2666 { 2667 struct kvm_vcpu *vcpu = inode->i_private; 2668 struct debugfs_timings_state *p; 2669 2670 p = kzalloc(sizeof(*p), GFP_KERNEL); 2671 if (!p) 2672 return -ENOMEM; 2673 2674 kvm_get_kvm(vcpu->kvm); 2675 p->vcpu = vcpu; 2676 file->private_data = p; 2677 2678 return nonseekable_open(inode, file); 2679 } 2680 2681 static int debugfs_timings_release(struct inode *inode, struct file *file) 2682 { 2683 struct debugfs_timings_state *p = file->private_data; 2684 2685 kvm_put_kvm(p->vcpu->kvm); 2686 kfree(p); 2687 return 0; 2688 } 2689 2690 static ssize_t debugfs_timings_read(struct file *file, char __user *buf, 2691 size_t len, loff_t *ppos) 2692 { 2693 struct debugfs_timings_state *p = file->private_data; 2694 struct kvm_vcpu *vcpu = p->vcpu; 2695 char *s, *buf_end; 2696 struct kvmhv_tb_accumulator tb; 2697 u64 count; 2698 loff_t pos; 2699 ssize_t n; 2700 int i, loops; 2701 bool ok; 2702 2703 if (!p->buflen) { 2704 s = p->buf; 2705 buf_end = s + sizeof(p->buf); 2706 for (i = 0; i < N_TIMINGS; ++i) { 2707 struct kvmhv_tb_accumulator *acc; 2708 2709 acc = (struct kvmhv_tb_accumulator *) 2710 ((unsigned long)vcpu + timings[i].offset); 2711 ok = false; 2712 for (loops = 0; loops < 1000; ++loops) { 2713 count = acc->seqcount; 2714 if (!(count & 1)) { 2715 smp_rmb(); 2716 tb = *acc; 2717 smp_rmb(); 2718 if (count == acc->seqcount) { 2719 ok = true; 2720 break; 2721 } 2722 } 2723 udelay(1); 2724 } 2725 if (!ok) 2726 snprintf(s, buf_end - s, "%s: stuck\n", 2727 timings[i].name); 2728 else 2729 snprintf(s, buf_end - s, 2730 "%s: %llu %llu %llu %llu\n", 2731 timings[i].name, count / 2, 2732 tb_to_ns(tb.tb_total), 2733 tb_to_ns(tb.tb_min), 2734 tb_to_ns(tb.tb_max)); 2735 s += strlen(s); 2736 } 2737 p->buflen = s - p->buf; 2738 } 2739 2740 pos = *ppos; 2741 if (pos >= p->buflen) 2742 return 0; 2743 if (len > p->buflen - pos) 2744 len = p->buflen - pos; 2745 n = copy_to_user(buf, p->buf + pos, len); 2746 if (n) { 2747 if (n == len) 2748 return -EFAULT; 2749 len -= n; 2750 } 2751 *ppos = pos + len; 2752 return len; 2753 } 2754 2755 static ssize_t debugfs_timings_write(struct file *file, const char __user *buf, 2756 size_t len, loff_t *ppos) 2757 { 2758 return -EACCES; 2759 } 2760 2761 static const struct file_operations debugfs_timings_ops = { 2762 .owner = THIS_MODULE, 2763 .open = debugfs_timings_open, 2764 .release = debugfs_timings_release, 2765 .read = debugfs_timings_read, 2766 .write = debugfs_timings_write, 2767 .llseek = generic_file_llseek, 2768 }; 2769 2770 /* Create a debugfs directory for the vcpu */ 2771 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2772 { 2773 char buf[16]; 2774 struct kvm *kvm = vcpu->kvm; 2775 2776 snprintf(buf, sizeof(buf), "vcpu%u", id); 2777 vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir); 2778 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir, vcpu, 2779 &debugfs_timings_ops); 2780 } 2781 2782 #else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2783 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2784 { 2785 } 2786 #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2787 2788 static int kvmppc_core_vcpu_create_hv(struct kvm_vcpu *vcpu) 2789 { 2790 int err; 2791 int core; 2792 struct kvmppc_vcore *vcore; 2793 struct kvm *kvm; 2794 unsigned int id; 2795 2796 kvm = vcpu->kvm; 2797 id = vcpu->vcpu_id; 2798 2799 vcpu->arch.shared = &vcpu->arch.shregs; 2800 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 2801 /* 2802 * The shared struct is never shared on HV, 2803 * so we can always use host endianness 2804 */ 2805 #ifdef __BIG_ENDIAN__ 2806 vcpu->arch.shared_big_endian = true; 2807 #else 2808 vcpu->arch.shared_big_endian = false; 2809 #endif 2810 #endif 2811 vcpu->arch.mmcr[0] = MMCR0_FC; 2812 if (cpu_has_feature(CPU_FTR_ARCH_31)) { 2813 vcpu->arch.mmcr[0] |= MMCR0_PMCCEXT; 2814 vcpu->arch.mmcra = MMCRA_BHRB_DISABLE; 2815 } 2816 2817 vcpu->arch.ctrl = CTRL_RUNLATCH; 2818 /* default to host PVR, since we can't spoof it */ 2819 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR)); 2820 spin_lock_init(&vcpu->arch.vpa_update_lock); 2821 spin_lock_init(&vcpu->arch.tbacct_lock); 2822 vcpu->arch.busy_preempt = TB_NIL; 2823 vcpu->arch.shregs.msr = MSR_ME; 2824 vcpu->arch.intr_msr = MSR_SF | MSR_ME; 2825 2826 /* 2827 * Set the default HFSCR for the guest from the host value. 2828 * This value is only used on POWER9. 2829 * On POWER9, we want to virtualize the doorbell facility, so we 2830 * don't set the HFSCR_MSGP bit, and that causes those instructions 2831 * to trap and then we emulate them. 2832 */ 2833 vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB | 2834 HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP | HFSCR_PREFIX; 2835 if (cpu_has_feature(CPU_FTR_HVMODE)) { 2836 vcpu->arch.hfscr &= mfspr(SPRN_HFSCR); 2837 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2838 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 2839 vcpu->arch.hfscr |= HFSCR_TM; 2840 #endif 2841 } 2842 if (cpu_has_feature(CPU_FTR_TM_COMP)) 2843 vcpu->arch.hfscr |= HFSCR_TM; 2844 2845 vcpu->arch.hfscr_permitted = vcpu->arch.hfscr; 2846 2847 /* 2848 * PM, EBB, TM are demand-faulted so start with it clear. 2849 */ 2850 vcpu->arch.hfscr &= ~(HFSCR_PM | HFSCR_EBB | HFSCR_TM); 2851 2852 kvmppc_mmu_book3s_hv_init(vcpu); 2853 2854 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 2855 2856 init_waitqueue_head(&vcpu->arch.cpu_run); 2857 2858 mutex_lock(&kvm->lock); 2859 vcore = NULL; 2860 err = -EINVAL; 2861 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 2862 if (id >= (KVM_MAX_VCPUS * kvm->arch.emul_smt_mode)) { 2863 pr_devel("KVM: VCPU ID too high\n"); 2864 core = KVM_MAX_VCORES; 2865 } else { 2866 BUG_ON(kvm->arch.smt_mode != 1); 2867 core = kvmppc_pack_vcpu_id(kvm, id); 2868 } 2869 } else { 2870 core = id / kvm->arch.smt_mode; 2871 } 2872 if (core < KVM_MAX_VCORES) { 2873 vcore = kvm->arch.vcores[core]; 2874 if (vcore && cpu_has_feature(CPU_FTR_ARCH_300)) { 2875 pr_devel("KVM: collision on id %u", id); 2876 vcore = NULL; 2877 } else if (!vcore) { 2878 /* 2879 * Take mmu_setup_lock for mutual exclusion 2880 * with kvmppc_update_lpcr(). 2881 */ 2882 err = -ENOMEM; 2883 vcore = kvmppc_vcore_create(kvm, 2884 id & ~(kvm->arch.smt_mode - 1)); 2885 mutex_lock(&kvm->arch.mmu_setup_lock); 2886 kvm->arch.vcores[core] = vcore; 2887 kvm->arch.online_vcores++; 2888 mutex_unlock(&kvm->arch.mmu_setup_lock); 2889 } 2890 } 2891 mutex_unlock(&kvm->lock); 2892 2893 if (!vcore) 2894 return err; 2895 2896 spin_lock(&vcore->lock); 2897 ++vcore->num_threads; 2898 spin_unlock(&vcore->lock); 2899 vcpu->arch.vcore = vcore; 2900 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid; 2901 vcpu->arch.thread_cpu = -1; 2902 vcpu->arch.prev_cpu = -1; 2903 2904 vcpu->arch.cpu_type = KVM_CPU_3S_64; 2905 kvmppc_sanity_check(vcpu); 2906 2907 debugfs_vcpu_init(vcpu, id); 2908 2909 return 0; 2910 } 2911 2912 static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode, 2913 unsigned long flags) 2914 { 2915 int err; 2916 int esmt = 0; 2917 2918 if (flags) 2919 return -EINVAL; 2920 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode)) 2921 return -EINVAL; 2922 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 2923 /* 2924 * On POWER8 (or POWER7), the threading mode is "strict", 2925 * so we pack smt_mode vcpus per vcore. 2926 */ 2927 if (smt_mode > threads_per_subcore) 2928 return -EINVAL; 2929 } else { 2930 /* 2931 * On POWER9, the threading mode is "loose", 2932 * so each vcpu gets its own vcore. 2933 */ 2934 esmt = smt_mode; 2935 smt_mode = 1; 2936 } 2937 mutex_lock(&kvm->lock); 2938 err = -EBUSY; 2939 if (!kvm->arch.online_vcores) { 2940 kvm->arch.smt_mode = smt_mode; 2941 kvm->arch.emul_smt_mode = esmt; 2942 err = 0; 2943 } 2944 mutex_unlock(&kvm->lock); 2945 2946 return err; 2947 } 2948 2949 static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa) 2950 { 2951 if (vpa->pinned_addr) 2952 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa, 2953 vpa->dirty); 2954 } 2955 2956 static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu) 2957 { 2958 spin_lock(&vcpu->arch.vpa_update_lock); 2959 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl); 2960 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow); 2961 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa); 2962 spin_unlock(&vcpu->arch.vpa_update_lock); 2963 } 2964 2965 static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu) 2966 { 2967 /* Indicate we want to get back into the guest */ 2968 return 1; 2969 } 2970 2971 static void kvmppc_set_timer(struct kvm_vcpu *vcpu) 2972 { 2973 unsigned long dec_nsec, now; 2974 2975 now = get_tb(); 2976 if (now > kvmppc_dec_expires_host_tb(vcpu)) { 2977 /* decrementer has already gone negative */ 2978 kvmppc_core_queue_dec(vcpu); 2979 kvmppc_core_prepare_to_enter(vcpu); 2980 return; 2981 } 2982 dec_nsec = tb_to_ns(kvmppc_dec_expires_host_tb(vcpu) - now); 2983 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL); 2984 vcpu->arch.timer_running = 1; 2985 } 2986 2987 extern int __kvmppc_vcore_entry(void); 2988 2989 static void kvmppc_remove_runnable(struct kvmppc_vcore *vc, 2990 struct kvm_vcpu *vcpu, u64 tb) 2991 { 2992 u64 now; 2993 2994 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 2995 return; 2996 spin_lock_irq(&vcpu->arch.tbacct_lock); 2997 now = tb; 2998 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) - 2999 vcpu->arch.stolen_logged; 3000 vcpu->arch.busy_preempt = now; 3001 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 3002 spin_unlock_irq(&vcpu->arch.tbacct_lock); 3003 --vc->n_runnable; 3004 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL); 3005 } 3006 3007 static int kvmppc_grab_hwthread(int cpu) 3008 { 3009 struct paca_struct *tpaca; 3010 long timeout = 10000; 3011 3012 tpaca = paca_ptrs[cpu]; 3013 3014 /* Ensure the thread won't go into the kernel if it wakes */ 3015 tpaca->kvm_hstate.kvm_vcpu = NULL; 3016 tpaca->kvm_hstate.kvm_vcore = NULL; 3017 tpaca->kvm_hstate.napping = 0; 3018 smp_wmb(); 3019 tpaca->kvm_hstate.hwthread_req = 1; 3020 3021 /* 3022 * If the thread is already executing in the kernel (e.g. handling 3023 * a stray interrupt), wait for it to get back to nap mode. 3024 * The smp_mb() is to ensure that our setting of hwthread_req 3025 * is visible before we look at hwthread_state, so if this 3026 * races with the code at system_reset_pSeries and the thread 3027 * misses our setting of hwthread_req, we are sure to see its 3028 * setting of hwthread_state, and vice versa. 3029 */ 3030 smp_mb(); 3031 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) { 3032 if (--timeout <= 0) { 3033 pr_err("KVM: couldn't grab cpu %d\n", cpu); 3034 return -EBUSY; 3035 } 3036 udelay(1); 3037 } 3038 return 0; 3039 } 3040 3041 static void kvmppc_release_hwthread(int cpu) 3042 { 3043 struct paca_struct *tpaca; 3044 3045 tpaca = paca_ptrs[cpu]; 3046 tpaca->kvm_hstate.hwthread_req = 0; 3047 tpaca->kvm_hstate.kvm_vcpu = NULL; 3048 tpaca->kvm_hstate.kvm_vcore = NULL; 3049 tpaca->kvm_hstate.kvm_split_mode = NULL; 3050 } 3051 3052 static DEFINE_PER_CPU(struct kvm *, cpu_in_guest); 3053 3054 static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu) 3055 { 3056 struct kvm_nested_guest *nested = vcpu->arch.nested; 3057 cpumask_t *need_tlb_flush; 3058 int i; 3059 3060 if (nested) 3061 need_tlb_flush = &nested->need_tlb_flush; 3062 else 3063 need_tlb_flush = &kvm->arch.need_tlb_flush; 3064 3065 cpu = cpu_first_tlb_thread_sibling(cpu); 3066 for (i = cpu; i <= cpu_last_tlb_thread_sibling(cpu); 3067 i += cpu_tlb_thread_sibling_step()) 3068 cpumask_set_cpu(i, need_tlb_flush); 3069 3070 /* 3071 * Make sure setting of bit in need_tlb_flush precedes testing of 3072 * cpu_in_guest. The matching barrier on the other side is hwsync 3073 * when switching to guest MMU mode, which happens between 3074 * cpu_in_guest being set to the guest kvm, and need_tlb_flush bit 3075 * being tested. 3076 */ 3077 smp_mb(); 3078 3079 for (i = cpu; i <= cpu_last_tlb_thread_sibling(cpu); 3080 i += cpu_tlb_thread_sibling_step()) { 3081 struct kvm *running = *per_cpu_ptr(&cpu_in_guest, i); 3082 3083 if (running == kvm) 3084 smp_call_function_single(i, do_nothing, NULL, 1); 3085 } 3086 } 3087 3088 static void do_migrate_away_vcpu(void *arg) 3089 { 3090 struct kvm_vcpu *vcpu = arg; 3091 struct kvm *kvm = vcpu->kvm; 3092 3093 /* 3094 * If the guest has GTSE, it may execute tlbie, so do a eieio; tlbsync; 3095 * ptesync sequence on the old CPU before migrating to a new one, in 3096 * case we interrupted the guest between a tlbie ; eieio ; 3097 * tlbsync; ptesync sequence. 3098 * 3099 * Otherwise, ptesync is sufficient for ordering tlbiel sequences. 3100 */ 3101 if (kvm->arch.lpcr & LPCR_GTSE) 3102 asm volatile("eieio; tlbsync; ptesync"); 3103 else 3104 asm volatile("ptesync"); 3105 } 3106 3107 static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu) 3108 { 3109 struct kvm_nested_guest *nested = vcpu->arch.nested; 3110 struct kvm *kvm = vcpu->kvm; 3111 int prev_cpu; 3112 3113 if (!cpu_has_feature(CPU_FTR_HVMODE)) 3114 return; 3115 3116 if (nested) 3117 prev_cpu = nested->prev_cpu[vcpu->arch.nested_vcpu_id]; 3118 else 3119 prev_cpu = vcpu->arch.prev_cpu; 3120 3121 /* 3122 * With radix, the guest can do TLB invalidations itself, 3123 * and it could choose to use the local form (tlbiel) if 3124 * it is invalidating a translation that has only ever been 3125 * used on one vcpu. However, that doesn't mean it has 3126 * only ever been used on one physical cpu, since vcpus 3127 * can move around between pcpus. To cope with this, when 3128 * a vcpu moves from one pcpu to another, we need to tell 3129 * any vcpus running on the same core as this vcpu previously 3130 * ran to flush the TLB. 3131 */ 3132 if (prev_cpu != pcpu) { 3133 if (prev_cpu >= 0) { 3134 if (cpu_first_tlb_thread_sibling(prev_cpu) != 3135 cpu_first_tlb_thread_sibling(pcpu)) 3136 radix_flush_cpu(kvm, prev_cpu, vcpu); 3137 3138 smp_call_function_single(prev_cpu, 3139 do_migrate_away_vcpu, vcpu, 1); 3140 } 3141 if (nested) 3142 nested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu; 3143 else 3144 vcpu->arch.prev_cpu = pcpu; 3145 } 3146 } 3147 3148 static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc) 3149 { 3150 int cpu; 3151 struct paca_struct *tpaca; 3152 3153 cpu = vc->pcpu; 3154 if (vcpu) { 3155 if (vcpu->arch.timer_running) { 3156 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 3157 vcpu->arch.timer_running = 0; 3158 } 3159 cpu += vcpu->arch.ptid; 3160 vcpu->cpu = vc->pcpu; 3161 vcpu->arch.thread_cpu = cpu; 3162 } 3163 tpaca = paca_ptrs[cpu]; 3164 tpaca->kvm_hstate.kvm_vcpu = vcpu; 3165 tpaca->kvm_hstate.ptid = cpu - vc->pcpu; 3166 tpaca->kvm_hstate.fake_suspend = 0; 3167 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */ 3168 smp_wmb(); 3169 tpaca->kvm_hstate.kvm_vcore = vc; 3170 if (cpu != smp_processor_id()) 3171 kvmppc_ipi_thread(cpu); 3172 } 3173 3174 static void kvmppc_wait_for_nap(int n_threads) 3175 { 3176 int cpu = smp_processor_id(); 3177 int i, loops; 3178 3179 if (n_threads <= 1) 3180 return; 3181 for (loops = 0; loops < 1000000; ++loops) { 3182 /* 3183 * Check if all threads are finished. 3184 * We set the vcore pointer when starting a thread 3185 * and the thread clears it when finished, so we look 3186 * for any threads that still have a non-NULL vcore ptr. 3187 */ 3188 for (i = 1; i < n_threads; ++i) 3189 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 3190 break; 3191 if (i == n_threads) { 3192 HMT_medium(); 3193 return; 3194 } 3195 HMT_low(); 3196 } 3197 HMT_medium(); 3198 for (i = 1; i < n_threads; ++i) 3199 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 3200 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i); 3201 } 3202 3203 /* 3204 * Check that we are on thread 0 and that any other threads in 3205 * this core are off-line. Then grab the threads so they can't 3206 * enter the kernel. 3207 */ 3208 static int on_primary_thread(void) 3209 { 3210 int cpu = smp_processor_id(); 3211 int thr; 3212 3213 /* Are we on a primary subcore? */ 3214 if (cpu_thread_in_subcore(cpu)) 3215 return 0; 3216 3217 thr = 0; 3218 while (++thr < threads_per_subcore) 3219 if (cpu_online(cpu + thr)) 3220 return 0; 3221 3222 /* Grab all hw threads so they can't go into the kernel */ 3223 for (thr = 1; thr < threads_per_subcore; ++thr) { 3224 if (kvmppc_grab_hwthread(cpu + thr)) { 3225 /* Couldn't grab one; let the others go */ 3226 do { 3227 kvmppc_release_hwthread(cpu + thr); 3228 } while (--thr > 0); 3229 return 0; 3230 } 3231 } 3232 return 1; 3233 } 3234 3235 /* 3236 * A list of virtual cores for each physical CPU. 3237 * These are vcores that could run but their runner VCPU tasks are 3238 * (or may be) preempted. 3239 */ 3240 struct preempted_vcore_list { 3241 struct list_head list; 3242 spinlock_t lock; 3243 }; 3244 3245 static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores); 3246 3247 static void init_vcore_lists(void) 3248 { 3249 int cpu; 3250 3251 for_each_possible_cpu(cpu) { 3252 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu); 3253 spin_lock_init(&lp->lock); 3254 INIT_LIST_HEAD(&lp->list); 3255 } 3256 } 3257 3258 static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc) 3259 { 3260 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 3261 3262 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 3263 3264 vc->vcore_state = VCORE_PREEMPT; 3265 vc->pcpu = smp_processor_id(); 3266 if (vc->num_threads < threads_per_vcore(vc->kvm)) { 3267 spin_lock(&lp->lock); 3268 list_add_tail(&vc->preempt_list, &lp->list); 3269 spin_unlock(&lp->lock); 3270 } 3271 3272 /* Start accumulating stolen time */ 3273 kvmppc_core_start_stolen(vc, mftb()); 3274 } 3275 3276 static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc) 3277 { 3278 struct preempted_vcore_list *lp; 3279 3280 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 3281 3282 kvmppc_core_end_stolen(vc, mftb()); 3283 if (!list_empty(&vc->preempt_list)) { 3284 lp = &per_cpu(preempted_vcores, vc->pcpu); 3285 spin_lock(&lp->lock); 3286 list_del_init(&vc->preempt_list); 3287 spin_unlock(&lp->lock); 3288 } 3289 vc->vcore_state = VCORE_INACTIVE; 3290 } 3291 3292 /* 3293 * This stores information about the virtual cores currently 3294 * assigned to a physical core. 3295 */ 3296 struct core_info { 3297 int n_subcores; 3298 int max_subcore_threads; 3299 int total_threads; 3300 int subcore_threads[MAX_SUBCORES]; 3301 struct kvmppc_vcore *vc[MAX_SUBCORES]; 3302 }; 3303 3304 /* 3305 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7 3306 * respectively in 2-way micro-threading (split-core) mode on POWER8. 3307 */ 3308 static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 }; 3309 3310 static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc) 3311 { 3312 memset(cip, 0, sizeof(*cip)); 3313 cip->n_subcores = 1; 3314 cip->max_subcore_threads = vc->num_threads; 3315 cip->total_threads = vc->num_threads; 3316 cip->subcore_threads[0] = vc->num_threads; 3317 cip->vc[0] = vc; 3318 } 3319 3320 static bool subcore_config_ok(int n_subcores, int n_threads) 3321 { 3322 /* 3323 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way 3324 * split-core mode, with one thread per subcore. 3325 */ 3326 if (cpu_has_feature(CPU_FTR_ARCH_300)) 3327 return n_subcores <= 4 && n_threads == 1; 3328 3329 /* On POWER8, can only dynamically split if unsplit to begin with */ 3330 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS) 3331 return false; 3332 if (n_subcores > MAX_SUBCORES) 3333 return false; 3334 if (n_subcores > 1) { 3335 if (!(dynamic_mt_modes & 2)) 3336 n_subcores = 4; 3337 if (n_subcores > 2 && !(dynamic_mt_modes & 4)) 3338 return false; 3339 } 3340 3341 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS; 3342 } 3343 3344 static void init_vcore_to_run(struct kvmppc_vcore *vc) 3345 { 3346 vc->entry_exit_map = 0; 3347 vc->in_guest = 0; 3348 vc->napping_threads = 0; 3349 vc->conferring_threads = 0; 3350 vc->tb_offset_applied = 0; 3351 } 3352 3353 static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip) 3354 { 3355 int n_threads = vc->num_threads; 3356 int sub; 3357 3358 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 3359 return false; 3360 3361 /* In one_vm_per_core mode, require all vcores to be from the same vm */ 3362 if (one_vm_per_core && vc->kvm != cip->vc[0]->kvm) 3363 return false; 3364 3365 if (n_threads < cip->max_subcore_threads) 3366 n_threads = cip->max_subcore_threads; 3367 if (!subcore_config_ok(cip->n_subcores + 1, n_threads)) 3368 return false; 3369 cip->max_subcore_threads = n_threads; 3370 3371 sub = cip->n_subcores; 3372 ++cip->n_subcores; 3373 cip->total_threads += vc->num_threads; 3374 cip->subcore_threads[sub] = vc->num_threads; 3375 cip->vc[sub] = vc; 3376 init_vcore_to_run(vc); 3377 list_del_init(&vc->preempt_list); 3378 3379 return true; 3380 } 3381 3382 /* 3383 * Work out whether it is possible to piggyback the execution of 3384 * vcore *pvc onto the execution of the other vcores described in *cip. 3385 */ 3386 static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip, 3387 int target_threads) 3388 { 3389 if (cip->total_threads + pvc->num_threads > target_threads) 3390 return false; 3391 3392 return can_dynamic_split(pvc, cip); 3393 } 3394 3395 static void prepare_threads(struct kvmppc_vcore *vc) 3396 { 3397 int i; 3398 struct kvm_vcpu *vcpu; 3399 3400 for_each_runnable_thread(i, vcpu, vc) { 3401 if (signal_pending(vcpu->arch.run_task)) 3402 vcpu->arch.ret = -EINTR; 3403 else if (vcpu->arch.vpa.update_pending || 3404 vcpu->arch.slb_shadow.update_pending || 3405 vcpu->arch.dtl.update_pending) 3406 vcpu->arch.ret = RESUME_GUEST; 3407 else 3408 continue; 3409 kvmppc_remove_runnable(vc, vcpu, mftb()); 3410 wake_up(&vcpu->arch.cpu_run); 3411 } 3412 } 3413 3414 static void collect_piggybacks(struct core_info *cip, int target_threads) 3415 { 3416 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 3417 struct kvmppc_vcore *pvc, *vcnext; 3418 3419 spin_lock(&lp->lock); 3420 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) { 3421 if (!spin_trylock(&pvc->lock)) 3422 continue; 3423 prepare_threads(pvc); 3424 if (!pvc->n_runnable || !pvc->kvm->arch.mmu_ready) { 3425 list_del_init(&pvc->preempt_list); 3426 if (pvc->runner == NULL) { 3427 pvc->vcore_state = VCORE_INACTIVE; 3428 kvmppc_core_end_stolen(pvc, mftb()); 3429 } 3430 spin_unlock(&pvc->lock); 3431 continue; 3432 } 3433 if (!can_piggyback(pvc, cip, target_threads)) { 3434 spin_unlock(&pvc->lock); 3435 continue; 3436 } 3437 kvmppc_core_end_stolen(pvc, mftb()); 3438 pvc->vcore_state = VCORE_PIGGYBACK; 3439 if (cip->total_threads >= target_threads) 3440 break; 3441 } 3442 spin_unlock(&lp->lock); 3443 } 3444 3445 static bool recheck_signals_and_mmu(struct core_info *cip) 3446 { 3447 int sub, i; 3448 struct kvm_vcpu *vcpu; 3449 struct kvmppc_vcore *vc; 3450 3451 for (sub = 0; sub < cip->n_subcores; ++sub) { 3452 vc = cip->vc[sub]; 3453 if (!vc->kvm->arch.mmu_ready) 3454 return true; 3455 for_each_runnable_thread(i, vcpu, vc) 3456 if (signal_pending(vcpu->arch.run_task)) 3457 return true; 3458 } 3459 return false; 3460 } 3461 3462 static void post_guest_process(struct kvmppc_vcore *vc, bool is_master) 3463 { 3464 int still_running = 0, i; 3465 u64 now; 3466 long ret; 3467 struct kvm_vcpu *vcpu; 3468 3469 spin_lock(&vc->lock); 3470 now = get_tb(); 3471 for_each_runnable_thread(i, vcpu, vc) { 3472 /* 3473 * It's safe to unlock the vcore in the loop here, because 3474 * for_each_runnable_thread() is safe against removal of 3475 * the vcpu, and the vcore state is VCORE_EXITING here, 3476 * so any vcpus becoming runnable will have their arch.trap 3477 * set to zero and can't actually run in the guest. 3478 */ 3479 spin_unlock(&vc->lock); 3480 /* cancel pending dec exception if dec is positive */ 3481 if (now < kvmppc_dec_expires_host_tb(vcpu) && 3482 kvmppc_core_pending_dec(vcpu)) 3483 kvmppc_core_dequeue_dec(vcpu); 3484 3485 trace_kvm_guest_exit(vcpu); 3486 3487 ret = RESUME_GUEST; 3488 if (vcpu->arch.trap) 3489 ret = kvmppc_handle_exit_hv(vcpu, 3490 vcpu->arch.run_task); 3491 3492 vcpu->arch.ret = ret; 3493 vcpu->arch.trap = 0; 3494 3495 spin_lock(&vc->lock); 3496 if (is_kvmppc_resume_guest(vcpu->arch.ret)) { 3497 if (vcpu->arch.pending_exceptions) 3498 kvmppc_core_prepare_to_enter(vcpu); 3499 if (vcpu->arch.ceded) 3500 kvmppc_set_timer(vcpu); 3501 else 3502 ++still_running; 3503 } else { 3504 kvmppc_remove_runnable(vc, vcpu, mftb()); 3505 wake_up(&vcpu->arch.cpu_run); 3506 } 3507 } 3508 if (!is_master) { 3509 if (still_running > 0) { 3510 kvmppc_vcore_preempt(vc); 3511 } else if (vc->runner) { 3512 vc->vcore_state = VCORE_PREEMPT; 3513 kvmppc_core_start_stolen(vc, mftb()); 3514 } else { 3515 vc->vcore_state = VCORE_INACTIVE; 3516 } 3517 if (vc->n_runnable > 0 && vc->runner == NULL) { 3518 /* make sure there's a candidate runner awake */ 3519 i = -1; 3520 vcpu = next_runnable_thread(vc, &i); 3521 wake_up(&vcpu->arch.cpu_run); 3522 } 3523 } 3524 spin_unlock(&vc->lock); 3525 } 3526 3527 /* 3528 * Clear core from the list of active host cores as we are about to 3529 * enter the guest. Only do this if it is the primary thread of the 3530 * core (not if a subcore) that is entering the guest. 3531 */ 3532 static inline int kvmppc_clear_host_core(unsigned int cpu) 3533 { 3534 int core; 3535 3536 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 3537 return 0; 3538 /* 3539 * Memory barrier can be omitted here as we will do a smp_wmb() 3540 * later in kvmppc_start_thread and we need ensure that state is 3541 * visible to other CPUs only after we enter guest. 3542 */ 3543 core = cpu >> threads_shift; 3544 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0; 3545 return 0; 3546 } 3547 3548 /* 3549 * Advertise this core as an active host core since we exited the guest 3550 * Only need to do this if it is the primary thread of the core that is 3551 * exiting. 3552 */ 3553 static inline int kvmppc_set_host_core(unsigned int cpu) 3554 { 3555 int core; 3556 3557 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 3558 return 0; 3559 3560 /* 3561 * Memory barrier can be omitted here because we do a spin_unlock 3562 * immediately after this which provides the memory barrier. 3563 */ 3564 core = cpu >> threads_shift; 3565 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1; 3566 return 0; 3567 } 3568 3569 static void set_irq_happened(int trap) 3570 { 3571 switch (trap) { 3572 case BOOK3S_INTERRUPT_EXTERNAL: 3573 local_paca->irq_happened |= PACA_IRQ_EE; 3574 break; 3575 case BOOK3S_INTERRUPT_H_DOORBELL: 3576 local_paca->irq_happened |= PACA_IRQ_DBELL; 3577 break; 3578 case BOOK3S_INTERRUPT_HMI: 3579 local_paca->irq_happened |= PACA_IRQ_HMI; 3580 break; 3581 case BOOK3S_INTERRUPT_SYSTEM_RESET: 3582 replay_system_reset(); 3583 break; 3584 } 3585 } 3586 3587 /* 3588 * Run a set of guest threads on a physical core. 3589 * Called with vc->lock held. 3590 */ 3591 static noinline void kvmppc_run_core(struct kvmppc_vcore *vc) 3592 { 3593 struct kvm_vcpu *vcpu; 3594 int i; 3595 int srcu_idx; 3596 struct core_info core_info; 3597 struct kvmppc_vcore *pvc; 3598 struct kvm_split_mode split_info, *sip; 3599 int split, subcore_size, active; 3600 int sub; 3601 bool thr0_done; 3602 unsigned long cmd_bit, stat_bit; 3603 int pcpu, thr; 3604 int target_threads; 3605 int controlled_threads; 3606 int trap; 3607 bool is_power8; 3608 3609 if (WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300))) 3610 return; 3611 3612 /* 3613 * Remove from the list any threads that have a signal pending 3614 * or need a VPA update done 3615 */ 3616 prepare_threads(vc); 3617 3618 /* if the runner is no longer runnable, let the caller pick a new one */ 3619 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE) 3620 return; 3621 3622 /* 3623 * Initialize *vc. 3624 */ 3625 init_vcore_to_run(vc); 3626 vc->preempt_tb = TB_NIL; 3627 3628 /* 3629 * Number of threads that we will be controlling: the same as 3630 * the number of threads per subcore, except on POWER9, 3631 * where it's 1 because the threads are (mostly) independent. 3632 */ 3633 controlled_threads = threads_per_vcore(vc->kvm); 3634 3635 /* 3636 * Make sure we are running on primary threads, and that secondary 3637 * threads are offline. Also check if the number of threads in this 3638 * guest are greater than the current system threads per guest. 3639 */ 3640 if ((controlled_threads > 1) && 3641 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) { 3642 for_each_runnable_thread(i, vcpu, vc) { 3643 vcpu->arch.ret = -EBUSY; 3644 kvmppc_remove_runnable(vc, vcpu, mftb()); 3645 wake_up(&vcpu->arch.cpu_run); 3646 } 3647 goto out; 3648 } 3649 3650 /* 3651 * See if we could run any other vcores on the physical core 3652 * along with this one. 3653 */ 3654 init_core_info(&core_info, vc); 3655 pcpu = smp_processor_id(); 3656 target_threads = controlled_threads; 3657 if (target_smt_mode && target_smt_mode < target_threads) 3658 target_threads = target_smt_mode; 3659 if (vc->num_threads < target_threads) 3660 collect_piggybacks(&core_info, target_threads); 3661 3662 /* 3663 * Hard-disable interrupts, and check resched flag and signals. 3664 * If we need to reschedule or deliver a signal, clean up 3665 * and return without going into the guest(s). 3666 * If the mmu_ready flag has been cleared, don't go into the 3667 * guest because that means a HPT resize operation is in progress. 3668 */ 3669 local_irq_disable(); 3670 hard_irq_disable(); 3671 if (lazy_irq_pending() || need_resched() || 3672 recheck_signals_and_mmu(&core_info)) { 3673 local_irq_enable(); 3674 vc->vcore_state = VCORE_INACTIVE; 3675 /* Unlock all except the primary vcore */ 3676 for (sub = 1; sub < core_info.n_subcores; ++sub) { 3677 pvc = core_info.vc[sub]; 3678 /* Put back on to the preempted vcores list */ 3679 kvmppc_vcore_preempt(pvc); 3680 spin_unlock(&pvc->lock); 3681 } 3682 for (i = 0; i < controlled_threads; ++i) 3683 kvmppc_release_hwthread(pcpu + i); 3684 return; 3685 } 3686 3687 kvmppc_clear_host_core(pcpu); 3688 3689 /* Decide on micro-threading (split-core) mode */ 3690 subcore_size = threads_per_subcore; 3691 cmd_bit = stat_bit = 0; 3692 split = core_info.n_subcores; 3693 sip = NULL; 3694 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S); 3695 3696 if (split > 1) { 3697 sip = &split_info; 3698 memset(&split_info, 0, sizeof(split_info)); 3699 for (sub = 0; sub < core_info.n_subcores; ++sub) 3700 split_info.vc[sub] = core_info.vc[sub]; 3701 3702 if (is_power8) { 3703 if (split == 2 && (dynamic_mt_modes & 2)) { 3704 cmd_bit = HID0_POWER8_1TO2LPAR; 3705 stat_bit = HID0_POWER8_2LPARMODE; 3706 } else { 3707 split = 4; 3708 cmd_bit = HID0_POWER8_1TO4LPAR; 3709 stat_bit = HID0_POWER8_4LPARMODE; 3710 } 3711 subcore_size = MAX_SMT_THREADS / split; 3712 split_info.rpr = mfspr(SPRN_RPR); 3713 split_info.pmmar = mfspr(SPRN_PMMAR); 3714 split_info.ldbar = mfspr(SPRN_LDBAR); 3715 split_info.subcore_size = subcore_size; 3716 } else { 3717 split_info.subcore_size = 1; 3718 } 3719 3720 /* order writes to split_info before kvm_split_mode pointer */ 3721 smp_wmb(); 3722 } 3723 3724 for (thr = 0; thr < controlled_threads; ++thr) { 3725 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3726 3727 paca->kvm_hstate.napping = 0; 3728 paca->kvm_hstate.kvm_split_mode = sip; 3729 } 3730 3731 /* Initiate micro-threading (split-core) on POWER8 if required */ 3732 if (cmd_bit) { 3733 unsigned long hid0 = mfspr(SPRN_HID0); 3734 3735 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS; 3736 mb(); 3737 mtspr(SPRN_HID0, hid0); 3738 isync(); 3739 for (;;) { 3740 hid0 = mfspr(SPRN_HID0); 3741 if (hid0 & stat_bit) 3742 break; 3743 cpu_relax(); 3744 } 3745 } 3746 3747 /* 3748 * On POWER8, set RWMR register. 3749 * Since it only affects PURR and SPURR, it doesn't affect 3750 * the host, so we don't save/restore the host value. 3751 */ 3752 if (is_power8) { 3753 unsigned long rwmr_val = RWMR_RPA_P8_8THREAD; 3754 int n_online = atomic_read(&vc->online_count); 3755 3756 /* 3757 * Use the 8-thread value if we're doing split-core 3758 * or if the vcore's online count looks bogus. 3759 */ 3760 if (split == 1 && threads_per_subcore == MAX_SMT_THREADS && 3761 n_online >= 1 && n_online <= MAX_SMT_THREADS) 3762 rwmr_val = p8_rwmr_values[n_online]; 3763 mtspr(SPRN_RWMR, rwmr_val); 3764 } 3765 3766 /* Start all the threads */ 3767 active = 0; 3768 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3769 thr = is_power8 ? subcore_thread_map[sub] : sub; 3770 thr0_done = false; 3771 active |= 1 << thr; 3772 pvc = core_info.vc[sub]; 3773 pvc->pcpu = pcpu + thr; 3774 for_each_runnable_thread(i, vcpu, pvc) { 3775 kvmppc_start_thread(vcpu, pvc); 3776 kvmppc_create_dtl_entry(vcpu, pvc); 3777 trace_kvm_guest_enter(vcpu); 3778 if (!vcpu->arch.ptid) 3779 thr0_done = true; 3780 active |= 1 << (thr + vcpu->arch.ptid); 3781 } 3782 /* 3783 * We need to start the first thread of each subcore 3784 * even if it doesn't have a vcpu. 3785 */ 3786 if (!thr0_done) 3787 kvmppc_start_thread(NULL, pvc); 3788 } 3789 3790 /* 3791 * Ensure that split_info.do_nap is set after setting 3792 * the vcore pointer in the PACA of the secondaries. 3793 */ 3794 smp_mb(); 3795 3796 /* 3797 * When doing micro-threading, poke the inactive threads as well. 3798 * This gets them to the nap instruction after kvm_do_nap, 3799 * which reduces the time taken to unsplit later. 3800 */ 3801 if (cmd_bit) { 3802 split_info.do_nap = 1; /* ask secondaries to nap when done */ 3803 for (thr = 1; thr < threads_per_subcore; ++thr) 3804 if (!(active & (1 << thr))) 3805 kvmppc_ipi_thread(pcpu + thr); 3806 } 3807 3808 vc->vcore_state = VCORE_RUNNING; 3809 preempt_disable(); 3810 3811 trace_kvmppc_run_core(vc, 0); 3812 3813 for (sub = 0; sub < core_info.n_subcores; ++sub) 3814 spin_unlock(&core_info.vc[sub]->lock); 3815 3816 guest_enter_irqoff(); 3817 3818 srcu_idx = srcu_read_lock(&vc->kvm->srcu); 3819 3820 this_cpu_disable_ftrace(); 3821 3822 /* 3823 * Interrupts will be enabled once we get into the guest, 3824 * so tell lockdep that we're about to enable interrupts. 3825 */ 3826 trace_hardirqs_on(); 3827 3828 trap = __kvmppc_vcore_entry(); 3829 3830 trace_hardirqs_off(); 3831 3832 this_cpu_enable_ftrace(); 3833 3834 srcu_read_unlock(&vc->kvm->srcu, srcu_idx); 3835 3836 set_irq_happened(trap); 3837 3838 spin_lock(&vc->lock); 3839 /* prevent other vcpu threads from doing kvmppc_start_thread() now */ 3840 vc->vcore_state = VCORE_EXITING; 3841 3842 /* wait for secondary threads to finish writing their state to memory */ 3843 kvmppc_wait_for_nap(controlled_threads); 3844 3845 /* Return to whole-core mode if we split the core earlier */ 3846 if (cmd_bit) { 3847 unsigned long hid0 = mfspr(SPRN_HID0); 3848 unsigned long loops = 0; 3849 3850 hid0 &= ~HID0_POWER8_DYNLPARDIS; 3851 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE; 3852 mb(); 3853 mtspr(SPRN_HID0, hid0); 3854 isync(); 3855 for (;;) { 3856 hid0 = mfspr(SPRN_HID0); 3857 if (!(hid0 & stat_bit)) 3858 break; 3859 cpu_relax(); 3860 ++loops; 3861 } 3862 split_info.do_nap = 0; 3863 } 3864 3865 kvmppc_set_host_core(pcpu); 3866 3867 context_tracking_guest_exit(); 3868 if (!vtime_accounting_enabled_this_cpu()) { 3869 local_irq_enable(); 3870 /* 3871 * Service IRQs here before vtime_account_guest_exit() so any 3872 * ticks that occurred while running the guest are accounted to 3873 * the guest. If vtime accounting is enabled, accounting uses 3874 * TB rather than ticks, so it can be done without enabling 3875 * interrupts here, which has the problem that it accounts 3876 * interrupt processing overhead to the host. 3877 */ 3878 local_irq_disable(); 3879 } 3880 vtime_account_guest_exit(); 3881 3882 local_irq_enable(); 3883 3884 /* Let secondaries go back to the offline loop */ 3885 for (i = 0; i < controlled_threads; ++i) { 3886 kvmppc_release_hwthread(pcpu + i); 3887 if (sip && sip->napped[i]) 3888 kvmppc_ipi_thread(pcpu + i); 3889 } 3890 3891 spin_unlock(&vc->lock); 3892 3893 /* make sure updates to secondary vcpu structs are visible now */ 3894 smp_mb(); 3895 3896 preempt_enable(); 3897 3898 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3899 pvc = core_info.vc[sub]; 3900 post_guest_process(pvc, pvc == vc); 3901 } 3902 3903 spin_lock(&vc->lock); 3904 3905 out: 3906 vc->vcore_state = VCORE_INACTIVE; 3907 trace_kvmppc_run_core(vc, 1); 3908 } 3909 3910 static inline bool hcall_is_xics(unsigned long req) 3911 { 3912 return req == H_EOI || req == H_CPPR || req == H_IPI || 3913 req == H_IPOLL || req == H_XIRR || req == H_XIRR_X; 3914 } 3915 3916 static void vcpu_vpa_increment_dispatch(struct kvm_vcpu *vcpu) 3917 { 3918 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3919 if (lp) { 3920 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3921 lp->yield_count = cpu_to_be32(yield_count); 3922 vcpu->arch.vpa.dirty = 1; 3923 } 3924 } 3925 3926 /* call our hypervisor to load up HV regs and go */ 3927 static int kvmhv_vcpu_entry_p9_nested(struct kvm_vcpu *vcpu, u64 time_limit, unsigned long lpcr, u64 *tb) 3928 { 3929 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3930 unsigned long host_psscr; 3931 unsigned long msr; 3932 struct hv_guest_state hvregs; 3933 struct p9_host_os_sprs host_os_sprs; 3934 s64 dec; 3935 int trap; 3936 3937 msr = mfmsr(); 3938 3939 save_p9_host_os_sprs(&host_os_sprs); 3940 3941 /* 3942 * We need to save and restore the guest visible part of the 3943 * psscr (i.e. using SPRN_PSSCR_PR) since the hypervisor 3944 * doesn't do this for us. Note only required if pseries since 3945 * this is done in kvmhv_vcpu_entry_p9() below otherwise. 3946 */ 3947 host_psscr = mfspr(SPRN_PSSCR_PR); 3948 3949 kvmppc_msr_hard_disable_set_facilities(vcpu, msr); 3950 if (lazy_irq_pending()) 3951 return 0; 3952 3953 if (unlikely(load_vcpu_state(vcpu, &host_os_sprs))) 3954 msr = mfmsr(); /* TM restore can update msr */ 3955 3956 if (vcpu->arch.psscr != host_psscr) 3957 mtspr(SPRN_PSSCR_PR, vcpu->arch.psscr); 3958 3959 kvmhv_save_hv_regs(vcpu, &hvregs); 3960 hvregs.lpcr = lpcr; 3961 vcpu->arch.regs.msr = vcpu->arch.shregs.msr; 3962 hvregs.version = HV_GUEST_STATE_VERSION; 3963 if (vcpu->arch.nested) { 3964 hvregs.lpid = vcpu->arch.nested->shadow_lpid; 3965 hvregs.vcpu_token = vcpu->arch.nested_vcpu_id; 3966 } else { 3967 hvregs.lpid = vcpu->kvm->arch.lpid; 3968 hvregs.vcpu_token = vcpu->vcpu_id; 3969 } 3970 hvregs.hdec_expiry = time_limit; 3971 3972 /* 3973 * When setting DEC, we must always deal with irq_work_raise 3974 * via NMI vs setting DEC. The problem occurs right as we 3975 * switch into guest mode if a NMI hits and sets pending work 3976 * and sets DEC, then that will apply to the guest and not 3977 * bring us back to the host. 3978 * 3979 * irq_work_raise could check a flag (or possibly LPCR[HDICE] 3980 * for example) and set HDEC to 1? That wouldn't solve the 3981 * nested hv case which needs to abort the hcall or zero the 3982 * time limit. 3983 * 3984 * XXX: Another day's problem. 3985 */ 3986 mtspr(SPRN_DEC, kvmppc_dec_expires_host_tb(vcpu) - *tb); 3987 3988 mtspr(SPRN_DAR, vcpu->arch.shregs.dar); 3989 mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr); 3990 switch_pmu_to_guest(vcpu, &host_os_sprs); 3991 trap = plpar_hcall_norets(H_ENTER_NESTED, __pa(&hvregs), 3992 __pa(&vcpu->arch.regs)); 3993 kvmhv_restore_hv_return_state(vcpu, &hvregs); 3994 switch_pmu_to_host(vcpu, &host_os_sprs); 3995 vcpu->arch.shregs.msr = vcpu->arch.regs.msr; 3996 vcpu->arch.shregs.dar = mfspr(SPRN_DAR); 3997 vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR); 3998 vcpu->arch.psscr = mfspr(SPRN_PSSCR_PR); 3999 4000 store_vcpu_state(vcpu); 4001 4002 dec = mfspr(SPRN_DEC); 4003 if (!(lpcr & LPCR_LD)) /* Sign extend if not using large decrementer */ 4004 dec = (s32) dec; 4005 *tb = mftb(); 4006 vcpu->arch.dec_expires = dec + (*tb + vc->tb_offset); 4007 4008 timer_rearm_host_dec(*tb); 4009 4010 restore_p9_host_os_sprs(vcpu, &host_os_sprs); 4011 if (vcpu->arch.psscr != host_psscr) 4012 mtspr(SPRN_PSSCR_PR, host_psscr); 4013 4014 return trap; 4015 } 4016 4017 /* 4018 * Guest entry for POWER9 and later CPUs. 4019 */ 4020 static int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit, 4021 unsigned long lpcr, u64 *tb) 4022 { 4023 u64 next_timer; 4024 int trap; 4025 4026 next_timer = timer_get_next_tb(); 4027 if (*tb >= next_timer) 4028 return BOOK3S_INTERRUPT_HV_DECREMENTER; 4029 if (next_timer < time_limit) 4030 time_limit = next_timer; 4031 else if (*tb >= time_limit) /* nested time limit */ 4032 return BOOK3S_INTERRUPT_NESTED_HV_DECREMENTER; 4033 4034 vcpu->arch.ceded = 0; 4035 4036 vcpu_vpa_increment_dispatch(vcpu); 4037 4038 if (kvmhv_on_pseries()) { 4039 trap = kvmhv_vcpu_entry_p9_nested(vcpu, time_limit, lpcr, tb); 4040 4041 /* H_CEDE has to be handled now, not later */ 4042 if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested && 4043 kvmppc_get_gpr(vcpu, 3) == H_CEDE) { 4044 kvmppc_cede(vcpu); 4045 kvmppc_set_gpr(vcpu, 3, 0); 4046 trap = 0; 4047 } 4048 4049 } else { 4050 struct kvm *kvm = vcpu->kvm; 4051 4052 kvmppc_xive_push_vcpu(vcpu); 4053 4054 __this_cpu_write(cpu_in_guest, kvm); 4055 trap = kvmhv_vcpu_entry_p9(vcpu, time_limit, lpcr, tb); 4056 __this_cpu_write(cpu_in_guest, NULL); 4057 4058 if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested && 4059 !(vcpu->arch.shregs.msr & MSR_PR)) { 4060 unsigned long req = kvmppc_get_gpr(vcpu, 3); 4061 4062 /* H_CEDE has to be handled now, not later */ 4063 if (req == H_CEDE) { 4064 kvmppc_cede(vcpu); 4065 kvmppc_xive_rearm_escalation(vcpu); /* may un-cede */ 4066 kvmppc_set_gpr(vcpu, 3, 0); 4067 trap = 0; 4068 4069 /* XICS hcalls must be handled before xive is pulled */ 4070 } else if (hcall_is_xics(req)) { 4071 int ret; 4072 4073 ret = kvmppc_xive_xics_hcall(vcpu, req); 4074 if (ret != H_TOO_HARD) { 4075 kvmppc_set_gpr(vcpu, 3, ret); 4076 trap = 0; 4077 } 4078 } 4079 } 4080 kvmppc_xive_pull_vcpu(vcpu); 4081 4082 if (kvm_is_radix(kvm)) 4083 vcpu->arch.slb_max = 0; 4084 } 4085 4086 vcpu_vpa_increment_dispatch(vcpu); 4087 4088 return trap; 4089 } 4090 4091 /* 4092 * Wait for some other vcpu thread to execute us, and 4093 * wake us up when we need to handle something in the host. 4094 */ 4095 static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc, 4096 struct kvm_vcpu *vcpu, int wait_state) 4097 { 4098 DEFINE_WAIT(wait); 4099 4100 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state); 4101 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 4102 spin_unlock(&vc->lock); 4103 schedule(); 4104 spin_lock(&vc->lock); 4105 } 4106 finish_wait(&vcpu->arch.cpu_run, &wait); 4107 } 4108 4109 static void grow_halt_poll_ns(struct kvmppc_vcore *vc) 4110 { 4111 if (!halt_poll_ns_grow) 4112 return; 4113 4114 vc->halt_poll_ns *= halt_poll_ns_grow; 4115 if (vc->halt_poll_ns < halt_poll_ns_grow_start) 4116 vc->halt_poll_ns = halt_poll_ns_grow_start; 4117 } 4118 4119 static void shrink_halt_poll_ns(struct kvmppc_vcore *vc) 4120 { 4121 if (halt_poll_ns_shrink == 0) 4122 vc->halt_poll_ns = 0; 4123 else 4124 vc->halt_poll_ns /= halt_poll_ns_shrink; 4125 } 4126 4127 #ifdef CONFIG_KVM_XICS 4128 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 4129 { 4130 if (!xics_on_xive()) 4131 return false; 4132 return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr < 4133 vcpu->arch.xive_saved_state.cppr; 4134 } 4135 #else 4136 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 4137 { 4138 return false; 4139 } 4140 #endif /* CONFIG_KVM_XICS */ 4141 4142 static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu) 4143 { 4144 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded || 4145 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu)) 4146 return true; 4147 4148 return false; 4149 } 4150 4151 static bool kvmppc_vcpu_check_block(struct kvm_vcpu *vcpu) 4152 { 4153 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu)) 4154 return true; 4155 return false; 4156 } 4157 4158 /* 4159 * Check to see if any of the runnable vcpus on the vcore have pending 4160 * exceptions or are no longer ceded 4161 */ 4162 static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc) 4163 { 4164 struct kvm_vcpu *vcpu; 4165 int i; 4166 4167 for_each_runnable_thread(i, vcpu, vc) { 4168 if (kvmppc_vcpu_check_block(vcpu)) 4169 return 1; 4170 } 4171 4172 return 0; 4173 } 4174 4175 /* 4176 * All the vcpus in this vcore are idle, so wait for a decrementer 4177 * or external interrupt to one of the vcpus. vc->lock is held. 4178 */ 4179 static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc) 4180 { 4181 ktime_t cur, start_poll, start_wait; 4182 int do_sleep = 1; 4183 u64 block_ns; 4184 4185 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 4186 4187 /* Poll for pending exceptions and ceded state */ 4188 cur = start_poll = ktime_get(); 4189 if (vc->halt_poll_ns) { 4190 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns); 4191 ++vc->runner->stat.generic.halt_attempted_poll; 4192 4193 vc->vcore_state = VCORE_POLLING; 4194 spin_unlock(&vc->lock); 4195 4196 do { 4197 if (kvmppc_vcore_check_block(vc)) { 4198 do_sleep = 0; 4199 break; 4200 } 4201 cur = ktime_get(); 4202 } while (kvm_vcpu_can_poll(cur, stop)); 4203 4204 spin_lock(&vc->lock); 4205 vc->vcore_state = VCORE_INACTIVE; 4206 4207 if (!do_sleep) { 4208 ++vc->runner->stat.generic.halt_successful_poll; 4209 goto out; 4210 } 4211 } 4212 4213 prepare_to_rcuwait(&vc->wait); 4214 set_current_state(TASK_INTERRUPTIBLE); 4215 if (kvmppc_vcore_check_block(vc)) { 4216 finish_rcuwait(&vc->wait); 4217 do_sleep = 0; 4218 /* If we polled, count this as a successful poll */ 4219 if (vc->halt_poll_ns) 4220 ++vc->runner->stat.generic.halt_successful_poll; 4221 goto out; 4222 } 4223 4224 start_wait = ktime_get(); 4225 4226 vc->vcore_state = VCORE_SLEEPING; 4227 trace_kvmppc_vcore_blocked(vc, 0); 4228 spin_unlock(&vc->lock); 4229 schedule(); 4230 finish_rcuwait(&vc->wait); 4231 spin_lock(&vc->lock); 4232 vc->vcore_state = VCORE_INACTIVE; 4233 trace_kvmppc_vcore_blocked(vc, 1); 4234 ++vc->runner->stat.halt_successful_wait; 4235 4236 cur = ktime_get(); 4237 4238 out: 4239 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll); 4240 4241 /* Attribute wait time */ 4242 if (do_sleep) { 4243 vc->runner->stat.generic.halt_wait_ns += 4244 ktime_to_ns(cur) - ktime_to_ns(start_wait); 4245 KVM_STATS_LOG_HIST_UPDATE( 4246 vc->runner->stat.generic.halt_wait_hist, 4247 ktime_to_ns(cur) - ktime_to_ns(start_wait)); 4248 /* Attribute failed poll time */ 4249 if (vc->halt_poll_ns) { 4250 vc->runner->stat.generic.halt_poll_fail_ns += 4251 ktime_to_ns(start_wait) - 4252 ktime_to_ns(start_poll); 4253 KVM_STATS_LOG_HIST_UPDATE( 4254 vc->runner->stat.generic.halt_poll_fail_hist, 4255 ktime_to_ns(start_wait) - 4256 ktime_to_ns(start_poll)); 4257 } 4258 } else { 4259 /* Attribute successful poll time */ 4260 if (vc->halt_poll_ns) { 4261 vc->runner->stat.generic.halt_poll_success_ns += 4262 ktime_to_ns(cur) - 4263 ktime_to_ns(start_poll); 4264 KVM_STATS_LOG_HIST_UPDATE( 4265 vc->runner->stat.generic.halt_poll_success_hist, 4266 ktime_to_ns(cur) - ktime_to_ns(start_poll)); 4267 } 4268 } 4269 4270 /* Adjust poll time */ 4271 if (halt_poll_ns) { 4272 if (block_ns <= vc->halt_poll_ns) 4273 ; 4274 /* We slept and blocked for longer than the max halt time */ 4275 else if (vc->halt_poll_ns && block_ns > halt_poll_ns) 4276 shrink_halt_poll_ns(vc); 4277 /* We slept and our poll time is too small */ 4278 else if (vc->halt_poll_ns < halt_poll_ns && 4279 block_ns < halt_poll_ns) 4280 grow_halt_poll_ns(vc); 4281 if (vc->halt_poll_ns > halt_poll_ns) 4282 vc->halt_poll_ns = halt_poll_ns; 4283 } else 4284 vc->halt_poll_ns = 0; 4285 4286 trace_kvmppc_vcore_wakeup(do_sleep, block_ns); 4287 } 4288 4289 /* 4290 * This never fails for a radix guest, as none of the operations it does 4291 * for a radix guest can fail or have a way to report failure. 4292 */ 4293 static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu) 4294 { 4295 int r = 0; 4296 struct kvm *kvm = vcpu->kvm; 4297 4298 mutex_lock(&kvm->arch.mmu_setup_lock); 4299 if (!kvm->arch.mmu_ready) { 4300 if (!kvm_is_radix(kvm)) 4301 r = kvmppc_hv_setup_htab_rma(vcpu); 4302 if (!r) { 4303 if (cpu_has_feature(CPU_FTR_ARCH_300)) 4304 kvmppc_setup_partition_table(kvm); 4305 kvm->arch.mmu_ready = 1; 4306 } 4307 } 4308 mutex_unlock(&kvm->arch.mmu_setup_lock); 4309 return r; 4310 } 4311 4312 static int kvmppc_run_vcpu(struct kvm_vcpu *vcpu) 4313 { 4314 struct kvm_run *run = vcpu->run; 4315 int n_ceded, i, r; 4316 struct kvmppc_vcore *vc; 4317 struct kvm_vcpu *v; 4318 4319 trace_kvmppc_run_vcpu_enter(vcpu); 4320 4321 run->exit_reason = 0; 4322 vcpu->arch.ret = RESUME_GUEST; 4323 vcpu->arch.trap = 0; 4324 kvmppc_update_vpas(vcpu); 4325 4326 /* 4327 * Synchronize with other threads in this virtual core 4328 */ 4329 vc = vcpu->arch.vcore; 4330 spin_lock(&vc->lock); 4331 vcpu->arch.ceded = 0; 4332 vcpu->arch.run_task = current; 4333 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 4334 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 4335 vcpu->arch.busy_preempt = TB_NIL; 4336 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu); 4337 ++vc->n_runnable; 4338 4339 /* 4340 * This happens the first time this is called for a vcpu. 4341 * If the vcore is already running, we may be able to start 4342 * this thread straight away and have it join in. 4343 */ 4344 if (!signal_pending(current)) { 4345 if ((vc->vcore_state == VCORE_PIGGYBACK || 4346 vc->vcore_state == VCORE_RUNNING) && 4347 !VCORE_IS_EXITING(vc)) { 4348 kvmppc_create_dtl_entry(vcpu, vc); 4349 kvmppc_start_thread(vcpu, vc); 4350 trace_kvm_guest_enter(vcpu); 4351 } else if (vc->vcore_state == VCORE_SLEEPING) { 4352 rcuwait_wake_up(&vc->wait); 4353 } 4354 4355 } 4356 4357 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 4358 !signal_pending(current)) { 4359 /* See if the MMU is ready to go */ 4360 if (!vcpu->kvm->arch.mmu_ready) { 4361 spin_unlock(&vc->lock); 4362 r = kvmhv_setup_mmu(vcpu); 4363 spin_lock(&vc->lock); 4364 if (r) { 4365 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4366 run->fail_entry. 4367 hardware_entry_failure_reason = 0; 4368 vcpu->arch.ret = r; 4369 break; 4370 } 4371 } 4372 4373 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 4374 kvmppc_vcore_end_preempt(vc); 4375 4376 if (vc->vcore_state != VCORE_INACTIVE) { 4377 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE); 4378 continue; 4379 } 4380 for_each_runnable_thread(i, v, vc) { 4381 kvmppc_core_prepare_to_enter(v); 4382 if (signal_pending(v->arch.run_task)) { 4383 kvmppc_remove_runnable(vc, v, mftb()); 4384 v->stat.signal_exits++; 4385 v->run->exit_reason = KVM_EXIT_INTR; 4386 v->arch.ret = -EINTR; 4387 wake_up(&v->arch.cpu_run); 4388 } 4389 } 4390 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 4391 break; 4392 n_ceded = 0; 4393 for_each_runnable_thread(i, v, vc) { 4394 if (!kvmppc_vcpu_woken(v)) 4395 n_ceded += v->arch.ceded; 4396 else 4397 v->arch.ceded = 0; 4398 } 4399 vc->runner = vcpu; 4400 if (n_ceded == vc->n_runnable) { 4401 kvmppc_vcore_blocked(vc); 4402 } else if (need_resched()) { 4403 kvmppc_vcore_preempt(vc); 4404 /* Let something else run */ 4405 cond_resched_lock(&vc->lock); 4406 if (vc->vcore_state == VCORE_PREEMPT) 4407 kvmppc_vcore_end_preempt(vc); 4408 } else { 4409 kvmppc_run_core(vc); 4410 } 4411 vc->runner = NULL; 4412 } 4413 4414 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 4415 (vc->vcore_state == VCORE_RUNNING || 4416 vc->vcore_state == VCORE_EXITING || 4417 vc->vcore_state == VCORE_PIGGYBACK)) 4418 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE); 4419 4420 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 4421 kvmppc_vcore_end_preempt(vc); 4422 4423 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 4424 kvmppc_remove_runnable(vc, vcpu, mftb()); 4425 vcpu->stat.signal_exits++; 4426 run->exit_reason = KVM_EXIT_INTR; 4427 vcpu->arch.ret = -EINTR; 4428 } 4429 4430 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) { 4431 /* Wake up some vcpu to run the core */ 4432 i = -1; 4433 v = next_runnable_thread(vc, &i); 4434 wake_up(&v->arch.cpu_run); 4435 } 4436 4437 trace_kvmppc_run_vcpu_exit(vcpu); 4438 spin_unlock(&vc->lock); 4439 return vcpu->arch.ret; 4440 } 4441 4442 int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit, 4443 unsigned long lpcr) 4444 { 4445 struct kvm_run *run = vcpu->run; 4446 int trap, r, pcpu; 4447 int srcu_idx; 4448 struct kvmppc_vcore *vc; 4449 struct kvm *kvm = vcpu->kvm; 4450 struct kvm_nested_guest *nested = vcpu->arch.nested; 4451 unsigned long flags; 4452 u64 tb; 4453 4454 trace_kvmppc_run_vcpu_enter(vcpu); 4455 4456 run->exit_reason = 0; 4457 vcpu->arch.ret = RESUME_GUEST; 4458 vcpu->arch.trap = 0; 4459 4460 vc = vcpu->arch.vcore; 4461 vcpu->arch.ceded = 0; 4462 vcpu->arch.run_task = current; 4463 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 4464 vcpu->arch.last_inst = KVM_INST_FETCH_FAILED; 4465 4466 /* See if the MMU is ready to go */ 4467 if (unlikely(!kvm->arch.mmu_ready)) { 4468 r = kvmhv_setup_mmu(vcpu); 4469 if (r) { 4470 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4471 run->fail_entry.hardware_entry_failure_reason = 0; 4472 vcpu->arch.ret = r; 4473 return r; 4474 } 4475 } 4476 4477 if (need_resched()) 4478 cond_resched(); 4479 4480 kvmppc_update_vpas(vcpu); 4481 4482 preempt_disable(); 4483 pcpu = smp_processor_id(); 4484 if (kvm_is_radix(kvm)) 4485 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 4486 4487 /* flags save not required, but irq_pmu has no disable/enable API */ 4488 powerpc_local_irq_pmu_save(flags); 4489 4490 if (signal_pending(current)) 4491 goto sigpend; 4492 if (need_resched() || !kvm->arch.mmu_ready) 4493 goto out; 4494 4495 if (!nested) { 4496 kvmppc_core_prepare_to_enter(vcpu); 4497 if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, 4498 &vcpu->arch.pending_exceptions)) 4499 lpcr |= LPCR_MER; 4500 } else if (vcpu->arch.pending_exceptions || 4501 vcpu->arch.doorbell_request || 4502 xive_interrupt_pending(vcpu)) { 4503 vcpu->arch.ret = RESUME_HOST; 4504 goto out; 4505 } 4506 4507 if (vcpu->arch.timer_running) { 4508 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 4509 vcpu->arch.timer_running = 0; 4510 } 4511 4512 tb = mftb(); 4513 4514 vcpu->cpu = pcpu; 4515 vcpu->arch.thread_cpu = pcpu; 4516 vc->pcpu = pcpu; 4517 local_paca->kvm_hstate.kvm_vcpu = vcpu; 4518 local_paca->kvm_hstate.ptid = 0; 4519 local_paca->kvm_hstate.fake_suspend = 0; 4520 4521 __kvmppc_create_dtl_entry(vcpu, pcpu, tb + vc->tb_offset, 0); 4522 4523 trace_kvm_guest_enter(vcpu); 4524 4525 guest_enter_irqoff(); 4526 4527 srcu_idx = srcu_read_lock(&kvm->srcu); 4528 4529 this_cpu_disable_ftrace(); 4530 4531 /* Tell lockdep that we're about to enable interrupts */ 4532 trace_hardirqs_on(); 4533 4534 trap = kvmhv_p9_guest_entry(vcpu, time_limit, lpcr, &tb); 4535 vcpu->arch.trap = trap; 4536 4537 trace_hardirqs_off(); 4538 4539 this_cpu_enable_ftrace(); 4540 4541 srcu_read_unlock(&kvm->srcu, srcu_idx); 4542 4543 set_irq_happened(trap); 4544 4545 context_tracking_guest_exit(); 4546 if (!vtime_accounting_enabled_this_cpu()) { 4547 local_irq_enable(); 4548 /* 4549 * Service IRQs here before vtime_account_guest_exit() so any 4550 * ticks that occurred while running the guest are accounted to 4551 * the guest. If vtime accounting is enabled, accounting uses 4552 * TB rather than ticks, so it can be done without enabling 4553 * interrupts here, which has the problem that it accounts 4554 * interrupt processing overhead to the host. 4555 */ 4556 local_irq_disable(); 4557 } 4558 vtime_account_guest_exit(); 4559 4560 vcpu->cpu = -1; 4561 vcpu->arch.thread_cpu = -1; 4562 4563 powerpc_local_irq_pmu_restore(flags); 4564 4565 preempt_enable(); 4566 4567 /* 4568 * cancel pending decrementer exception if DEC is now positive, or if 4569 * entering a nested guest in which case the decrementer is now owned 4570 * by L2 and the L1 decrementer is provided in hdec_expires 4571 */ 4572 if (kvmppc_core_pending_dec(vcpu) && 4573 ((tb < kvmppc_dec_expires_host_tb(vcpu)) || 4574 (trap == BOOK3S_INTERRUPT_SYSCALL && 4575 kvmppc_get_gpr(vcpu, 3) == H_ENTER_NESTED))) 4576 kvmppc_core_dequeue_dec(vcpu); 4577 4578 trace_kvm_guest_exit(vcpu); 4579 r = RESUME_GUEST; 4580 if (trap) { 4581 if (!nested) 4582 r = kvmppc_handle_exit_hv(vcpu, current); 4583 else 4584 r = kvmppc_handle_nested_exit(vcpu); 4585 } 4586 vcpu->arch.ret = r; 4587 4588 if (is_kvmppc_resume_guest(r) && !kvmppc_vcpu_check_block(vcpu)) { 4589 kvmppc_set_timer(vcpu); 4590 4591 prepare_to_rcuwait(&vcpu->wait); 4592 for (;;) { 4593 set_current_state(TASK_INTERRUPTIBLE); 4594 if (signal_pending(current)) { 4595 vcpu->stat.signal_exits++; 4596 run->exit_reason = KVM_EXIT_INTR; 4597 vcpu->arch.ret = -EINTR; 4598 break; 4599 } 4600 4601 if (kvmppc_vcpu_check_block(vcpu)) 4602 break; 4603 4604 trace_kvmppc_vcore_blocked(vc, 0); 4605 schedule(); 4606 trace_kvmppc_vcore_blocked(vc, 1); 4607 } 4608 finish_rcuwait(&vcpu->wait); 4609 } 4610 vcpu->arch.ceded = 0; 4611 4612 done: 4613 trace_kvmppc_run_vcpu_exit(vcpu); 4614 4615 return vcpu->arch.ret; 4616 4617 sigpend: 4618 vcpu->stat.signal_exits++; 4619 run->exit_reason = KVM_EXIT_INTR; 4620 vcpu->arch.ret = -EINTR; 4621 out: 4622 powerpc_local_irq_pmu_restore(flags); 4623 preempt_enable(); 4624 goto done; 4625 } 4626 4627 static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu) 4628 { 4629 struct kvm_run *run = vcpu->run; 4630 int r; 4631 int srcu_idx; 4632 struct kvm *kvm; 4633 unsigned long msr; 4634 4635 if (!vcpu->arch.sane) { 4636 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 4637 return -EINVAL; 4638 } 4639 4640 /* No need to go into the guest when all we'll do is come back out */ 4641 if (signal_pending(current)) { 4642 run->exit_reason = KVM_EXIT_INTR; 4643 return -EINTR; 4644 } 4645 4646 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 4647 /* 4648 * Don't allow entry with a suspended transaction, because 4649 * the guest entry/exit code will lose it. 4650 */ 4651 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs && 4652 (current->thread.regs->msr & MSR_TM)) { 4653 if (MSR_TM_ACTIVE(current->thread.regs->msr)) { 4654 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4655 run->fail_entry.hardware_entry_failure_reason = 0; 4656 return -EINVAL; 4657 } 4658 } 4659 #endif 4660 4661 /* 4662 * Force online to 1 for the sake of old userspace which doesn't 4663 * set it. 4664 */ 4665 if (!vcpu->arch.online) { 4666 atomic_inc(&vcpu->arch.vcore->online_count); 4667 vcpu->arch.online = 1; 4668 } 4669 4670 kvmppc_core_prepare_to_enter(vcpu); 4671 4672 kvm = vcpu->kvm; 4673 atomic_inc(&kvm->arch.vcpus_running); 4674 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */ 4675 smp_mb(); 4676 4677 msr = 0; 4678 if (IS_ENABLED(CONFIG_PPC_FPU)) 4679 msr |= MSR_FP; 4680 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 4681 msr |= MSR_VEC; 4682 if (cpu_has_feature(CPU_FTR_VSX)) 4683 msr |= MSR_VSX; 4684 if ((cpu_has_feature(CPU_FTR_TM) || 4685 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) && 4686 (vcpu->arch.hfscr & HFSCR_TM)) 4687 msr |= MSR_TM; 4688 msr = msr_check_and_set(msr); 4689 4690 kvmppc_save_user_regs(); 4691 4692 kvmppc_save_current_sprs(); 4693 4694 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4695 vcpu->arch.waitp = &vcpu->arch.vcore->wait; 4696 vcpu->arch.pgdir = kvm->mm->pgd; 4697 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 4698 4699 do { 4700 if (cpu_has_feature(CPU_FTR_ARCH_300)) 4701 r = kvmhv_run_single_vcpu(vcpu, ~(u64)0, 4702 vcpu->arch.vcore->lpcr); 4703 else 4704 r = kvmppc_run_vcpu(vcpu); 4705 4706 if (run->exit_reason == KVM_EXIT_PAPR_HCALL) { 4707 if (WARN_ON_ONCE(vcpu->arch.shregs.msr & MSR_PR)) { 4708 /* 4709 * These should have been caught reflected 4710 * into the guest by now. Final sanity check: 4711 * don't allow userspace to execute hcalls in 4712 * the hypervisor. 4713 */ 4714 r = RESUME_GUEST; 4715 continue; 4716 } 4717 trace_kvm_hcall_enter(vcpu); 4718 r = kvmppc_pseries_do_hcall(vcpu); 4719 trace_kvm_hcall_exit(vcpu, r); 4720 kvmppc_core_prepare_to_enter(vcpu); 4721 } else if (r == RESUME_PAGE_FAULT) { 4722 srcu_idx = srcu_read_lock(&kvm->srcu); 4723 r = kvmppc_book3s_hv_page_fault(vcpu, 4724 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 4725 srcu_read_unlock(&kvm->srcu, srcu_idx); 4726 } else if (r == RESUME_PASSTHROUGH) { 4727 if (WARN_ON(xics_on_xive())) 4728 r = H_SUCCESS; 4729 else 4730 r = kvmppc_xics_rm_complete(vcpu, 0); 4731 } 4732 } while (is_kvmppc_resume_guest(r)); 4733 4734 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 4735 atomic_dec(&kvm->arch.vcpus_running); 4736 4737 srr_regs_clobbered(); 4738 4739 return r; 4740 } 4741 4742 static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps, 4743 int shift, int sllp) 4744 { 4745 (*sps)->page_shift = shift; 4746 (*sps)->slb_enc = sllp; 4747 (*sps)->enc[0].page_shift = shift; 4748 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift); 4749 /* 4750 * Add 16MB MPSS support (may get filtered out by userspace) 4751 */ 4752 if (shift != 24) { 4753 int penc = kvmppc_pgsize_lp_encoding(shift, 24); 4754 if (penc != -1) { 4755 (*sps)->enc[1].page_shift = 24; 4756 (*sps)->enc[1].pte_enc = penc; 4757 } 4758 } 4759 (*sps)++; 4760 } 4761 4762 static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm, 4763 struct kvm_ppc_smmu_info *info) 4764 { 4765 struct kvm_ppc_one_seg_page_size *sps; 4766 4767 /* 4768 * POWER7, POWER8 and POWER9 all support 32 storage keys for data. 4769 * POWER7 doesn't support keys for instruction accesses, 4770 * POWER8 and POWER9 do. 4771 */ 4772 info->data_keys = 32; 4773 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0; 4774 4775 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */ 4776 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS; 4777 info->slb_size = 32; 4778 4779 /* We only support these sizes for now, and no muti-size segments */ 4780 sps = &info->sps[0]; 4781 kvmppc_add_seg_page_size(&sps, 12, 0); 4782 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01); 4783 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L); 4784 4785 /* If running as a nested hypervisor, we don't support HPT guests */ 4786 if (kvmhv_on_pseries()) 4787 info->flags |= KVM_PPC_NO_HASH; 4788 4789 return 0; 4790 } 4791 4792 /* 4793 * Get (and clear) the dirty memory log for a memory slot. 4794 */ 4795 static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm, 4796 struct kvm_dirty_log *log) 4797 { 4798 struct kvm_memslots *slots; 4799 struct kvm_memory_slot *memslot; 4800 int i, r; 4801 unsigned long n; 4802 unsigned long *buf, *p; 4803 struct kvm_vcpu *vcpu; 4804 4805 mutex_lock(&kvm->slots_lock); 4806 4807 r = -EINVAL; 4808 if (log->slot >= KVM_USER_MEM_SLOTS) 4809 goto out; 4810 4811 slots = kvm_memslots(kvm); 4812 memslot = id_to_memslot(slots, log->slot); 4813 r = -ENOENT; 4814 if (!memslot || !memslot->dirty_bitmap) 4815 goto out; 4816 4817 /* 4818 * Use second half of bitmap area because both HPT and radix 4819 * accumulate bits in the first half. 4820 */ 4821 n = kvm_dirty_bitmap_bytes(memslot); 4822 buf = memslot->dirty_bitmap + n / sizeof(long); 4823 memset(buf, 0, n); 4824 4825 if (kvm_is_radix(kvm)) 4826 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf); 4827 else 4828 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf); 4829 if (r) 4830 goto out; 4831 4832 /* 4833 * We accumulate dirty bits in the first half of the 4834 * memslot's dirty_bitmap area, for when pages are paged 4835 * out or modified by the host directly. Pick up these 4836 * bits and add them to the map. 4837 */ 4838 p = memslot->dirty_bitmap; 4839 for (i = 0; i < n / sizeof(long); ++i) 4840 buf[i] |= xchg(&p[i], 0); 4841 4842 /* Harvest dirty bits from VPA and DTL updates */ 4843 /* Note: we never modify the SLB shadow buffer areas */ 4844 kvm_for_each_vcpu(i, vcpu, kvm) { 4845 spin_lock(&vcpu->arch.vpa_update_lock); 4846 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf); 4847 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf); 4848 spin_unlock(&vcpu->arch.vpa_update_lock); 4849 } 4850 4851 r = -EFAULT; 4852 if (copy_to_user(log->dirty_bitmap, buf, n)) 4853 goto out; 4854 4855 r = 0; 4856 out: 4857 mutex_unlock(&kvm->slots_lock); 4858 return r; 4859 } 4860 4861 static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *slot) 4862 { 4863 vfree(slot->arch.rmap); 4864 slot->arch.rmap = NULL; 4865 } 4866 4867 static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm, 4868 struct kvm_memory_slot *slot, 4869 const struct kvm_userspace_memory_region *mem, 4870 enum kvm_mr_change change) 4871 { 4872 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4873 4874 if (change == KVM_MR_CREATE) { 4875 slot->arch.rmap = vzalloc(array_size(npages, 4876 sizeof(*slot->arch.rmap))); 4877 if (!slot->arch.rmap) 4878 return -ENOMEM; 4879 } 4880 4881 return 0; 4882 } 4883 4884 static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm, 4885 const struct kvm_userspace_memory_region *mem, 4886 const struct kvm_memory_slot *old, 4887 const struct kvm_memory_slot *new, 4888 enum kvm_mr_change change) 4889 { 4890 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4891 4892 /* 4893 * If we are making a new memslot, it might make 4894 * some address that was previously cached as emulated 4895 * MMIO be no longer emulated MMIO, so invalidate 4896 * all the caches of emulated MMIO translations. 4897 */ 4898 if (npages) 4899 atomic64_inc(&kvm->arch.mmio_update); 4900 4901 /* 4902 * For change == KVM_MR_MOVE or KVM_MR_DELETE, higher levels 4903 * have already called kvm_arch_flush_shadow_memslot() to 4904 * flush shadow mappings. For KVM_MR_CREATE we have no 4905 * previous mappings. So the only case to handle is 4906 * KVM_MR_FLAGS_ONLY when the KVM_MEM_LOG_DIRTY_PAGES bit 4907 * has been changed. 4908 * For radix guests, we flush on setting KVM_MEM_LOG_DIRTY_PAGES 4909 * to get rid of any THP PTEs in the partition-scoped page tables 4910 * so we can track dirtiness at the page level; we flush when 4911 * clearing KVM_MEM_LOG_DIRTY_PAGES so that we can go back to 4912 * using THP PTEs. 4913 */ 4914 if (change == KVM_MR_FLAGS_ONLY && kvm_is_radix(kvm) && 4915 ((new->flags ^ old->flags) & KVM_MEM_LOG_DIRTY_PAGES)) 4916 kvmppc_radix_flush_memslot(kvm, old); 4917 /* 4918 * If UV hasn't yet called H_SVM_INIT_START, don't register memslots. 4919 */ 4920 if (!kvm->arch.secure_guest) 4921 return; 4922 4923 switch (change) { 4924 case KVM_MR_CREATE: 4925 /* 4926 * @TODO kvmppc_uvmem_memslot_create() can fail and 4927 * return error. Fix this. 4928 */ 4929 kvmppc_uvmem_memslot_create(kvm, new); 4930 break; 4931 case KVM_MR_DELETE: 4932 kvmppc_uvmem_memslot_delete(kvm, old); 4933 break; 4934 default: 4935 /* TODO: Handle KVM_MR_MOVE */ 4936 break; 4937 } 4938 } 4939 4940 /* 4941 * Update LPCR values in kvm->arch and in vcores. 4942 * Caller must hold kvm->arch.mmu_setup_lock (for mutual exclusion 4943 * of kvm->arch.lpcr update). 4944 */ 4945 void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask) 4946 { 4947 long int i; 4948 u32 cores_done = 0; 4949 4950 if ((kvm->arch.lpcr & mask) == lpcr) 4951 return; 4952 4953 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr; 4954 4955 for (i = 0; i < KVM_MAX_VCORES; ++i) { 4956 struct kvmppc_vcore *vc = kvm->arch.vcores[i]; 4957 if (!vc) 4958 continue; 4959 4960 spin_lock(&vc->lock); 4961 vc->lpcr = (vc->lpcr & ~mask) | lpcr; 4962 verify_lpcr(kvm, vc->lpcr); 4963 spin_unlock(&vc->lock); 4964 if (++cores_done >= kvm->arch.online_vcores) 4965 break; 4966 } 4967 } 4968 4969 void kvmppc_setup_partition_table(struct kvm *kvm) 4970 { 4971 unsigned long dw0, dw1; 4972 4973 if (!kvm_is_radix(kvm)) { 4974 /* PS field - page size for VRMA */ 4975 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) | 4976 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1); 4977 /* HTABSIZE and HTABORG fields */ 4978 dw0 |= kvm->arch.sdr1; 4979 4980 /* Second dword as set by userspace */ 4981 dw1 = kvm->arch.process_table; 4982 } else { 4983 dw0 = PATB_HR | radix__get_tree_size() | 4984 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE; 4985 dw1 = PATB_GR | kvm->arch.process_table; 4986 } 4987 kvmhv_set_ptbl_entry(kvm->arch.lpid, dw0, dw1); 4988 } 4989 4990 /* 4991 * Set up HPT (hashed page table) and RMA (real-mode area). 4992 * Must be called with kvm->arch.mmu_setup_lock held. 4993 */ 4994 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu) 4995 { 4996 int err = 0; 4997 struct kvm *kvm = vcpu->kvm; 4998 unsigned long hva; 4999 struct kvm_memory_slot *memslot; 5000 struct vm_area_struct *vma; 5001 unsigned long lpcr = 0, senc; 5002 unsigned long psize, porder; 5003 int srcu_idx; 5004 5005 /* Allocate hashed page table (if not done already) and reset it */ 5006 if (!kvm->arch.hpt.virt) { 5007 int order = KVM_DEFAULT_HPT_ORDER; 5008 struct kvm_hpt_info info; 5009 5010 err = kvmppc_allocate_hpt(&info, order); 5011 /* If we get here, it means userspace didn't specify a 5012 * size explicitly. So, try successively smaller 5013 * sizes if the default failed. */ 5014 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER) 5015 err = kvmppc_allocate_hpt(&info, order); 5016 5017 if (err < 0) { 5018 pr_err("KVM: Couldn't alloc HPT\n"); 5019 goto out; 5020 } 5021 5022 kvmppc_set_hpt(kvm, &info); 5023 } 5024 5025 /* Look up the memslot for guest physical address 0 */ 5026 srcu_idx = srcu_read_lock(&kvm->srcu); 5027 memslot = gfn_to_memslot(kvm, 0); 5028 5029 /* We must have some memory at 0 by now */ 5030 err = -EINVAL; 5031 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) 5032 goto out_srcu; 5033 5034 /* Look up the VMA for the start of this memory slot */ 5035 hva = memslot->userspace_addr; 5036 mmap_read_lock(kvm->mm); 5037 vma = vma_lookup(kvm->mm, hva); 5038 if (!vma || (vma->vm_flags & VM_IO)) 5039 goto up_out; 5040 5041 psize = vma_kernel_pagesize(vma); 5042 5043 mmap_read_unlock(kvm->mm); 5044 5045 /* We can handle 4k, 64k or 16M pages in the VRMA */ 5046 if (psize >= 0x1000000) 5047 psize = 0x1000000; 5048 else if (psize >= 0x10000) 5049 psize = 0x10000; 5050 else 5051 psize = 0x1000; 5052 porder = __ilog2(psize); 5053 5054 senc = slb_pgsize_encoding(psize); 5055 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T | 5056 (VRMA_VSID << SLB_VSID_SHIFT_1T); 5057 /* Create HPTEs in the hash page table for the VRMA */ 5058 kvmppc_map_vrma(vcpu, memslot, porder); 5059 5060 /* Update VRMASD field in the LPCR */ 5061 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 5062 /* the -4 is to account for senc values starting at 0x10 */ 5063 lpcr = senc << (LPCR_VRMASD_SH - 4); 5064 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD); 5065 } 5066 5067 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */ 5068 smp_wmb(); 5069 err = 0; 5070 out_srcu: 5071 srcu_read_unlock(&kvm->srcu, srcu_idx); 5072 out: 5073 return err; 5074 5075 up_out: 5076 mmap_read_unlock(kvm->mm); 5077 goto out_srcu; 5078 } 5079 5080 /* 5081 * Must be called with kvm->arch.mmu_setup_lock held and 5082 * mmu_ready = 0 and no vcpus running. 5083 */ 5084 int kvmppc_switch_mmu_to_hpt(struct kvm *kvm) 5085 { 5086 unsigned long lpcr, lpcr_mask; 5087 5088 if (nesting_enabled(kvm)) 5089 kvmhv_release_all_nested(kvm); 5090 kvmppc_rmap_reset(kvm); 5091 kvm->arch.process_table = 0; 5092 /* Mutual exclusion with kvm_unmap_gfn_range etc. */ 5093 spin_lock(&kvm->mmu_lock); 5094 kvm->arch.radix = 0; 5095 spin_unlock(&kvm->mmu_lock); 5096 kvmppc_free_radix(kvm); 5097 5098 lpcr = LPCR_VPM1; 5099 lpcr_mask = LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR; 5100 if (cpu_has_feature(CPU_FTR_ARCH_31)) 5101 lpcr_mask |= LPCR_HAIL; 5102 kvmppc_update_lpcr(kvm, lpcr, lpcr_mask); 5103 5104 return 0; 5105 } 5106 5107 /* 5108 * Must be called with kvm->arch.mmu_setup_lock held and 5109 * mmu_ready = 0 and no vcpus running. 5110 */ 5111 int kvmppc_switch_mmu_to_radix(struct kvm *kvm) 5112 { 5113 unsigned long lpcr, lpcr_mask; 5114 int err; 5115 5116 err = kvmppc_init_vm_radix(kvm); 5117 if (err) 5118 return err; 5119 kvmppc_rmap_reset(kvm); 5120 /* Mutual exclusion with kvm_unmap_gfn_range etc. */ 5121 spin_lock(&kvm->mmu_lock); 5122 kvm->arch.radix = 1; 5123 spin_unlock(&kvm->mmu_lock); 5124 kvmppc_free_hpt(&kvm->arch.hpt); 5125 5126 lpcr = LPCR_UPRT | LPCR_GTSE | LPCR_HR; 5127 lpcr_mask = LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR; 5128 if (cpu_has_feature(CPU_FTR_ARCH_31)) { 5129 lpcr_mask |= LPCR_HAIL; 5130 if (cpu_has_feature(CPU_FTR_HVMODE) && 5131 (kvm->arch.host_lpcr & LPCR_HAIL)) 5132 lpcr |= LPCR_HAIL; 5133 } 5134 kvmppc_update_lpcr(kvm, lpcr, lpcr_mask); 5135 5136 return 0; 5137 } 5138 5139 #ifdef CONFIG_KVM_XICS 5140 /* 5141 * Allocate a per-core structure for managing state about which cores are 5142 * running in the host versus the guest and for exchanging data between 5143 * real mode KVM and CPU running in the host. 5144 * This is only done for the first VM. 5145 * The allocated structure stays even if all VMs have stopped. 5146 * It is only freed when the kvm-hv module is unloaded. 5147 * It's OK for this routine to fail, we just don't support host 5148 * core operations like redirecting H_IPI wakeups. 5149 */ 5150 void kvmppc_alloc_host_rm_ops(void) 5151 { 5152 struct kvmppc_host_rm_ops *ops; 5153 unsigned long l_ops; 5154 int cpu, core; 5155 int size; 5156 5157 if (cpu_has_feature(CPU_FTR_ARCH_300)) 5158 return; 5159 5160 /* Not the first time here ? */ 5161 if (kvmppc_host_rm_ops_hv != NULL) 5162 return; 5163 5164 ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL); 5165 if (!ops) 5166 return; 5167 5168 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core); 5169 ops->rm_core = kzalloc(size, GFP_KERNEL); 5170 5171 if (!ops->rm_core) { 5172 kfree(ops); 5173 return; 5174 } 5175 5176 cpus_read_lock(); 5177 5178 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) { 5179 if (!cpu_online(cpu)) 5180 continue; 5181 5182 core = cpu >> threads_shift; 5183 ops->rm_core[core].rm_state.in_host = 1; 5184 } 5185 5186 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv; 5187 5188 /* 5189 * Make the contents of the kvmppc_host_rm_ops structure visible 5190 * to other CPUs before we assign it to the global variable. 5191 * Do an atomic assignment (no locks used here), but if someone 5192 * beats us to it, just free our copy and return. 5193 */ 5194 smp_wmb(); 5195 l_ops = (unsigned long) ops; 5196 5197 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) { 5198 cpus_read_unlock(); 5199 kfree(ops->rm_core); 5200 kfree(ops); 5201 return; 5202 } 5203 5204 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE, 5205 "ppc/kvm_book3s:prepare", 5206 kvmppc_set_host_core, 5207 kvmppc_clear_host_core); 5208 cpus_read_unlock(); 5209 } 5210 5211 void kvmppc_free_host_rm_ops(void) 5212 { 5213 if (kvmppc_host_rm_ops_hv) { 5214 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE); 5215 kfree(kvmppc_host_rm_ops_hv->rm_core); 5216 kfree(kvmppc_host_rm_ops_hv); 5217 kvmppc_host_rm_ops_hv = NULL; 5218 } 5219 } 5220 #endif 5221 5222 static int kvmppc_core_init_vm_hv(struct kvm *kvm) 5223 { 5224 unsigned long lpcr, lpid; 5225 char buf[32]; 5226 int ret; 5227 5228 mutex_init(&kvm->arch.uvmem_lock); 5229 INIT_LIST_HEAD(&kvm->arch.uvmem_pfns); 5230 mutex_init(&kvm->arch.mmu_setup_lock); 5231 5232 /* Allocate the guest's logical partition ID */ 5233 5234 lpid = kvmppc_alloc_lpid(); 5235 if ((long)lpid < 0) 5236 return -ENOMEM; 5237 kvm->arch.lpid = lpid; 5238 5239 kvmppc_alloc_host_rm_ops(); 5240 5241 kvmhv_vm_nested_init(kvm); 5242 5243 /* 5244 * Since we don't flush the TLB when tearing down a VM, 5245 * and this lpid might have previously been used, 5246 * make sure we flush on each core before running the new VM. 5247 * On POWER9, the tlbie in mmu_partition_table_set_entry() 5248 * does this flush for us. 5249 */ 5250 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5251 cpumask_setall(&kvm->arch.need_tlb_flush); 5252 5253 /* Start out with the default set of hcalls enabled */ 5254 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls, 5255 sizeof(kvm->arch.enabled_hcalls)); 5256 5257 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5258 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1); 5259 5260 /* Init LPCR for virtual RMA mode */ 5261 if (cpu_has_feature(CPU_FTR_HVMODE)) { 5262 kvm->arch.host_lpid = mfspr(SPRN_LPID); 5263 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR); 5264 lpcr &= LPCR_PECE | LPCR_LPES; 5265 } else { 5266 lpcr = 0; 5267 } 5268 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE | 5269 LPCR_VPM0 | LPCR_VPM1; 5270 kvm->arch.vrma_slb_v = SLB_VSID_B_1T | 5271 (VRMA_VSID << SLB_VSID_SHIFT_1T); 5272 /* On POWER8 turn on online bit to enable PURR/SPURR */ 5273 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 5274 lpcr |= LPCR_ONL; 5275 /* 5276 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed) 5277 * Set HVICE bit to enable hypervisor virtualization interrupts. 5278 * Set HEIC to prevent OS interrupts to go to hypervisor (should 5279 * be unnecessary but better safe than sorry in case we re-enable 5280 * EE in HV mode with this LPCR still set) 5281 */ 5282 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5283 lpcr &= ~LPCR_VPM0; 5284 lpcr |= LPCR_HVICE | LPCR_HEIC; 5285 5286 /* 5287 * If xive is enabled, we route 0x500 interrupts directly 5288 * to the guest. 5289 */ 5290 if (xics_on_xive()) 5291 lpcr |= LPCR_LPES; 5292 } 5293 5294 /* 5295 * If the host uses radix, the guest starts out as radix. 5296 */ 5297 if (radix_enabled()) { 5298 kvm->arch.radix = 1; 5299 kvm->arch.mmu_ready = 1; 5300 lpcr &= ~LPCR_VPM1; 5301 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR; 5302 if (cpu_has_feature(CPU_FTR_HVMODE) && 5303 cpu_has_feature(CPU_FTR_ARCH_31) && 5304 (kvm->arch.host_lpcr & LPCR_HAIL)) 5305 lpcr |= LPCR_HAIL; 5306 ret = kvmppc_init_vm_radix(kvm); 5307 if (ret) { 5308 kvmppc_free_lpid(kvm->arch.lpid); 5309 return ret; 5310 } 5311 kvmppc_setup_partition_table(kvm); 5312 } 5313 5314 verify_lpcr(kvm, lpcr); 5315 kvm->arch.lpcr = lpcr; 5316 5317 /* Initialization for future HPT resizes */ 5318 kvm->arch.resize_hpt = NULL; 5319 5320 /* 5321 * Work out how many sets the TLB has, for the use of 5322 * the TLB invalidation loop in book3s_hv_rmhandlers.S. 5323 */ 5324 if (cpu_has_feature(CPU_FTR_ARCH_31)) { 5325 /* 5326 * P10 will flush all the congruence class with a single tlbiel 5327 */ 5328 kvm->arch.tlb_sets = 1; 5329 } else if (radix_enabled()) 5330 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */ 5331 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 5332 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */ 5333 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 5334 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */ 5335 else 5336 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */ 5337 5338 /* 5339 * Track that we now have a HV mode VM active. This blocks secondary 5340 * CPU threads from coming online. 5341 */ 5342 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5343 kvm_hv_vm_activated(); 5344 5345 /* 5346 * Initialize smt_mode depending on processor. 5347 * POWER8 and earlier have to use "strict" threading, where 5348 * all vCPUs in a vcore have to run on the same (sub)core, 5349 * whereas on POWER9 the threads can each run a different 5350 * guest. 5351 */ 5352 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5353 kvm->arch.smt_mode = threads_per_subcore; 5354 else 5355 kvm->arch.smt_mode = 1; 5356 kvm->arch.emul_smt_mode = 1; 5357 5358 /* 5359 * Create a debugfs directory for the VM 5360 */ 5361 snprintf(buf, sizeof(buf), "vm%d", current->pid); 5362 kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir); 5363 kvmppc_mmu_debugfs_init(kvm); 5364 if (radix_enabled()) 5365 kvmhv_radix_debugfs_init(kvm); 5366 5367 return 0; 5368 } 5369 5370 static void kvmppc_free_vcores(struct kvm *kvm) 5371 { 5372 long int i; 5373 5374 for (i = 0; i < KVM_MAX_VCORES; ++i) 5375 kfree(kvm->arch.vcores[i]); 5376 kvm->arch.online_vcores = 0; 5377 } 5378 5379 static void kvmppc_core_destroy_vm_hv(struct kvm *kvm) 5380 { 5381 debugfs_remove_recursive(kvm->arch.debugfs_dir); 5382 5383 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5384 kvm_hv_vm_deactivated(); 5385 5386 kvmppc_free_vcores(kvm); 5387 5388 5389 if (kvm_is_radix(kvm)) 5390 kvmppc_free_radix(kvm); 5391 else 5392 kvmppc_free_hpt(&kvm->arch.hpt); 5393 5394 /* Perform global invalidation and return lpid to the pool */ 5395 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5396 if (nesting_enabled(kvm)) 5397 kvmhv_release_all_nested(kvm); 5398 kvm->arch.process_table = 0; 5399 if (kvm->arch.secure_guest) 5400 uv_svm_terminate(kvm->arch.lpid); 5401 kvmhv_set_ptbl_entry(kvm->arch.lpid, 0, 0); 5402 } 5403 5404 kvmppc_free_lpid(kvm->arch.lpid); 5405 5406 kvmppc_free_pimap(kvm); 5407 } 5408 5409 /* We don't need to emulate any privileged instructions or dcbz */ 5410 static int kvmppc_core_emulate_op_hv(struct kvm_vcpu *vcpu, 5411 unsigned int inst, int *advance) 5412 { 5413 return EMULATE_FAIL; 5414 } 5415 5416 static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn, 5417 ulong spr_val) 5418 { 5419 return EMULATE_FAIL; 5420 } 5421 5422 static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn, 5423 ulong *spr_val) 5424 { 5425 return EMULATE_FAIL; 5426 } 5427 5428 static int kvmppc_core_check_processor_compat_hv(void) 5429 { 5430 if (cpu_has_feature(CPU_FTR_HVMODE) && 5431 cpu_has_feature(CPU_FTR_ARCH_206)) 5432 return 0; 5433 5434 /* POWER9 in radix mode is capable of being a nested hypervisor. */ 5435 if (cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled()) 5436 return 0; 5437 5438 return -EIO; 5439 } 5440 5441 #ifdef CONFIG_KVM_XICS 5442 5443 void kvmppc_free_pimap(struct kvm *kvm) 5444 { 5445 kfree(kvm->arch.pimap); 5446 } 5447 5448 static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void) 5449 { 5450 return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL); 5451 } 5452 5453 static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5454 { 5455 struct irq_desc *desc; 5456 struct kvmppc_irq_map *irq_map; 5457 struct kvmppc_passthru_irqmap *pimap; 5458 struct irq_chip *chip; 5459 int i, rc = 0; 5460 struct irq_data *host_data; 5461 5462 if (!kvm_irq_bypass) 5463 return 1; 5464 5465 desc = irq_to_desc(host_irq); 5466 if (!desc) 5467 return -EIO; 5468 5469 mutex_lock(&kvm->lock); 5470 5471 pimap = kvm->arch.pimap; 5472 if (pimap == NULL) { 5473 /* First call, allocate structure to hold IRQ map */ 5474 pimap = kvmppc_alloc_pimap(); 5475 if (pimap == NULL) { 5476 mutex_unlock(&kvm->lock); 5477 return -ENOMEM; 5478 } 5479 kvm->arch.pimap = pimap; 5480 } 5481 5482 /* 5483 * For now, we only support interrupts for which the EOI operation 5484 * is an OPAL call followed by a write to XIRR, since that's 5485 * what our real-mode EOI code does, or a XIVE interrupt 5486 */ 5487 chip = irq_data_get_irq_chip(&desc->irq_data); 5488 if (!chip || !is_pnv_opal_msi(chip)) { 5489 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n", 5490 host_irq, guest_gsi); 5491 mutex_unlock(&kvm->lock); 5492 return -ENOENT; 5493 } 5494 5495 /* 5496 * See if we already have an entry for this guest IRQ number. 5497 * If it's mapped to a hardware IRQ number, that's an error, 5498 * otherwise re-use this entry. 5499 */ 5500 for (i = 0; i < pimap->n_mapped; i++) { 5501 if (guest_gsi == pimap->mapped[i].v_hwirq) { 5502 if (pimap->mapped[i].r_hwirq) { 5503 mutex_unlock(&kvm->lock); 5504 return -EINVAL; 5505 } 5506 break; 5507 } 5508 } 5509 5510 if (i == KVMPPC_PIRQ_MAPPED) { 5511 mutex_unlock(&kvm->lock); 5512 return -EAGAIN; /* table is full */ 5513 } 5514 5515 irq_map = &pimap->mapped[i]; 5516 5517 irq_map->v_hwirq = guest_gsi; 5518 irq_map->desc = desc; 5519 5520 /* 5521 * Order the above two stores before the next to serialize with 5522 * the KVM real mode handler. 5523 */ 5524 smp_wmb(); 5525 5526 /* 5527 * The 'host_irq' number is mapped in the PCI-MSI domain but 5528 * the underlying calls, which will EOI the interrupt in real 5529 * mode, need an HW IRQ number mapped in the XICS IRQ domain. 5530 */ 5531 host_data = irq_domain_get_irq_data(irq_get_default_host(), host_irq); 5532 irq_map->r_hwirq = (unsigned int)irqd_to_hwirq(host_data); 5533 5534 if (i == pimap->n_mapped) 5535 pimap->n_mapped++; 5536 5537 if (xics_on_xive()) 5538 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, host_irq); 5539 else 5540 kvmppc_xics_set_mapped(kvm, guest_gsi, irq_map->r_hwirq); 5541 if (rc) 5542 irq_map->r_hwirq = 0; 5543 5544 mutex_unlock(&kvm->lock); 5545 5546 return 0; 5547 } 5548 5549 static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5550 { 5551 struct irq_desc *desc; 5552 struct kvmppc_passthru_irqmap *pimap; 5553 int i, rc = 0; 5554 5555 if (!kvm_irq_bypass) 5556 return 0; 5557 5558 desc = irq_to_desc(host_irq); 5559 if (!desc) 5560 return -EIO; 5561 5562 mutex_lock(&kvm->lock); 5563 if (!kvm->arch.pimap) 5564 goto unlock; 5565 5566 pimap = kvm->arch.pimap; 5567 5568 for (i = 0; i < pimap->n_mapped; i++) { 5569 if (guest_gsi == pimap->mapped[i].v_hwirq) 5570 break; 5571 } 5572 5573 if (i == pimap->n_mapped) { 5574 mutex_unlock(&kvm->lock); 5575 return -ENODEV; 5576 } 5577 5578 if (xics_on_xive()) 5579 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, host_irq); 5580 else 5581 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq); 5582 5583 /* invalidate the entry (what do do on error from the above ?) */ 5584 pimap->mapped[i].r_hwirq = 0; 5585 5586 /* 5587 * We don't free this structure even when the count goes to 5588 * zero. The structure is freed when we destroy the VM. 5589 */ 5590 unlock: 5591 mutex_unlock(&kvm->lock); 5592 return rc; 5593 } 5594 5595 static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons, 5596 struct irq_bypass_producer *prod) 5597 { 5598 int ret = 0; 5599 struct kvm_kernel_irqfd *irqfd = 5600 container_of(cons, struct kvm_kernel_irqfd, consumer); 5601 5602 irqfd->producer = prod; 5603 5604 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5605 if (ret) 5606 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n", 5607 prod->irq, irqfd->gsi, ret); 5608 5609 return ret; 5610 } 5611 5612 static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons, 5613 struct irq_bypass_producer *prod) 5614 { 5615 int ret; 5616 struct kvm_kernel_irqfd *irqfd = 5617 container_of(cons, struct kvm_kernel_irqfd, consumer); 5618 5619 irqfd->producer = NULL; 5620 5621 /* 5622 * When producer of consumer is unregistered, we change back to 5623 * default external interrupt handling mode - KVM real mode 5624 * will switch back to host. 5625 */ 5626 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5627 if (ret) 5628 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n", 5629 prod->irq, irqfd->gsi, ret); 5630 } 5631 #endif 5632 5633 static long kvm_arch_vm_ioctl_hv(struct file *filp, 5634 unsigned int ioctl, unsigned long arg) 5635 { 5636 struct kvm *kvm __maybe_unused = filp->private_data; 5637 void __user *argp = (void __user *)arg; 5638 long r; 5639 5640 switch (ioctl) { 5641 5642 case KVM_PPC_ALLOCATE_HTAB: { 5643 u32 htab_order; 5644 5645 /* If we're a nested hypervisor, we currently only support radix */ 5646 if (kvmhv_on_pseries()) { 5647 r = -EOPNOTSUPP; 5648 break; 5649 } 5650 5651 r = -EFAULT; 5652 if (get_user(htab_order, (u32 __user *)argp)) 5653 break; 5654 r = kvmppc_alloc_reset_hpt(kvm, htab_order); 5655 if (r) 5656 break; 5657 r = 0; 5658 break; 5659 } 5660 5661 case KVM_PPC_GET_HTAB_FD: { 5662 struct kvm_get_htab_fd ghf; 5663 5664 r = -EFAULT; 5665 if (copy_from_user(&ghf, argp, sizeof(ghf))) 5666 break; 5667 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf); 5668 break; 5669 } 5670 5671 case KVM_PPC_RESIZE_HPT_PREPARE: { 5672 struct kvm_ppc_resize_hpt rhpt; 5673 5674 r = -EFAULT; 5675 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5676 break; 5677 5678 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt); 5679 break; 5680 } 5681 5682 case KVM_PPC_RESIZE_HPT_COMMIT: { 5683 struct kvm_ppc_resize_hpt rhpt; 5684 5685 r = -EFAULT; 5686 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5687 break; 5688 5689 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt); 5690 break; 5691 } 5692 5693 default: 5694 r = -ENOTTY; 5695 } 5696 5697 return r; 5698 } 5699 5700 /* 5701 * List of hcall numbers to enable by default. 5702 * For compatibility with old userspace, we enable by default 5703 * all hcalls that were implemented before the hcall-enabling 5704 * facility was added. Note this list should not include H_RTAS. 5705 */ 5706 static unsigned int default_hcall_list[] = { 5707 H_REMOVE, 5708 H_ENTER, 5709 H_READ, 5710 H_PROTECT, 5711 H_BULK_REMOVE, 5712 #ifdef CONFIG_SPAPR_TCE_IOMMU 5713 H_GET_TCE, 5714 H_PUT_TCE, 5715 #endif 5716 H_SET_DABR, 5717 H_SET_XDABR, 5718 H_CEDE, 5719 H_PROD, 5720 H_CONFER, 5721 H_REGISTER_VPA, 5722 #ifdef CONFIG_KVM_XICS 5723 H_EOI, 5724 H_CPPR, 5725 H_IPI, 5726 H_IPOLL, 5727 H_XIRR, 5728 H_XIRR_X, 5729 #endif 5730 0 5731 }; 5732 5733 static void init_default_hcalls(void) 5734 { 5735 int i; 5736 unsigned int hcall; 5737 5738 for (i = 0; default_hcall_list[i]; ++i) { 5739 hcall = default_hcall_list[i]; 5740 WARN_ON(!kvmppc_hcall_impl_hv(hcall)); 5741 __set_bit(hcall / 4, default_enabled_hcalls); 5742 } 5743 } 5744 5745 static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg) 5746 { 5747 unsigned long lpcr; 5748 int radix; 5749 int err; 5750 5751 /* If not on a POWER9, reject it */ 5752 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5753 return -ENODEV; 5754 5755 /* If any unknown flags set, reject it */ 5756 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE)) 5757 return -EINVAL; 5758 5759 /* GR (guest radix) bit in process_table field must match */ 5760 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX); 5761 if (!!(cfg->process_table & PATB_GR) != radix) 5762 return -EINVAL; 5763 5764 /* Process table size field must be reasonable, i.e. <= 24 */ 5765 if ((cfg->process_table & PRTS_MASK) > 24) 5766 return -EINVAL; 5767 5768 /* We can change a guest to/from radix now, if the host is radix */ 5769 if (radix && !radix_enabled()) 5770 return -EINVAL; 5771 5772 /* If we're a nested hypervisor, we currently only support radix */ 5773 if (kvmhv_on_pseries() && !radix) 5774 return -EINVAL; 5775 5776 mutex_lock(&kvm->arch.mmu_setup_lock); 5777 if (radix != kvm_is_radix(kvm)) { 5778 if (kvm->arch.mmu_ready) { 5779 kvm->arch.mmu_ready = 0; 5780 /* order mmu_ready vs. vcpus_running */ 5781 smp_mb(); 5782 if (atomic_read(&kvm->arch.vcpus_running)) { 5783 kvm->arch.mmu_ready = 1; 5784 err = -EBUSY; 5785 goto out_unlock; 5786 } 5787 } 5788 if (radix) 5789 err = kvmppc_switch_mmu_to_radix(kvm); 5790 else 5791 err = kvmppc_switch_mmu_to_hpt(kvm); 5792 if (err) 5793 goto out_unlock; 5794 } 5795 5796 kvm->arch.process_table = cfg->process_table; 5797 kvmppc_setup_partition_table(kvm); 5798 5799 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0; 5800 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE); 5801 err = 0; 5802 5803 out_unlock: 5804 mutex_unlock(&kvm->arch.mmu_setup_lock); 5805 return err; 5806 } 5807 5808 static int kvmhv_enable_nested(struct kvm *kvm) 5809 { 5810 if (!nested) 5811 return -EPERM; 5812 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5813 return -ENODEV; 5814 if (!radix_enabled()) 5815 return -ENODEV; 5816 5817 /* kvm == NULL means the caller is testing if the capability exists */ 5818 if (kvm) 5819 kvm->arch.nested_enable = true; 5820 return 0; 5821 } 5822 5823 static int kvmhv_load_from_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5824 int size) 5825 { 5826 int rc = -EINVAL; 5827 5828 if (kvmhv_vcpu_is_radix(vcpu)) { 5829 rc = kvmhv_copy_from_guest_radix(vcpu, *eaddr, ptr, size); 5830 5831 if (rc > 0) 5832 rc = -EINVAL; 5833 } 5834 5835 /* For now quadrants are the only way to access nested guest memory */ 5836 if (rc && vcpu->arch.nested) 5837 rc = -EAGAIN; 5838 5839 return rc; 5840 } 5841 5842 static int kvmhv_store_to_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5843 int size) 5844 { 5845 int rc = -EINVAL; 5846 5847 if (kvmhv_vcpu_is_radix(vcpu)) { 5848 rc = kvmhv_copy_to_guest_radix(vcpu, *eaddr, ptr, size); 5849 5850 if (rc > 0) 5851 rc = -EINVAL; 5852 } 5853 5854 /* For now quadrants are the only way to access nested guest memory */ 5855 if (rc && vcpu->arch.nested) 5856 rc = -EAGAIN; 5857 5858 return rc; 5859 } 5860 5861 static void unpin_vpa_reset(struct kvm *kvm, struct kvmppc_vpa *vpa) 5862 { 5863 unpin_vpa(kvm, vpa); 5864 vpa->gpa = 0; 5865 vpa->pinned_addr = NULL; 5866 vpa->dirty = false; 5867 vpa->update_pending = 0; 5868 } 5869 5870 /* 5871 * Enable a guest to become a secure VM, or test whether 5872 * that could be enabled. 5873 * Called when the KVM_CAP_PPC_SECURE_GUEST capability is 5874 * tested (kvm == NULL) or enabled (kvm != NULL). 5875 */ 5876 static int kvmhv_enable_svm(struct kvm *kvm) 5877 { 5878 if (!kvmppc_uvmem_available()) 5879 return -EINVAL; 5880 if (kvm) 5881 kvm->arch.svm_enabled = 1; 5882 return 0; 5883 } 5884 5885 /* 5886 * IOCTL handler to turn off secure mode of guest 5887 * 5888 * - Release all device pages 5889 * - Issue ucall to terminate the guest on the UV side 5890 * - Unpin the VPA pages. 5891 * - Reinit the partition scoped page tables 5892 */ 5893 static int kvmhv_svm_off(struct kvm *kvm) 5894 { 5895 struct kvm_vcpu *vcpu; 5896 int mmu_was_ready; 5897 int srcu_idx; 5898 int ret = 0; 5899 int i; 5900 5901 if (!(kvm->arch.secure_guest & KVMPPC_SECURE_INIT_START)) 5902 return ret; 5903 5904 mutex_lock(&kvm->arch.mmu_setup_lock); 5905 mmu_was_ready = kvm->arch.mmu_ready; 5906 if (kvm->arch.mmu_ready) { 5907 kvm->arch.mmu_ready = 0; 5908 /* order mmu_ready vs. vcpus_running */ 5909 smp_mb(); 5910 if (atomic_read(&kvm->arch.vcpus_running)) { 5911 kvm->arch.mmu_ready = 1; 5912 ret = -EBUSY; 5913 goto out; 5914 } 5915 } 5916 5917 srcu_idx = srcu_read_lock(&kvm->srcu); 5918 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5919 struct kvm_memory_slot *memslot; 5920 struct kvm_memslots *slots = __kvm_memslots(kvm, i); 5921 5922 if (!slots) 5923 continue; 5924 5925 kvm_for_each_memslot(memslot, slots) { 5926 kvmppc_uvmem_drop_pages(memslot, kvm, true); 5927 uv_unregister_mem_slot(kvm->arch.lpid, memslot->id); 5928 } 5929 } 5930 srcu_read_unlock(&kvm->srcu, srcu_idx); 5931 5932 ret = uv_svm_terminate(kvm->arch.lpid); 5933 if (ret != U_SUCCESS) { 5934 ret = -EINVAL; 5935 goto out; 5936 } 5937 5938 /* 5939 * When secure guest is reset, all the guest pages are sent 5940 * to UV via UV_PAGE_IN before the non-boot vcpus get a 5941 * chance to run and unpin their VPA pages. Unpinning of all 5942 * VPA pages is done here explicitly so that VPA pages 5943 * can be migrated to the secure side. 5944 * 5945 * This is required to for the secure SMP guest to reboot 5946 * correctly. 5947 */ 5948 kvm_for_each_vcpu(i, vcpu, kvm) { 5949 spin_lock(&vcpu->arch.vpa_update_lock); 5950 unpin_vpa_reset(kvm, &vcpu->arch.dtl); 5951 unpin_vpa_reset(kvm, &vcpu->arch.slb_shadow); 5952 unpin_vpa_reset(kvm, &vcpu->arch.vpa); 5953 spin_unlock(&vcpu->arch.vpa_update_lock); 5954 } 5955 5956 kvmppc_setup_partition_table(kvm); 5957 kvm->arch.secure_guest = 0; 5958 kvm->arch.mmu_ready = mmu_was_ready; 5959 out: 5960 mutex_unlock(&kvm->arch.mmu_setup_lock); 5961 return ret; 5962 } 5963 5964 static int kvmhv_enable_dawr1(struct kvm *kvm) 5965 { 5966 if (!cpu_has_feature(CPU_FTR_DAWR1)) 5967 return -ENODEV; 5968 5969 /* kvm == NULL means the caller is testing if the capability exists */ 5970 if (kvm) 5971 kvm->arch.dawr1_enabled = true; 5972 return 0; 5973 } 5974 5975 static bool kvmppc_hash_v3_possible(void) 5976 { 5977 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5978 return false; 5979 5980 if (!cpu_has_feature(CPU_FTR_HVMODE)) 5981 return false; 5982 5983 /* 5984 * POWER9 chips before version 2.02 can't have some threads in 5985 * HPT mode and some in radix mode on the same core. 5986 */ 5987 if (radix_enabled()) { 5988 unsigned int pvr = mfspr(SPRN_PVR); 5989 if ((pvr >> 16) == PVR_POWER9 && 5990 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) || 5991 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101))) 5992 return false; 5993 } 5994 5995 return true; 5996 } 5997 5998 static struct kvmppc_ops kvm_ops_hv = { 5999 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv, 6000 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv, 6001 .get_one_reg = kvmppc_get_one_reg_hv, 6002 .set_one_reg = kvmppc_set_one_reg_hv, 6003 .vcpu_load = kvmppc_core_vcpu_load_hv, 6004 .vcpu_put = kvmppc_core_vcpu_put_hv, 6005 .inject_interrupt = kvmppc_inject_interrupt_hv, 6006 .set_msr = kvmppc_set_msr_hv, 6007 .vcpu_run = kvmppc_vcpu_run_hv, 6008 .vcpu_create = kvmppc_core_vcpu_create_hv, 6009 .vcpu_free = kvmppc_core_vcpu_free_hv, 6010 .check_requests = kvmppc_core_check_requests_hv, 6011 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv, 6012 .flush_memslot = kvmppc_core_flush_memslot_hv, 6013 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv, 6014 .commit_memory_region = kvmppc_core_commit_memory_region_hv, 6015 .unmap_gfn_range = kvm_unmap_gfn_range_hv, 6016 .age_gfn = kvm_age_gfn_hv, 6017 .test_age_gfn = kvm_test_age_gfn_hv, 6018 .set_spte_gfn = kvm_set_spte_gfn_hv, 6019 .free_memslot = kvmppc_core_free_memslot_hv, 6020 .init_vm = kvmppc_core_init_vm_hv, 6021 .destroy_vm = kvmppc_core_destroy_vm_hv, 6022 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv, 6023 .emulate_op = kvmppc_core_emulate_op_hv, 6024 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv, 6025 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv, 6026 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv, 6027 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv, 6028 .hcall_implemented = kvmppc_hcall_impl_hv, 6029 #ifdef CONFIG_KVM_XICS 6030 .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv, 6031 .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv, 6032 #endif 6033 .configure_mmu = kvmhv_configure_mmu, 6034 .get_rmmu_info = kvmhv_get_rmmu_info, 6035 .set_smt_mode = kvmhv_set_smt_mode, 6036 .enable_nested = kvmhv_enable_nested, 6037 .load_from_eaddr = kvmhv_load_from_eaddr, 6038 .store_to_eaddr = kvmhv_store_to_eaddr, 6039 .enable_svm = kvmhv_enable_svm, 6040 .svm_off = kvmhv_svm_off, 6041 .enable_dawr1 = kvmhv_enable_dawr1, 6042 .hash_v3_possible = kvmppc_hash_v3_possible, 6043 }; 6044 6045 static int kvm_init_subcore_bitmap(void) 6046 { 6047 int i, j; 6048 int nr_cores = cpu_nr_cores(); 6049 struct sibling_subcore_state *sibling_subcore_state; 6050 6051 for (i = 0; i < nr_cores; i++) { 6052 int first_cpu = i * threads_per_core; 6053 int node = cpu_to_node(first_cpu); 6054 6055 /* Ignore if it is already allocated. */ 6056 if (paca_ptrs[first_cpu]->sibling_subcore_state) 6057 continue; 6058 6059 sibling_subcore_state = 6060 kzalloc_node(sizeof(struct sibling_subcore_state), 6061 GFP_KERNEL, node); 6062 if (!sibling_subcore_state) 6063 return -ENOMEM; 6064 6065 6066 for (j = 0; j < threads_per_core; j++) { 6067 int cpu = first_cpu + j; 6068 6069 paca_ptrs[cpu]->sibling_subcore_state = 6070 sibling_subcore_state; 6071 } 6072 } 6073 return 0; 6074 } 6075 6076 static int kvmppc_radix_possible(void) 6077 { 6078 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled(); 6079 } 6080 6081 static int kvmppc_book3s_init_hv(void) 6082 { 6083 int r; 6084 6085 if (!tlbie_capable) { 6086 pr_err("KVM-HV: Host does not support TLBIE\n"); 6087 return -ENODEV; 6088 } 6089 6090 /* 6091 * FIXME!! Do we need to check on all cpus ? 6092 */ 6093 r = kvmppc_core_check_processor_compat_hv(); 6094 if (r < 0) 6095 return -ENODEV; 6096 6097 r = kvmhv_nested_init(); 6098 if (r) 6099 return r; 6100 6101 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 6102 r = kvm_init_subcore_bitmap(); 6103 if (r) 6104 return r; 6105 } 6106 6107 /* 6108 * We need a way of accessing the XICS interrupt controller, 6109 * either directly, via paca_ptrs[cpu]->kvm_hstate.xics_phys, or 6110 * indirectly, via OPAL. 6111 */ 6112 #ifdef CONFIG_SMP 6113 if (!xics_on_xive() && !kvmhv_on_pseries() && 6114 !local_paca->kvm_hstate.xics_phys) { 6115 struct device_node *np; 6116 6117 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc"); 6118 if (!np) { 6119 pr_err("KVM-HV: Cannot determine method for accessing XICS\n"); 6120 return -ENODEV; 6121 } 6122 /* presence of intc confirmed - node can be dropped again */ 6123 of_node_put(np); 6124 } 6125 #endif 6126 6127 kvm_ops_hv.owner = THIS_MODULE; 6128 kvmppc_hv_ops = &kvm_ops_hv; 6129 6130 init_default_hcalls(); 6131 6132 init_vcore_lists(); 6133 6134 r = kvmppc_mmu_hv_init(); 6135 if (r) 6136 return r; 6137 6138 if (kvmppc_radix_possible()) 6139 r = kvmppc_radix_init(); 6140 6141 r = kvmppc_uvmem_init(); 6142 if (r < 0) 6143 pr_err("KVM-HV: kvmppc_uvmem_init failed %d\n", r); 6144 6145 return r; 6146 } 6147 6148 static void kvmppc_book3s_exit_hv(void) 6149 { 6150 kvmppc_uvmem_free(); 6151 kvmppc_free_host_rm_ops(); 6152 if (kvmppc_radix_possible()) 6153 kvmppc_radix_exit(); 6154 kvmppc_hv_ops = NULL; 6155 kvmhv_nested_exit(); 6156 } 6157 6158 module_init(kvmppc_book3s_init_hv); 6159 module_exit(kvmppc_book3s_exit_hv); 6160 MODULE_LICENSE("GPL"); 6161 MODULE_ALIAS_MISCDEV(KVM_MINOR); 6162 MODULE_ALIAS("devname:kvm"); 6163