1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 4 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 5 * 6 * Authors: 7 * Paul Mackerras <paulus@au1.ibm.com> 8 * Alexander Graf <agraf@suse.de> 9 * Kevin Wolf <mail@kevin-wolf.de> 10 * 11 * Description: KVM functions specific to running on Book 3S 12 * processors in hypervisor mode (specifically POWER7 and later). 13 * 14 * This file is derived from arch/powerpc/kvm/book3s.c, 15 * by Alexander Graf <agraf@suse.de>. 16 */ 17 18 #include <linux/kvm_host.h> 19 #include <linux/kernel.h> 20 #include <linux/err.h> 21 #include <linux/slab.h> 22 #include <linux/preempt.h> 23 #include <linux/sched/signal.h> 24 #include <linux/sched/stat.h> 25 #include <linux/delay.h> 26 #include <linux/export.h> 27 #include <linux/fs.h> 28 #include <linux/anon_inodes.h> 29 #include <linux/cpu.h> 30 #include <linux/cpumask.h> 31 #include <linux/spinlock.h> 32 #include <linux/page-flags.h> 33 #include <linux/srcu.h> 34 #include <linux/miscdevice.h> 35 #include <linux/debugfs.h> 36 #include <linux/gfp.h> 37 #include <linux/vmalloc.h> 38 #include <linux/highmem.h> 39 #include <linux/hugetlb.h> 40 #include <linux/kvm_irqfd.h> 41 #include <linux/irqbypass.h> 42 #include <linux/module.h> 43 #include <linux/compiler.h> 44 #include <linux/of.h> 45 46 #include <asm/ftrace.h> 47 #include <asm/reg.h> 48 #include <asm/ppc-opcode.h> 49 #include <asm/asm-prototypes.h> 50 #include <asm/archrandom.h> 51 #include <asm/debug.h> 52 #include <asm/disassemble.h> 53 #include <asm/cputable.h> 54 #include <asm/cacheflush.h> 55 #include <linux/uaccess.h> 56 #include <asm/interrupt.h> 57 #include <asm/io.h> 58 #include <asm/kvm_ppc.h> 59 #include <asm/kvm_book3s.h> 60 #include <asm/mmu_context.h> 61 #include <asm/lppaca.h> 62 #include <asm/processor.h> 63 #include <asm/cputhreads.h> 64 #include <asm/page.h> 65 #include <asm/hvcall.h> 66 #include <asm/switch_to.h> 67 #include <asm/smp.h> 68 #include <asm/dbell.h> 69 #include <asm/hmi.h> 70 #include <asm/pnv-pci.h> 71 #include <asm/mmu.h> 72 #include <asm/opal.h> 73 #include <asm/xics.h> 74 #include <asm/xive.h> 75 #include <asm/hw_breakpoint.h> 76 #include <asm/kvm_book3s_uvmem.h> 77 #include <asm/ultravisor.h> 78 #include <asm/dtl.h> 79 #include <asm/plpar_wrappers.h> 80 81 #include "book3s.h" 82 83 #define CREATE_TRACE_POINTS 84 #include "trace_hv.h" 85 86 /* #define EXIT_DEBUG */ 87 /* #define EXIT_DEBUG_SIMPLE */ 88 /* #define EXIT_DEBUG_INT */ 89 90 /* Used to indicate that a guest page fault needs to be handled */ 91 #define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1) 92 /* Used to indicate that a guest passthrough interrupt needs to be handled */ 93 #define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2) 94 95 /* Used as a "null" value for timebase values */ 96 #define TB_NIL (~(u64)0) 97 98 static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1); 99 100 static int dynamic_mt_modes = 6; 101 module_param(dynamic_mt_modes, int, 0644); 102 MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)"); 103 static int target_smt_mode; 104 module_param(target_smt_mode, int, 0644); 105 MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)"); 106 107 static bool one_vm_per_core; 108 module_param(one_vm_per_core, bool, S_IRUGO | S_IWUSR); 109 MODULE_PARM_DESC(one_vm_per_core, "Only run vCPUs from the same VM on a core (requires POWER8 or older)"); 110 111 #ifdef CONFIG_KVM_XICS 112 static const struct kernel_param_ops module_param_ops = { 113 .set = param_set_int, 114 .get = param_get_int, 115 }; 116 117 module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644); 118 MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization"); 119 120 module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644); 121 MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core"); 122 #endif 123 124 /* If set, guests are allowed to create and control nested guests */ 125 static bool nested = true; 126 module_param(nested, bool, S_IRUGO | S_IWUSR); 127 MODULE_PARM_DESC(nested, "Enable nested virtualization (only on POWER9)"); 128 129 static inline bool nesting_enabled(struct kvm *kvm) 130 { 131 return kvm->arch.nested_enable && kvm_is_radix(kvm); 132 } 133 134 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu); 135 136 /* 137 * RWMR values for POWER8. These control the rate at which PURR 138 * and SPURR count and should be set according to the number of 139 * online threads in the vcore being run. 140 */ 141 #define RWMR_RPA_P8_1THREAD 0x164520C62609AECAUL 142 #define RWMR_RPA_P8_2THREAD 0x7FFF2908450D8DA9UL 143 #define RWMR_RPA_P8_3THREAD 0x164520C62609AECAUL 144 #define RWMR_RPA_P8_4THREAD 0x199A421245058DA9UL 145 #define RWMR_RPA_P8_5THREAD 0x164520C62609AECAUL 146 #define RWMR_RPA_P8_6THREAD 0x164520C62609AECAUL 147 #define RWMR_RPA_P8_7THREAD 0x164520C62609AECAUL 148 #define RWMR_RPA_P8_8THREAD 0x164520C62609AECAUL 149 150 static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = { 151 RWMR_RPA_P8_1THREAD, 152 RWMR_RPA_P8_1THREAD, 153 RWMR_RPA_P8_2THREAD, 154 RWMR_RPA_P8_3THREAD, 155 RWMR_RPA_P8_4THREAD, 156 RWMR_RPA_P8_5THREAD, 157 RWMR_RPA_P8_6THREAD, 158 RWMR_RPA_P8_7THREAD, 159 RWMR_RPA_P8_8THREAD, 160 }; 161 162 static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc, 163 int *ip) 164 { 165 int i = *ip; 166 struct kvm_vcpu *vcpu; 167 168 while (++i < MAX_SMT_THREADS) { 169 vcpu = READ_ONCE(vc->runnable_threads[i]); 170 if (vcpu) { 171 *ip = i; 172 return vcpu; 173 } 174 } 175 return NULL; 176 } 177 178 /* Used to traverse the list of runnable threads for a given vcore */ 179 #define for_each_runnable_thread(i, vcpu, vc) \ 180 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); ) 181 182 static bool kvmppc_ipi_thread(int cpu) 183 { 184 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 185 186 /* If we're a nested hypervisor, fall back to ordinary IPIs for now */ 187 if (kvmhv_on_pseries()) 188 return false; 189 190 /* On POWER9 we can use msgsnd to IPI any cpu */ 191 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 192 msg |= get_hard_smp_processor_id(cpu); 193 smp_mb(); 194 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 195 return true; 196 } 197 198 /* On POWER8 for IPIs to threads in the same core, use msgsnd */ 199 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 200 preempt_disable(); 201 if (cpu_first_thread_sibling(cpu) == 202 cpu_first_thread_sibling(smp_processor_id())) { 203 msg |= cpu_thread_in_core(cpu); 204 smp_mb(); 205 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 206 preempt_enable(); 207 return true; 208 } 209 preempt_enable(); 210 } 211 212 #if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP) 213 if (cpu >= 0 && cpu < nr_cpu_ids) { 214 if (paca_ptrs[cpu]->kvm_hstate.xics_phys) { 215 xics_wake_cpu(cpu); 216 return true; 217 } 218 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY); 219 return true; 220 } 221 #endif 222 223 return false; 224 } 225 226 static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu) 227 { 228 int cpu; 229 struct rcuwait *waitp; 230 231 waitp = kvm_arch_vcpu_get_wait(vcpu); 232 if (rcuwait_wake_up(waitp)) 233 ++vcpu->stat.generic.halt_wakeup; 234 235 cpu = READ_ONCE(vcpu->arch.thread_cpu); 236 if (cpu >= 0 && kvmppc_ipi_thread(cpu)) 237 return; 238 239 /* CPU points to the first thread of the core */ 240 cpu = vcpu->cpu; 241 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu)) 242 smp_send_reschedule(cpu); 243 } 244 245 /* 246 * We use the vcpu_load/put functions to measure stolen time. 247 * Stolen time is counted as time when either the vcpu is able to 248 * run as part of a virtual core, but the task running the vcore 249 * is preempted or sleeping, or when the vcpu needs something done 250 * in the kernel by the task running the vcpu, but that task is 251 * preempted or sleeping. Those two things have to be counted 252 * separately, since one of the vcpu tasks will take on the job 253 * of running the core, and the other vcpu tasks in the vcore will 254 * sleep waiting for it to do that, but that sleep shouldn't count 255 * as stolen time. 256 * 257 * Hence we accumulate stolen time when the vcpu can run as part of 258 * a vcore using vc->stolen_tb, and the stolen time when the vcpu 259 * needs its task to do other things in the kernel (for example, 260 * service a page fault) in busy_stolen. We don't accumulate 261 * stolen time for a vcore when it is inactive, or for a vcpu 262 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of 263 * a misnomer; it means that the vcpu task is not executing in 264 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in 265 * the kernel. We don't have any way of dividing up that time 266 * between time that the vcpu is genuinely stopped, time that 267 * the task is actively working on behalf of the vcpu, and time 268 * that the task is preempted, so we don't count any of it as 269 * stolen. 270 * 271 * Updates to busy_stolen are protected by arch.tbacct_lock; 272 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock 273 * lock. The stolen times are measured in units of timebase ticks. 274 * (Note that the != TB_NIL checks below are purely defensive; 275 * they should never fail.) 276 */ 277 278 static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc) 279 { 280 unsigned long flags; 281 282 spin_lock_irqsave(&vc->stoltb_lock, flags); 283 vc->preempt_tb = mftb(); 284 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 285 } 286 287 static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc) 288 { 289 unsigned long flags; 290 291 spin_lock_irqsave(&vc->stoltb_lock, flags); 292 if (vc->preempt_tb != TB_NIL) { 293 vc->stolen_tb += mftb() - vc->preempt_tb; 294 vc->preempt_tb = TB_NIL; 295 } 296 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 297 } 298 299 static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu) 300 { 301 struct kvmppc_vcore *vc = vcpu->arch.vcore; 302 unsigned long flags; 303 304 /* 305 * We can test vc->runner without taking the vcore lock, 306 * because only this task ever sets vc->runner to this 307 * vcpu, and once it is set to this vcpu, only this task 308 * ever sets it to NULL. 309 */ 310 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 311 kvmppc_core_end_stolen(vc); 312 313 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 314 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST && 315 vcpu->arch.busy_preempt != TB_NIL) { 316 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt; 317 vcpu->arch.busy_preempt = TB_NIL; 318 } 319 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 320 } 321 322 static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu) 323 { 324 struct kvmppc_vcore *vc = vcpu->arch.vcore; 325 unsigned long flags; 326 327 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 328 kvmppc_core_start_stolen(vc); 329 330 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 331 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST) 332 vcpu->arch.busy_preempt = mftb(); 333 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 334 } 335 336 static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr) 337 { 338 vcpu->arch.pvr = pvr; 339 } 340 341 /* Dummy value used in computing PCR value below */ 342 #define PCR_ARCH_31 (PCR_ARCH_300 << 1) 343 344 static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat) 345 { 346 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0; 347 struct kvmppc_vcore *vc = vcpu->arch.vcore; 348 349 /* We can (emulate) our own architecture version and anything older */ 350 if (cpu_has_feature(CPU_FTR_ARCH_31)) 351 host_pcr_bit = PCR_ARCH_31; 352 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 353 host_pcr_bit = PCR_ARCH_300; 354 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 355 host_pcr_bit = PCR_ARCH_207; 356 else if (cpu_has_feature(CPU_FTR_ARCH_206)) 357 host_pcr_bit = PCR_ARCH_206; 358 else 359 host_pcr_bit = PCR_ARCH_205; 360 361 /* Determine lowest PCR bit needed to run guest in given PVR level */ 362 guest_pcr_bit = host_pcr_bit; 363 if (arch_compat) { 364 switch (arch_compat) { 365 case PVR_ARCH_205: 366 guest_pcr_bit = PCR_ARCH_205; 367 break; 368 case PVR_ARCH_206: 369 case PVR_ARCH_206p: 370 guest_pcr_bit = PCR_ARCH_206; 371 break; 372 case PVR_ARCH_207: 373 guest_pcr_bit = PCR_ARCH_207; 374 break; 375 case PVR_ARCH_300: 376 guest_pcr_bit = PCR_ARCH_300; 377 break; 378 case PVR_ARCH_31: 379 guest_pcr_bit = PCR_ARCH_31; 380 break; 381 default: 382 return -EINVAL; 383 } 384 } 385 386 /* Check requested PCR bits don't exceed our capabilities */ 387 if (guest_pcr_bit > host_pcr_bit) 388 return -EINVAL; 389 390 spin_lock(&vc->lock); 391 vc->arch_compat = arch_compat; 392 /* 393 * Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit 394 * Also set all reserved PCR bits 395 */ 396 vc->pcr = (host_pcr_bit - guest_pcr_bit) | PCR_MASK; 397 spin_unlock(&vc->lock); 398 399 return 0; 400 } 401 402 static void kvmppc_dump_regs(struct kvm_vcpu *vcpu) 403 { 404 int r; 405 406 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id); 407 pr_err("pc = %.16lx msr = %.16llx trap = %x\n", 408 vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap); 409 for (r = 0; r < 16; ++r) 410 pr_err("r%2d = %.16lx r%d = %.16lx\n", 411 r, kvmppc_get_gpr(vcpu, r), 412 r+16, kvmppc_get_gpr(vcpu, r+16)); 413 pr_err("ctr = %.16lx lr = %.16lx\n", 414 vcpu->arch.regs.ctr, vcpu->arch.regs.link); 415 pr_err("srr0 = %.16llx srr1 = %.16llx\n", 416 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1); 417 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n", 418 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1); 419 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n", 420 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3); 421 pr_err("cr = %.8lx xer = %.16lx dsisr = %.8x\n", 422 vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr); 423 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar); 424 pr_err("fault dar = %.16lx dsisr = %.8x\n", 425 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 426 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max); 427 for (r = 0; r < vcpu->arch.slb_max; ++r) 428 pr_err(" ESID = %.16llx VSID = %.16llx\n", 429 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv); 430 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n", 431 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1, 432 vcpu->arch.last_inst); 433 } 434 435 static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id) 436 { 437 return kvm_get_vcpu_by_id(kvm, id); 438 } 439 440 static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa) 441 { 442 vpa->__old_status |= LPPACA_OLD_SHARED_PROC; 443 vpa->yield_count = cpu_to_be32(1); 444 } 445 446 static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v, 447 unsigned long addr, unsigned long len) 448 { 449 /* check address is cacheline aligned */ 450 if (addr & (L1_CACHE_BYTES - 1)) 451 return -EINVAL; 452 spin_lock(&vcpu->arch.vpa_update_lock); 453 if (v->next_gpa != addr || v->len != len) { 454 v->next_gpa = addr; 455 v->len = addr ? len : 0; 456 v->update_pending = 1; 457 } 458 spin_unlock(&vcpu->arch.vpa_update_lock); 459 return 0; 460 } 461 462 /* Length for a per-processor buffer is passed in at offset 4 in the buffer */ 463 struct reg_vpa { 464 u32 dummy; 465 union { 466 __be16 hword; 467 __be32 word; 468 } length; 469 }; 470 471 static int vpa_is_registered(struct kvmppc_vpa *vpap) 472 { 473 if (vpap->update_pending) 474 return vpap->next_gpa != 0; 475 return vpap->pinned_addr != NULL; 476 } 477 478 static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu, 479 unsigned long flags, 480 unsigned long vcpuid, unsigned long vpa) 481 { 482 struct kvm *kvm = vcpu->kvm; 483 unsigned long len, nb; 484 void *va; 485 struct kvm_vcpu *tvcpu; 486 int err; 487 int subfunc; 488 struct kvmppc_vpa *vpap; 489 490 tvcpu = kvmppc_find_vcpu(kvm, vcpuid); 491 if (!tvcpu) 492 return H_PARAMETER; 493 494 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK; 495 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL || 496 subfunc == H_VPA_REG_SLB) { 497 /* Registering new area - address must be cache-line aligned */ 498 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa) 499 return H_PARAMETER; 500 501 /* convert logical addr to kernel addr and read length */ 502 va = kvmppc_pin_guest_page(kvm, vpa, &nb); 503 if (va == NULL) 504 return H_PARAMETER; 505 if (subfunc == H_VPA_REG_VPA) 506 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword); 507 else 508 len = be32_to_cpu(((struct reg_vpa *)va)->length.word); 509 kvmppc_unpin_guest_page(kvm, va, vpa, false); 510 511 /* Check length */ 512 if (len > nb || len < sizeof(struct reg_vpa)) 513 return H_PARAMETER; 514 } else { 515 vpa = 0; 516 len = 0; 517 } 518 519 err = H_PARAMETER; 520 vpap = NULL; 521 spin_lock(&tvcpu->arch.vpa_update_lock); 522 523 switch (subfunc) { 524 case H_VPA_REG_VPA: /* register VPA */ 525 /* 526 * The size of our lppaca is 1kB because of the way we align 527 * it for the guest to avoid crossing a 4kB boundary. We only 528 * use 640 bytes of the structure though, so we should accept 529 * clients that set a size of 640. 530 */ 531 BUILD_BUG_ON(sizeof(struct lppaca) != 640); 532 if (len < sizeof(struct lppaca)) 533 break; 534 vpap = &tvcpu->arch.vpa; 535 err = 0; 536 break; 537 538 case H_VPA_REG_DTL: /* register DTL */ 539 if (len < sizeof(struct dtl_entry)) 540 break; 541 len -= len % sizeof(struct dtl_entry); 542 543 /* Check that they have previously registered a VPA */ 544 err = H_RESOURCE; 545 if (!vpa_is_registered(&tvcpu->arch.vpa)) 546 break; 547 548 vpap = &tvcpu->arch.dtl; 549 err = 0; 550 break; 551 552 case H_VPA_REG_SLB: /* register SLB shadow buffer */ 553 /* Check that they have previously registered a VPA */ 554 err = H_RESOURCE; 555 if (!vpa_is_registered(&tvcpu->arch.vpa)) 556 break; 557 558 vpap = &tvcpu->arch.slb_shadow; 559 err = 0; 560 break; 561 562 case H_VPA_DEREG_VPA: /* deregister VPA */ 563 /* Check they don't still have a DTL or SLB buf registered */ 564 err = H_RESOURCE; 565 if (vpa_is_registered(&tvcpu->arch.dtl) || 566 vpa_is_registered(&tvcpu->arch.slb_shadow)) 567 break; 568 569 vpap = &tvcpu->arch.vpa; 570 err = 0; 571 break; 572 573 case H_VPA_DEREG_DTL: /* deregister DTL */ 574 vpap = &tvcpu->arch.dtl; 575 err = 0; 576 break; 577 578 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */ 579 vpap = &tvcpu->arch.slb_shadow; 580 err = 0; 581 break; 582 } 583 584 if (vpap) { 585 vpap->next_gpa = vpa; 586 vpap->len = len; 587 vpap->update_pending = 1; 588 } 589 590 spin_unlock(&tvcpu->arch.vpa_update_lock); 591 592 return err; 593 } 594 595 static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap) 596 { 597 struct kvm *kvm = vcpu->kvm; 598 void *va; 599 unsigned long nb; 600 unsigned long gpa; 601 602 /* 603 * We need to pin the page pointed to by vpap->next_gpa, 604 * but we can't call kvmppc_pin_guest_page under the lock 605 * as it does get_user_pages() and down_read(). So we 606 * have to drop the lock, pin the page, then get the lock 607 * again and check that a new area didn't get registered 608 * in the meantime. 609 */ 610 for (;;) { 611 gpa = vpap->next_gpa; 612 spin_unlock(&vcpu->arch.vpa_update_lock); 613 va = NULL; 614 nb = 0; 615 if (gpa) 616 va = kvmppc_pin_guest_page(kvm, gpa, &nb); 617 spin_lock(&vcpu->arch.vpa_update_lock); 618 if (gpa == vpap->next_gpa) 619 break; 620 /* sigh... unpin that one and try again */ 621 if (va) 622 kvmppc_unpin_guest_page(kvm, va, gpa, false); 623 } 624 625 vpap->update_pending = 0; 626 if (va && nb < vpap->len) { 627 /* 628 * If it's now too short, it must be that userspace 629 * has changed the mappings underlying guest memory, 630 * so unregister the region. 631 */ 632 kvmppc_unpin_guest_page(kvm, va, gpa, false); 633 va = NULL; 634 } 635 if (vpap->pinned_addr) 636 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa, 637 vpap->dirty); 638 vpap->gpa = gpa; 639 vpap->pinned_addr = va; 640 vpap->dirty = false; 641 if (va) 642 vpap->pinned_end = va + vpap->len; 643 } 644 645 static void kvmppc_update_vpas(struct kvm_vcpu *vcpu) 646 { 647 if (!(vcpu->arch.vpa.update_pending || 648 vcpu->arch.slb_shadow.update_pending || 649 vcpu->arch.dtl.update_pending)) 650 return; 651 652 spin_lock(&vcpu->arch.vpa_update_lock); 653 if (vcpu->arch.vpa.update_pending) { 654 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa); 655 if (vcpu->arch.vpa.pinned_addr) 656 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr); 657 } 658 if (vcpu->arch.dtl.update_pending) { 659 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl); 660 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr; 661 vcpu->arch.dtl_index = 0; 662 } 663 if (vcpu->arch.slb_shadow.update_pending) 664 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow); 665 spin_unlock(&vcpu->arch.vpa_update_lock); 666 } 667 668 /* 669 * Return the accumulated stolen time for the vcore up until `now'. 670 * The caller should hold the vcore lock. 671 */ 672 static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now) 673 { 674 u64 p; 675 unsigned long flags; 676 677 spin_lock_irqsave(&vc->stoltb_lock, flags); 678 p = vc->stolen_tb; 679 if (vc->vcore_state != VCORE_INACTIVE && 680 vc->preempt_tb != TB_NIL) 681 p += now - vc->preempt_tb; 682 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 683 return p; 684 } 685 686 static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu, 687 struct kvmppc_vcore *vc) 688 { 689 struct dtl_entry *dt; 690 struct lppaca *vpa; 691 unsigned long stolen; 692 unsigned long core_stolen; 693 u64 now; 694 unsigned long flags; 695 696 dt = vcpu->arch.dtl_ptr; 697 vpa = vcpu->arch.vpa.pinned_addr; 698 now = mftb(); 699 core_stolen = vcore_stolen_time(vc, now); 700 stolen = core_stolen - vcpu->arch.stolen_logged; 701 vcpu->arch.stolen_logged = core_stolen; 702 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 703 stolen += vcpu->arch.busy_stolen; 704 vcpu->arch.busy_stolen = 0; 705 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 706 if (!dt || !vpa) 707 return; 708 memset(dt, 0, sizeof(struct dtl_entry)); 709 dt->dispatch_reason = 7; 710 dt->processor_id = cpu_to_be16(vc->pcpu + vcpu->arch.ptid); 711 dt->timebase = cpu_to_be64(now + vc->tb_offset); 712 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen); 713 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu)); 714 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr); 715 ++dt; 716 if (dt == vcpu->arch.dtl.pinned_end) 717 dt = vcpu->arch.dtl.pinned_addr; 718 vcpu->arch.dtl_ptr = dt; 719 /* order writing *dt vs. writing vpa->dtl_idx */ 720 smp_wmb(); 721 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index); 722 vcpu->arch.dtl.dirty = true; 723 } 724 725 /* See if there is a doorbell interrupt pending for a vcpu */ 726 static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu) 727 { 728 int thr; 729 struct kvmppc_vcore *vc; 730 731 if (vcpu->arch.doorbell_request) 732 return true; 733 /* 734 * Ensure that the read of vcore->dpdes comes after the read 735 * of vcpu->doorbell_request. This barrier matches the 736 * smp_wmb() in kvmppc_guest_entry_inject(). 737 */ 738 smp_rmb(); 739 vc = vcpu->arch.vcore; 740 thr = vcpu->vcpu_id - vc->first_vcpuid; 741 return !!(vc->dpdes & (1 << thr)); 742 } 743 744 static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu) 745 { 746 if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207) 747 return true; 748 if ((!vcpu->arch.vcore->arch_compat) && 749 cpu_has_feature(CPU_FTR_ARCH_207S)) 750 return true; 751 return false; 752 } 753 754 static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags, 755 unsigned long resource, unsigned long value1, 756 unsigned long value2) 757 { 758 switch (resource) { 759 case H_SET_MODE_RESOURCE_SET_CIABR: 760 if (!kvmppc_power8_compatible(vcpu)) 761 return H_P2; 762 if (value2) 763 return H_P4; 764 if (mflags) 765 return H_UNSUPPORTED_FLAG_START; 766 /* Guests can't breakpoint the hypervisor */ 767 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER) 768 return H_P3; 769 vcpu->arch.ciabr = value1; 770 return H_SUCCESS; 771 case H_SET_MODE_RESOURCE_SET_DAWR0: 772 if (!kvmppc_power8_compatible(vcpu)) 773 return H_P2; 774 if (!ppc_breakpoint_available()) 775 return H_P2; 776 if (mflags) 777 return H_UNSUPPORTED_FLAG_START; 778 if (value2 & DABRX_HYP) 779 return H_P4; 780 vcpu->arch.dawr0 = value1; 781 vcpu->arch.dawrx0 = value2; 782 return H_SUCCESS; 783 case H_SET_MODE_RESOURCE_SET_DAWR1: 784 if (!kvmppc_power8_compatible(vcpu)) 785 return H_P2; 786 if (!ppc_breakpoint_available()) 787 return H_P2; 788 if (!cpu_has_feature(CPU_FTR_DAWR1)) 789 return H_P2; 790 if (!vcpu->kvm->arch.dawr1_enabled) 791 return H_FUNCTION; 792 if (mflags) 793 return H_UNSUPPORTED_FLAG_START; 794 if (value2 & DABRX_HYP) 795 return H_P4; 796 vcpu->arch.dawr1 = value1; 797 vcpu->arch.dawrx1 = value2; 798 return H_SUCCESS; 799 case H_SET_MODE_RESOURCE_ADDR_TRANS_MODE: 800 /* 801 * KVM does not support mflags=2 (AIL=2) and AIL=1 is reserved. 802 * Keep this in synch with kvmppc_filter_guest_lpcr_hv. 803 */ 804 if (cpu_has_feature(CPU_FTR_P9_RADIX_PREFETCH_BUG) && 805 kvmhv_vcpu_is_radix(vcpu) && mflags == 3) 806 return H_UNSUPPORTED_FLAG_START; 807 return H_TOO_HARD; 808 default: 809 return H_TOO_HARD; 810 } 811 } 812 813 /* Copy guest memory in place - must reside within a single memslot */ 814 static int kvmppc_copy_guest(struct kvm *kvm, gpa_t to, gpa_t from, 815 unsigned long len) 816 { 817 struct kvm_memory_slot *to_memslot = NULL; 818 struct kvm_memory_slot *from_memslot = NULL; 819 unsigned long to_addr, from_addr; 820 int r; 821 822 /* Get HPA for from address */ 823 from_memslot = gfn_to_memslot(kvm, from >> PAGE_SHIFT); 824 if (!from_memslot) 825 return -EFAULT; 826 if ((from + len) >= ((from_memslot->base_gfn + from_memslot->npages) 827 << PAGE_SHIFT)) 828 return -EINVAL; 829 from_addr = gfn_to_hva_memslot(from_memslot, from >> PAGE_SHIFT); 830 if (kvm_is_error_hva(from_addr)) 831 return -EFAULT; 832 from_addr |= (from & (PAGE_SIZE - 1)); 833 834 /* Get HPA for to address */ 835 to_memslot = gfn_to_memslot(kvm, to >> PAGE_SHIFT); 836 if (!to_memslot) 837 return -EFAULT; 838 if ((to + len) >= ((to_memslot->base_gfn + to_memslot->npages) 839 << PAGE_SHIFT)) 840 return -EINVAL; 841 to_addr = gfn_to_hva_memslot(to_memslot, to >> PAGE_SHIFT); 842 if (kvm_is_error_hva(to_addr)) 843 return -EFAULT; 844 to_addr |= (to & (PAGE_SIZE - 1)); 845 846 /* Perform copy */ 847 r = raw_copy_in_user((void __user *)to_addr, (void __user *)from_addr, 848 len); 849 if (r) 850 return -EFAULT; 851 mark_page_dirty(kvm, to >> PAGE_SHIFT); 852 return 0; 853 } 854 855 static long kvmppc_h_page_init(struct kvm_vcpu *vcpu, unsigned long flags, 856 unsigned long dest, unsigned long src) 857 { 858 u64 pg_sz = SZ_4K; /* 4K page size */ 859 u64 pg_mask = SZ_4K - 1; 860 int ret; 861 862 /* Check for invalid flags (H_PAGE_SET_LOANED covers all CMO flags) */ 863 if (flags & ~(H_ICACHE_INVALIDATE | H_ICACHE_SYNCHRONIZE | 864 H_ZERO_PAGE | H_COPY_PAGE | H_PAGE_SET_LOANED)) 865 return H_PARAMETER; 866 867 /* dest (and src if copy_page flag set) must be page aligned */ 868 if ((dest & pg_mask) || ((flags & H_COPY_PAGE) && (src & pg_mask))) 869 return H_PARAMETER; 870 871 /* zero and/or copy the page as determined by the flags */ 872 if (flags & H_COPY_PAGE) { 873 ret = kvmppc_copy_guest(vcpu->kvm, dest, src, pg_sz); 874 if (ret < 0) 875 return H_PARAMETER; 876 } else if (flags & H_ZERO_PAGE) { 877 ret = kvm_clear_guest(vcpu->kvm, dest, pg_sz); 878 if (ret < 0) 879 return H_PARAMETER; 880 } 881 882 /* We can ignore the remaining flags */ 883 884 return H_SUCCESS; 885 } 886 887 static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target) 888 { 889 struct kvmppc_vcore *vcore = target->arch.vcore; 890 891 /* 892 * We expect to have been called by the real mode handler 893 * (kvmppc_rm_h_confer()) which would have directly returned 894 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may 895 * have useful work to do and should not confer) so we don't 896 * recheck that here. 897 * 898 * In the case of the P9 single vcpu per vcore case, the real 899 * mode handler is not called but no other threads are in the 900 * source vcore. 901 */ 902 903 spin_lock(&vcore->lock); 904 if (target->arch.state == KVMPPC_VCPU_RUNNABLE && 905 vcore->vcore_state != VCORE_INACTIVE && 906 vcore->runner) 907 target = vcore->runner; 908 spin_unlock(&vcore->lock); 909 910 return kvm_vcpu_yield_to(target); 911 } 912 913 static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu) 914 { 915 int yield_count = 0; 916 struct lppaca *lppaca; 917 918 spin_lock(&vcpu->arch.vpa_update_lock); 919 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr; 920 if (lppaca) 921 yield_count = be32_to_cpu(lppaca->yield_count); 922 spin_unlock(&vcpu->arch.vpa_update_lock); 923 return yield_count; 924 } 925 926 /* 927 * H_RPT_INVALIDATE hcall handler for nested guests. 928 * 929 * Handles only nested process-scoped invalidation requests in L0. 930 */ 931 static int kvmppc_nested_h_rpt_invalidate(struct kvm_vcpu *vcpu) 932 { 933 unsigned long type = kvmppc_get_gpr(vcpu, 6); 934 unsigned long pid, pg_sizes, start, end; 935 936 /* 937 * The partition-scoped invalidations aren't handled here in L0. 938 */ 939 if (type & H_RPTI_TYPE_NESTED) 940 return RESUME_HOST; 941 942 pid = kvmppc_get_gpr(vcpu, 4); 943 pg_sizes = kvmppc_get_gpr(vcpu, 7); 944 start = kvmppc_get_gpr(vcpu, 8); 945 end = kvmppc_get_gpr(vcpu, 9); 946 947 do_h_rpt_invalidate_prt(pid, vcpu->arch.nested->shadow_lpid, 948 type, pg_sizes, start, end); 949 950 kvmppc_set_gpr(vcpu, 3, H_SUCCESS); 951 return RESUME_GUEST; 952 } 953 954 static long kvmppc_h_rpt_invalidate(struct kvm_vcpu *vcpu, 955 unsigned long id, unsigned long target, 956 unsigned long type, unsigned long pg_sizes, 957 unsigned long start, unsigned long end) 958 { 959 if (!kvm_is_radix(vcpu->kvm)) 960 return H_UNSUPPORTED; 961 962 if (end < start) 963 return H_P5; 964 965 /* 966 * Partition-scoped invalidation for nested guests. 967 */ 968 if (type & H_RPTI_TYPE_NESTED) { 969 if (!nesting_enabled(vcpu->kvm)) 970 return H_FUNCTION; 971 972 /* Support only cores as target */ 973 if (target != H_RPTI_TARGET_CMMU) 974 return H_P2; 975 976 return do_h_rpt_invalidate_pat(vcpu, id, type, pg_sizes, 977 start, end); 978 } 979 980 /* 981 * Process-scoped invalidation for L1 guests. 982 */ 983 do_h_rpt_invalidate_prt(id, vcpu->kvm->arch.lpid, 984 type, pg_sizes, start, end); 985 return H_SUCCESS; 986 } 987 988 int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu) 989 { 990 struct kvm *kvm = vcpu->kvm; 991 unsigned long req = kvmppc_get_gpr(vcpu, 3); 992 unsigned long target, ret = H_SUCCESS; 993 int yield_count; 994 struct kvm_vcpu *tvcpu; 995 int idx, rc; 996 997 if (req <= MAX_HCALL_OPCODE && 998 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls)) 999 return RESUME_HOST; 1000 1001 switch (req) { 1002 case H_REMOVE: 1003 ret = kvmppc_h_remove(vcpu, kvmppc_get_gpr(vcpu, 4), 1004 kvmppc_get_gpr(vcpu, 5), 1005 kvmppc_get_gpr(vcpu, 6)); 1006 if (ret == H_TOO_HARD) 1007 return RESUME_HOST; 1008 break; 1009 case H_ENTER: 1010 ret = kvmppc_h_enter(vcpu, kvmppc_get_gpr(vcpu, 4), 1011 kvmppc_get_gpr(vcpu, 5), 1012 kvmppc_get_gpr(vcpu, 6), 1013 kvmppc_get_gpr(vcpu, 7)); 1014 if (ret == H_TOO_HARD) 1015 return RESUME_HOST; 1016 break; 1017 case H_READ: 1018 ret = kvmppc_h_read(vcpu, kvmppc_get_gpr(vcpu, 4), 1019 kvmppc_get_gpr(vcpu, 5)); 1020 if (ret == H_TOO_HARD) 1021 return RESUME_HOST; 1022 break; 1023 case H_CLEAR_MOD: 1024 ret = kvmppc_h_clear_mod(vcpu, kvmppc_get_gpr(vcpu, 4), 1025 kvmppc_get_gpr(vcpu, 5)); 1026 if (ret == H_TOO_HARD) 1027 return RESUME_HOST; 1028 break; 1029 case H_CLEAR_REF: 1030 ret = kvmppc_h_clear_ref(vcpu, kvmppc_get_gpr(vcpu, 4), 1031 kvmppc_get_gpr(vcpu, 5)); 1032 if (ret == H_TOO_HARD) 1033 return RESUME_HOST; 1034 break; 1035 case H_PROTECT: 1036 ret = kvmppc_h_protect(vcpu, kvmppc_get_gpr(vcpu, 4), 1037 kvmppc_get_gpr(vcpu, 5), 1038 kvmppc_get_gpr(vcpu, 6)); 1039 if (ret == H_TOO_HARD) 1040 return RESUME_HOST; 1041 break; 1042 case H_BULK_REMOVE: 1043 ret = kvmppc_h_bulk_remove(vcpu); 1044 if (ret == H_TOO_HARD) 1045 return RESUME_HOST; 1046 break; 1047 1048 case H_CEDE: 1049 break; 1050 case H_PROD: 1051 target = kvmppc_get_gpr(vcpu, 4); 1052 tvcpu = kvmppc_find_vcpu(kvm, target); 1053 if (!tvcpu) { 1054 ret = H_PARAMETER; 1055 break; 1056 } 1057 tvcpu->arch.prodded = 1; 1058 smp_mb(); 1059 if (tvcpu->arch.ceded) 1060 kvmppc_fast_vcpu_kick_hv(tvcpu); 1061 break; 1062 case H_CONFER: 1063 target = kvmppc_get_gpr(vcpu, 4); 1064 if (target == -1) 1065 break; 1066 tvcpu = kvmppc_find_vcpu(kvm, target); 1067 if (!tvcpu) { 1068 ret = H_PARAMETER; 1069 break; 1070 } 1071 yield_count = kvmppc_get_gpr(vcpu, 5); 1072 if (kvmppc_get_yield_count(tvcpu) != yield_count) 1073 break; 1074 kvm_arch_vcpu_yield_to(tvcpu); 1075 break; 1076 case H_REGISTER_VPA: 1077 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4), 1078 kvmppc_get_gpr(vcpu, 5), 1079 kvmppc_get_gpr(vcpu, 6)); 1080 break; 1081 case H_RTAS: 1082 if (list_empty(&kvm->arch.rtas_tokens)) 1083 return RESUME_HOST; 1084 1085 idx = srcu_read_lock(&kvm->srcu); 1086 rc = kvmppc_rtas_hcall(vcpu); 1087 srcu_read_unlock(&kvm->srcu, idx); 1088 1089 if (rc == -ENOENT) 1090 return RESUME_HOST; 1091 else if (rc == 0) 1092 break; 1093 1094 /* Send the error out to userspace via KVM_RUN */ 1095 return rc; 1096 case H_LOGICAL_CI_LOAD: 1097 ret = kvmppc_h_logical_ci_load(vcpu); 1098 if (ret == H_TOO_HARD) 1099 return RESUME_HOST; 1100 break; 1101 case H_LOGICAL_CI_STORE: 1102 ret = kvmppc_h_logical_ci_store(vcpu); 1103 if (ret == H_TOO_HARD) 1104 return RESUME_HOST; 1105 break; 1106 case H_SET_MODE: 1107 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4), 1108 kvmppc_get_gpr(vcpu, 5), 1109 kvmppc_get_gpr(vcpu, 6), 1110 kvmppc_get_gpr(vcpu, 7)); 1111 if (ret == H_TOO_HARD) 1112 return RESUME_HOST; 1113 break; 1114 case H_XIRR: 1115 case H_CPPR: 1116 case H_EOI: 1117 case H_IPI: 1118 case H_IPOLL: 1119 case H_XIRR_X: 1120 if (kvmppc_xics_enabled(vcpu)) { 1121 if (xics_on_xive()) { 1122 ret = H_NOT_AVAILABLE; 1123 return RESUME_GUEST; 1124 } 1125 ret = kvmppc_xics_hcall(vcpu, req); 1126 break; 1127 } 1128 return RESUME_HOST; 1129 case H_SET_DABR: 1130 ret = kvmppc_h_set_dabr(vcpu, kvmppc_get_gpr(vcpu, 4)); 1131 break; 1132 case H_SET_XDABR: 1133 ret = kvmppc_h_set_xdabr(vcpu, kvmppc_get_gpr(vcpu, 4), 1134 kvmppc_get_gpr(vcpu, 5)); 1135 break; 1136 #ifdef CONFIG_SPAPR_TCE_IOMMU 1137 case H_GET_TCE: 1138 ret = kvmppc_h_get_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1139 kvmppc_get_gpr(vcpu, 5)); 1140 if (ret == H_TOO_HARD) 1141 return RESUME_HOST; 1142 break; 1143 case H_PUT_TCE: 1144 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1145 kvmppc_get_gpr(vcpu, 5), 1146 kvmppc_get_gpr(vcpu, 6)); 1147 if (ret == H_TOO_HARD) 1148 return RESUME_HOST; 1149 break; 1150 case H_PUT_TCE_INDIRECT: 1151 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4), 1152 kvmppc_get_gpr(vcpu, 5), 1153 kvmppc_get_gpr(vcpu, 6), 1154 kvmppc_get_gpr(vcpu, 7)); 1155 if (ret == H_TOO_HARD) 1156 return RESUME_HOST; 1157 break; 1158 case H_STUFF_TCE: 1159 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1160 kvmppc_get_gpr(vcpu, 5), 1161 kvmppc_get_gpr(vcpu, 6), 1162 kvmppc_get_gpr(vcpu, 7)); 1163 if (ret == H_TOO_HARD) 1164 return RESUME_HOST; 1165 break; 1166 #endif 1167 case H_RANDOM: 1168 if (!powernv_get_random_long(&vcpu->arch.regs.gpr[4])) 1169 ret = H_HARDWARE; 1170 break; 1171 case H_RPT_INVALIDATE: 1172 ret = kvmppc_h_rpt_invalidate(vcpu, kvmppc_get_gpr(vcpu, 4), 1173 kvmppc_get_gpr(vcpu, 5), 1174 kvmppc_get_gpr(vcpu, 6), 1175 kvmppc_get_gpr(vcpu, 7), 1176 kvmppc_get_gpr(vcpu, 8), 1177 kvmppc_get_gpr(vcpu, 9)); 1178 break; 1179 1180 case H_SET_PARTITION_TABLE: 1181 ret = H_FUNCTION; 1182 if (nesting_enabled(kvm)) 1183 ret = kvmhv_set_partition_table(vcpu); 1184 break; 1185 case H_ENTER_NESTED: 1186 ret = H_FUNCTION; 1187 if (!nesting_enabled(kvm)) 1188 break; 1189 ret = kvmhv_enter_nested_guest(vcpu); 1190 if (ret == H_INTERRUPT) { 1191 kvmppc_set_gpr(vcpu, 3, 0); 1192 vcpu->arch.hcall_needed = 0; 1193 return -EINTR; 1194 } else if (ret == H_TOO_HARD) { 1195 kvmppc_set_gpr(vcpu, 3, 0); 1196 vcpu->arch.hcall_needed = 0; 1197 return RESUME_HOST; 1198 } 1199 break; 1200 case H_TLB_INVALIDATE: 1201 ret = H_FUNCTION; 1202 if (nesting_enabled(kvm)) 1203 ret = kvmhv_do_nested_tlbie(vcpu); 1204 break; 1205 case H_COPY_TOFROM_GUEST: 1206 ret = H_FUNCTION; 1207 if (nesting_enabled(kvm)) 1208 ret = kvmhv_copy_tofrom_guest_nested(vcpu); 1209 break; 1210 case H_PAGE_INIT: 1211 ret = kvmppc_h_page_init(vcpu, kvmppc_get_gpr(vcpu, 4), 1212 kvmppc_get_gpr(vcpu, 5), 1213 kvmppc_get_gpr(vcpu, 6)); 1214 break; 1215 case H_SVM_PAGE_IN: 1216 ret = H_UNSUPPORTED; 1217 if (kvmppc_get_srr1(vcpu) & MSR_S) 1218 ret = kvmppc_h_svm_page_in(kvm, 1219 kvmppc_get_gpr(vcpu, 4), 1220 kvmppc_get_gpr(vcpu, 5), 1221 kvmppc_get_gpr(vcpu, 6)); 1222 break; 1223 case H_SVM_PAGE_OUT: 1224 ret = H_UNSUPPORTED; 1225 if (kvmppc_get_srr1(vcpu) & MSR_S) 1226 ret = kvmppc_h_svm_page_out(kvm, 1227 kvmppc_get_gpr(vcpu, 4), 1228 kvmppc_get_gpr(vcpu, 5), 1229 kvmppc_get_gpr(vcpu, 6)); 1230 break; 1231 case H_SVM_INIT_START: 1232 ret = H_UNSUPPORTED; 1233 if (kvmppc_get_srr1(vcpu) & MSR_S) 1234 ret = kvmppc_h_svm_init_start(kvm); 1235 break; 1236 case H_SVM_INIT_DONE: 1237 ret = H_UNSUPPORTED; 1238 if (kvmppc_get_srr1(vcpu) & MSR_S) 1239 ret = kvmppc_h_svm_init_done(kvm); 1240 break; 1241 case H_SVM_INIT_ABORT: 1242 /* 1243 * Even if that call is made by the Ultravisor, the SSR1 value 1244 * is the guest context one, with the secure bit clear as it has 1245 * not yet been secured. So we can't check it here. 1246 * Instead the kvm->arch.secure_guest flag is checked inside 1247 * kvmppc_h_svm_init_abort(). 1248 */ 1249 ret = kvmppc_h_svm_init_abort(kvm); 1250 break; 1251 1252 default: 1253 return RESUME_HOST; 1254 } 1255 WARN_ON_ONCE(ret == H_TOO_HARD); 1256 kvmppc_set_gpr(vcpu, 3, ret); 1257 vcpu->arch.hcall_needed = 0; 1258 return RESUME_GUEST; 1259 } 1260 1261 /* 1262 * Handle H_CEDE in the P9 path where we don't call the real-mode hcall 1263 * handlers in book3s_hv_rmhandlers.S. 1264 * 1265 * This has to be done early, not in kvmppc_pseries_do_hcall(), so 1266 * that the cede logic in kvmppc_run_single_vcpu() works properly. 1267 */ 1268 static void kvmppc_cede(struct kvm_vcpu *vcpu) 1269 { 1270 vcpu->arch.shregs.msr |= MSR_EE; 1271 vcpu->arch.ceded = 1; 1272 smp_mb(); 1273 if (vcpu->arch.prodded) { 1274 vcpu->arch.prodded = 0; 1275 smp_mb(); 1276 vcpu->arch.ceded = 0; 1277 } 1278 } 1279 1280 static int kvmppc_hcall_impl_hv(unsigned long cmd) 1281 { 1282 switch (cmd) { 1283 case H_CEDE: 1284 case H_PROD: 1285 case H_CONFER: 1286 case H_REGISTER_VPA: 1287 case H_SET_MODE: 1288 case H_LOGICAL_CI_LOAD: 1289 case H_LOGICAL_CI_STORE: 1290 #ifdef CONFIG_KVM_XICS 1291 case H_XIRR: 1292 case H_CPPR: 1293 case H_EOI: 1294 case H_IPI: 1295 case H_IPOLL: 1296 case H_XIRR_X: 1297 #endif 1298 case H_PAGE_INIT: 1299 case H_RPT_INVALIDATE: 1300 return 1; 1301 } 1302 1303 /* See if it's in the real-mode table */ 1304 return kvmppc_hcall_impl_hv_realmode(cmd); 1305 } 1306 1307 static int kvmppc_emulate_debug_inst(struct kvm_vcpu *vcpu) 1308 { 1309 u32 last_inst; 1310 1311 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) != 1312 EMULATE_DONE) { 1313 /* 1314 * Fetch failed, so return to guest and 1315 * try executing it again. 1316 */ 1317 return RESUME_GUEST; 1318 } 1319 1320 if (last_inst == KVMPPC_INST_SW_BREAKPOINT) { 1321 vcpu->run->exit_reason = KVM_EXIT_DEBUG; 1322 vcpu->run->debug.arch.address = kvmppc_get_pc(vcpu); 1323 return RESUME_HOST; 1324 } else { 1325 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1326 return RESUME_GUEST; 1327 } 1328 } 1329 1330 static void do_nothing(void *x) 1331 { 1332 } 1333 1334 static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu) 1335 { 1336 int thr, cpu, pcpu, nthreads; 1337 struct kvm_vcpu *v; 1338 unsigned long dpdes; 1339 1340 nthreads = vcpu->kvm->arch.emul_smt_mode; 1341 dpdes = 0; 1342 cpu = vcpu->vcpu_id & ~(nthreads - 1); 1343 for (thr = 0; thr < nthreads; ++thr, ++cpu) { 1344 v = kvmppc_find_vcpu(vcpu->kvm, cpu); 1345 if (!v) 1346 continue; 1347 /* 1348 * If the vcpu is currently running on a physical cpu thread, 1349 * interrupt it in order to pull it out of the guest briefly, 1350 * which will update its vcore->dpdes value. 1351 */ 1352 pcpu = READ_ONCE(v->cpu); 1353 if (pcpu >= 0) 1354 smp_call_function_single(pcpu, do_nothing, NULL, 1); 1355 if (kvmppc_doorbell_pending(v)) 1356 dpdes |= 1 << thr; 1357 } 1358 return dpdes; 1359 } 1360 1361 /* 1362 * On POWER9, emulate doorbell-related instructions in order to 1363 * give the guest the illusion of running on a multi-threaded core. 1364 * The instructions emulated are msgsndp, msgclrp, mfspr TIR, 1365 * and mfspr DPDES. 1366 */ 1367 static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu) 1368 { 1369 u32 inst, rb, thr; 1370 unsigned long arg; 1371 struct kvm *kvm = vcpu->kvm; 1372 struct kvm_vcpu *tvcpu; 1373 1374 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE) 1375 return RESUME_GUEST; 1376 if (get_op(inst) != 31) 1377 return EMULATE_FAIL; 1378 rb = get_rb(inst); 1379 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1); 1380 switch (get_xop(inst)) { 1381 case OP_31_XOP_MSGSNDP: 1382 arg = kvmppc_get_gpr(vcpu, rb); 1383 if (((arg >> 27) & 0x1f) != PPC_DBELL_SERVER) 1384 break; 1385 arg &= 0x7f; 1386 if (arg >= kvm->arch.emul_smt_mode) 1387 break; 1388 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg); 1389 if (!tvcpu) 1390 break; 1391 if (!tvcpu->arch.doorbell_request) { 1392 tvcpu->arch.doorbell_request = 1; 1393 kvmppc_fast_vcpu_kick_hv(tvcpu); 1394 } 1395 break; 1396 case OP_31_XOP_MSGCLRP: 1397 arg = kvmppc_get_gpr(vcpu, rb); 1398 if (((arg >> 27) & 0x1f) != PPC_DBELL_SERVER) 1399 break; 1400 vcpu->arch.vcore->dpdes = 0; 1401 vcpu->arch.doorbell_request = 0; 1402 break; 1403 case OP_31_XOP_MFSPR: 1404 switch (get_sprn(inst)) { 1405 case SPRN_TIR: 1406 arg = thr; 1407 break; 1408 case SPRN_DPDES: 1409 arg = kvmppc_read_dpdes(vcpu); 1410 break; 1411 default: 1412 return EMULATE_FAIL; 1413 } 1414 kvmppc_set_gpr(vcpu, get_rt(inst), arg); 1415 break; 1416 default: 1417 return EMULATE_FAIL; 1418 } 1419 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4); 1420 return RESUME_GUEST; 1421 } 1422 1423 static int kvmppc_handle_exit_hv(struct kvm_vcpu *vcpu, 1424 struct task_struct *tsk) 1425 { 1426 struct kvm_run *run = vcpu->run; 1427 int r = RESUME_HOST; 1428 1429 vcpu->stat.sum_exits++; 1430 1431 /* 1432 * This can happen if an interrupt occurs in the last stages 1433 * of guest entry or the first stages of guest exit (i.e. after 1434 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1435 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1436 * That can happen due to a bug, or due to a machine check 1437 * occurring at just the wrong time. 1438 */ 1439 if (vcpu->arch.shregs.msr & MSR_HV) { 1440 printk(KERN_EMERG "KVM trap in HV mode!\n"); 1441 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1442 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1443 vcpu->arch.shregs.msr); 1444 kvmppc_dump_regs(vcpu); 1445 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1446 run->hw.hardware_exit_reason = vcpu->arch.trap; 1447 return RESUME_HOST; 1448 } 1449 run->exit_reason = KVM_EXIT_UNKNOWN; 1450 run->ready_for_interrupt_injection = 1; 1451 switch (vcpu->arch.trap) { 1452 /* We're good on these - the host merely wanted to get our attention */ 1453 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1454 vcpu->stat.dec_exits++; 1455 r = RESUME_GUEST; 1456 break; 1457 case BOOK3S_INTERRUPT_EXTERNAL: 1458 case BOOK3S_INTERRUPT_H_DOORBELL: 1459 case BOOK3S_INTERRUPT_H_VIRT: 1460 vcpu->stat.ext_intr_exits++; 1461 r = RESUME_GUEST; 1462 break; 1463 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1464 case BOOK3S_INTERRUPT_HMI: 1465 case BOOK3S_INTERRUPT_PERFMON: 1466 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1467 r = RESUME_GUEST; 1468 break; 1469 case BOOK3S_INTERRUPT_MACHINE_CHECK: { 1470 static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, 1471 DEFAULT_RATELIMIT_BURST); 1472 /* 1473 * Print the MCE event to host console. Ratelimit so the guest 1474 * can't flood the host log. 1475 */ 1476 if (__ratelimit(&rs)) 1477 machine_check_print_event_info(&vcpu->arch.mce_evt,false, true); 1478 1479 /* 1480 * If the guest can do FWNMI, exit to userspace so it can 1481 * deliver a FWNMI to the guest. 1482 * Otherwise we synthesize a machine check for the guest 1483 * so that it knows that the machine check occurred. 1484 */ 1485 if (!vcpu->kvm->arch.fwnmi_enabled) { 1486 ulong flags = vcpu->arch.shregs.msr & 0x083c0000; 1487 kvmppc_core_queue_machine_check(vcpu, flags); 1488 r = RESUME_GUEST; 1489 break; 1490 } 1491 1492 /* Exit to guest with KVM_EXIT_NMI as exit reason */ 1493 run->exit_reason = KVM_EXIT_NMI; 1494 run->hw.hardware_exit_reason = vcpu->arch.trap; 1495 /* Clear out the old NMI status from run->flags */ 1496 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK; 1497 /* Now set the NMI status */ 1498 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED) 1499 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV; 1500 else 1501 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV; 1502 1503 r = RESUME_HOST; 1504 break; 1505 } 1506 case BOOK3S_INTERRUPT_PROGRAM: 1507 { 1508 ulong flags; 1509 /* 1510 * Normally program interrupts are delivered directly 1511 * to the guest by the hardware, but we can get here 1512 * as a result of a hypervisor emulation interrupt 1513 * (e40) getting turned into a 700 by BML RTAS. 1514 */ 1515 flags = vcpu->arch.shregs.msr & 0x1f0000ull; 1516 kvmppc_core_queue_program(vcpu, flags); 1517 r = RESUME_GUEST; 1518 break; 1519 } 1520 case BOOK3S_INTERRUPT_SYSCALL: 1521 { 1522 int i; 1523 1524 if (unlikely(vcpu->arch.shregs.msr & MSR_PR)) { 1525 /* 1526 * Guest userspace executed sc 1. This can only be 1527 * reached by the P9 path because the old path 1528 * handles this case in realmode hcall handlers. 1529 */ 1530 if (!kvmhv_vcpu_is_radix(vcpu)) { 1531 /* 1532 * A guest could be running PR KVM, so this 1533 * may be a PR KVM hcall. It must be reflected 1534 * to the guest kernel as a sc interrupt. 1535 */ 1536 kvmppc_core_queue_syscall(vcpu); 1537 } else { 1538 /* 1539 * Radix guests can not run PR KVM or nested HV 1540 * hash guests which might run PR KVM, so this 1541 * is always a privilege fault. Send a program 1542 * check to guest kernel. 1543 */ 1544 kvmppc_core_queue_program(vcpu, SRR1_PROGPRIV); 1545 } 1546 r = RESUME_GUEST; 1547 break; 1548 } 1549 1550 /* 1551 * hcall - gather args and set exit_reason. This will next be 1552 * handled by kvmppc_pseries_do_hcall which may be able to deal 1553 * with it and resume guest, or may punt to userspace. 1554 */ 1555 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3); 1556 for (i = 0; i < 9; ++i) 1557 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i); 1558 run->exit_reason = KVM_EXIT_PAPR_HCALL; 1559 vcpu->arch.hcall_needed = 1; 1560 r = RESUME_HOST; 1561 break; 1562 } 1563 /* 1564 * We get these next two if the guest accesses a page which it thinks 1565 * it has mapped but which is not actually present, either because 1566 * it is for an emulated I/O device or because the corresonding 1567 * host page has been paged out. 1568 * 1569 * Any other HDSI/HISI interrupts have been handled already for P7/8 1570 * guests. For POWER9 hash guests not using rmhandlers, basic hash 1571 * fault handling is done here. 1572 */ 1573 case BOOK3S_INTERRUPT_H_DATA_STORAGE: { 1574 unsigned long vsid; 1575 long err; 1576 1577 if (vcpu->arch.fault_dsisr == HDSISR_CANARY) { 1578 r = RESUME_GUEST; /* Just retry if it's the canary */ 1579 break; 1580 } 1581 1582 if (kvm_is_radix(vcpu->kvm) || !cpu_has_feature(CPU_FTR_ARCH_300)) { 1583 /* 1584 * Radix doesn't require anything, and pre-ISAv3.0 hash 1585 * already attempted to handle this in rmhandlers. The 1586 * hash fault handling below is v3 only (it uses ASDR 1587 * via fault_gpa). 1588 */ 1589 r = RESUME_PAGE_FAULT; 1590 break; 1591 } 1592 1593 if (!(vcpu->arch.fault_dsisr & (DSISR_NOHPTE | DSISR_PROTFAULT))) { 1594 kvmppc_core_queue_data_storage(vcpu, 1595 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 1596 r = RESUME_GUEST; 1597 break; 1598 } 1599 1600 if (!(vcpu->arch.shregs.msr & MSR_DR)) 1601 vsid = vcpu->kvm->arch.vrma_slb_v; 1602 else 1603 vsid = vcpu->arch.fault_gpa; 1604 1605 err = kvmppc_hpte_hv_fault(vcpu, vcpu->arch.fault_dar, 1606 vsid, vcpu->arch.fault_dsisr, true); 1607 if (err == 0) { 1608 r = RESUME_GUEST; 1609 } else if (err == -1 || err == -2) { 1610 r = RESUME_PAGE_FAULT; 1611 } else { 1612 kvmppc_core_queue_data_storage(vcpu, 1613 vcpu->arch.fault_dar, err); 1614 r = RESUME_GUEST; 1615 } 1616 break; 1617 } 1618 case BOOK3S_INTERRUPT_H_INST_STORAGE: { 1619 unsigned long vsid; 1620 long err; 1621 1622 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1623 vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr & 1624 DSISR_SRR1_MATCH_64S; 1625 if (kvm_is_radix(vcpu->kvm) || !cpu_has_feature(CPU_FTR_ARCH_300)) { 1626 /* 1627 * Radix doesn't require anything, and pre-ISAv3.0 hash 1628 * already attempted to handle this in rmhandlers. The 1629 * hash fault handling below is v3 only (it uses ASDR 1630 * via fault_gpa). 1631 */ 1632 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1633 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1634 r = RESUME_PAGE_FAULT; 1635 break; 1636 } 1637 1638 if (!(vcpu->arch.fault_dsisr & SRR1_ISI_NOPT)) { 1639 kvmppc_core_queue_inst_storage(vcpu, 1640 vcpu->arch.fault_dsisr); 1641 r = RESUME_GUEST; 1642 break; 1643 } 1644 1645 if (!(vcpu->arch.shregs.msr & MSR_IR)) 1646 vsid = vcpu->kvm->arch.vrma_slb_v; 1647 else 1648 vsid = vcpu->arch.fault_gpa; 1649 1650 err = kvmppc_hpte_hv_fault(vcpu, vcpu->arch.fault_dar, 1651 vsid, vcpu->arch.fault_dsisr, false); 1652 if (err == 0) { 1653 r = RESUME_GUEST; 1654 } else if (err == -1) { 1655 r = RESUME_PAGE_FAULT; 1656 } else { 1657 kvmppc_core_queue_inst_storage(vcpu, err); 1658 r = RESUME_GUEST; 1659 } 1660 break; 1661 } 1662 1663 /* 1664 * This occurs if the guest executes an illegal instruction. 1665 * If the guest debug is disabled, generate a program interrupt 1666 * to the guest. If guest debug is enabled, we need to check 1667 * whether the instruction is a software breakpoint instruction. 1668 * Accordingly return to Guest or Host. 1669 */ 1670 case BOOK3S_INTERRUPT_H_EMUL_ASSIST: 1671 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED) 1672 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ? 1673 swab32(vcpu->arch.emul_inst) : 1674 vcpu->arch.emul_inst; 1675 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) { 1676 r = kvmppc_emulate_debug_inst(vcpu); 1677 } else { 1678 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1679 r = RESUME_GUEST; 1680 } 1681 break; 1682 /* 1683 * This occurs if the guest (kernel or userspace), does something that 1684 * is prohibited by HFSCR. 1685 * On POWER9, this could be a doorbell instruction that we need 1686 * to emulate. 1687 * Otherwise, we just generate a program interrupt to the guest. 1688 */ 1689 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: 1690 r = EMULATE_FAIL; 1691 if (((vcpu->arch.hfscr >> 56) == FSCR_MSGP_LG) && 1692 cpu_has_feature(CPU_FTR_ARCH_300)) 1693 r = kvmppc_emulate_doorbell_instr(vcpu); 1694 if (r == EMULATE_FAIL) { 1695 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1696 r = RESUME_GUEST; 1697 } 1698 break; 1699 1700 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1701 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1702 /* 1703 * This occurs for various TM-related instructions that 1704 * we need to emulate on POWER9 DD2.2. We have already 1705 * handled the cases where the guest was in real-suspend 1706 * mode and was transitioning to transactional state. 1707 */ 1708 r = kvmhv_p9_tm_emulation(vcpu); 1709 break; 1710 #endif 1711 1712 case BOOK3S_INTERRUPT_HV_RM_HARD: 1713 r = RESUME_PASSTHROUGH; 1714 break; 1715 default: 1716 kvmppc_dump_regs(vcpu); 1717 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1718 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1719 vcpu->arch.shregs.msr); 1720 run->hw.hardware_exit_reason = vcpu->arch.trap; 1721 r = RESUME_HOST; 1722 break; 1723 } 1724 1725 return r; 1726 } 1727 1728 static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu) 1729 { 1730 int r; 1731 int srcu_idx; 1732 1733 vcpu->stat.sum_exits++; 1734 1735 /* 1736 * This can happen if an interrupt occurs in the last stages 1737 * of guest entry or the first stages of guest exit (i.e. after 1738 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1739 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1740 * That can happen due to a bug, or due to a machine check 1741 * occurring at just the wrong time. 1742 */ 1743 if (vcpu->arch.shregs.msr & MSR_HV) { 1744 pr_emerg("KVM trap in HV mode while nested!\n"); 1745 pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1746 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1747 vcpu->arch.shregs.msr); 1748 kvmppc_dump_regs(vcpu); 1749 return RESUME_HOST; 1750 } 1751 switch (vcpu->arch.trap) { 1752 /* We're good on these - the host merely wanted to get our attention */ 1753 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1754 vcpu->stat.dec_exits++; 1755 r = RESUME_GUEST; 1756 break; 1757 case BOOK3S_INTERRUPT_EXTERNAL: 1758 vcpu->stat.ext_intr_exits++; 1759 r = RESUME_HOST; 1760 break; 1761 case BOOK3S_INTERRUPT_H_DOORBELL: 1762 case BOOK3S_INTERRUPT_H_VIRT: 1763 vcpu->stat.ext_intr_exits++; 1764 r = RESUME_GUEST; 1765 break; 1766 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1767 case BOOK3S_INTERRUPT_HMI: 1768 case BOOK3S_INTERRUPT_PERFMON: 1769 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1770 r = RESUME_GUEST; 1771 break; 1772 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1773 { 1774 static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, 1775 DEFAULT_RATELIMIT_BURST); 1776 /* Pass the machine check to the L1 guest */ 1777 r = RESUME_HOST; 1778 /* Print the MCE event to host console. */ 1779 if (__ratelimit(&rs)) 1780 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true); 1781 break; 1782 } 1783 /* 1784 * We get these next two if the guest accesses a page which it thinks 1785 * it has mapped but which is not actually present, either because 1786 * it is for an emulated I/O device or because the corresonding 1787 * host page has been paged out. 1788 */ 1789 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1790 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1791 r = kvmhv_nested_page_fault(vcpu); 1792 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1793 break; 1794 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1795 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1796 vcpu->arch.fault_dsisr = kvmppc_get_msr(vcpu) & 1797 DSISR_SRR1_MATCH_64S; 1798 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1799 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1800 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1801 r = kvmhv_nested_page_fault(vcpu); 1802 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1803 break; 1804 1805 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1806 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1807 /* 1808 * This occurs for various TM-related instructions that 1809 * we need to emulate on POWER9 DD2.2. We have already 1810 * handled the cases where the guest was in real-suspend 1811 * mode and was transitioning to transactional state. 1812 */ 1813 r = kvmhv_p9_tm_emulation(vcpu); 1814 break; 1815 #endif 1816 1817 case BOOK3S_INTERRUPT_HV_RM_HARD: 1818 vcpu->arch.trap = 0; 1819 r = RESUME_GUEST; 1820 if (!xics_on_xive()) 1821 kvmppc_xics_rm_complete(vcpu, 0); 1822 break; 1823 case BOOK3S_INTERRUPT_SYSCALL: 1824 { 1825 unsigned long req = kvmppc_get_gpr(vcpu, 3); 1826 1827 /* 1828 * The H_RPT_INVALIDATE hcalls issued by nested 1829 * guests for process-scoped invalidations when 1830 * GTSE=0, are handled here in L0. 1831 */ 1832 if (req == H_RPT_INVALIDATE) { 1833 r = kvmppc_nested_h_rpt_invalidate(vcpu); 1834 break; 1835 } 1836 1837 r = RESUME_HOST; 1838 break; 1839 } 1840 default: 1841 r = RESUME_HOST; 1842 break; 1843 } 1844 1845 return r; 1846 } 1847 1848 static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu, 1849 struct kvm_sregs *sregs) 1850 { 1851 int i; 1852 1853 memset(sregs, 0, sizeof(struct kvm_sregs)); 1854 sregs->pvr = vcpu->arch.pvr; 1855 for (i = 0; i < vcpu->arch.slb_max; i++) { 1856 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige; 1857 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; 1858 } 1859 1860 return 0; 1861 } 1862 1863 static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu, 1864 struct kvm_sregs *sregs) 1865 { 1866 int i, j; 1867 1868 /* Only accept the same PVR as the host's, since we can't spoof it */ 1869 if (sregs->pvr != vcpu->arch.pvr) 1870 return -EINVAL; 1871 1872 j = 0; 1873 for (i = 0; i < vcpu->arch.slb_nr; i++) { 1874 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) { 1875 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe; 1876 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv; 1877 ++j; 1878 } 1879 } 1880 vcpu->arch.slb_max = j; 1881 1882 return 0; 1883 } 1884 1885 /* 1886 * Enforce limits on guest LPCR values based on hardware availability, 1887 * guest configuration, and possibly hypervisor support and security 1888 * concerns. 1889 */ 1890 unsigned long kvmppc_filter_lpcr_hv(struct kvm *kvm, unsigned long lpcr) 1891 { 1892 /* LPCR_TC only applies to HPT guests */ 1893 if (kvm_is_radix(kvm)) 1894 lpcr &= ~LPCR_TC; 1895 1896 /* On POWER8 and above, userspace can modify AIL */ 1897 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 1898 lpcr &= ~LPCR_AIL; 1899 if ((lpcr & LPCR_AIL) != LPCR_AIL_3) 1900 lpcr &= ~LPCR_AIL; /* LPCR[AIL]=1/2 is disallowed */ 1901 /* 1902 * On some POWER9s we force AIL off for radix guests to prevent 1903 * executing in MSR[HV]=1 mode with the MMU enabled and PIDR set to 1904 * guest, which can result in Q0 translations with LPID=0 PID=PIDR to 1905 * be cached, which the host TLB management does not expect. 1906 */ 1907 if (kvm_is_radix(kvm) && cpu_has_feature(CPU_FTR_P9_RADIX_PREFETCH_BUG)) 1908 lpcr &= ~LPCR_AIL; 1909 1910 /* 1911 * On POWER9, allow userspace to enable large decrementer for the 1912 * guest, whether or not the host has it enabled. 1913 */ 1914 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 1915 lpcr &= ~LPCR_LD; 1916 1917 return lpcr; 1918 } 1919 1920 static void verify_lpcr(struct kvm *kvm, unsigned long lpcr) 1921 { 1922 if (lpcr != kvmppc_filter_lpcr_hv(kvm, lpcr)) { 1923 WARN_ONCE(1, "lpcr 0x%lx differs from filtered 0x%lx\n", 1924 lpcr, kvmppc_filter_lpcr_hv(kvm, lpcr)); 1925 } 1926 } 1927 1928 static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr, 1929 bool preserve_top32) 1930 { 1931 struct kvm *kvm = vcpu->kvm; 1932 struct kvmppc_vcore *vc = vcpu->arch.vcore; 1933 u64 mask; 1934 1935 spin_lock(&vc->lock); 1936 1937 /* 1938 * Userspace can only modify 1939 * DPFD (default prefetch depth), ILE (interrupt little-endian), 1940 * TC (translation control), AIL (alternate interrupt location), 1941 * LD (large decrementer). 1942 * These are subject to restrictions from kvmppc_filter_lcpr_hv(). 1943 */ 1944 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC | LPCR_AIL | LPCR_LD; 1945 1946 /* Broken 32-bit version of LPCR must not clear top bits */ 1947 if (preserve_top32) 1948 mask &= 0xFFFFFFFF; 1949 1950 new_lpcr = kvmppc_filter_lpcr_hv(kvm, 1951 (vc->lpcr & ~mask) | (new_lpcr & mask)); 1952 1953 /* 1954 * If ILE (interrupt little-endian) has changed, update the 1955 * MSR_LE bit in the intr_msr for each vcpu in this vcore. 1956 */ 1957 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) { 1958 struct kvm_vcpu *vcpu; 1959 int i; 1960 1961 kvm_for_each_vcpu(i, vcpu, kvm) { 1962 if (vcpu->arch.vcore != vc) 1963 continue; 1964 if (new_lpcr & LPCR_ILE) 1965 vcpu->arch.intr_msr |= MSR_LE; 1966 else 1967 vcpu->arch.intr_msr &= ~MSR_LE; 1968 } 1969 } 1970 1971 vc->lpcr = new_lpcr; 1972 1973 spin_unlock(&vc->lock); 1974 } 1975 1976 static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 1977 union kvmppc_one_reg *val) 1978 { 1979 int r = 0; 1980 long int i; 1981 1982 switch (id) { 1983 case KVM_REG_PPC_DEBUG_INST: 1984 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 1985 break; 1986 case KVM_REG_PPC_HIOR: 1987 *val = get_reg_val(id, 0); 1988 break; 1989 case KVM_REG_PPC_DABR: 1990 *val = get_reg_val(id, vcpu->arch.dabr); 1991 break; 1992 case KVM_REG_PPC_DABRX: 1993 *val = get_reg_val(id, vcpu->arch.dabrx); 1994 break; 1995 case KVM_REG_PPC_DSCR: 1996 *val = get_reg_val(id, vcpu->arch.dscr); 1997 break; 1998 case KVM_REG_PPC_PURR: 1999 *val = get_reg_val(id, vcpu->arch.purr); 2000 break; 2001 case KVM_REG_PPC_SPURR: 2002 *val = get_reg_val(id, vcpu->arch.spurr); 2003 break; 2004 case KVM_REG_PPC_AMR: 2005 *val = get_reg_val(id, vcpu->arch.amr); 2006 break; 2007 case KVM_REG_PPC_UAMOR: 2008 *val = get_reg_val(id, vcpu->arch.uamor); 2009 break; 2010 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCR1: 2011 i = id - KVM_REG_PPC_MMCR0; 2012 *val = get_reg_val(id, vcpu->arch.mmcr[i]); 2013 break; 2014 case KVM_REG_PPC_MMCR2: 2015 *val = get_reg_val(id, vcpu->arch.mmcr[2]); 2016 break; 2017 case KVM_REG_PPC_MMCRA: 2018 *val = get_reg_val(id, vcpu->arch.mmcra); 2019 break; 2020 case KVM_REG_PPC_MMCRS: 2021 *val = get_reg_val(id, vcpu->arch.mmcrs); 2022 break; 2023 case KVM_REG_PPC_MMCR3: 2024 *val = get_reg_val(id, vcpu->arch.mmcr[3]); 2025 break; 2026 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 2027 i = id - KVM_REG_PPC_PMC1; 2028 *val = get_reg_val(id, vcpu->arch.pmc[i]); 2029 break; 2030 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 2031 i = id - KVM_REG_PPC_SPMC1; 2032 *val = get_reg_val(id, vcpu->arch.spmc[i]); 2033 break; 2034 case KVM_REG_PPC_SIAR: 2035 *val = get_reg_val(id, vcpu->arch.siar); 2036 break; 2037 case KVM_REG_PPC_SDAR: 2038 *val = get_reg_val(id, vcpu->arch.sdar); 2039 break; 2040 case KVM_REG_PPC_SIER: 2041 *val = get_reg_val(id, vcpu->arch.sier[0]); 2042 break; 2043 case KVM_REG_PPC_SIER2: 2044 *val = get_reg_val(id, vcpu->arch.sier[1]); 2045 break; 2046 case KVM_REG_PPC_SIER3: 2047 *val = get_reg_val(id, vcpu->arch.sier[2]); 2048 break; 2049 case KVM_REG_PPC_IAMR: 2050 *val = get_reg_val(id, vcpu->arch.iamr); 2051 break; 2052 case KVM_REG_PPC_PSPB: 2053 *val = get_reg_val(id, vcpu->arch.pspb); 2054 break; 2055 case KVM_REG_PPC_DPDES: 2056 /* 2057 * On POWER9, where we are emulating msgsndp etc., 2058 * we return 1 bit for each vcpu, which can come from 2059 * either vcore->dpdes or doorbell_request. 2060 * On POWER8, doorbell_request is 0. 2061 */ 2062 *val = get_reg_val(id, vcpu->arch.vcore->dpdes | 2063 vcpu->arch.doorbell_request); 2064 break; 2065 case KVM_REG_PPC_VTB: 2066 *val = get_reg_val(id, vcpu->arch.vcore->vtb); 2067 break; 2068 case KVM_REG_PPC_DAWR: 2069 *val = get_reg_val(id, vcpu->arch.dawr0); 2070 break; 2071 case KVM_REG_PPC_DAWRX: 2072 *val = get_reg_val(id, vcpu->arch.dawrx0); 2073 break; 2074 case KVM_REG_PPC_DAWR1: 2075 *val = get_reg_val(id, vcpu->arch.dawr1); 2076 break; 2077 case KVM_REG_PPC_DAWRX1: 2078 *val = get_reg_val(id, vcpu->arch.dawrx1); 2079 break; 2080 case KVM_REG_PPC_CIABR: 2081 *val = get_reg_val(id, vcpu->arch.ciabr); 2082 break; 2083 case KVM_REG_PPC_CSIGR: 2084 *val = get_reg_val(id, vcpu->arch.csigr); 2085 break; 2086 case KVM_REG_PPC_TACR: 2087 *val = get_reg_val(id, vcpu->arch.tacr); 2088 break; 2089 case KVM_REG_PPC_TCSCR: 2090 *val = get_reg_val(id, vcpu->arch.tcscr); 2091 break; 2092 case KVM_REG_PPC_PID: 2093 *val = get_reg_val(id, vcpu->arch.pid); 2094 break; 2095 case KVM_REG_PPC_ACOP: 2096 *val = get_reg_val(id, vcpu->arch.acop); 2097 break; 2098 case KVM_REG_PPC_WORT: 2099 *val = get_reg_val(id, vcpu->arch.wort); 2100 break; 2101 case KVM_REG_PPC_TIDR: 2102 *val = get_reg_val(id, vcpu->arch.tid); 2103 break; 2104 case KVM_REG_PPC_PSSCR: 2105 *val = get_reg_val(id, vcpu->arch.psscr); 2106 break; 2107 case KVM_REG_PPC_VPA_ADDR: 2108 spin_lock(&vcpu->arch.vpa_update_lock); 2109 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa); 2110 spin_unlock(&vcpu->arch.vpa_update_lock); 2111 break; 2112 case KVM_REG_PPC_VPA_SLB: 2113 spin_lock(&vcpu->arch.vpa_update_lock); 2114 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa; 2115 val->vpaval.length = vcpu->arch.slb_shadow.len; 2116 spin_unlock(&vcpu->arch.vpa_update_lock); 2117 break; 2118 case KVM_REG_PPC_VPA_DTL: 2119 spin_lock(&vcpu->arch.vpa_update_lock); 2120 val->vpaval.addr = vcpu->arch.dtl.next_gpa; 2121 val->vpaval.length = vcpu->arch.dtl.len; 2122 spin_unlock(&vcpu->arch.vpa_update_lock); 2123 break; 2124 case KVM_REG_PPC_TB_OFFSET: 2125 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset); 2126 break; 2127 case KVM_REG_PPC_LPCR: 2128 case KVM_REG_PPC_LPCR_64: 2129 *val = get_reg_val(id, vcpu->arch.vcore->lpcr); 2130 break; 2131 case KVM_REG_PPC_PPR: 2132 *val = get_reg_val(id, vcpu->arch.ppr); 2133 break; 2134 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2135 case KVM_REG_PPC_TFHAR: 2136 *val = get_reg_val(id, vcpu->arch.tfhar); 2137 break; 2138 case KVM_REG_PPC_TFIAR: 2139 *val = get_reg_val(id, vcpu->arch.tfiar); 2140 break; 2141 case KVM_REG_PPC_TEXASR: 2142 *val = get_reg_val(id, vcpu->arch.texasr); 2143 break; 2144 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 2145 i = id - KVM_REG_PPC_TM_GPR0; 2146 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]); 2147 break; 2148 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 2149 { 2150 int j; 2151 i = id - KVM_REG_PPC_TM_VSR0; 2152 if (i < 32) 2153 for (j = 0; j < TS_FPRWIDTH; j++) 2154 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j]; 2155 else { 2156 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2157 val->vval = vcpu->arch.vr_tm.vr[i-32]; 2158 else 2159 r = -ENXIO; 2160 } 2161 break; 2162 } 2163 case KVM_REG_PPC_TM_CR: 2164 *val = get_reg_val(id, vcpu->arch.cr_tm); 2165 break; 2166 case KVM_REG_PPC_TM_XER: 2167 *val = get_reg_val(id, vcpu->arch.xer_tm); 2168 break; 2169 case KVM_REG_PPC_TM_LR: 2170 *val = get_reg_val(id, vcpu->arch.lr_tm); 2171 break; 2172 case KVM_REG_PPC_TM_CTR: 2173 *val = get_reg_val(id, vcpu->arch.ctr_tm); 2174 break; 2175 case KVM_REG_PPC_TM_FPSCR: 2176 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr); 2177 break; 2178 case KVM_REG_PPC_TM_AMR: 2179 *val = get_reg_val(id, vcpu->arch.amr_tm); 2180 break; 2181 case KVM_REG_PPC_TM_PPR: 2182 *val = get_reg_val(id, vcpu->arch.ppr_tm); 2183 break; 2184 case KVM_REG_PPC_TM_VRSAVE: 2185 *val = get_reg_val(id, vcpu->arch.vrsave_tm); 2186 break; 2187 case KVM_REG_PPC_TM_VSCR: 2188 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2189 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]); 2190 else 2191 r = -ENXIO; 2192 break; 2193 case KVM_REG_PPC_TM_DSCR: 2194 *val = get_reg_val(id, vcpu->arch.dscr_tm); 2195 break; 2196 case KVM_REG_PPC_TM_TAR: 2197 *val = get_reg_val(id, vcpu->arch.tar_tm); 2198 break; 2199 #endif 2200 case KVM_REG_PPC_ARCH_COMPAT: 2201 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat); 2202 break; 2203 case KVM_REG_PPC_DEC_EXPIRY: 2204 *val = get_reg_val(id, vcpu->arch.dec_expires + 2205 vcpu->arch.vcore->tb_offset); 2206 break; 2207 case KVM_REG_PPC_ONLINE: 2208 *val = get_reg_val(id, vcpu->arch.online); 2209 break; 2210 case KVM_REG_PPC_PTCR: 2211 *val = get_reg_val(id, vcpu->kvm->arch.l1_ptcr); 2212 break; 2213 default: 2214 r = -EINVAL; 2215 break; 2216 } 2217 2218 return r; 2219 } 2220 2221 static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 2222 union kvmppc_one_reg *val) 2223 { 2224 int r = 0; 2225 long int i; 2226 unsigned long addr, len; 2227 2228 switch (id) { 2229 case KVM_REG_PPC_HIOR: 2230 /* Only allow this to be set to zero */ 2231 if (set_reg_val(id, *val)) 2232 r = -EINVAL; 2233 break; 2234 case KVM_REG_PPC_DABR: 2235 vcpu->arch.dabr = set_reg_val(id, *val); 2236 break; 2237 case KVM_REG_PPC_DABRX: 2238 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP; 2239 break; 2240 case KVM_REG_PPC_DSCR: 2241 vcpu->arch.dscr = set_reg_val(id, *val); 2242 break; 2243 case KVM_REG_PPC_PURR: 2244 vcpu->arch.purr = set_reg_val(id, *val); 2245 break; 2246 case KVM_REG_PPC_SPURR: 2247 vcpu->arch.spurr = set_reg_val(id, *val); 2248 break; 2249 case KVM_REG_PPC_AMR: 2250 vcpu->arch.amr = set_reg_val(id, *val); 2251 break; 2252 case KVM_REG_PPC_UAMOR: 2253 vcpu->arch.uamor = set_reg_val(id, *val); 2254 break; 2255 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCR1: 2256 i = id - KVM_REG_PPC_MMCR0; 2257 vcpu->arch.mmcr[i] = set_reg_val(id, *val); 2258 break; 2259 case KVM_REG_PPC_MMCR2: 2260 vcpu->arch.mmcr[2] = set_reg_val(id, *val); 2261 break; 2262 case KVM_REG_PPC_MMCRA: 2263 vcpu->arch.mmcra = set_reg_val(id, *val); 2264 break; 2265 case KVM_REG_PPC_MMCRS: 2266 vcpu->arch.mmcrs = set_reg_val(id, *val); 2267 break; 2268 case KVM_REG_PPC_MMCR3: 2269 *val = get_reg_val(id, vcpu->arch.mmcr[3]); 2270 break; 2271 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 2272 i = id - KVM_REG_PPC_PMC1; 2273 vcpu->arch.pmc[i] = set_reg_val(id, *val); 2274 break; 2275 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 2276 i = id - KVM_REG_PPC_SPMC1; 2277 vcpu->arch.spmc[i] = set_reg_val(id, *val); 2278 break; 2279 case KVM_REG_PPC_SIAR: 2280 vcpu->arch.siar = set_reg_val(id, *val); 2281 break; 2282 case KVM_REG_PPC_SDAR: 2283 vcpu->arch.sdar = set_reg_val(id, *val); 2284 break; 2285 case KVM_REG_PPC_SIER: 2286 vcpu->arch.sier[0] = set_reg_val(id, *val); 2287 break; 2288 case KVM_REG_PPC_SIER2: 2289 vcpu->arch.sier[1] = set_reg_val(id, *val); 2290 break; 2291 case KVM_REG_PPC_SIER3: 2292 vcpu->arch.sier[2] = set_reg_val(id, *val); 2293 break; 2294 case KVM_REG_PPC_IAMR: 2295 vcpu->arch.iamr = set_reg_val(id, *val); 2296 break; 2297 case KVM_REG_PPC_PSPB: 2298 vcpu->arch.pspb = set_reg_val(id, *val); 2299 break; 2300 case KVM_REG_PPC_DPDES: 2301 vcpu->arch.vcore->dpdes = set_reg_val(id, *val); 2302 break; 2303 case KVM_REG_PPC_VTB: 2304 vcpu->arch.vcore->vtb = set_reg_val(id, *val); 2305 break; 2306 case KVM_REG_PPC_DAWR: 2307 vcpu->arch.dawr0 = set_reg_val(id, *val); 2308 break; 2309 case KVM_REG_PPC_DAWRX: 2310 vcpu->arch.dawrx0 = set_reg_val(id, *val) & ~DAWRX_HYP; 2311 break; 2312 case KVM_REG_PPC_DAWR1: 2313 vcpu->arch.dawr1 = set_reg_val(id, *val); 2314 break; 2315 case KVM_REG_PPC_DAWRX1: 2316 vcpu->arch.dawrx1 = set_reg_val(id, *val) & ~DAWRX_HYP; 2317 break; 2318 case KVM_REG_PPC_CIABR: 2319 vcpu->arch.ciabr = set_reg_val(id, *val); 2320 /* Don't allow setting breakpoints in hypervisor code */ 2321 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER) 2322 vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */ 2323 break; 2324 case KVM_REG_PPC_CSIGR: 2325 vcpu->arch.csigr = set_reg_val(id, *val); 2326 break; 2327 case KVM_REG_PPC_TACR: 2328 vcpu->arch.tacr = set_reg_val(id, *val); 2329 break; 2330 case KVM_REG_PPC_TCSCR: 2331 vcpu->arch.tcscr = set_reg_val(id, *val); 2332 break; 2333 case KVM_REG_PPC_PID: 2334 vcpu->arch.pid = set_reg_val(id, *val); 2335 break; 2336 case KVM_REG_PPC_ACOP: 2337 vcpu->arch.acop = set_reg_val(id, *val); 2338 break; 2339 case KVM_REG_PPC_WORT: 2340 vcpu->arch.wort = set_reg_val(id, *val); 2341 break; 2342 case KVM_REG_PPC_TIDR: 2343 vcpu->arch.tid = set_reg_val(id, *val); 2344 break; 2345 case KVM_REG_PPC_PSSCR: 2346 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS; 2347 break; 2348 case KVM_REG_PPC_VPA_ADDR: 2349 addr = set_reg_val(id, *val); 2350 r = -EINVAL; 2351 if (!addr && (vcpu->arch.slb_shadow.next_gpa || 2352 vcpu->arch.dtl.next_gpa)) 2353 break; 2354 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca)); 2355 break; 2356 case KVM_REG_PPC_VPA_SLB: 2357 addr = val->vpaval.addr; 2358 len = val->vpaval.length; 2359 r = -EINVAL; 2360 if (addr && !vcpu->arch.vpa.next_gpa) 2361 break; 2362 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len); 2363 break; 2364 case KVM_REG_PPC_VPA_DTL: 2365 addr = val->vpaval.addr; 2366 len = val->vpaval.length; 2367 r = -EINVAL; 2368 if (addr && (len < sizeof(struct dtl_entry) || 2369 !vcpu->arch.vpa.next_gpa)) 2370 break; 2371 len -= len % sizeof(struct dtl_entry); 2372 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len); 2373 break; 2374 case KVM_REG_PPC_TB_OFFSET: 2375 /* round up to multiple of 2^24 */ 2376 vcpu->arch.vcore->tb_offset = 2377 ALIGN(set_reg_val(id, *val), 1UL << 24); 2378 break; 2379 case KVM_REG_PPC_LPCR: 2380 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true); 2381 break; 2382 case KVM_REG_PPC_LPCR_64: 2383 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false); 2384 break; 2385 case KVM_REG_PPC_PPR: 2386 vcpu->arch.ppr = set_reg_val(id, *val); 2387 break; 2388 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2389 case KVM_REG_PPC_TFHAR: 2390 vcpu->arch.tfhar = set_reg_val(id, *val); 2391 break; 2392 case KVM_REG_PPC_TFIAR: 2393 vcpu->arch.tfiar = set_reg_val(id, *val); 2394 break; 2395 case KVM_REG_PPC_TEXASR: 2396 vcpu->arch.texasr = set_reg_val(id, *val); 2397 break; 2398 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 2399 i = id - KVM_REG_PPC_TM_GPR0; 2400 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val); 2401 break; 2402 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 2403 { 2404 int j; 2405 i = id - KVM_REG_PPC_TM_VSR0; 2406 if (i < 32) 2407 for (j = 0; j < TS_FPRWIDTH; j++) 2408 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j]; 2409 else 2410 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2411 vcpu->arch.vr_tm.vr[i-32] = val->vval; 2412 else 2413 r = -ENXIO; 2414 break; 2415 } 2416 case KVM_REG_PPC_TM_CR: 2417 vcpu->arch.cr_tm = set_reg_val(id, *val); 2418 break; 2419 case KVM_REG_PPC_TM_XER: 2420 vcpu->arch.xer_tm = set_reg_val(id, *val); 2421 break; 2422 case KVM_REG_PPC_TM_LR: 2423 vcpu->arch.lr_tm = set_reg_val(id, *val); 2424 break; 2425 case KVM_REG_PPC_TM_CTR: 2426 vcpu->arch.ctr_tm = set_reg_val(id, *val); 2427 break; 2428 case KVM_REG_PPC_TM_FPSCR: 2429 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val); 2430 break; 2431 case KVM_REG_PPC_TM_AMR: 2432 vcpu->arch.amr_tm = set_reg_val(id, *val); 2433 break; 2434 case KVM_REG_PPC_TM_PPR: 2435 vcpu->arch.ppr_tm = set_reg_val(id, *val); 2436 break; 2437 case KVM_REG_PPC_TM_VRSAVE: 2438 vcpu->arch.vrsave_tm = set_reg_val(id, *val); 2439 break; 2440 case KVM_REG_PPC_TM_VSCR: 2441 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2442 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val); 2443 else 2444 r = - ENXIO; 2445 break; 2446 case KVM_REG_PPC_TM_DSCR: 2447 vcpu->arch.dscr_tm = set_reg_val(id, *val); 2448 break; 2449 case KVM_REG_PPC_TM_TAR: 2450 vcpu->arch.tar_tm = set_reg_val(id, *val); 2451 break; 2452 #endif 2453 case KVM_REG_PPC_ARCH_COMPAT: 2454 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val)); 2455 break; 2456 case KVM_REG_PPC_DEC_EXPIRY: 2457 vcpu->arch.dec_expires = set_reg_val(id, *val) - 2458 vcpu->arch.vcore->tb_offset; 2459 break; 2460 case KVM_REG_PPC_ONLINE: 2461 i = set_reg_val(id, *val); 2462 if (i && !vcpu->arch.online) 2463 atomic_inc(&vcpu->arch.vcore->online_count); 2464 else if (!i && vcpu->arch.online) 2465 atomic_dec(&vcpu->arch.vcore->online_count); 2466 vcpu->arch.online = i; 2467 break; 2468 case KVM_REG_PPC_PTCR: 2469 vcpu->kvm->arch.l1_ptcr = set_reg_val(id, *val); 2470 break; 2471 default: 2472 r = -EINVAL; 2473 break; 2474 } 2475 2476 return r; 2477 } 2478 2479 /* 2480 * On POWER9, threads are independent and can be in different partitions. 2481 * Therefore we consider each thread to be a subcore. 2482 * There is a restriction that all threads have to be in the same 2483 * MMU mode (radix or HPT), unfortunately, but since we only support 2484 * HPT guests on a HPT host so far, that isn't an impediment yet. 2485 */ 2486 static int threads_per_vcore(struct kvm *kvm) 2487 { 2488 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2489 return 1; 2490 return threads_per_subcore; 2491 } 2492 2493 static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int id) 2494 { 2495 struct kvmppc_vcore *vcore; 2496 2497 vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL); 2498 2499 if (vcore == NULL) 2500 return NULL; 2501 2502 spin_lock_init(&vcore->lock); 2503 spin_lock_init(&vcore->stoltb_lock); 2504 rcuwait_init(&vcore->wait); 2505 vcore->preempt_tb = TB_NIL; 2506 vcore->lpcr = kvm->arch.lpcr; 2507 vcore->first_vcpuid = id; 2508 vcore->kvm = kvm; 2509 INIT_LIST_HEAD(&vcore->preempt_list); 2510 2511 return vcore; 2512 } 2513 2514 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING 2515 static struct debugfs_timings_element { 2516 const char *name; 2517 size_t offset; 2518 } timings[] = { 2519 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)}, 2520 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)}, 2521 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)}, 2522 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)}, 2523 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)}, 2524 }; 2525 2526 #define N_TIMINGS (ARRAY_SIZE(timings)) 2527 2528 struct debugfs_timings_state { 2529 struct kvm_vcpu *vcpu; 2530 unsigned int buflen; 2531 char buf[N_TIMINGS * 100]; 2532 }; 2533 2534 static int debugfs_timings_open(struct inode *inode, struct file *file) 2535 { 2536 struct kvm_vcpu *vcpu = inode->i_private; 2537 struct debugfs_timings_state *p; 2538 2539 p = kzalloc(sizeof(*p), GFP_KERNEL); 2540 if (!p) 2541 return -ENOMEM; 2542 2543 kvm_get_kvm(vcpu->kvm); 2544 p->vcpu = vcpu; 2545 file->private_data = p; 2546 2547 return nonseekable_open(inode, file); 2548 } 2549 2550 static int debugfs_timings_release(struct inode *inode, struct file *file) 2551 { 2552 struct debugfs_timings_state *p = file->private_data; 2553 2554 kvm_put_kvm(p->vcpu->kvm); 2555 kfree(p); 2556 return 0; 2557 } 2558 2559 static ssize_t debugfs_timings_read(struct file *file, char __user *buf, 2560 size_t len, loff_t *ppos) 2561 { 2562 struct debugfs_timings_state *p = file->private_data; 2563 struct kvm_vcpu *vcpu = p->vcpu; 2564 char *s, *buf_end; 2565 struct kvmhv_tb_accumulator tb; 2566 u64 count; 2567 loff_t pos; 2568 ssize_t n; 2569 int i, loops; 2570 bool ok; 2571 2572 if (!p->buflen) { 2573 s = p->buf; 2574 buf_end = s + sizeof(p->buf); 2575 for (i = 0; i < N_TIMINGS; ++i) { 2576 struct kvmhv_tb_accumulator *acc; 2577 2578 acc = (struct kvmhv_tb_accumulator *) 2579 ((unsigned long)vcpu + timings[i].offset); 2580 ok = false; 2581 for (loops = 0; loops < 1000; ++loops) { 2582 count = acc->seqcount; 2583 if (!(count & 1)) { 2584 smp_rmb(); 2585 tb = *acc; 2586 smp_rmb(); 2587 if (count == acc->seqcount) { 2588 ok = true; 2589 break; 2590 } 2591 } 2592 udelay(1); 2593 } 2594 if (!ok) 2595 snprintf(s, buf_end - s, "%s: stuck\n", 2596 timings[i].name); 2597 else 2598 snprintf(s, buf_end - s, 2599 "%s: %llu %llu %llu %llu\n", 2600 timings[i].name, count / 2, 2601 tb_to_ns(tb.tb_total), 2602 tb_to_ns(tb.tb_min), 2603 tb_to_ns(tb.tb_max)); 2604 s += strlen(s); 2605 } 2606 p->buflen = s - p->buf; 2607 } 2608 2609 pos = *ppos; 2610 if (pos >= p->buflen) 2611 return 0; 2612 if (len > p->buflen - pos) 2613 len = p->buflen - pos; 2614 n = copy_to_user(buf, p->buf + pos, len); 2615 if (n) { 2616 if (n == len) 2617 return -EFAULT; 2618 len -= n; 2619 } 2620 *ppos = pos + len; 2621 return len; 2622 } 2623 2624 static ssize_t debugfs_timings_write(struct file *file, const char __user *buf, 2625 size_t len, loff_t *ppos) 2626 { 2627 return -EACCES; 2628 } 2629 2630 static const struct file_operations debugfs_timings_ops = { 2631 .owner = THIS_MODULE, 2632 .open = debugfs_timings_open, 2633 .release = debugfs_timings_release, 2634 .read = debugfs_timings_read, 2635 .write = debugfs_timings_write, 2636 .llseek = generic_file_llseek, 2637 }; 2638 2639 /* Create a debugfs directory for the vcpu */ 2640 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2641 { 2642 char buf[16]; 2643 struct kvm *kvm = vcpu->kvm; 2644 2645 snprintf(buf, sizeof(buf), "vcpu%u", id); 2646 vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir); 2647 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir, vcpu, 2648 &debugfs_timings_ops); 2649 } 2650 2651 #else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2652 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2653 { 2654 } 2655 #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2656 2657 static int kvmppc_core_vcpu_create_hv(struct kvm_vcpu *vcpu) 2658 { 2659 int err; 2660 int core; 2661 struct kvmppc_vcore *vcore; 2662 struct kvm *kvm; 2663 unsigned int id; 2664 2665 kvm = vcpu->kvm; 2666 id = vcpu->vcpu_id; 2667 2668 vcpu->arch.shared = &vcpu->arch.shregs; 2669 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 2670 /* 2671 * The shared struct is never shared on HV, 2672 * so we can always use host endianness 2673 */ 2674 #ifdef __BIG_ENDIAN__ 2675 vcpu->arch.shared_big_endian = true; 2676 #else 2677 vcpu->arch.shared_big_endian = false; 2678 #endif 2679 #endif 2680 vcpu->arch.mmcr[0] = MMCR0_FC; 2681 vcpu->arch.ctrl = CTRL_RUNLATCH; 2682 /* default to host PVR, since we can't spoof it */ 2683 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR)); 2684 spin_lock_init(&vcpu->arch.vpa_update_lock); 2685 spin_lock_init(&vcpu->arch.tbacct_lock); 2686 vcpu->arch.busy_preempt = TB_NIL; 2687 vcpu->arch.intr_msr = MSR_SF | MSR_ME; 2688 2689 /* 2690 * Set the default HFSCR for the guest from the host value. 2691 * This value is only used on POWER9. 2692 * On POWER9, we want to virtualize the doorbell facility, so we 2693 * don't set the HFSCR_MSGP bit, and that causes those instructions 2694 * to trap and then we emulate them. 2695 */ 2696 vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB | 2697 HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP | HFSCR_PREFIX; 2698 if (cpu_has_feature(CPU_FTR_HVMODE)) { 2699 vcpu->arch.hfscr &= mfspr(SPRN_HFSCR); 2700 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 2701 vcpu->arch.hfscr |= HFSCR_TM; 2702 } 2703 if (cpu_has_feature(CPU_FTR_TM_COMP)) 2704 vcpu->arch.hfscr |= HFSCR_TM; 2705 2706 kvmppc_mmu_book3s_hv_init(vcpu); 2707 2708 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 2709 2710 init_waitqueue_head(&vcpu->arch.cpu_run); 2711 2712 mutex_lock(&kvm->lock); 2713 vcore = NULL; 2714 err = -EINVAL; 2715 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 2716 if (id >= (KVM_MAX_VCPUS * kvm->arch.emul_smt_mode)) { 2717 pr_devel("KVM: VCPU ID too high\n"); 2718 core = KVM_MAX_VCORES; 2719 } else { 2720 BUG_ON(kvm->arch.smt_mode != 1); 2721 core = kvmppc_pack_vcpu_id(kvm, id); 2722 } 2723 } else { 2724 core = id / kvm->arch.smt_mode; 2725 } 2726 if (core < KVM_MAX_VCORES) { 2727 vcore = kvm->arch.vcores[core]; 2728 if (vcore && cpu_has_feature(CPU_FTR_ARCH_300)) { 2729 pr_devel("KVM: collision on id %u", id); 2730 vcore = NULL; 2731 } else if (!vcore) { 2732 /* 2733 * Take mmu_setup_lock for mutual exclusion 2734 * with kvmppc_update_lpcr(). 2735 */ 2736 err = -ENOMEM; 2737 vcore = kvmppc_vcore_create(kvm, 2738 id & ~(kvm->arch.smt_mode - 1)); 2739 mutex_lock(&kvm->arch.mmu_setup_lock); 2740 kvm->arch.vcores[core] = vcore; 2741 kvm->arch.online_vcores++; 2742 mutex_unlock(&kvm->arch.mmu_setup_lock); 2743 } 2744 } 2745 mutex_unlock(&kvm->lock); 2746 2747 if (!vcore) 2748 return err; 2749 2750 spin_lock(&vcore->lock); 2751 ++vcore->num_threads; 2752 spin_unlock(&vcore->lock); 2753 vcpu->arch.vcore = vcore; 2754 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid; 2755 vcpu->arch.thread_cpu = -1; 2756 vcpu->arch.prev_cpu = -1; 2757 2758 vcpu->arch.cpu_type = KVM_CPU_3S_64; 2759 kvmppc_sanity_check(vcpu); 2760 2761 debugfs_vcpu_init(vcpu, id); 2762 2763 return 0; 2764 } 2765 2766 static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode, 2767 unsigned long flags) 2768 { 2769 int err; 2770 int esmt = 0; 2771 2772 if (flags) 2773 return -EINVAL; 2774 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode)) 2775 return -EINVAL; 2776 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 2777 /* 2778 * On POWER8 (or POWER7), the threading mode is "strict", 2779 * so we pack smt_mode vcpus per vcore. 2780 */ 2781 if (smt_mode > threads_per_subcore) 2782 return -EINVAL; 2783 } else { 2784 /* 2785 * On POWER9, the threading mode is "loose", 2786 * so each vcpu gets its own vcore. 2787 */ 2788 esmt = smt_mode; 2789 smt_mode = 1; 2790 } 2791 mutex_lock(&kvm->lock); 2792 err = -EBUSY; 2793 if (!kvm->arch.online_vcores) { 2794 kvm->arch.smt_mode = smt_mode; 2795 kvm->arch.emul_smt_mode = esmt; 2796 err = 0; 2797 } 2798 mutex_unlock(&kvm->lock); 2799 2800 return err; 2801 } 2802 2803 static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa) 2804 { 2805 if (vpa->pinned_addr) 2806 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa, 2807 vpa->dirty); 2808 } 2809 2810 static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu) 2811 { 2812 spin_lock(&vcpu->arch.vpa_update_lock); 2813 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl); 2814 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow); 2815 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa); 2816 spin_unlock(&vcpu->arch.vpa_update_lock); 2817 } 2818 2819 static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu) 2820 { 2821 /* Indicate we want to get back into the guest */ 2822 return 1; 2823 } 2824 2825 static void kvmppc_set_timer(struct kvm_vcpu *vcpu) 2826 { 2827 unsigned long dec_nsec, now; 2828 2829 now = get_tb(); 2830 if (now > vcpu->arch.dec_expires) { 2831 /* decrementer has already gone negative */ 2832 kvmppc_core_queue_dec(vcpu); 2833 kvmppc_core_prepare_to_enter(vcpu); 2834 return; 2835 } 2836 dec_nsec = tb_to_ns(vcpu->arch.dec_expires - now); 2837 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL); 2838 vcpu->arch.timer_running = 1; 2839 } 2840 2841 extern int __kvmppc_vcore_entry(void); 2842 2843 static void kvmppc_remove_runnable(struct kvmppc_vcore *vc, 2844 struct kvm_vcpu *vcpu) 2845 { 2846 u64 now; 2847 2848 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 2849 return; 2850 spin_lock_irq(&vcpu->arch.tbacct_lock); 2851 now = mftb(); 2852 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) - 2853 vcpu->arch.stolen_logged; 2854 vcpu->arch.busy_preempt = now; 2855 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 2856 spin_unlock_irq(&vcpu->arch.tbacct_lock); 2857 --vc->n_runnable; 2858 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL); 2859 } 2860 2861 static int kvmppc_grab_hwthread(int cpu) 2862 { 2863 struct paca_struct *tpaca; 2864 long timeout = 10000; 2865 2866 tpaca = paca_ptrs[cpu]; 2867 2868 /* Ensure the thread won't go into the kernel if it wakes */ 2869 tpaca->kvm_hstate.kvm_vcpu = NULL; 2870 tpaca->kvm_hstate.kvm_vcore = NULL; 2871 tpaca->kvm_hstate.napping = 0; 2872 smp_wmb(); 2873 tpaca->kvm_hstate.hwthread_req = 1; 2874 2875 /* 2876 * If the thread is already executing in the kernel (e.g. handling 2877 * a stray interrupt), wait for it to get back to nap mode. 2878 * The smp_mb() is to ensure that our setting of hwthread_req 2879 * is visible before we look at hwthread_state, so if this 2880 * races with the code at system_reset_pSeries and the thread 2881 * misses our setting of hwthread_req, we are sure to see its 2882 * setting of hwthread_state, and vice versa. 2883 */ 2884 smp_mb(); 2885 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) { 2886 if (--timeout <= 0) { 2887 pr_err("KVM: couldn't grab cpu %d\n", cpu); 2888 return -EBUSY; 2889 } 2890 udelay(1); 2891 } 2892 return 0; 2893 } 2894 2895 static void kvmppc_release_hwthread(int cpu) 2896 { 2897 struct paca_struct *tpaca; 2898 2899 tpaca = paca_ptrs[cpu]; 2900 tpaca->kvm_hstate.hwthread_req = 0; 2901 tpaca->kvm_hstate.kvm_vcpu = NULL; 2902 tpaca->kvm_hstate.kvm_vcore = NULL; 2903 tpaca->kvm_hstate.kvm_split_mode = NULL; 2904 } 2905 2906 static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu) 2907 { 2908 struct kvm_nested_guest *nested = vcpu->arch.nested; 2909 cpumask_t *cpu_in_guest; 2910 int i; 2911 2912 cpu = cpu_first_tlb_thread_sibling(cpu); 2913 if (nested) { 2914 cpumask_set_cpu(cpu, &nested->need_tlb_flush); 2915 cpu_in_guest = &nested->cpu_in_guest; 2916 } else { 2917 cpumask_set_cpu(cpu, &kvm->arch.need_tlb_flush); 2918 cpu_in_guest = &kvm->arch.cpu_in_guest; 2919 } 2920 /* 2921 * Make sure setting of bit in need_tlb_flush precedes 2922 * testing of cpu_in_guest bits. The matching barrier on 2923 * the other side is the first smp_mb() in kvmppc_run_core(). 2924 */ 2925 smp_mb(); 2926 for (i = cpu; i <= cpu_last_tlb_thread_sibling(cpu); 2927 i += cpu_tlb_thread_sibling_step()) 2928 if (cpumask_test_cpu(i, cpu_in_guest)) 2929 smp_call_function_single(i, do_nothing, NULL, 1); 2930 } 2931 2932 static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu) 2933 { 2934 struct kvm_nested_guest *nested = vcpu->arch.nested; 2935 struct kvm *kvm = vcpu->kvm; 2936 int prev_cpu; 2937 2938 if (!cpu_has_feature(CPU_FTR_HVMODE)) 2939 return; 2940 2941 if (nested) 2942 prev_cpu = nested->prev_cpu[vcpu->arch.nested_vcpu_id]; 2943 else 2944 prev_cpu = vcpu->arch.prev_cpu; 2945 2946 /* 2947 * With radix, the guest can do TLB invalidations itself, 2948 * and it could choose to use the local form (tlbiel) if 2949 * it is invalidating a translation that has only ever been 2950 * used on one vcpu. However, that doesn't mean it has 2951 * only ever been used on one physical cpu, since vcpus 2952 * can move around between pcpus. To cope with this, when 2953 * a vcpu moves from one pcpu to another, we need to tell 2954 * any vcpus running on the same core as this vcpu previously 2955 * ran to flush the TLB. The TLB is shared between threads, 2956 * so we use a single bit in .need_tlb_flush for all 4 threads. 2957 */ 2958 if (prev_cpu != pcpu) { 2959 if (prev_cpu >= 0 && 2960 cpu_first_tlb_thread_sibling(prev_cpu) != 2961 cpu_first_tlb_thread_sibling(pcpu)) 2962 radix_flush_cpu(kvm, prev_cpu, vcpu); 2963 if (nested) 2964 nested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu; 2965 else 2966 vcpu->arch.prev_cpu = pcpu; 2967 } 2968 } 2969 2970 static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc) 2971 { 2972 int cpu; 2973 struct paca_struct *tpaca; 2974 struct kvm *kvm = vc->kvm; 2975 2976 cpu = vc->pcpu; 2977 if (vcpu) { 2978 if (vcpu->arch.timer_running) { 2979 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 2980 vcpu->arch.timer_running = 0; 2981 } 2982 cpu += vcpu->arch.ptid; 2983 vcpu->cpu = vc->pcpu; 2984 vcpu->arch.thread_cpu = cpu; 2985 cpumask_set_cpu(cpu, &kvm->arch.cpu_in_guest); 2986 } 2987 tpaca = paca_ptrs[cpu]; 2988 tpaca->kvm_hstate.kvm_vcpu = vcpu; 2989 tpaca->kvm_hstate.ptid = cpu - vc->pcpu; 2990 tpaca->kvm_hstate.fake_suspend = 0; 2991 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */ 2992 smp_wmb(); 2993 tpaca->kvm_hstate.kvm_vcore = vc; 2994 if (cpu != smp_processor_id()) 2995 kvmppc_ipi_thread(cpu); 2996 } 2997 2998 static void kvmppc_wait_for_nap(int n_threads) 2999 { 3000 int cpu = smp_processor_id(); 3001 int i, loops; 3002 3003 if (n_threads <= 1) 3004 return; 3005 for (loops = 0; loops < 1000000; ++loops) { 3006 /* 3007 * Check if all threads are finished. 3008 * We set the vcore pointer when starting a thread 3009 * and the thread clears it when finished, so we look 3010 * for any threads that still have a non-NULL vcore ptr. 3011 */ 3012 for (i = 1; i < n_threads; ++i) 3013 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 3014 break; 3015 if (i == n_threads) { 3016 HMT_medium(); 3017 return; 3018 } 3019 HMT_low(); 3020 } 3021 HMT_medium(); 3022 for (i = 1; i < n_threads; ++i) 3023 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 3024 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i); 3025 } 3026 3027 /* 3028 * Check that we are on thread 0 and that any other threads in 3029 * this core are off-line. Then grab the threads so they can't 3030 * enter the kernel. 3031 */ 3032 static int on_primary_thread(void) 3033 { 3034 int cpu = smp_processor_id(); 3035 int thr; 3036 3037 /* Are we on a primary subcore? */ 3038 if (cpu_thread_in_subcore(cpu)) 3039 return 0; 3040 3041 thr = 0; 3042 while (++thr < threads_per_subcore) 3043 if (cpu_online(cpu + thr)) 3044 return 0; 3045 3046 /* Grab all hw threads so they can't go into the kernel */ 3047 for (thr = 1; thr < threads_per_subcore; ++thr) { 3048 if (kvmppc_grab_hwthread(cpu + thr)) { 3049 /* Couldn't grab one; let the others go */ 3050 do { 3051 kvmppc_release_hwthread(cpu + thr); 3052 } while (--thr > 0); 3053 return 0; 3054 } 3055 } 3056 return 1; 3057 } 3058 3059 /* 3060 * A list of virtual cores for each physical CPU. 3061 * These are vcores that could run but their runner VCPU tasks are 3062 * (or may be) preempted. 3063 */ 3064 struct preempted_vcore_list { 3065 struct list_head list; 3066 spinlock_t lock; 3067 }; 3068 3069 static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores); 3070 3071 static void init_vcore_lists(void) 3072 { 3073 int cpu; 3074 3075 for_each_possible_cpu(cpu) { 3076 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu); 3077 spin_lock_init(&lp->lock); 3078 INIT_LIST_HEAD(&lp->list); 3079 } 3080 } 3081 3082 static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc) 3083 { 3084 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 3085 3086 vc->vcore_state = VCORE_PREEMPT; 3087 vc->pcpu = smp_processor_id(); 3088 if (vc->num_threads < threads_per_vcore(vc->kvm)) { 3089 spin_lock(&lp->lock); 3090 list_add_tail(&vc->preempt_list, &lp->list); 3091 spin_unlock(&lp->lock); 3092 } 3093 3094 /* Start accumulating stolen time */ 3095 kvmppc_core_start_stolen(vc); 3096 } 3097 3098 static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc) 3099 { 3100 struct preempted_vcore_list *lp; 3101 3102 kvmppc_core_end_stolen(vc); 3103 if (!list_empty(&vc->preempt_list)) { 3104 lp = &per_cpu(preempted_vcores, vc->pcpu); 3105 spin_lock(&lp->lock); 3106 list_del_init(&vc->preempt_list); 3107 spin_unlock(&lp->lock); 3108 } 3109 vc->vcore_state = VCORE_INACTIVE; 3110 } 3111 3112 /* 3113 * This stores information about the virtual cores currently 3114 * assigned to a physical core. 3115 */ 3116 struct core_info { 3117 int n_subcores; 3118 int max_subcore_threads; 3119 int total_threads; 3120 int subcore_threads[MAX_SUBCORES]; 3121 struct kvmppc_vcore *vc[MAX_SUBCORES]; 3122 }; 3123 3124 /* 3125 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7 3126 * respectively in 2-way micro-threading (split-core) mode on POWER8. 3127 */ 3128 static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 }; 3129 3130 static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc) 3131 { 3132 memset(cip, 0, sizeof(*cip)); 3133 cip->n_subcores = 1; 3134 cip->max_subcore_threads = vc->num_threads; 3135 cip->total_threads = vc->num_threads; 3136 cip->subcore_threads[0] = vc->num_threads; 3137 cip->vc[0] = vc; 3138 } 3139 3140 static bool subcore_config_ok(int n_subcores, int n_threads) 3141 { 3142 /* 3143 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way 3144 * split-core mode, with one thread per subcore. 3145 */ 3146 if (cpu_has_feature(CPU_FTR_ARCH_300)) 3147 return n_subcores <= 4 && n_threads == 1; 3148 3149 /* On POWER8, can only dynamically split if unsplit to begin with */ 3150 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS) 3151 return false; 3152 if (n_subcores > MAX_SUBCORES) 3153 return false; 3154 if (n_subcores > 1) { 3155 if (!(dynamic_mt_modes & 2)) 3156 n_subcores = 4; 3157 if (n_subcores > 2 && !(dynamic_mt_modes & 4)) 3158 return false; 3159 } 3160 3161 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS; 3162 } 3163 3164 static void init_vcore_to_run(struct kvmppc_vcore *vc) 3165 { 3166 vc->entry_exit_map = 0; 3167 vc->in_guest = 0; 3168 vc->napping_threads = 0; 3169 vc->conferring_threads = 0; 3170 vc->tb_offset_applied = 0; 3171 } 3172 3173 static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip) 3174 { 3175 int n_threads = vc->num_threads; 3176 int sub; 3177 3178 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 3179 return false; 3180 3181 /* In one_vm_per_core mode, require all vcores to be from the same vm */ 3182 if (one_vm_per_core && vc->kvm != cip->vc[0]->kvm) 3183 return false; 3184 3185 if (n_threads < cip->max_subcore_threads) 3186 n_threads = cip->max_subcore_threads; 3187 if (!subcore_config_ok(cip->n_subcores + 1, n_threads)) 3188 return false; 3189 cip->max_subcore_threads = n_threads; 3190 3191 sub = cip->n_subcores; 3192 ++cip->n_subcores; 3193 cip->total_threads += vc->num_threads; 3194 cip->subcore_threads[sub] = vc->num_threads; 3195 cip->vc[sub] = vc; 3196 init_vcore_to_run(vc); 3197 list_del_init(&vc->preempt_list); 3198 3199 return true; 3200 } 3201 3202 /* 3203 * Work out whether it is possible to piggyback the execution of 3204 * vcore *pvc onto the execution of the other vcores described in *cip. 3205 */ 3206 static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip, 3207 int target_threads) 3208 { 3209 if (cip->total_threads + pvc->num_threads > target_threads) 3210 return false; 3211 3212 return can_dynamic_split(pvc, cip); 3213 } 3214 3215 static void prepare_threads(struct kvmppc_vcore *vc) 3216 { 3217 int i; 3218 struct kvm_vcpu *vcpu; 3219 3220 for_each_runnable_thread(i, vcpu, vc) { 3221 if (signal_pending(vcpu->arch.run_task)) 3222 vcpu->arch.ret = -EINTR; 3223 else if (vcpu->arch.vpa.update_pending || 3224 vcpu->arch.slb_shadow.update_pending || 3225 vcpu->arch.dtl.update_pending) 3226 vcpu->arch.ret = RESUME_GUEST; 3227 else 3228 continue; 3229 kvmppc_remove_runnable(vc, vcpu); 3230 wake_up(&vcpu->arch.cpu_run); 3231 } 3232 } 3233 3234 static void collect_piggybacks(struct core_info *cip, int target_threads) 3235 { 3236 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 3237 struct kvmppc_vcore *pvc, *vcnext; 3238 3239 spin_lock(&lp->lock); 3240 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) { 3241 if (!spin_trylock(&pvc->lock)) 3242 continue; 3243 prepare_threads(pvc); 3244 if (!pvc->n_runnable || !pvc->kvm->arch.mmu_ready) { 3245 list_del_init(&pvc->preempt_list); 3246 if (pvc->runner == NULL) { 3247 pvc->vcore_state = VCORE_INACTIVE; 3248 kvmppc_core_end_stolen(pvc); 3249 } 3250 spin_unlock(&pvc->lock); 3251 continue; 3252 } 3253 if (!can_piggyback(pvc, cip, target_threads)) { 3254 spin_unlock(&pvc->lock); 3255 continue; 3256 } 3257 kvmppc_core_end_stolen(pvc); 3258 pvc->vcore_state = VCORE_PIGGYBACK; 3259 if (cip->total_threads >= target_threads) 3260 break; 3261 } 3262 spin_unlock(&lp->lock); 3263 } 3264 3265 static bool recheck_signals_and_mmu(struct core_info *cip) 3266 { 3267 int sub, i; 3268 struct kvm_vcpu *vcpu; 3269 struct kvmppc_vcore *vc; 3270 3271 for (sub = 0; sub < cip->n_subcores; ++sub) { 3272 vc = cip->vc[sub]; 3273 if (!vc->kvm->arch.mmu_ready) 3274 return true; 3275 for_each_runnable_thread(i, vcpu, vc) 3276 if (signal_pending(vcpu->arch.run_task)) 3277 return true; 3278 } 3279 return false; 3280 } 3281 3282 static void post_guest_process(struct kvmppc_vcore *vc, bool is_master) 3283 { 3284 int still_running = 0, i; 3285 u64 now; 3286 long ret; 3287 struct kvm_vcpu *vcpu; 3288 3289 spin_lock(&vc->lock); 3290 now = get_tb(); 3291 for_each_runnable_thread(i, vcpu, vc) { 3292 /* 3293 * It's safe to unlock the vcore in the loop here, because 3294 * for_each_runnable_thread() is safe against removal of 3295 * the vcpu, and the vcore state is VCORE_EXITING here, 3296 * so any vcpus becoming runnable will have their arch.trap 3297 * set to zero and can't actually run in the guest. 3298 */ 3299 spin_unlock(&vc->lock); 3300 /* cancel pending dec exception if dec is positive */ 3301 if (now < vcpu->arch.dec_expires && 3302 kvmppc_core_pending_dec(vcpu)) 3303 kvmppc_core_dequeue_dec(vcpu); 3304 3305 trace_kvm_guest_exit(vcpu); 3306 3307 ret = RESUME_GUEST; 3308 if (vcpu->arch.trap) 3309 ret = kvmppc_handle_exit_hv(vcpu, 3310 vcpu->arch.run_task); 3311 3312 vcpu->arch.ret = ret; 3313 vcpu->arch.trap = 0; 3314 3315 spin_lock(&vc->lock); 3316 if (is_kvmppc_resume_guest(vcpu->arch.ret)) { 3317 if (vcpu->arch.pending_exceptions) 3318 kvmppc_core_prepare_to_enter(vcpu); 3319 if (vcpu->arch.ceded) 3320 kvmppc_set_timer(vcpu); 3321 else 3322 ++still_running; 3323 } else { 3324 kvmppc_remove_runnable(vc, vcpu); 3325 wake_up(&vcpu->arch.cpu_run); 3326 } 3327 } 3328 if (!is_master) { 3329 if (still_running > 0) { 3330 kvmppc_vcore_preempt(vc); 3331 } else if (vc->runner) { 3332 vc->vcore_state = VCORE_PREEMPT; 3333 kvmppc_core_start_stolen(vc); 3334 } else { 3335 vc->vcore_state = VCORE_INACTIVE; 3336 } 3337 if (vc->n_runnable > 0 && vc->runner == NULL) { 3338 /* make sure there's a candidate runner awake */ 3339 i = -1; 3340 vcpu = next_runnable_thread(vc, &i); 3341 wake_up(&vcpu->arch.cpu_run); 3342 } 3343 } 3344 spin_unlock(&vc->lock); 3345 } 3346 3347 /* 3348 * Clear core from the list of active host cores as we are about to 3349 * enter the guest. Only do this if it is the primary thread of the 3350 * core (not if a subcore) that is entering the guest. 3351 */ 3352 static inline int kvmppc_clear_host_core(unsigned int cpu) 3353 { 3354 int core; 3355 3356 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 3357 return 0; 3358 /* 3359 * Memory barrier can be omitted here as we will do a smp_wmb() 3360 * later in kvmppc_start_thread and we need ensure that state is 3361 * visible to other CPUs only after we enter guest. 3362 */ 3363 core = cpu >> threads_shift; 3364 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0; 3365 return 0; 3366 } 3367 3368 /* 3369 * Advertise this core as an active host core since we exited the guest 3370 * Only need to do this if it is the primary thread of the core that is 3371 * exiting. 3372 */ 3373 static inline int kvmppc_set_host_core(unsigned int cpu) 3374 { 3375 int core; 3376 3377 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 3378 return 0; 3379 3380 /* 3381 * Memory barrier can be omitted here because we do a spin_unlock 3382 * immediately after this which provides the memory barrier. 3383 */ 3384 core = cpu >> threads_shift; 3385 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1; 3386 return 0; 3387 } 3388 3389 static void set_irq_happened(int trap) 3390 { 3391 switch (trap) { 3392 case BOOK3S_INTERRUPT_EXTERNAL: 3393 local_paca->irq_happened |= PACA_IRQ_EE; 3394 break; 3395 case BOOK3S_INTERRUPT_H_DOORBELL: 3396 local_paca->irq_happened |= PACA_IRQ_DBELL; 3397 break; 3398 case BOOK3S_INTERRUPT_HMI: 3399 local_paca->irq_happened |= PACA_IRQ_HMI; 3400 break; 3401 case BOOK3S_INTERRUPT_SYSTEM_RESET: 3402 replay_system_reset(); 3403 break; 3404 } 3405 } 3406 3407 /* 3408 * Run a set of guest threads on a physical core. 3409 * Called with vc->lock held. 3410 */ 3411 static noinline void kvmppc_run_core(struct kvmppc_vcore *vc) 3412 { 3413 struct kvm_vcpu *vcpu; 3414 int i; 3415 int srcu_idx; 3416 struct core_info core_info; 3417 struct kvmppc_vcore *pvc; 3418 struct kvm_split_mode split_info, *sip; 3419 int split, subcore_size, active; 3420 int sub; 3421 bool thr0_done; 3422 unsigned long cmd_bit, stat_bit; 3423 int pcpu, thr; 3424 int target_threads; 3425 int controlled_threads; 3426 int trap; 3427 bool is_power8; 3428 3429 if (WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300))) 3430 return; 3431 3432 /* 3433 * Remove from the list any threads that have a signal pending 3434 * or need a VPA update done 3435 */ 3436 prepare_threads(vc); 3437 3438 /* if the runner is no longer runnable, let the caller pick a new one */ 3439 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE) 3440 return; 3441 3442 /* 3443 * Initialize *vc. 3444 */ 3445 init_vcore_to_run(vc); 3446 vc->preempt_tb = TB_NIL; 3447 3448 /* 3449 * Number of threads that we will be controlling: the same as 3450 * the number of threads per subcore, except on POWER9, 3451 * where it's 1 because the threads are (mostly) independent. 3452 */ 3453 controlled_threads = threads_per_vcore(vc->kvm); 3454 3455 /* 3456 * Make sure we are running on primary threads, and that secondary 3457 * threads are offline. Also check if the number of threads in this 3458 * guest are greater than the current system threads per guest. 3459 */ 3460 if ((controlled_threads > 1) && 3461 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) { 3462 for_each_runnable_thread(i, vcpu, vc) { 3463 vcpu->arch.ret = -EBUSY; 3464 kvmppc_remove_runnable(vc, vcpu); 3465 wake_up(&vcpu->arch.cpu_run); 3466 } 3467 goto out; 3468 } 3469 3470 /* 3471 * See if we could run any other vcores on the physical core 3472 * along with this one. 3473 */ 3474 init_core_info(&core_info, vc); 3475 pcpu = smp_processor_id(); 3476 target_threads = controlled_threads; 3477 if (target_smt_mode && target_smt_mode < target_threads) 3478 target_threads = target_smt_mode; 3479 if (vc->num_threads < target_threads) 3480 collect_piggybacks(&core_info, target_threads); 3481 3482 /* 3483 * Hard-disable interrupts, and check resched flag and signals. 3484 * If we need to reschedule or deliver a signal, clean up 3485 * and return without going into the guest(s). 3486 * If the mmu_ready flag has been cleared, don't go into the 3487 * guest because that means a HPT resize operation is in progress. 3488 */ 3489 local_irq_disable(); 3490 hard_irq_disable(); 3491 if (lazy_irq_pending() || need_resched() || 3492 recheck_signals_and_mmu(&core_info)) { 3493 local_irq_enable(); 3494 vc->vcore_state = VCORE_INACTIVE; 3495 /* Unlock all except the primary vcore */ 3496 for (sub = 1; sub < core_info.n_subcores; ++sub) { 3497 pvc = core_info.vc[sub]; 3498 /* Put back on to the preempted vcores list */ 3499 kvmppc_vcore_preempt(pvc); 3500 spin_unlock(&pvc->lock); 3501 } 3502 for (i = 0; i < controlled_threads; ++i) 3503 kvmppc_release_hwthread(pcpu + i); 3504 return; 3505 } 3506 3507 kvmppc_clear_host_core(pcpu); 3508 3509 /* Decide on micro-threading (split-core) mode */ 3510 subcore_size = threads_per_subcore; 3511 cmd_bit = stat_bit = 0; 3512 split = core_info.n_subcores; 3513 sip = NULL; 3514 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S); 3515 3516 if (split > 1) { 3517 sip = &split_info; 3518 memset(&split_info, 0, sizeof(split_info)); 3519 for (sub = 0; sub < core_info.n_subcores; ++sub) 3520 split_info.vc[sub] = core_info.vc[sub]; 3521 3522 if (is_power8) { 3523 if (split == 2 && (dynamic_mt_modes & 2)) { 3524 cmd_bit = HID0_POWER8_1TO2LPAR; 3525 stat_bit = HID0_POWER8_2LPARMODE; 3526 } else { 3527 split = 4; 3528 cmd_bit = HID0_POWER8_1TO4LPAR; 3529 stat_bit = HID0_POWER8_4LPARMODE; 3530 } 3531 subcore_size = MAX_SMT_THREADS / split; 3532 split_info.rpr = mfspr(SPRN_RPR); 3533 split_info.pmmar = mfspr(SPRN_PMMAR); 3534 split_info.ldbar = mfspr(SPRN_LDBAR); 3535 split_info.subcore_size = subcore_size; 3536 } else { 3537 split_info.subcore_size = 1; 3538 } 3539 3540 /* order writes to split_info before kvm_split_mode pointer */ 3541 smp_wmb(); 3542 } 3543 3544 for (thr = 0; thr < controlled_threads; ++thr) { 3545 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3546 3547 paca->kvm_hstate.napping = 0; 3548 paca->kvm_hstate.kvm_split_mode = sip; 3549 } 3550 3551 /* Initiate micro-threading (split-core) on POWER8 if required */ 3552 if (cmd_bit) { 3553 unsigned long hid0 = mfspr(SPRN_HID0); 3554 3555 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS; 3556 mb(); 3557 mtspr(SPRN_HID0, hid0); 3558 isync(); 3559 for (;;) { 3560 hid0 = mfspr(SPRN_HID0); 3561 if (hid0 & stat_bit) 3562 break; 3563 cpu_relax(); 3564 } 3565 } 3566 3567 /* 3568 * On POWER8, set RWMR register. 3569 * Since it only affects PURR and SPURR, it doesn't affect 3570 * the host, so we don't save/restore the host value. 3571 */ 3572 if (is_power8) { 3573 unsigned long rwmr_val = RWMR_RPA_P8_8THREAD; 3574 int n_online = atomic_read(&vc->online_count); 3575 3576 /* 3577 * Use the 8-thread value if we're doing split-core 3578 * or if the vcore's online count looks bogus. 3579 */ 3580 if (split == 1 && threads_per_subcore == MAX_SMT_THREADS && 3581 n_online >= 1 && n_online <= MAX_SMT_THREADS) 3582 rwmr_val = p8_rwmr_values[n_online]; 3583 mtspr(SPRN_RWMR, rwmr_val); 3584 } 3585 3586 /* Start all the threads */ 3587 active = 0; 3588 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3589 thr = is_power8 ? subcore_thread_map[sub] : sub; 3590 thr0_done = false; 3591 active |= 1 << thr; 3592 pvc = core_info.vc[sub]; 3593 pvc->pcpu = pcpu + thr; 3594 for_each_runnable_thread(i, vcpu, pvc) { 3595 kvmppc_start_thread(vcpu, pvc); 3596 kvmppc_create_dtl_entry(vcpu, pvc); 3597 trace_kvm_guest_enter(vcpu); 3598 if (!vcpu->arch.ptid) 3599 thr0_done = true; 3600 active |= 1 << (thr + vcpu->arch.ptid); 3601 } 3602 /* 3603 * We need to start the first thread of each subcore 3604 * even if it doesn't have a vcpu. 3605 */ 3606 if (!thr0_done) 3607 kvmppc_start_thread(NULL, pvc); 3608 } 3609 3610 /* 3611 * Ensure that split_info.do_nap is set after setting 3612 * the vcore pointer in the PACA of the secondaries. 3613 */ 3614 smp_mb(); 3615 3616 /* 3617 * When doing micro-threading, poke the inactive threads as well. 3618 * This gets them to the nap instruction after kvm_do_nap, 3619 * which reduces the time taken to unsplit later. 3620 */ 3621 if (cmd_bit) { 3622 split_info.do_nap = 1; /* ask secondaries to nap when done */ 3623 for (thr = 1; thr < threads_per_subcore; ++thr) 3624 if (!(active & (1 << thr))) 3625 kvmppc_ipi_thread(pcpu + thr); 3626 } 3627 3628 vc->vcore_state = VCORE_RUNNING; 3629 preempt_disable(); 3630 3631 trace_kvmppc_run_core(vc, 0); 3632 3633 for (sub = 0; sub < core_info.n_subcores; ++sub) 3634 spin_unlock(&core_info.vc[sub]->lock); 3635 3636 guest_enter_irqoff(); 3637 3638 srcu_idx = srcu_read_lock(&vc->kvm->srcu); 3639 3640 this_cpu_disable_ftrace(); 3641 3642 /* 3643 * Interrupts will be enabled once we get into the guest, 3644 * so tell lockdep that we're about to enable interrupts. 3645 */ 3646 trace_hardirqs_on(); 3647 3648 trap = __kvmppc_vcore_entry(); 3649 3650 trace_hardirqs_off(); 3651 3652 this_cpu_enable_ftrace(); 3653 3654 srcu_read_unlock(&vc->kvm->srcu, srcu_idx); 3655 3656 set_irq_happened(trap); 3657 3658 spin_lock(&vc->lock); 3659 /* prevent other vcpu threads from doing kvmppc_start_thread() now */ 3660 vc->vcore_state = VCORE_EXITING; 3661 3662 /* wait for secondary threads to finish writing their state to memory */ 3663 kvmppc_wait_for_nap(controlled_threads); 3664 3665 /* Return to whole-core mode if we split the core earlier */ 3666 if (cmd_bit) { 3667 unsigned long hid0 = mfspr(SPRN_HID0); 3668 unsigned long loops = 0; 3669 3670 hid0 &= ~HID0_POWER8_DYNLPARDIS; 3671 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE; 3672 mb(); 3673 mtspr(SPRN_HID0, hid0); 3674 isync(); 3675 for (;;) { 3676 hid0 = mfspr(SPRN_HID0); 3677 if (!(hid0 & stat_bit)) 3678 break; 3679 cpu_relax(); 3680 ++loops; 3681 } 3682 split_info.do_nap = 0; 3683 } 3684 3685 kvmppc_set_host_core(pcpu); 3686 3687 guest_exit_irqoff(); 3688 3689 local_irq_enable(); 3690 3691 /* Let secondaries go back to the offline loop */ 3692 for (i = 0; i < controlled_threads; ++i) { 3693 kvmppc_release_hwthread(pcpu + i); 3694 if (sip && sip->napped[i]) 3695 kvmppc_ipi_thread(pcpu + i); 3696 cpumask_clear_cpu(pcpu + i, &vc->kvm->arch.cpu_in_guest); 3697 } 3698 3699 spin_unlock(&vc->lock); 3700 3701 /* make sure updates to secondary vcpu structs are visible now */ 3702 smp_mb(); 3703 3704 preempt_enable(); 3705 3706 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3707 pvc = core_info.vc[sub]; 3708 post_guest_process(pvc, pvc == vc); 3709 } 3710 3711 spin_lock(&vc->lock); 3712 3713 out: 3714 vc->vcore_state = VCORE_INACTIVE; 3715 trace_kvmppc_run_core(vc, 1); 3716 } 3717 3718 static void load_spr_state(struct kvm_vcpu *vcpu) 3719 { 3720 mtspr(SPRN_DSCR, vcpu->arch.dscr); 3721 mtspr(SPRN_IAMR, vcpu->arch.iamr); 3722 mtspr(SPRN_PSPB, vcpu->arch.pspb); 3723 mtspr(SPRN_FSCR, vcpu->arch.fscr); 3724 mtspr(SPRN_TAR, vcpu->arch.tar); 3725 mtspr(SPRN_EBBHR, vcpu->arch.ebbhr); 3726 mtspr(SPRN_EBBRR, vcpu->arch.ebbrr); 3727 mtspr(SPRN_BESCR, vcpu->arch.bescr); 3728 mtspr(SPRN_WORT, vcpu->arch.wort); 3729 mtspr(SPRN_TIDR, vcpu->arch.tid); 3730 mtspr(SPRN_AMR, vcpu->arch.amr); 3731 mtspr(SPRN_UAMOR, vcpu->arch.uamor); 3732 3733 /* 3734 * DAR, DSISR, and for nested HV, SPRGs must be set with MSR[RI] 3735 * clear (or hstate set appropriately to catch those registers 3736 * being clobbered if we take a MCE or SRESET), so those are done 3737 * later. 3738 */ 3739 3740 if (!(vcpu->arch.ctrl & 1)) 3741 mtspr(SPRN_CTRLT, mfspr(SPRN_CTRLF) & ~1); 3742 } 3743 3744 static void store_spr_state(struct kvm_vcpu *vcpu) 3745 { 3746 vcpu->arch.ctrl = mfspr(SPRN_CTRLF); 3747 3748 vcpu->arch.iamr = mfspr(SPRN_IAMR); 3749 vcpu->arch.pspb = mfspr(SPRN_PSPB); 3750 vcpu->arch.fscr = mfspr(SPRN_FSCR); 3751 vcpu->arch.tar = mfspr(SPRN_TAR); 3752 vcpu->arch.ebbhr = mfspr(SPRN_EBBHR); 3753 vcpu->arch.ebbrr = mfspr(SPRN_EBBRR); 3754 vcpu->arch.bescr = mfspr(SPRN_BESCR); 3755 vcpu->arch.wort = mfspr(SPRN_WORT); 3756 vcpu->arch.tid = mfspr(SPRN_TIDR); 3757 vcpu->arch.amr = mfspr(SPRN_AMR); 3758 vcpu->arch.uamor = mfspr(SPRN_UAMOR); 3759 vcpu->arch.dscr = mfspr(SPRN_DSCR); 3760 } 3761 3762 /* 3763 * Privileged (non-hypervisor) host registers to save. 3764 */ 3765 struct p9_host_os_sprs { 3766 unsigned long dscr; 3767 unsigned long tidr; 3768 unsigned long iamr; 3769 unsigned long amr; 3770 unsigned long fscr; 3771 }; 3772 3773 static void save_p9_host_os_sprs(struct p9_host_os_sprs *host_os_sprs) 3774 { 3775 host_os_sprs->dscr = mfspr(SPRN_DSCR); 3776 host_os_sprs->tidr = mfspr(SPRN_TIDR); 3777 host_os_sprs->iamr = mfspr(SPRN_IAMR); 3778 host_os_sprs->amr = mfspr(SPRN_AMR); 3779 host_os_sprs->fscr = mfspr(SPRN_FSCR); 3780 } 3781 3782 /* vcpu guest regs must already be saved */ 3783 static void restore_p9_host_os_sprs(struct kvm_vcpu *vcpu, 3784 struct p9_host_os_sprs *host_os_sprs) 3785 { 3786 mtspr(SPRN_PSPB, 0); 3787 mtspr(SPRN_WORT, 0); 3788 mtspr(SPRN_UAMOR, 0); 3789 3790 mtspr(SPRN_DSCR, host_os_sprs->dscr); 3791 mtspr(SPRN_TIDR, host_os_sprs->tidr); 3792 mtspr(SPRN_IAMR, host_os_sprs->iamr); 3793 3794 if (host_os_sprs->amr != vcpu->arch.amr) 3795 mtspr(SPRN_AMR, host_os_sprs->amr); 3796 3797 if (host_os_sprs->fscr != vcpu->arch.fscr) 3798 mtspr(SPRN_FSCR, host_os_sprs->fscr); 3799 3800 /* Save guest CTRL register, set runlatch to 1 */ 3801 if (!(vcpu->arch.ctrl & 1)) 3802 mtspr(SPRN_CTRLT, 1); 3803 } 3804 3805 static inline bool hcall_is_xics(unsigned long req) 3806 { 3807 return req == H_EOI || req == H_CPPR || req == H_IPI || 3808 req == H_IPOLL || req == H_XIRR || req == H_XIRR_X; 3809 } 3810 3811 /* 3812 * Guest entry for POWER9 and later CPUs. 3813 */ 3814 static int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit, 3815 unsigned long lpcr) 3816 { 3817 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3818 struct p9_host_os_sprs host_os_sprs; 3819 s64 dec; 3820 u64 tb; 3821 int trap, save_pmu; 3822 3823 WARN_ON_ONCE(vcpu->arch.ceded); 3824 3825 dec = mfspr(SPRN_DEC); 3826 tb = mftb(); 3827 if (dec < 0) 3828 return BOOK3S_INTERRUPT_HV_DECREMENTER; 3829 local_paca->kvm_hstate.dec_expires = dec + tb; 3830 if (local_paca->kvm_hstate.dec_expires < time_limit) 3831 time_limit = local_paca->kvm_hstate.dec_expires; 3832 3833 save_p9_host_os_sprs(&host_os_sprs); 3834 3835 kvmhv_save_host_pmu(); /* saves it to PACA kvm_hstate */ 3836 3837 kvmppc_subcore_enter_guest(); 3838 3839 vc->entry_exit_map = 1; 3840 vc->in_guest = 1; 3841 3842 if (vcpu->arch.vpa.pinned_addr) { 3843 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3844 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3845 lp->yield_count = cpu_to_be32(yield_count); 3846 vcpu->arch.vpa.dirty = 1; 3847 } 3848 3849 if (cpu_has_feature(CPU_FTR_TM) || 3850 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3851 kvmppc_restore_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3852 3853 kvmhv_load_guest_pmu(vcpu); 3854 3855 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3856 load_fp_state(&vcpu->arch.fp); 3857 #ifdef CONFIG_ALTIVEC 3858 load_vr_state(&vcpu->arch.vr); 3859 #endif 3860 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave); 3861 3862 load_spr_state(vcpu); 3863 3864 /* 3865 * When setting DEC, we must always deal with irq_work_raise via NMI vs 3866 * setting DEC. The problem occurs right as we switch into guest mode 3867 * if a NMI hits and sets pending work and sets DEC, then that will 3868 * apply to the guest and not bring us back to the host. 3869 * 3870 * irq_work_raise could check a flag (or possibly LPCR[HDICE] for 3871 * example) and set HDEC to 1? That wouldn't solve the nested hv 3872 * case which needs to abort the hcall or zero the time limit. 3873 * 3874 * XXX: Another day's problem. 3875 */ 3876 mtspr(SPRN_DEC, vcpu->arch.dec_expires - mftb()); 3877 3878 if (kvmhv_on_pseries()) { 3879 /* 3880 * We need to save and restore the guest visible part of the 3881 * psscr (i.e. using SPRN_PSSCR_PR) since the hypervisor 3882 * doesn't do this for us. Note only required if pseries since 3883 * this is done in kvmhv_vcpu_entry_p9() below otherwise. 3884 */ 3885 unsigned long host_psscr; 3886 /* call our hypervisor to load up HV regs and go */ 3887 struct hv_guest_state hvregs; 3888 3889 host_psscr = mfspr(SPRN_PSSCR_PR); 3890 mtspr(SPRN_PSSCR_PR, vcpu->arch.psscr); 3891 kvmhv_save_hv_regs(vcpu, &hvregs); 3892 hvregs.lpcr = lpcr; 3893 vcpu->arch.regs.msr = vcpu->arch.shregs.msr; 3894 hvregs.version = HV_GUEST_STATE_VERSION; 3895 if (vcpu->arch.nested) { 3896 hvregs.lpid = vcpu->arch.nested->shadow_lpid; 3897 hvregs.vcpu_token = vcpu->arch.nested_vcpu_id; 3898 } else { 3899 hvregs.lpid = vcpu->kvm->arch.lpid; 3900 hvregs.vcpu_token = vcpu->vcpu_id; 3901 } 3902 hvregs.hdec_expiry = time_limit; 3903 mtspr(SPRN_DAR, vcpu->arch.shregs.dar); 3904 mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr); 3905 trap = plpar_hcall_norets(H_ENTER_NESTED, __pa(&hvregs), 3906 __pa(&vcpu->arch.regs)); 3907 kvmhv_restore_hv_return_state(vcpu, &hvregs); 3908 vcpu->arch.shregs.msr = vcpu->arch.regs.msr; 3909 vcpu->arch.shregs.dar = mfspr(SPRN_DAR); 3910 vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR); 3911 vcpu->arch.psscr = mfspr(SPRN_PSSCR_PR); 3912 mtspr(SPRN_PSSCR_PR, host_psscr); 3913 3914 /* H_CEDE has to be handled now, not later */ 3915 if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested && 3916 kvmppc_get_gpr(vcpu, 3) == H_CEDE) { 3917 kvmppc_cede(vcpu); 3918 kvmppc_set_gpr(vcpu, 3, 0); 3919 trap = 0; 3920 } 3921 } else { 3922 kvmppc_xive_push_vcpu(vcpu); 3923 trap = kvmhv_vcpu_entry_p9(vcpu, time_limit, lpcr); 3924 if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested && 3925 !(vcpu->arch.shregs.msr & MSR_PR)) { 3926 unsigned long req = kvmppc_get_gpr(vcpu, 3); 3927 3928 /* H_CEDE has to be handled now, not later */ 3929 if (req == H_CEDE) { 3930 kvmppc_cede(vcpu); 3931 kvmppc_xive_rearm_escalation(vcpu); /* may un-cede */ 3932 kvmppc_set_gpr(vcpu, 3, 0); 3933 trap = 0; 3934 3935 /* XICS hcalls must be handled before xive is pulled */ 3936 } else if (hcall_is_xics(req)) { 3937 int ret; 3938 3939 ret = kvmppc_xive_xics_hcall(vcpu, req); 3940 if (ret != H_TOO_HARD) { 3941 kvmppc_set_gpr(vcpu, 3, ret); 3942 trap = 0; 3943 } 3944 } 3945 } 3946 kvmppc_xive_pull_vcpu(vcpu); 3947 3948 if (kvm_is_radix(vcpu->kvm)) 3949 vcpu->arch.slb_max = 0; 3950 } 3951 3952 dec = mfspr(SPRN_DEC); 3953 if (!(lpcr & LPCR_LD)) /* Sign extend if not using large decrementer */ 3954 dec = (s32) dec; 3955 tb = mftb(); 3956 vcpu->arch.dec_expires = dec + tb; 3957 vcpu->cpu = -1; 3958 vcpu->arch.thread_cpu = -1; 3959 3960 store_spr_state(vcpu); 3961 3962 restore_p9_host_os_sprs(vcpu, &host_os_sprs); 3963 3964 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3965 store_fp_state(&vcpu->arch.fp); 3966 #ifdef CONFIG_ALTIVEC 3967 store_vr_state(&vcpu->arch.vr); 3968 #endif 3969 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE); 3970 3971 if (cpu_has_feature(CPU_FTR_TM) || 3972 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3973 kvmppc_save_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3974 3975 save_pmu = 1; 3976 if (vcpu->arch.vpa.pinned_addr) { 3977 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3978 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3979 lp->yield_count = cpu_to_be32(yield_count); 3980 vcpu->arch.vpa.dirty = 1; 3981 save_pmu = lp->pmcregs_in_use; 3982 } 3983 /* Must save pmu if this guest is capable of running nested guests */ 3984 save_pmu |= nesting_enabled(vcpu->kvm); 3985 3986 kvmhv_save_guest_pmu(vcpu, save_pmu); 3987 3988 vc->entry_exit_map = 0x101; 3989 vc->in_guest = 0; 3990 3991 mtspr(SPRN_DEC, local_paca->kvm_hstate.dec_expires - mftb()); 3992 /* We may have raced with new irq work */ 3993 if (test_irq_work_pending()) 3994 set_dec(1); 3995 mtspr(SPRN_SPRG_VDSO_WRITE, local_paca->sprg_vdso); 3996 3997 kvmhv_load_host_pmu(); 3998 3999 kvmppc_subcore_exit_guest(); 4000 4001 return trap; 4002 } 4003 4004 /* 4005 * Wait for some other vcpu thread to execute us, and 4006 * wake us up when we need to handle something in the host. 4007 */ 4008 static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc, 4009 struct kvm_vcpu *vcpu, int wait_state) 4010 { 4011 DEFINE_WAIT(wait); 4012 4013 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state); 4014 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 4015 spin_unlock(&vc->lock); 4016 schedule(); 4017 spin_lock(&vc->lock); 4018 } 4019 finish_wait(&vcpu->arch.cpu_run, &wait); 4020 } 4021 4022 static void grow_halt_poll_ns(struct kvmppc_vcore *vc) 4023 { 4024 if (!halt_poll_ns_grow) 4025 return; 4026 4027 vc->halt_poll_ns *= halt_poll_ns_grow; 4028 if (vc->halt_poll_ns < halt_poll_ns_grow_start) 4029 vc->halt_poll_ns = halt_poll_ns_grow_start; 4030 } 4031 4032 static void shrink_halt_poll_ns(struct kvmppc_vcore *vc) 4033 { 4034 if (halt_poll_ns_shrink == 0) 4035 vc->halt_poll_ns = 0; 4036 else 4037 vc->halt_poll_ns /= halt_poll_ns_shrink; 4038 } 4039 4040 #ifdef CONFIG_KVM_XICS 4041 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 4042 { 4043 if (!xics_on_xive()) 4044 return false; 4045 return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr < 4046 vcpu->arch.xive_saved_state.cppr; 4047 } 4048 #else 4049 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 4050 { 4051 return false; 4052 } 4053 #endif /* CONFIG_KVM_XICS */ 4054 4055 static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu) 4056 { 4057 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded || 4058 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu)) 4059 return true; 4060 4061 return false; 4062 } 4063 4064 /* 4065 * Check to see if any of the runnable vcpus on the vcore have pending 4066 * exceptions or are no longer ceded 4067 */ 4068 static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc) 4069 { 4070 struct kvm_vcpu *vcpu; 4071 int i; 4072 4073 for_each_runnable_thread(i, vcpu, vc) { 4074 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu)) 4075 return 1; 4076 } 4077 4078 return 0; 4079 } 4080 4081 /* 4082 * All the vcpus in this vcore are idle, so wait for a decrementer 4083 * or external interrupt to one of the vcpus. vc->lock is held. 4084 */ 4085 static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc) 4086 { 4087 ktime_t cur, start_poll, start_wait; 4088 int do_sleep = 1; 4089 u64 block_ns; 4090 4091 /* Poll for pending exceptions and ceded state */ 4092 cur = start_poll = ktime_get(); 4093 if (vc->halt_poll_ns) { 4094 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns); 4095 ++vc->runner->stat.generic.halt_attempted_poll; 4096 4097 vc->vcore_state = VCORE_POLLING; 4098 spin_unlock(&vc->lock); 4099 4100 do { 4101 if (kvmppc_vcore_check_block(vc)) { 4102 do_sleep = 0; 4103 break; 4104 } 4105 cur = ktime_get(); 4106 } while (kvm_vcpu_can_poll(cur, stop)); 4107 4108 spin_lock(&vc->lock); 4109 vc->vcore_state = VCORE_INACTIVE; 4110 4111 if (!do_sleep) { 4112 ++vc->runner->stat.generic.halt_successful_poll; 4113 goto out; 4114 } 4115 } 4116 4117 prepare_to_rcuwait(&vc->wait); 4118 set_current_state(TASK_INTERRUPTIBLE); 4119 if (kvmppc_vcore_check_block(vc)) { 4120 finish_rcuwait(&vc->wait); 4121 do_sleep = 0; 4122 /* If we polled, count this as a successful poll */ 4123 if (vc->halt_poll_ns) 4124 ++vc->runner->stat.generic.halt_successful_poll; 4125 goto out; 4126 } 4127 4128 start_wait = ktime_get(); 4129 4130 vc->vcore_state = VCORE_SLEEPING; 4131 trace_kvmppc_vcore_blocked(vc, 0); 4132 spin_unlock(&vc->lock); 4133 schedule(); 4134 finish_rcuwait(&vc->wait); 4135 spin_lock(&vc->lock); 4136 vc->vcore_state = VCORE_INACTIVE; 4137 trace_kvmppc_vcore_blocked(vc, 1); 4138 ++vc->runner->stat.halt_successful_wait; 4139 4140 cur = ktime_get(); 4141 4142 out: 4143 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll); 4144 4145 /* Attribute wait time */ 4146 if (do_sleep) { 4147 vc->runner->stat.halt_wait_ns += 4148 ktime_to_ns(cur) - ktime_to_ns(start_wait); 4149 /* Attribute failed poll time */ 4150 if (vc->halt_poll_ns) 4151 vc->runner->stat.generic.halt_poll_fail_ns += 4152 ktime_to_ns(start_wait) - 4153 ktime_to_ns(start_poll); 4154 } else { 4155 /* Attribute successful poll time */ 4156 if (vc->halt_poll_ns) 4157 vc->runner->stat.generic.halt_poll_success_ns += 4158 ktime_to_ns(cur) - 4159 ktime_to_ns(start_poll); 4160 } 4161 4162 /* Adjust poll time */ 4163 if (halt_poll_ns) { 4164 if (block_ns <= vc->halt_poll_ns) 4165 ; 4166 /* We slept and blocked for longer than the max halt time */ 4167 else if (vc->halt_poll_ns && block_ns > halt_poll_ns) 4168 shrink_halt_poll_ns(vc); 4169 /* We slept and our poll time is too small */ 4170 else if (vc->halt_poll_ns < halt_poll_ns && 4171 block_ns < halt_poll_ns) 4172 grow_halt_poll_ns(vc); 4173 if (vc->halt_poll_ns > halt_poll_ns) 4174 vc->halt_poll_ns = halt_poll_ns; 4175 } else 4176 vc->halt_poll_ns = 0; 4177 4178 trace_kvmppc_vcore_wakeup(do_sleep, block_ns); 4179 } 4180 4181 /* 4182 * This never fails for a radix guest, as none of the operations it does 4183 * for a radix guest can fail or have a way to report failure. 4184 */ 4185 static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu) 4186 { 4187 int r = 0; 4188 struct kvm *kvm = vcpu->kvm; 4189 4190 mutex_lock(&kvm->arch.mmu_setup_lock); 4191 if (!kvm->arch.mmu_ready) { 4192 if (!kvm_is_radix(kvm)) 4193 r = kvmppc_hv_setup_htab_rma(vcpu); 4194 if (!r) { 4195 if (cpu_has_feature(CPU_FTR_ARCH_300)) 4196 kvmppc_setup_partition_table(kvm); 4197 kvm->arch.mmu_ready = 1; 4198 } 4199 } 4200 mutex_unlock(&kvm->arch.mmu_setup_lock); 4201 return r; 4202 } 4203 4204 static int kvmppc_run_vcpu(struct kvm_vcpu *vcpu) 4205 { 4206 struct kvm_run *run = vcpu->run; 4207 int n_ceded, i, r; 4208 struct kvmppc_vcore *vc; 4209 struct kvm_vcpu *v; 4210 4211 trace_kvmppc_run_vcpu_enter(vcpu); 4212 4213 run->exit_reason = 0; 4214 vcpu->arch.ret = RESUME_GUEST; 4215 vcpu->arch.trap = 0; 4216 kvmppc_update_vpas(vcpu); 4217 4218 /* 4219 * Synchronize with other threads in this virtual core 4220 */ 4221 vc = vcpu->arch.vcore; 4222 spin_lock(&vc->lock); 4223 vcpu->arch.ceded = 0; 4224 vcpu->arch.run_task = current; 4225 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 4226 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 4227 vcpu->arch.busy_preempt = TB_NIL; 4228 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu); 4229 ++vc->n_runnable; 4230 4231 /* 4232 * This happens the first time this is called for a vcpu. 4233 * If the vcore is already running, we may be able to start 4234 * this thread straight away and have it join in. 4235 */ 4236 if (!signal_pending(current)) { 4237 if ((vc->vcore_state == VCORE_PIGGYBACK || 4238 vc->vcore_state == VCORE_RUNNING) && 4239 !VCORE_IS_EXITING(vc)) { 4240 kvmppc_create_dtl_entry(vcpu, vc); 4241 kvmppc_start_thread(vcpu, vc); 4242 trace_kvm_guest_enter(vcpu); 4243 } else if (vc->vcore_state == VCORE_SLEEPING) { 4244 rcuwait_wake_up(&vc->wait); 4245 } 4246 4247 } 4248 4249 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 4250 !signal_pending(current)) { 4251 /* See if the MMU is ready to go */ 4252 if (!vcpu->kvm->arch.mmu_ready) { 4253 spin_unlock(&vc->lock); 4254 r = kvmhv_setup_mmu(vcpu); 4255 spin_lock(&vc->lock); 4256 if (r) { 4257 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4258 run->fail_entry. 4259 hardware_entry_failure_reason = 0; 4260 vcpu->arch.ret = r; 4261 break; 4262 } 4263 } 4264 4265 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 4266 kvmppc_vcore_end_preempt(vc); 4267 4268 if (vc->vcore_state != VCORE_INACTIVE) { 4269 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE); 4270 continue; 4271 } 4272 for_each_runnable_thread(i, v, vc) { 4273 kvmppc_core_prepare_to_enter(v); 4274 if (signal_pending(v->arch.run_task)) { 4275 kvmppc_remove_runnable(vc, v); 4276 v->stat.signal_exits++; 4277 v->run->exit_reason = KVM_EXIT_INTR; 4278 v->arch.ret = -EINTR; 4279 wake_up(&v->arch.cpu_run); 4280 } 4281 } 4282 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 4283 break; 4284 n_ceded = 0; 4285 for_each_runnable_thread(i, v, vc) { 4286 if (!kvmppc_vcpu_woken(v)) 4287 n_ceded += v->arch.ceded; 4288 else 4289 v->arch.ceded = 0; 4290 } 4291 vc->runner = vcpu; 4292 if (n_ceded == vc->n_runnable) { 4293 kvmppc_vcore_blocked(vc); 4294 } else if (need_resched()) { 4295 kvmppc_vcore_preempt(vc); 4296 /* Let something else run */ 4297 cond_resched_lock(&vc->lock); 4298 if (vc->vcore_state == VCORE_PREEMPT) 4299 kvmppc_vcore_end_preempt(vc); 4300 } else { 4301 kvmppc_run_core(vc); 4302 } 4303 vc->runner = NULL; 4304 } 4305 4306 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 4307 (vc->vcore_state == VCORE_RUNNING || 4308 vc->vcore_state == VCORE_EXITING || 4309 vc->vcore_state == VCORE_PIGGYBACK)) 4310 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE); 4311 4312 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 4313 kvmppc_vcore_end_preempt(vc); 4314 4315 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 4316 kvmppc_remove_runnable(vc, vcpu); 4317 vcpu->stat.signal_exits++; 4318 run->exit_reason = KVM_EXIT_INTR; 4319 vcpu->arch.ret = -EINTR; 4320 } 4321 4322 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) { 4323 /* Wake up some vcpu to run the core */ 4324 i = -1; 4325 v = next_runnable_thread(vc, &i); 4326 wake_up(&v->arch.cpu_run); 4327 } 4328 4329 trace_kvmppc_run_vcpu_exit(vcpu); 4330 spin_unlock(&vc->lock); 4331 return vcpu->arch.ret; 4332 } 4333 4334 int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit, 4335 unsigned long lpcr) 4336 { 4337 struct kvm_run *run = vcpu->run; 4338 int trap, r, pcpu; 4339 int srcu_idx; 4340 struct kvmppc_vcore *vc; 4341 struct kvm *kvm = vcpu->kvm; 4342 struct kvm_nested_guest *nested = vcpu->arch.nested; 4343 4344 trace_kvmppc_run_vcpu_enter(vcpu); 4345 4346 run->exit_reason = 0; 4347 vcpu->arch.ret = RESUME_GUEST; 4348 vcpu->arch.trap = 0; 4349 4350 vc = vcpu->arch.vcore; 4351 vcpu->arch.ceded = 0; 4352 vcpu->arch.run_task = current; 4353 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 4354 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 4355 vcpu->arch.busy_preempt = TB_NIL; 4356 vcpu->arch.last_inst = KVM_INST_FETCH_FAILED; 4357 vc->runnable_threads[0] = vcpu; 4358 vc->n_runnable = 1; 4359 vc->runner = vcpu; 4360 4361 /* See if the MMU is ready to go */ 4362 if (!kvm->arch.mmu_ready) { 4363 r = kvmhv_setup_mmu(vcpu); 4364 if (r) { 4365 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4366 run->fail_entry.hardware_entry_failure_reason = 0; 4367 vcpu->arch.ret = r; 4368 return r; 4369 } 4370 } 4371 4372 if (need_resched()) 4373 cond_resched(); 4374 4375 kvmppc_update_vpas(vcpu); 4376 4377 init_vcore_to_run(vc); 4378 vc->preempt_tb = TB_NIL; 4379 4380 preempt_disable(); 4381 pcpu = smp_processor_id(); 4382 vc->pcpu = pcpu; 4383 if (kvm_is_radix(kvm)) 4384 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 4385 4386 local_irq_disable(); 4387 hard_irq_disable(); 4388 if (signal_pending(current)) 4389 goto sigpend; 4390 if (lazy_irq_pending() || need_resched() || !kvm->arch.mmu_ready) 4391 goto out; 4392 4393 if (!nested) { 4394 kvmppc_core_prepare_to_enter(vcpu); 4395 if (vcpu->arch.doorbell_request) { 4396 vc->dpdes = 1; 4397 smp_wmb(); 4398 vcpu->arch.doorbell_request = 0; 4399 } 4400 if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, 4401 &vcpu->arch.pending_exceptions)) 4402 lpcr |= LPCR_MER; 4403 } else if (vcpu->arch.pending_exceptions || 4404 vcpu->arch.doorbell_request || 4405 xive_interrupt_pending(vcpu)) { 4406 vcpu->arch.ret = RESUME_HOST; 4407 goto out; 4408 } 4409 4410 kvmppc_clear_host_core(pcpu); 4411 4412 local_paca->kvm_hstate.napping = 0; 4413 local_paca->kvm_hstate.kvm_split_mode = NULL; 4414 kvmppc_start_thread(vcpu, vc); 4415 kvmppc_create_dtl_entry(vcpu, vc); 4416 trace_kvm_guest_enter(vcpu); 4417 4418 vc->vcore_state = VCORE_RUNNING; 4419 trace_kvmppc_run_core(vc, 0); 4420 4421 guest_enter_irqoff(); 4422 4423 srcu_idx = srcu_read_lock(&kvm->srcu); 4424 4425 this_cpu_disable_ftrace(); 4426 4427 /* Tell lockdep that we're about to enable interrupts */ 4428 trace_hardirqs_on(); 4429 4430 trap = kvmhv_p9_guest_entry(vcpu, time_limit, lpcr); 4431 vcpu->arch.trap = trap; 4432 4433 trace_hardirqs_off(); 4434 4435 this_cpu_enable_ftrace(); 4436 4437 srcu_read_unlock(&kvm->srcu, srcu_idx); 4438 4439 set_irq_happened(trap); 4440 4441 kvmppc_set_host_core(pcpu); 4442 4443 guest_exit_irqoff(); 4444 4445 local_irq_enable(); 4446 4447 cpumask_clear_cpu(pcpu, &kvm->arch.cpu_in_guest); 4448 4449 preempt_enable(); 4450 4451 /* 4452 * cancel pending decrementer exception if DEC is now positive, or if 4453 * entering a nested guest in which case the decrementer is now owned 4454 * by L2 and the L1 decrementer is provided in hdec_expires 4455 */ 4456 if (kvmppc_core_pending_dec(vcpu) && 4457 ((get_tb() < vcpu->arch.dec_expires) || 4458 (trap == BOOK3S_INTERRUPT_SYSCALL && 4459 kvmppc_get_gpr(vcpu, 3) == H_ENTER_NESTED))) 4460 kvmppc_core_dequeue_dec(vcpu); 4461 4462 trace_kvm_guest_exit(vcpu); 4463 r = RESUME_GUEST; 4464 if (trap) { 4465 if (!nested) 4466 r = kvmppc_handle_exit_hv(vcpu, current); 4467 else 4468 r = kvmppc_handle_nested_exit(vcpu); 4469 } 4470 vcpu->arch.ret = r; 4471 4472 if (is_kvmppc_resume_guest(r) && vcpu->arch.ceded && 4473 !kvmppc_vcpu_woken(vcpu)) { 4474 kvmppc_set_timer(vcpu); 4475 while (vcpu->arch.ceded && !kvmppc_vcpu_woken(vcpu)) { 4476 if (signal_pending(current)) { 4477 vcpu->stat.signal_exits++; 4478 run->exit_reason = KVM_EXIT_INTR; 4479 vcpu->arch.ret = -EINTR; 4480 break; 4481 } 4482 spin_lock(&vc->lock); 4483 kvmppc_vcore_blocked(vc); 4484 spin_unlock(&vc->lock); 4485 } 4486 } 4487 vcpu->arch.ceded = 0; 4488 4489 vc->vcore_state = VCORE_INACTIVE; 4490 trace_kvmppc_run_core(vc, 1); 4491 4492 done: 4493 kvmppc_remove_runnable(vc, vcpu); 4494 trace_kvmppc_run_vcpu_exit(vcpu); 4495 4496 return vcpu->arch.ret; 4497 4498 sigpend: 4499 vcpu->stat.signal_exits++; 4500 run->exit_reason = KVM_EXIT_INTR; 4501 vcpu->arch.ret = -EINTR; 4502 out: 4503 local_irq_enable(); 4504 preempt_enable(); 4505 goto done; 4506 } 4507 4508 static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu) 4509 { 4510 struct kvm_run *run = vcpu->run; 4511 int r; 4512 int srcu_idx; 4513 unsigned long ebb_regs[3] = {}; /* shut up GCC */ 4514 unsigned long user_tar = 0; 4515 unsigned int user_vrsave; 4516 struct kvm *kvm; 4517 4518 if (!vcpu->arch.sane) { 4519 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 4520 return -EINVAL; 4521 } 4522 4523 /* 4524 * Don't allow entry with a suspended transaction, because 4525 * the guest entry/exit code will lose it. 4526 * If the guest has TM enabled, save away their TM-related SPRs 4527 * (they will get restored by the TM unavailable interrupt). 4528 */ 4529 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 4530 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs && 4531 (current->thread.regs->msr & MSR_TM)) { 4532 if (MSR_TM_ACTIVE(current->thread.regs->msr)) { 4533 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4534 run->fail_entry.hardware_entry_failure_reason = 0; 4535 return -EINVAL; 4536 } 4537 /* Enable TM so we can read the TM SPRs */ 4538 mtmsr(mfmsr() | MSR_TM); 4539 current->thread.tm_tfhar = mfspr(SPRN_TFHAR); 4540 current->thread.tm_tfiar = mfspr(SPRN_TFIAR); 4541 current->thread.tm_texasr = mfspr(SPRN_TEXASR); 4542 current->thread.regs->msr &= ~MSR_TM; 4543 } 4544 #endif 4545 4546 /* 4547 * Force online to 1 for the sake of old userspace which doesn't 4548 * set it. 4549 */ 4550 if (!vcpu->arch.online) { 4551 atomic_inc(&vcpu->arch.vcore->online_count); 4552 vcpu->arch.online = 1; 4553 } 4554 4555 kvmppc_core_prepare_to_enter(vcpu); 4556 4557 /* No need to go into the guest when all we'll do is come back out */ 4558 if (signal_pending(current)) { 4559 run->exit_reason = KVM_EXIT_INTR; 4560 return -EINTR; 4561 } 4562 4563 kvm = vcpu->kvm; 4564 atomic_inc(&kvm->arch.vcpus_running); 4565 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */ 4566 smp_mb(); 4567 4568 flush_all_to_thread(current); 4569 4570 /* Save userspace EBB and other register values */ 4571 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4572 ebb_regs[0] = mfspr(SPRN_EBBHR); 4573 ebb_regs[1] = mfspr(SPRN_EBBRR); 4574 ebb_regs[2] = mfspr(SPRN_BESCR); 4575 user_tar = mfspr(SPRN_TAR); 4576 } 4577 user_vrsave = mfspr(SPRN_VRSAVE); 4578 4579 vcpu->arch.waitp = &vcpu->arch.vcore->wait; 4580 vcpu->arch.pgdir = kvm->mm->pgd; 4581 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 4582 4583 do { 4584 if (cpu_has_feature(CPU_FTR_ARCH_300)) 4585 r = kvmhv_run_single_vcpu(vcpu, ~(u64)0, 4586 vcpu->arch.vcore->lpcr); 4587 else 4588 r = kvmppc_run_vcpu(vcpu); 4589 4590 if (run->exit_reason == KVM_EXIT_PAPR_HCALL) { 4591 if (WARN_ON_ONCE(vcpu->arch.shregs.msr & MSR_PR)) { 4592 /* 4593 * These should have been caught reflected 4594 * into the guest by now. Final sanity check: 4595 * don't allow userspace to execute hcalls in 4596 * the hypervisor. 4597 */ 4598 r = RESUME_GUEST; 4599 continue; 4600 } 4601 trace_kvm_hcall_enter(vcpu); 4602 r = kvmppc_pseries_do_hcall(vcpu); 4603 trace_kvm_hcall_exit(vcpu, r); 4604 kvmppc_core_prepare_to_enter(vcpu); 4605 } else if (r == RESUME_PAGE_FAULT) { 4606 srcu_idx = srcu_read_lock(&kvm->srcu); 4607 r = kvmppc_book3s_hv_page_fault(vcpu, 4608 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 4609 srcu_read_unlock(&kvm->srcu, srcu_idx); 4610 } else if (r == RESUME_PASSTHROUGH) { 4611 if (WARN_ON(xics_on_xive())) 4612 r = H_SUCCESS; 4613 else 4614 r = kvmppc_xics_rm_complete(vcpu, 0); 4615 } 4616 } while (is_kvmppc_resume_guest(r)); 4617 4618 /* Restore userspace EBB and other register values */ 4619 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4620 mtspr(SPRN_EBBHR, ebb_regs[0]); 4621 mtspr(SPRN_EBBRR, ebb_regs[1]); 4622 mtspr(SPRN_BESCR, ebb_regs[2]); 4623 mtspr(SPRN_TAR, user_tar); 4624 } 4625 mtspr(SPRN_VRSAVE, user_vrsave); 4626 4627 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 4628 atomic_dec(&kvm->arch.vcpus_running); 4629 4630 srr_regs_clobbered(); 4631 4632 return r; 4633 } 4634 4635 static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps, 4636 int shift, int sllp) 4637 { 4638 (*sps)->page_shift = shift; 4639 (*sps)->slb_enc = sllp; 4640 (*sps)->enc[0].page_shift = shift; 4641 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift); 4642 /* 4643 * Add 16MB MPSS support (may get filtered out by userspace) 4644 */ 4645 if (shift != 24) { 4646 int penc = kvmppc_pgsize_lp_encoding(shift, 24); 4647 if (penc != -1) { 4648 (*sps)->enc[1].page_shift = 24; 4649 (*sps)->enc[1].pte_enc = penc; 4650 } 4651 } 4652 (*sps)++; 4653 } 4654 4655 static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm, 4656 struct kvm_ppc_smmu_info *info) 4657 { 4658 struct kvm_ppc_one_seg_page_size *sps; 4659 4660 /* 4661 * POWER7, POWER8 and POWER9 all support 32 storage keys for data. 4662 * POWER7 doesn't support keys for instruction accesses, 4663 * POWER8 and POWER9 do. 4664 */ 4665 info->data_keys = 32; 4666 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0; 4667 4668 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */ 4669 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS; 4670 info->slb_size = 32; 4671 4672 /* We only support these sizes for now, and no muti-size segments */ 4673 sps = &info->sps[0]; 4674 kvmppc_add_seg_page_size(&sps, 12, 0); 4675 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01); 4676 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L); 4677 4678 /* If running as a nested hypervisor, we don't support HPT guests */ 4679 if (kvmhv_on_pseries()) 4680 info->flags |= KVM_PPC_NO_HASH; 4681 4682 return 0; 4683 } 4684 4685 /* 4686 * Get (and clear) the dirty memory log for a memory slot. 4687 */ 4688 static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm, 4689 struct kvm_dirty_log *log) 4690 { 4691 struct kvm_memslots *slots; 4692 struct kvm_memory_slot *memslot; 4693 int i, r; 4694 unsigned long n; 4695 unsigned long *buf, *p; 4696 struct kvm_vcpu *vcpu; 4697 4698 mutex_lock(&kvm->slots_lock); 4699 4700 r = -EINVAL; 4701 if (log->slot >= KVM_USER_MEM_SLOTS) 4702 goto out; 4703 4704 slots = kvm_memslots(kvm); 4705 memslot = id_to_memslot(slots, log->slot); 4706 r = -ENOENT; 4707 if (!memslot || !memslot->dirty_bitmap) 4708 goto out; 4709 4710 /* 4711 * Use second half of bitmap area because both HPT and radix 4712 * accumulate bits in the first half. 4713 */ 4714 n = kvm_dirty_bitmap_bytes(memslot); 4715 buf = memslot->dirty_bitmap + n / sizeof(long); 4716 memset(buf, 0, n); 4717 4718 if (kvm_is_radix(kvm)) 4719 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf); 4720 else 4721 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf); 4722 if (r) 4723 goto out; 4724 4725 /* 4726 * We accumulate dirty bits in the first half of the 4727 * memslot's dirty_bitmap area, for when pages are paged 4728 * out or modified by the host directly. Pick up these 4729 * bits and add them to the map. 4730 */ 4731 p = memslot->dirty_bitmap; 4732 for (i = 0; i < n / sizeof(long); ++i) 4733 buf[i] |= xchg(&p[i], 0); 4734 4735 /* Harvest dirty bits from VPA and DTL updates */ 4736 /* Note: we never modify the SLB shadow buffer areas */ 4737 kvm_for_each_vcpu(i, vcpu, kvm) { 4738 spin_lock(&vcpu->arch.vpa_update_lock); 4739 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf); 4740 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf); 4741 spin_unlock(&vcpu->arch.vpa_update_lock); 4742 } 4743 4744 r = -EFAULT; 4745 if (copy_to_user(log->dirty_bitmap, buf, n)) 4746 goto out; 4747 4748 r = 0; 4749 out: 4750 mutex_unlock(&kvm->slots_lock); 4751 return r; 4752 } 4753 4754 static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *slot) 4755 { 4756 vfree(slot->arch.rmap); 4757 slot->arch.rmap = NULL; 4758 } 4759 4760 static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm, 4761 struct kvm_memory_slot *slot, 4762 const struct kvm_userspace_memory_region *mem, 4763 enum kvm_mr_change change) 4764 { 4765 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4766 4767 if (change == KVM_MR_CREATE) { 4768 slot->arch.rmap = vzalloc(array_size(npages, 4769 sizeof(*slot->arch.rmap))); 4770 if (!slot->arch.rmap) 4771 return -ENOMEM; 4772 } 4773 4774 return 0; 4775 } 4776 4777 static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm, 4778 const struct kvm_userspace_memory_region *mem, 4779 const struct kvm_memory_slot *old, 4780 const struct kvm_memory_slot *new, 4781 enum kvm_mr_change change) 4782 { 4783 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4784 4785 /* 4786 * If we are making a new memslot, it might make 4787 * some address that was previously cached as emulated 4788 * MMIO be no longer emulated MMIO, so invalidate 4789 * all the caches of emulated MMIO translations. 4790 */ 4791 if (npages) 4792 atomic64_inc(&kvm->arch.mmio_update); 4793 4794 /* 4795 * For change == KVM_MR_MOVE or KVM_MR_DELETE, higher levels 4796 * have already called kvm_arch_flush_shadow_memslot() to 4797 * flush shadow mappings. For KVM_MR_CREATE we have no 4798 * previous mappings. So the only case to handle is 4799 * KVM_MR_FLAGS_ONLY when the KVM_MEM_LOG_DIRTY_PAGES bit 4800 * has been changed. 4801 * For radix guests, we flush on setting KVM_MEM_LOG_DIRTY_PAGES 4802 * to get rid of any THP PTEs in the partition-scoped page tables 4803 * so we can track dirtiness at the page level; we flush when 4804 * clearing KVM_MEM_LOG_DIRTY_PAGES so that we can go back to 4805 * using THP PTEs. 4806 */ 4807 if (change == KVM_MR_FLAGS_ONLY && kvm_is_radix(kvm) && 4808 ((new->flags ^ old->flags) & KVM_MEM_LOG_DIRTY_PAGES)) 4809 kvmppc_radix_flush_memslot(kvm, old); 4810 /* 4811 * If UV hasn't yet called H_SVM_INIT_START, don't register memslots. 4812 */ 4813 if (!kvm->arch.secure_guest) 4814 return; 4815 4816 switch (change) { 4817 case KVM_MR_CREATE: 4818 /* 4819 * @TODO kvmppc_uvmem_memslot_create() can fail and 4820 * return error. Fix this. 4821 */ 4822 kvmppc_uvmem_memslot_create(kvm, new); 4823 break; 4824 case KVM_MR_DELETE: 4825 kvmppc_uvmem_memslot_delete(kvm, old); 4826 break; 4827 default: 4828 /* TODO: Handle KVM_MR_MOVE */ 4829 break; 4830 } 4831 } 4832 4833 /* 4834 * Update LPCR values in kvm->arch and in vcores. 4835 * Caller must hold kvm->arch.mmu_setup_lock (for mutual exclusion 4836 * of kvm->arch.lpcr update). 4837 */ 4838 void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask) 4839 { 4840 long int i; 4841 u32 cores_done = 0; 4842 4843 if ((kvm->arch.lpcr & mask) == lpcr) 4844 return; 4845 4846 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr; 4847 4848 for (i = 0; i < KVM_MAX_VCORES; ++i) { 4849 struct kvmppc_vcore *vc = kvm->arch.vcores[i]; 4850 if (!vc) 4851 continue; 4852 4853 spin_lock(&vc->lock); 4854 vc->lpcr = (vc->lpcr & ~mask) | lpcr; 4855 verify_lpcr(kvm, vc->lpcr); 4856 spin_unlock(&vc->lock); 4857 if (++cores_done >= kvm->arch.online_vcores) 4858 break; 4859 } 4860 } 4861 4862 void kvmppc_setup_partition_table(struct kvm *kvm) 4863 { 4864 unsigned long dw0, dw1; 4865 4866 if (!kvm_is_radix(kvm)) { 4867 /* PS field - page size for VRMA */ 4868 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) | 4869 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1); 4870 /* HTABSIZE and HTABORG fields */ 4871 dw0 |= kvm->arch.sdr1; 4872 4873 /* Second dword as set by userspace */ 4874 dw1 = kvm->arch.process_table; 4875 } else { 4876 dw0 = PATB_HR | radix__get_tree_size() | 4877 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE; 4878 dw1 = PATB_GR | kvm->arch.process_table; 4879 } 4880 kvmhv_set_ptbl_entry(kvm->arch.lpid, dw0, dw1); 4881 } 4882 4883 /* 4884 * Set up HPT (hashed page table) and RMA (real-mode area). 4885 * Must be called with kvm->arch.mmu_setup_lock held. 4886 */ 4887 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu) 4888 { 4889 int err = 0; 4890 struct kvm *kvm = vcpu->kvm; 4891 unsigned long hva; 4892 struct kvm_memory_slot *memslot; 4893 struct vm_area_struct *vma; 4894 unsigned long lpcr = 0, senc; 4895 unsigned long psize, porder; 4896 int srcu_idx; 4897 4898 /* Allocate hashed page table (if not done already) and reset it */ 4899 if (!kvm->arch.hpt.virt) { 4900 int order = KVM_DEFAULT_HPT_ORDER; 4901 struct kvm_hpt_info info; 4902 4903 err = kvmppc_allocate_hpt(&info, order); 4904 /* If we get here, it means userspace didn't specify a 4905 * size explicitly. So, try successively smaller 4906 * sizes if the default failed. */ 4907 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER) 4908 err = kvmppc_allocate_hpt(&info, order); 4909 4910 if (err < 0) { 4911 pr_err("KVM: Couldn't alloc HPT\n"); 4912 goto out; 4913 } 4914 4915 kvmppc_set_hpt(kvm, &info); 4916 } 4917 4918 /* Look up the memslot for guest physical address 0 */ 4919 srcu_idx = srcu_read_lock(&kvm->srcu); 4920 memslot = gfn_to_memslot(kvm, 0); 4921 4922 /* We must have some memory at 0 by now */ 4923 err = -EINVAL; 4924 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) 4925 goto out_srcu; 4926 4927 /* Look up the VMA for the start of this memory slot */ 4928 hva = memslot->userspace_addr; 4929 mmap_read_lock(kvm->mm); 4930 vma = vma_lookup(kvm->mm, hva); 4931 if (!vma || (vma->vm_flags & VM_IO)) 4932 goto up_out; 4933 4934 psize = vma_kernel_pagesize(vma); 4935 4936 mmap_read_unlock(kvm->mm); 4937 4938 /* We can handle 4k, 64k or 16M pages in the VRMA */ 4939 if (psize >= 0x1000000) 4940 psize = 0x1000000; 4941 else if (psize >= 0x10000) 4942 psize = 0x10000; 4943 else 4944 psize = 0x1000; 4945 porder = __ilog2(psize); 4946 4947 senc = slb_pgsize_encoding(psize); 4948 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T | 4949 (VRMA_VSID << SLB_VSID_SHIFT_1T); 4950 /* Create HPTEs in the hash page table for the VRMA */ 4951 kvmppc_map_vrma(vcpu, memslot, porder); 4952 4953 /* Update VRMASD field in the LPCR */ 4954 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 4955 /* the -4 is to account for senc values starting at 0x10 */ 4956 lpcr = senc << (LPCR_VRMASD_SH - 4); 4957 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD); 4958 } 4959 4960 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */ 4961 smp_wmb(); 4962 err = 0; 4963 out_srcu: 4964 srcu_read_unlock(&kvm->srcu, srcu_idx); 4965 out: 4966 return err; 4967 4968 up_out: 4969 mmap_read_unlock(kvm->mm); 4970 goto out_srcu; 4971 } 4972 4973 /* 4974 * Must be called with kvm->arch.mmu_setup_lock held and 4975 * mmu_ready = 0 and no vcpus running. 4976 */ 4977 int kvmppc_switch_mmu_to_hpt(struct kvm *kvm) 4978 { 4979 if (nesting_enabled(kvm)) 4980 kvmhv_release_all_nested(kvm); 4981 kvmppc_rmap_reset(kvm); 4982 kvm->arch.process_table = 0; 4983 /* Mutual exclusion with kvm_unmap_gfn_range etc. */ 4984 spin_lock(&kvm->mmu_lock); 4985 kvm->arch.radix = 0; 4986 spin_unlock(&kvm->mmu_lock); 4987 kvmppc_free_radix(kvm); 4988 kvmppc_update_lpcr(kvm, LPCR_VPM1, 4989 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 4990 return 0; 4991 } 4992 4993 /* 4994 * Must be called with kvm->arch.mmu_setup_lock held and 4995 * mmu_ready = 0 and no vcpus running. 4996 */ 4997 int kvmppc_switch_mmu_to_radix(struct kvm *kvm) 4998 { 4999 int err; 5000 5001 err = kvmppc_init_vm_radix(kvm); 5002 if (err) 5003 return err; 5004 kvmppc_rmap_reset(kvm); 5005 /* Mutual exclusion with kvm_unmap_gfn_range etc. */ 5006 spin_lock(&kvm->mmu_lock); 5007 kvm->arch.radix = 1; 5008 spin_unlock(&kvm->mmu_lock); 5009 kvmppc_free_hpt(&kvm->arch.hpt); 5010 kvmppc_update_lpcr(kvm, LPCR_UPRT | LPCR_GTSE | LPCR_HR, 5011 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 5012 return 0; 5013 } 5014 5015 #ifdef CONFIG_KVM_XICS 5016 /* 5017 * Allocate a per-core structure for managing state about which cores are 5018 * running in the host versus the guest and for exchanging data between 5019 * real mode KVM and CPU running in the host. 5020 * This is only done for the first VM. 5021 * The allocated structure stays even if all VMs have stopped. 5022 * It is only freed when the kvm-hv module is unloaded. 5023 * It's OK for this routine to fail, we just don't support host 5024 * core operations like redirecting H_IPI wakeups. 5025 */ 5026 void kvmppc_alloc_host_rm_ops(void) 5027 { 5028 struct kvmppc_host_rm_ops *ops; 5029 unsigned long l_ops; 5030 int cpu, core; 5031 int size; 5032 5033 /* Not the first time here ? */ 5034 if (kvmppc_host_rm_ops_hv != NULL) 5035 return; 5036 5037 ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL); 5038 if (!ops) 5039 return; 5040 5041 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core); 5042 ops->rm_core = kzalloc(size, GFP_KERNEL); 5043 5044 if (!ops->rm_core) { 5045 kfree(ops); 5046 return; 5047 } 5048 5049 cpus_read_lock(); 5050 5051 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) { 5052 if (!cpu_online(cpu)) 5053 continue; 5054 5055 core = cpu >> threads_shift; 5056 ops->rm_core[core].rm_state.in_host = 1; 5057 } 5058 5059 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv; 5060 5061 /* 5062 * Make the contents of the kvmppc_host_rm_ops structure visible 5063 * to other CPUs before we assign it to the global variable. 5064 * Do an atomic assignment (no locks used here), but if someone 5065 * beats us to it, just free our copy and return. 5066 */ 5067 smp_wmb(); 5068 l_ops = (unsigned long) ops; 5069 5070 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) { 5071 cpus_read_unlock(); 5072 kfree(ops->rm_core); 5073 kfree(ops); 5074 return; 5075 } 5076 5077 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE, 5078 "ppc/kvm_book3s:prepare", 5079 kvmppc_set_host_core, 5080 kvmppc_clear_host_core); 5081 cpus_read_unlock(); 5082 } 5083 5084 void kvmppc_free_host_rm_ops(void) 5085 { 5086 if (kvmppc_host_rm_ops_hv) { 5087 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE); 5088 kfree(kvmppc_host_rm_ops_hv->rm_core); 5089 kfree(kvmppc_host_rm_ops_hv); 5090 kvmppc_host_rm_ops_hv = NULL; 5091 } 5092 } 5093 #endif 5094 5095 static int kvmppc_core_init_vm_hv(struct kvm *kvm) 5096 { 5097 unsigned long lpcr, lpid; 5098 char buf[32]; 5099 int ret; 5100 5101 mutex_init(&kvm->arch.uvmem_lock); 5102 INIT_LIST_HEAD(&kvm->arch.uvmem_pfns); 5103 mutex_init(&kvm->arch.mmu_setup_lock); 5104 5105 /* Allocate the guest's logical partition ID */ 5106 5107 lpid = kvmppc_alloc_lpid(); 5108 if ((long)lpid < 0) 5109 return -ENOMEM; 5110 kvm->arch.lpid = lpid; 5111 5112 kvmppc_alloc_host_rm_ops(); 5113 5114 kvmhv_vm_nested_init(kvm); 5115 5116 /* 5117 * Since we don't flush the TLB when tearing down a VM, 5118 * and this lpid might have previously been used, 5119 * make sure we flush on each core before running the new VM. 5120 * On POWER9, the tlbie in mmu_partition_table_set_entry() 5121 * does this flush for us. 5122 */ 5123 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5124 cpumask_setall(&kvm->arch.need_tlb_flush); 5125 5126 /* Start out with the default set of hcalls enabled */ 5127 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls, 5128 sizeof(kvm->arch.enabled_hcalls)); 5129 5130 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5131 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1); 5132 5133 /* Init LPCR for virtual RMA mode */ 5134 if (cpu_has_feature(CPU_FTR_HVMODE)) { 5135 kvm->arch.host_lpid = mfspr(SPRN_LPID); 5136 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR); 5137 lpcr &= LPCR_PECE | LPCR_LPES; 5138 } else { 5139 lpcr = 0; 5140 } 5141 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE | 5142 LPCR_VPM0 | LPCR_VPM1; 5143 kvm->arch.vrma_slb_v = SLB_VSID_B_1T | 5144 (VRMA_VSID << SLB_VSID_SHIFT_1T); 5145 /* On POWER8 turn on online bit to enable PURR/SPURR */ 5146 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 5147 lpcr |= LPCR_ONL; 5148 /* 5149 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed) 5150 * Set HVICE bit to enable hypervisor virtualization interrupts. 5151 * Set HEIC to prevent OS interrupts to go to hypervisor (should 5152 * be unnecessary but better safe than sorry in case we re-enable 5153 * EE in HV mode with this LPCR still set) 5154 */ 5155 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5156 lpcr &= ~LPCR_VPM0; 5157 lpcr |= LPCR_HVICE | LPCR_HEIC; 5158 5159 /* 5160 * If xive is enabled, we route 0x500 interrupts directly 5161 * to the guest. 5162 */ 5163 if (xics_on_xive()) 5164 lpcr |= LPCR_LPES; 5165 } 5166 5167 /* 5168 * If the host uses radix, the guest starts out as radix. 5169 */ 5170 if (radix_enabled()) { 5171 kvm->arch.radix = 1; 5172 kvm->arch.mmu_ready = 1; 5173 lpcr &= ~LPCR_VPM1; 5174 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR; 5175 ret = kvmppc_init_vm_radix(kvm); 5176 if (ret) { 5177 kvmppc_free_lpid(kvm->arch.lpid); 5178 return ret; 5179 } 5180 kvmppc_setup_partition_table(kvm); 5181 } 5182 5183 verify_lpcr(kvm, lpcr); 5184 kvm->arch.lpcr = lpcr; 5185 5186 /* Initialization for future HPT resizes */ 5187 kvm->arch.resize_hpt = NULL; 5188 5189 /* 5190 * Work out how many sets the TLB has, for the use of 5191 * the TLB invalidation loop in book3s_hv_rmhandlers.S. 5192 */ 5193 if (cpu_has_feature(CPU_FTR_ARCH_31)) { 5194 /* 5195 * P10 will flush all the congruence class with a single tlbiel 5196 */ 5197 kvm->arch.tlb_sets = 1; 5198 } else if (radix_enabled()) 5199 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */ 5200 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 5201 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */ 5202 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 5203 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */ 5204 else 5205 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */ 5206 5207 /* 5208 * Track that we now have a HV mode VM active. This blocks secondary 5209 * CPU threads from coming online. 5210 */ 5211 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5212 kvm_hv_vm_activated(); 5213 5214 /* 5215 * Initialize smt_mode depending on processor. 5216 * POWER8 and earlier have to use "strict" threading, where 5217 * all vCPUs in a vcore have to run on the same (sub)core, 5218 * whereas on POWER9 the threads can each run a different 5219 * guest. 5220 */ 5221 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5222 kvm->arch.smt_mode = threads_per_subcore; 5223 else 5224 kvm->arch.smt_mode = 1; 5225 kvm->arch.emul_smt_mode = 1; 5226 5227 /* 5228 * Create a debugfs directory for the VM 5229 */ 5230 snprintf(buf, sizeof(buf), "vm%d", current->pid); 5231 kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir); 5232 kvmppc_mmu_debugfs_init(kvm); 5233 if (radix_enabled()) 5234 kvmhv_radix_debugfs_init(kvm); 5235 5236 return 0; 5237 } 5238 5239 static void kvmppc_free_vcores(struct kvm *kvm) 5240 { 5241 long int i; 5242 5243 for (i = 0; i < KVM_MAX_VCORES; ++i) 5244 kfree(kvm->arch.vcores[i]); 5245 kvm->arch.online_vcores = 0; 5246 } 5247 5248 static void kvmppc_core_destroy_vm_hv(struct kvm *kvm) 5249 { 5250 debugfs_remove_recursive(kvm->arch.debugfs_dir); 5251 5252 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5253 kvm_hv_vm_deactivated(); 5254 5255 kvmppc_free_vcores(kvm); 5256 5257 5258 if (kvm_is_radix(kvm)) 5259 kvmppc_free_radix(kvm); 5260 else 5261 kvmppc_free_hpt(&kvm->arch.hpt); 5262 5263 /* Perform global invalidation and return lpid to the pool */ 5264 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5265 if (nesting_enabled(kvm)) 5266 kvmhv_release_all_nested(kvm); 5267 kvm->arch.process_table = 0; 5268 if (kvm->arch.secure_guest) 5269 uv_svm_terminate(kvm->arch.lpid); 5270 kvmhv_set_ptbl_entry(kvm->arch.lpid, 0, 0); 5271 } 5272 5273 kvmppc_free_lpid(kvm->arch.lpid); 5274 5275 kvmppc_free_pimap(kvm); 5276 } 5277 5278 /* We don't need to emulate any privileged instructions or dcbz */ 5279 static int kvmppc_core_emulate_op_hv(struct kvm_vcpu *vcpu, 5280 unsigned int inst, int *advance) 5281 { 5282 return EMULATE_FAIL; 5283 } 5284 5285 static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn, 5286 ulong spr_val) 5287 { 5288 return EMULATE_FAIL; 5289 } 5290 5291 static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn, 5292 ulong *spr_val) 5293 { 5294 return EMULATE_FAIL; 5295 } 5296 5297 static int kvmppc_core_check_processor_compat_hv(void) 5298 { 5299 if (cpu_has_feature(CPU_FTR_HVMODE) && 5300 cpu_has_feature(CPU_FTR_ARCH_206)) 5301 return 0; 5302 5303 /* POWER9 in radix mode is capable of being a nested hypervisor. */ 5304 if (cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled()) 5305 return 0; 5306 5307 return -EIO; 5308 } 5309 5310 #ifdef CONFIG_KVM_XICS 5311 5312 void kvmppc_free_pimap(struct kvm *kvm) 5313 { 5314 kfree(kvm->arch.pimap); 5315 } 5316 5317 static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void) 5318 { 5319 return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL); 5320 } 5321 5322 static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5323 { 5324 struct irq_desc *desc; 5325 struct kvmppc_irq_map *irq_map; 5326 struct kvmppc_passthru_irqmap *pimap; 5327 struct irq_chip *chip; 5328 int i, rc = 0; 5329 5330 if (!kvm_irq_bypass) 5331 return 1; 5332 5333 desc = irq_to_desc(host_irq); 5334 if (!desc) 5335 return -EIO; 5336 5337 mutex_lock(&kvm->lock); 5338 5339 pimap = kvm->arch.pimap; 5340 if (pimap == NULL) { 5341 /* First call, allocate structure to hold IRQ map */ 5342 pimap = kvmppc_alloc_pimap(); 5343 if (pimap == NULL) { 5344 mutex_unlock(&kvm->lock); 5345 return -ENOMEM; 5346 } 5347 kvm->arch.pimap = pimap; 5348 } 5349 5350 /* 5351 * For now, we only support interrupts for which the EOI operation 5352 * is an OPAL call followed by a write to XIRR, since that's 5353 * what our real-mode EOI code does, or a XIVE interrupt 5354 */ 5355 chip = irq_data_get_irq_chip(&desc->irq_data); 5356 if (!chip || !(is_pnv_opal_msi(chip) || is_xive_irq(chip))) { 5357 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n", 5358 host_irq, guest_gsi); 5359 mutex_unlock(&kvm->lock); 5360 return -ENOENT; 5361 } 5362 5363 /* 5364 * See if we already have an entry for this guest IRQ number. 5365 * If it's mapped to a hardware IRQ number, that's an error, 5366 * otherwise re-use this entry. 5367 */ 5368 for (i = 0; i < pimap->n_mapped; i++) { 5369 if (guest_gsi == pimap->mapped[i].v_hwirq) { 5370 if (pimap->mapped[i].r_hwirq) { 5371 mutex_unlock(&kvm->lock); 5372 return -EINVAL; 5373 } 5374 break; 5375 } 5376 } 5377 5378 if (i == KVMPPC_PIRQ_MAPPED) { 5379 mutex_unlock(&kvm->lock); 5380 return -EAGAIN; /* table is full */ 5381 } 5382 5383 irq_map = &pimap->mapped[i]; 5384 5385 irq_map->v_hwirq = guest_gsi; 5386 irq_map->desc = desc; 5387 5388 /* 5389 * Order the above two stores before the next to serialize with 5390 * the KVM real mode handler. 5391 */ 5392 smp_wmb(); 5393 irq_map->r_hwirq = desc->irq_data.hwirq; 5394 5395 if (i == pimap->n_mapped) 5396 pimap->n_mapped++; 5397 5398 if (xics_on_xive()) 5399 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc); 5400 else 5401 kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq); 5402 if (rc) 5403 irq_map->r_hwirq = 0; 5404 5405 mutex_unlock(&kvm->lock); 5406 5407 return 0; 5408 } 5409 5410 static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5411 { 5412 struct irq_desc *desc; 5413 struct kvmppc_passthru_irqmap *pimap; 5414 int i, rc = 0; 5415 5416 if (!kvm_irq_bypass) 5417 return 0; 5418 5419 desc = irq_to_desc(host_irq); 5420 if (!desc) 5421 return -EIO; 5422 5423 mutex_lock(&kvm->lock); 5424 if (!kvm->arch.pimap) 5425 goto unlock; 5426 5427 pimap = kvm->arch.pimap; 5428 5429 for (i = 0; i < pimap->n_mapped; i++) { 5430 if (guest_gsi == pimap->mapped[i].v_hwirq) 5431 break; 5432 } 5433 5434 if (i == pimap->n_mapped) { 5435 mutex_unlock(&kvm->lock); 5436 return -ENODEV; 5437 } 5438 5439 if (xics_on_xive()) 5440 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, pimap->mapped[i].desc); 5441 else 5442 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq); 5443 5444 /* invalidate the entry (what do do on error from the above ?) */ 5445 pimap->mapped[i].r_hwirq = 0; 5446 5447 /* 5448 * We don't free this structure even when the count goes to 5449 * zero. The structure is freed when we destroy the VM. 5450 */ 5451 unlock: 5452 mutex_unlock(&kvm->lock); 5453 return rc; 5454 } 5455 5456 static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons, 5457 struct irq_bypass_producer *prod) 5458 { 5459 int ret = 0; 5460 struct kvm_kernel_irqfd *irqfd = 5461 container_of(cons, struct kvm_kernel_irqfd, consumer); 5462 5463 irqfd->producer = prod; 5464 5465 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5466 if (ret) 5467 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n", 5468 prod->irq, irqfd->gsi, ret); 5469 5470 return ret; 5471 } 5472 5473 static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons, 5474 struct irq_bypass_producer *prod) 5475 { 5476 int ret; 5477 struct kvm_kernel_irqfd *irqfd = 5478 container_of(cons, struct kvm_kernel_irqfd, consumer); 5479 5480 irqfd->producer = NULL; 5481 5482 /* 5483 * When producer of consumer is unregistered, we change back to 5484 * default external interrupt handling mode - KVM real mode 5485 * will switch back to host. 5486 */ 5487 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5488 if (ret) 5489 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n", 5490 prod->irq, irqfd->gsi, ret); 5491 } 5492 #endif 5493 5494 static long kvm_arch_vm_ioctl_hv(struct file *filp, 5495 unsigned int ioctl, unsigned long arg) 5496 { 5497 struct kvm *kvm __maybe_unused = filp->private_data; 5498 void __user *argp = (void __user *)arg; 5499 long r; 5500 5501 switch (ioctl) { 5502 5503 case KVM_PPC_ALLOCATE_HTAB: { 5504 u32 htab_order; 5505 5506 /* If we're a nested hypervisor, we currently only support radix */ 5507 if (kvmhv_on_pseries()) { 5508 r = -EOPNOTSUPP; 5509 break; 5510 } 5511 5512 r = -EFAULT; 5513 if (get_user(htab_order, (u32 __user *)argp)) 5514 break; 5515 r = kvmppc_alloc_reset_hpt(kvm, htab_order); 5516 if (r) 5517 break; 5518 r = 0; 5519 break; 5520 } 5521 5522 case KVM_PPC_GET_HTAB_FD: { 5523 struct kvm_get_htab_fd ghf; 5524 5525 r = -EFAULT; 5526 if (copy_from_user(&ghf, argp, sizeof(ghf))) 5527 break; 5528 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf); 5529 break; 5530 } 5531 5532 case KVM_PPC_RESIZE_HPT_PREPARE: { 5533 struct kvm_ppc_resize_hpt rhpt; 5534 5535 r = -EFAULT; 5536 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5537 break; 5538 5539 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt); 5540 break; 5541 } 5542 5543 case KVM_PPC_RESIZE_HPT_COMMIT: { 5544 struct kvm_ppc_resize_hpt rhpt; 5545 5546 r = -EFAULT; 5547 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5548 break; 5549 5550 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt); 5551 break; 5552 } 5553 5554 default: 5555 r = -ENOTTY; 5556 } 5557 5558 return r; 5559 } 5560 5561 /* 5562 * List of hcall numbers to enable by default. 5563 * For compatibility with old userspace, we enable by default 5564 * all hcalls that were implemented before the hcall-enabling 5565 * facility was added. Note this list should not include H_RTAS. 5566 */ 5567 static unsigned int default_hcall_list[] = { 5568 H_REMOVE, 5569 H_ENTER, 5570 H_READ, 5571 H_PROTECT, 5572 H_BULK_REMOVE, 5573 #ifdef CONFIG_SPAPR_TCE_IOMMU 5574 H_GET_TCE, 5575 H_PUT_TCE, 5576 #endif 5577 H_SET_DABR, 5578 H_SET_XDABR, 5579 H_CEDE, 5580 H_PROD, 5581 H_CONFER, 5582 H_REGISTER_VPA, 5583 #ifdef CONFIG_KVM_XICS 5584 H_EOI, 5585 H_CPPR, 5586 H_IPI, 5587 H_IPOLL, 5588 H_XIRR, 5589 H_XIRR_X, 5590 #endif 5591 0 5592 }; 5593 5594 static void init_default_hcalls(void) 5595 { 5596 int i; 5597 unsigned int hcall; 5598 5599 for (i = 0; default_hcall_list[i]; ++i) { 5600 hcall = default_hcall_list[i]; 5601 WARN_ON(!kvmppc_hcall_impl_hv(hcall)); 5602 __set_bit(hcall / 4, default_enabled_hcalls); 5603 } 5604 } 5605 5606 static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg) 5607 { 5608 unsigned long lpcr; 5609 int radix; 5610 int err; 5611 5612 /* If not on a POWER9, reject it */ 5613 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5614 return -ENODEV; 5615 5616 /* If any unknown flags set, reject it */ 5617 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE)) 5618 return -EINVAL; 5619 5620 /* GR (guest radix) bit in process_table field must match */ 5621 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX); 5622 if (!!(cfg->process_table & PATB_GR) != radix) 5623 return -EINVAL; 5624 5625 /* Process table size field must be reasonable, i.e. <= 24 */ 5626 if ((cfg->process_table & PRTS_MASK) > 24) 5627 return -EINVAL; 5628 5629 /* We can change a guest to/from radix now, if the host is radix */ 5630 if (radix && !radix_enabled()) 5631 return -EINVAL; 5632 5633 /* If we're a nested hypervisor, we currently only support radix */ 5634 if (kvmhv_on_pseries() && !radix) 5635 return -EINVAL; 5636 5637 mutex_lock(&kvm->arch.mmu_setup_lock); 5638 if (radix != kvm_is_radix(kvm)) { 5639 if (kvm->arch.mmu_ready) { 5640 kvm->arch.mmu_ready = 0; 5641 /* order mmu_ready vs. vcpus_running */ 5642 smp_mb(); 5643 if (atomic_read(&kvm->arch.vcpus_running)) { 5644 kvm->arch.mmu_ready = 1; 5645 err = -EBUSY; 5646 goto out_unlock; 5647 } 5648 } 5649 if (radix) 5650 err = kvmppc_switch_mmu_to_radix(kvm); 5651 else 5652 err = kvmppc_switch_mmu_to_hpt(kvm); 5653 if (err) 5654 goto out_unlock; 5655 } 5656 5657 kvm->arch.process_table = cfg->process_table; 5658 kvmppc_setup_partition_table(kvm); 5659 5660 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0; 5661 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE); 5662 err = 0; 5663 5664 out_unlock: 5665 mutex_unlock(&kvm->arch.mmu_setup_lock); 5666 return err; 5667 } 5668 5669 static int kvmhv_enable_nested(struct kvm *kvm) 5670 { 5671 if (!nested) 5672 return -EPERM; 5673 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5674 return -ENODEV; 5675 if (!radix_enabled()) 5676 return -ENODEV; 5677 5678 /* kvm == NULL means the caller is testing if the capability exists */ 5679 if (kvm) 5680 kvm->arch.nested_enable = true; 5681 return 0; 5682 } 5683 5684 static int kvmhv_load_from_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5685 int size) 5686 { 5687 int rc = -EINVAL; 5688 5689 if (kvmhv_vcpu_is_radix(vcpu)) { 5690 rc = kvmhv_copy_from_guest_radix(vcpu, *eaddr, ptr, size); 5691 5692 if (rc > 0) 5693 rc = -EINVAL; 5694 } 5695 5696 /* For now quadrants are the only way to access nested guest memory */ 5697 if (rc && vcpu->arch.nested) 5698 rc = -EAGAIN; 5699 5700 return rc; 5701 } 5702 5703 static int kvmhv_store_to_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5704 int size) 5705 { 5706 int rc = -EINVAL; 5707 5708 if (kvmhv_vcpu_is_radix(vcpu)) { 5709 rc = kvmhv_copy_to_guest_radix(vcpu, *eaddr, ptr, size); 5710 5711 if (rc > 0) 5712 rc = -EINVAL; 5713 } 5714 5715 /* For now quadrants are the only way to access nested guest memory */ 5716 if (rc && vcpu->arch.nested) 5717 rc = -EAGAIN; 5718 5719 return rc; 5720 } 5721 5722 static void unpin_vpa_reset(struct kvm *kvm, struct kvmppc_vpa *vpa) 5723 { 5724 unpin_vpa(kvm, vpa); 5725 vpa->gpa = 0; 5726 vpa->pinned_addr = NULL; 5727 vpa->dirty = false; 5728 vpa->update_pending = 0; 5729 } 5730 5731 /* 5732 * Enable a guest to become a secure VM, or test whether 5733 * that could be enabled. 5734 * Called when the KVM_CAP_PPC_SECURE_GUEST capability is 5735 * tested (kvm == NULL) or enabled (kvm != NULL). 5736 */ 5737 static int kvmhv_enable_svm(struct kvm *kvm) 5738 { 5739 if (!kvmppc_uvmem_available()) 5740 return -EINVAL; 5741 if (kvm) 5742 kvm->arch.svm_enabled = 1; 5743 return 0; 5744 } 5745 5746 /* 5747 * IOCTL handler to turn off secure mode of guest 5748 * 5749 * - Release all device pages 5750 * - Issue ucall to terminate the guest on the UV side 5751 * - Unpin the VPA pages. 5752 * - Reinit the partition scoped page tables 5753 */ 5754 static int kvmhv_svm_off(struct kvm *kvm) 5755 { 5756 struct kvm_vcpu *vcpu; 5757 int mmu_was_ready; 5758 int srcu_idx; 5759 int ret = 0; 5760 int i; 5761 5762 if (!(kvm->arch.secure_guest & KVMPPC_SECURE_INIT_START)) 5763 return ret; 5764 5765 mutex_lock(&kvm->arch.mmu_setup_lock); 5766 mmu_was_ready = kvm->arch.mmu_ready; 5767 if (kvm->arch.mmu_ready) { 5768 kvm->arch.mmu_ready = 0; 5769 /* order mmu_ready vs. vcpus_running */ 5770 smp_mb(); 5771 if (atomic_read(&kvm->arch.vcpus_running)) { 5772 kvm->arch.mmu_ready = 1; 5773 ret = -EBUSY; 5774 goto out; 5775 } 5776 } 5777 5778 srcu_idx = srcu_read_lock(&kvm->srcu); 5779 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5780 struct kvm_memory_slot *memslot; 5781 struct kvm_memslots *slots = __kvm_memslots(kvm, i); 5782 5783 if (!slots) 5784 continue; 5785 5786 kvm_for_each_memslot(memslot, slots) { 5787 kvmppc_uvmem_drop_pages(memslot, kvm, true); 5788 uv_unregister_mem_slot(kvm->arch.lpid, memslot->id); 5789 } 5790 } 5791 srcu_read_unlock(&kvm->srcu, srcu_idx); 5792 5793 ret = uv_svm_terminate(kvm->arch.lpid); 5794 if (ret != U_SUCCESS) { 5795 ret = -EINVAL; 5796 goto out; 5797 } 5798 5799 /* 5800 * When secure guest is reset, all the guest pages are sent 5801 * to UV via UV_PAGE_IN before the non-boot vcpus get a 5802 * chance to run and unpin their VPA pages. Unpinning of all 5803 * VPA pages is done here explicitly so that VPA pages 5804 * can be migrated to the secure side. 5805 * 5806 * This is required to for the secure SMP guest to reboot 5807 * correctly. 5808 */ 5809 kvm_for_each_vcpu(i, vcpu, kvm) { 5810 spin_lock(&vcpu->arch.vpa_update_lock); 5811 unpin_vpa_reset(kvm, &vcpu->arch.dtl); 5812 unpin_vpa_reset(kvm, &vcpu->arch.slb_shadow); 5813 unpin_vpa_reset(kvm, &vcpu->arch.vpa); 5814 spin_unlock(&vcpu->arch.vpa_update_lock); 5815 } 5816 5817 kvmppc_setup_partition_table(kvm); 5818 kvm->arch.secure_guest = 0; 5819 kvm->arch.mmu_ready = mmu_was_ready; 5820 out: 5821 mutex_unlock(&kvm->arch.mmu_setup_lock); 5822 return ret; 5823 } 5824 5825 static int kvmhv_enable_dawr1(struct kvm *kvm) 5826 { 5827 if (!cpu_has_feature(CPU_FTR_DAWR1)) 5828 return -ENODEV; 5829 5830 /* kvm == NULL means the caller is testing if the capability exists */ 5831 if (kvm) 5832 kvm->arch.dawr1_enabled = true; 5833 return 0; 5834 } 5835 5836 static bool kvmppc_hash_v3_possible(void) 5837 { 5838 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5839 return false; 5840 5841 if (!cpu_has_feature(CPU_FTR_HVMODE)) 5842 return false; 5843 5844 /* 5845 * POWER9 chips before version 2.02 can't have some threads in 5846 * HPT mode and some in radix mode on the same core. 5847 */ 5848 if (radix_enabled()) { 5849 unsigned int pvr = mfspr(SPRN_PVR); 5850 if ((pvr >> 16) == PVR_POWER9 && 5851 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) || 5852 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101))) 5853 return false; 5854 } 5855 5856 return true; 5857 } 5858 5859 static struct kvmppc_ops kvm_ops_hv = { 5860 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv, 5861 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv, 5862 .get_one_reg = kvmppc_get_one_reg_hv, 5863 .set_one_reg = kvmppc_set_one_reg_hv, 5864 .vcpu_load = kvmppc_core_vcpu_load_hv, 5865 .vcpu_put = kvmppc_core_vcpu_put_hv, 5866 .inject_interrupt = kvmppc_inject_interrupt_hv, 5867 .set_msr = kvmppc_set_msr_hv, 5868 .vcpu_run = kvmppc_vcpu_run_hv, 5869 .vcpu_create = kvmppc_core_vcpu_create_hv, 5870 .vcpu_free = kvmppc_core_vcpu_free_hv, 5871 .check_requests = kvmppc_core_check_requests_hv, 5872 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv, 5873 .flush_memslot = kvmppc_core_flush_memslot_hv, 5874 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv, 5875 .commit_memory_region = kvmppc_core_commit_memory_region_hv, 5876 .unmap_gfn_range = kvm_unmap_gfn_range_hv, 5877 .age_gfn = kvm_age_gfn_hv, 5878 .test_age_gfn = kvm_test_age_gfn_hv, 5879 .set_spte_gfn = kvm_set_spte_gfn_hv, 5880 .free_memslot = kvmppc_core_free_memslot_hv, 5881 .init_vm = kvmppc_core_init_vm_hv, 5882 .destroy_vm = kvmppc_core_destroy_vm_hv, 5883 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv, 5884 .emulate_op = kvmppc_core_emulate_op_hv, 5885 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv, 5886 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv, 5887 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv, 5888 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv, 5889 .hcall_implemented = kvmppc_hcall_impl_hv, 5890 #ifdef CONFIG_KVM_XICS 5891 .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv, 5892 .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv, 5893 #endif 5894 .configure_mmu = kvmhv_configure_mmu, 5895 .get_rmmu_info = kvmhv_get_rmmu_info, 5896 .set_smt_mode = kvmhv_set_smt_mode, 5897 .enable_nested = kvmhv_enable_nested, 5898 .load_from_eaddr = kvmhv_load_from_eaddr, 5899 .store_to_eaddr = kvmhv_store_to_eaddr, 5900 .enable_svm = kvmhv_enable_svm, 5901 .svm_off = kvmhv_svm_off, 5902 .enable_dawr1 = kvmhv_enable_dawr1, 5903 .hash_v3_possible = kvmppc_hash_v3_possible, 5904 }; 5905 5906 static int kvm_init_subcore_bitmap(void) 5907 { 5908 int i, j; 5909 int nr_cores = cpu_nr_cores(); 5910 struct sibling_subcore_state *sibling_subcore_state; 5911 5912 for (i = 0; i < nr_cores; i++) { 5913 int first_cpu = i * threads_per_core; 5914 int node = cpu_to_node(first_cpu); 5915 5916 /* Ignore if it is already allocated. */ 5917 if (paca_ptrs[first_cpu]->sibling_subcore_state) 5918 continue; 5919 5920 sibling_subcore_state = 5921 kzalloc_node(sizeof(struct sibling_subcore_state), 5922 GFP_KERNEL, node); 5923 if (!sibling_subcore_state) 5924 return -ENOMEM; 5925 5926 5927 for (j = 0; j < threads_per_core; j++) { 5928 int cpu = first_cpu + j; 5929 5930 paca_ptrs[cpu]->sibling_subcore_state = 5931 sibling_subcore_state; 5932 } 5933 } 5934 return 0; 5935 } 5936 5937 static int kvmppc_radix_possible(void) 5938 { 5939 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled(); 5940 } 5941 5942 static int kvmppc_book3s_init_hv(void) 5943 { 5944 int r; 5945 5946 if (!tlbie_capable) { 5947 pr_err("KVM-HV: Host does not support TLBIE\n"); 5948 return -ENODEV; 5949 } 5950 5951 /* 5952 * FIXME!! Do we need to check on all cpus ? 5953 */ 5954 r = kvmppc_core_check_processor_compat_hv(); 5955 if (r < 0) 5956 return -ENODEV; 5957 5958 r = kvmhv_nested_init(); 5959 if (r) 5960 return r; 5961 5962 r = kvm_init_subcore_bitmap(); 5963 if (r) 5964 return r; 5965 5966 /* 5967 * We need a way of accessing the XICS interrupt controller, 5968 * either directly, via paca_ptrs[cpu]->kvm_hstate.xics_phys, or 5969 * indirectly, via OPAL. 5970 */ 5971 #ifdef CONFIG_SMP 5972 if (!xics_on_xive() && !kvmhv_on_pseries() && 5973 !local_paca->kvm_hstate.xics_phys) { 5974 struct device_node *np; 5975 5976 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc"); 5977 if (!np) { 5978 pr_err("KVM-HV: Cannot determine method for accessing XICS\n"); 5979 return -ENODEV; 5980 } 5981 /* presence of intc confirmed - node can be dropped again */ 5982 of_node_put(np); 5983 } 5984 #endif 5985 5986 kvm_ops_hv.owner = THIS_MODULE; 5987 kvmppc_hv_ops = &kvm_ops_hv; 5988 5989 init_default_hcalls(); 5990 5991 init_vcore_lists(); 5992 5993 r = kvmppc_mmu_hv_init(); 5994 if (r) 5995 return r; 5996 5997 if (kvmppc_radix_possible()) 5998 r = kvmppc_radix_init(); 5999 6000 r = kvmppc_uvmem_init(); 6001 if (r < 0) 6002 pr_err("KVM-HV: kvmppc_uvmem_init failed %d\n", r); 6003 6004 return r; 6005 } 6006 6007 static void kvmppc_book3s_exit_hv(void) 6008 { 6009 kvmppc_uvmem_free(); 6010 kvmppc_free_host_rm_ops(); 6011 if (kvmppc_radix_possible()) 6012 kvmppc_radix_exit(); 6013 kvmppc_hv_ops = NULL; 6014 kvmhv_nested_exit(); 6015 } 6016 6017 module_init(kvmppc_book3s_init_hv); 6018 module_exit(kvmppc_book3s_exit_hv); 6019 MODULE_LICENSE("GPL"); 6020 MODULE_ALIAS_MISCDEV(KVM_MINOR); 6021 MODULE_ALIAS("devname:kvm"); 6022