1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 4 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 5 * 6 * Authors: 7 * Paul Mackerras <paulus@au1.ibm.com> 8 * Alexander Graf <agraf@suse.de> 9 * Kevin Wolf <mail@kevin-wolf.de> 10 * 11 * Description: KVM functions specific to running on Book 3S 12 * processors in hypervisor mode (specifically POWER7 and later). 13 * 14 * This file is derived from arch/powerpc/kvm/book3s.c, 15 * by Alexander Graf <agraf@suse.de>. 16 */ 17 18 #include <linux/kvm_host.h> 19 #include <linux/kernel.h> 20 #include <linux/err.h> 21 #include <linux/slab.h> 22 #include <linux/preempt.h> 23 #include <linux/sched/signal.h> 24 #include <linux/sched/stat.h> 25 #include <linux/delay.h> 26 #include <linux/export.h> 27 #include <linux/fs.h> 28 #include <linux/anon_inodes.h> 29 #include <linux/cpu.h> 30 #include <linux/cpumask.h> 31 #include <linux/spinlock.h> 32 #include <linux/page-flags.h> 33 #include <linux/srcu.h> 34 #include <linux/miscdevice.h> 35 #include <linux/debugfs.h> 36 #include <linux/gfp.h> 37 #include <linux/vmalloc.h> 38 #include <linux/highmem.h> 39 #include <linux/hugetlb.h> 40 #include <linux/kvm_irqfd.h> 41 #include <linux/irqbypass.h> 42 #include <linux/module.h> 43 #include <linux/compiler.h> 44 #include <linux/of.h> 45 46 #include <asm/ftrace.h> 47 #include <asm/reg.h> 48 #include <asm/ppc-opcode.h> 49 #include <asm/asm-prototypes.h> 50 #include <asm/archrandom.h> 51 #include <asm/debug.h> 52 #include <asm/disassemble.h> 53 #include <asm/cputable.h> 54 #include <asm/cacheflush.h> 55 #include <linux/uaccess.h> 56 #include <asm/interrupt.h> 57 #include <asm/io.h> 58 #include <asm/kvm_ppc.h> 59 #include <asm/kvm_book3s.h> 60 #include <asm/mmu_context.h> 61 #include <asm/lppaca.h> 62 #include <asm/pmc.h> 63 #include <asm/processor.h> 64 #include <asm/cputhreads.h> 65 #include <asm/page.h> 66 #include <asm/hvcall.h> 67 #include <asm/switch_to.h> 68 #include <asm/smp.h> 69 #include <asm/dbell.h> 70 #include <asm/hmi.h> 71 #include <asm/pnv-pci.h> 72 #include <asm/mmu.h> 73 #include <asm/opal.h> 74 #include <asm/xics.h> 75 #include <asm/xive.h> 76 #include <asm/hw_breakpoint.h> 77 #include <asm/kvm_book3s_uvmem.h> 78 #include <asm/ultravisor.h> 79 #include <asm/dtl.h> 80 #include <asm/plpar_wrappers.h> 81 82 #include "book3s.h" 83 #include "book3s_hv.h" 84 85 #define CREATE_TRACE_POINTS 86 #include "trace_hv.h" 87 88 /* #define EXIT_DEBUG */ 89 /* #define EXIT_DEBUG_SIMPLE */ 90 /* #define EXIT_DEBUG_INT */ 91 92 /* Used to indicate that a guest page fault needs to be handled */ 93 #define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1) 94 /* Used to indicate that a guest passthrough interrupt needs to be handled */ 95 #define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2) 96 97 /* Used as a "null" value for timebase values */ 98 #define TB_NIL (~(u64)0) 99 100 static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1); 101 102 static int dynamic_mt_modes = 6; 103 module_param(dynamic_mt_modes, int, 0644); 104 MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)"); 105 static int target_smt_mode; 106 module_param(target_smt_mode, int, 0644); 107 MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)"); 108 109 static bool one_vm_per_core; 110 module_param(one_vm_per_core, bool, S_IRUGO | S_IWUSR); 111 MODULE_PARM_DESC(one_vm_per_core, "Only run vCPUs from the same VM on a core (requires POWER8 or older)"); 112 113 #ifdef CONFIG_KVM_XICS 114 static const struct kernel_param_ops module_param_ops = { 115 .set = param_set_int, 116 .get = param_get_int, 117 }; 118 119 module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644); 120 MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization"); 121 122 module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644); 123 MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core"); 124 #endif 125 126 /* If set, guests are allowed to create and control nested guests */ 127 static bool nested = true; 128 module_param(nested, bool, S_IRUGO | S_IWUSR); 129 MODULE_PARM_DESC(nested, "Enable nested virtualization (only on POWER9)"); 130 131 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu); 132 133 /* 134 * RWMR values for POWER8. These control the rate at which PURR 135 * and SPURR count and should be set according to the number of 136 * online threads in the vcore being run. 137 */ 138 #define RWMR_RPA_P8_1THREAD 0x164520C62609AECAUL 139 #define RWMR_RPA_P8_2THREAD 0x7FFF2908450D8DA9UL 140 #define RWMR_RPA_P8_3THREAD 0x164520C62609AECAUL 141 #define RWMR_RPA_P8_4THREAD 0x199A421245058DA9UL 142 #define RWMR_RPA_P8_5THREAD 0x164520C62609AECAUL 143 #define RWMR_RPA_P8_6THREAD 0x164520C62609AECAUL 144 #define RWMR_RPA_P8_7THREAD 0x164520C62609AECAUL 145 #define RWMR_RPA_P8_8THREAD 0x164520C62609AECAUL 146 147 static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = { 148 RWMR_RPA_P8_1THREAD, 149 RWMR_RPA_P8_1THREAD, 150 RWMR_RPA_P8_2THREAD, 151 RWMR_RPA_P8_3THREAD, 152 RWMR_RPA_P8_4THREAD, 153 RWMR_RPA_P8_5THREAD, 154 RWMR_RPA_P8_6THREAD, 155 RWMR_RPA_P8_7THREAD, 156 RWMR_RPA_P8_8THREAD, 157 }; 158 159 static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc, 160 int *ip) 161 { 162 int i = *ip; 163 struct kvm_vcpu *vcpu; 164 165 while (++i < MAX_SMT_THREADS) { 166 vcpu = READ_ONCE(vc->runnable_threads[i]); 167 if (vcpu) { 168 *ip = i; 169 return vcpu; 170 } 171 } 172 return NULL; 173 } 174 175 /* Used to traverse the list of runnable threads for a given vcore */ 176 #define for_each_runnable_thread(i, vcpu, vc) \ 177 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); ) 178 179 static bool kvmppc_ipi_thread(int cpu) 180 { 181 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 182 183 /* If we're a nested hypervisor, fall back to ordinary IPIs for now */ 184 if (kvmhv_on_pseries()) 185 return false; 186 187 /* On POWER9 we can use msgsnd to IPI any cpu */ 188 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 189 msg |= get_hard_smp_processor_id(cpu); 190 smp_mb(); 191 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 192 return true; 193 } 194 195 /* On POWER8 for IPIs to threads in the same core, use msgsnd */ 196 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 197 preempt_disable(); 198 if (cpu_first_thread_sibling(cpu) == 199 cpu_first_thread_sibling(smp_processor_id())) { 200 msg |= cpu_thread_in_core(cpu); 201 smp_mb(); 202 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 203 preempt_enable(); 204 return true; 205 } 206 preempt_enable(); 207 } 208 209 #if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP) 210 if (cpu >= 0 && cpu < nr_cpu_ids) { 211 if (paca_ptrs[cpu]->kvm_hstate.xics_phys) { 212 xics_wake_cpu(cpu); 213 return true; 214 } 215 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY); 216 return true; 217 } 218 #endif 219 220 return false; 221 } 222 223 static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu) 224 { 225 int cpu; 226 struct rcuwait *waitp; 227 228 waitp = kvm_arch_vcpu_get_wait(vcpu); 229 if (rcuwait_wake_up(waitp)) 230 ++vcpu->stat.generic.halt_wakeup; 231 232 cpu = READ_ONCE(vcpu->arch.thread_cpu); 233 if (cpu >= 0 && kvmppc_ipi_thread(cpu)) 234 return; 235 236 /* CPU points to the first thread of the core */ 237 cpu = vcpu->cpu; 238 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu)) 239 smp_send_reschedule(cpu); 240 } 241 242 /* 243 * We use the vcpu_load/put functions to measure stolen time. 244 * Stolen time is counted as time when either the vcpu is able to 245 * run as part of a virtual core, but the task running the vcore 246 * is preempted or sleeping, or when the vcpu needs something done 247 * in the kernel by the task running the vcpu, but that task is 248 * preempted or sleeping. Those two things have to be counted 249 * separately, since one of the vcpu tasks will take on the job 250 * of running the core, and the other vcpu tasks in the vcore will 251 * sleep waiting for it to do that, but that sleep shouldn't count 252 * as stolen time. 253 * 254 * Hence we accumulate stolen time when the vcpu can run as part of 255 * a vcore using vc->stolen_tb, and the stolen time when the vcpu 256 * needs its task to do other things in the kernel (for example, 257 * service a page fault) in busy_stolen. We don't accumulate 258 * stolen time for a vcore when it is inactive, or for a vcpu 259 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of 260 * a misnomer; it means that the vcpu task is not executing in 261 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in 262 * the kernel. We don't have any way of dividing up that time 263 * between time that the vcpu is genuinely stopped, time that 264 * the task is actively working on behalf of the vcpu, and time 265 * that the task is preempted, so we don't count any of it as 266 * stolen. 267 * 268 * Updates to busy_stolen are protected by arch.tbacct_lock; 269 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock 270 * lock. The stolen times are measured in units of timebase ticks. 271 * (Note that the != TB_NIL checks below are purely defensive; 272 * they should never fail.) 273 */ 274 275 static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc, u64 tb) 276 { 277 unsigned long flags; 278 279 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 280 281 spin_lock_irqsave(&vc->stoltb_lock, flags); 282 vc->preempt_tb = tb; 283 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 284 } 285 286 static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc, u64 tb) 287 { 288 unsigned long flags; 289 290 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 291 292 spin_lock_irqsave(&vc->stoltb_lock, flags); 293 if (vc->preempt_tb != TB_NIL) { 294 vc->stolen_tb += tb - vc->preempt_tb; 295 vc->preempt_tb = TB_NIL; 296 } 297 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 298 } 299 300 static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu) 301 { 302 struct kvmppc_vcore *vc = vcpu->arch.vcore; 303 unsigned long flags; 304 u64 now; 305 306 if (cpu_has_feature(CPU_FTR_ARCH_300)) 307 return; 308 309 now = mftb(); 310 311 /* 312 * We can test vc->runner without taking the vcore lock, 313 * because only this task ever sets vc->runner to this 314 * vcpu, and once it is set to this vcpu, only this task 315 * ever sets it to NULL. 316 */ 317 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 318 kvmppc_core_end_stolen(vc, now); 319 320 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 321 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST && 322 vcpu->arch.busy_preempt != TB_NIL) { 323 vcpu->arch.busy_stolen += now - vcpu->arch.busy_preempt; 324 vcpu->arch.busy_preempt = TB_NIL; 325 } 326 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 327 } 328 329 static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu) 330 { 331 struct kvmppc_vcore *vc = vcpu->arch.vcore; 332 unsigned long flags; 333 u64 now; 334 335 if (cpu_has_feature(CPU_FTR_ARCH_300)) 336 return; 337 338 now = mftb(); 339 340 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 341 kvmppc_core_start_stolen(vc, now); 342 343 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 344 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST) 345 vcpu->arch.busy_preempt = now; 346 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 347 } 348 349 static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr) 350 { 351 vcpu->arch.pvr = pvr; 352 } 353 354 /* Dummy value used in computing PCR value below */ 355 #define PCR_ARCH_31 (PCR_ARCH_300 << 1) 356 357 static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat) 358 { 359 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0; 360 struct kvmppc_vcore *vc = vcpu->arch.vcore; 361 362 /* We can (emulate) our own architecture version and anything older */ 363 if (cpu_has_feature(CPU_FTR_ARCH_31)) 364 host_pcr_bit = PCR_ARCH_31; 365 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 366 host_pcr_bit = PCR_ARCH_300; 367 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 368 host_pcr_bit = PCR_ARCH_207; 369 else if (cpu_has_feature(CPU_FTR_ARCH_206)) 370 host_pcr_bit = PCR_ARCH_206; 371 else 372 host_pcr_bit = PCR_ARCH_205; 373 374 /* Determine lowest PCR bit needed to run guest in given PVR level */ 375 guest_pcr_bit = host_pcr_bit; 376 if (arch_compat) { 377 switch (arch_compat) { 378 case PVR_ARCH_205: 379 guest_pcr_bit = PCR_ARCH_205; 380 break; 381 case PVR_ARCH_206: 382 case PVR_ARCH_206p: 383 guest_pcr_bit = PCR_ARCH_206; 384 break; 385 case PVR_ARCH_207: 386 guest_pcr_bit = PCR_ARCH_207; 387 break; 388 case PVR_ARCH_300: 389 guest_pcr_bit = PCR_ARCH_300; 390 break; 391 case PVR_ARCH_31: 392 guest_pcr_bit = PCR_ARCH_31; 393 break; 394 default: 395 return -EINVAL; 396 } 397 } 398 399 /* Check requested PCR bits don't exceed our capabilities */ 400 if (guest_pcr_bit > host_pcr_bit) 401 return -EINVAL; 402 403 spin_lock(&vc->lock); 404 vc->arch_compat = arch_compat; 405 /* 406 * Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit 407 * Also set all reserved PCR bits 408 */ 409 vc->pcr = (host_pcr_bit - guest_pcr_bit) | PCR_MASK; 410 spin_unlock(&vc->lock); 411 412 return 0; 413 } 414 415 static void kvmppc_dump_regs(struct kvm_vcpu *vcpu) 416 { 417 int r; 418 419 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id); 420 pr_err("pc = %.16lx msr = %.16llx trap = %x\n", 421 vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap); 422 for (r = 0; r < 16; ++r) 423 pr_err("r%2d = %.16lx r%d = %.16lx\n", 424 r, kvmppc_get_gpr(vcpu, r), 425 r+16, kvmppc_get_gpr(vcpu, r+16)); 426 pr_err("ctr = %.16lx lr = %.16lx\n", 427 vcpu->arch.regs.ctr, vcpu->arch.regs.link); 428 pr_err("srr0 = %.16llx srr1 = %.16llx\n", 429 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1); 430 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n", 431 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1); 432 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n", 433 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3); 434 pr_err("cr = %.8lx xer = %.16lx dsisr = %.8x\n", 435 vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr); 436 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar); 437 pr_err("fault dar = %.16lx dsisr = %.8x\n", 438 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 439 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max); 440 for (r = 0; r < vcpu->arch.slb_max; ++r) 441 pr_err(" ESID = %.16llx VSID = %.16llx\n", 442 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv); 443 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n", 444 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1, 445 vcpu->arch.last_inst); 446 } 447 448 static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id) 449 { 450 return kvm_get_vcpu_by_id(kvm, id); 451 } 452 453 static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa) 454 { 455 vpa->__old_status |= LPPACA_OLD_SHARED_PROC; 456 vpa->yield_count = cpu_to_be32(1); 457 } 458 459 static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v, 460 unsigned long addr, unsigned long len) 461 { 462 /* check address is cacheline aligned */ 463 if (addr & (L1_CACHE_BYTES - 1)) 464 return -EINVAL; 465 spin_lock(&vcpu->arch.vpa_update_lock); 466 if (v->next_gpa != addr || v->len != len) { 467 v->next_gpa = addr; 468 v->len = addr ? len : 0; 469 v->update_pending = 1; 470 } 471 spin_unlock(&vcpu->arch.vpa_update_lock); 472 return 0; 473 } 474 475 /* Length for a per-processor buffer is passed in at offset 4 in the buffer */ 476 struct reg_vpa { 477 u32 dummy; 478 union { 479 __be16 hword; 480 __be32 word; 481 } length; 482 }; 483 484 static int vpa_is_registered(struct kvmppc_vpa *vpap) 485 { 486 if (vpap->update_pending) 487 return vpap->next_gpa != 0; 488 return vpap->pinned_addr != NULL; 489 } 490 491 static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu, 492 unsigned long flags, 493 unsigned long vcpuid, unsigned long vpa) 494 { 495 struct kvm *kvm = vcpu->kvm; 496 unsigned long len, nb; 497 void *va; 498 struct kvm_vcpu *tvcpu; 499 int err; 500 int subfunc; 501 struct kvmppc_vpa *vpap; 502 503 tvcpu = kvmppc_find_vcpu(kvm, vcpuid); 504 if (!tvcpu) 505 return H_PARAMETER; 506 507 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK; 508 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL || 509 subfunc == H_VPA_REG_SLB) { 510 /* Registering new area - address must be cache-line aligned */ 511 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa) 512 return H_PARAMETER; 513 514 /* convert logical addr to kernel addr and read length */ 515 va = kvmppc_pin_guest_page(kvm, vpa, &nb); 516 if (va == NULL) 517 return H_PARAMETER; 518 if (subfunc == H_VPA_REG_VPA) 519 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword); 520 else 521 len = be32_to_cpu(((struct reg_vpa *)va)->length.word); 522 kvmppc_unpin_guest_page(kvm, va, vpa, false); 523 524 /* Check length */ 525 if (len > nb || len < sizeof(struct reg_vpa)) 526 return H_PARAMETER; 527 } else { 528 vpa = 0; 529 len = 0; 530 } 531 532 err = H_PARAMETER; 533 vpap = NULL; 534 spin_lock(&tvcpu->arch.vpa_update_lock); 535 536 switch (subfunc) { 537 case H_VPA_REG_VPA: /* register VPA */ 538 /* 539 * The size of our lppaca is 1kB because of the way we align 540 * it for the guest to avoid crossing a 4kB boundary. We only 541 * use 640 bytes of the structure though, so we should accept 542 * clients that set a size of 640. 543 */ 544 BUILD_BUG_ON(sizeof(struct lppaca) != 640); 545 if (len < sizeof(struct lppaca)) 546 break; 547 vpap = &tvcpu->arch.vpa; 548 err = 0; 549 break; 550 551 case H_VPA_REG_DTL: /* register DTL */ 552 if (len < sizeof(struct dtl_entry)) 553 break; 554 len -= len % sizeof(struct dtl_entry); 555 556 /* Check that they have previously registered a VPA */ 557 err = H_RESOURCE; 558 if (!vpa_is_registered(&tvcpu->arch.vpa)) 559 break; 560 561 vpap = &tvcpu->arch.dtl; 562 err = 0; 563 break; 564 565 case H_VPA_REG_SLB: /* register SLB shadow buffer */ 566 /* Check that they have previously registered a VPA */ 567 err = H_RESOURCE; 568 if (!vpa_is_registered(&tvcpu->arch.vpa)) 569 break; 570 571 vpap = &tvcpu->arch.slb_shadow; 572 err = 0; 573 break; 574 575 case H_VPA_DEREG_VPA: /* deregister VPA */ 576 /* Check they don't still have a DTL or SLB buf registered */ 577 err = H_RESOURCE; 578 if (vpa_is_registered(&tvcpu->arch.dtl) || 579 vpa_is_registered(&tvcpu->arch.slb_shadow)) 580 break; 581 582 vpap = &tvcpu->arch.vpa; 583 err = 0; 584 break; 585 586 case H_VPA_DEREG_DTL: /* deregister DTL */ 587 vpap = &tvcpu->arch.dtl; 588 err = 0; 589 break; 590 591 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */ 592 vpap = &tvcpu->arch.slb_shadow; 593 err = 0; 594 break; 595 } 596 597 if (vpap) { 598 vpap->next_gpa = vpa; 599 vpap->len = len; 600 vpap->update_pending = 1; 601 } 602 603 spin_unlock(&tvcpu->arch.vpa_update_lock); 604 605 return err; 606 } 607 608 static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap) 609 { 610 struct kvm *kvm = vcpu->kvm; 611 void *va; 612 unsigned long nb; 613 unsigned long gpa; 614 615 /* 616 * We need to pin the page pointed to by vpap->next_gpa, 617 * but we can't call kvmppc_pin_guest_page under the lock 618 * as it does get_user_pages() and down_read(). So we 619 * have to drop the lock, pin the page, then get the lock 620 * again and check that a new area didn't get registered 621 * in the meantime. 622 */ 623 for (;;) { 624 gpa = vpap->next_gpa; 625 spin_unlock(&vcpu->arch.vpa_update_lock); 626 va = NULL; 627 nb = 0; 628 if (gpa) 629 va = kvmppc_pin_guest_page(kvm, gpa, &nb); 630 spin_lock(&vcpu->arch.vpa_update_lock); 631 if (gpa == vpap->next_gpa) 632 break; 633 /* sigh... unpin that one and try again */ 634 if (va) 635 kvmppc_unpin_guest_page(kvm, va, gpa, false); 636 } 637 638 vpap->update_pending = 0; 639 if (va && nb < vpap->len) { 640 /* 641 * If it's now too short, it must be that userspace 642 * has changed the mappings underlying guest memory, 643 * so unregister the region. 644 */ 645 kvmppc_unpin_guest_page(kvm, va, gpa, false); 646 va = NULL; 647 } 648 if (vpap->pinned_addr) 649 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa, 650 vpap->dirty); 651 vpap->gpa = gpa; 652 vpap->pinned_addr = va; 653 vpap->dirty = false; 654 if (va) 655 vpap->pinned_end = va + vpap->len; 656 } 657 658 static void kvmppc_update_vpas(struct kvm_vcpu *vcpu) 659 { 660 if (!(vcpu->arch.vpa.update_pending || 661 vcpu->arch.slb_shadow.update_pending || 662 vcpu->arch.dtl.update_pending)) 663 return; 664 665 spin_lock(&vcpu->arch.vpa_update_lock); 666 if (vcpu->arch.vpa.update_pending) { 667 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa); 668 if (vcpu->arch.vpa.pinned_addr) 669 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr); 670 } 671 if (vcpu->arch.dtl.update_pending) { 672 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl); 673 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr; 674 vcpu->arch.dtl_index = 0; 675 } 676 if (vcpu->arch.slb_shadow.update_pending) 677 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow); 678 spin_unlock(&vcpu->arch.vpa_update_lock); 679 } 680 681 /* 682 * Return the accumulated stolen time for the vcore up until `now'. 683 * The caller should hold the vcore lock. 684 */ 685 static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now) 686 { 687 u64 p; 688 unsigned long flags; 689 690 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 691 692 spin_lock_irqsave(&vc->stoltb_lock, flags); 693 p = vc->stolen_tb; 694 if (vc->vcore_state != VCORE_INACTIVE && 695 vc->preempt_tb != TB_NIL) 696 p += now - vc->preempt_tb; 697 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 698 return p; 699 } 700 701 static void __kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu, 702 unsigned int pcpu, u64 now, 703 unsigned long stolen) 704 { 705 struct dtl_entry *dt; 706 struct lppaca *vpa; 707 708 dt = vcpu->arch.dtl_ptr; 709 vpa = vcpu->arch.vpa.pinned_addr; 710 711 if (!dt || !vpa) 712 return; 713 714 dt->dispatch_reason = 7; 715 dt->preempt_reason = 0; 716 dt->processor_id = cpu_to_be16(pcpu + vcpu->arch.ptid); 717 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen); 718 dt->ready_to_enqueue_time = 0; 719 dt->waiting_to_ready_time = 0; 720 dt->timebase = cpu_to_be64(now); 721 dt->fault_addr = 0; 722 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu)); 723 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr); 724 725 ++dt; 726 if (dt == vcpu->arch.dtl.pinned_end) 727 dt = vcpu->arch.dtl.pinned_addr; 728 vcpu->arch.dtl_ptr = dt; 729 /* order writing *dt vs. writing vpa->dtl_idx */ 730 smp_wmb(); 731 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index); 732 vcpu->arch.dtl.dirty = true; 733 } 734 735 static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu, 736 struct kvmppc_vcore *vc) 737 { 738 unsigned long stolen; 739 unsigned long core_stolen; 740 u64 now; 741 unsigned long flags; 742 743 now = mftb(); 744 745 core_stolen = vcore_stolen_time(vc, now); 746 stolen = core_stolen - vcpu->arch.stolen_logged; 747 vcpu->arch.stolen_logged = core_stolen; 748 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 749 stolen += vcpu->arch.busy_stolen; 750 vcpu->arch.busy_stolen = 0; 751 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 752 753 __kvmppc_create_dtl_entry(vcpu, vc->pcpu, now + vc->tb_offset, stolen); 754 } 755 756 /* See if there is a doorbell interrupt pending for a vcpu */ 757 static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu) 758 { 759 int thr; 760 struct kvmppc_vcore *vc; 761 762 if (vcpu->arch.doorbell_request) 763 return true; 764 /* 765 * Ensure that the read of vcore->dpdes comes after the read 766 * of vcpu->doorbell_request. This barrier matches the 767 * smp_wmb() in kvmppc_guest_entry_inject(). 768 */ 769 smp_rmb(); 770 vc = vcpu->arch.vcore; 771 thr = vcpu->vcpu_id - vc->first_vcpuid; 772 return !!(vc->dpdes & (1 << thr)); 773 } 774 775 static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu) 776 { 777 if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207) 778 return true; 779 if ((!vcpu->arch.vcore->arch_compat) && 780 cpu_has_feature(CPU_FTR_ARCH_207S)) 781 return true; 782 return false; 783 } 784 785 static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags, 786 unsigned long resource, unsigned long value1, 787 unsigned long value2) 788 { 789 switch (resource) { 790 case H_SET_MODE_RESOURCE_SET_CIABR: 791 if (!kvmppc_power8_compatible(vcpu)) 792 return H_P2; 793 if (value2) 794 return H_P4; 795 if (mflags) 796 return H_UNSUPPORTED_FLAG_START; 797 /* Guests can't breakpoint the hypervisor */ 798 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER) 799 return H_P3; 800 vcpu->arch.ciabr = value1; 801 return H_SUCCESS; 802 case H_SET_MODE_RESOURCE_SET_DAWR0: 803 if (!kvmppc_power8_compatible(vcpu)) 804 return H_P2; 805 if (!ppc_breakpoint_available()) 806 return H_P2; 807 if (mflags) 808 return H_UNSUPPORTED_FLAG_START; 809 if (value2 & DABRX_HYP) 810 return H_P4; 811 vcpu->arch.dawr0 = value1; 812 vcpu->arch.dawrx0 = value2; 813 return H_SUCCESS; 814 case H_SET_MODE_RESOURCE_SET_DAWR1: 815 if (!kvmppc_power8_compatible(vcpu)) 816 return H_P2; 817 if (!ppc_breakpoint_available()) 818 return H_P2; 819 if (!cpu_has_feature(CPU_FTR_DAWR1)) 820 return H_P2; 821 if (!vcpu->kvm->arch.dawr1_enabled) 822 return H_FUNCTION; 823 if (mflags) 824 return H_UNSUPPORTED_FLAG_START; 825 if (value2 & DABRX_HYP) 826 return H_P4; 827 vcpu->arch.dawr1 = value1; 828 vcpu->arch.dawrx1 = value2; 829 return H_SUCCESS; 830 case H_SET_MODE_RESOURCE_ADDR_TRANS_MODE: 831 /* 832 * KVM does not support mflags=2 (AIL=2) and AIL=1 is reserved. 833 * Keep this in synch with kvmppc_filter_guest_lpcr_hv. 834 */ 835 if (cpu_has_feature(CPU_FTR_P9_RADIX_PREFETCH_BUG) && 836 kvmhv_vcpu_is_radix(vcpu) && mflags == 3) 837 return H_UNSUPPORTED_FLAG_START; 838 return H_TOO_HARD; 839 default: 840 return H_TOO_HARD; 841 } 842 } 843 844 /* Copy guest memory in place - must reside within a single memslot */ 845 static int kvmppc_copy_guest(struct kvm *kvm, gpa_t to, gpa_t from, 846 unsigned long len) 847 { 848 struct kvm_memory_slot *to_memslot = NULL; 849 struct kvm_memory_slot *from_memslot = NULL; 850 unsigned long to_addr, from_addr; 851 int r; 852 853 /* Get HPA for from address */ 854 from_memslot = gfn_to_memslot(kvm, from >> PAGE_SHIFT); 855 if (!from_memslot) 856 return -EFAULT; 857 if ((from + len) >= ((from_memslot->base_gfn + from_memslot->npages) 858 << PAGE_SHIFT)) 859 return -EINVAL; 860 from_addr = gfn_to_hva_memslot(from_memslot, from >> PAGE_SHIFT); 861 if (kvm_is_error_hva(from_addr)) 862 return -EFAULT; 863 from_addr |= (from & (PAGE_SIZE - 1)); 864 865 /* Get HPA for to address */ 866 to_memslot = gfn_to_memslot(kvm, to >> PAGE_SHIFT); 867 if (!to_memslot) 868 return -EFAULT; 869 if ((to + len) >= ((to_memslot->base_gfn + to_memslot->npages) 870 << PAGE_SHIFT)) 871 return -EINVAL; 872 to_addr = gfn_to_hva_memslot(to_memslot, to >> PAGE_SHIFT); 873 if (kvm_is_error_hva(to_addr)) 874 return -EFAULT; 875 to_addr |= (to & (PAGE_SIZE - 1)); 876 877 /* Perform copy */ 878 r = raw_copy_in_user((void __user *)to_addr, (void __user *)from_addr, 879 len); 880 if (r) 881 return -EFAULT; 882 mark_page_dirty(kvm, to >> PAGE_SHIFT); 883 return 0; 884 } 885 886 static long kvmppc_h_page_init(struct kvm_vcpu *vcpu, unsigned long flags, 887 unsigned long dest, unsigned long src) 888 { 889 u64 pg_sz = SZ_4K; /* 4K page size */ 890 u64 pg_mask = SZ_4K - 1; 891 int ret; 892 893 /* Check for invalid flags (H_PAGE_SET_LOANED covers all CMO flags) */ 894 if (flags & ~(H_ICACHE_INVALIDATE | H_ICACHE_SYNCHRONIZE | 895 H_ZERO_PAGE | H_COPY_PAGE | H_PAGE_SET_LOANED)) 896 return H_PARAMETER; 897 898 /* dest (and src if copy_page flag set) must be page aligned */ 899 if ((dest & pg_mask) || ((flags & H_COPY_PAGE) && (src & pg_mask))) 900 return H_PARAMETER; 901 902 /* zero and/or copy the page as determined by the flags */ 903 if (flags & H_COPY_PAGE) { 904 ret = kvmppc_copy_guest(vcpu->kvm, dest, src, pg_sz); 905 if (ret < 0) 906 return H_PARAMETER; 907 } else if (flags & H_ZERO_PAGE) { 908 ret = kvm_clear_guest(vcpu->kvm, dest, pg_sz); 909 if (ret < 0) 910 return H_PARAMETER; 911 } 912 913 /* We can ignore the remaining flags */ 914 915 return H_SUCCESS; 916 } 917 918 static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target) 919 { 920 struct kvmppc_vcore *vcore = target->arch.vcore; 921 922 /* 923 * We expect to have been called by the real mode handler 924 * (kvmppc_rm_h_confer()) which would have directly returned 925 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may 926 * have useful work to do and should not confer) so we don't 927 * recheck that here. 928 * 929 * In the case of the P9 single vcpu per vcore case, the real 930 * mode handler is not called but no other threads are in the 931 * source vcore. 932 */ 933 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 934 spin_lock(&vcore->lock); 935 if (target->arch.state == KVMPPC_VCPU_RUNNABLE && 936 vcore->vcore_state != VCORE_INACTIVE && 937 vcore->runner) 938 target = vcore->runner; 939 spin_unlock(&vcore->lock); 940 } 941 942 return kvm_vcpu_yield_to(target); 943 } 944 945 static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu) 946 { 947 int yield_count = 0; 948 struct lppaca *lppaca; 949 950 spin_lock(&vcpu->arch.vpa_update_lock); 951 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr; 952 if (lppaca) 953 yield_count = be32_to_cpu(lppaca->yield_count); 954 spin_unlock(&vcpu->arch.vpa_update_lock); 955 return yield_count; 956 } 957 958 /* 959 * H_RPT_INVALIDATE hcall handler for nested guests. 960 * 961 * Handles only nested process-scoped invalidation requests in L0. 962 */ 963 static int kvmppc_nested_h_rpt_invalidate(struct kvm_vcpu *vcpu) 964 { 965 unsigned long type = kvmppc_get_gpr(vcpu, 6); 966 unsigned long pid, pg_sizes, start, end; 967 968 /* 969 * The partition-scoped invalidations aren't handled here in L0. 970 */ 971 if (type & H_RPTI_TYPE_NESTED) 972 return RESUME_HOST; 973 974 pid = kvmppc_get_gpr(vcpu, 4); 975 pg_sizes = kvmppc_get_gpr(vcpu, 7); 976 start = kvmppc_get_gpr(vcpu, 8); 977 end = kvmppc_get_gpr(vcpu, 9); 978 979 do_h_rpt_invalidate_prt(pid, vcpu->arch.nested->shadow_lpid, 980 type, pg_sizes, start, end); 981 982 kvmppc_set_gpr(vcpu, 3, H_SUCCESS); 983 return RESUME_GUEST; 984 } 985 986 static long kvmppc_h_rpt_invalidate(struct kvm_vcpu *vcpu, 987 unsigned long id, unsigned long target, 988 unsigned long type, unsigned long pg_sizes, 989 unsigned long start, unsigned long end) 990 { 991 if (!kvm_is_radix(vcpu->kvm)) 992 return H_UNSUPPORTED; 993 994 if (end < start) 995 return H_P5; 996 997 /* 998 * Partition-scoped invalidation for nested guests. 999 */ 1000 if (type & H_RPTI_TYPE_NESTED) { 1001 if (!nesting_enabled(vcpu->kvm)) 1002 return H_FUNCTION; 1003 1004 /* Support only cores as target */ 1005 if (target != H_RPTI_TARGET_CMMU) 1006 return H_P2; 1007 1008 return do_h_rpt_invalidate_pat(vcpu, id, type, pg_sizes, 1009 start, end); 1010 } 1011 1012 /* 1013 * Process-scoped invalidation for L1 guests. 1014 */ 1015 do_h_rpt_invalidate_prt(id, vcpu->kvm->arch.lpid, 1016 type, pg_sizes, start, end); 1017 return H_SUCCESS; 1018 } 1019 1020 int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu) 1021 { 1022 struct kvm *kvm = vcpu->kvm; 1023 unsigned long req = kvmppc_get_gpr(vcpu, 3); 1024 unsigned long target, ret = H_SUCCESS; 1025 int yield_count; 1026 struct kvm_vcpu *tvcpu; 1027 int idx, rc; 1028 1029 if (req <= MAX_HCALL_OPCODE && 1030 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls)) 1031 return RESUME_HOST; 1032 1033 switch (req) { 1034 case H_REMOVE: 1035 ret = kvmppc_h_remove(vcpu, kvmppc_get_gpr(vcpu, 4), 1036 kvmppc_get_gpr(vcpu, 5), 1037 kvmppc_get_gpr(vcpu, 6)); 1038 if (ret == H_TOO_HARD) 1039 return RESUME_HOST; 1040 break; 1041 case H_ENTER: 1042 ret = kvmppc_h_enter(vcpu, kvmppc_get_gpr(vcpu, 4), 1043 kvmppc_get_gpr(vcpu, 5), 1044 kvmppc_get_gpr(vcpu, 6), 1045 kvmppc_get_gpr(vcpu, 7)); 1046 if (ret == H_TOO_HARD) 1047 return RESUME_HOST; 1048 break; 1049 case H_READ: 1050 ret = kvmppc_h_read(vcpu, kvmppc_get_gpr(vcpu, 4), 1051 kvmppc_get_gpr(vcpu, 5)); 1052 if (ret == H_TOO_HARD) 1053 return RESUME_HOST; 1054 break; 1055 case H_CLEAR_MOD: 1056 ret = kvmppc_h_clear_mod(vcpu, kvmppc_get_gpr(vcpu, 4), 1057 kvmppc_get_gpr(vcpu, 5)); 1058 if (ret == H_TOO_HARD) 1059 return RESUME_HOST; 1060 break; 1061 case H_CLEAR_REF: 1062 ret = kvmppc_h_clear_ref(vcpu, kvmppc_get_gpr(vcpu, 4), 1063 kvmppc_get_gpr(vcpu, 5)); 1064 if (ret == H_TOO_HARD) 1065 return RESUME_HOST; 1066 break; 1067 case H_PROTECT: 1068 ret = kvmppc_h_protect(vcpu, kvmppc_get_gpr(vcpu, 4), 1069 kvmppc_get_gpr(vcpu, 5), 1070 kvmppc_get_gpr(vcpu, 6)); 1071 if (ret == H_TOO_HARD) 1072 return RESUME_HOST; 1073 break; 1074 case H_BULK_REMOVE: 1075 ret = kvmppc_h_bulk_remove(vcpu); 1076 if (ret == H_TOO_HARD) 1077 return RESUME_HOST; 1078 break; 1079 1080 case H_CEDE: 1081 break; 1082 case H_PROD: 1083 target = kvmppc_get_gpr(vcpu, 4); 1084 tvcpu = kvmppc_find_vcpu(kvm, target); 1085 if (!tvcpu) { 1086 ret = H_PARAMETER; 1087 break; 1088 } 1089 tvcpu->arch.prodded = 1; 1090 smp_mb(); 1091 if (tvcpu->arch.ceded) 1092 kvmppc_fast_vcpu_kick_hv(tvcpu); 1093 break; 1094 case H_CONFER: 1095 target = kvmppc_get_gpr(vcpu, 4); 1096 if (target == -1) 1097 break; 1098 tvcpu = kvmppc_find_vcpu(kvm, target); 1099 if (!tvcpu) { 1100 ret = H_PARAMETER; 1101 break; 1102 } 1103 yield_count = kvmppc_get_gpr(vcpu, 5); 1104 if (kvmppc_get_yield_count(tvcpu) != yield_count) 1105 break; 1106 kvm_arch_vcpu_yield_to(tvcpu); 1107 break; 1108 case H_REGISTER_VPA: 1109 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4), 1110 kvmppc_get_gpr(vcpu, 5), 1111 kvmppc_get_gpr(vcpu, 6)); 1112 break; 1113 case H_RTAS: 1114 if (list_empty(&kvm->arch.rtas_tokens)) 1115 return RESUME_HOST; 1116 1117 idx = srcu_read_lock(&kvm->srcu); 1118 rc = kvmppc_rtas_hcall(vcpu); 1119 srcu_read_unlock(&kvm->srcu, idx); 1120 1121 if (rc == -ENOENT) 1122 return RESUME_HOST; 1123 else if (rc == 0) 1124 break; 1125 1126 /* Send the error out to userspace via KVM_RUN */ 1127 return rc; 1128 case H_LOGICAL_CI_LOAD: 1129 ret = kvmppc_h_logical_ci_load(vcpu); 1130 if (ret == H_TOO_HARD) 1131 return RESUME_HOST; 1132 break; 1133 case H_LOGICAL_CI_STORE: 1134 ret = kvmppc_h_logical_ci_store(vcpu); 1135 if (ret == H_TOO_HARD) 1136 return RESUME_HOST; 1137 break; 1138 case H_SET_MODE: 1139 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4), 1140 kvmppc_get_gpr(vcpu, 5), 1141 kvmppc_get_gpr(vcpu, 6), 1142 kvmppc_get_gpr(vcpu, 7)); 1143 if (ret == H_TOO_HARD) 1144 return RESUME_HOST; 1145 break; 1146 case H_XIRR: 1147 case H_CPPR: 1148 case H_EOI: 1149 case H_IPI: 1150 case H_IPOLL: 1151 case H_XIRR_X: 1152 if (kvmppc_xics_enabled(vcpu)) { 1153 if (xics_on_xive()) { 1154 ret = H_NOT_AVAILABLE; 1155 return RESUME_GUEST; 1156 } 1157 ret = kvmppc_xics_hcall(vcpu, req); 1158 break; 1159 } 1160 return RESUME_HOST; 1161 case H_SET_DABR: 1162 ret = kvmppc_h_set_dabr(vcpu, kvmppc_get_gpr(vcpu, 4)); 1163 break; 1164 case H_SET_XDABR: 1165 ret = kvmppc_h_set_xdabr(vcpu, kvmppc_get_gpr(vcpu, 4), 1166 kvmppc_get_gpr(vcpu, 5)); 1167 break; 1168 #ifdef CONFIG_SPAPR_TCE_IOMMU 1169 case H_GET_TCE: 1170 ret = kvmppc_h_get_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1171 kvmppc_get_gpr(vcpu, 5)); 1172 if (ret == H_TOO_HARD) 1173 return RESUME_HOST; 1174 break; 1175 case H_PUT_TCE: 1176 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1177 kvmppc_get_gpr(vcpu, 5), 1178 kvmppc_get_gpr(vcpu, 6)); 1179 if (ret == H_TOO_HARD) 1180 return RESUME_HOST; 1181 break; 1182 case H_PUT_TCE_INDIRECT: 1183 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4), 1184 kvmppc_get_gpr(vcpu, 5), 1185 kvmppc_get_gpr(vcpu, 6), 1186 kvmppc_get_gpr(vcpu, 7)); 1187 if (ret == H_TOO_HARD) 1188 return RESUME_HOST; 1189 break; 1190 case H_STUFF_TCE: 1191 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1192 kvmppc_get_gpr(vcpu, 5), 1193 kvmppc_get_gpr(vcpu, 6), 1194 kvmppc_get_gpr(vcpu, 7)); 1195 if (ret == H_TOO_HARD) 1196 return RESUME_HOST; 1197 break; 1198 #endif 1199 case H_RANDOM: 1200 if (!arch_get_random_seed_long(&vcpu->arch.regs.gpr[4])) 1201 ret = H_HARDWARE; 1202 break; 1203 case H_RPT_INVALIDATE: 1204 ret = kvmppc_h_rpt_invalidate(vcpu, kvmppc_get_gpr(vcpu, 4), 1205 kvmppc_get_gpr(vcpu, 5), 1206 kvmppc_get_gpr(vcpu, 6), 1207 kvmppc_get_gpr(vcpu, 7), 1208 kvmppc_get_gpr(vcpu, 8), 1209 kvmppc_get_gpr(vcpu, 9)); 1210 break; 1211 1212 case H_SET_PARTITION_TABLE: 1213 ret = H_FUNCTION; 1214 if (nesting_enabled(kvm)) 1215 ret = kvmhv_set_partition_table(vcpu); 1216 break; 1217 case H_ENTER_NESTED: 1218 ret = H_FUNCTION; 1219 if (!nesting_enabled(kvm)) 1220 break; 1221 ret = kvmhv_enter_nested_guest(vcpu); 1222 if (ret == H_INTERRUPT) { 1223 kvmppc_set_gpr(vcpu, 3, 0); 1224 vcpu->arch.hcall_needed = 0; 1225 return -EINTR; 1226 } else if (ret == H_TOO_HARD) { 1227 kvmppc_set_gpr(vcpu, 3, 0); 1228 vcpu->arch.hcall_needed = 0; 1229 return RESUME_HOST; 1230 } 1231 break; 1232 case H_TLB_INVALIDATE: 1233 ret = H_FUNCTION; 1234 if (nesting_enabled(kvm)) 1235 ret = kvmhv_do_nested_tlbie(vcpu); 1236 break; 1237 case H_COPY_TOFROM_GUEST: 1238 ret = H_FUNCTION; 1239 if (nesting_enabled(kvm)) 1240 ret = kvmhv_copy_tofrom_guest_nested(vcpu); 1241 break; 1242 case H_PAGE_INIT: 1243 ret = kvmppc_h_page_init(vcpu, kvmppc_get_gpr(vcpu, 4), 1244 kvmppc_get_gpr(vcpu, 5), 1245 kvmppc_get_gpr(vcpu, 6)); 1246 break; 1247 case H_SVM_PAGE_IN: 1248 ret = H_UNSUPPORTED; 1249 if (kvmppc_get_srr1(vcpu) & MSR_S) 1250 ret = kvmppc_h_svm_page_in(kvm, 1251 kvmppc_get_gpr(vcpu, 4), 1252 kvmppc_get_gpr(vcpu, 5), 1253 kvmppc_get_gpr(vcpu, 6)); 1254 break; 1255 case H_SVM_PAGE_OUT: 1256 ret = H_UNSUPPORTED; 1257 if (kvmppc_get_srr1(vcpu) & MSR_S) 1258 ret = kvmppc_h_svm_page_out(kvm, 1259 kvmppc_get_gpr(vcpu, 4), 1260 kvmppc_get_gpr(vcpu, 5), 1261 kvmppc_get_gpr(vcpu, 6)); 1262 break; 1263 case H_SVM_INIT_START: 1264 ret = H_UNSUPPORTED; 1265 if (kvmppc_get_srr1(vcpu) & MSR_S) 1266 ret = kvmppc_h_svm_init_start(kvm); 1267 break; 1268 case H_SVM_INIT_DONE: 1269 ret = H_UNSUPPORTED; 1270 if (kvmppc_get_srr1(vcpu) & MSR_S) 1271 ret = kvmppc_h_svm_init_done(kvm); 1272 break; 1273 case H_SVM_INIT_ABORT: 1274 /* 1275 * Even if that call is made by the Ultravisor, the SSR1 value 1276 * is the guest context one, with the secure bit clear as it has 1277 * not yet been secured. So we can't check it here. 1278 * Instead the kvm->arch.secure_guest flag is checked inside 1279 * kvmppc_h_svm_init_abort(). 1280 */ 1281 ret = kvmppc_h_svm_init_abort(kvm); 1282 break; 1283 1284 default: 1285 return RESUME_HOST; 1286 } 1287 WARN_ON_ONCE(ret == H_TOO_HARD); 1288 kvmppc_set_gpr(vcpu, 3, ret); 1289 vcpu->arch.hcall_needed = 0; 1290 return RESUME_GUEST; 1291 } 1292 1293 /* 1294 * Handle H_CEDE in the P9 path where we don't call the real-mode hcall 1295 * handlers in book3s_hv_rmhandlers.S. 1296 * 1297 * This has to be done early, not in kvmppc_pseries_do_hcall(), so 1298 * that the cede logic in kvmppc_run_single_vcpu() works properly. 1299 */ 1300 static void kvmppc_cede(struct kvm_vcpu *vcpu) 1301 { 1302 vcpu->arch.shregs.msr |= MSR_EE; 1303 vcpu->arch.ceded = 1; 1304 smp_mb(); 1305 if (vcpu->arch.prodded) { 1306 vcpu->arch.prodded = 0; 1307 smp_mb(); 1308 vcpu->arch.ceded = 0; 1309 } 1310 } 1311 1312 static int kvmppc_hcall_impl_hv(unsigned long cmd) 1313 { 1314 switch (cmd) { 1315 case H_CEDE: 1316 case H_PROD: 1317 case H_CONFER: 1318 case H_REGISTER_VPA: 1319 case H_SET_MODE: 1320 case H_LOGICAL_CI_LOAD: 1321 case H_LOGICAL_CI_STORE: 1322 #ifdef CONFIG_KVM_XICS 1323 case H_XIRR: 1324 case H_CPPR: 1325 case H_EOI: 1326 case H_IPI: 1327 case H_IPOLL: 1328 case H_XIRR_X: 1329 #endif 1330 case H_PAGE_INIT: 1331 case H_RPT_INVALIDATE: 1332 return 1; 1333 } 1334 1335 /* See if it's in the real-mode table */ 1336 return kvmppc_hcall_impl_hv_realmode(cmd); 1337 } 1338 1339 static int kvmppc_emulate_debug_inst(struct kvm_vcpu *vcpu) 1340 { 1341 u32 last_inst; 1342 1343 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) != 1344 EMULATE_DONE) { 1345 /* 1346 * Fetch failed, so return to guest and 1347 * try executing it again. 1348 */ 1349 return RESUME_GUEST; 1350 } 1351 1352 if (last_inst == KVMPPC_INST_SW_BREAKPOINT) { 1353 vcpu->run->exit_reason = KVM_EXIT_DEBUG; 1354 vcpu->run->debug.arch.address = kvmppc_get_pc(vcpu); 1355 return RESUME_HOST; 1356 } else { 1357 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1358 return RESUME_GUEST; 1359 } 1360 } 1361 1362 static void do_nothing(void *x) 1363 { 1364 } 1365 1366 static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu) 1367 { 1368 int thr, cpu, pcpu, nthreads; 1369 struct kvm_vcpu *v; 1370 unsigned long dpdes; 1371 1372 nthreads = vcpu->kvm->arch.emul_smt_mode; 1373 dpdes = 0; 1374 cpu = vcpu->vcpu_id & ~(nthreads - 1); 1375 for (thr = 0; thr < nthreads; ++thr, ++cpu) { 1376 v = kvmppc_find_vcpu(vcpu->kvm, cpu); 1377 if (!v) 1378 continue; 1379 /* 1380 * If the vcpu is currently running on a physical cpu thread, 1381 * interrupt it in order to pull it out of the guest briefly, 1382 * which will update its vcore->dpdes value. 1383 */ 1384 pcpu = READ_ONCE(v->cpu); 1385 if (pcpu >= 0) 1386 smp_call_function_single(pcpu, do_nothing, NULL, 1); 1387 if (kvmppc_doorbell_pending(v)) 1388 dpdes |= 1 << thr; 1389 } 1390 return dpdes; 1391 } 1392 1393 /* 1394 * On POWER9, emulate doorbell-related instructions in order to 1395 * give the guest the illusion of running on a multi-threaded core. 1396 * The instructions emulated are msgsndp, msgclrp, mfspr TIR, 1397 * and mfspr DPDES. 1398 */ 1399 static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu) 1400 { 1401 u32 inst, rb, thr; 1402 unsigned long arg; 1403 struct kvm *kvm = vcpu->kvm; 1404 struct kvm_vcpu *tvcpu; 1405 1406 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE) 1407 return RESUME_GUEST; 1408 if (get_op(inst) != 31) 1409 return EMULATE_FAIL; 1410 rb = get_rb(inst); 1411 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1); 1412 switch (get_xop(inst)) { 1413 case OP_31_XOP_MSGSNDP: 1414 arg = kvmppc_get_gpr(vcpu, rb); 1415 if (((arg >> 27) & 0x1f) != PPC_DBELL_SERVER) 1416 break; 1417 arg &= 0x7f; 1418 if (arg >= kvm->arch.emul_smt_mode) 1419 break; 1420 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg); 1421 if (!tvcpu) 1422 break; 1423 if (!tvcpu->arch.doorbell_request) { 1424 tvcpu->arch.doorbell_request = 1; 1425 kvmppc_fast_vcpu_kick_hv(tvcpu); 1426 } 1427 break; 1428 case OP_31_XOP_MSGCLRP: 1429 arg = kvmppc_get_gpr(vcpu, rb); 1430 if (((arg >> 27) & 0x1f) != PPC_DBELL_SERVER) 1431 break; 1432 vcpu->arch.vcore->dpdes = 0; 1433 vcpu->arch.doorbell_request = 0; 1434 break; 1435 case OP_31_XOP_MFSPR: 1436 switch (get_sprn(inst)) { 1437 case SPRN_TIR: 1438 arg = thr; 1439 break; 1440 case SPRN_DPDES: 1441 arg = kvmppc_read_dpdes(vcpu); 1442 break; 1443 default: 1444 return EMULATE_FAIL; 1445 } 1446 kvmppc_set_gpr(vcpu, get_rt(inst), arg); 1447 break; 1448 default: 1449 return EMULATE_FAIL; 1450 } 1451 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4); 1452 return RESUME_GUEST; 1453 } 1454 1455 /* 1456 * If the lppaca had pmcregs_in_use clear when we exited the guest, then 1457 * HFSCR_PM is cleared for next entry. If the guest then tries to access 1458 * the PMU SPRs, we get this facility unavailable interrupt. Putting HFSCR_PM 1459 * back in the guest HFSCR will cause the next entry to load the PMU SPRs and 1460 * allow the guest access to continue. 1461 */ 1462 static int kvmppc_pmu_unavailable(struct kvm_vcpu *vcpu) 1463 { 1464 if (!(vcpu->arch.hfscr_permitted & HFSCR_PM)) 1465 return EMULATE_FAIL; 1466 1467 vcpu->arch.hfscr |= HFSCR_PM; 1468 1469 return RESUME_GUEST; 1470 } 1471 1472 static int kvmppc_ebb_unavailable(struct kvm_vcpu *vcpu) 1473 { 1474 if (!(vcpu->arch.hfscr_permitted & HFSCR_EBB)) 1475 return EMULATE_FAIL; 1476 1477 vcpu->arch.hfscr |= HFSCR_EBB; 1478 1479 return RESUME_GUEST; 1480 } 1481 1482 static int kvmppc_tm_unavailable(struct kvm_vcpu *vcpu) 1483 { 1484 if (!(vcpu->arch.hfscr_permitted & HFSCR_TM)) 1485 return EMULATE_FAIL; 1486 1487 vcpu->arch.hfscr |= HFSCR_TM; 1488 1489 return RESUME_GUEST; 1490 } 1491 1492 static int kvmppc_handle_exit_hv(struct kvm_vcpu *vcpu, 1493 struct task_struct *tsk) 1494 { 1495 struct kvm_run *run = vcpu->run; 1496 int r = RESUME_HOST; 1497 1498 vcpu->stat.sum_exits++; 1499 1500 /* 1501 * This can happen if an interrupt occurs in the last stages 1502 * of guest entry or the first stages of guest exit (i.e. after 1503 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1504 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1505 * That can happen due to a bug, or due to a machine check 1506 * occurring at just the wrong time. 1507 */ 1508 if (vcpu->arch.shregs.msr & MSR_HV) { 1509 printk(KERN_EMERG "KVM trap in HV mode!\n"); 1510 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1511 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1512 vcpu->arch.shregs.msr); 1513 kvmppc_dump_regs(vcpu); 1514 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1515 run->hw.hardware_exit_reason = vcpu->arch.trap; 1516 return RESUME_HOST; 1517 } 1518 run->exit_reason = KVM_EXIT_UNKNOWN; 1519 run->ready_for_interrupt_injection = 1; 1520 switch (vcpu->arch.trap) { 1521 /* We're good on these - the host merely wanted to get our attention */ 1522 case BOOK3S_INTERRUPT_NESTED_HV_DECREMENTER: 1523 WARN_ON_ONCE(1); /* Should never happen */ 1524 vcpu->arch.trap = BOOK3S_INTERRUPT_HV_DECREMENTER; 1525 fallthrough; 1526 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1527 vcpu->stat.dec_exits++; 1528 r = RESUME_GUEST; 1529 break; 1530 case BOOK3S_INTERRUPT_EXTERNAL: 1531 case BOOK3S_INTERRUPT_H_DOORBELL: 1532 case BOOK3S_INTERRUPT_H_VIRT: 1533 vcpu->stat.ext_intr_exits++; 1534 r = RESUME_GUEST; 1535 break; 1536 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1537 case BOOK3S_INTERRUPT_HMI: 1538 case BOOK3S_INTERRUPT_PERFMON: 1539 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1540 r = RESUME_GUEST; 1541 break; 1542 case BOOK3S_INTERRUPT_MACHINE_CHECK: { 1543 static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, 1544 DEFAULT_RATELIMIT_BURST); 1545 /* 1546 * Print the MCE event to host console. Ratelimit so the guest 1547 * can't flood the host log. 1548 */ 1549 if (__ratelimit(&rs)) 1550 machine_check_print_event_info(&vcpu->arch.mce_evt,false, true); 1551 1552 /* 1553 * If the guest can do FWNMI, exit to userspace so it can 1554 * deliver a FWNMI to the guest. 1555 * Otherwise we synthesize a machine check for the guest 1556 * so that it knows that the machine check occurred. 1557 */ 1558 if (!vcpu->kvm->arch.fwnmi_enabled) { 1559 ulong flags = vcpu->arch.shregs.msr & 0x083c0000; 1560 kvmppc_core_queue_machine_check(vcpu, flags); 1561 r = RESUME_GUEST; 1562 break; 1563 } 1564 1565 /* Exit to guest with KVM_EXIT_NMI as exit reason */ 1566 run->exit_reason = KVM_EXIT_NMI; 1567 run->hw.hardware_exit_reason = vcpu->arch.trap; 1568 /* Clear out the old NMI status from run->flags */ 1569 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK; 1570 /* Now set the NMI status */ 1571 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED) 1572 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV; 1573 else 1574 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV; 1575 1576 r = RESUME_HOST; 1577 break; 1578 } 1579 case BOOK3S_INTERRUPT_PROGRAM: 1580 { 1581 ulong flags; 1582 /* 1583 * Normally program interrupts are delivered directly 1584 * to the guest by the hardware, but we can get here 1585 * as a result of a hypervisor emulation interrupt 1586 * (e40) getting turned into a 700 by BML RTAS. 1587 */ 1588 flags = vcpu->arch.shregs.msr & 0x1f0000ull; 1589 kvmppc_core_queue_program(vcpu, flags); 1590 r = RESUME_GUEST; 1591 break; 1592 } 1593 case BOOK3S_INTERRUPT_SYSCALL: 1594 { 1595 int i; 1596 1597 if (unlikely(vcpu->arch.shregs.msr & MSR_PR)) { 1598 /* 1599 * Guest userspace executed sc 1. This can only be 1600 * reached by the P9 path because the old path 1601 * handles this case in realmode hcall handlers. 1602 */ 1603 if (!kvmhv_vcpu_is_radix(vcpu)) { 1604 /* 1605 * A guest could be running PR KVM, so this 1606 * may be a PR KVM hcall. It must be reflected 1607 * to the guest kernel as a sc interrupt. 1608 */ 1609 kvmppc_core_queue_syscall(vcpu); 1610 } else { 1611 /* 1612 * Radix guests can not run PR KVM or nested HV 1613 * hash guests which might run PR KVM, so this 1614 * is always a privilege fault. Send a program 1615 * check to guest kernel. 1616 */ 1617 kvmppc_core_queue_program(vcpu, SRR1_PROGPRIV); 1618 } 1619 r = RESUME_GUEST; 1620 break; 1621 } 1622 1623 /* 1624 * hcall - gather args and set exit_reason. This will next be 1625 * handled by kvmppc_pseries_do_hcall which may be able to deal 1626 * with it and resume guest, or may punt to userspace. 1627 */ 1628 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3); 1629 for (i = 0; i < 9; ++i) 1630 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i); 1631 run->exit_reason = KVM_EXIT_PAPR_HCALL; 1632 vcpu->arch.hcall_needed = 1; 1633 r = RESUME_HOST; 1634 break; 1635 } 1636 /* 1637 * We get these next two if the guest accesses a page which it thinks 1638 * it has mapped but which is not actually present, either because 1639 * it is for an emulated I/O device or because the corresonding 1640 * host page has been paged out. 1641 * 1642 * Any other HDSI/HISI interrupts have been handled already for P7/8 1643 * guests. For POWER9 hash guests not using rmhandlers, basic hash 1644 * fault handling is done here. 1645 */ 1646 case BOOK3S_INTERRUPT_H_DATA_STORAGE: { 1647 unsigned long vsid; 1648 long err; 1649 1650 if (cpu_has_feature(CPU_FTR_P9_RADIX_PREFETCH_BUG) && 1651 unlikely(vcpu->arch.fault_dsisr == HDSISR_CANARY)) { 1652 r = RESUME_GUEST; /* Just retry if it's the canary */ 1653 break; 1654 } 1655 1656 if (kvm_is_radix(vcpu->kvm) || !cpu_has_feature(CPU_FTR_ARCH_300)) { 1657 /* 1658 * Radix doesn't require anything, and pre-ISAv3.0 hash 1659 * already attempted to handle this in rmhandlers. The 1660 * hash fault handling below is v3 only (it uses ASDR 1661 * via fault_gpa). 1662 */ 1663 r = RESUME_PAGE_FAULT; 1664 break; 1665 } 1666 1667 if (!(vcpu->arch.fault_dsisr & (DSISR_NOHPTE | DSISR_PROTFAULT))) { 1668 kvmppc_core_queue_data_storage(vcpu, 1669 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 1670 r = RESUME_GUEST; 1671 break; 1672 } 1673 1674 if (!(vcpu->arch.shregs.msr & MSR_DR)) 1675 vsid = vcpu->kvm->arch.vrma_slb_v; 1676 else 1677 vsid = vcpu->arch.fault_gpa; 1678 1679 err = kvmppc_hpte_hv_fault(vcpu, vcpu->arch.fault_dar, 1680 vsid, vcpu->arch.fault_dsisr, true); 1681 if (err == 0) { 1682 r = RESUME_GUEST; 1683 } else if (err == -1 || err == -2) { 1684 r = RESUME_PAGE_FAULT; 1685 } else { 1686 kvmppc_core_queue_data_storage(vcpu, 1687 vcpu->arch.fault_dar, err); 1688 r = RESUME_GUEST; 1689 } 1690 break; 1691 } 1692 case BOOK3S_INTERRUPT_H_INST_STORAGE: { 1693 unsigned long vsid; 1694 long err; 1695 1696 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1697 vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr & 1698 DSISR_SRR1_MATCH_64S; 1699 if (kvm_is_radix(vcpu->kvm) || !cpu_has_feature(CPU_FTR_ARCH_300)) { 1700 /* 1701 * Radix doesn't require anything, and pre-ISAv3.0 hash 1702 * already attempted to handle this in rmhandlers. The 1703 * hash fault handling below is v3 only (it uses ASDR 1704 * via fault_gpa). 1705 */ 1706 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1707 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1708 r = RESUME_PAGE_FAULT; 1709 break; 1710 } 1711 1712 if (!(vcpu->arch.fault_dsisr & SRR1_ISI_NOPT)) { 1713 kvmppc_core_queue_inst_storage(vcpu, 1714 vcpu->arch.fault_dsisr); 1715 r = RESUME_GUEST; 1716 break; 1717 } 1718 1719 if (!(vcpu->arch.shregs.msr & MSR_IR)) 1720 vsid = vcpu->kvm->arch.vrma_slb_v; 1721 else 1722 vsid = vcpu->arch.fault_gpa; 1723 1724 err = kvmppc_hpte_hv_fault(vcpu, vcpu->arch.fault_dar, 1725 vsid, vcpu->arch.fault_dsisr, false); 1726 if (err == 0) { 1727 r = RESUME_GUEST; 1728 } else if (err == -1) { 1729 r = RESUME_PAGE_FAULT; 1730 } else { 1731 kvmppc_core_queue_inst_storage(vcpu, err); 1732 r = RESUME_GUEST; 1733 } 1734 break; 1735 } 1736 1737 /* 1738 * This occurs if the guest executes an illegal instruction. 1739 * If the guest debug is disabled, generate a program interrupt 1740 * to the guest. If guest debug is enabled, we need to check 1741 * whether the instruction is a software breakpoint instruction. 1742 * Accordingly return to Guest or Host. 1743 */ 1744 case BOOK3S_INTERRUPT_H_EMUL_ASSIST: 1745 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED) 1746 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ? 1747 swab32(vcpu->arch.emul_inst) : 1748 vcpu->arch.emul_inst; 1749 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) { 1750 r = kvmppc_emulate_debug_inst(vcpu); 1751 } else { 1752 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1753 r = RESUME_GUEST; 1754 } 1755 break; 1756 1757 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1758 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1759 /* 1760 * This occurs for various TM-related instructions that 1761 * we need to emulate on POWER9 DD2.2. We have already 1762 * handled the cases where the guest was in real-suspend 1763 * mode and was transitioning to transactional state. 1764 */ 1765 r = kvmhv_p9_tm_emulation(vcpu); 1766 if (r != -1) 1767 break; 1768 fallthrough; /* go to facility unavailable handler */ 1769 #endif 1770 1771 /* 1772 * This occurs if the guest (kernel or userspace), does something that 1773 * is prohibited by HFSCR. 1774 * On POWER9, this could be a doorbell instruction that we need 1775 * to emulate. 1776 * Otherwise, we just generate a program interrupt to the guest. 1777 */ 1778 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: { 1779 u64 cause = vcpu->arch.hfscr >> 56; 1780 1781 r = EMULATE_FAIL; 1782 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 1783 if (cause == FSCR_MSGP_LG) 1784 r = kvmppc_emulate_doorbell_instr(vcpu); 1785 if (cause == FSCR_PM_LG) 1786 r = kvmppc_pmu_unavailable(vcpu); 1787 if (cause == FSCR_EBB_LG) 1788 r = kvmppc_ebb_unavailable(vcpu); 1789 if (cause == FSCR_TM_LG) 1790 r = kvmppc_tm_unavailable(vcpu); 1791 } 1792 if (r == EMULATE_FAIL) { 1793 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1794 r = RESUME_GUEST; 1795 } 1796 break; 1797 } 1798 1799 case BOOK3S_INTERRUPT_HV_RM_HARD: 1800 r = RESUME_PASSTHROUGH; 1801 break; 1802 default: 1803 kvmppc_dump_regs(vcpu); 1804 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1805 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1806 vcpu->arch.shregs.msr); 1807 run->hw.hardware_exit_reason = vcpu->arch.trap; 1808 r = RESUME_HOST; 1809 break; 1810 } 1811 1812 return r; 1813 } 1814 1815 static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu) 1816 { 1817 struct kvm_nested_guest *nested = vcpu->arch.nested; 1818 int r; 1819 int srcu_idx; 1820 1821 vcpu->stat.sum_exits++; 1822 1823 /* 1824 * This can happen if an interrupt occurs in the last stages 1825 * of guest entry or the first stages of guest exit (i.e. after 1826 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1827 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1828 * That can happen due to a bug, or due to a machine check 1829 * occurring at just the wrong time. 1830 */ 1831 if (vcpu->arch.shregs.msr & MSR_HV) { 1832 pr_emerg("KVM trap in HV mode while nested!\n"); 1833 pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1834 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1835 vcpu->arch.shregs.msr); 1836 kvmppc_dump_regs(vcpu); 1837 return RESUME_HOST; 1838 } 1839 switch (vcpu->arch.trap) { 1840 /* We're good on these - the host merely wanted to get our attention */ 1841 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1842 vcpu->stat.dec_exits++; 1843 r = RESUME_GUEST; 1844 break; 1845 case BOOK3S_INTERRUPT_EXTERNAL: 1846 vcpu->stat.ext_intr_exits++; 1847 r = RESUME_HOST; 1848 break; 1849 case BOOK3S_INTERRUPT_H_DOORBELL: 1850 case BOOK3S_INTERRUPT_H_VIRT: 1851 vcpu->stat.ext_intr_exits++; 1852 r = RESUME_GUEST; 1853 break; 1854 /* These need to go to the nested HV */ 1855 case BOOK3S_INTERRUPT_NESTED_HV_DECREMENTER: 1856 vcpu->arch.trap = BOOK3S_INTERRUPT_HV_DECREMENTER; 1857 vcpu->stat.dec_exits++; 1858 r = RESUME_HOST; 1859 break; 1860 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1861 case BOOK3S_INTERRUPT_HMI: 1862 case BOOK3S_INTERRUPT_PERFMON: 1863 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1864 r = RESUME_GUEST; 1865 break; 1866 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1867 { 1868 static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, 1869 DEFAULT_RATELIMIT_BURST); 1870 /* Pass the machine check to the L1 guest */ 1871 r = RESUME_HOST; 1872 /* Print the MCE event to host console. */ 1873 if (__ratelimit(&rs)) 1874 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true); 1875 break; 1876 } 1877 /* 1878 * We get these next two if the guest accesses a page which it thinks 1879 * it has mapped but which is not actually present, either because 1880 * it is for an emulated I/O device or because the corresonding 1881 * host page has been paged out. 1882 */ 1883 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1884 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1885 r = kvmhv_nested_page_fault(vcpu); 1886 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1887 break; 1888 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1889 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1890 vcpu->arch.fault_dsisr = kvmppc_get_msr(vcpu) & 1891 DSISR_SRR1_MATCH_64S; 1892 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1893 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1894 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1895 r = kvmhv_nested_page_fault(vcpu); 1896 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1897 break; 1898 1899 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1900 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1901 /* 1902 * This occurs for various TM-related instructions that 1903 * we need to emulate on POWER9 DD2.2. We have already 1904 * handled the cases where the guest was in real-suspend 1905 * mode and was transitioning to transactional state. 1906 */ 1907 r = kvmhv_p9_tm_emulation(vcpu); 1908 if (r != -1) 1909 break; 1910 fallthrough; /* go to facility unavailable handler */ 1911 #endif 1912 1913 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: { 1914 u64 cause = vcpu->arch.hfscr >> 56; 1915 1916 /* 1917 * Only pass HFU interrupts to the L1 if the facility is 1918 * permitted but disabled by the L1's HFSCR, otherwise 1919 * the interrupt does not make sense to the L1 so turn 1920 * it into a HEAI. 1921 */ 1922 if (!(vcpu->arch.hfscr_permitted & (1UL << cause)) || 1923 (nested->hfscr & (1UL << cause))) { 1924 vcpu->arch.trap = BOOK3S_INTERRUPT_H_EMUL_ASSIST; 1925 1926 /* 1927 * If the fetch failed, return to guest and 1928 * try executing it again. 1929 */ 1930 r = kvmppc_get_last_inst(vcpu, INST_GENERIC, 1931 &vcpu->arch.emul_inst); 1932 if (r != EMULATE_DONE) 1933 r = RESUME_GUEST; 1934 else 1935 r = RESUME_HOST; 1936 } else { 1937 r = RESUME_HOST; 1938 } 1939 1940 break; 1941 } 1942 1943 case BOOK3S_INTERRUPT_HV_RM_HARD: 1944 vcpu->arch.trap = 0; 1945 r = RESUME_GUEST; 1946 if (!xics_on_xive()) 1947 kvmppc_xics_rm_complete(vcpu, 0); 1948 break; 1949 case BOOK3S_INTERRUPT_SYSCALL: 1950 { 1951 unsigned long req = kvmppc_get_gpr(vcpu, 3); 1952 1953 /* 1954 * The H_RPT_INVALIDATE hcalls issued by nested 1955 * guests for process-scoped invalidations when 1956 * GTSE=0, are handled here in L0. 1957 */ 1958 if (req == H_RPT_INVALIDATE) { 1959 r = kvmppc_nested_h_rpt_invalidate(vcpu); 1960 break; 1961 } 1962 1963 r = RESUME_HOST; 1964 break; 1965 } 1966 default: 1967 r = RESUME_HOST; 1968 break; 1969 } 1970 1971 return r; 1972 } 1973 1974 static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu, 1975 struct kvm_sregs *sregs) 1976 { 1977 int i; 1978 1979 memset(sregs, 0, sizeof(struct kvm_sregs)); 1980 sregs->pvr = vcpu->arch.pvr; 1981 for (i = 0; i < vcpu->arch.slb_max; i++) { 1982 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige; 1983 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; 1984 } 1985 1986 return 0; 1987 } 1988 1989 static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu, 1990 struct kvm_sregs *sregs) 1991 { 1992 int i, j; 1993 1994 /* Only accept the same PVR as the host's, since we can't spoof it */ 1995 if (sregs->pvr != vcpu->arch.pvr) 1996 return -EINVAL; 1997 1998 j = 0; 1999 for (i = 0; i < vcpu->arch.slb_nr; i++) { 2000 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) { 2001 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe; 2002 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv; 2003 ++j; 2004 } 2005 } 2006 vcpu->arch.slb_max = j; 2007 2008 return 0; 2009 } 2010 2011 /* 2012 * Enforce limits on guest LPCR values based on hardware availability, 2013 * guest configuration, and possibly hypervisor support and security 2014 * concerns. 2015 */ 2016 unsigned long kvmppc_filter_lpcr_hv(struct kvm *kvm, unsigned long lpcr) 2017 { 2018 /* LPCR_TC only applies to HPT guests */ 2019 if (kvm_is_radix(kvm)) 2020 lpcr &= ~LPCR_TC; 2021 2022 /* On POWER8 and above, userspace can modify AIL */ 2023 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 2024 lpcr &= ~LPCR_AIL; 2025 if ((lpcr & LPCR_AIL) != LPCR_AIL_3) 2026 lpcr &= ~LPCR_AIL; /* LPCR[AIL]=1/2 is disallowed */ 2027 /* 2028 * On some POWER9s we force AIL off for radix guests to prevent 2029 * executing in MSR[HV]=1 mode with the MMU enabled and PIDR set to 2030 * guest, which can result in Q0 translations with LPID=0 PID=PIDR to 2031 * be cached, which the host TLB management does not expect. 2032 */ 2033 if (kvm_is_radix(kvm) && cpu_has_feature(CPU_FTR_P9_RADIX_PREFETCH_BUG)) 2034 lpcr &= ~LPCR_AIL; 2035 2036 /* 2037 * On POWER9, allow userspace to enable large decrementer for the 2038 * guest, whether or not the host has it enabled. 2039 */ 2040 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 2041 lpcr &= ~LPCR_LD; 2042 2043 return lpcr; 2044 } 2045 2046 static void verify_lpcr(struct kvm *kvm, unsigned long lpcr) 2047 { 2048 if (lpcr != kvmppc_filter_lpcr_hv(kvm, lpcr)) { 2049 WARN_ONCE(1, "lpcr 0x%lx differs from filtered 0x%lx\n", 2050 lpcr, kvmppc_filter_lpcr_hv(kvm, lpcr)); 2051 } 2052 } 2053 2054 static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr, 2055 bool preserve_top32) 2056 { 2057 struct kvm *kvm = vcpu->kvm; 2058 struct kvmppc_vcore *vc = vcpu->arch.vcore; 2059 u64 mask; 2060 2061 spin_lock(&vc->lock); 2062 2063 /* 2064 * Userspace can only modify 2065 * DPFD (default prefetch depth), ILE (interrupt little-endian), 2066 * TC (translation control), AIL (alternate interrupt location), 2067 * LD (large decrementer). 2068 * These are subject to restrictions from kvmppc_filter_lcpr_hv(). 2069 */ 2070 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC | LPCR_AIL | LPCR_LD; 2071 2072 /* Broken 32-bit version of LPCR must not clear top bits */ 2073 if (preserve_top32) 2074 mask &= 0xFFFFFFFF; 2075 2076 new_lpcr = kvmppc_filter_lpcr_hv(kvm, 2077 (vc->lpcr & ~mask) | (new_lpcr & mask)); 2078 2079 /* 2080 * If ILE (interrupt little-endian) has changed, update the 2081 * MSR_LE bit in the intr_msr for each vcpu in this vcore. 2082 */ 2083 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) { 2084 struct kvm_vcpu *vcpu; 2085 int i; 2086 2087 kvm_for_each_vcpu(i, vcpu, kvm) { 2088 if (vcpu->arch.vcore != vc) 2089 continue; 2090 if (new_lpcr & LPCR_ILE) 2091 vcpu->arch.intr_msr |= MSR_LE; 2092 else 2093 vcpu->arch.intr_msr &= ~MSR_LE; 2094 } 2095 } 2096 2097 vc->lpcr = new_lpcr; 2098 2099 spin_unlock(&vc->lock); 2100 } 2101 2102 static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 2103 union kvmppc_one_reg *val) 2104 { 2105 int r = 0; 2106 long int i; 2107 2108 switch (id) { 2109 case KVM_REG_PPC_DEBUG_INST: 2110 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 2111 break; 2112 case KVM_REG_PPC_HIOR: 2113 *val = get_reg_val(id, 0); 2114 break; 2115 case KVM_REG_PPC_DABR: 2116 *val = get_reg_val(id, vcpu->arch.dabr); 2117 break; 2118 case KVM_REG_PPC_DABRX: 2119 *val = get_reg_val(id, vcpu->arch.dabrx); 2120 break; 2121 case KVM_REG_PPC_DSCR: 2122 *val = get_reg_val(id, vcpu->arch.dscr); 2123 break; 2124 case KVM_REG_PPC_PURR: 2125 *val = get_reg_val(id, vcpu->arch.purr); 2126 break; 2127 case KVM_REG_PPC_SPURR: 2128 *val = get_reg_val(id, vcpu->arch.spurr); 2129 break; 2130 case KVM_REG_PPC_AMR: 2131 *val = get_reg_val(id, vcpu->arch.amr); 2132 break; 2133 case KVM_REG_PPC_UAMOR: 2134 *val = get_reg_val(id, vcpu->arch.uamor); 2135 break; 2136 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCR1: 2137 i = id - KVM_REG_PPC_MMCR0; 2138 *val = get_reg_val(id, vcpu->arch.mmcr[i]); 2139 break; 2140 case KVM_REG_PPC_MMCR2: 2141 *val = get_reg_val(id, vcpu->arch.mmcr[2]); 2142 break; 2143 case KVM_REG_PPC_MMCRA: 2144 *val = get_reg_val(id, vcpu->arch.mmcra); 2145 break; 2146 case KVM_REG_PPC_MMCRS: 2147 *val = get_reg_val(id, vcpu->arch.mmcrs); 2148 break; 2149 case KVM_REG_PPC_MMCR3: 2150 *val = get_reg_val(id, vcpu->arch.mmcr[3]); 2151 break; 2152 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 2153 i = id - KVM_REG_PPC_PMC1; 2154 *val = get_reg_val(id, vcpu->arch.pmc[i]); 2155 break; 2156 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 2157 i = id - KVM_REG_PPC_SPMC1; 2158 *val = get_reg_val(id, vcpu->arch.spmc[i]); 2159 break; 2160 case KVM_REG_PPC_SIAR: 2161 *val = get_reg_val(id, vcpu->arch.siar); 2162 break; 2163 case KVM_REG_PPC_SDAR: 2164 *val = get_reg_val(id, vcpu->arch.sdar); 2165 break; 2166 case KVM_REG_PPC_SIER: 2167 *val = get_reg_val(id, vcpu->arch.sier[0]); 2168 break; 2169 case KVM_REG_PPC_SIER2: 2170 *val = get_reg_val(id, vcpu->arch.sier[1]); 2171 break; 2172 case KVM_REG_PPC_SIER3: 2173 *val = get_reg_val(id, vcpu->arch.sier[2]); 2174 break; 2175 case KVM_REG_PPC_IAMR: 2176 *val = get_reg_val(id, vcpu->arch.iamr); 2177 break; 2178 case KVM_REG_PPC_PSPB: 2179 *val = get_reg_val(id, vcpu->arch.pspb); 2180 break; 2181 case KVM_REG_PPC_DPDES: 2182 /* 2183 * On POWER9, where we are emulating msgsndp etc., 2184 * we return 1 bit for each vcpu, which can come from 2185 * either vcore->dpdes or doorbell_request. 2186 * On POWER8, doorbell_request is 0. 2187 */ 2188 *val = get_reg_val(id, vcpu->arch.vcore->dpdes | 2189 vcpu->arch.doorbell_request); 2190 break; 2191 case KVM_REG_PPC_VTB: 2192 *val = get_reg_val(id, vcpu->arch.vcore->vtb); 2193 break; 2194 case KVM_REG_PPC_DAWR: 2195 *val = get_reg_val(id, vcpu->arch.dawr0); 2196 break; 2197 case KVM_REG_PPC_DAWRX: 2198 *val = get_reg_val(id, vcpu->arch.dawrx0); 2199 break; 2200 case KVM_REG_PPC_DAWR1: 2201 *val = get_reg_val(id, vcpu->arch.dawr1); 2202 break; 2203 case KVM_REG_PPC_DAWRX1: 2204 *val = get_reg_val(id, vcpu->arch.dawrx1); 2205 break; 2206 case KVM_REG_PPC_CIABR: 2207 *val = get_reg_val(id, vcpu->arch.ciabr); 2208 break; 2209 case KVM_REG_PPC_CSIGR: 2210 *val = get_reg_val(id, vcpu->arch.csigr); 2211 break; 2212 case KVM_REG_PPC_TACR: 2213 *val = get_reg_val(id, vcpu->arch.tacr); 2214 break; 2215 case KVM_REG_PPC_TCSCR: 2216 *val = get_reg_val(id, vcpu->arch.tcscr); 2217 break; 2218 case KVM_REG_PPC_PID: 2219 *val = get_reg_val(id, vcpu->arch.pid); 2220 break; 2221 case KVM_REG_PPC_ACOP: 2222 *val = get_reg_val(id, vcpu->arch.acop); 2223 break; 2224 case KVM_REG_PPC_WORT: 2225 *val = get_reg_val(id, vcpu->arch.wort); 2226 break; 2227 case KVM_REG_PPC_TIDR: 2228 *val = get_reg_val(id, vcpu->arch.tid); 2229 break; 2230 case KVM_REG_PPC_PSSCR: 2231 *val = get_reg_val(id, vcpu->arch.psscr); 2232 break; 2233 case KVM_REG_PPC_VPA_ADDR: 2234 spin_lock(&vcpu->arch.vpa_update_lock); 2235 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa); 2236 spin_unlock(&vcpu->arch.vpa_update_lock); 2237 break; 2238 case KVM_REG_PPC_VPA_SLB: 2239 spin_lock(&vcpu->arch.vpa_update_lock); 2240 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa; 2241 val->vpaval.length = vcpu->arch.slb_shadow.len; 2242 spin_unlock(&vcpu->arch.vpa_update_lock); 2243 break; 2244 case KVM_REG_PPC_VPA_DTL: 2245 spin_lock(&vcpu->arch.vpa_update_lock); 2246 val->vpaval.addr = vcpu->arch.dtl.next_gpa; 2247 val->vpaval.length = vcpu->arch.dtl.len; 2248 spin_unlock(&vcpu->arch.vpa_update_lock); 2249 break; 2250 case KVM_REG_PPC_TB_OFFSET: 2251 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset); 2252 break; 2253 case KVM_REG_PPC_LPCR: 2254 case KVM_REG_PPC_LPCR_64: 2255 *val = get_reg_val(id, vcpu->arch.vcore->lpcr); 2256 break; 2257 case KVM_REG_PPC_PPR: 2258 *val = get_reg_val(id, vcpu->arch.ppr); 2259 break; 2260 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2261 case KVM_REG_PPC_TFHAR: 2262 *val = get_reg_val(id, vcpu->arch.tfhar); 2263 break; 2264 case KVM_REG_PPC_TFIAR: 2265 *val = get_reg_val(id, vcpu->arch.tfiar); 2266 break; 2267 case KVM_REG_PPC_TEXASR: 2268 *val = get_reg_val(id, vcpu->arch.texasr); 2269 break; 2270 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 2271 i = id - KVM_REG_PPC_TM_GPR0; 2272 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]); 2273 break; 2274 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 2275 { 2276 int j; 2277 i = id - KVM_REG_PPC_TM_VSR0; 2278 if (i < 32) 2279 for (j = 0; j < TS_FPRWIDTH; j++) 2280 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j]; 2281 else { 2282 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2283 val->vval = vcpu->arch.vr_tm.vr[i-32]; 2284 else 2285 r = -ENXIO; 2286 } 2287 break; 2288 } 2289 case KVM_REG_PPC_TM_CR: 2290 *val = get_reg_val(id, vcpu->arch.cr_tm); 2291 break; 2292 case KVM_REG_PPC_TM_XER: 2293 *val = get_reg_val(id, vcpu->arch.xer_tm); 2294 break; 2295 case KVM_REG_PPC_TM_LR: 2296 *val = get_reg_val(id, vcpu->arch.lr_tm); 2297 break; 2298 case KVM_REG_PPC_TM_CTR: 2299 *val = get_reg_val(id, vcpu->arch.ctr_tm); 2300 break; 2301 case KVM_REG_PPC_TM_FPSCR: 2302 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr); 2303 break; 2304 case KVM_REG_PPC_TM_AMR: 2305 *val = get_reg_val(id, vcpu->arch.amr_tm); 2306 break; 2307 case KVM_REG_PPC_TM_PPR: 2308 *val = get_reg_val(id, vcpu->arch.ppr_tm); 2309 break; 2310 case KVM_REG_PPC_TM_VRSAVE: 2311 *val = get_reg_val(id, vcpu->arch.vrsave_tm); 2312 break; 2313 case KVM_REG_PPC_TM_VSCR: 2314 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2315 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]); 2316 else 2317 r = -ENXIO; 2318 break; 2319 case KVM_REG_PPC_TM_DSCR: 2320 *val = get_reg_val(id, vcpu->arch.dscr_tm); 2321 break; 2322 case KVM_REG_PPC_TM_TAR: 2323 *val = get_reg_val(id, vcpu->arch.tar_tm); 2324 break; 2325 #endif 2326 case KVM_REG_PPC_ARCH_COMPAT: 2327 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat); 2328 break; 2329 case KVM_REG_PPC_DEC_EXPIRY: 2330 *val = get_reg_val(id, vcpu->arch.dec_expires); 2331 break; 2332 case KVM_REG_PPC_ONLINE: 2333 *val = get_reg_val(id, vcpu->arch.online); 2334 break; 2335 case KVM_REG_PPC_PTCR: 2336 *val = get_reg_val(id, vcpu->kvm->arch.l1_ptcr); 2337 break; 2338 default: 2339 r = -EINVAL; 2340 break; 2341 } 2342 2343 return r; 2344 } 2345 2346 static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 2347 union kvmppc_one_reg *val) 2348 { 2349 int r = 0; 2350 long int i; 2351 unsigned long addr, len; 2352 2353 switch (id) { 2354 case KVM_REG_PPC_HIOR: 2355 /* Only allow this to be set to zero */ 2356 if (set_reg_val(id, *val)) 2357 r = -EINVAL; 2358 break; 2359 case KVM_REG_PPC_DABR: 2360 vcpu->arch.dabr = set_reg_val(id, *val); 2361 break; 2362 case KVM_REG_PPC_DABRX: 2363 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP; 2364 break; 2365 case KVM_REG_PPC_DSCR: 2366 vcpu->arch.dscr = set_reg_val(id, *val); 2367 break; 2368 case KVM_REG_PPC_PURR: 2369 vcpu->arch.purr = set_reg_val(id, *val); 2370 break; 2371 case KVM_REG_PPC_SPURR: 2372 vcpu->arch.spurr = set_reg_val(id, *val); 2373 break; 2374 case KVM_REG_PPC_AMR: 2375 vcpu->arch.amr = set_reg_val(id, *val); 2376 break; 2377 case KVM_REG_PPC_UAMOR: 2378 vcpu->arch.uamor = set_reg_val(id, *val); 2379 break; 2380 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCR1: 2381 i = id - KVM_REG_PPC_MMCR0; 2382 vcpu->arch.mmcr[i] = set_reg_val(id, *val); 2383 break; 2384 case KVM_REG_PPC_MMCR2: 2385 vcpu->arch.mmcr[2] = set_reg_val(id, *val); 2386 break; 2387 case KVM_REG_PPC_MMCRA: 2388 vcpu->arch.mmcra = set_reg_val(id, *val); 2389 break; 2390 case KVM_REG_PPC_MMCRS: 2391 vcpu->arch.mmcrs = set_reg_val(id, *val); 2392 break; 2393 case KVM_REG_PPC_MMCR3: 2394 *val = get_reg_val(id, vcpu->arch.mmcr[3]); 2395 break; 2396 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 2397 i = id - KVM_REG_PPC_PMC1; 2398 vcpu->arch.pmc[i] = set_reg_val(id, *val); 2399 break; 2400 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 2401 i = id - KVM_REG_PPC_SPMC1; 2402 vcpu->arch.spmc[i] = set_reg_val(id, *val); 2403 break; 2404 case KVM_REG_PPC_SIAR: 2405 vcpu->arch.siar = set_reg_val(id, *val); 2406 break; 2407 case KVM_REG_PPC_SDAR: 2408 vcpu->arch.sdar = set_reg_val(id, *val); 2409 break; 2410 case KVM_REG_PPC_SIER: 2411 vcpu->arch.sier[0] = set_reg_val(id, *val); 2412 break; 2413 case KVM_REG_PPC_SIER2: 2414 vcpu->arch.sier[1] = set_reg_val(id, *val); 2415 break; 2416 case KVM_REG_PPC_SIER3: 2417 vcpu->arch.sier[2] = set_reg_val(id, *val); 2418 break; 2419 case KVM_REG_PPC_IAMR: 2420 vcpu->arch.iamr = set_reg_val(id, *val); 2421 break; 2422 case KVM_REG_PPC_PSPB: 2423 vcpu->arch.pspb = set_reg_val(id, *val); 2424 break; 2425 case KVM_REG_PPC_DPDES: 2426 vcpu->arch.vcore->dpdes = set_reg_val(id, *val); 2427 break; 2428 case KVM_REG_PPC_VTB: 2429 vcpu->arch.vcore->vtb = set_reg_val(id, *val); 2430 break; 2431 case KVM_REG_PPC_DAWR: 2432 vcpu->arch.dawr0 = set_reg_val(id, *val); 2433 break; 2434 case KVM_REG_PPC_DAWRX: 2435 vcpu->arch.dawrx0 = set_reg_val(id, *val) & ~DAWRX_HYP; 2436 break; 2437 case KVM_REG_PPC_DAWR1: 2438 vcpu->arch.dawr1 = set_reg_val(id, *val); 2439 break; 2440 case KVM_REG_PPC_DAWRX1: 2441 vcpu->arch.dawrx1 = set_reg_val(id, *val) & ~DAWRX_HYP; 2442 break; 2443 case KVM_REG_PPC_CIABR: 2444 vcpu->arch.ciabr = set_reg_val(id, *val); 2445 /* Don't allow setting breakpoints in hypervisor code */ 2446 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER) 2447 vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */ 2448 break; 2449 case KVM_REG_PPC_CSIGR: 2450 vcpu->arch.csigr = set_reg_val(id, *val); 2451 break; 2452 case KVM_REG_PPC_TACR: 2453 vcpu->arch.tacr = set_reg_val(id, *val); 2454 break; 2455 case KVM_REG_PPC_TCSCR: 2456 vcpu->arch.tcscr = set_reg_val(id, *val); 2457 break; 2458 case KVM_REG_PPC_PID: 2459 vcpu->arch.pid = set_reg_val(id, *val); 2460 break; 2461 case KVM_REG_PPC_ACOP: 2462 vcpu->arch.acop = set_reg_val(id, *val); 2463 break; 2464 case KVM_REG_PPC_WORT: 2465 vcpu->arch.wort = set_reg_val(id, *val); 2466 break; 2467 case KVM_REG_PPC_TIDR: 2468 vcpu->arch.tid = set_reg_val(id, *val); 2469 break; 2470 case KVM_REG_PPC_PSSCR: 2471 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS; 2472 break; 2473 case KVM_REG_PPC_VPA_ADDR: 2474 addr = set_reg_val(id, *val); 2475 r = -EINVAL; 2476 if (!addr && (vcpu->arch.slb_shadow.next_gpa || 2477 vcpu->arch.dtl.next_gpa)) 2478 break; 2479 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca)); 2480 break; 2481 case KVM_REG_PPC_VPA_SLB: 2482 addr = val->vpaval.addr; 2483 len = val->vpaval.length; 2484 r = -EINVAL; 2485 if (addr && !vcpu->arch.vpa.next_gpa) 2486 break; 2487 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len); 2488 break; 2489 case KVM_REG_PPC_VPA_DTL: 2490 addr = val->vpaval.addr; 2491 len = val->vpaval.length; 2492 r = -EINVAL; 2493 if (addr && (len < sizeof(struct dtl_entry) || 2494 !vcpu->arch.vpa.next_gpa)) 2495 break; 2496 len -= len % sizeof(struct dtl_entry); 2497 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len); 2498 break; 2499 case KVM_REG_PPC_TB_OFFSET: 2500 /* round up to multiple of 2^24 */ 2501 vcpu->arch.vcore->tb_offset = 2502 ALIGN(set_reg_val(id, *val), 1UL << 24); 2503 break; 2504 case KVM_REG_PPC_LPCR: 2505 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true); 2506 break; 2507 case KVM_REG_PPC_LPCR_64: 2508 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false); 2509 break; 2510 case KVM_REG_PPC_PPR: 2511 vcpu->arch.ppr = set_reg_val(id, *val); 2512 break; 2513 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2514 case KVM_REG_PPC_TFHAR: 2515 vcpu->arch.tfhar = set_reg_val(id, *val); 2516 break; 2517 case KVM_REG_PPC_TFIAR: 2518 vcpu->arch.tfiar = set_reg_val(id, *val); 2519 break; 2520 case KVM_REG_PPC_TEXASR: 2521 vcpu->arch.texasr = set_reg_val(id, *val); 2522 break; 2523 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 2524 i = id - KVM_REG_PPC_TM_GPR0; 2525 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val); 2526 break; 2527 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 2528 { 2529 int j; 2530 i = id - KVM_REG_PPC_TM_VSR0; 2531 if (i < 32) 2532 for (j = 0; j < TS_FPRWIDTH; j++) 2533 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j]; 2534 else 2535 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2536 vcpu->arch.vr_tm.vr[i-32] = val->vval; 2537 else 2538 r = -ENXIO; 2539 break; 2540 } 2541 case KVM_REG_PPC_TM_CR: 2542 vcpu->arch.cr_tm = set_reg_val(id, *val); 2543 break; 2544 case KVM_REG_PPC_TM_XER: 2545 vcpu->arch.xer_tm = set_reg_val(id, *val); 2546 break; 2547 case KVM_REG_PPC_TM_LR: 2548 vcpu->arch.lr_tm = set_reg_val(id, *val); 2549 break; 2550 case KVM_REG_PPC_TM_CTR: 2551 vcpu->arch.ctr_tm = set_reg_val(id, *val); 2552 break; 2553 case KVM_REG_PPC_TM_FPSCR: 2554 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val); 2555 break; 2556 case KVM_REG_PPC_TM_AMR: 2557 vcpu->arch.amr_tm = set_reg_val(id, *val); 2558 break; 2559 case KVM_REG_PPC_TM_PPR: 2560 vcpu->arch.ppr_tm = set_reg_val(id, *val); 2561 break; 2562 case KVM_REG_PPC_TM_VRSAVE: 2563 vcpu->arch.vrsave_tm = set_reg_val(id, *val); 2564 break; 2565 case KVM_REG_PPC_TM_VSCR: 2566 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2567 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val); 2568 else 2569 r = - ENXIO; 2570 break; 2571 case KVM_REG_PPC_TM_DSCR: 2572 vcpu->arch.dscr_tm = set_reg_val(id, *val); 2573 break; 2574 case KVM_REG_PPC_TM_TAR: 2575 vcpu->arch.tar_tm = set_reg_val(id, *val); 2576 break; 2577 #endif 2578 case KVM_REG_PPC_ARCH_COMPAT: 2579 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val)); 2580 break; 2581 case KVM_REG_PPC_DEC_EXPIRY: 2582 vcpu->arch.dec_expires = set_reg_val(id, *val); 2583 break; 2584 case KVM_REG_PPC_ONLINE: 2585 i = set_reg_val(id, *val); 2586 if (i && !vcpu->arch.online) 2587 atomic_inc(&vcpu->arch.vcore->online_count); 2588 else if (!i && vcpu->arch.online) 2589 atomic_dec(&vcpu->arch.vcore->online_count); 2590 vcpu->arch.online = i; 2591 break; 2592 case KVM_REG_PPC_PTCR: 2593 vcpu->kvm->arch.l1_ptcr = set_reg_val(id, *val); 2594 break; 2595 default: 2596 r = -EINVAL; 2597 break; 2598 } 2599 2600 return r; 2601 } 2602 2603 /* 2604 * On POWER9, threads are independent and can be in different partitions. 2605 * Therefore we consider each thread to be a subcore. 2606 * There is a restriction that all threads have to be in the same 2607 * MMU mode (radix or HPT), unfortunately, but since we only support 2608 * HPT guests on a HPT host so far, that isn't an impediment yet. 2609 */ 2610 static int threads_per_vcore(struct kvm *kvm) 2611 { 2612 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2613 return 1; 2614 return threads_per_subcore; 2615 } 2616 2617 static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int id) 2618 { 2619 struct kvmppc_vcore *vcore; 2620 2621 vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL); 2622 2623 if (vcore == NULL) 2624 return NULL; 2625 2626 spin_lock_init(&vcore->lock); 2627 spin_lock_init(&vcore->stoltb_lock); 2628 rcuwait_init(&vcore->wait); 2629 vcore->preempt_tb = TB_NIL; 2630 vcore->lpcr = kvm->arch.lpcr; 2631 vcore->first_vcpuid = id; 2632 vcore->kvm = kvm; 2633 INIT_LIST_HEAD(&vcore->preempt_list); 2634 2635 return vcore; 2636 } 2637 2638 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING 2639 static struct debugfs_timings_element { 2640 const char *name; 2641 size_t offset; 2642 } timings[] = { 2643 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)}, 2644 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)}, 2645 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)}, 2646 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)}, 2647 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)}, 2648 }; 2649 2650 #define N_TIMINGS (ARRAY_SIZE(timings)) 2651 2652 struct debugfs_timings_state { 2653 struct kvm_vcpu *vcpu; 2654 unsigned int buflen; 2655 char buf[N_TIMINGS * 100]; 2656 }; 2657 2658 static int debugfs_timings_open(struct inode *inode, struct file *file) 2659 { 2660 struct kvm_vcpu *vcpu = inode->i_private; 2661 struct debugfs_timings_state *p; 2662 2663 p = kzalloc(sizeof(*p), GFP_KERNEL); 2664 if (!p) 2665 return -ENOMEM; 2666 2667 kvm_get_kvm(vcpu->kvm); 2668 p->vcpu = vcpu; 2669 file->private_data = p; 2670 2671 return nonseekable_open(inode, file); 2672 } 2673 2674 static int debugfs_timings_release(struct inode *inode, struct file *file) 2675 { 2676 struct debugfs_timings_state *p = file->private_data; 2677 2678 kvm_put_kvm(p->vcpu->kvm); 2679 kfree(p); 2680 return 0; 2681 } 2682 2683 static ssize_t debugfs_timings_read(struct file *file, char __user *buf, 2684 size_t len, loff_t *ppos) 2685 { 2686 struct debugfs_timings_state *p = file->private_data; 2687 struct kvm_vcpu *vcpu = p->vcpu; 2688 char *s, *buf_end; 2689 struct kvmhv_tb_accumulator tb; 2690 u64 count; 2691 loff_t pos; 2692 ssize_t n; 2693 int i, loops; 2694 bool ok; 2695 2696 if (!p->buflen) { 2697 s = p->buf; 2698 buf_end = s + sizeof(p->buf); 2699 for (i = 0; i < N_TIMINGS; ++i) { 2700 struct kvmhv_tb_accumulator *acc; 2701 2702 acc = (struct kvmhv_tb_accumulator *) 2703 ((unsigned long)vcpu + timings[i].offset); 2704 ok = false; 2705 for (loops = 0; loops < 1000; ++loops) { 2706 count = acc->seqcount; 2707 if (!(count & 1)) { 2708 smp_rmb(); 2709 tb = *acc; 2710 smp_rmb(); 2711 if (count == acc->seqcount) { 2712 ok = true; 2713 break; 2714 } 2715 } 2716 udelay(1); 2717 } 2718 if (!ok) 2719 snprintf(s, buf_end - s, "%s: stuck\n", 2720 timings[i].name); 2721 else 2722 snprintf(s, buf_end - s, 2723 "%s: %llu %llu %llu %llu\n", 2724 timings[i].name, count / 2, 2725 tb_to_ns(tb.tb_total), 2726 tb_to_ns(tb.tb_min), 2727 tb_to_ns(tb.tb_max)); 2728 s += strlen(s); 2729 } 2730 p->buflen = s - p->buf; 2731 } 2732 2733 pos = *ppos; 2734 if (pos >= p->buflen) 2735 return 0; 2736 if (len > p->buflen - pos) 2737 len = p->buflen - pos; 2738 n = copy_to_user(buf, p->buf + pos, len); 2739 if (n) { 2740 if (n == len) 2741 return -EFAULT; 2742 len -= n; 2743 } 2744 *ppos = pos + len; 2745 return len; 2746 } 2747 2748 static ssize_t debugfs_timings_write(struct file *file, const char __user *buf, 2749 size_t len, loff_t *ppos) 2750 { 2751 return -EACCES; 2752 } 2753 2754 static const struct file_operations debugfs_timings_ops = { 2755 .owner = THIS_MODULE, 2756 .open = debugfs_timings_open, 2757 .release = debugfs_timings_release, 2758 .read = debugfs_timings_read, 2759 .write = debugfs_timings_write, 2760 .llseek = generic_file_llseek, 2761 }; 2762 2763 /* Create a debugfs directory for the vcpu */ 2764 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2765 { 2766 char buf[16]; 2767 struct kvm *kvm = vcpu->kvm; 2768 2769 snprintf(buf, sizeof(buf), "vcpu%u", id); 2770 vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir); 2771 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir, vcpu, 2772 &debugfs_timings_ops); 2773 } 2774 2775 #else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2776 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2777 { 2778 } 2779 #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2780 2781 static int kvmppc_core_vcpu_create_hv(struct kvm_vcpu *vcpu) 2782 { 2783 int err; 2784 int core; 2785 struct kvmppc_vcore *vcore; 2786 struct kvm *kvm; 2787 unsigned int id; 2788 2789 kvm = vcpu->kvm; 2790 id = vcpu->vcpu_id; 2791 2792 vcpu->arch.shared = &vcpu->arch.shregs; 2793 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 2794 /* 2795 * The shared struct is never shared on HV, 2796 * so we can always use host endianness 2797 */ 2798 #ifdef __BIG_ENDIAN__ 2799 vcpu->arch.shared_big_endian = true; 2800 #else 2801 vcpu->arch.shared_big_endian = false; 2802 #endif 2803 #endif 2804 vcpu->arch.mmcr[0] = MMCR0_FC; 2805 if (cpu_has_feature(CPU_FTR_ARCH_31)) { 2806 vcpu->arch.mmcr[0] |= MMCR0_PMCCEXT; 2807 vcpu->arch.mmcra = MMCRA_BHRB_DISABLE; 2808 } 2809 2810 vcpu->arch.ctrl = CTRL_RUNLATCH; 2811 /* default to host PVR, since we can't spoof it */ 2812 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR)); 2813 spin_lock_init(&vcpu->arch.vpa_update_lock); 2814 spin_lock_init(&vcpu->arch.tbacct_lock); 2815 vcpu->arch.busy_preempt = TB_NIL; 2816 vcpu->arch.shregs.msr = MSR_ME; 2817 vcpu->arch.intr_msr = MSR_SF | MSR_ME; 2818 2819 /* 2820 * Set the default HFSCR for the guest from the host value. 2821 * This value is only used on POWER9. 2822 * On POWER9, we want to virtualize the doorbell facility, so we 2823 * don't set the HFSCR_MSGP bit, and that causes those instructions 2824 * to trap and then we emulate them. 2825 */ 2826 vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB | 2827 HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP | HFSCR_PREFIX; 2828 if (cpu_has_feature(CPU_FTR_HVMODE)) { 2829 vcpu->arch.hfscr &= mfspr(SPRN_HFSCR); 2830 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2831 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 2832 vcpu->arch.hfscr |= HFSCR_TM; 2833 #endif 2834 } 2835 if (cpu_has_feature(CPU_FTR_TM_COMP)) 2836 vcpu->arch.hfscr |= HFSCR_TM; 2837 2838 vcpu->arch.hfscr_permitted = vcpu->arch.hfscr; 2839 2840 /* 2841 * PM, EBB, TM are demand-faulted so start with it clear. 2842 */ 2843 vcpu->arch.hfscr &= ~(HFSCR_PM | HFSCR_EBB | HFSCR_TM); 2844 2845 kvmppc_mmu_book3s_hv_init(vcpu); 2846 2847 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 2848 2849 init_waitqueue_head(&vcpu->arch.cpu_run); 2850 2851 mutex_lock(&kvm->lock); 2852 vcore = NULL; 2853 err = -EINVAL; 2854 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 2855 if (id >= (KVM_MAX_VCPUS * kvm->arch.emul_smt_mode)) { 2856 pr_devel("KVM: VCPU ID too high\n"); 2857 core = KVM_MAX_VCORES; 2858 } else { 2859 BUG_ON(kvm->arch.smt_mode != 1); 2860 core = kvmppc_pack_vcpu_id(kvm, id); 2861 } 2862 } else { 2863 core = id / kvm->arch.smt_mode; 2864 } 2865 if (core < KVM_MAX_VCORES) { 2866 vcore = kvm->arch.vcores[core]; 2867 if (vcore && cpu_has_feature(CPU_FTR_ARCH_300)) { 2868 pr_devel("KVM: collision on id %u", id); 2869 vcore = NULL; 2870 } else if (!vcore) { 2871 /* 2872 * Take mmu_setup_lock for mutual exclusion 2873 * with kvmppc_update_lpcr(). 2874 */ 2875 err = -ENOMEM; 2876 vcore = kvmppc_vcore_create(kvm, 2877 id & ~(kvm->arch.smt_mode - 1)); 2878 mutex_lock(&kvm->arch.mmu_setup_lock); 2879 kvm->arch.vcores[core] = vcore; 2880 kvm->arch.online_vcores++; 2881 mutex_unlock(&kvm->arch.mmu_setup_lock); 2882 } 2883 } 2884 mutex_unlock(&kvm->lock); 2885 2886 if (!vcore) 2887 return err; 2888 2889 spin_lock(&vcore->lock); 2890 ++vcore->num_threads; 2891 spin_unlock(&vcore->lock); 2892 vcpu->arch.vcore = vcore; 2893 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid; 2894 vcpu->arch.thread_cpu = -1; 2895 vcpu->arch.prev_cpu = -1; 2896 2897 vcpu->arch.cpu_type = KVM_CPU_3S_64; 2898 kvmppc_sanity_check(vcpu); 2899 2900 debugfs_vcpu_init(vcpu, id); 2901 2902 return 0; 2903 } 2904 2905 static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode, 2906 unsigned long flags) 2907 { 2908 int err; 2909 int esmt = 0; 2910 2911 if (flags) 2912 return -EINVAL; 2913 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode)) 2914 return -EINVAL; 2915 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 2916 /* 2917 * On POWER8 (or POWER7), the threading mode is "strict", 2918 * so we pack smt_mode vcpus per vcore. 2919 */ 2920 if (smt_mode > threads_per_subcore) 2921 return -EINVAL; 2922 } else { 2923 /* 2924 * On POWER9, the threading mode is "loose", 2925 * so each vcpu gets its own vcore. 2926 */ 2927 esmt = smt_mode; 2928 smt_mode = 1; 2929 } 2930 mutex_lock(&kvm->lock); 2931 err = -EBUSY; 2932 if (!kvm->arch.online_vcores) { 2933 kvm->arch.smt_mode = smt_mode; 2934 kvm->arch.emul_smt_mode = esmt; 2935 err = 0; 2936 } 2937 mutex_unlock(&kvm->lock); 2938 2939 return err; 2940 } 2941 2942 static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa) 2943 { 2944 if (vpa->pinned_addr) 2945 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa, 2946 vpa->dirty); 2947 } 2948 2949 static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu) 2950 { 2951 spin_lock(&vcpu->arch.vpa_update_lock); 2952 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl); 2953 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow); 2954 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa); 2955 spin_unlock(&vcpu->arch.vpa_update_lock); 2956 } 2957 2958 static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu) 2959 { 2960 /* Indicate we want to get back into the guest */ 2961 return 1; 2962 } 2963 2964 static void kvmppc_set_timer(struct kvm_vcpu *vcpu) 2965 { 2966 unsigned long dec_nsec, now; 2967 2968 now = get_tb(); 2969 if (now > kvmppc_dec_expires_host_tb(vcpu)) { 2970 /* decrementer has already gone negative */ 2971 kvmppc_core_queue_dec(vcpu); 2972 kvmppc_core_prepare_to_enter(vcpu); 2973 return; 2974 } 2975 dec_nsec = tb_to_ns(kvmppc_dec_expires_host_tb(vcpu) - now); 2976 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL); 2977 vcpu->arch.timer_running = 1; 2978 } 2979 2980 extern int __kvmppc_vcore_entry(void); 2981 2982 static void kvmppc_remove_runnable(struct kvmppc_vcore *vc, 2983 struct kvm_vcpu *vcpu, u64 tb) 2984 { 2985 u64 now; 2986 2987 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 2988 return; 2989 spin_lock_irq(&vcpu->arch.tbacct_lock); 2990 now = tb; 2991 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) - 2992 vcpu->arch.stolen_logged; 2993 vcpu->arch.busy_preempt = now; 2994 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 2995 spin_unlock_irq(&vcpu->arch.tbacct_lock); 2996 --vc->n_runnable; 2997 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL); 2998 } 2999 3000 static int kvmppc_grab_hwthread(int cpu) 3001 { 3002 struct paca_struct *tpaca; 3003 long timeout = 10000; 3004 3005 tpaca = paca_ptrs[cpu]; 3006 3007 /* Ensure the thread won't go into the kernel if it wakes */ 3008 tpaca->kvm_hstate.kvm_vcpu = NULL; 3009 tpaca->kvm_hstate.kvm_vcore = NULL; 3010 tpaca->kvm_hstate.napping = 0; 3011 smp_wmb(); 3012 tpaca->kvm_hstate.hwthread_req = 1; 3013 3014 /* 3015 * If the thread is already executing in the kernel (e.g. handling 3016 * a stray interrupt), wait for it to get back to nap mode. 3017 * The smp_mb() is to ensure that our setting of hwthread_req 3018 * is visible before we look at hwthread_state, so if this 3019 * races with the code at system_reset_pSeries and the thread 3020 * misses our setting of hwthread_req, we are sure to see its 3021 * setting of hwthread_state, and vice versa. 3022 */ 3023 smp_mb(); 3024 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) { 3025 if (--timeout <= 0) { 3026 pr_err("KVM: couldn't grab cpu %d\n", cpu); 3027 return -EBUSY; 3028 } 3029 udelay(1); 3030 } 3031 return 0; 3032 } 3033 3034 static void kvmppc_release_hwthread(int cpu) 3035 { 3036 struct paca_struct *tpaca; 3037 3038 tpaca = paca_ptrs[cpu]; 3039 tpaca->kvm_hstate.hwthread_req = 0; 3040 tpaca->kvm_hstate.kvm_vcpu = NULL; 3041 tpaca->kvm_hstate.kvm_vcore = NULL; 3042 tpaca->kvm_hstate.kvm_split_mode = NULL; 3043 } 3044 3045 static DEFINE_PER_CPU(struct kvm *, cpu_in_guest); 3046 3047 static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu) 3048 { 3049 struct kvm_nested_guest *nested = vcpu->arch.nested; 3050 cpumask_t *need_tlb_flush; 3051 int i; 3052 3053 if (nested) 3054 need_tlb_flush = &nested->need_tlb_flush; 3055 else 3056 need_tlb_flush = &kvm->arch.need_tlb_flush; 3057 3058 cpu = cpu_first_tlb_thread_sibling(cpu); 3059 for (i = cpu; i <= cpu_last_tlb_thread_sibling(cpu); 3060 i += cpu_tlb_thread_sibling_step()) 3061 cpumask_set_cpu(i, need_tlb_flush); 3062 3063 /* 3064 * Make sure setting of bit in need_tlb_flush precedes testing of 3065 * cpu_in_guest. The matching barrier on the other side is hwsync 3066 * when switching to guest MMU mode, which happens between 3067 * cpu_in_guest being set to the guest kvm, and need_tlb_flush bit 3068 * being tested. 3069 */ 3070 smp_mb(); 3071 3072 for (i = cpu; i <= cpu_last_tlb_thread_sibling(cpu); 3073 i += cpu_tlb_thread_sibling_step()) { 3074 struct kvm *running = *per_cpu_ptr(&cpu_in_guest, i); 3075 3076 if (running == kvm) 3077 smp_call_function_single(i, do_nothing, NULL, 1); 3078 } 3079 } 3080 3081 static void do_migrate_away_vcpu(void *arg) 3082 { 3083 struct kvm_vcpu *vcpu = arg; 3084 struct kvm *kvm = vcpu->kvm; 3085 3086 /* 3087 * If the guest has GTSE, it may execute tlbie, so do a eieio; tlbsync; 3088 * ptesync sequence on the old CPU before migrating to a new one, in 3089 * case we interrupted the guest between a tlbie ; eieio ; 3090 * tlbsync; ptesync sequence. 3091 * 3092 * Otherwise, ptesync is sufficient for ordering tlbiel sequences. 3093 */ 3094 if (kvm->arch.lpcr & LPCR_GTSE) 3095 asm volatile("eieio; tlbsync; ptesync"); 3096 else 3097 asm volatile("ptesync"); 3098 } 3099 3100 static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu) 3101 { 3102 struct kvm_nested_guest *nested = vcpu->arch.nested; 3103 struct kvm *kvm = vcpu->kvm; 3104 int prev_cpu; 3105 3106 if (!cpu_has_feature(CPU_FTR_HVMODE)) 3107 return; 3108 3109 if (nested) 3110 prev_cpu = nested->prev_cpu[vcpu->arch.nested_vcpu_id]; 3111 else 3112 prev_cpu = vcpu->arch.prev_cpu; 3113 3114 /* 3115 * With radix, the guest can do TLB invalidations itself, 3116 * and it could choose to use the local form (tlbiel) if 3117 * it is invalidating a translation that has only ever been 3118 * used on one vcpu. However, that doesn't mean it has 3119 * only ever been used on one physical cpu, since vcpus 3120 * can move around between pcpus. To cope with this, when 3121 * a vcpu moves from one pcpu to another, we need to tell 3122 * any vcpus running on the same core as this vcpu previously 3123 * ran to flush the TLB. 3124 */ 3125 if (prev_cpu != pcpu) { 3126 if (prev_cpu >= 0) { 3127 if (cpu_first_tlb_thread_sibling(prev_cpu) != 3128 cpu_first_tlb_thread_sibling(pcpu)) 3129 radix_flush_cpu(kvm, prev_cpu, vcpu); 3130 3131 smp_call_function_single(prev_cpu, 3132 do_migrate_away_vcpu, vcpu, 1); 3133 } 3134 if (nested) 3135 nested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu; 3136 else 3137 vcpu->arch.prev_cpu = pcpu; 3138 } 3139 } 3140 3141 static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc) 3142 { 3143 int cpu; 3144 struct paca_struct *tpaca; 3145 3146 cpu = vc->pcpu; 3147 if (vcpu) { 3148 if (vcpu->arch.timer_running) { 3149 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 3150 vcpu->arch.timer_running = 0; 3151 } 3152 cpu += vcpu->arch.ptid; 3153 vcpu->cpu = vc->pcpu; 3154 vcpu->arch.thread_cpu = cpu; 3155 } 3156 tpaca = paca_ptrs[cpu]; 3157 tpaca->kvm_hstate.kvm_vcpu = vcpu; 3158 tpaca->kvm_hstate.ptid = cpu - vc->pcpu; 3159 tpaca->kvm_hstate.fake_suspend = 0; 3160 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */ 3161 smp_wmb(); 3162 tpaca->kvm_hstate.kvm_vcore = vc; 3163 if (cpu != smp_processor_id()) 3164 kvmppc_ipi_thread(cpu); 3165 } 3166 3167 static void kvmppc_wait_for_nap(int n_threads) 3168 { 3169 int cpu = smp_processor_id(); 3170 int i, loops; 3171 3172 if (n_threads <= 1) 3173 return; 3174 for (loops = 0; loops < 1000000; ++loops) { 3175 /* 3176 * Check if all threads are finished. 3177 * We set the vcore pointer when starting a thread 3178 * and the thread clears it when finished, so we look 3179 * for any threads that still have a non-NULL vcore ptr. 3180 */ 3181 for (i = 1; i < n_threads; ++i) 3182 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 3183 break; 3184 if (i == n_threads) { 3185 HMT_medium(); 3186 return; 3187 } 3188 HMT_low(); 3189 } 3190 HMT_medium(); 3191 for (i = 1; i < n_threads; ++i) 3192 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 3193 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i); 3194 } 3195 3196 /* 3197 * Check that we are on thread 0 and that any other threads in 3198 * this core are off-line. Then grab the threads so they can't 3199 * enter the kernel. 3200 */ 3201 static int on_primary_thread(void) 3202 { 3203 int cpu = smp_processor_id(); 3204 int thr; 3205 3206 /* Are we on a primary subcore? */ 3207 if (cpu_thread_in_subcore(cpu)) 3208 return 0; 3209 3210 thr = 0; 3211 while (++thr < threads_per_subcore) 3212 if (cpu_online(cpu + thr)) 3213 return 0; 3214 3215 /* Grab all hw threads so they can't go into the kernel */ 3216 for (thr = 1; thr < threads_per_subcore; ++thr) { 3217 if (kvmppc_grab_hwthread(cpu + thr)) { 3218 /* Couldn't grab one; let the others go */ 3219 do { 3220 kvmppc_release_hwthread(cpu + thr); 3221 } while (--thr > 0); 3222 return 0; 3223 } 3224 } 3225 return 1; 3226 } 3227 3228 /* 3229 * A list of virtual cores for each physical CPU. 3230 * These are vcores that could run but their runner VCPU tasks are 3231 * (or may be) preempted. 3232 */ 3233 struct preempted_vcore_list { 3234 struct list_head list; 3235 spinlock_t lock; 3236 }; 3237 3238 static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores); 3239 3240 static void init_vcore_lists(void) 3241 { 3242 int cpu; 3243 3244 for_each_possible_cpu(cpu) { 3245 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu); 3246 spin_lock_init(&lp->lock); 3247 INIT_LIST_HEAD(&lp->list); 3248 } 3249 } 3250 3251 static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc) 3252 { 3253 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 3254 3255 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 3256 3257 vc->vcore_state = VCORE_PREEMPT; 3258 vc->pcpu = smp_processor_id(); 3259 if (vc->num_threads < threads_per_vcore(vc->kvm)) { 3260 spin_lock(&lp->lock); 3261 list_add_tail(&vc->preempt_list, &lp->list); 3262 spin_unlock(&lp->lock); 3263 } 3264 3265 /* Start accumulating stolen time */ 3266 kvmppc_core_start_stolen(vc, mftb()); 3267 } 3268 3269 static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc) 3270 { 3271 struct preempted_vcore_list *lp; 3272 3273 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 3274 3275 kvmppc_core_end_stolen(vc, mftb()); 3276 if (!list_empty(&vc->preempt_list)) { 3277 lp = &per_cpu(preempted_vcores, vc->pcpu); 3278 spin_lock(&lp->lock); 3279 list_del_init(&vc->preempt_list); 3280 spin_unlock(&lp->lock); 3281 } 3282 vc->vcore_state = VCORE_INACTIVE; 3283 } 3284 3285 /* 3286 * This stores information about the virtual cores currently 3287 * assigned to a physical core. 3288 */ 3289 struct core_info { 3290 int n_subcores; 3291 int max_subcore_threads; 3292 int total_threads; 3293 int subcore_threads[MAX_SUBCORES]; 3294 struct kvmppc_vcore *vc[MAX_SUBCORES]; 3295 }; 3296 3297 /* 3298 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7 3299 * respectively in 2-way micro-threading (split-core) mode on POWER8. 3300 */ 3301 static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 }; 3302 3303 static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc) 3304 { 3305 memset(cip, 0, sizeof(*cip)); 3306 cip->n_subcores = 1; 3307 cip->max_subcore_threads = vc->num_threads; 3308 cip->total_threads = vc->num_threads; 3309 cip->subcore_threads[0] = vc->num_threads; 3310 cip->vc[0] = vc; 3311 } 3312 3313 static bool subcore_config_ok(int n_subcores, int n_threads) 3314 { 3315 /* 3316 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way 3317 * split-core mode, with one thread per subcore. 3318 */ 3319 if (cpu_has_feature(CPU_FTR_ARCH_300)) 3320 return n_subcores <= 4 && n_threads == 1; 3321 3322 /* On POWER8, can only dynamically split if unsplit to begin with */ 3323 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS) 3324 return false; 3325 if (n_subcores > MAX_SUBCORES) 3326 return false; 3327 if (n_subcores > 1) { 3328 if (!(dynamic_mt_modes & 2)) 3329 n_subcores = 4; 3330 if (n_subcores > 2 && !(dynamic_mt_modes & 4)) 3331 return false; 3332 } 3333 3334 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS; 3335 } 3336 3337 static void init_vcore_to_run(struct kvmppc_vcore *vc) 3338 { 3339 vc->entry_exit_map = 0; 3340 vc->in_guest = 0; 3341 vc->napping_threads = 0; 3342 vc->conferring_threads = 0; 3343 vc->tb_offset_applied = 0; 3344 } 3345 3346 static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip) 3347 { 3348 int n_threads = vc->num_threads; 3349 int sub; 3350 3351 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 3352 return false; 3353 3354 /* In one_vm_per_core mode, require all vcores to be from the same vm */ 3355 if (one_vm_per_core && vc->kvm != cip->vc[0]->kvm) 3356 return false; 3357 3358 if (n_threads < cip->max_subcore_threads) 3359 n_threads = cip->max_subcore_threads; 3360 if (!subcore_config_ok(cip->n_subcores + 1, n_threads)) 3361 return false; 3362 cip->max_subcore_threads = n_threads; 3363 3364 sub = cip->n_subcores; 3365 ++cip->n_subcores; 3366 cip->total_threads += vc->num_threads; 3367 cip->subcore_threads[sub] = vc->num_threads; 3368 cip->vc[sub] = vc; 3369 init_vcore_to_run(vc); 3370 list_del_init(&vc->preempt_list); 3371 3372 return true; 3373 } 3374 3375 /* 3376 * Work out whether it is possible to piggyback the execution of 3377 * vcore *pvc onto the execution of the other vcores described in *cip. 3378 */ 3379 static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip, 3380 int target_threads) 3381 { 3382 if (cip->total_threads + pvc->num_threads > target_threads) 3383 return false; 3384 3385 return can_dynamic_split(pvc, cip); 3386 } 3387 3388 static void prepare_threads(struct kvmppc_vcore *vc) 3389 { 3390 int i; 3391 struct kvm_vcpu *vcpu; 3392 3393 for_each_runnable_thread(i, vcpu, vc) { 3394 if (signal_pending(vcpu->arch.run_task)) 3395 vcpu->arch.ret = -EINTR; 3396 else if (vcpu->arch.vpa.update_pending || 3397 vcpu->arch.slb_shadow.update_pending || 3398 vcpu->arch.dtl.update_pending) 3399 vcpu->arch.ret = RESUME_GUEST; 3400 else 3401 continue; 3402 kvmppc_remove_runnable(vc, vcpu, mftb()); 3403 wake_up(&vcpu->arch.cpu_run); 3404 } 3405 } 3406 3407 static void collect_piggybacks(struct core_info *cip, int target_threads) 3408 { 3409 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 3410 struct kvmppc_vcore *pvc, *vcnext; 3411 3412 spin_lock(&lp->lock); 3413 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) { 3414 if (!spin_trylock(&pvc->lock)) 3415 continue; 3416 prepare_threads(pvc); 3417 if (!pvc->n_runnable || !pvc->kvm->arch.mmu_ready) { 3418 list_del_init(&pvc->preempt_list); 3419 if (pvc->runner == NULL) { 3420 pvc->vcore_state = VCORE_INACTIVE; 3421 kvmppc_core_end_stolen(pvc, mftb()); 3422 } 3423 spin_unlock(&pvc->lock); 3424 continue; 3425 } 3426 if (!can_piggyback(pvc, cip, target_threads)) { 3427 spin_unlock(&pvc->lock); 3428 continue; 3429 } 3430 kvmppc_core_end_stolen(pvc, mftb()); 3431 pvc->vcore_state = VCORE_PIGGYBACK; 3432 if (cip->total_threads >= target_threads) 3433 break; 3434 } 3435 spin_unlock(&lp->lock); 3436 } 3437 3438 static bool recheck_signals_and_mmu(struct core_info *cip) 3439 { 3440 int sub, i; 3441 struct kvm_vcpu *vcpu; 3442 struct kvmppc_vcore *vc; 3443 3444 for (sub = 0; sub < cip->n_subcores; ++sub) { 3445 vc = cip->vc[sub]; 3446 if (!vc->kvm->arch.mmu_ready) 3447 return true; 3448 for_each_runnable_thread(i, vcpu, vc) 3449 if (signal_pending(vcpu->arch.run_task)) 3450 return true; 3451 } 3452 return false; 3453 } 3454 3455 static void post_guest_process(struct kvmppc_vcore *vc, bool is_master) 3456 { 3457 int still_running = 0, i; 3458 u64 now; 3459 long ret; 3460 struct kvm_vcpu *vcpu; 3461 3462 spin_lock(&vc->lock); 3463 now = get_tb(); 3464 for_each_runnable_thread(i, vcpu, vc) { 3465 /* 3466 * It's safe to unlock the vcore in the loop here, because 3467 * for_each_runnable_thread() is safe against removal of 3468 * the vcpu, and the vcore state is VCORE_EXITING here, 3469 * so any vcpus becoming runnable will have their arch.trap 3470 * set to zero and can't actually run in the guest. 3471 */ 3472 spin_unlock(&vc->lock); 3473 /* cancel pending dec exception if dec is positive */ 3474 if (now < kvmppc_dec_expires_host_tb(vcpu) && 3475 kvmppc_core_pending_dec(vcpu)) 3476 kvmppc_core_dequeue_dec(vcpu); 3477 3478 trace_kvm_guest_exit(vcpu); 3479 3480 ret = RESUME_GUEST; 3481 if (vcpu->arch.trap) 3482 ret = kvmppc_handle_exit_hv(vcpu, 3483 vcpu->arch.run_task); 3484 3485 vcpu->arch.ret = ret; 3486 vcpu->arch.trap = 0; 3487 3488 spin_lock(&vc->lock); 3489 if (is_kvmppc_resume_guest(vcpu->arch.ret)) { 3490 if (vcpu->arch.pending_exceptions) 3491 kvmppc_core_prepare_to_enter(vcpu); 3492 if (vcpu->arch.ceded) 3493 kvmppc_set_timer(vcpu); 3494 else 3495 ++still_running; 3496 } else { 3497 kvmppc_remove_runnable(vc, vcpu, mftb()); 3498 wake_up(&vcpu->arch.cpu_run); 3499 } 3500 } 3501 if (!is_master) { 3502 if (still_running > 0) { 3503 kvmppc_vcore_preempt(vc); 3504 } else if (vc->runner) { 3505 vc->vcore_state = VCORE_PREEMPT; 3506 kvmppc_core_start_stolen(vc, mftb()); 3507 } else { 3508 vc->vcore_state = VCORE_INACTIVE; 3509 } 3510 if (vc->n_runnable > 0 && vc->runner == NULL) { 3511 /* make sure there's a candidate runner awake */ 3512 i = -1; 3513 vcpu = next_runnable_thread(vc, &i); 3514 wake_up(&vcpu->arch.cpu_run); 3515 } 3516 } 3517 spin_unlock(&vc->lock); 3518 } 3519 3520 /* 3521 * Clear core from the list of active host cores as we are about to 3522 * enter the guest. Only do this if it is the primary thread of the 3523 * core (not if a subcore) that is entering the guest. 3524 */ 3525 static inline int kvmppc_clear_host_core(unsigned int cpu) 3526 { 3527 int core; 3528 3529 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 3530 return 0; 3531 /* 3532 * Memory barrier can be omitted here as we will do a smp_wmb() 3533 * later in kvmppc_start_thread and we need ensure that state is 3534 * visible to other CPUs only after we enter guest. 3535 */ 3536 core = cpu >> threads_shift; 3537 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0; 3538 return 0; 3539 } 3540 3541 /* 3542 * Advertise this core as an active host core since we exited the guest 3543 * Only need to do this if it is the primary thread of the core that is 3544 * exiting. 3545 */ 3546 static inline int kvmppc_set_host_core(unsigned int cpu) 3547 { 3548 int core; 3549 3550 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 3551 return 0; 3552 3553 /* 3554 * Memory barrier can be omitted here because we do a spin_unlock 3555 * immediately after this which provides the memory barrier. 3556 */ 3557 core = cpu >> threads_shift; 3558 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1; 3559 return 0; 3560 } 3561 3562 static void set_irq_happened(int trap) 3563 { 3564 switch (trap) { 3565 case BOOK3S_INTERRUPT_EXTERNAL: 3566 local_paca->irq_happened |= PACA_IRQ_EE; 3567 break; 3568 case BOOK3S_INTERRUPT_H_DOORBELL: 3569 local_paca->irq_happened |= PACA_IRQ_DBELL; 3570 break; 3571 case BOOK3S_INTERRUPT_HMI: 3572 local_paca->irq_happened |= PACA_IRQ_HMI; 3573 break; 3574 case BOOK3S_INTERRUPT_SYSTEM_RESET: 3575 replay_system_reset(); 3576 break; 3577 } 3578 } 3579 3580 /* 3581 * Run a set of guest threads on a physical core. 3582 * Called with vc->lock held. 3583 */ 3584 static noinline void kvmppc_run_core(struct kvmppc_vcore *vc) 3585 { 3586 struct kvm_vcpu *vcpu; 3587 int i; 3588 int srcu_idx; 3589 struct core_info core_info; 3590 struct kvmppc_vcore *pvc; 3591 struct kvm_split_mode split_info, *sip; 3592 int split, subcore_size, active; 3593 int sub; 3594 bool thr0_done; 3595 unsigned long cmd_bit, stat_bit; 3596 int pcpu, thr; 3597 int target_threads; 3598 int controlled_threads; 3599 int trap; 3600 bool is_power8; 3601 3602 if (WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300))) 3603 return; 3604 3605 /* 3606 * Remove from the list any threads that have a signal pending 3607 * or need a VPA update done 3608 */ 3609 prepare_threads(vc); 3610 3611 /* if the runner is no longer runnable, let the caller pick a new one */ 3612 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE) 3613 return; 3614 3615 /* 3616 * Initialize *vc. 3617 */ 3618 init_vcore_to_run(vc); 3619 vc->preempt_tb = TB_NIL; 3620 3621 /* 3622 * Number of threads that we will be controlling: the same as 3623 * the number of threads per subcore, except on POWER9, 3624 * where it's 1 because the threads are (mostly) independent. 3625 */ 3626 controlled_threads = threads_per_vcore(vc->kvm); 3627 3628 /* 3629 * Make sure we are running on primary threads, and that secondary 3630 * threads are offline. Also check if the number of threads in this 3631 * guest are greater than the current system threads per guest. 3632 */ 3633 if ((controlled_threads > 1) && 3634 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) { 3635 for_each_runnable_thread(i, vcpu, vc) { 3636 vcpu->arch.ret = -EBUSY; 3637 kvmppc_remove_runnable(vc, vcpu, mftb()); 3638 wake_up(&vcpu->arch.cpu_run); 3639 } 3640 goto out; 3641 } 3642 3643 /* 3644 * See if we could run any other vcores on the physical core 3645 * along with this one. 3646 */ 3647 init_core_info(&core_info, vc); 3648 pcpu = smp_processor_id(); 3649 target_threads = controlled_threads; 3650 if (target_smt_mode && target_smt_mode < target_threads) 3651 target_threads = target_smt_mode; 3652 if (vc->num_threads < target_threads) 3653 collect_piggybacks(&core_info, target_threads); 3654 3655 /* 3656 * Hard-disable interrupts, and check resched flag and signals. 3657 * If we need to reschedule or deliver a signal, clean up 3658 * and return without going into the guest(s). 3659 * If the mmu_ready flag has been cleared, don't go into the 3660 * guest because that means a HPT resize operation is in progress. 3661 */ 3662 local_irq_disable(); 3663 hard_irq_disable(); 3664 if (lazy_irq_pending() || need_resched() || 3665 recheck_signals_and_mmu(&core_info)) { 3666 local_irq_enable(); 3667 vc->vcore_state = VCORE_INACTIVE; 3668 /* Unlock all except the primary vcore */ 3669 for (sub = 1; sub < core_info.n_subcores; ++sub) { 3670 pvc = core_info.vc[sub]; 3671 /* Put back on to the preempted vcores list */ 3672 kvmppc_vcore_preempt(pvc); 3673 spin_unlock(&pvc->lock); 3674 } 3675 for (i = 0; i < controlled_threads; ++i) 3676 kvmppc_release_hwthread(pcpu + i); 3677 return; 3678 } 3679 3680 kvmppc_clear_host_core(pcpu); 3681 3682 /* Decide on micro-threading (split-core) mode */ 3683 subcore_size = threads_per_subcore; 3684 cmd_bit = stat_bit = 0; 3685 split = core_info.n_subcores; 3686 sip = NULL; 3687 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S); 3688 3689 if (split > 1) { 3690 sip = &split_info; 3691 memset(&split_info, 0, sizeof(split_info)); 3692 for (sub = 0; sub < core_info.n_subcores; ++sub) 3693 split_info.vc[sub] = core_info.vc[sub]; 3694 3695 if (is_power8) { 3696 if (split == 2 && (dynamic_mt_modes & 2)) { 3697 cmd_bit = HID0_POWER8_1TO2LPAR; 3698 stat_bit = HID0_POWER8_2LPARMODE; 3699 } else { 3700 split = 4; 3701 cmd_bit = HID0_POWER8_1TO4LPAR; 3702 stat_bit = HID0_POWER8_4LPARMODE; 3703 } 3704 subcore_size = MAX_SMT_THREADS / split; 3705 split_info.rpr = mfspr(SPRN_RPR); 3706 split_info.pmmar = mfspr(SPRN_PMMAR); 3707 split_info.ldbar = mfspr(SPRN_LDBAR); 3708 split_info.subcore_size = subcore_size; 3709 } else { 3710 split_info.subcore_size = 1; 3711 } 3712 3713 /* order writes to split_info before kvm_split_mode pointer */ 3714 smp_wmb(); 3715 } 3716 3717 for (thr = 0; thr < controlled_threads; ++thr) { 3718 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3719 3720 paca->kvm_hstate.napping = 0; 3721 paca->kvm_hstate.kvm_split_mode = sip; 3722 } 3723 3724 /* Initiate micro-threading (split-core) on POWER8 if required */ 3725 if (cmd_bit) { 3726 unsigned long hid0 = mfspr(SPRN_HID0); 3727 3728 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS; 3729 mb(); 3730 mtspr(SPRN_HID0, hid0); 3731 isync(); 3732 for (;;) { 3733 hid0 = mfspr(SPRN_HID0); 3734 if (hid0 & stat_bit) 3735 break; 3736 cpu_relax(); 3737 } 3738 } 3739 3740 /* 3741 * On POWER8, set RWMR register. 3742 * Since it only affects PURR and SPURR, it doesn't affect 3743 * the host, so we don't save/restore the host value. 3744 */ 3745 if (is_power8) { 3746 unsigned long rwmr_val = RWMR_RPA_P8_8THREAD; 3747 int n_online = atomic_read(&vc->online_count); 3748 3749 /* 3750 * Use the 8-thread value if we're doing split-core 3751 * or if the vcore's online count looks bogus. 3752 */ 3753 if (split == 1 && threads_per_subcore == MAX_SMT_THREADS && 3754 n_online >= 1 && n_online <= MAX_SMT_THREADS) 3755 rwmr_val = p8_rwmr_values[n_online]; 3756 mtspr(SPRN_RWMR, rwmr_val); 3757 } 3758 3759 /* Start all the threads */ 3760 active = 0; 3761 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3762 thr = is_power8 ? subcore_thread_map[sub] : sub; 3763 thr0_done = false; 3764 active |= 1 << thr; 3765 pvc = core_info.vc[sub]; 3766 pvc->pcpu = pcpu + thr; 3767 for_each_runnable_thread(i, vcpu, pvc) { 3768 kvmppc_start_thread(vcpu, pvc); 3769 kvmppc_create_dtl_entry(vcpu, pvc); 3770 trace_kvm_guest_enter(vcpu); 3771 if (!vcpu->arch.ptid) 3772 thr0_done = true; 3773 active |= 1 << (thr + vcpu->arch.ptid); 3774 } 3775 /* 3776 * We need to start the first thread of each subcore 3777 * even if it doesn't have a vcpu. 3778 */ 3779 if (!thr0_done) 3780 kvmppc_start_thread(NULL, pvc); 3781 } 3782 3783 /* 3784 * Ensure that split_info.do_nap is set after setting 3785 * the vcore pointer in the PACA of the secondaries. 3786 */ 3787 smp_mb(); 3788 3789 /* 3790 * When doing micro-threading, poke the inactive threads as well. 3791 * This gets them to the nap instruction after kvm_do_nap, 3792 * which reduces the time taken to unsplit later. 3793 */ 3794 if (cmd_bit) { 3795 split_info.do_nap = 1; /* ask secondaries to nap when done */ 3796 for (thr = 1; thr < threads_per_subcore; ++thr) 3797 if (!(active & (1 << thr))) 3798 kvmppc_ipi_thread(pcpu + thr); 3799 } 3800 3801 vc->vcore_state = VCORE_RUNNING; 3802 preempt_disable(); 3803 3804 trace_kvmppc_run_core(vc, 0); 3805 3806 for (sub = 0; sub < core_info.n_subcores; ++sub) 3807 spin_unlock(&core_info.vc[sub]->lock); 3808 3809 guest_enter_irqoff(); 3810 3811 srcu_idx = srcu_read_lock(&vc->kvm->srcu); 3812 3813 this_cpu_disable_ftrace(); 3814 3815 /* 3816 * Interrupts will be enabled once we get into the guest, 3817 * so tell lockdep that we're about to enable interrupts. 3818 */ 3819 trace_hardirqs_on(); 3820 3821 trap = __kvmppc_vcore_entry(); 3822 3823 trace_hardirqs_off(); 3824 3825 this_cpu_enable_ftrace(); 3826 3827 srcu_read_unlock(&vc->kvm->srcu, srcu_idx); 3828 3829 set_irq_happened(trap); 3830 3831 spin_lock(&vc->lock); 3832 /* prevent other vcpu threads from doing kvmppc_start_thread() now */ 3833 vc->vcore_state = VCORE_EXITING; 3834 3835 /* wait for secondary threads to finish writing their state to memory */ 3836 kvmppc_wait_for_nap(controlled_threads); 3837 3838 /* Return to whole-core mode if we split the core earlier */ 3839 if (cmd_bit) { 3840 unsigned long hid0 = mfspr(SPRN_HID0); 3841 unsigned long loops = 0; 3842 3843 hid0 &= ~HID0_POWER8_DYNLPARDIS; 3844 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE; 3845 mb(); 3846 mtspr(SPRN_HID0, hid0); 3847 isync(); 3848 for (;;) { 3849 hid0 = mfspr(SPRN_HID0); 3850 if (!(hid0 & stat_bit)) 3851 break; 3852 cpu_relax(); 3853 ++loops; 3854 } 3855 split_info.do_nap = 0; 3856 } 3857 3858 kvmppc_set_host_core(pcpu); 3859 3860 context_tracking_guest_exit(); 3861 if (!vtime_accounting_enabled_this_cpu()) { 3862 local_irq_enable(); 3863 /* 3864 * Service IRQs here before vtime_account_guest_exit() so any 3865 * ticks that occurred while running the guest are accounted to 3866 * the guest. If vtime accounting is enabled, accounting uses 3867 * TB rather than ticks, so it can be done without enabling 3868 * interrupts here, which has the problem that it accounts 3869 * interrupt processing overhead to the host. 3870 */ 3871 local_irq_disable(); 3872 } 3873 vtime_account_guest_exit(); 3874 3875 local_irq_enable(); 3876 3877 /* Let secondaries go back to the offline loop */ 3878 for (i = 0; i < controlled_threads; ++i) { 3879 kvmppc_release_hwthread(pcpu + i); 3880 if (sip && sip->napped[i]) 3881 kvmppc_ipi_thread(pcpu + i); 3882 } 3883 3884 spin_unlock(&vc->lock); 3885 3886 /* make sure updates to secondary vcpu structs are visible now */ 3887 smp_mb(); 3888 3889 preempt_enable(); 3890 3891 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3892 pvc = core_info.vc[sub]; 3893 post_guest_process(pvc, pvc == vc); 3894 } 3895 3896 spin_lock(&vc->lock); 3897 3898 out: 3899 vc->vcore_state = VCORE_INACTIVE; 3900 trace_kvmppc_run_core(vc, 1); 3901 } 3902 3903 static inline bool hcall_is_xics(unsigned long req) 3904 { 3905 return req == H_EOI || req == H_CPPR || req == H_IPI || 3906 req == H_IPOLL || req == H_XIRR || req == H_XIRR_X; 3907 } 3908 3909 static void vcpu_vpa_increment_dispatch(struct kvm_vcpu *vcpu) 3910 { 3911 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3912 if (lp) { 3913 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3914 lp->yield_count = cpu_to_be32(yield_count); 3915 vcpu->arch.vpa.dirty = 1; 3916 } 3917 } 3918 3919 /* call our hypervisor to load up HV regs and go */ 3920 static int kvmhv_vcpu_entry_p9_nested(struct kvm_vcpu *vcpu, u64 time_limit, unsigned long lpcr, u64 *tb) 3921 { 3922 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3923 unsigned long host_psscr; 3924 unsigned long msr; 3925 struct hv_guest_state hvregs; 3926 struct p9_host_os_sprs host_os_sprs; 3927 s64 dec; 3928 int trap; 3929 3930 msr = mfmsr(); 3931 3932 save_p9_host_os_sprs(&host_os_sprs); 3933 3934 /* 3935 * We need to save and restore the guest visible part of the 3936 * psscr (i.e. using SPRN_PSSCR_PR) since the hypervisor 3937 * doesn't do this for us. Note only required if pseries since 3938 * this is done in kvmhv_vcpu_entry_p9() below otherwise. 3939 */ 3940 host_psscr = mfspr(SPRN_PSSCR_PR); 3941 3942 kvmppc_msr_hard_disable_set_facilities(vcpu, msr); 3943 if (lazy_irq_pending()) 3944 return 0; 3945 3946 if (unlikely(load_vcpu_state(vcpu, &host_os_sprs))) 3947 msr = mfmsr(); /* TM restore can update msr */ 3948 3949 if (vcpu->arch.psscr != host_psscr) 3950 mtspr(SPRN_PSSCR_PR, vcpu->arch.psscr); 3951 3952 kvmhv_save_hv_regs(vcpu, &hvregs); 3953 hvregs.lpcr = lpcr; 3954 vcpu->arch.regs.msr = vcpu->arch.shregs.msr; 3955 hvregs.version = HV_GUEST_STATE_VERSION; 3956 if (vcpu->arch.nested) { 3957 hvregs.lpid = vcpu->arch.nested->shadow_lpid; 3958 hvregs.vcpu_token = vcpu->arch.nested_vcpu_id; 3959 } else { 3960 hvregs.lpid = vcpu->kvm->arch.lpid; 3961 hvregs.vcpu_token = vcpu->vcpu_id; 3962 } 3963 hvregs.hdec_expiry = time_limit; 3964 3965 /* 3966 * When setting DEC, we must always deal with irq_work_raise 3967 * via NMI vs setting DEC. The problem occurs right as we 3968 * switch into guest mode if a NMI hits and sets pending work 3969 * and sets DEC, then that will apply to the guest and not 3970 * bring us back to the host. 3971 * 3972 * irq_work_raise could check a flag (or possibly LPCR[HDICE] 3973 * for example) and set HDEC to 1? That wouldn't solve the 3974 * nested hv case which needs to abort the hcall or zero the 3975 * time limit. 3976 * 3977 * XXX: Another day's problem. 3978 */ 3979 mtspr(SPRN_DEC, kvmppc_dec_expires_host_tb(vcpu) - *tb); 3980 3981 mtspr(SPRN_DAR, vcpu->arch.shregs.dar); 3982 mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr); 3983 switch_pmu_to_guest(vcpu, &host_os_sprs); 3984 trap = plpar_hcall_norets(H_ENTER_NESTED, __pa(&hvregs), 3985 __pa(&vcpu->arch.regs)); 3986 kvmhv_restore_hv_return_state(vcpu, &hvregs); 3987 switch_pmu_to_host(vcpu, &host_os_sprs); 3988 vcpu->arch.shregs.msr = vcpu->arch.regs.msr; 3989 vcpu->arch.shregs.dar = mfspr(SPRN_DAR); 3990 vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR); 3991 vcpu->arch.psscr = mfspr(SPRN_PSSCR_PR); 3992 3993 store_vcpu_state(vcpu); 3994 3995 dec = mfspr(SPRN_DEC); 3996 if (!(lpcr & LPCR_LD)) /* Sign extend if not using large decrementer */ 3997 dec = (s32) dec; 3998 *tb = mftb(); 3999 vcpu->arch.dec_expires = dec + (*tb + vc->tb_offset); 4000 4001 timer_rearm_host_dec(*tb); 4002 4003 restore_p9_host_os_sprs(vcpu, &host_os_sprs); 4004 if (vcpu->arch.psscr != host_psscr) 4005 mtspr(SPRN_PSSCR_PR, host_psscr); 4006 4007 return trap; 4008 } 4009 4010 /* 4011 * Guest entry for POWER9 and later CPUs. 4012 */ 4013 static int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit, 4014 unsigned long lpcr, u64 *tb) 4015 { 4016 u64 next_timer; 4017 int trap; 4018 4019 next_timer = timer_get_next_tb(); 4020 if (*tb >= next_timer) 4021 return BOOK3S_INTERRUPT_HV_DECREMENTER; 4022 if (next_timer < time_limit) 4023 time_limit = next_timer; 4024 else if (*tb >= time_limit) /* nested time limit */ 4025 return BOOK3S_INTERRUPT_NESTED_HV_DECREMENTER; 4026 4027 vcpu->arch.ceded = 0; 4028 4029 kvmppc_subcore_enter_guest(); 4030 4031 vcpu_vpa_increment_dispatch(vcpu); 4032 4033 if (kvmhv_on_pseries()) { 4034 trap = kvmhv_vcpu_entry_p9_nested(vcpu, time_limit, lpcr, tb); 4035 4036 /* H_CEDE has to be handled now, not later */ 4037 if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested && 4038 kvmppc_get_gpr(vcpu, 3) == H_CEDE) { 4039 kvmppc_cede(vcpu); 4040 kvmppc_set_gpr(vcpu, 3, 0); 4041 trap = 0; 4042 } 4043 4044 } else { 4045 struct kvm *kvm = vcpu->kvm; 4046 4047 kvmppc_xive_push_vcpu(vcpu); 4048 4049 __this_cpu_write(cpu_in_guest, kvm); 4050 trap = kvmhv_vcpu_entry_p9(vcpu, time_limit, lpcr, tb); 4051 __this_cpu_write(cpu_in_guest, NULL); 4052 4053 if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested && 4054 !(vcpu->arch.shregs.msr & MSR_PR)) { 4055 unsigned long req = kvmppc_get_gpr(vcpu, 3); 4056 4057 /* H_CEDE has to be handled now, not later */ 4058 if (req == H_CEDE) { 4059 kvmppc_cede(vcpu); 4060 kvmppc_xive_rearm_escalation(vcpu); /* may un-cede */ 4061 kvmppc_set_gpr(vcpu, 3, 0); 4062 trap = 0; 4063 4064 /* XICS hcalls must be handled before xive is pulled */ 4065 } else if (hcall_is_xics(req)) { 4066 int ret; 4067 4068 ret = kvmppc_xive_xics_hcall(vcpu, req); 4069 if (ret != H_TOO_HARD) { 4070 kvmppc_set_gpr(vcpu, 3, ret); 4071 trap = 0; 4072 } 4073 } 4074 } 4075 kvmppc_xive_pull_vcpu(vcpu); 4076 4077 if (kvm_is_radix(kvm)) 4078 vcpu->arch.slb_max = 0; 4079 } 4080 4081 vcpu_vpa_increment_dispatch(vcpu); 4082 4083 kvmppc_subcore_exit_guest(); 4084 4085 return trap; 4086 } 4087 4088 /* 4089 * Wait for some other vcpu thread to execute us, and 4090 * wake us up when we need to handle something in the host. 4091 */ 4092 static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc, 4093 struct kvm_vcpu *vcpu, int wait_state) 4094 { 4095 DEFINE_WAIT(wait); 4096 4097 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state); 4098 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 4099 spin_unlock(&vc->lock); 4100 schedule(); 4101 spin_lock(&vc->lock); 4102 } 4103 finish_wait(&vcpu->arch.cpu_run, &wait); 4104 } 4105 4106 static void grow_halt_poll_ns(struct kvmppc_vcore *vc) 4107 { 4108 if (!halt_poll_ns_grow) 4109 return; 4110 4111 vc->halt_poll_ns *= halt_poll_ns_grow; 4112 if (vc->halt_poll_ns < halt_poll_ns_grow_start) 4113 vc->halt_poll_ns = halt_poll_ns_grow_start; 4114 } 4115 4116 static void shrink_halt_poll_ns(struct kvmppc_vcore *vc) 4117 { 4118 if (halt_poll_ns_shrink == 0) 4119 vc->halt_poll_ns = 0; 4120 else 4121 vc->halt_poll_ns /= halt_poll_ns_shrink; 4122 } 4123 4124 #ifdef CONFIG_KVM_XICS 4125 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 4126 { 4127 if (!xics_on_xive()) 4128 return false; 4129 return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr < 4130 vcpu->arch.xive_saved_state.cppr; 4131 } 4132 #else 4133 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 4134 { 4135 return false; 4136 } 4137 #endif /* CONFIG_KVM_XICS */ 4138 4139 static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu) 4140 { 4141 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded || 4142 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu)) 4143 return true; 4144 4145 return false; 4146 } 4147 4148 static bool kvmppc_vcpu_check_block(struct kvm_vcpu *vcpu) 4149 { 4150 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu)) 4151 return true; 4152 return false; 4153 } 4154 4155 /* 4156 * Check to see if any of the runnable vcpus on the vcore have pending 4157 * exceptions or are no longer ceded 4158 */ 4159 static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc) 4160 { 4161 struct kvm_vcpu *vcpu; 4162 int i; 4163 4164 for_each_runnable_thread(i, vcpu, vc) { 4165 if (kvmppc_vcpu_check_block(vcpu)) 4166 return 1; 4167 } 4168 4169 return 0; 4170 } 4171 4172 /* 4173 * All the vcpus in this vcore are idle, so wait for a decrementer 4174 * or external interrupt to one of the vcpus. vc->lock is held. 4175 */ 4176 static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc) 4177 { 4178 ktime_t cur, start_poll, start_wait; 4179 int do_sleep = 1; 4180 u64 block_ns; 4181 4182 WARN_ON_ONCE(cpu_has_feature(CPU_FTR_ARCH_300)); 4183 4184 /* Poll for pending exceptions and ceded state */ 4185 cur = start_poll = ktime_get(); 4186 if (vc->halt_poll_ns) { 4187 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns); 4188 ++vc->runner->stat.generic.halt_attempted_poll; 4189 4190 vc->vcore_state = VCORE_POLLING; 4191 spin_unlock(&vc->lock); 4192 4193 do { 4194 if (kvmppc_vcore_check_block(vc)) { 4195 do_sleep = 0; 4196 break; 4197 } 4198 cur = ktime_get(); 4199 } while (kvm_vcpu_can_poll(cur, stop)); 4200 4201 spin_lock(&vc->lock); 4202 vc->vcore_state = VCORE_INACTIVE; 4203 4204 if (!do_sleep) { 4205 ++vc->runner->stat.generic.halt_successful_poll; 4206 goto out; 4207 } 4208 } 4209 4210 prepare_to_rcuwait(&vc->wait); 4211 set_current_state(TASK_INTERRUPTIBLE); 4212 if (kvmppc_vcore_check_block(vc)) { 4213 finish_rcuwait(&vc->wait); 4214 do_sleep = 0; 4215 /* If we polled, count this as a successful poll */ 4216 if (vc->halt_poll_ns) 4217 ++vc->runner->stat.generic.halt_successful_poll; 4218 goto out; 4219 } 4220 4221 start_wait = ktime_get(); 4222 4223 vc->vcore_state = VCORE_SLEEPING; 4224 trace_kvmppc_vcore_blocked(vc, 0); 4225 spin_unlock(&vc->lock); 4226 schedule(); 4227 finish_rcuwait(&vc->wait); 4228 spin_lock(&vc->lock); 4229 vc->vcore_state = VCORE_INACTIVE; 4230 trace_kvmppc_vcore_blocked(vc, 1); 4231 ++vc->runner->stat.halt_successful_wait; 4232 4233 cur = ktime_get(); 4234 4235 out: 4236 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll); 4237 4238 /* Attribute wait time */ 4239 if (do_sleep) { 4240 vc->runner->stat.generic.halt_wait_ns += 4241 ktime_to_ns(cur) - ktime_to_ns(start_wait); 4242 KVM_STATS_LOG_HIST_UPDATE( 4243 vc->runner->stat.generic.halt_wait_hist, 4244 ktime_to_ns(cur) - ktime_to_ns(start_wait)); 4245 /* Attribute failed poll time */ 4246 if (vc->halt_poll_ns) { 4247 vc->runner->stat.generic.halt_poll_fail_ns += 4248 ktime_to_ns(start_wait) - 4249 ktime_to_ns(start_poll); 4250 KVM_STATS_LOG_HIST_UPDATE( 4251 vc->runner->stat.generic.halt_poll_fail_hist, 4252 ktime_to_ns(start_wait) - 4253 ktime_to_ns(start_poll)); 4254 } 4255 } else { 4256 /* Attribute successful poll time */ 4257 if (vc->halt_poll_ns) { 4258 vc->runner->stat.generic.halt_poll_success_ns += 4259 ktime_to_ns(cur) - 4260 ktime_to_ns(start_poll); 4261 KVM_STATS_LOG_HIST_UPDATE( 4262 vc->runner->stat.generic.halt_poll_success_hist, 4263 ktime_to_ns(cur) - ktime_to_ns(start_poll)); 4264 } 4265 } 4266 4267 /* Adjust poll time */ 4268 if (halt_poll_ns) { 4269 if (block_ns <= vc->halt_poll_ns) 4270 ; 4271 /* We slept and blocked for longer than the max halt time */ 4272 else if (vc->halt_poll_ns && block_ns > halt_poll_ns) 4273 shrink_halt_poll_ns(vc); 4274 /* We slept and our poll time is too small */ 4275 else if (vc->halt_poll_ns < halt_poll_ns && 4276 block_ns < halt_poll_ns) 4277 grow_halt_poll_ns(vc); 4278 if (vc->halt_poll_ns > halt_poll_ns) 4279 vc->halt_poll_ns = halt_poll_ns; 4280 } else 4281 vc->halt_poll_ns = 0; 4282 4283 trace_kvmppc_vcore_wakeup(do_sleep, block_ns); 4284 } 4285 4286 /* 4287 * This never fails for a radix guest, as none of the operations it does 4288 * for a radix guest can fail or have a way to report failure. 4289 */ 4290 static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu) 4291 { 4292 int r = 0; 4293 struct kvm *kvm = vcpu->kvm; 4294 4295 mutex_lock(&kvm->arch.mmu_setup_lock); 4296 if (!kvm->arch.mmu_ready) { 4297 if (!kvm_is_radix(kvm)) 4298 r = kvmppc_hv_setup_htab_rma(vcpu); 4299 if (!r) { 4300 if (cpu_has_feature(CPU_FTR_ARCH_300)) 4301 kvmppc_setup_partition_table(kvm); 4302 kvm->arch.mmu_ready = 1; 4303 } 4304 } 4305 mutex_unlock(&kvm->arch.mmu_setup_lock); 4306 return r; 4307 } 4308 4309 static int kvmppc_run_vcpu(struct kvm_vcpu *vcpu) 4310 { 4311 struct kvm_run *run = vcpu->run; 4312 int n_ceded, i, r; 4313 struct kvmppc_vcore *vc; 4314 struct kvm_vcpu *v; 4315 4316 trace_kvmppc_run_vcpu_enter(vcpu); 4317 4318 run->exit_reason = 0; 4319 vcpu->arch.ret = RESUME_GUEST; 4320 vcpu->arch.trap = 0; 4321 kvmppc_update_vpas(vcpu); 4322 4323 /* 4324 * Synchronize with other threads in this virtual core 4325 */ 4326 vc = vcpu->arch.vcore; 4327 spin_lock(&vc->lock); 4328 vcpu->arch.ceded = 0; 4329 vcpu->arch.run_task = current; 4330 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 4331 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 4332 vcpu->arch.busy_preempt = TB_NIL; 4333 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu); 4334 ++vc->n_runnable; 4335 4336 /* 4337 * This happens the first time this is called for a vcpu. 4338 * If the vcore is already running, we may be able to start 4339 * this thread straight away and have it join in. 4340 */ 4341 if (!signal_pending(current)) { 4342 if ((vc->vcore_state == VCORE_PIGGYBACK || 4343 vc->vcore_state == VCORE_RUNNING) && 4344 !VCORE_IS_EXITING(vc)) { 4345 kvmppc_create_dtl_entry(vcpu, vc); 4346 kvmppc_start_thread(vcpu, vc); 4347 trace_kvm_guest_enter(vcpu); 4348 } else if (vc->vcore_state == VCORE_SLEEPING) { 4349 rcuwait_wake_up(&vc->wait); 4350 } 4351 4352 } 4353 4354 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 4355 !signal_pending(current)) { 4356 /* See if the MMU is ready to go */ 4357 if (!vcpu->kvm->arch.mmu_ready) { 4358 spin_unlock(&vc->lock); 4359 r = kvmhv_setup_mmu(vcpu); 4360 spin_lock(&vc->lock); 4361 if (r) { 4362 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4363 run->fail_entry. 4364 hardware_entry_failure_reason = 0; 4365 vcpu->arch.ret = r; 4366 break; 4367 } 4368 } 4369 4370 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 4371 kvmppc_vcore_end_preempt(vc); 4372 4373 if (vc->vcore_state != VCORE_INACTIVE) { 4374 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE); 4375 continue; 4376 } 4377 for_each_runnable_thread(i, v, vc) { 4378 kvmppc_core_prepare_to_enter(v); 4379 if (signal_pending(v->arch.run_task)) { 4380 kvmppc_remove_runnable(vc, v, mftb()); 4381 v->stat.signal_exits++; 4382 v->run->exit_reason = KVM_EXIT_INTR; 4383 v->arch.ret = -EINTR; 4384 wake_up(&v->arch.cpu_run); 4385 } 4386 } 4387 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 4388 break; 4389 n_ceded = 0; 4390 for_each_runnable_thread(i, v, vc) { 4391 if (!kvmppc_vcpu_woken(v)) 4392 n_ceded += v->arch.ceded; 4393 else 4394 v->arch.ceded = 0; 4395 } 4396 vc->runner = vcpu; 4397 if (n_ceded == vc->n_runnable) { 4398 kvmppc_vcore_blocked(vc); 4399 } else if (need_resched()) { 4400 kvmppc_vcore_preempt(vc); 4401 /* Let something else run */ 4402 cond_resched_lock(&vc->lock); 4403 if (vc->vcore_state == VCORE_PREEMPT) 4404 kvmppc_vcore_end_preempt(vc); 4405 } else { 4406 kvmppc_run_core(vc); 4407 } 4408 vc->runner = NULL; 4409 } 4410 4411 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 4412 (vc->vcore_state == VCORE_RUNNING || 4413 vc->vcore_state == VCORE_EXITING || 4414 vc->vcore_state == VCORE_PIGGYBACK)) 4415 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE); 4416 4417 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 4418 kvmppc_vcore_end_preempt(vc); 4419 4420 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 4421 kvmppc_remove_runnable(vc, vcpu, mftb()); 4422 vcpu->stat.signal_exits++; 4423 run->exit_reason = KVM_EXIT_INTR; 4424 vcpu->arch.ret = -EINTR; 4425 } 4426 4427 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) { 4428 /* Wake up some vcpu to run the core */ 4429 i = -1; 4430 v = next_runnable_thread(vc, &i); 4431 wake_up(&v->arch.cpu_run); 4432 } 4433 4434 trace_kvmppc_run_vcpu_exit(vcpu); 4435 spin_unlock(&vc->lock); 4436 return vcpu->arch.ret; 4437 } 4438 4439 int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit, 4440 unsigned long lpcr) 4441 { 4442 struct kvm_run *run = vcpu->run; 4443 int trap, r, pcpu; 4444 int srcu_idx; 4445 struct kvmppc_vcore *vc; 4446 struct kvm *kvm = vcpu->kvm; 4447 struct kvm_nested_guest *nested = vcpu->arch.nested; 4448 unsigned long flags; 4449 u64 tb; 4450 4451 trace_kvmppc_run_vcpu_enter(vcpu); 4452 4453 run->exit_reason = 0; 4454 vcpu->arch.ret = RESUME_GUEST; 4455 vcpu->arch.trap = 0; 4456 4457 vc = vcpu->arch.vcore; 4458 vcpu->arch.ceded = 0; 4459 vcpu->arch.run_task = current; 4460 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 4461 vcpu->arch.last_inst = KVM_INST_FETCH_FAILED; 4462 4463 /* See if the MMU is ready to go */ 4464 if (unlikely(!kvm->arch.mmu_ready)) { 4465 r = kvmhv_setup_mmu(vcpu); 4466 if (r) { 4467 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4468 run->fail_entry.hardware_entry_failure_reason = 0; 4469 vcpu->arch.ret = r; 4470 return r; 4471 } 4472 } 4473 4474 if (need_resched()) 4475 cond_resched(); 4476 4477 kvmppc_update_vpas(vcpu); 4478 4479 preempt_disable(); 4480 pcpu = smp_processor_id(); 4481 if (kvm_is_radix(kvm)) 4482 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 4483 4484 /* flags save not required, but irq_pmu has no disable/enable API */ 4485 powerpc_local_irq_pmu_save(flags); 4486 4487 if (signal_pending(current)) 4488 goto sigpend; 4489 if (need_resched() || !kvm->arch.mmu_ready) 4490 goto out; 4491 4492 if (!nested) { 4493 kvmppc_core_prepare_to_enter(vcpu); 4494 if (vcpu->arch.doorbell_request) { 4495 vc->dpdes = 1; 4496 smp_wmb(); 4497 vcpu->arch.doorbell_request = 0; 4498 } 4499 if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, 4500 &vcpu->arch.pending_exceptions)) 4501 lpcr |= LPCR_MER; 4502 } else if (vcpu->arch.pending_exceptions || 4503 vcpu->arch.doorbell_request || 4504 xive_interrupt_pending(vcpu)) { 4505 vcpu->arch.ret = RESUME_HOST; 4506 goto out; 4507 } 4508 4509 if (vcpu->arch.timer_running) { 4510 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 4511 vcpu->arch.timer_running = 0; 4512 } 4513 4514 tb = mftb(); 4515 4516 vcpu->cpu = pcpu; 4517 vcpu->arch.thread_cpu = pcpu; 4518 vc->pcpu = pcpu; 4519 local_paca->kvm_hstate.kvm_vcpu = vcpu; 4520 local_paca->kvm_hstate.ptid = 0; 4521 local_paca->kvm_hstate.fake_suspend = 0; 4522 4523 __kvmppc_create_dtl_entry(vcpu, pcpu, tb + vc->tb_offset, 0); 4524 4525 trace_kvm_guest_enter(vcpu); 4526 4527 guest_enter_irqoff(); 4528 4529 srcu_idx = srcu_read_lock(&kvm->srcu); 4530 4531 this_cpu_disable_ftrace(); 4532 4533 /* Tell lockdep that we're about to enable interrupts */ 4534 trace_hardirqs_on(); 4535 4536 trap = kvmhv_p9_guest_entry(vcpu, time_limit, lpcr, &tb); 4537 vcpu->arch.trap = trap; 4538 4539 trace_hardirqs_off(); 4540 4541 this_cpu_enable_ftrace(); 4542 4543 srcu_read_unlock(&kvm->srcu, srcu_idx); 4544 4545 set_irq_happened(trap); 4546 4547 context_tracking_guest_exit(); 4548 if (!vtime_accounting_enabled_this_cpu()) { 4549 local_irq_enable(); 4550 /* 4551 * Service IRQs here before vtime_account_guest_exit() so any 4552 * ticks that occurred while running the guest are accounted to 4553 * the guest. If vtime accounting is enabled, accounting uses 4554 * TB rather than ticks, so it can be done without enabling 4555 * interrupts here, which has the problem that it accounts 4556 * interrupt processing overhead to the host. 4557 */ 4558 local_irq_disable(); 4559 } 4560 vtime_account_guest_exit(); 4561 4562 vcpu->cpu = -1; 4563 vcpu->arch.thread_cpu = -1; 4564 4565 powerpc_local_irq_pmu_restore(flags); 4566 4567 preempt_enable(); 4568 4569 /* 4570 * cancel pending decrementer exception if DEC is now positive, or if 4571 * entering a nested guest in which case the decrementer is now owned 4572 * by L2 and the L1 decrementer is provided in hdec_expires 4573 */ 4574 if (kvmppc_core_pending_dec(vcpu) && 4575 ((tb < kvmppc_dec_expires_host_tb(vcpu)) || 4576 (trap == BOOK3S_INTERRUPT_SYSCALL && 4577 kvmppc_get_gpr(vcpu, 3) == H_ENTER_NESTED))) 4578 kvmppc_core_dequeue_dec(vcpu); 4579 4580 trace_kvm_guest_exit(vcpu); 4581 r = RESUME_GUEST; 4582 if (trap) { 4583 if (!nested) 4584 r = kvmppc_handle_exit_hv(vcpu, current); 4585 else 4586 r = kvmppc_handle_nested_exit(vcpu); 4587 } 4588 vcpu->arch.ret = r; 4589 4590 if (is_kvmppc_resume_guest(r) && !kvmppc_vcpu_check_block(vcpu)) { 4591 kvmppc_set_timer(vcpu); 4592 4593 prepare_to_rcuwait(&vcpu->wait); 4594 for (;;) { 4595 set_current_state(TASK_INTERRUPTIBLE); 4596 if (signal_pending(current)) { 4597 vcpu->stat.signal_exits++; 4598 run->exit_reason = KVM_EXIT_INTR; 4599 vcpu->arch.ret = -EINTR; 4600 break; 4601 } 4602 4603 if (kvmppc_vcpu_check_block(vcpu)) 4604 break; 4605 4606 trace_kvmppc_vcore_blocked(vc, 0); 4607 schedule(); 4608 trace_kvmppc_vcore_blocked(vc, 1); 4609 } 4610 finish_rcuwait(&vcpu->wait); 4611 } 4612 vcpu->arch.ceded = 0; 4613 4614 done: 4615 trace_kvmppc_run_vcpu_exit(vcpu); 4616 4617 return vcpu->arch.ret; 4618 4619 sigpend: 4620 vcpu->stat.signal_exits++; 4621 run->exit_reason = KVM_EXIT_INTR; 4622 vcpu->arch.ret = -EINTR; 4623 out: 4624 powerpc_local_irq_pmu_restore(flags); 4625 preempt_enable(); 4626 goto done; 4627 } 4628 4629 static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu) 4630 { 4631 struct kvm_run *run = vcpu->run; 4632 int r; 4633 int srcu_idx; 4634 struct kvm *kvm; 4635 unsigned long msr; 4636 4637 if (!vcpu->arch.sane) { 4638 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 4639 return -EINVAL; 4640 } 4641 4642 /* No need to go into the guest when all we'll do is come back out */ 4643 if (signal_pending(current)) { 4644 run->exit_reason = KVM_EXIT_INTR; 4645 return -EINTR; 4646 } 4647 4648 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 4649 /* 4650 * Don't allow entry with a suspended transaction, because 4651 * the guest entry/exit code will lose it. 4652 */ 4653 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs && 4654 (current->thread.regs->msr & MSR_TM)) { 4655 if (MSR_TM_ACTIVE(current->thread.regs->msr)) { 4656 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4657 run->fail_entry.hardware_entry_failure_reason = 0; 4658 return -EINVAL; 4659 } 4660 } 4661 #endif 4662 4663 /* 4664 * Force online to 1 for the sake of old userspace which doesn't 4665 * set it. 4666 */ 4667 if (!vcpu->arch.online) { 4668 atomic_inc(&vcpu->arch.vcore->online_count); 4669 vcpu->arch.online = 1; 4670 } 4671 4672 kvmppc_core_prepare_to_enter(vcpu); 4673 4674 kvm = vcpu->kvm; 4675 atomic_inc(&kvm->arch.vcpus_running); 4676 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */ 4677 smp_mb(); 4678 4679 msr = 0; 4680 if (IS_ENABLED(CONFIG_PPC_FPU)) 4681 msr |= MSR_FP; 4682 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 4683 msr |= MSR_VEC; 4684 if (cpu_has_feature(CPU_FTR_VSX)) 4685 msr |= MSR_VSX; 4686 if ((cpu_has_feature(CPU_FTR_TM) || 4687 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) && 4688 (vcpu->arch.hfscr & HFSCR_TM)) 4689 msr |= MSR_TM; 4690 msr = msr_check_and_set(msr); 4691 4692 kvmppc_save_user_regs(); 4693 4694 kvmppc_save_current_sprs(); 4695 4696 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4697 vcpu->arch.waitp = &vcpu->arch.vcore->wait; 4698 vcpu->arch.pgdir = kvm->mm->pgd; 4699 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 4700 4701 do { 4702 if (cpu_has_feature(CPU_FTR_ARCH_300)) 4703 r = kvmhv_run_single_vcpu(vcpu, ~(u64)0, 4704 vcpu->arch.vcore->lpcr); 4705 else 4706 r = kvmppc_run_vcpu(vcpu); 4707 4708 if (run->exit_reason == KVM_EXIT_PAPR_HCALL) { 4709 if (WARN_ON_ONCE(vcpu->arch.shregs.msr & MSR_PR)) { 4710 /* 4711 * These should have been caught reflected 4712 * into the guest by now. Final sanity check: 4713 * don't allow userspace to execute hcalls in 4714 * the hypervisor. 4715 */ 4716 r = RESUME_GUEST; 4717 continue; 4718 } 4719 trace_kvm_hcall_enter(vcpu); 4720 r = kvmppc_pseries_do_hcall(vcpu); 4721 trace_kvm_hcall_exit(vcpu, r); 4722 kvmppc_core_prepare_to_enter(vcpu); 4723 } else if (r == RESUME_PAGE_FAULT) { 4724 srcu_idx = srcu_read_lock(&kvm->srcu); 4725 r = kvmppc_book3s_hv_page_fault(vcpu, 4726 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 4727 srcu_read_unlock(&kvm->srcu, srcu_idx); 4728 } else if (r == RESUME_PASSTHROUGH) { 4729 if (WARN_ON(xics_on_xive())) 4730 r = H_SUCCESS; 4731 else 4732 r = kvmppc_xics_rm_complete(vcpu, 0); 4733 } 4734 } while (is_kvmppc_resume_guest(r)); 4735 4736 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 4737 atomic_dec(&kvm->arch.vcpus_running); 4738 4739 srr_regs_clobbered(); 4740 4741 return r; 4742 } 4743 4744 static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps, 4745 int shift, int sllp) 4746 { 4747 (*sps)->page_shift = shift; 4748 (*sps)->slb_enc = sllp; 4749 (*sps)->enc[0].page_shift = shift; 4750 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift); 4751 /* 4752 * Add 16MB MPSS support (may get filtered out by userspace) 4753 */ 4754 if (shift != 24) { 4755 int penc = kvmppc_pgsize_lp_encoding(shift, 24); 4756 if (penc != -1) { 4757 (*sps)->enc[1].page_shift = 24; 4758 (*sps)->enc[1].pte_enc = penc; 4759 } 4760 } 4761 (*sps)++; 4762 } 4763 4764 static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm, 4765 struct kvm_ppc_smmu_info *info) 4766 { 4767 struct kvm_ppc_one_seg_page_size *sps; 4768 4769 /* 4770 * POWER7, POWER8 and POWER9 all support 32 storage keys for data. 4771 * POWER7 doesn't support keys for instruction accesses, 4772 * POWER8 and POWER9 do. 4773 */ 4774 info->data_keys = 32; 4775 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0; 4776 4777 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */ 4778 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS; 4779 info->slb_size = 32; 4780 4781 /* We only support these sizes for now, and no muti-size segments */ 4782 sps = &info->sps[0]; 4783 kvmppc_add_seg_page_size(&sps, 12, 0); 4784 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01); 4785 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L); 4786 4787 /* If running as a nested hypervisor, we don't support HPT guests */ 4788 if (kvmhv_on_pseries()) 4789 info->flags |= KVM_PPC_NO_HASH; 4790 4791 return 0; 4792 } 4793 4794 /* 4795 * Get (and clear) the dirty memory log for a memory slot. 4796 */ 4797 static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm, 4798 struct kvm_dirty_log *log) 4799 { 4800 struct kvm_memslots *slots; 4801 struct kvm_memory_slot *memslot; 4802 int i, r; 4803 unsigned long n; 4804 unsigned long *buf, *p; 4805 struct kvm_vcpu *vcpu; 4806 4807 mutex_lock(&kvm->slots_lock); 4808 4809 r = -EINVAL; 4810 if (log->slot >= KVM_USER_MEM_SLOTS) 4811 goto out; 4812 4813 slots = kvm_memslots(kvm); 4814 memslot = id_to_memslot(slots, log->slot); 4815 r = -ENOENT; 4816 if (!memslot || !memslot->dirty_bitmap) 4817 goto out; 4818 4819 /* 4820 * Use second half of bitmap area because both HPT and radix 4821 * accumulate bits in the first half. 4822 */ 4823 n = kvm_dirty_bitmap_bytes(memslot); 4824 buf = memslot->dirty_bitmap + n / sizeof(long); 4825 memset(buf, 0, n); 4826 4827 if (kvm_is_radix(kvm)) 4828 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf); 4829 else 4830 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf); 4831 if (r) 4832 goto out; 4833 4834 /* 4835 * We accumulate dirty bits in the first half of the 4836 * memslot's dirty_bitmap area, for when pages are paged 4837 * out or modified by the host directly. Pick up these 4838 * bits and add them to the map. 4839 */ 4840 p = memslot->dirty_bitmap; 4841 for (i = 0; i < n / sizeof(long); ++i) 4842 buf[i] |= xchg(&p[i], 0); 4843 4844 /* Harvest dirty bits from VPA and DTL updates */ 4845 /* Note: we never modify the SLB shadow buffer areas */ 4846 kvm_for_each_vcpu(i, vcpu, kvm) { 4847 spin_lock(&vcpu->arch.vpa_update_lock); 4848 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf); 4849 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf); 4850 spin_unlock(&vcpu->arch.vpa_update_lock); 4851 } 4852 4853 r = -EFAULT; 4854 if (copy_to_user(log->dirty_bitmap, buf, n)) 4855 goto out; 4856 4857 r = 0; 4858 out: 4859 mutex_unlock(&kvm->slots_lock); 4860 return r; 4861 } 4862 4863 static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *slot) 4864 { 4865 vfree(slot->arch.rmap); 4866 slot->arch.rmap = NULL; 4867 } 4868 4869 static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm, 4870 struct kvm_memory_slot *slot, 4871 const struct kvm_userspace_memory_region *mem, 4872 enum kvm_mr_change change) 4873 { 4874 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4875 4876 if (change == KVM_MR_CREATE) { 4877 slot->arch.rmap = vzalloc(array_size(npages, 4878 sizeof(*slot->arch.rmap))); 4879 if (!slot->arch.rmap) 4880 return -ENOMEM; 4881 } 4882 4883 return 0; 4884 } 4885 4886 static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm, 4887 const struct kvm_userspace_memory_region *mem, 4888 const struct kvm_memory_slot *old, 4889 const struct kvm_memory_slot *new, 4890 enum kvm_mr_change change) 4891 { 4892 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4893 4894 /* 4895 * If we are making a new memslot, it might make 4896 * some address that was previously cached as emulated 4897 * MMIO be no longer emulated MMIO, so invalidate 4898 * all the caches of emulated MMIO translations. 4899 */ 4900 if (npages) 4901 atomic64_inc(&kvm->arch.mmio_update); 4902 4903 /* 4904 * For change == KVM_MR_MOVE or KVM_MR_DELETE, higher levels 4905 * have already called kvm_arch_flush_shadow_memslot() to 4906 * flush shadow mappings. For KVM_MR_CREATE we have no 4907 * previous mappings. So the only case to handle is 4908 * KVM_MR_FLAGS_ONLY when the KVM_MEM_LOG_DIRTY_PAGES bit 4909 * has been changed. 4910 * For radix guests, we flush on setting KVM_MEM_LOG_DIRTY_PAGES 4911 * to get rid of any THP PTEs in the partition-scoped page tables 4912 * so we can track dirtiness at the page level; we flush when 4913 * clearing KVM_MEM_LOG_DIRTY_PAGES so that we can go back to 4914 * using THP PTEs. 4915 */ 4916 if (change == KVM_MR_FLAGS_ONLY && kvm_is_radix(kvm) && 4917 ((new->flags ^ old->flags) & KVM_MEM_LOG_DIRTY_PAGES)) 4918 kvmppc_radix_flush_memslot(kvm, old); 4919 /* 4920 * If UV hasn't yet called H_SVM_INIT_START, don't register memslots. 4921 */ 4922 if (!kvm->arch.secure_guest) 4923 return; 4924 4925 switch (change) { 4926 case KVM_MR_CREATE: 4927 /* 4928 * @TODO kvmppc_uvmem_memslot_create() can fail and 4929 * return error. Fix this. 4930 */ 4931 kvmppc_uvmem_memslot_create(kvm, new); 4932 break; 4933 case KVM_MR_DELETE: 4934 kvmppc_uvmem_memslot_delete(kvm, old); 4935 break; 4936 default: 4937 /* TODO: Handle KVM_MR_MOVE */ 4938 break; 4939 } 4940 } 4941 4942 /* 4943 * Update LPCR values in kvm->arch and in vcores. 4944 * Caller must hold kvm->arch.mmu_setup_lock (for mutual exclusion 4945 * of kvm->arch.lpcr update). 4946 */ 4947 void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask) 4948 { 4949 long int i; 4950 u32 cores_done = 0; 4951 4952 if ((kvm->arch.lpcr & mask) == lpcr) 4953 return; 4954 4955 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr; 4956 4957 for (i = 0; i < KVM_MAX_VCORES; ++i) { 4958 struct kvmppc_vcore *vc = kvm->arch.vcores[i]; 4959 if (!vc) 4960 continue; 4961 4962 spin_lock(&vc->lock); 4963 vc->lpcr = (vc->lpcr & ~mask) | lpcr; 4964 verify_lpcr(kvm, vc->lpcr); 4965 spin_unlock(&vc->lock); 4966 if (++cores_done >= kvm->arch.online_vcores) 4967 break; 4968 } 4969 } 4970 4971 void kvmppc_setup_partition_table(struct kvm *kvm) 4972 { 4973 unsigned long dw0, dw1; 4974 4975 if (!kvm_is_radix(kvm)) { 4976 /* PS field - page size for VRMA */ 4977 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) | 4978 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1); 4979 /* HTABSIZE and HTABORG fields */ 4980 dw0 |= kvm->arch.sdr1; 4981 4982 /* Second dword as set by userspace */ 4983 dw1 = kvm->arch.process_table; 4984 } else { 4985 dw0 = PATB_HR | radix__get_tree_size() | 4986 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE; 4987 dw1 = PATB_GR | kvm->arch.process_table; 4988 } 4989 kvmhv_set_ptbl_entry(kvm->arch.lpid, dw0, dw1); 4990 } 4991 4992 /* 4993 * Set up HPT (hashed page table) and RMA (real-mode area). 4994 * Must be called with kvm->arch.mmu_setup_lock held. 4995 */ 4996 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu) 4997 { 4998 int err = 0; 4999 struct kvm *kvm = vcpu->kvm; 5000 unsigned long hva; 5001 struct kvm_memory_slot *memslot; 5002 struct vm_area_struct *vma; 5003 unsigned long lpcr = 0, senc; 5004 unsigned long psize, porder; 5005 int srcu_idx; 5006 5007 /* Allocate hashed page table (if not done already) and reset it */ 5008 if (!kvm->arch.hpt.virt) { 5009 int order = KVM_DEFAULT_HPT_ORDER; 5010 struct kvm_hpt_info info; 5011 5012 err = kvmppc_allocate_hpt(&info, order); 5013 /* If we get here, it means userspace didn't specify a 5014 * size explicitly. So, try successively smaller 5015 * sizes if the default failed. */ 5016 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER) 5017 err = kvmppc_allocate_hpt(&info, order); 5018 5019 if (err < 0) { 5020 pr_err("KVM: Couldn't alloc HPT\n"); 5021 goto out; 5022 } 5023 5024 kvmppc_set_hpt(kvm, &info); 5025 } 5026 5027 /* Look up the memslot for guest physical address 0 */ 5028 srcu_idx = srcu_read_lock(&kvm->srcu); 5029 memslot = gfn_to_memslot(kvm, 0); 5030 5031 /* We must have some memory at 0 by now */ 5032 err = -EINVAL; 5033 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) 5034 goto out_srcu; 5035 5036 /* Look up the VMA for the start of this memory slot */ 5037 hva = memslot->userspace_addr; 5038 mmap_read_lock(kvm->mm); 5039 vma = vma_lookup(kvm->mm, hva); 5040 if (!vma || (vma->vm_flags & VM_IO)) 5041 goto up_out; 5042 5043 psize = vma_kernel_pagesize(vma); 5044 5045 mmap_read_unlock(kvm->mm); 5046 5047 /* We can handle 4k, 64k or 16M pages in the VRMA */ 5048 if (psize >= 0x1000000) 5049 psize = 0x1000000; 5050 else if (psize >= 0x10000) 5051 psize = 0x10000; 5052 else 5053 psize = 0x1000; 5054 porder = __ilog2(psize); 5055 5056 senc = slb_pgsize_encoding(psize); 5057 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T | 5058 (VRMA_VSID << SLB_VSID_SHIFT_1T); 5059 /* Create HPTEs in the hash page table for the VRMA */ 5060 kvmppc_map_vrma(vcpu, memslot, porder); 5061 5062 /* Update VRMASD field in the LPCR */ 5063 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 5064 /* the -4 is to account for senc values starting at 0x10 */ 5065 lpcr = senc << (LPCR_VRMASD_SH - 4); 5066 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD); 5067 } 5068 5069 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */ 5070 smp_wmb(); 5071 err = 0; 5072 out_srcu: 5073 srcu_read_unlock(&kvm->srcu, srcu_idx); 5074 out: 5075 return err; 5076 5077 up_out: 5078 mmap_read_unlock(kvm->mm); 5079 goto out_srcu; 5080 } 5081 5082 /* 5083 * Must be called with kvm->arch.mmu_setup_lock held and 5084 * mmu_ready = 0 and no vcpus running. 5085 */ 5086 int kvmppc_switch_mmu_to_hpt(struct kvm *kvm) 5087 { 5088 unsigned long lpcr, lpcr_mask; 5089 5090 if (nesting_enabled(kvm)) 5091 kvmhv_release_all_nested(kvm); 5092 kvmppc_rmap_reset(kvm); 5093 kvm->arch.process_table = 0; 5094 /* Mutual exclusion with kvm_unmap_gfn_range etc. */ 5095 spin_lock(&kvm->mmu_lock); 5096 kvm->arch.radix = 0; 5097 spin_unlock(&kvm->mmu_lock); 5098 kvmppc_free_radix(kvm); 5099 5100 lpcr = LPCR_VPM1; 5101 lpcr_mask = LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR; 5102 if (cpu_has_feature(CPU_FTR_ARCH_31)) 5103 lpcr_mask |= LPCR_HAIL; 5104 kvmppc_update_lpcr(kvm, lpcr, lpcr_mask); 5105 5106 return 0; 5107 } 5108 5109 /* 5110 * Must be called with kvm->arch.mmu_setup_lock held and 5111 * mmu_ready = 0 and no vcpus running. 5112 */ 5113 int kvmppc_switch_mmu_to_radix(struct kvm *kvm) 5114 { 5115 unsigned long lpcr, lpcr_mask; 5116 int err; 5117 5118 err = kvmppc_init_vm_radix(kvm); 5119 if (err) 5120 return err; 5121 kvmppc_rmap_reset(kvm); 5122 /* Mutual exclusion with kvm_unmap_gfn_range etc. */ 5123 spin_lock(&kvm->mmu_lock); 5124 kvm->arch.radix = 1; 5125 spin_unlock(&kvm->mmu_lock); 5126 kvmppc_free_hpt(&kvm->arch.hpt); 5127 5128 lpcr = LPCR_UPRT | LPCR_GTSE | LPCR_HR; 5129 lpcr_mask = LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR; 5130 if (cpu_has_feature(CPU_FTR_ARCH_31)) { 5131 lpcr_mask |= LPCR_HAIL; 5132 if (cpu_has_feature(CPU_FTR_HVMODE) && 5133 (kvm->arch.host_lpcr & LPCR_HAIL)) 5134 lpcr |= LPCR_HAIL; 5135 } 5136 kvmppc_update_lpcr(kvm, lpcr, lpcr_mask); 5137 5138 return 0; 5139 } 5140 5141 #ifdef CONFIG_KVM_XICS 5142 /* 5143 * Allocate a per-core structure for managing state about which cores are 5144 * running in the host versus the guest and for exchanging data between 5145 * real mode KVM and CPU running in the host. 5146 * This is only done for the first VM. 5147 * The allocated structure stays even if all VMs have stopped. 5148 * It is only freed when the kvm-hv module is unloaded. 5149 * It's OK for this routine to fail, we just don't support host 5150 * core operations like redirecting H_IPI wakeups. 5151 */ 5152 void kvmppc_alloc_host_rm_ops(void) 5153 { 5154 struct kvmppc_host_rm_ops *ops; 5155 unsigned long l_ops; 5156 int cpu, core; 5157 int size; 5158 5159 if (cpu_has_feature(CPU_FTR_ARCH_300)) 5160 return; 5161 5162 /* Not the first time here ? */ 5163 if (kvmppc_host_rm_ops_hv != NULL) 5164 return; 5165 5166 ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL); 5167 if (!ops) 5168 return; 5169 5170 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core); 5171 ops->rm_core = kzalloc(size, GFP_KERNEL); 5172 5173 if (!ops->rm_core) { 5174 kfree(ops); 5175 return; 5176 } 5177 5178 cpus_read_lock(); 5179 5180 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) { 5181 if (!cpu_online(cpu)) 5182 continue; 5183 5184 core = cpu >> threads_shift; 5185 ops->rm_core[core].rm_state.in_host = 1; 5186 } 5187 5188 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv; 5189 5190 /* 5191 * Make the contents of the kvmppc_host_rm_ops structure visible 5192 * to other CPUs before we assign it to the global variable. 5193 * Do an atomic assignment (no locks used here), but if someone 5194 * beats us to it, just free our copy and return. 5195 */ 5196 smp_wmb(); 5197 l_ops = (unsigned long) ops; 5198 5199 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) { 5200 cpus_read_unlock(); 5201 kfree(ops->rm_core); 5202 kfree(ops); 5203 return; 5204 } 5205 5206 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE, 5207 "ppc/kvm_book3s:prepare", 5208 kvmppc_set_host_core, 5209 kvmppc_clear_host_core); 5210 cpus_read_unlock(); 5211 } 5212 5213 void kvmppc_free_host_rm_ops(void) 5214 { 5215 if (kvmppc_host_rm_ops_hv) { 5216 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE); 5217 kfree(kvmppc_host_rm_ops_hv->rm_core); 5218 kfree(kvmppc_host_rm_ops_hv); 5219 kvmppc_host_rm_ops_hv = NULL; 5220 } 5221 } 5222 #endif 5223 5224 static int kvmppc_core_init_vm_hv(struct kvm *kvm) 5225 { 5226 unsigned long lpcr, lpid; 5227 char buf[32]; 5228 int ret; 5229 5230 mutex_init(&kvm->arch.uvmem_lock); 5231 INIT_LIST_HEAD(&kvm->arch.uvmem_pfns); 5232 mutex_init(&kvm->arch.mmu_setup_lock); 5233 5234 /* Allocate the guest's logical partition ID */ 5235 5236 lpid = kvmppc_alloc_lpid(); 5237 if ((long)lpid < 0) 5238 return -ENOMEM; 5239 kvm->arch.lpid = lpid; 5240 5241 kvmppc_alloc_host_rm_ops(); 5242 5243 kvmhv_vm_nested_init(kvm); 5244 5245 /* 5246 * Since we don't flush the TLB when tearing down a VM, 5247 * and this lpid might have previously been used, 5248 * make sure we flush on each core before running the new VM. 5249 * On POWER9, the tlbie in mmu_partition_table_set_entry() 5250 * does this flush for us. 5251 */ 5252 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5253 cpumask_setall(&kvm->arch.need_tlb_flush); 5254 5255 /* Start out with the default set of hcalls enabled */ 5256 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls, 5257 sizeof(kvm->arch.enabled_hcalls)); 5258 5259 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5260 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1); 5261 5262 /* Init LPCR for virtual RMA mode */ 5263 if (cpu_has_feature(CPU_FTR_HVMODE)) { 5264 kvm->arch.host_lpid = mfspr(SPRN_LPID); 5265 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR); 5266 lpcr &= LPCR_PECE | LPCR_LPES; 5267 } else { 5268 lpcr = 0; 5269 } 5270 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE | 5271 LPCR_VPM0 | LPCR_VPM1; 5272 kvm->arch.vrma_slb_v = SLB_VSID_B_1T | 5273 (VRMA_VSID << SLB_VSID_SHIFT_1T); 5274 /* On POWER8 turn on online bit to enable PURR/SPURR */ 5275 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 5276 lpcr |= LPCR_ONL; 5277 /* 5278 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed) 5279 * Set HVICE bit to enable hypervisor virtualization interrupts. 5280 * Set HEIC to prevent OS interrupts to go to hypervisor (should 5281 * be unnecessary but better safe than sorry in case we re-enable 5282 * EE in HV mode with this LPCR still set) 5283 */ 5284 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5285 lpcr &= ~LPCR_VPM0; 5286 lpcr |= LPCR_HVICE | LPCR_HEIC; 5287 5288 /* 5289 * If xive is enabled, we route 0x500 interrupts directly 5290 * to the guest. 5291 */ 5292 if (xics_on_xive()) 5293 lpcr |= LPCR_LPES; 5294 } 5295 5296 /* 5297 * If the host uses radix, the guest starts out as radix. 5298 */ 5299 if (radix_enabled()) { 5300 kvm->arch.radix = 1; 5301 kvm->arch.mmu_ready = 1; 5302 lpcr &= ~LPCR_VPM1; 5303 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR; 5304 if (cpu_has_feature(CPU_FTR_HVMODE) && 5305 cpu_has_feature(CPU_FTR_ARCH_31) && 5306 (kvm->arch.host_lpcr & LPCR_HAIL)) 5307 lpcr |= LPCR_HAIL; 5308 ret = kvmppc_init_vm_radix(kvm); 5309 if (ret) { 5310 kvmppc_free_lpid(kvm->arch.lpid); 5311 return ret; 5312 } 5313 kvmppc_setup_partition_table(kvm); 5314 } 5315 5316 verify_lpcr(kvm, lpcr); 5317 kvm->arch.lpcr = lpcr; 5318 5319 /* Initialization for future HPT resizes */ 5320 kvm->arch.resize_hpt = NULL; 5321 5322 /* 5323 * Work out how many sets the TLB has, for the use of 5324 * the TLB invalidation loop in book3s_hv_rmhandlers.S. 5325 */ 5326 if (cpu_has_feature(CPU_FTR_ARCH_31)) { 5327 /* 5328 * P10 will flush all the congruence class with a single tlbiel 5329 */ 5330 kvm->arch.tlb_sets = 1; 5331 } else if (radix_enabled()) 5332 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */ 5333 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 5334 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */ 5335 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 5336 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */ 5337 else 5338 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */ 5339 5340 /* 5341 * Track that we now have a HV mode VM active. This blocks secondary 5342 * CPU threads from coming online. 5343 */ 5344 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5345 kvm_hv_vm_activated(); 5346 5347 /* 5348 * Initialize smt_mode depending on processor. 5349 * POWER8 and earlier have to use "strict" threading, where 5350 * all vCPUs in a vcore have to run on the same (sub)core, 5351 * whereas on POWER9 the threads can each run a different 5352 * guest. 5353 */ 5354 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5355 kvm->arch.smt_mode = threads_per_subcore; 5356 else 5357 kvm->arch.smt_mode = 1; 5358 kvm->arch.emul_smt_mode = 1; 5359 5360 /* 5361 * Create a debugfs directory for the VM 5362 */ 5363 snprintf(buf, sizeof(buf), "vm%d", current->pid); 5364 kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir); 5365 kvmppc_mmu_debugfs_init(kvm); 5366 if (radix_enabled()) 5367 kvmhv_radix_debugfs_init(kvm); 5368 5369 return 0; 5370 } 5371 5372 static void kvmppc_free_vcores(struct kvm *kvm) 5373 { 5374 long int i; 5375 5376 for (i = 0; i < KVM_MAX_VCORES; ++i) 5377 kfree(kvm->arch.vcores[i]); 5378 kvm->arch.online_vcores = 0; 5379 } 5380 5381 static void kvmppc_core_destroy_vm_hv(struct kvm *kvm) 5382 { 5383 debugfs_remove_recursive(kvm->arch.debugfs_dir); 5384 5385 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5386 kvm_hv_vm_deactivated(); 5387 5388 kvmppc_free_vcores(kvm); 5389 5390 5391 if (kvm_is_radix(kvm)) 5392 kvmppc_free_radix(kvm); 5393 else 5394 kvmppc_free_hpt(&kvm->arch.hpt); 5395 5396 /* Perform global invalidation and return lpid to the pool */ 5397 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5398 if (nesting_enabled(kvm)) 5399 kvmhv_release_all_nested(kvm); 5400 kvm->arch.process_table = 0; 5401 if (kvm->arch.secure_guest) 5402 uv_svm_terminate(kvm->arch.lpid); 5403 kvmhv_set_ptbl_entry(kvm->arch.lpid, 0, 0); 5404 } 5405 5406 kvmppc_free_lpid(kvm->arch.lpid); 5407 5408 kvmppc_free_pimap(kvm); 5409 } 5410 5411 /* We don't need to emulate any privileged instructions or dcbz */ 5412 static int kvmppc_core_emulate_op_hv(struct kvm_vcpu *vcpu, 5413 unsigned int inst, int *advance) 5414 { 5415 return EMULATE_FAIL; 5416 } 5417 5418 static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn, 5419 ulong spr_val) 5420 { 5421 return EMULATE_FAIL; 5422 } 5423 5424 static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn, 5425 ulong *spr_val) 5426 { 5427 return EMULATE_FAIL; 5428 } 5429 5430 static int kvmppc_core_check_processor_compat_hv(void) 5431 { 5432 if (cpu_has_feature(CPU_FTR_HVMODE) && 5433 cpu_has_feature(CPU_FTR_ARCH_206)) 5434 return 0; 5435 5436 /* POWER9 in radix mode is capable of being a nested hypervisor. */ 5437 if (cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled()) 5438 return 0; 5439 5440 return -EIO; 5441 } 5442 5443 #ifdef CONFIG_KVM_XICS 5444 5445 void kvmppc_free_pimap(struct kvm *kvm) 5446 { 5447 kfree(kvm->arch.pimap); 5448 } 5449 5450 static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void) 5451 { 5452 return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL); 5453 } 5454 5455 static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5456 { 5457 struct irq_desc *desc; 5458 struct kvmppc_irq_map *irq_map; 5459 struct kvmppc_passthru_irqmap *pimap; 5460 struct irq_chip *chip; 5461 int i, rc = 0; 5462 struct irq_data *host_data; 5463 5464 if (!kvm_irq_bypass) 5465 return 1; 5466 5467 desc = irq_to_desc(host_irq); 5468 if (!desc) 5469 return -EIO; 5470 5471 mutex_lock(&kvm->lock); 5472 5473 pimap = kvm->arch.pimap; 5474 if (pimap == NULL) { 5475 /* First call, allocate structure to hold IRQ map */ 5476 pimap = kvmppc_alloc_pimap(); 5477 if (pimap == NULL) { 5478 mutex_unlock(&kvm->lock); 5479 return -ENOMEM; 5480 } 5481 kvm->arch.pimap = pimap; 5482 } 5483 5484 /* 5485 * For now, we only support interrupts for which the EOI operation 5486 * is an OPAL call followed by a write to XIRR, since that's 5487 * what our real-mode EOI code does, or a XIVE interrupt 5488 */ 5489 chip = irq_data_get_irq_chip(&desc->irq_data); 5490 if (!chip || !is_pnv_opal_msi(chip)) { 5491 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n", 5492 host_irq, guest_gsi); 5493 mutex_unlock(&kvm->lock); 5494 return -ENOENT; 5495 } 5496 5497 /* 5498 * See if we already have an entry for this guest IRQ number. 5499 * If it's mapped to a hardware IRQ number, that's an error, 5500 * otherwise re-use this entry. 5501 */ 5502 for (i = 0; i < pimap->n_mapped; i++) { 5503 if (guest_gsi == pimap->mapped[i].v_hwirq) { 5504 if (pimap->mapped[i].r_hwirq) { 5505 mutex_unlock(&kvm->lock); 5506 return -EINVAL; 5507 } 5508 break; 5509 } 5510 } 5511 5512 if (i == KVMPPC_PIRQ_MAPPED) { 5513 mutex_unlock(&kvm->lock); 5514 return -EAGAIN; /* table is full */ 5515 } 5516 5517 irq_map = &pimap->mapped[i]; 5518 5519 irq_map->v_hwirq = guest_gsi; 5520 irq_map->desc = desc; 5521 5522 /* 5523 * Order the above two stores before the next to serialize with 5524 * the KVM real mode handler. 5525 */ 5526 smp_wmb(); 5527 5528 /* 5529 * The 'host_irq' number is mapped in the PCI-MSI domain but 5530 * the underlying calls, which will EOI the interrupt in real 5531 * mode, need an HW IRQ number mapped in the XICS IRQ domain. 5532 */ 5533 host_data = irq_domain_get_irq_data(irq_get_default_host(), host_irq); 5534 irq_map->r_hwirq = (unsigned int)irqd_to_hwirq(host_data); 5535 5536 if (i == pimap->n_mapped) 5537 pimap->n_mapped++; 5538 5539 if (xics_on_xive()) 5540 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, host_irq); 5541 else 5542 kvmppc_xics_set_mapped(kvm, guest_gsi, irq_map->r_hwirq); 5543 if (rc) 5544 irq_map->r_hwirq = 0; 5545 5546 mutex_unlock(&kvm->lock); 5547 5548 return 0; 5549 } 5550 5551 static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5552 { 5553 struct irq_desc *desc; 5554 struct kvmppc_passthru_irqmap *pimap; 5555 int i, rc = 0; 5556 5557 if (!kvm_irq_bypass) 5558 return 0; 5559 5560 desc = irq_to_desc(host_irq); 5561 if (!desc) 5562 return -EIO; 5563 5564 mutex_lock(&kvm->lock); 5565 if (!kvm->arch.pimap) 5566 goto unlock; 5567 5568 pimap = kvm->arch.pimap; 5569 5570 for (i = 0; i < pimap->n_mapped; i++) { 5571 if (guest_gsi == pimap->mapped[i].v_hwirq) 5572 break; 5573 } 5574 5575 if (i == pimap->n_mapped) { 5576 mutex_unlock(&kvm->lock); 5577 return -ENODEV; 5578 } 5579 5580 if (xics_on_xive()) 5581 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, host_irq); 5582 else 5583 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq); 5584 5585 /* invalidate the entry (what do do on error from the above ?) */ 5586 pimap->mapped[i].r_hwirq = 0; 5587 5588 /* 5589 * We don't free this structure even when the count goes to 5590 * zero. The structure is freed when we destroy the VM. 5591 */ 5592 unlock: 5593 mutex_unlock(&kvm->lock); 5594 return rc; 5595 } 5596 5597 static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons, 5598 struct irq_bypass_producer *prod) 5599 { 5600 int ret = 0; 5601 struct kvm_kernel_irqfd *irqfd = 5602 container_of(cons, struct kvm_kernel_irqfd, consumer); 5603 5604 irqfd->producer = prod; 5605 5606 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5607 if (ret) 5608 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n", 5609 prod->irq, irqfd->gsi, ret); 5610 5611 return ret; 5612 } 5613 5614 static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons, 5615 struct irq_bypass_producer *prod) 5616 { 5617 int ret; 5618 struct kvm_kernel_irqfd *irqfd = 5619 container_of(cons, struct kvm_kernel_irqfd, consumer); 5620 5621 irqfd->producer = NULL; 5622 5623 /* 5624 * When producer of consumer is unregistered, we change back to 5625 * default external interrupt handling mode - KVM real mode 5626 * will switch back to host. 5627 */ 5628 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5629 if (ret) 5630 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n", 5631 prod->irq, irqfd->gsi, ret); 5632 } 5633 #endif 5634 5635 static long kvm_arch_vm_ioctl_hv(struct file *filp, 5636 unsigned int ioctl, unsigned long arg) 5637 { 5638 struct kvm *kvm __maybe_unused = filp->private_data; 5639 void __user *argp = (void __user *)arg; 5640 long r; 5641 5642 switch (ioctl) { 5643 5644 case KVM_PPC_ALLOCATE_HTAB: { 5645 u32 htab_order; 5646 5647 /* If we're a nested hypervisor, we currently only support radix */ 5648 if (kvmhv_on_pseries()) { 5649 r = -EOPNOTSUPP; 5650 break; 5651 } 5652 5653 r = -EFAULT; 5654 if (get_user(htab_order, (u32 __user *)argp)) 5655 break; 5656 r = kvmppc_alloc_reset_hpt(kvm, htab_order); 5657 if (r) 5658 break; 5659 r = 0; 5660 break; 5661 } 5662 5663 case KVM_PPC_GET_HTAB_FD: { 5664 struct kvm_get_htab_fd ghf; 5665 5666 r = -EFAULT; 5667 if (copy_from_user(&ghf, argp, sizeof(ghf))) 5668 break; 5669 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf); 5670 break; 5671 } 5672 5673 case KVM_PPC_RESIZE_HPT_PREPARE: { 5674 struct kvm_ppc_resize_hpt rhpt; 5675 5676 r = -EFAULT; 5677 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5678 break; 5679 5680 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt); 5681 break; 5682 } 5683 5684 case KVM_PPC_RESIZE_HPT_COMMIT: { 5685 struct kvm_ppc_resize_hpt rhpt; 5686 5687 r = -EFAULT; 5688 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5689 break; 5690 5691 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt); 5692 break; 5693 } 5694 5695 default: 5696 r = -ENOTTY; 5697 } 5698 5699 return r; 5700 } 5701 5702 /* 5703 * List of hcall numbers to enable by default. 5704 * For compatibility with old userspace, we enable by default 5705 * all hcalls that were implemented before the hcall-enabling 5706 * facility was added. Note this list should not include H_RTAS. 5707 */ 5708 static unsigned int default_hcall_list[] = { 5709 H_REMOVE, 5710 H_ENTER, 5711 H_READ, 5712 H_PROTECT, 5713 H_BULK_REMOVE, 5714 #ifdef CONFIG_SPAPR_TCE_IOMMU 5715 H_GET_TCE, 5716 H_PUT_TCE, 5717 #endif 5718 H_SET_DABR, 5719 H_SET_XDABR, 5720 H_CEDE, 5721 H_PROD, 5722 H_CONFER, 5723 H_REGISTER_VPA, 5724 #ifdef CONFIG_KVM_XICS 5725 H_EOI, 5726 H_CPPR, 5727 H_IPI, 5728 H_IPOLL, 5729 H_XIRR, 5730 H_XIRR_X, 5731 #endif 5732 0 5733 }; 5734 5735 static void init_default_hcalls(void) 5736 { 5737 int i; 5738 unsigned int hcall; 5739 5740 for (i = 0; default_hcall_list[i]; ++i) { 5741 hcall = default_hcall_list[i]; 5742 WARN_ON(!kvmppc_hcall_impl_hv(hcall)); 5743 __set_bit(hcall / 4, default_enabled_hcalls); 5744 } 5745 } 5746 5747 static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg) 5748 { 5749 unsigned long lpcr; 5750 int radix; 5751 int err; 5752 5753 /* If not on a POWER9, reject it */ 5754 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5755 return -ENODEV; 5756 5757 /* If any unknown flags set, reject it */ 5758 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE)) 5759 return -EINVAL; 5760 5761 /* GR (guest radix) bit in process_table field must match */ 5762 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX); 5763 if (!!(cfg->process_table & PATB_GR) != radix) 5764 return -EINVAL; 5765 5766 /* Process table size field must be reasonable, i.e. <= 24 */ 5767 if ((cfg->process_table & PRTS_MASK) > 24) 5768 return -EINVAL; 5769 5770 /* We can change a guest to/from radix now, if the host is radix */ 5771 if (radix && !radix_enabled()) 5772 return -EINVAL; 5773 5774 /* If we're a nested hypervisor, we currently only support radix */ 5775 if (kvmhv_on_pseries() && !radix) 5776 return -EINVAL; 5777 5778 mutex_lock(&kvm->arch.mmu_setup_lock); 5779 if (radix != kvm_is_radix(kvm)) { 5780 if (kvm->arch.mmu_ready) { 5781 kvm->arch.mmu_ready = 0; 5782 /* order mmu_ready vs. vcpus_running */ 5783 smp_mb(); 5784 if (atomic_read(&kvm->arch.vcpus_running)) { 5785 kvm->arch.mmu_ready = 1; 5786 err = -EBUSY; 5787 goto out_unlock; 5788 } 5789 } 5790 if (radix) 5791 err = kvmppc_switch_mmu_to_radix(kvm); 5792 else 5793 err = kvmppc_switch_mmu_to_hpt(kvm); 5794 if (err) 5795 goto out_unlock; 5796 } 5797 5798 kvm->arch.process_table = cfg->process_table; 5799 kvmppc_setup_partition_table(kvm); 5800 5801 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0; 5802 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE); 5803 err = 0; 5804 5805 out_unlock: 5806 mutex_unlock(&kvm->arch.mmu_setup_lock); 5807 return err; 5808 } 5809 5810 static int kvmhv_enable_nested(struct kvm *kvm) 5811 { 5812 if (!nested) 5813 return -EPERM; 5814 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5815 return -ENODEV; 5816 if (!radix_enabled()) 5817 return -ENODEV; 5818 5819 /* kvm == NULL means the caller is testing if the capability exists */ 5820 if (kvm) 5821 kvm->arch.nested_enable = true; 5822 return 0; 5823 } 5824 5825 static int kvmhv_load_from_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5826 int size) 5827 { 5828 int rc = -EINVAL; 5829 5830 if (kvmhv_vcpu_is_radix(vcpu)) { 5831 rc = kvmhv_copy_from_guest_radix(vcpu, *eaddr, ptr, size); 5832 5833 if (rc > 0) 5834 rc = -EINVAL; 5835 } 5836 5837 /* For now quadrants are the only way to access nested guest memory */ 5838 if (rc && vcpu->arch.nested) 5839 rc = -EAGAIN; 5840 5841 return rc; 5842 } 5843 5844 static int kvmhv_store_to_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5845 int size) 5846 { 5847 int rc = -EINVAL; 5848 5849 if (kvmhv_vcpu_is_radix(vcpu)) { 5850 rc = kvmhv_copy_to_guest_radix(vcpu, *eaddr, ptr, size); 5851 5852 if (rc > 0) 5853 rc = -EINVAL; 5854 } 5855 5856 /* For now quadrants are the only way to access nested guest memory */ 5857 if (rc && vcpu->arch.nested) 5858 rc = -EAGAIN; 5859 5860 return rc; 5861 } 5862 5863 static void unpin_vpa_reset(struct kvm *kvm, struct kvmppc_vpa *vpa) 5864 { 5865 unpin_vpa(kvm, vpa); 5866 vpa->gpa = 0; 5867 vpa->pinned_addr = NULL; 5868 vpa->dirty = false; 5869 vpa->update_pending = 0; 5870 } 5871 5872 /* 5873 * Enable a guest to become a secure VM, or test whether 5874 * that could be enabled. 5875 * Called when the KVM_CAP_PPC_SECURE_GUEST capability is 5876 * tested (kvm == NULL) or enabled (kvm != NULL). 5877 */ 5878 static int kvmhv_enable_svm(struct kvm *kvm) 5879 { 5880 if (!kvmppc_uvmem_available()) 5881 return -EINVAL; 5882 if (kvm) 5883 kvm->arch.svm_enabled = 1; 5884 return 0; 5885 } 5886 5887 /* 5888 * IOCTL handler to turn off secure mode of guest 5889 * 5890 * - Release all device pages 5891 * - Issue ucall to terminate the guest on the UV side 5892 * - Unpin the VPA pages. 5893 * - Reinit the partition scoped page tables 5894 */ 5895 static int kvmhv_svm_off(struct kvm *kvm) 5896 { 5897 struct kvm_vcpu *vcpu; 5898 int mmu_was_ready; 5899 int srcu_idx; 5900 int ret = 0; 5901 int i; 5902 5903 if (!(kvm->arch.secure_guest & KVMPPC_SECURE_INIT_START)) 5904 return ret; 5905 5906 mutex_lock(&kvm->arch.mmu_setup_lock); 5907 mmu_was_ready = kvm->arch.mmu_ready; 5908 if (kvm->arch.mmu_ready) { 5909 kvm->arch.mmu_ready = 0; 5910 /* order mmu_ready vs. vcpus_running */ 5911 smp_mb(); 5912 if (atomic_read(&kvm->arch.vcpus_running)) { 5913 kvm->arch.mmu_ready = 1; 5914 ret = -EBUSY; 5915 goto out; 5916 } 5917 } 5918 5919 srcu_idx = srcu_read_lock(&kvm->srcu); 5920 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5921 struct kvm_memory_slot *memslot; 5922 struct kvm_memslots *slots = __kvm_memslots(kvm, i); 5923 5924 if (!slots) 5925 continue; 5926 5927 kvm_for_each_memslot(memslot, slots) { 5928 kvmppc_uvmem_drop_pages(memslot, kvm, true); 5929 uv_unregister_mem_slot(kvm->arch.lpid, memslot->id); 5930 } 5931 } 5932 srcu_read_unlock(&kvm->srcu, srcu_idx); 5933 5934 ret = uv_svm_terminate(kvm->arch.lpid); 5935 if (ret != U_SUCCESS) { 5936 ret = -EINVAL; 5937 goto out; 5938 } 5939 5940 /* 5941 * When secure guest is reset, all the guest pages are sent 5942 * to UV via UV_PAGE_IN before the non-boot vcpus get a 5943 * chance to run and unpin their VPA pages. Unpinning of all 5944 * VPA pages is done here explicitly so that VPA pages 5945 * can be migrated to the secure side. 5946 * 5947 * This is required to for the secure SMP guest to reboot 5948 * correctly. 5949 */ 5950 kvm_for_each_vcpu(i, vcpu, kvm) { 5951 spin_lock(&vcpu->arch.vpa_update_lock); 5952 unpin_vpa_reset(kvm, &vcpu->arch.dtl); 5953 unpin_vpa_reset(kvm, &vcpu->arch.slb_shadow); 5954 unpin_vpa_reset(kvm, &vcpu->arch.vpa); 5955 spin_unlock(&vcpu->arch.vpa_update_lock); 5956 } 5957 5958 kvmppc_setup_partition_table(kvm); 5959 kvm->arch.secure_guest = 0; 5960 kvm->arch.mmu_ready = mmu_was_ready; 5961 out: 5962 mutex_unlock(&kvm->arch.mmu_setup_lock); 5963 return ret; 5964 } 5965 5966 static int kvmhv_enable_dawr1(struct kvm *kvm) 5967 { 5968 if (!cpu_has_feature(CPU_FTR_DAWR1)) 5969 return -ENODEV; 5970 5971 /* kvm == NULL means the caller is testing if the capability exists */ 5972 if (kvm) 5973 kvm->arch.dawr1_enabled = true; 5974 return 0; 5975 } 5976 5977 static bool kvmppc_hash_v3_possible(void) 5978 { 5979 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5980 return false; 5981 5982 if (!cpu_has_feature(CPU_FTR_HVMODE)) 5983 return false; 5984 5985 /* 5986 * POWER9 chips before version 2.02 can't have some threads in 5987 * HPT mode and some in radix mode on the same core. 5988 */ 5989 if (radix_enabled()) { 5990 unsigned int pvr = mfspr(SPRN_PVR); 5991 if ((pvr >> 16) == PVR_POWER9 && 5992 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) || 5993 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101))) 5994 return false; 5995 } 5996 5997 return true; 5998 } 5999 6000 static struct kvmppc_ops kvm_ops_hv = { 6001 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv, 6002 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv, 6003 .get_one_reg = kvmppc_get_one_reg_hv, 6004 .set_one_reg = kvmppc_set_one_reg_hv, 6005 .vcpu_load = kvmppc_core_vcpu_load_hv, 6006 .vcpu_put = kvmppc_core_vcpu_put_hv, 6007 .inject_interrupt = kvmppc_inject_interrupt_hv, 6008 .set_msr = kvmppc_set_msr_hv, 6009 .vcpu_run = kvmppc_vcpu_run_hv, 6010 .vcpu_create = kvmppc_core_vcpu_create_hv, 6011 .vcpu_free = kvmppc_core_vcpu_free_hv, 6012 .check_requests = kvmppc_core_check_requests_hv, 6013 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv, 6014 .flush_memslot = kvmppc_core_flush_memslot_hv, 6015 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv, 6016 .commit_memory_region = kvmppc_core_commit_memory_region_hv, 6017 .unmap_gfn_range = kvm_unmap_gfn_range_hv, 6018 .age_gfn = kvm_age_gfn_hv, 6019 .test_age_gfn = kvm_test_age_gfn_hv, 6020 .set_spte_gfn = kvm_set_spte_gfn_hv, 6021 .free_memslot = kvmppc_core_free_memslot_hv, 6022 .init_vm = kvmppc_core_init_vm_hv, 6023 .destroy_vm = kvmppc_core_destroy_vm_hv, 6024 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv, 6025 .emulate_op = kvmppc_core_emulate_op_hv, 6026 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv, 6027 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv, 6028 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv, 6029 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv, 6030 .hcall_implemented = kvmppc_hcall_impl_hv, 6031 #ifdef CONFIG_KVM_XICS 6032 .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv, 6033 .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv, 6034 #endif 6035 .configure_mmu = kvmhv_configure_mmu, 6036 .get_rmmu_info = kvmhv_get_rmmu_info, 6037 .set_smt_mode = kvmhv_set_smt_mode, 6038 .enable_nested = kvmhv_enable_nested, 6039 .load_from_eaddr = kvmhv_load_from_eaddr, 6040 .store_to_eaddr = kvmhv_store_to_eaddr, 6041 .enable_svm = kvmhv_enable_svm, 6042 .svm_off = kvmhv_svm_off, 6043 .enable_dawr1 = kvmhv_enable_dawr1, 6044 .hash_v3_possible = kvmppc_hash_v3_possible, 6045 }; 6046 6047 static int kvm_init_subcore_bitmap(void) 6048 { 6049 int i, j; 6050 int nr_cores = cpu_nr_cores(); 6051 struct sibling_subcore_state *sibling_subcore_state; 6052 6053 for (i = 0; i < nr_cores; i++) { 6054 int first_cpu = i * threads_per_core; 6055 int node = cpu_to_node(first_cpu); 6056 6057 /* Ignore if it is already allocated. */ 6058 if (paca_ptrs[first_cpu]->sibling_subcore_state) 6059 continue; 6060 6061 sibling_subcore_state = 6062 kzalloc_node(sizeof(struct sibling_subcore_state), 6063 GFP_KERNEL, node); 6064 if (!sibling_subcore_state) 6065 return -ENOMEM; 6066 6067 6068 for (j = 0; j < threads_per_core; j++) { 6069 int cpu = first_cpu + j; 6070 6071 paca_ptrs[cpu]->sibling_subcore_state = 6072 sibling_subcore_state; 6073 } 6074 } 6075 return 0; 6076 } 6077 6078 static int kvmppc_radix_possible(void) 6079 { 6080 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled(); 6081 } 6082 6083 static int kvmppc_book3s_init_hv(void) 6084 { 6085 int r; 6086 6087 if (!tlbie_capable) { 6088 pr_err("KVM-HV: Host does not support TLBIE\n"); 6089 return -ENODEV; 6090 } 6091 6092 /* 6093 * FIXME!! Do we need to check on all cpus ? 6094 */ 6095 r = kvmppc_core_check_processor_compat_hv(); 6096 if (r < 0) 6097 return -ENODEV; 6098 6099 r = kvmhv_nested_init(); 6100 if (r) 6101 return r; 6102 6103 r = kvm_init_subcore_bitmap(); 6104 if (r) 6105 return r; 6106 6107 /* 6108 * We need a way of accessing the XICS interrupt controller, 6109 * either directly, via paca_ptrs[cpu]->kvm_hstate.xics_phys, or 6110 * indirectly, via OPAL. 6111 */ 6112 #ifdef CONFIG_SMP 6113 if (!xics_on_xive() && !kvmhv_on_pseries() && 6114 !local_paca->kvm_hstate.xics_phys) { 6115 struct device_node *np; 6116 6117 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc"); 6118 if (!np) { 6119 pr_err("KVM-HV: Cannot determine method for accessing XICS\n"); 6120 return -ENODEV; 6121 } 6122 /* presence of intc confirmed - node can be dropped again */ 6123 of_node_put(np); 6124 } 6125 #endif 6126 6127 kvm_ops_hv.owner = THIS_MODULE; 6128 kvmppc_hv_ops = &kvm_ops_hv; 6129 6130 init_default_hcalls(); 6131 6132 init_vcore_lists(); 6133 6134 r = kvmppc_mmu_hv_init(); 6135 if (r) 6136 return r; 6137 6138 if (kvmppc_radix_possible()) 6139 r = kvmppc_radix_init(); 6140 6141 r = kvmppc_uvmem_init(); 6142 if (r < 0) 6143 pr_err("KVM-HV: kvmppc_uvmem_init failed %d\n", r); 6144 6145 return r; 6146 } 6147 6148 static void kvmppc_book3s_exit_hv(void) 6149 { 6150 kvmppc_uvmem_free(); 6151 kvmppc_free_host_rm_ops(); 6152 if (kvmppc_radix_possible()) 6153 kvmppc_radix_exit(); 6154 kvmppc_hv_ops = NULL; 6155 kvmhv_nested_exit(); 6156 } 6157 6158 module_init(kvmppc_book3s_init_hv); 6159 module_exit(kvmppc_book3s_exit_hv); 6160 MODULE_LICENSE("GPL"); 6161 MODULE_ALIAS_MISCDEV(KVM_MINOR); 6162 MODULE_ALIAS("devname:kvm"); 6163