1 /* 2 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 3 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 4 * 5 * Authors: 6 * Paul Mackerras <paulus@au1.ibm.com> 7 * Alexander Graf <agraf@suse.de> 8 * Kevin Wolf <mail@kevin-wolf.de> 9 * 10 * Description: KVM functions specific to running on Book 3S 11 * processors in hypervisor mode (specifically POWER7 and later). 12 * 13 * This file is derived from arch/powerpc/kvm/book3s.c, 14 * by Alexander Graf <agraf@suse.de>. 15 * 16 * This program is free software; you can redistribute it and/or modify 17 * it under the terms of the GNU General Public License, version 2, as 18 * published by the Free Software Foundation. 19 */ 20 21 #include <linux/kvm_host.h> 22 #include <linux/kernel.h> 23 #include <linux/err.h> 24 #include <linux/slab.h> 25 #include <linux/preempt.h> 26 #include <linux/sched/signal.h> 27 #include <linux/sched/stat.h> 28 #include <linux/delay.h> 29 #include <linux/export.h> 30 #include <linux/fs.h> 31 #include <linux/anon_inodes.h> 32 #include <linux/cpu.h> 33 #include <linux/cpumask.h> 34 #include <linux/spinlock.h> 35 #include <linux/page-flags.h> 36 #include <linux/srcu.h> 37 #include <linux/miscdevice.h> 38 #include <linux/debugfs.h> 39 #include <linux/gfp.h> 40 #include <linux/vmalloc.h> 41 #include <linux/highmem.h> 42 #include <linux/hugetlb.h> 43 #include <linux/kvm_irqfd.h> 44 #include <linux/irqbypass.h> 45 #include <linux/module.h> 46 #include <linux/compiler.h> 47 #include <linux/of.h> 48 49 #include <asm/ftrace.h> 50 #include <asm/reg.h> 51 #include <asm/ppc-opcode.h> 52 #include <asm/asm-prototypes.h> 53 #include <asm/archrandom.h> 54 #include <asm/debug.h> 55 #include <asm/disassemble.h> 56 #include <asm/cputable.h> 57 #include <asm/cacheflush.h> 58 #include <linux/uaccess.h> 59 #include <asm/io.h> 60 #include <asm/kvm_ppc.h> 61 #include <asm/kvm_book3s.h> 62 #include <asm/mmu_context.h> 63 #include <asm/lppaca.h> 64 #include <asm/processor.h> 65 #include <asm/cputhreads.h> 66 #include <asm/page.h> 67 #include <asm/hvcall.h> 68 #include <asm/switch_to.h> 69 #include <asm/smp.h> 70 #include <asm/dbell.h> 71 #include <asm/hmi.h> 72 #include <asm/pnv-pci.h> 73 #include <asm/mmu.h> 74 #include <asm/opal.h> 75 #include <asm/xics.h> 76 #include <asm/xive.h> 77 #include <asm/hw_breakpoint.h> 78 79 #include "book3s.h" 80 81 #define CREATE_TRACE_POINTS 82 #include "trace_hv.h" 83 84 /* #define EXIT_DEBUG */ 85 /* #define EXIT_DEBUG_SIMPLE */ 86 /* #define EXIT_DEBUG_INT */ 87 88 /* Used to indicate that a guest page fault needs to be handled */ 89 #define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1) 90 /* Used to indicate that a guest passthrough interrupt needs to be handled */ 91 #define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2) 92 93 /* Used as a "null" value for timebase values */ 94 #define TB_NIL (~(u64)0) 95 96 static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1); 97 98 static int dynamic_mt_modes = 6; 99 module_param(dynamic_mt_modes, int, 0644); 100 MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)"); 101 static int target_smt_mode; 102 module_param(target_smt_mode, int, 0644); 103 MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)"); 104 105 static bool indep_threads_mode = true; 106 module_param(indep_threads_mode, bool, S_IRUGO | S_IWUSR); 107 MODULE_PARM_DESC(indep_threads_mode, "Independent-threads mode (only on POWER9)"); 108 109 static bool one_vm_per_core; 110 module_param(one_vm_per_core, bool, S_IRUGO | S_IWUSR); 111 MODULE_PARM_DESC(one_vm_per_core, "Only run vCPUs from the same VM on a core (requires indep_threads_mode=N)"); 112 113 #ifdef CONFIG_KVM_XICS 114 static struct kernel_param_ops module_param_ops = { 115 .set = param_set_int, 116 .get = param_get_int, 117 }; 118 119 module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644); 120 MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization"); 121 122 module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644); 123 MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core"); 124 #endif 125 126 /* If set, guests are allowed to create and control nested guests */ 127 static bool nested = true; 128 module_param(nested, bool, S_IRUGO | S_IWUSR); 129 MODULE_PARM_DESC(nested, "Enable nested virtualization (only on POWER9)"); 130 131 static inline bool nesting_enabled(struct kvm *kvm) 132 { 133 return kvm->arch.nested_enable && kvm_is_radix(kvm); 134 } 135 136 /* If set, the threads on each CPU core have to be in the same MMU mode */ 137 static bool no_mixing_hpt_and_radix; 138 139 static void kvmppc_end_cede(struct kvm_vcpu *vcpu); 140 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu); 141 142 /* 143 * RWMR values for POWER8. These control the rate at which PURR 144 * and SPURR count and should be set according to the number of 145 * online threads in the vcore being run. 146 */ 147 #define RWMR_RPA_P8_1THREAD 0x164520C62609AECAUL 148 #define RWMR_RPA_P8_2THREAD 0x7FFF2908450D8DA9UL 149 #define RWMR_RPA_P8_3THREAD 0x164520C62609AECAUL 150 #define RWMR_RPA_P8_4THREAD 0x199A421245058DA9UL 151 #define RWMR_RPA_P8_5THREAD 0x164520C62609AECAUL 152 #define RWMR_RPA_P8_6THREAD 0x164520C62609AECAUL 153 #define RWMR_RPA_P8_7THREAD 0x164520C62609AECAUL 154 #define RWMR_RPA_P8_8THREAD 0x164520C62609AECAUL 155 156 static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = { 157 RWMR_RPA_P8_1THREAD, 158 RWMR_RPA_P8_1THREAD, 159 RWMR_RPA_P8_2THREAD, 160 RWMR_RPA_P8_3THREAD, 161 RWMR_RPA_P8_4THREAD, 162 RWMR_RPA_P8_5THREAD, 163 RWMR_RPA_P8_6THREAD, 164 RWMR_RPA_P8_7THREAD, 165 RWMR_RPA_P8_8THREAD, 166 }; 167 168 static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc, 169 int *ip) 170 { 171 int i = *ip; 172 struct kvm_vcpu *vcpu; 173 174 while (++i < MAX_SMT_THREADS) { 175 vcpu = READ_ONCE(vc->runnable_threads[i]); 176 if (vcpu) { 177 *ip = i; 178 return vcpu; 179 } 180 } 181 return NULL; 182 } 183 184 /* Used to traverse the list of runnable threads for a given vcore */ 185 #define for_each_runnable_thread(i, vcpu, vc) \ 186 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); ) 187 188 static bool kvmppc_ipi_thread(int cpu) 189 { 190 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 191 192 /* If we're a nested hypervisor, fall back to ordinary IPIs for now */ 193 if (kvmhv_on_pseries()) 194 return false; 195 196 /* On POWER9 we can use msgsnd to IPI any cpu */ 197 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 198 msg |= get_hard_smp_processor_id(cpu); 199 smp_mb(); 200 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 201 return true; 202 } 203 204 /* On POWER8 for IPIs to threads in the same core, use msgsnd */ 205 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 206 preempt_disable(); 207 if (cpu_first_thread_sibling(cpu) == 208 cpu_first_thread_sibling(smp_processor_id())) { 209 msg |= cpu_thread_in_core(cpu); 210 smp_mb(); 211 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 212 preempt_enable(); 213 return true; 214 } 215 preempt_enable(); 216 } 217 218 #if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP) 219 if (cpu >= 0 && cpu < nr_cpu_ids) { 220 if (paca_ptrs[cpu]->kvm_hstate.xics_phys) { 221 xics_wake_cpu(cpu); 222 return true; 223 } 224 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY); 225 return true; 226 } 227 #endif 228 229 return false; 230 } 231 232 static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu) 233 { 234 int cpu; 235 struct swait_queue_head *wqp; 236 237 wqp = kvm_arch_vcpu_wq(vcpu); 238 if (swq_has_sleeper(wqp)) { 239 swake_up_one(wqp); 240 ++vcpu->stat.halt_wakeup; 241 } 242 243 cpu = READ_ONCE(vcpu->arch.thread_cpu); 244 if (cpu >= 0 && kvmppc_ipi_thread(cpu)) 245 return; 246 247 /* CPU points to the first thread of the core */ 248 cpu = vcpu->cpu; 249 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu)) 250 smp_send_reschedule(cpu); 251 } 252 253 /* 254 * We use the vcpu_load/put functions to measure stolen time. 255 * Stolen time is counted as time when either the vcpu is able to 256 * run as part of a virtual core, but the task running the vcore 257 * is preempted or sleeping, or when the vcpu needs something done 258 * in the kernel by the task running the vcpu, but that task is 259 * preempted or sleeping. Those two things have to be counted 260 * separately, since one of the vcpu tasks will take on the job 261 * of running the core, and the other vcpu tasks in the vcore will 262 * sleep waiting for it to do that, but that sleep shouldn't count 263 * as stolen time. 264 * 265 * Hence we accumulate stolen time when the vcpu can run as part of 266 * a vcore using vc->stolen_tb, and the stolen time when the vcpu 267 * needs its task to do other things in the kernel (for example, 268 * service a page fault) in busy_stolen. We don't accumulate 269 * stolen time for a vcore when it is inactive, or for a vcpu 270 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of 271 * a misnomer; it means that the vcpu task is not executing in 272 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in 273 * the kernel. We don't have any way of dividing up that time 274 * between time that the vcpu is genuinely stopped, time that 275 * the task is actively working on behalf of the vcpu, and time 276 * that the task is preempted, so we don't count any of it as 277 * stolen. 278 * 279 * Updates to busy_stolen are protected by arch.tbacct_lock; 280 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock 281 * lock. The stolen times are measured in units of timebase ticks. 282 * (Note that the != TB_NIL checks below are purely defensive; 283 * they should never fail.) 284 */ 285 286 static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc) 287 { 288 unsigned long flags; 289 290 spin_lock_irqsave(&vc->stoltb_lock, flags); 291 vc->preempt_tb = mftb(); 292 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 293 } 294 295 static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc) 296 { 297 unsigned long flags; 298 299 spin_lock_irqsave(&vc->stoltb_lock, flags); 300 if (vc->preempt_tb != TB_NIL) { 301 vc->stolen_tb += mftb() - vc->preempt_tb; 302 vc->preempt_tb = TB_NIL; 303 } 304 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 305 } 306 307 static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu) 308 { 309 struct kvmppc_vcore *vc = vcpu->arch.vcore; 310 unsigned long flags; 311 312 /* 313 * We can test vc->runner without taking the vcore lock, 314 * because only this task ever sets vc->runner to this 315 * vcpu, and once it is set to this vcpu, only this task 316 * ever sets it to NULL. 317 */ 318 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 319 kvmppc_core_end_stolen(vc); 320 321 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 322 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST && 323 vcpu->arch.busy_preempt != TB_NIL) { 324 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt; 325 vcpu->arch.busy_preempt = TB_NIL; 326 } 327 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 328 } 329 330 static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu) 331 { 332 struct kvmppc_vcore *vc = vcpu->arch.vcore; 333 unsigned long flags; 334 335 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 336 kvmppc_core_start_stolen(vc); 337 338 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 339 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST) 340 vcpu->arch.busy_preempt = mftb(); 341 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 342 } 343 344 static void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr) 345 { 346 /* 347 * Check for illegal transactional state bit combination 348 * and if we find it, force the TS field to a safe state. 349 */ 350 if ((msr & MSR_TS_MASK) == MSR_TS_MASK) 351 msr &= ~MSR_TS_MASK; 352 vcpu->arch.shregs.msr = msr; 353 kvmppc_end_cede(vcpu); 354 } 355 356 static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr) 357 { 358 vcpu->arch.pvr = pvr; 359 } 360 361 /* Dummy value used in computing PCR value below */ 362 #define PCR_ARCH_300 (PCR_ARCH_207 << 1) 363 364 static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat) 365 { 366 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0; 367 struct kvmppc_vcore *vc = vcpu->arch.vcore; 368 369 /* We can (emulate) our own architecture version and anything older */ 370 if (cpu_has_feature(CPU_FTR_ARCH_300)) 371 host_pcr_bit = PCR_ARCH_300; 372 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 373 host_pcr_bit = PCR_ARCH_207; 374 else if (cpu_has_feature(CPU_FTR_ARCH_206)) 375 host_pcr_bit = PCR_ARCH_206; 376 else 377 host_pcr_bit = PCR_ARCH_205; 378 379 /* Determine lowest PCR bit needed to run guest in given PVR level */ 380 guest_pcr_bit = host_pcr_bit; 381 if (arch_compat) { 382 switch (arch_compat) { 383 case PVR_ARCH_205: 384 guest_pcr_bit = PCR_ARCH_205; 385 break; 386 case PVR_ARCH_206: 387 case PVR_ARCH_206p: 388 guest_pcr_bit = PCR_ARCH_206; 389 break; 390 case PVR_ARCH_207: 391 guest_pcr_bit = PCR_ARCH_207; 392 break; 393 case PVR_ARCH_300: 394 guest_pcr_bit = PCR_ARCH_300; 395 break; 396 default: 397 return -EINVAL; 398 } 399 } 400 401 /* Check requested PCR bits don't exceed our capabilities */ 402 if (guest_pcr_bit > host_pcr_bit) 403 return -EINVAL; 404 405 spin_lock(&vc->lock); 406 vc->arch_compat = arch_compat; 407 /* Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit */ 408 vc->pcr = host_pcr_bit - guest_pcr_bit; 409 spin_unlock(&vc->lock); 410 411 return 0; 412 } 413 414 static void kvmppc_dump_regs(struct kvm_vcpu *vcpu) 415 { 416 int r; 417 418 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id); 419 pr_err("pc = %.16lx msr = %.16llx trap = %x\n", 420 vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap); 421 for (r = 0; r < 16; ++r) 422 pr_err("r%2d = %.16lx r%d = %.16lx\n", 423 r, kvmppc_get_gpr(vcpu, r), 424 r+16, kvmppc_get_gpr(vcpu, r+16)); 425 pr_err("ctr = %.16lx lr = %.16lx\n", 426 vcpu->arch.regs.ctr, vcpu->arch.regs.link); 427 pr_err("srr0 = %.16llx srr1 = %.16llx\n", 428 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1); 429 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n", 430 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1); 431 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n", 432 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3); 433 pr_err("cr = %.8lx xer = %.16lx dsisr = %.8x\n", 434 vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr); 435 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar); 436 pr_err("fault dar = %.16lx dsisr = %.8x\n", 437 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 438 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max); 439 for (r = 0; r < vcpu->arch.slb_max; ++r) 440 pr_err(" ESID = %.16llx VSID = %.16llx\n", 441 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv); 442 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n", 443 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1, 444 vcpu->arch.last_inst); 445 } 446 447 static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id) 448 { 449 struct kvm_vcpu *ret; 450 451 mutex_lock(&kvm->lock); 452 ret = kvm_get_vcpu_by_id(kvm, id); 453 mutex_unlock(&kvm->lock); 454 return ret; 455 } 456 457 static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa) 458 { 459 vpa->__old_status |= LPPACA_OLD_SHARED_PROC; 460 vpa->yield_count = cpu_to_be32(1); 461 } 462 463 static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v, 464 unsigned long addr, unsigned long len) 465 { 466 /* check address is cacheline aligned */ 467 if (addr & (L1_CACHE_BYTES - 1)) 468 return -EINVAL; 469 spin_lock(&vcpu->arch.vpa_update_lock); 470 if (v->next_gpa != addr || v->len != len) { 471 v->next_gpa = addr; 472 v->len = addr ? len : 0; 473 v->update_pending = 1; 474 } 475 spin_unlock(&vcpu->arch.vpa_update_lock); 476 return 0; 477 } 478 479 /* Length for a per-processor buffer is passed in at offset 4 in the buffer */ 480 struct reg_vpa { 481 u32 dummy; 482 union { 483 __be16 hword; 484 __be32 word; 485 } length; 486 }; 487 488 static int vpa_is_registered(struct kvmppc_vpa *vpap) 489 { 490 if (vpap->update_pending) 491 return vpap->next_gpa != 0; 492 return vpap->pinned_addr != NULL; 493 } 494 495 static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu, 496 unsigned long flags, 497 unsigned long vcpuid, unsigned long vpa) 498 { 499 struct kvm *kvm = vcpu->kvm; 500 unsigned long len, nb; 501 void *va; 502 struct kvm_vcpu *tvcpu; 503 int err; 504 int subfunc; 505 struct kvmppc_vpa *vpap; 506 507 tvcpu = kvmppc_find_vcpu(kvm, vcpuid); 508 if (!tvcpu) 509 return H_PARAMETER; 510 511 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK; 512 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL || 513 subfunc == H_VPA_REG_SLB) { 514 /* Registering new area - address must be cache-line aligned */ 515 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa) 516 return H_PARAMETER; 517 518 /* convert logical addr to kernel addr and read length */ 519 va = kvmppc_pin_guest_page(kvm, vpa, &nb); 520 if (va == NULL) 521 return H_PARAMETER; 522 if (subfunc == H_VPA_REG_VPA) 523 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword); 524 else 525 len = be32_to_cpu(((struct reg_vpa *)va)->length.word); 526 kvmppc_unpin_guest_page(kvm, va, vpa, false); 527 528 /* Check length */ 529 if (len > nb || len < sizeof(struct reg_vpa)) 530 return H_PARAMETER; 531 } else { 532 vpa = 0; 533 len = 0; 534 } 535 536 err = H_PARAMETER; 537 vpap = NULL; 538 spin_lock(&tvcpu->arch.vpa_update_lock); 539 540 switch (subfunc) { 541 case H_VPA_REG_VPA: /* register VPA */ 542 /* 543 * The size of our lppaca is 1kB because of the way we align 544 * it for the guest to avoid crossing a 4kB boundary. We only 545 * use 640 bytes of the structure though, so we should accept 546 * clients that set a size of 640. 547 */ 548 BUILD_BUG_ON(sizeof(struct lppaca) != 640); 549 if (len < sizeof(struct lppaca)) 550 break; 551 vpap = &tvcpu->arch.vpa; 552 err = 0; 553 break; 554 555 case H_VPA_REG_DTL: /* register DTL */ 556 if (len < sizeof(struct dtl_entry)) 557 break; 558 len -= len % sizeof(struct dtl_entry); 559 560 /* Check that they have previously registered a VPA */ 561 err = H_RESOURCE; 562 if (!vpa_is_registered(&tvcpu->arch.vpa)) 563 break; 564 565 vpap = &tvcpu->arch.dtl; 566 err = 0; 567 break; 568 569 case H_VPA_REG_SLB: /* register SLB shadow buffer */ 570 /* Check that they have previously registered a VPA */ 571 err = H_RESOURCE; 572 if (!vpa_is_registered(&tvcpu->arch.vpa)) 573 break; 574 575 vpap = &tvcpu->arch.slb_shadow; 576 err = 0; 577 break; 578 579 case H_VPA_DEREG_VPA: /* deregister VPA */ 580 /* Check they don't still have a DTL or SLB buf registered */ 581 err = H_RESOURCE; 582 if (vpa_is_registered(&tvcpu->arch.dtl) || 583 vpa_is_registered(&tvcpu->arch.slb_shadow)) 584 break; 585 586 vpap = &tvcpu->arch.vpa; 587 err = 0; 588 break; 589 590 case H_VPA_DEREG_DTL: /* deregister DTL */ 591 vpap = &tvcpu->arch.dtl; 592 err = 0; 593 break; 594 595 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */ 596 vpap = &tvcpu->arch.slb_shadow; 597 err = 0; 598 break; 599 } 600 601 if (vpap) { 602 vpap->next_gpa = vpa; 603 vpap->len = len; 604 vpap->update_pending = 1; 605 } 606 607 spin_unlock(&tvcpu->arch.vpa_update_lock); 608 609 return err; 610 } 611 612 static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap) 613 { 614 struct kvm *kvm = vcpu->kvm; 615 void *va; 616 unsigned long nb; 617 unsigned long gpa; 618 619 /* 620 * We need to pin the page pointed to by vpap->next_gpa, 621 * but we can't call kvmppc_pin_guest_page under the lock 622 * as it does get_user_pages() and down_read(). So we 623 * have to drop the lock, pin the page, then get the lock 624 * again and check that a new area didn't get registered 625 * in the meantime. 626 */ 627 for (;;) { 628 gpa = vpap->next_gpa; 629 spin_unlock(&vcpu->arch.vpa_update_lock); 630 va = NULL; 631 nb = 0; 632 if (gpa) 633 va = kvmppc_pin_guest_page(kvm, gpa, &nb); 634 spin_lock(&vcpu->arch.vpa_update_lock); 635 if (gpa == vpap->next_gpa) 636 break; 637 /* sigh... unpin that one and try again */ 638 if (va) 639 kvmppc_unpin_guest_page(kvm, va, gpa, false); 640 } 641 642 vpap->update_pending = 0; 643 if (va && nb < vpap->len) { 644 /* 645 * If it's now too short, it must be that userspace 646 * has changed the mappings underlying guest memory, 647 * so unregister the region. 648 */ 649 kvmppc_unpin_guest_page(kvm, va, gpa, false); 650 va = NULL; 651 } 652 if (vpap->pinned_addr) 653 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa, 654 vpap->dirty); 655 vpap->gpa = gpa; 656 vpap->pinned_addr = va; 657 vpap->dirty = false; 658 if (va) 659 vpap->pinned_end = va + vpap->len; 660 } 661 662 static void kvmppc_update_vpas(struct kvm_vcpu *vcpu) 663 { 664 if (!(vcpu->arch.vpa.update_pending || 665 vcpu->arch.slb_shadow.update_pending || 666 vcpu->arch.dtl.update_pending)) 667 return; 668 669 spin_lock(&vcpu->arch.vpa_update_lock); 670 if (vcpu->arch.vpa.update_pending) { 671 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa); 672 if (vcpu->arch.vpa.pinned_addr) 673 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr); 674 } 675 if (vcpu->arch.dtl.update_pending) { 676 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl); 677 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr; 678 vcpu->arch.dtl_index = 0; 679 } 680 if (vcpu->arch.slb_shadow.update_pending) 681 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow); 682 spin_unlock(&vcpu->arch.vpa_update_lock); 683 } 684 685 /* 686 * Return the accumulated stolen time for the vcore up until `now'. 687 * The caller should hold the vcore lock. 688 */ 689 static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now) 690 { 691 u64 p; 692 unsigned long flags; 693 694 spin_lock_irqsave(&vc->stoltb_lock, flags); 695 p = vc->stolen_tb; 696 if (vc->vcore_state != VCORE_INACTIVE && 697 vc->preempt_tb != TB_NIL) 698 p += now - vc->preempt_tb; 699 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 700 return p; 701 } 702 703 static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu, 704 struct kvmppc_vcore *vc) 705 { 706 struct dtl_entry *dt; 707 struct lppaca *vpa; 708 unsigned long stolen; 709 unsigned long core_stolen; 710 u64 now; 711 unsigned long flags; 712 713 dt = vcpu->arch.dtl_ptr; 714 vpa = vcpu->arch.vpa.pinned_addr; 715 now = mftb(); 716 core_stolen = vcore_stolen_time(vc, now); 717 stolen = core_stolen - vcpu->arch.stolen_logged; 718 vcpu->arch.stolen_logged = core_stolen; 719 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 720 stolen += vcpu->arch.busy_stolen; 721 vcpu->arch.busy_stolen = 0; 722 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 723 if (!dt || !vpa) 724 return; 725 memset(dt, 0, sizeof(struct dtl_entry)); 726 dt->dispatch_reason = 7; 727 dt->processor_id = cpu_to_be16(vc->pcpu + vcpu->arch.ptid); 728 dt->timebase = cpu_to_be64(now + vc->tb_offset); 729 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen); 730 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu)); 731 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr); 732 ++dt; 733 if (dt == vcpu->arch.dtl.pinned_end) 734 dt = vcpu->arch.dtl.pinned_addr; 735 vcpu->arch.dtl_ptr = dt; 736 /* order writing *dt vs. writing vpa->dtl_idx */ 737 smp_wmb(); 738 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index); 739 vcpu->arch.dtl.dirty = true; 740 } 741 742 /* See if there is a doorbell interrupt pending for a vcpu */ 743 static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu) 744 { 745 int thr; 746 struct kvmppc_vcore *vc; 747 748 if (vcpu->arch.doorbell_request) 749 return true; 750 /* 751 * Ensure that the read of vcore->dpdes comes after the read 752 * of vcpu->doorbell_request. This barrier matches the 753 * smp_wmb() in kvmppc_guest_entry_inject(). 754 */ 755 smp_rmb(); 756 vc = vcpu->arch.vcore; 757 thr = vcpu->vcpu_id - vc->first_vcpuid; 758 return !!(vc->dpdes & (1 << thr)); 759 } 760 761 static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu) 762 { 763 if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207) 764 return true; 765 if ((!vcpu->arch.vcore->arch_compat) && 766 cpu_has_feature(CPU_FTR_ARCH_207S)) 767 return true; 768 return false; 769 } 770 771 static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags, 772 unsigned long resource, unsigned long value1, 773 unsigned long value2) 774 { 775 switch (resource) { 776 case H_SET_MODE_RESOURCE_SET_CIABR: 777 if (!kvmppc_power8_compatible(vcpu)) 778 return H_P2; 779 if (value2) 780 return H_P4; 781 if (mflags) 782 return H_UNSUPPORTED_FLAG_START; 783 /* Guests can't breakpoint the hypervisor */ 784 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER) 785 return H_P3; 786 vcpu->arch.ciabr = value1; 787 return H_SUCCESS; 788 case H_SET_MODE_RESOURCE_SET_DAWR: 789 if (!kvmppc_power8_compatible(vcpu)) 790 return H_P2; 791 if (!ppc_breakpoint_available()) 792 return H_P2; 793 if (mflags) 794 return H_UNSUPPORTED_FLAG_START; 795 if (value2 & DABRX_HYP) 796 return H_P4; 797 vcpu->arch.dawr = value1; 798 vcpu->arch.dawrx = value2; 799 return H_SUCCESS; 800 default: 801 return H_TOO_HARD; 802 } 803 } 804 805 /* Copy guest memory in place - must reside within a single memslot */ 806 static int kvmppc_copy_guest(struct kvm *kvm, gpa_t to, gpa_t from, 807 unsigned long len) 808 { 809 struct kvm_memory_slot *to_memslot = NULL; 810 struct kvm_memory_slot *from_memslot = NULL; 811 unsigned long to_addr, from_addr; 812 int r; 813 814 /* Get HPA for from address */ 815 from_memslot = gfn_to_memslot(kvm, from >> PAGE_SHIFT); 816 if (!from_memslot) 817 return -EFAULT; 818 if ((from + len) >= ((from_memslot->base_gfn + from_memslot->npages) 819 << PAGE_SHIFT)) 820 return -EINVAL; 821 from_addr = gfn_to_hva_memslot(from_memslot, from >> PAGE_SHIFT); 822 if (kvm_is_error_hva(from_addr)) 823 return -EFAULT; 824 from_addr |= (from & (PAGE_SIZE - 1)); 825 826 /* Get HPA for to address */ 827 to_memslot = gfn_to_memslot(kvm, to >> PAGE_SHIFT); 828 if (!to_memslot) 829 return -EFAULT; 830 if ((to + len) >= ((to_memslot->base_gfn + to_memslot->npages) 831 << PAGE_SHIFT)) 832 return -EINVAL; 833 to_addr = gfn_to_hva_memslot(to_memslot, to >> PAGE_SHIFT); 834 if (kvm_is_error_hva(to_addr)) 835 return -EFAULT; 836 to_addr |= (to & (PAGE_SIZE - 1)); 837 838 /* Perform copy */ 839 r = raw_copy_in_user((void __user *)to_addr, (void __user *)from_addr, 840 len); 841 if (r) 842 return -EFAULT; 843 mark_page_dirty(kvm, to >> PAGE_SHIFT); 844 return 0; 845 } 846 847 static long kvmppc_h_page_init(struct kvm_vcpu *vcpu, unsigned long flags, 848 unsigned long dest, unsigned long src) 849 { 850 u64 pg_sz = SZ_4K; /* 4K page size */ 851 u64 pg_mask = SZ_4K - 1; 852 int ret; 853 854 /* Check for invalid flags (H_PAGE_SET_LOANED covers all CMO flags) */ 855 if (flags & ~(H_ICACHE_INVALIDATE | H_ICACHE_SYNCHRONIZE | 856 H_ZERO_PAGE | H_COPY_PAGE | H_PAGE_SET_LOANED)) 857 return H_PARAMETER; 858 859 /* dest (and src if copy_page flag set) must be page aligned */ 860 if ((dest & pg_mask) || ((flags & H_COPY_PAGE) && (src & pg_mask))) 861 return H_PARAMETER; 862 863 /* zero and/or copy the page as determined by the flags */ 864 if (flags & H_COPY_PAGE) { 865 ret = kvmppc_copy_guest(vcpu->kvm, dest, src, pg_sz); 866 if (ret < 0) 867 return H_PARAMETER; 868 } else if (flags & H_ZERO_PAGE) { 869 ret = kvm_clear_guest(vcpu->kvm, dest, pg_sz); 870 if (ret < 0) 871 return H_PARAMETER; 872 } 873 874 /* We can ignore the remaining flags */ 875 876 return H_SUCCESS; 877 } 878 879 static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target) 880 { 881 struct kvmppc_vcore *vcore = target->arch.vcore; 882 883 /* 884 * We expect to have been called by the real mode handler 885 * (kvmppc_rm_h_confer()) which would have directly returned 886 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may 887 * have useful work to do and should not confer) so we don't 888 * recheck that here. 889 */ 890 891 spin_lock(&vcore->lock); 892 if (target->arch.state == KVMPPC_VCPU_RUNNABLE && 893 vcore->vcore_state != VCORE_INACTIVE && 894 vcore->runner) 895 target = vcore->runner; 896 spin_unlock(&vcore->lock); 897 898 return kvm_vcpu_yield_to(target); 899 } 900 901 static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu) 902 { 903 int yield_count = 0; 904 struct lppaca *lppaca; 905 906 spin_lock(&vcpu->arch.vpa_update_lock); 907 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr; 908 if (lppaca) 909 yield_count = be32_to_cpu(lppaca->yield_count); 910 spin_unlock(&vcpu->arch.vpa_update_lock); 911 return yield_count; 912 } 913 914 int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu) 915 { 916 unsigned long req = kvmppc_get_gpr(vcpu, 3); 917 unsigned long target, ret = H_SUCCESS; 918 int yield_count; 919 struct kvm_vcpu *tvcpu; 920 int idx, rc; 921 922 if (req <= MAX_HCALL_OPCODE && 923 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls)) 924 return RESUME_HOST; 925 926 switch (req) { 927 case H_CEDE: 928 break; 929 case H_PROD: 930 target = kvmppc_get_gpr(vcpu, 4); 931 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target); 932 if (!tvcpu) { 933 ret = H_PARAMETER; 934 break; 935 } 936 tvcpu->arch.prodded = 1; 937 smp_mb(); 938 if (tvcpu->arch.ceded) 939 kvmppc_fast_vcpu_kick_hv(tvcpu); 940 break; 941 case H_CONFER: 942 target = kvmppc_get_gpr(vcpu, 4); 943 if (target == -1) 944 break; 945 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target); 946 if (!tvcpu) { 947 ret = H_PARAMETER; 948 break; 949 } 950 yield_count = kvmppc_get_gpr(vcpu, 5); 951 if (kvmppc_get_yield_count(tvcpu) != yield_count) 952 break; 953 kvm_arch_vcpu_yield_to(tvcpu); 954 break; 955 case H_REGISTER_VPA: 956 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4), 957 kvmppc_get_gpr(vcpu, 5), 958 kvmppc_get_gpr(vcpu, 6)); 959 break; 960 case H_RTAS: 961 if (list_empty(&vcpu->kvm->arch.rtas_tokens)) 962 return RESUME_HOST; 963 964 idx = srcu_read_lock(&vcpu->kvm->srcu); 965 rc = kvmppc_rtas_hcall(vcpu); 966 srcu_read_unlock(&vcpu->kvm->srcu, idx); 967 968 if (rc == -ENOENT) 969 return RESUME_HOST; 970 else if (rc == 0) 971 break; 972 973 /* Send the error out to userspace via KVM_RUN */ 974 return rc; 975 case H_LOGICAL_CI_LOAD: 976 ret = kvmppc_h_logical_ci_load(vcpu); 977 if (ret == H_TOO_HARD) 978 return RESUME_HOST; 979 break; 980 case H_LOGICAL_CI_STORE: 981 ret = kvmppc_h_logical_ci_store(vcpu); 982 if (ret == H_TOO_HARD) 983 return RESUME_HOST; 984 break; 985 case H_SET_MODE: 986 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4), 987 kvmppc_get_gpr(vcpu, 5), 988 kvmppc_get_gpr(vcpu, 6), 989 kvmppc_get_gpr(vcpu, 7)); 990 if (ret == H_TOO_HARD) 991 return RESUME_HOST; 992 break; 993 case H_XIRR: 994 case H_CPPR: 995 case H_EOI: 996 case H_IPI: 997 case H_IPOLL: 998 case H_XIRR_X: 999 if (kvmppc_xics_enabled(vcpu)) { 1000 if (xics_on_xive()) { 1001 ret = H_NOT_AVAILABLE; 1002 return RESUME_GUEST; 1003 } 1004 ret = kvmppc_xics_hcall(vcpu, req); 1005 break; 1006 } 1007 return RESUME_HOST; 1008 case H_SET_DABR: 1009 ret = kvmppc_h_set_dabr(vcpu, kvmppc_get_gpr(vcpu, 4)); 1010 break; 1011 case H_SET_XDABR: 1012 ret = kvmppc_h_set_xdabr(vcpu, kvmppc_get_gpr(vcpu, 4), 1013 kvmppc_get_gpr(vcpu, 5)); 1014 break; 1015 #ifdef CONFIG_SPAPR_TCE_IOMMU 1016 case H_GET_TCE: 1017 ret = kvmppc_h_get_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1018 kvmppc_get_gpr(vcpu, 5)); 1019 if (ret == H_TOO_HARD) 1020 return RESUME_HOST; 1021 break; 1022 case H_PUT_TCE: 1023 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1024 kvmppc_get_gpr(vcpu, 5), 1025 kvmppc_get_gpr(vcpu, 6)); 1026 if (ret == H_TOO_HARD) 1027 return RESUME_HOST; 1028 break; 1029 case H_PUT_TCE_INDIRECT: 1030 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4), 1031 kvmppc_get_gpr(vcpu, 5), 1032 kvmppc_get_gpr(vcpu, 6), 1033 kvmppc_get_gpr(vcpu, 7)); 1034 if (ret == H_TOO_HARD) 1035 return RESUME_HOST; 1036 break; 1037 case H_STUFF_TCE: 1038 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1039 kvmppc_get_gpr(vcpu, 5), 1040 kvmppc_get_gpr(vcpu, 6), 1041 kvmppc_get_gpr(vcpu, 7)); 1042 if (ret == H_TOO_HARD) 1043 return RESUME_HOST; 1044 break; 1045 #endif 1046 case H_RANDOM: 1047 if (!powernv_get_random_long(&vcpu->arch.regs.gpr[4])) 1048 ret = H_HARDWARE; 1049 break; 1050 1051 case H_SET_PARTITION_TABLE: 1052 ret = H_FUNCTION; 1053 if (nesting_enabled(vcpu->kvm)) 1054 ret = kvmhv_set_partition_table(vcpu); 1055 break; 1056 case H_ENTER_NESTED: 1057 ret = H_FUNCTION; 1058 if (!nesting_enabled(vcpu->kvm)) 1059 break; 1060 ret = kvmhv_enter_nested_guest(vcpu); 1061 if (ret == H_INTERRUPT) { 1062 kvmppc_set_gpr(vcpu, 3, 0); 1063 vcpu->arch.hcall_needed = 0; 1064 return -EINTR; 1065 } else if (ret == H_TOO_HARD) { 1066 kvmppc_set_gpr(vcpu, 3, 0); 1067 vcpu->arch.hcall_needed = 0; 1068 return RESUME_HOST; 1069 } 1070 break; 1071 case H_TLB_INVALIDATE: 1072 ret = H_FUNCTION; 1073 if (nesting_enabled(vcpu->kvm)) 1074 ret = kvmhv_do_nested_tlbie(vcpu); 1075 break; 1076 case H_COPY_TOFROM_GUEST: 1077 ret = H_FUNCTION; 1078 if (nesting_enabled(vcpu->kvm)) 1079 ret = kvmhv_copy_tofrom_guest_nested(vcpu); 1080 break; 1081 case H_PAGE_INIT: 1082 ret = kvmppc_h_page_init(vcpu, kvmppc_get_gpr(vcpu, 4), 1083 kvmppc_get_gpr(vcpu, 5), 1084 kvmppc_get_gpr(vcpu, 6)); 1085 break; 1086 default: 1087 return RESUME_HOST; 1088 } 1089 kvmppc_set_gpr(vcpu, 3, ret); 1090 vcpu->arch.hcall_needed = 0; 1091 return RESUME_GUEST; 1092 } 1093 1094 /* 1095 * Handle H_CEDE in the nested virtualization case where we haven't 1096 * called the real-mode hcall handlers in book3s_hv_rmhandlers.S. 1097 * This has to be done early, not in kvmppc_pseries_do_hcall(), so 1098 * that the cede logic in kvmppc_run_single_vcpu() works properly. 1099 */ 1100 static void kvmppc_nested_cede(struct kvm_vcpu *vcpu) 1101 { 1102 vcpu->arch.shregs.msr |= MSR_EE; 1103 vcpu->arch.ceded = 1; 1104 smp_mb(); 1105 if (vcpu->arch.prodded) { 1106 vcpu->arch.prodded = 0; 1107 smp_mb(); 1108 vcpu->arch.ceded = 0; 1109 } 1110 } 1111 1112 static int kvmppc_hcall_impl_hv(unsigned long cmd) 1113 { 1114 switch (cmd) { 1115 case H_CEDE: 1116 case H_PROD: 1117 case H_CONFER: 1118 case H_REGISTER_VPA: 1119 case H_SET_MODE: 1120 case H_LOGICAL_CI_LOAD: 1121 case H_LOGICAL_CI_STORE: 1122 #ifdef CONFIG_KVM_XICS 1123 case H_XIRR: 1124 case H_CPPR: 1125 case H_EOI: 1126 case H_IPI: 1127 case H_IPOLL: 1128 case H_XIRR_X: 1129 #endif 1130 case H_PAGE_INIT: 1131 return 1; 1132 } 1133 1134 /* See if it's in the real-mode table */ 1135 return kvmppc_hcall_impl_hv_realmode(cmd); 1136 } 1137 1138 static int kvmppc_emulate_debug_inst(struct kvm_run *run, 1139 struct kvm_vcpu *vcpu) 1140 { 1141 u32 last_inst; 1142 1143 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) != 1144 EMULATE_DONE) { 1145 /* 1146 * Fetch failed, so return to guest and 1147 * try executing it again. 1148 */ 1149 return RESUME_GUEST; 1150 } 1151 1152 if (last_inst == KVMPPC_INST_SW_BREAKPOINT) { 1153 run->exit_reason = KVM_EXIT_DEBUG; 1154 run->debug.arch.address = kvmppc_get_pc(vcpu); 1155 return RESUME_HOST; 1156 } else { 1157 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1158 return RESUME_GUEST; 1159 } 1160 } 1161 1162 static void do_nothing(void *x) 1163 { 1164 } 1165 1166 static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu) 1167 { 1168 int thr, cpu, pcpu, nthreads; 1169 struct kvm_vcpu *v; 1170 unsigned long dpdes; 1171 1172 nthreads = vcpu->kvm->arch.emul_smt_mode; 1173 dpdes = 0; 1174 cpu = vcpu->vcpu_id & ~(nthreads - 1); 1175 for (thr = 0; thr < nthreads; ++thr, ++cpu) { 1176 v = kvmppc_find_vcpu(vcpu->kvm, cpu); 1177 if (!v) 1178 continue; 1179 /* 1180 * If the vcpu is currently running on a physical cpu thread, 1181 * interrupt it in order to pull it out of the guest briefly, 1182 * which will update its vcore->dpdes value. 1183 */ 1184 pcpu = READ_ONCE(v->cpu); 1185 if (pcpu >= 0) 1186 smp_call_function_single(pcpu, do_nothing, NULL, 1); 1187 if (kvmppc_doorbell_pending(v)) 1188 dpdes |= 1 << thr; 1189 } 1190 return dpdes; 1191 } 1192 1193 /* 1194 * On POWER9, emulate doorbell-related instructions in order to 1195 * give the guest the illusion of running on a multi-threaded core. 1196 * The instructions emulated are msgsndp, msgclrp, mfspr TIR, 1197 * and mfspr DPDES. 1198 */ 1199 static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu) 1200 { 1201 u32 inst, rb, thr; 1202 unsigned long arg; 1203 struct kvm *kvm = vcpu->kvm; 1204 struct kvm_vcpu *tvcpu; 1205 1206 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE) 1207 return RESUME_GUEST; 1208 if (get_op(inst) != 31) 1209 return EMULATE_FAIL; 1210 rb = get_rb(inst); 1211 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1); 1212 switch (get_xop(inst)) { 1213 case OP_31_XOP_MSGSNDP: 1214 arg = kvmppc_get_gpr(vcpu, rb); 1215 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER) 1216 break; 1217 arg &= 0x3f; 1218 if (arg >= kvm->arch.emul_smt_mode) 1219 break; 1220 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg); 1221 if (!tvcpu) 1222 break; 1223 if (!tvcpu->arch.doorbell_request) { 1224 tvcpu->arch.doorbell_request = 1; 1225 kvmppc_fast_vcpu_kick_hv(tvcpu); 1226 } 1227 break; 1228 case OP_31_XOP_MSGCLRP: 1229 arg = kvmppc_get_gpr(vcpu, rb); 1230 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER) 1231 break; 1232 vcpu->arch.vcore->dpdes = 0; 1233 vcpu->arch.doorbell_request = 0; 1234 break; 1235 case OP_31_XOP_MFSPR: 1236 switch (get_sprn(inst)) { 1237 case SPRN_TIR: 1238 arg = thr; 1239 break; 1240 case SPRN_DPDES: 1241 arg = kvmppc_read_dpdes(vcpu); 1242 break; 1243 default: 1244 return EMULATE_FAIL; 1245 } 1246 kvmppc_set_gpr(vcpu, get_rt(inst), arg); 1247 break; 1248 default: 1249 return EMULATE_FAIL; 1250 } 1251 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4); 1252 return RESUME_GUEST; 1253 } 1254 1255 static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu, 1256 struct task_struct *tsk) 1257 { 1258 int r = RESUME_HOST; 1259 1260 vcpu->stat.sum_exits++; 1261 1262 /* 1263 * This can happen if an interrupt occurs in the last stages 1264 * of guest entry or the first stages of guest exit (i.e. after 1265 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1266 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1267 * That can happen due to a bug, or due to a machine check 1268 * occurring at just the wrong time. 1269 */ 1270 if (vcpu->arch.shregs.msr & MSR_HV) { 1271 printk(KERN_EMERG "KVM trap in HV mode!\n"); 1272 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1273 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1274 vcpu->arch.shregs.msr); 1275 kvmppc_dump_regs(vcpu); 1276 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1277 run->hw.hardware_exit_reason = vcpu->arch.trap; 1278 return RESUME_HOST; 1279 } 1280 run->exit_reason = KVM_EXIT_UNKNOWN; 1281 run->ready_for_interrupt_injection = 1; 1282 switch (vcpu->arch.trap) { 1283 /* We're good on these - the host merely wanted to get our attention */ 1284 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1285 vcpu->stat.dec_exits++; 1286 r = RESUME_GUEST; 1287 break; 1288 case BOOK3S_INTERRUPT_EXTERNAL: 1289 case BOOK3S_INTERRUPT_H_DOORBELL: 1290 case BOOK3S_INTERRUPT_H_VIRT: 1291 vcpu->stat.ext_intr_exits++; 1292 r = RESUME_GUEST; 1293 break; 1294 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1295 case BOOK3S_INTERRUPT_HMI: 1296 case BOOK3S_INTERRUPT_PERFMON: 1297 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1298 r = RESUME_GUEST; 1299 break; 1300 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1301 /* Print the MCE event to host console. */ 1302 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true); 1303 1304 /* 1305 * If the guest can do FWNMI, exit to userspace so it can 1306 * deliver a FWNMI to the guest. 1307 * Otherwise we synthesize a machine check for the guest 1308 * so that it knows that the machine check occurred. 1309 */ 1310 if (!vcpu->kvm->arch.fwnmi_enabled) { 1311 ulong flags = vcpu->arch.shregs.msr & 0x083c0000; 1312 kvmppc_core_queue_machine_check(vcpu, flags); 1313 r = RESUME_GUEST; 1314 break; 1315 } 1316 1317 /* Exit to guest with KVM_EXIT_NMI as exit reason */ 1318 run->exit_reason = KVM_EXIT_NMI; 1319 run->hw.hardware_exit_reason = vcpu->arch.trap; 1320 /* Clear out the old NMI status from run->flags */ 1321 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK; 1322 /* Now set the NMI status */ 1323 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED) 1324 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV; 1325 else 1326 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV; 1327 1328 r = RESUME_HOST; 1329 break; 1330 case BOOK3S_INTERRUPT_PROGRAM: 1331 { 1332 ulong flags; 1333 /* 1334 * Normally program interrupts are delivered directly 1335 * to the guest by the hardware, but we can get here 1336 * as a result of a hypervisor emulation interrupt 1337 * (e40) getting turned into a 700 by BML RTAS. 1338 */ 1339 flags = vcpu->arch.shregs.msr & 0x1f0000ull; 1340 kvmppc_core_queue_program(vcpu, flags); 1341 r = RESUME_GUEST; 1342 break; 1343 } 1344 case BOOK3S_INTERRUPT_SYSCALL: 1345 { 1346 /* hcall - punt to userspace */ 1347 int i; 1348 1349 /* hypercall with MSR_PR has already been handled in rmode, 1350 * and never reaches here. 1351 */ 1352 1353 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3); 1354 for (i = 0; i < 9; ++i) 1355 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i); 1356 run->exit_reason = KVM_EXIT_PAPR_HCALL; 1357 vcpu->arch.hcall_needed = 1; 1358 r = RESUME_HOST; 1359 break; 1360 } 1361 /* 1362 * We get these next two if the guest accesses a page which it thinks 1363 * it has mapped but which is not actually present, either because 1364 * it is for an emulated I/O device or because the corresonding 1365 * host page has been paged out. Any other HDSI/HISI interrupts 1366 * have been handled already. 1367 */ 1368 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1369 r = RESUME_PAGE_FAULT; 1370 break; 1371 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1372 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1373 vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr & 1374 DSISR_SRR1_MATCH_64S; 1375 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1376 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1377 r = RESUME_PAGE_FAULT; 1378 break; 1379 /* 1380 * This occurs if the guest executes an illegal instruction. 1381 * If the guest debug is disabled, generate a program interrupt 1382 * to the guest. If guest debug is enabled, we need to check 1383 * whether the instruction is a software breakpoint instruction. 1384 * Accordingly return to Guest or Host. 1385 */ 1386 case BOOK3S_INTERRUPT_H_EMUL_ASSIST: 1387 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED) 1388 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ? 1389 swab32(vcpu->arch.emul_inst) : 1390 vcpu->arch.emul_inst; 1391 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) { 1392 r = kvmppc_emulate_debug_inst(run, vcpu); 1393 } else { 1394 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1395 r = RESUME_GUEST; 1396 } 1397 break; 1398 /* 1399 * This occurs if the guest (kernel or userspace), does something that 1400 * is prohibited by HFSCR. 1401 * On POWER9, this could be a doorbell instruction that we need 1402 * to emulate. 1403 * Otherwise, we just generate a program interrupt to the guest. 1404 */ 1405 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: 1406 r = EMULATE_FAIL; 1407 if (((vcpu->arch.hfscr >> 56) == FSCR_MSGP_LG) && 1408 cpu_has_feature(CPU_FTR_ARCH_300)) 1409 r = kvmppc_emulate_doorbell_instr(vcpu); 1410 if (r == EMULATE_FAIL) { 1411 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1412 r = RESUME_GUEST; 1413 } 1414 break; 1415 1416 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1417 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1418 /* 1419 * This occurs for various TM-related instructions that 1420 * we need to emulate on POWER9 DD2.2. We have already 1421 * handled the cases where the guest was in real-suspend 1422 * mode and was transitioning to transactional state. 1423 */ 1424 r = kvmhv_p9_tm_emulation(vcpu); 1425 break; 1426 #endif 1427 1428 case BOOK3S_INTERRUPT_HV_RM_HARD: 1429 r = RESUME_PASSTHROUGH; 1430 break; 1431 default: 1432 kvmppc_dump_regs(vcpu); 1433 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1434 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1435 vcpu->arch.shregs.msr); 1436 run->hw.hardware_exit_reason = vcpu->arch.trap; 1437 r = RESUME_HOST; 1438 break; 1439 } 1440 1441 return r; 1442 } 1443 1444 static int kvmppc_handle_nested_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) 1445 { 1446 int r; 1447 int srcu_idx; 1448 1449 vcpu->stat.sum_exits++; 1450 1451 /* 1452 * This can happen if an interrupt occurs in the last stages 1453 * of guest entry or the first stages of guest exit (i.e. after 1454 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1455 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1456 * That can happen due to a bug, or due to a machine check 1457 * occurring at just the wrong time. 1458 */ 1459 if (vcpu->arch.shregs.msr & MSR_HV) { 1460 pr_emerg("KVM trap in HV mode while nested!\n"); 1461 pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1462 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1463 vcpu->arch.shregs.msr); 1464 kvmppc_dump_regs(vcpu); 1465 return RESUME_HOST; 1466 } 1467 switch (vcpu->arch.trap) { 1468 /* We're good on these - the host merely wanted to get our attention */ 1469 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1470 vcpu->stat.dec_exits++; 1471 r = RESUME_GUEST; 1472 break; 1473 case BOOK3S_INTERRUPT_EXTERNAL: 1474 vcpu->stat.ext_intr_exits++; 1475 r = RESUME_HOST; 1476 break; 1477 case BOOK3S_INTERRUPT_H_DOORBELL: 1478 case BOOK3S_INTERRUPT_H_VIRT: 1479 vcpu->stat.ext_intr_exits++; 1480 r = RESUME_GUEST; 1481 break; 1482 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1483 case BOOK3S_INTERRUPT_HMI: 1484 case BOOK3S_INTERRUPT_PERFMON: 1485 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1486 r = RESUME_GUEST; 1487 break; 1488 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1489 /* Pass the machine check to the L1 guest */ 1490 r = RESUME_HOST; 1491 /* Print the MCE event to host console. */ 1492 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true); 1493 break; 1494 /* 1495 * We get these next two if the guest accesses a page which it thinks 1496 * it has mapped but which is not actually present, either because 1497 * it is for an emulated I/O device or because the corresonding 1498 * host page has been paged out. 1499 */ 1500 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1501 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1502 r = kvmhv_nested_page_fault(run, vcpu); 1503 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1504 break; 1505 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1506 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1507 vcpu->arch.fault_dsisr = kvmppc_get_msr(vcpu) & 1508 DSISR_SRR1_MATCH_64S; 1509 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1510 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1511 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1512 r = kvmhv_nested_page_fault(run, vcpu); 1513 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1514 break; 1515 1516 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1517 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1518 /* 1519 * This occurs for various TM-related instructions that 1520 * we need to emulate on POWER9 DD2.2. We have already 1521 * handled the cases where the guest was in real-suspend 1522 * mode and was transitioning to transactional state. 1523 */ 1524 r = kvmhv_p9_tm_emulation(vcpu); 1525 break; 1526 #endif 1527 1528 case BOOK3S_INTERRUPT_HV_RM_HARD: 1529 vcpu->arch.trap = 0; 1530 r = RESUME_GUEST; 1531 if (!xics_on_xive()) 1532 kvmppc_xics_rm_complete(vcpu, 0); 1533 break; 1534 default: 1535 r = RESUME_HOST; 1536 break; 1537 } 1538 1539 return r; 1540 } 1541 1542 static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu, 1543 struct kvm_sregs *sregs) 1544 { 1545 int i; 1546 1547 memset(sregs, 0, sizeof(struct kvm_sregs)); 1548 sregs->pvr = vcpu->arch.pvr; 1549 for (i = 0; i < vcpu->arch.slb_max; i++) { 1550 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige; 1551 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; 1552 } 1553 1554 return 0; 1555 } 1556 1557 static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu, 1558 struct kvm_sregs *sregs) 1559 { 1560 int i, j; 1561 1562 /* Only accept the same PVR as the host's, since we can't spoof it */ 1563 if (sregs->pvr != vcpu->arch.pvr) 1564 return -EINVAL; 1565 1566 j = 0; 1567 for (i = 0; i < vcpu->arch.slb_nr; i++) { 1568 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) { 1569 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe; 1570 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv; 1571 ++j; 1572 } 1573 } 1574 vcpu->arch.slb_max = j; 1575 1576 return 0; 1577 } 1578 1579 static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr, 1580 bool preserve_top32) 1581 { 1582 struct kvm *kvm = vcpu->kvm; 1583 struct kvmppc_vcore *vc = vcpu->arch.vcore; 1584 u64 mask; 1585 1586 mutex_lock(&kvm->lock); 1587 spin_lock(&vc->lock); 1588 /* 1589 * If ILE (interrupt little-endian) has changed, update the 1590 * MSR_LE bit in the intr_msr for each vcpu in this vcore. 1591 */ 1592 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) { 1593 struct kvm_vcpu *vcpu; 1594 int i; 1595 1596 kvm_for_each_vcpu(i, vcpu, kvm) { 1597 if (vcpu->arch.vcore != vc) 1598 continue; 1599 if (new_lpcr & LPCR_ILE) 1600 vcpu->arch.intr_msr |= MSR_LE; 1601 else 1602 vcpu->arch.intr_msr &= ~MSR_LE; 1603 } 1604 } 1605 1606 /* 1607 * Userspace can only modify DPFD (default prefetch depth), 1608 * ILE (interrupt little-endian) and TC (translation control). 1609 * On POWER8 and POWER9 userspace can also modify AIL (alt. interrupt loc.). 1610 */ 1611 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC; 1612 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 1613 mask |= LPCR_AIL; 1614 /* 1615 * On POWER9, allow userspace to enable large decrementer for the 1616 * guest, whether or not the host has it enabled. 1617 */ 1618 if (cpu_has_feature(CPU_FTR_ARCH_300)) 1619 mask |= LPCR_LD; 1620 1621 /* Broken 32-bit version of LPCR must not clear top bits */ 1622 if (preserve_top32) 1623 mask &= 0xFFFFFFFF; 1624 vc->lpcr = (vc->lpcr & ~mask) | (new_lpcr & mask); 1625 spin_unlock(&vc->lock); 1626 mutex_unlock(&kvm->lock); 1627 } 1628 1629 static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 1630 union kvmppc_one_reg *val) 1631 { 1632 int r = 0; 1633 long int i; 1634 1635 switch (id) { 1636 case KVM_REG_PPC_DEBUG_INST: 1637 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 1638 break; 1639 case KVM_REG_PPC_HIOR: 1640 *val = get_reg_val(id, 0); 1641 break; 1642 case KVM_REG_PPC_DABR: 1643 *val = get_reg_val(id, vcpu->arch.dabr); 1644 break; 1645 case KVM_REG_PPC_DABRX: 1646 *val = get_reg_val(id, vcpu->arch.dabrx); 1647 break; 1648 case KVM_REG_PPC_DSCR: 1649 *val = get_reg_val(id, vcpu->arch.dscr); 1650 break; 1651 case KVM_REG_PPC_PURR: 1652 *val = get_reg_val(id, vcpu->arch.purr); 1653 break; 1654 case KVM_REG_PPC_SPURR: 1655 *val = get_reg_val(id, vcpu->arch.spurr); 1656 break; 1657 case KVM_REG_PPC_AMR: 1658 *val = get_reg_val(id, vcpu->arch.amr); 1659 break; 1660 case KVM_REG_PPC_UAMOR: 1661 *val = get_reg_val(id, vcpu->arch.uamor); 1662 break; 1663 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS: 1664 i = id - KVM_REG_PPC_MMCR0; 1665 *val = get_reg_val(id, vcpu->arch.mmcr[i]); 1666 break; 1667 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 1668 i = id - KVM_REG_PPC_PMC1; 1669 *val = get_reg_val(id, vcpu->arch.pmc[i]); 1670 break; 1671 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 1672 i = id - KVM_REG_PPC_SPMC1; 1673 *val = get_reg_val(id, vcpu->arch.spmc[i]); 1674 break; 1675 case KVM_REG_PPC_SIAR: 1676 *val = get_reg_val(id, vcpu->arch.siar); 1677 break; 1678 case KVM_REG_PPC_SDAR: 1679 *val = get_reg_val(id, vcpu->arch.sdar); 1680 break; 1681 case KVM_REG_PPC_SIER: 1682 *val = get_reg_val(id, vcpu->arch.sier); 1683 break; 1684 case KVM_REG_PPC_IAMR: 1685 *val = get_reg_val(id, vcpu->arch.iamr); 1686 break; 1687 case KVM_REG_PPC_PSPB: 1688 *val = get_reg_val(id, vcpu->arch.pspb); 1689 break; 1690 case KVM_REG_PPC_DPDES: 1691 *val = get_reg_val(id, vcpu->arch.vcore->dpdes); 1692 break; 1693 case KVM_REG_PPC_VTB: 1694 *val = get_reg_val(id, vcpu->arch.vcore->vtb); 1695 break; 1696 case KVM_REG_PPC_DAWR: 1697 *val = get_reg_val(id, vcpu->arch.dawr); 1698 break; 1699 case KVM_REG_PPC_DAWRX: 1700 *val = get_reg_val(id, vcpu->arch.dawrx); 1701 break; 1702 case KVM_REG_PPC_CIABR: 1703 *val = get_reg_val(id, vcpu->arch.ciabr); 1704 break; 1705 case KVM_REG_PPC_CSIGR: 1706 *val = get_reg_val(id, vcpu->arch.csigr); 1707 break; 1708 case KVM_REG_PPC_TACR: 1709 *val = get_reg_val(id, vcpu->arch.tacr); 1710 break; 1711 case KVM_REG_PPC_TCSCR: 1712 *val = get_reg_val(id, vcpu->arch.tcscr); 1713 break; 1714 case KVM_REG_PPC_PID: 1715 *val = get_reg_val(id, vcpu->arch.pid); 1716 break; 1717 case KVM_REG_PPC_ACOP: 1718 *val = get_reg_val(id, vcpu->arch.acop); 1719 break; 1720 case KVM_REG_PPC_WORT: 1721 *val = get_reg_val(id, vcpu->arch.wort); 1722 break; 1723 case KVM_REG_PPC_TIDR: 1724 *val = get_reg_val(id, vcpu->arch.tid); 1725 break; 1726 case KVM_REG_PPC_PSSCR: 1727 *val = get_reg_val(id, vcpu->arch.psscr); 1728 break; 1729 case KVM_REG_PPC_VPA_ADDR: 1730 spin_lock(&vcpu->arch.vpa_update_lock); 1731 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa); 1732 spin_unlock(&vcpu->arch.vpa_update_lock); 1733 break; 1734 case KVM_REG_PPC_VPA_SLB: 1735 spin_lock(&vcpu->arch.vpa_update_lock); 1736 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa; 1737 val->vpaval.length = vcpu->arch.slb_shadow.len; 1738 spin_unlock(&vcpu->arch.vpa_update_lock); 1739 break; 1740 case KVM_REG_PPC_VPA_DTL: 1741 spin_lock(&vcpu->arch.vpa_update_lock); 1742 val->vpaval.addr = vcpu->arch.dtl.next_gpa; 1743 val->vpaval.length = vcpu->arch.dtl.len; 1744 spin_unlock(&vcpu->arch.vpa_update_lock); 1745 break; 1746 case KVM_REG_PPC_TB_OFFSET: 1747 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset); 1748 break; 1749 case KVM_REG_PPC_LPCR: 1750 case KVM_REG_PPC_LPCR_64: 1751 *val = get_reg_val(id, vcpu->arch.vcore->lpcr); 1752 break; 1753 case KVM_REG_PPC_PPR: 1754 *val = get_reg_val(id, vcpu->arch.ppr); 1755 break; 1756 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1757 case KVM_REG_PPC_TFHAR: 1758 *val = get_reg_val(id, vcpu->arch.tfhar); 1759 break; 1760 case KVM_REG_PPC_TFIAR: 1761 *val = get_reg_val(id, vcpu->arch.tfiar); 1762 break; 1763 case KVM_REG_PPC_TEXASR: 1764 *val = get_reg_val(id, vcpu->arch.texasr); 1765 break; 1766 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 1767 i = id - KVM_REG_PPC_TM_GPR0; 1768 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]); 1769 break; 1770 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 1771 { 1772 int j; 1773 i = id - KVM_REG_PPC_TM_VSR0; 1774 if (i < 32) 1775 for (j = 0; j < TS_FPRWIDTH; j++) 1776 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j]; 1777 else { 1778 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1779 val->vval = vcpu->arch.vr_tm.vr[i-32]; 1780 else 1781 r = -ENXIO; 1782 } 1783 break; 1784 } 1785 case KVM_REG_PPC_TM_CR: 1786 *val = get_reg_val(id, vcpu->arch.cr_tm); 1787 break; 1788 case KVM_REG_PPC_TM_XER: 1789 *val = get_reg_val(id, vcpu->arch.xer_tm); 1790 break; 1791 case KVM_REG_PPC_TM_LR: 1792 *val = get_reg_val(id, vcpu->arch.lr_tm); 1793 break; 1794 case KVM_REG_PPC_TM_CTR: 1795 *val = get_reg_val(id, vcpu->arch.ctr_tm); 1796 break; 1797 case KVM_REG_PPC_TM_FPSCR: 1798 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr); 1799 break; 1800 case KVM_REG_PPC_TM_AMR: 1801 *val = get_reg_val(id, vcpu->arch.amr_tm); 1802 break; 1803 case KVM_REG_PPC_TM_PPR: 1804 *val = get_reg_val(id, vcpu->arch.ppr_tm); 1805 break; 1806 case KVM_REG_PPC_TM_VRSAVE: 1807 *val = get_reg_val(id, vcpu->arch.vrsave_tm); 1808 break; 1809 case KVM_REG_PPC_TM_VSCR: 1810 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1811 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]); 1812 else 1813 r = -ENXIO; 1814 break; 1815 case KVM_REG_PPC_TM_DSCR: 1816 *val = get_reg_val(id, vcpu->arch.dscr_tm); 1817 break; 1818 case KVM_REG_PPC_TM_TAR: 1819 *val = get_reg_val(id, vcpu->arch.tar_tm); 1820 break; 1821 #endif 1822 case KVM_REG_PPC_ARCH_COMPAT: 1823 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat); 1824 break; 1825 case KVM_REG_PPC_DEC_EXPIRY: 1826 *val = get_reg_val(id, vcpu->arch.dec_expires + 1827 vcpu->arch.vcore->tb_offset); 1828 break; 1829 case KVM_REG_PPC_ONLINE: 1830 *val = get_reg_val(id, vcpu->arch.online); 1831 break; 1832 case KVM_REG_PPC_PTCR: 1833 *val = get_reg_val(id, vcpu->kvm->arch.l1_ptcr); 1834 break; 1835 default: 1836 r = -EINVAL; 1837 break; 1838 } 1839 1840 return r; 1841 } 1842 1843 static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 1844 union kvmppc_one_reg *val) 1845 { 1846 int r = 0; 1847 long int i; 1848 unsigned long addr, len; 1849 1850 switch (id) { 1851 case KVM_REG_PPC_HIOR: 1852 /* Only allow this to be set to zero */ 1853 if (set_reg_val(id, *val)) 1854 r = -EINVAL; 1855 break; 1856 case KVM_REG_PPC_DABR: 1857 vcpu->arch.dabr = set_reg_val(id, *val); 1858 break; 1859 case KVM_REG_PPC_DABRX: 1860 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP; 1861 break; 1862 case KVM_REG_PPC_DSCR: 1863 vcpu->arch.dscr = set_reg_val(id, *val); 1864 break; 1865 case KVM_REG_PPC_PURR: 1866 vcpu->arch.purr = set_reg_val(id, *val); 1867 break; 1868 case KVM_REG_PPC_SPURR: 1869 vcpu->arch.spurr = set_reg_val(id, *val); 1870 break; 1871 case KVM_REG_PPC_AMR: 1872 vcpu->arch.amr = set_reg_val(id, *val); 1873 break; 1874 case KVM_REG_PPC_UAMOR: 1875 vcpu->arch.uamor = set_reg_val(id, *val); 1876 break; 1877 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS: 1878 i = id - KVM_REG_PPC_MMCR0; 1879 vcpu->arch.mmcr[i] = set_reg_val(id, *val); 1880 break; 1881 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 1882 i = id - KVM_REG_PPC_PMC1; 1883 vcpu->arch.pmc[i] = set_reg_val(id, *val); 1884 break; 1885 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 1886 i = id - KVM_REG_PPC_SPMC1; 1887 vcpu->arch.spmc[i] = set_reg_val(id, *val); 1888 break; 1889 case KVM_REG_PPC_SIAR: 1890 vcpu->arch.siar = set_reg_val(id, *val); 1891 break; 1892 case KVM_REG_PPC_SDAR: 1893 vcpu->arch.sdar = set_reg_val(id, *val); 1894 break; 1895 case KVM_REG_PPC_SIER: 1896 vcpu->arch.sier = set_reg_val(id, *val); 1897 break; 1898 case KVM_REG_PPC_IAMR: 1899 vcpu->arch.iamr = set_reg_val(id, *val); 1900 break; 1901 case KVM_REG_PPC_PSPB: 1902 vcpu->arch.pspb = set_reg_val(id, *val); 1903 break; 1904 case KVM_REG_PPC_DPDES: 1905 vcpu->arch.vcore->dpdes = set_reg_val(id, *val); 1906 break; 1907 case KVM_REG_PPC_VTB: 1908 vcpu->arch.vcore->vtb = set_reg_val(id, *val); 1909 break; 1910 case KVM_REG_PPC_DAWR: 1911 vcpu->arch.dawr = set_reg_val(id, *val); 1912 break; 1913 case KVM_REG_PPC_DAWRX: 1914 vcpu->arch.dawrx = set_reg_val(id, *val) & ~DAWRX_HYP; 1915 break; 1916 case KVM_REG_PPC_CIABR: 1917 vcpu->arch.ciabr = set_reg_val(id, *val); 1918 /* Don't allow setting breakpoints in hypervisor code */ 1919 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER) 1920 vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */ 1921 break; 1922 case KVM_REG_PPC_CSIGR: 1923 vcpu->arch.csigr = set_reg_val(id, *val); 1924 break; 1925 case KVM_REG_PPC_TACR: 1926 vcpu->arch.tacr = set_reg_val(id, *val); 1927 break; 1928 case KVM_REG_PPC_TCSCR: 1929 vcpu->arch.tcscr = set_reg_val(id, *val); 1930 break; 1931 case KVM_REG_PPC_PID: 1932 vcpu->arch.pid = set_reg_val(id, *val); 1933 break; 1934 case KVM_REG_PPC_ACOP: 1935 vcpu->arch.acop = set_reg_val(id, *val); 1936 break; 1937 case KVM_REG_PPC_WORT: 1938 vcpu->arch.wort = set_reg_val(id, *val); 1939 break; 1940 case KVM_REG_PPC_TIDR: 1941 vcpu->arch.tid = set_reg_val(id, *val); 1942 break; 1943 case KVM_REG_PPC_PSSCR: 1944 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS; 1945 break; 1946 case KVM_REG_PPC_VPA_ADDR: 1947 addr = set_reg_val(id, *val); 1948 r = -EINVAL; 1949 if (!addr && (vcpu->arch.slb_shadow.next_gpa || 1950 vcpu->arch.dtl.next_gpa)) 1951 break; 1952 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca)); 1953 break; 1954 case KVM_REG_PPC_VPA_SLB: 1955 addr = val->vpaval.addr; 1956 len = val->vpaval.length; 1957 r = -EINVAL; 1958 if (addr && !vcpu->arch.vpa.next_gpa) 1959 break; 1960 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len); 1961 break; 1962 case KVM_REG_PPC_VPA_DTL: 1963 addr = val->vpaval.addr; 1964 len = val->vpaval.length; 1965 r = -EINVAL; 1966 if (addr && (len < sizeof(struct dtl_entry) || 1967 !vcpu->arch.vpa.next_gpa)) 1968 break; 1969 len -= len % sizeof(struct dtl_entry); 1970 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len); 1971 break; 1972 case KVM_REG_PPC_TB_OFFSET: 1973 /* round up to multiple of 2^24 */ 1974 vcpu->arch.vcore->tb_offset = 1975 ALIGN(set_reg_val(id, *val), 1UL << 24); 1976 break; 1977 case KVM_REG_PPC_LPCR: 1978 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true); 1979 break; 1980 case KVM_REG_PPC_LPCR_64: 1981 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false); 1982 break; 1983 case KVM_REG_PPC_PPR: 1984 vcpu->arch.ppr = set_reg_val(id, *val); 1985 break; 1986 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1987 case KVM_REG_PPC_TFHAR: 1988 vcpu->arch.tfhar = set_reg_val(id, *val); 1989 break; 1990 case KVM_REG_PPC_TFIAR: 1991 vcpu->arch.tfiar = set_reg_val(id, *val); 1992 break; 1993 case KVM_REG_PPC_TEXASR: 1994 vcpu->arch.texasr = set_reg_val(id, *val); 1995 break; 1996 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 1997 i = id - KVM_REG_PPC_TM_GPR0; 1998 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val); 1999 break; 2000 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 2001 { 2002 int j; 2003 i = id - KVM_REG_PPC_TM_VSR0; 2004 if (i < 32) 2005 for (j = 0; j < TS_FPRWIDTH; j++) 2006 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j]; 2007 else 2008 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2009 vcpu->arch.vr_tm.vr[i-32] = val->vval; 2010 else 2011 r = -ENXIO; 2012 break; 2013 } 2014 case KVM_REG_PPC_TM_CR: 2015 vcpu->arch.cr_tm = set_reg_val(id, *val); 2016 break; 2017 case KVM_REG_PPC_TM_XER: 2018 vcpu->arch.xer_tm = set_reg_val(id, *val); 2019 break; 2020 case KVM_REG_PPC_TM_LR: 2021 vcpu->arch.lr_tm = set_reg_val(id, *val); 2022 break; 2023 case KVM_REG_PPC_TM_CTR: 2024 vcpu->arch.ctr_tm = set_reg_val(id, *val); 2025 break; 2026 case KVM_REG_PPC_TM_FPSCR: 2027 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val); 2028 break; 2029 case KVM_REG_PPC_TM_AMR: 2030 vcpu->arch.amr_tm = set_reg_val(id, *val); 2031 break; 2032 case KVM_REG_PPC_TM_PPR: 2033 vcpu->arch.ppr_tm = set_reg_val(id, *val); 2034 break; 2035 case KVM_REG_PPC_TM_VRSAVE: 2036 vcpu->arch.vrsave_tm = set_reg_val(id, *val); 2037 break; 2038 case KVM_REG_PPC_TM_VSCR: 2039 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2040 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val); 2041 else 2042 r = - ENXIO; 2043 break; 2044 case KVM_REG_PPC_TM_DSCR: 2045 vcpu->arch.dscr_tm = set_reg_val(id, *val); 2046 break; 2047 case KVM_REG_PPC_TM_TAR: 2048 vcpu->arch.tar_tm = set_reg_val(id, *val); 2049 break; 2050 #endif 2051 case KVM_REG_PPC_ARCH_COMPAT: 2052 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val)); 2053 break; 2054 case KVM_REG_PPC_DEC_EXPIRY: 2055 vcpu->arch.dec_expires = set_reg_val(id, *val) - 2056 vcpu->arch.vcore->tb_offset; 2057 break; 2058 case KVM_REG_PPC_ONLINE: 2059 i = set_reg_val(id, *val); 2060 if (i && !vcpu->arch.online) 2061 atomic_inc(&vcpu->arch.vcore->online_count); 2062 else if (!i && vcpu->arch.online) 2063 atomic_dec(&vcpu->arch.vcore->online_count); 2064 vcpu->arch.online = i; 2065 break; 2066 case KVM_REG_PPC_PTCR: 2067 vcpu->kvm->arch.l1_ptcr = set_reg_val(id, *val); 2068 break; 2069 default: 2070 r = -EINVAL; 2071 break; 2072 } 2073 2074 return r; 2075 } 2076 2077 /* 2078 * On POWER9, threads are independent and can be in different partitions. 2079 * Therefore we consider each thread to be a subcore. 2080 * There is a restriction that all threads have to be in the same 2081 * MMU mode (radix or HPT), unfortunately, but since we only support 2082 * HPT guests on a HPT host so far, that isn't an impediment yet. 2083 */ 2084 static int threads_per_vcore(struct kvm *kvm) 2085 { 2086 if (kvm->arch.threads_indep) 2087 return 1; 2088 return threads_per_subcore; 2089 } 2090 2091 static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int id) 2092 { 2093 struct kvmppc_vcore *vcore; 2094 2095 vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL); 2096 2097 if (vcore == NULL) 2098 return NULL; 2099 2100 spin_lock_init(&vcore->lock); 2101 spin_lock_init(&vcore->stoltb_lock); 2102 init_swait_queue_head(&vcore->wq); 2103 vcore->preempt_tb = TB_NIL; 2104 vcore->lpcr = kvm->arch.lpcr; 2105 vcore->first_vcpuid = id; 2106 vcore->kvm = kvm; 2107 INIT_LIST_HEAD(&vcore->preempt_list); 2108 2109 return vcore; 2110 } 2111 2112 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING 2113 static struct debugfs_timings_element { 2114 const char *name; 2115 size_t offset; 2116 } timings[] = { 2117 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)}, 2118 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)}, 2119 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)}, 2120 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)}, 2121 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)}, 2122 }; 2123 2124 #define N_TIMINGS (ARRAY_SIZE(timings)) 2125 2126 struct debugfs_timings_state { 2127 struct kvm_vcpu *vcpu; 2128 unsigned int buflen; 2129 char buf[N_TIMINGS * 100]; 2130 }; 2131 2132 static int debugfs_timings_open(struct inode *inode, struct file *file) 2133 { 2134 struct kvm_vcpu *vcpu = inode->i_private; 2135 struct debugfs_timings_state *p; 2136 2137 p = kzalloc(sizeof(*p), GFP_KERNEL); 2138 if (!p) 2139 return -ENOMEM; 2140 2141 kvm_get_kvm(vcpu->kvm); 2142 p->vcpu = vcpu; 2143 file->private_data = p; 2144 2145 return nonseekable_open(inode, file); 2146 } 2147 2148 static int debugfs_timings_release(struct inode *inode, struct file *file) 2149 { 2150 struct debugfs_timings_state *p = file->private_data; 2151 2152 kvm_put_kvm(p->vcpu->kvm); 2153 kfree(p); 2154 return 0; 2155 } 2156 2157 static ssize_t debugfs_timings_read(struct file *file, char __user *buf, 2158 size_t len, loff_t *ppos) 2159 { 2160 struct debugfs_timings_state *p = file->private_data; 2161 struct kvm_vcpu *vcpu = p->vcpu; 2162 char *s, *buf_end; 2163 struct kvmhv_tb_accumulator tb; 2164 u64 count; 2165 loff_t pos; 2166 ssize_t n; 2167 int i, loops; 2168 bool ok; 2169 2170 if (!p->buflen) { 2171 s = p->buf; 2172 buf_end = s + sizeof(p->buf); 2173 for (i = 0; i < N_TIMINGS; ++i) { 2174 struct kvmhv_tb_accumulator *acc; 2175 2176 acc = (struct kvmhv_tb_accumulator *) 2177 ((unsigned long)vcpu + timings[i].offset); 2178 ok = false; 2179 for (loops = 0; loops < 1000; ++loops) { 2180 count = acc->seqcount; 2181 if (!(count & 1)) { 2182 smp_rmb(); 2183 tb = *acc; 2184 smp_rmb(); 2185 if (count == acc->seqcount) { 2186 ok = true; 2187 break; 2188 } 2189 } 2190 udelay(1); 2191 } 2192 if (!ok) 2193 snprintf(s, buf_end - s, "%s: stuck\n", 2194 timings[i].name); 2195 else 2196 snprintf(s, buf_end - s, 2197 "%s: %llu %llu %llu %llu\n", 2198 timings[i].name, count / 2, 2199 tb_to_ns(tb.tb_total), 2200 tb_to_ns(tb.tb_min), 2201 tb_to_ns(tb.tb_max)); 2202 s += strlen(s); 2203 } 2204 p->buflen = s - p->buf; 2205 } 2206 2207 pos = *ppos; 2208 if (pos >= p->buflen) 2209 return 0; 2210 if (len > p->buflen - pos) 2211 len = p->buflen - pos; 2212 n = copy_to_user(buf, p->buf + pos, len); 2213 if (n) { 2214 if (n == len) 2215 return -EFAULT; 2216 len -= n; 2217 } 2218 *ppos = pos + len; 2219 return len; 2220 } 2221 2222 static ssize_t debugfs_timings_write(struct file *file, const char __user *buf, 2223 size_t len, loff_t *ppos) 2224 { 2225 return -EACCES; 2226 } 2227 2228 static const struct file_operations debugfs_timings_ops = { 2229 .owner = THIS_MODULE, 2230 .open = debugfs_timings_open, 2231 .release = debugfs_timings_release, 2232 .read = debugfs_timings_read, 2233 .write = debugfs_timings_write, 2234 .llseek = generic_file_llseek, 2235 }; 2236 2237 /* Create a debugfs directory for the vcpu */ 2238 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2239 { 2240 char buf[16]; 2241 struct kvm *kvm = vcpu->kvm; 2242 2243 snprintf(buf, sizeof(buf), "vcpu%u", id); 2244 if (IS_ERR_OR_NULL(kvm->arch.debugfs_dir)) 2245 return; 2246 vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir); 2247 if (IS_ERR_OR_NULL(vcpu->arch.debugfs_dir)) 2248 return; 2249 vcpu->arch.debugfs_timings = 2250 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir, 2251 vcpu, &debugfs_timings_ops); 2252 } 2253 2254 #else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2255 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2256 { 2257 } 2258 #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2259 2260 static struct kvm_vcpu *kvmppc_core_vcpu_create_hv(struct kvm *kvm, 2261 unsigned int id) 2262 { 2263 struct kvm_vcpu *vcpu; 2264 int err; 2265 int core; 2266 struct kvmppc_vcore *vcore; 2267 2268 err = -ENOMEM; 2269 vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL); 2270 if (!vcpu) 2271 goto out; 2272 2273 err = kvm_vcpu_init(vcpu, kvm, id); 2274 if (err) 2275 goto free_vcpu; 2276 2277 vcpu->arch.shared = &vcpu->arch.shregs; 2278 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 2279 /* 2280 * The shared struct is never shared on HV, 2281 * so we can always use host endianness 2282 */ 2283 #ifdef __BIG_ENDIAN__ 2284 vcpu->arch.shared_big_endian = true; 2285 #else 2286 vcpu->arch.shared_big_endian = false; 2287 #endif 2288 #endif 2289 vcpu->arch.mmcr[0] = MMCR0_FC; 2290 vcpu->arch.ctrl = CTRL_RUNLATCH; 2291 /* default to host PVR, since we can't spoof it */ 2292 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR)); 2293 spin_lock_init(&vcpu->arch.vpa_update_lock); 2294 spin_lock_init(&vcpu->arch.tbacct_lock); 2295 vcpu->arch.busy_preempt = TB_NIL; 2296 vcpu->arch.intr_msr = MSR_SF | MSR_ME; 2297 2298 /* 2299 * Set the default HFSCR for the guest from the host value. 2300 * This value is only used on POWER9. 2301 * On POWER9, we want to virtualize the doorbell facility, so we 2302 * don't set the HFSCR_MSGP bit, and that causes those instructions 2303 * to trap and then we emulate them. 2304 */ 2305 vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB | 2306 HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP; 2307 if (cpu_has_feature(CPU_FTR_HVMODE)) { 2308 vcpu->arch.hfscr &= mfspr(SPRN_HFSCR); 2309 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 2310 vcpu->arch.hfscr |= HFSCR_TM; 2311 } 2312 if (cpu_has_feature(CPU_FTR_TM_COMP)) 2313 vcpu->arch.hfscr |= HFSCR_TM; 2314 2315 kvmppc_mmu_book3s_hv_init(vcpu); 2316 2317 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 2318 2319 init_waitqueue_head(&vcpu->arch.cpu_run); 2320 2321 mutex_lock(&kvm->lock); 2322 vcore = NULL; 2323 err = -EINVAL; 2324 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 2325 if (id >= (KVM_MAX_VCPUS * kvm->arch.emul_smt_mode)) { 2326 pr_devel("KVM: VCPU ID too high\n"); 2327 core = KVM_MAX_VCORES; 2328 } else { 2329 BUG_ON(kvm->arch.smt_mode != 1); 2330 core = kvmppc_pack_vcpu_id(kvm, id); 2331 } 2332 } else { 2333 core = id / kvm->arch.smt_mode; 2334 } 2335 if (core < KVM_MAX_VCORES) { 2336 vcore = kvm->arch.vcores[core]; 2337 if (vcore && cpu_has_feature(CPU_FTR_ARCH_300)) { 2338 pr_devel("KVM: collision on id %u", id); 2339 vcore = NULL; 2340 } else if (!vcore) { 2341 err = -ENOMEM; 2342 vcore = kvmppc_vcore_create(kvm, 2343 id & ~(kvm->arch.smt_mode - 1)); 2344 kvm->arch.vcores[core] = vcore; 2345 kvm->arch.online_vcores++; 2346 } 2347 } 2348 mutex_unlock(&kvm->lock); 2349 2350 if (!vcore) 2351 goto free_vcpu; 2352 2353 spin_lock(&vcore->lock); 2354 ++vcore->num_threads; 2355 spin_unlock(&vcore->lock); 2356 vcpu->arch.vcore = vcore; 2357 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid; 2358 vcpu->arch.thread_cpu = -1; 2359 vcpu->arch.prev_cpu = -1; 2360 2361 vcpu->arch.cpu_type = KVM_CPU_3S_64; 2362 kvmppc_sanity_check(vcpu); 2363 2364 debugfs_vcpu_init(vcpu, id); 2365 2366 return vcpu; 2367 2368 free_vcpu: 2369 kmem_cache_free(kvm_vcpu_cache, vcpu); 2370 out: 2371 return ERR_PTR(err); 2372 } 2373 2374 static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode, 2375 unsigned long flags) 2376 { 2377 int err; 2378 int esmt = 0; 2379 2380 if (flags) 2381 return -EINVAL; 2382 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode)) 2383 return -EINVAL; 2384 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 2385 /* 2386 * On POWER8 (or POWER7), the threading mode is "strict", 2387 * so we pack smt_mode vcpus per vcore. 2388 */ 2389 if (smt_mode > threads_per_subcore) 2390 return -EINVAL; 2391 } else { 2392 /* 2393 * On POWER9, the threading mode is "loose", 2394 * so each vcpu gets its own vcore. 2395 */ 2396 esmt = smt_mode; 2397 smt_mode = 1; 2398 } 2399 mutex_lock(&kvm->lock); 2400 err = -EBUSY; 2401 if (!kvm->arch.online_vcores) { 2402 kvm->arch.smt_mode = smt_mode; 2403 kvm->arch.emul_smt_mode = esmt; 2404 err = 0; 2405 } 2406 mutex_unlock(&kvm->lock); 2407 2408 return err; 2409 } 2410 2411 static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa) 2412 { 2413 if (vpa->pinned_addr) 2414 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa, 2415 vpa->dirty); 2416 } 2417 2418 static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu) 2419 { 2420 spin_lock(&vcpu->arch.vpa_update_lock); 2421 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl); 2422 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow); 2423 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa); 2424 spin_unlock(&vcpu->arch.vpa_update_lock); 2425 kvm_vcpu_uninit(vcpu); 2426 kmem_cache_free(kvm_vcpu_cache, vcpu); 2427 } 2428 2429 static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu) 2430 { 2431 /* Indicate we want to get back into the guest */ 2432 return 1; 2433 } 2434 2435 static void kvmppc_set_timer(struct kvm_vcpu *vcpu) 2436 { 2437 unsigned long dec_nsec, now; 2438 2439 now = get_tb(); 2440 if (now > vcpu->arch.dec_expires) { 2441 /* decrementer has already gone negative */ 2442 kvmppc_core_queue_dec(vcpu); 2443 kvmppc_core_prepare_to_enter(vcpu); 2444 return; 2445 } 2446 dec_nsec = tb_to_ns(vcpu->arch.dec_expires - now); 2447 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL); 2448 vcpu->arch.timer_running = 1; 2449 } 2450 2451 static void kvmppc_end_cede(struct kvm_vcpu *vcpu) 2452 { 2453 vcpu->arch.ceded = 0; 2454 if (vcpu->arch.timer_running) { 2455 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 2456 vcpu->arch.timer_running = 0; 2457 } 2458 } 2459 2460 extern int __kvmppc_vcore_entry(void); 2461 2462 static void kvmppc_remove_runnable(struct kvmppc_vcore *vc, 2463 struct kvm_vcpu *vcpu) 2464 { 2465 u64 now; 2466 2467 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 2468 return; 2469 spin_lock_irq(&vcpu->arch.tbacct_lock); 2470 now = mftb(); 2471 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) - 2472 vcpu->arch.stolen_logged; 2473 vcpu->arch.busy_preempt = now; 2474 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 2475 spin_unlock_irq(&vcpu->arch.tbacct_lock); 2476 --vc->n_runnable; 2477 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL); 2478 } 2479 2480 static int kvmppc_grab_hwthread(int cpu) 2481 { 2482 struct paca_struct *tpaca; 2483 long timeout = 10000; 2484 2485 tpaca = paca_ptrs[cpu]; 2486 2487 /* Ensure the thread won't go into the kernel if it wakes */ 2488 tpaca->kvm_hstate.kvm_vcpu = NULL; 2489 tpaca->kvm_hstate.kvm_vcore = NULL; 2490 tpaca->kvm_hstate.napping = 0; 2491 smp_wmb(); 2492 tpaca->kvm_hstate.hwthread_req = 1; 2493 2494 /* 2495 * If the thread is already executing in the kernel (e.g. handling 2496 * a stray interrupt), wait for it to get back to nap mode. 2497 * The smp_mb() is to ensure that our setting of hwthread_req 2498 * is visible before we look at hwthread_state, so if this 2499 * races with the code at system_reset_pSeries and the thread 2500 * misses our setting of hwthread_req, we are sure to see its 2501 * setting of hwthread_state, and vice versa. 2502 */ 2503 smp_mb(); 2504 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) { 2505 if (--timeout <= 0) { 2506 pr_err("KVM: couldn't grab cpu %d\n", cpu); 2507 return -EBUSY; 2508 } 2509 udelay(1); 2510 } 2511 return 0; 2512 } 2513 2514 static void kvmppc_release_hwthread(int cpu) 2515 { 2516 struct paca_struct *tpaca; 2517 2518 tpaca = paca_ptrs[cpu]; 2519 tpaca->kvm_hstate.hwthread_req = 0; 2520 tpaca->kvm_hstate.kvm_vcpu = NULL; 2521 tpaca->kvm_hstate.kvm_vcore = NULL; 2522 tpaca->kvm_hstate.kvm_split_mode = NULL; 2523 } 2524 2525 static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu) 2526 { 2527 struct kvm_nested_guest *nested = vcpu->arch.nested; 2528 cpumask_t *cpu_in_guest; 2529 int i; 2530 2531 cpu = cpu_first_thread_sibling(cpu); 2532 if (nested) { 2533 cpumask_set_cpu(cpu, &nested->need_tlb_flush); 2534 cpu_in_guest = &nested->cpu_in_guest; 2535 } else { 2536 cpumask_set_cpu(cpu, &kvm->arch.need_tlb_flush); 2537 cpu_in_guest = &kvm->arch.cpu_in_guest; 2538 } 2539 /* 2540 * Make sure setting of bit in need_tlb_flush precedes 2541 * testing of cpu_in_guest bits. The matching barrier on 2542 * the other side is the first smp_mb() in kvmppc_run_core(). 2543 */ 2544 smp_mb(); 2545 for (i = 0; i < threads_per_core; ++i) 2546 if (cpumask_test_cpu(cpu + i, cpu_in_guest)) 2547 smp_call_function_single(cpu + i, do_nothing, NULL, 1); 2548 } 2549 2550 static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu) 2551 { 2552 struct kvm_nested_guest *nested = vcpu->arch.nested; 2553 struct kvm *kvm = vcpu->kvm; 2554 int prev_cpu; 2555 2556 if (!cpu_has_feature(CPU_FTR_HVMODE)) 2557 return; 2558 2559 if (nested) 2560 prev_cpu = nested->prev_cpu[vcpu->arch.nested_vcpu_id]; 2561 else 2562 prev_cpu = vcpu->arch.prev_cpu; 2563 2564 /* 2565 * With radix, the guest can do TLB invalidations itself, 2566 * and it could choose to use the local form (tlbiel) if 2567 * it is invalidating a translation that has only ever been 2568 * used on one vcpu. However, that doesn't mean it has 2569 * only ever been used on one physical cpu, since vcpus 2570 * can move around between pcpus. To cope with this, when 2571 * a vcpu moves from one pcpu to another, we need to tell 2572 * any vcpus running on the same core as this vcpu previously 2573 * ran to flush the TLB. The TLB is shared between threads, 2574 * so we use a single bit in .need_tlb_flush for all 4 threads. 2575 */ 2576 if (prev_cpu != pcpu) { 2577 if (prev_cpu >= 0 && 2578 cpu_first_thread_sibling(prev_cpu) != 2579 cpu_first_thread_sibling(pcpu)) 2580 radix_flush_cpu(kvm, prev_cpu, vcpu); 2581 if (nested) 2582 nested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu; 2583 else 2584 vcpu->arch.prev_cpu = pcpu; 2585 } 2586 } 2587 2588 static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc) 2589 { 2590 int cpu; 2591 struct paca_struct *tpaca; 2592 struct kvm *kvm = vc->kvm; 2593 2594 cpu = vc->pcpu; 2595 if (vcpu) { 2596 if (vcpu->arch.timer_running) { 2597 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 2598 vcpu->arch.timer_running = 0; 2599 } 2600 cpu += vcpu->arch.ptid; 2601 vcpu->cpu = vc->pcpu; 2602 vcpu->arch.thread_cpu = cpu; 2603 cpumask_set_cpu(cpu, &kvm->arch.cpu_in_guest); 2604 } 2605 tpaca = paca_ptrs[cpu]; 2606 tpaca->kvm_hstate.kvm_vcpu = vcpu; 2607 tpaca->kvm_hstate.ptid = cpu - vc->pcpu; 2608 tpaca->kvm_hstate.fake_suspend = 0; 2609 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */ 2610 smp_wmb(); 2611 tpaca->kvm_hstate.kvm_vcore = vc; 2612 if (cpu != smp_processor_id()) 2613 kvmppc_ipi_thread(cpu); 2614 } 2615 2616 static void kvmppc_wait_for_nap(int n_threads) 2617 { 2618 int cpu = smp_processor_id(); 2619 int i, loops; 2620 2621 if (n_threads <= 1) 2622 return; 2623 for (loops = 0; loops < 1000000; ++loops) { 2624 /* 2625 * Check if all threads are finished. 2626 * We set the vcore pointer when starting a thread 2627 * and the thread clears it when finished, so we look 2628 * for any threads that still have a non-NULL vcore ptr. 2629 */ 2630 for (i = 1; i < n_threads; ++i) 2631 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 2632 break; 2633 if (i == n_threads) { 2634 HMT_medium(); 2635 return; 2636 } 2637 HMT_low(); 2638 } 2639 HMT_medium(); 2640 for (i = 1; i < n_threads; ++i) 2641 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 2642 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i); 2643 } 2644 2645 /* 2646 * Check that we are on thread 0 and that any other threads in 2647 * this core are off-line. Then grab the threads so they can't 2648 * enter the kernel. 2649 */ 2650 static int on_primary_thread(void) 2651 { 2652 int cpu = smp_processor_id(); 2653 int thr; 2654 2655 /* Are we on a primary subcore? */ 2656 if (cpu_thread_in_subcore(cpu)) 2657 return 0; 2658 2659 thr = 0; 2660 while (++thr < threads_per_subcore) 2661 if (cpu_online(cpu + thr)) 2662 return 0; 2663 2664 /* Grab all hw threads so they can't go into the kernel */ 2665 for (thr = 1; thr < threads_per_subcore; ++thr) { 2666 if (kvmppc_grab_hwthread(cpu + thr)) { 2667 /* Couldn't grab one; let the others go */ 2668 do { 2669 kvmppc_release_hwthread(cpu + thr); 2670 } while (--thr > 0); 2671 return 0; 2672 } 2673 } 2674 return 1; 2675 } 2676 2677 /* 2678 * A list of virtual cores for each physical CPU. 2679 * These are vcores that could run but their runner VCPU tasks are 2680 * (or may be) preempted. 2681 */ 2682 struct preempted_vcore_list { 2683 struct list_head list; 2684 spinlock_t lock; 2685 }; 2686 2687 static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores); 2688 2689 static void init_vcore_lists(void) 2690 { 2691 int cpu; 2692 2693 for_each_possible_cpu(cpu) { 2694 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu); 2695 spin_lock_init(&lp->lock); 2696 INIT_LIST_HEAD(&lp->list); 2697 } 2698 } 2699 2700 static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc) 2701 { 2702 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 2703 2704 vc->vcore_state = VCORE_PREEMPT; 2705 vc->pcpu = smp_processor_id(); 2706 if (vc->num_threads < threads_per_vcore(vc->kvm)) { 2707 spin_lock(&lp->lock); 2708 list_add_tail(&vc->preempt_list, &lp->list); 2709 spin_unlock(&lp->lock); 2710 } 2711 2712 /* Start accumulating stolen time */ 2713 kvmppc_core_start_stolen(vc); 2714 } 2715 2716 static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc) 2717 { 2718 struct preempted_vcore_list *lp; 2719 2720 kvmppc_core_end_stolen(vc); 2721 if (!list_empty(&vc->preempt_list)) { 2722 lp = &per_cpu(preempted_vcores, vc->pcpu); 2723 spin_lock(&lp->lock); 2724 list_del_init(&vc->preempt_list); 2725 spin_unlock(&lp->lock); 2726 } 2727 vc->vcore_state = VCORE_INACTIVE; 2728 } 2729 2730 /* 2731 * This stores information about the virtual cores currently 2732 * assigned to a physical core. 2733 */ 2734 struct core_info { 2735 int n_subcores; 2736 int max_subcore_threads; 2737 int total_threads; 2738 int subcore_threads[MAX_SUBCORES]; 2739 struct kvmppc_vcore *vc[MAX_SUBCORES]; 2740 }; 2741 2742 /* 2743 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7 2744 * respectively in 2-way micro-threading (split-core) mode on POWER8. 2745 */ 2746 static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 }; 2747 2748 static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc) 2749 { 2750 memset(cip, 0, sizeof(*cip)); 2751 cip->n_subcores = 1; 2752 cip->max_subcore_threads = vc->num_threads; 2753 cip->total_threads = vc->num_threads; 2754 cip->subcore_threads[0] = vc->num_threads; 2755 cip->vc[0] = vc; 2756 } 2757 2758 static bool subcore_config_ok(int n_subcores, int n_threads) 2759 { 2760 /* 2761 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way 2762 * split-core mode, with one thread per subcore. 2763 */ 2764 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2765 return n_subcores <= 4 && n_threads == 1; 2766 2767 /* On POWER8, can only dynamically split if unsplit to begin with */ 2768 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS) 2769 return false; 2770 if (n_subcores > MAX_SUBCORES) 2771 return false; 2772 if (n_subcores > 1) { 2773 if (!(dynamic_mt_modes & 2)) 2774 n_subcores = 4; 2775 if (n_subcores > 2 && !(dynamic_mt_modes & 4)) 2776 return false; 2777 } 2778 2779 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS; 2780 } 2781 2782 static void init_vcore_to_run(struct kvmppc_vcore *vc) 2783 { 2784 vc->entry_exit_map = 0; 2785 vc->in_guest = 0; 2786 vc->napping_threads = 0; 2787 vc->conferring_threads = 0; 2788 vc->tb_offset_applied = 0; 2789 } 2790 2791 static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip) 2792 { 2793 int n_threads = vc->num_threads; 2794 int sub; 2795 2796 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 2797 return false; 2798 2799 /* In one_vm_per_core mode, require all vcores to be from the same vm */ 2800 if (one_vm_per_core && vc->kvm != cip->vc[0]->kvm) 2801 return false; 2802 2803 /* Some POWER9 chips require all threads to be in the same MMU mode */ 2804 if (no_mixing_hpt_and_radix && 2805 kvm_is_radix(vc->kvm) != kvm_is_radix(cip->vc[0]->kvm)) 2806 return false; 2807 2808 if (n_threads < cip->max_subcore_threads) 2809 n_threads = cip->max_subcore_threads; 2810 if (!subcore_config_ok(cip->n_subcores + 1, n_threads)) 2811 return false; 2812 cip->max_subcore_threads = n_threads; 2813 2814 sub = cip->n_subcores; 2815 ++cip->n_subcores; 2816 cip->total_threads += vc->num_threads; 2817 cip->subcore_threads[sub] = vc->num_threads; 2818 cip->vc[sub] = vc; 2819 init_vcore_to_run(vc); 2820 list_del_init(&vc->preempt_list); 2821 2822 return true; 2823 } 2824 2825 /* 2826 * Work out whether it is possible to piggyback the execution of 2827 * vcore *pvc onto the execution of the other vcores described in *cip. 2828 */ 2829 static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip, 2830 int target_threads) 2831 { 2832 if (cip->total_threads + pvc->num_threads > target_threads) 2833 return false; 2834 2835 return can_dynamic_split(pvc, cip); 2836 } 2837 2838 static void prepare_threads(struct kvmppc_vcore *vc) 2839 { 2840 int i; 2841 struct kvm_vcpu *vcpu; 2842 2843 for_each_runnable_thread(i, vcpu, vc) { 2844 if (signal_pending(vcpu->arch.run_task)) 2845 vcpu->arch.ret = -EINTR; 2846 else if (vcpu->arch.vpa.update_pending || 2847 vcpu->arch.slb_shadow.update_pending || 2848 vcpu->arch.dtl.update_pending) 2849 vcpu->arch.ret = RESUME_GUEST; 2850 else 2851 continue; 2852 kvmppc_remove_runnable(vc, vcpu); 2853 wake_up(&vcpu->arch.cpu_run); 2854 } 2855 } 2856 2857 static void collect_piggybacks(struct core_info *cip, int target_threads) 2858 { 2859 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 2860 struct kvmppc_vcore *pvc, *vcnext; 2861 2862 spin_lock(&lp->lock); 2863 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) { 2864 if (!spin_trylock(&pvc->lock)) 2865 continue; 2866 prepare_threads(pvc); 2867 if (!pvc->n_runnable) { 2868 list_del_init(&pvc->preempt_list); 2869 if (pvc->runner == NULL) { 2870 pvc->vcore_state = VCORE_INACTIVE; 2871 kvmppc_core_end_stolen(pvc); 2872 } 2873 spin_unlock(&pvc->lock); 2874 continue; 2875 } 2876 if (!can_piggyback(pvc, cip, target_threads)) { 2877 spin_unlock(&pvc->lock); 2878 continue; 2879 } 2880 kvmppc_core_end_stolen(pvc); 2881 pvc->vcore_state = VCORE_PIGGYBACK; 2882 if (cip->total_threads >= target_threads) 2883 break; 2884 } 2885 spin_unlock(&lp->lock); 2886 } 2887 2888 static bool recheck_signals(struct core_info *cip) 2889 { 2890 int sub, i; 2891 struct kvm_vcpu *vcpu; 2892 2893 for (sub = 0; sub < cip->n_subcores; ++sub) 2894 for_each_runnable_thread(i, vcpu, cip->vc[sub]) 2895 if (signal_pending(vcpu->arch.run_task)) 2896 return true; 2897 return false; 2898 } 2899 2900 static void post_guest_process(struct kvmppc_vcore *vc, bool is_master) 2901 { 2902 int still_running = 0, i; 2903 u64 now; 2904 long ret; 2905 struct kvm_vcpu *vcpu; 2906 2907 spin_lock(&vc->lock); 2908 now = get_tb(); 2909 for_each_runnable_thread(i, vcpu, vc) { 2910 /* 2911 * It's safe to unlock the vcore in the loop here, because 2912 * for_each_runnable_thread() is safe against removal of 2913 * the vcpu, and the vcore state is VCORE_EXITING here, 2914 * so any vcpus becoming runnable will have their arch.trap 2915 * set to zero and can't actually run in the guest. 2916 */ 2917 spin_unlock(&vc->lock); 2918 /* cancel pending dec exception if dec is positive */ 2919 if (now < vcpu->arch.dec_expires && 2920 kvmppc_core_pending_dec(vcpu)) 2921 kvmppc_core_dequeue_dec(vcpu); 2922 2923 trace_kvm_guest_exit(vcpu); 2924 2925 ret = RESUME_GUEST; 2926 if (vcpu->arch.trap) 2927 ret = kvmppc_handle_exit_hv(vcpu->arch.kvm_run, vcpu, 2928 vcpu->arch.run_task); 2929 2930 vcpu->arch.ret = ret; 2931 vcpu->arch.trap = 0; 2932 2933 spin_lock(&vc->lock); 2934 if (is_kvmppc_resume_guest(vcpu->arch.ret)) { 2935 if (vcpu->arch.pending_exceptions) 2936 kvmppc_core_prepare_to_enter(vcpu); 2937 if (vcpu->arch.ceded) 2938 kvmppc_set_timer(vcpu); 2939 else 2940 ++still_running; 2941 } else { 2942 kvmppc_remove_runnable(vc, vcpu); 2943 wake_up(&vcpu->arch.cpu_run); 2944 } 2945 } 2946 if (!is_master) { 2947 if (still_running > 0) { 2948 kvmppc_vcore_preempt(vc); 2949 } else if (vc->runner) { 2950 vc->vcore_state = VCORE_PREEMPT; 2951 kvmppc_core_start_stolen(vc); 2952 } else { 2953 vc->vcore_state = VCORE_INACTIVE; 2954 } 2955 if (vc->n_runnable > 0 && vc->runner == NULL) { 2956 /* make sure there's a candidate runner awake */ 2957 i = -1; 2958 vcpu = next_runnable_thread(vc, &i); 2959 wake_up(&vcpu->arch.cpu_run); 2960 } 2961 } 2962 spin_unlock(&vc->lock); 2963 } 2964 2965 /* 2966 * Clear core from the list of active host cores as we are about to 2967 * enter the guest. Only do this if it is the primary thread of the 2968 * core (not if a subcore) that is entering the guest. 2969 */ 2970 static inline int kvmppc_clear_host_core(unsigned int cpu) 2971 { 2972 int core; 2973 2974 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 2975 return 0; 2976 /* 2977 * Memory barrier can be omitted here as we will do a smp_wmb() 2978 * later in kvmppc_start_thread and we need ensure that state is 2979 * visible to other CPUs only after we enter guest. 2980 */ 2981 core = cpu >> threads_shift; 2982 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0; 2983 return 0; 2984 } 2985 2986 /* 2987 * Advertise this core as an active host core since we exited the guest 2988 * Only need to do this if it is the primary thread of the core that is 2989 * exiting. 2990 */ 2991 static inline int kvmppc_set_host_core(unsigned int cpu) 2992 { 2993 int core; 2994 2995 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 2996 return 0; 2997 2998 /* 2999 * Memory barrier can be omitted here because we do a spin_unlock 3000 * immediately after this which provides the memory barrier. 3001 */ 3002 core = cpu >> threads_shift; 3003 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1; 3004 return 0; 3005 } 3006 3007 static void set_irq_happened(int trap) 3008 { 3009 switch (trap) { 3010 case BOOK3S_INTERRUPT_EXTERNAL: 3011 local_paca->irq_happened |= PACA_IRQ_EE; 3012 break; 3013 case BOOK3S_INTERRUPT_H_DOORBELL: 3014 local_paca->irq_happened |= PACA_IRQ_DBELL; 3015 break; 3016 case BOOK3S_INTERRUPT_HMI: 3017 local_paca->irq_happened |= PACA_IRQ_HMI; 3018 break; 3019 case BOOK3S_INTERRUPT_SYSTEM_RESET: 3020 replay_system_reset(); 3021 break; 3022 } 3023 } 3024 3025 /* 3026 * Run a set of guest threads on a physical core. 3027 * Called with vc->lock held. 3028 */ 3029 static noinline void kvmppc_run_core(struct kvmppc_vcore *vc) 3030 { 3031 struct kvm_vcpu *vcpu; 3032 int i; 3033 int srcu_idx; 3034 struct core_info core_info; 3035 struct kvmppc_vcore *pvc; 3036 struct kvm_split_mode split_info, *sip; 3037 int split, subcore_size, active; 3038 int sub; 3039 bool thr0_done; 3040 unsigned long cmd_bit, stat_bit; 3041 int pcpu, thr; 3042 int target_threads; 3043 int controlled_threads; 3044 int trap; 3045 bool is_power8; 3046 bool hpt_on_radix; 3047 3048 /* 3049 * Remove from the list any threads that have a signal pending 3050 * or need a VPA update done 3051 */ 3052 prepare_threads(vc); 3053 3054 /* if the runner is no longer runnable, let the caller pick a new one */ 3055 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE) 3056 return; 3057 3058 /* 3059 * Initialize *vc. 3060 */ 3061 init_vcore_to_run(vc); 3062 vc->preempt_tb = TB_NIL; 3063 3064 /* 3065 * Number of threads that we will be controlling: the same as 3066 * the number of threads per subcore, except on POWER9, 3067 * where it's 1 because the threads are (mostly) independent. 3068 */ 3069 controlled_threads = threads_per_vcore(vc->kvm); 3070 3071 /* 3072 * Make sure we are running on primary threads, and that secondary 3073 * threads are offline. Also check if the number of threads in this 3074 * guest are greater than the current system threads per guest. 3075 * On POWER9, we need to be not in independent-threads mode if 3076 * this is a HPT guest on a radix host machine where the 3077 * CPU threads may not be in different MMU modes. 3078 */ 3079 hpt_on_radix = no_mixing_hpt_and_radix && radix_enabled() && 3080 !kvm_is_radix(vc->kvm); 3081 if (((controlled_threads > 1) && 3082 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) || 3083 (hpt_on_radix && vc->kvm->arch.threads_indep)) { 3084 for_each_runnable_thread(i, vcpu, vc) { 3085 vcpu->arch.ret = -EBUSY; 3086 kvmppc_remove_runnable(vc, vcpu); 3087 wake_up(&vcpu->arch.cpu_run); 3088 } 3089 goto out; 3090 } 3091 3092 /* 3093 * See if we could run any other vcores on the physical core 3094 * along with this one. 3095 */ 3096 init_core_info(&core_info, vc); 3097 pcpu = smp_processor_id(); 3098 target_threads = controlled_threads; 3099 if (target_smt_mode && target_smt_mode < target_threads) 3100 target_threads = target_smt_mode; 3101 if (vc->num_threads < target_threads) 3102 collect_piggybacks(&core_info, target_threads); 3103 3104 /* 3105 * On radix, arrange for TLB flushing if necessary. 3106 * This has to be done before disabling interrupts since 3107 * it uses smp_call_function(). 3108 */ 3109 pcpu = smp_processor_id(); 3110 if (kvm_is_radix(vc->kvm)) { 3111 for (sub = 0; sub < core_info.n_subcores; ++sub) 3112 for_each_runnable_thread(i, vcpu, core_info.vc[sub]) 3113 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 3114 } 3115 3116 /* 3117 * Hard-disable interrupts, and check resched flag and signals. 3118 * If we need to reschedule or deliver a signal, clean up 3119 * and return without going into the guest(s). 3120 * If the mmu_ready flag has been cleared, don't go into the 3121 * guest because that means a HPT resize operation is in progress. 3122 */ 3123 local_irq_disable(); 3124 hard_irq_disable(); 3125 if (lazy_irq_pending() || need_resched() || 3126 recheck_signals(&core_info) || !vc->kvm->arch.mmu_ready) { 3127 local_irq_enable(); 3128 vc->vcore_state = VCORE_INACTIVE; 3129 /* Unlock all except the primary vcore */ 3130 for (sub = 1; sub < core_info.n_subcores; ++sub) { 3131 pvc = core_info.vc[sub]; 3132 /* Put back on to the preempted vcores list */ 3133 kvmppc_vcore_preempt(pvc); 3134 spin_unlock(&pvc->lock); 3135 } 3136 for (i = 0; i < controlled_threads; ++i) 3137 kvmppc_release_hwthread(pcpu + i); 3138 return; 3139 } 3140 3141 kvmppc_clear_host_core(pcpu); 3142 3143 /* Decide on micro-threading (split-core) mode */ 3144 subcore_size = threads_per_subcore; 3145 cmd_bit = stat_bit = 0; 3146 split = core_info.n_subcores; 3147 sip = NULL; 3148 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S) 3149 && !cpu_has_feature(CPU_FTR_ARCH_300); 3150 3151 if (split > 1 || hpt_on_radix) { 3152 sip = &split_info; 3153 memset(&split_info, 0, sizeof(split_info)); 3154 for (sub = 0; sub < core_info.n_subcores; ++sub) 3155 split_info.vc[sub] = core_info.vc[sub]; 3156 3157 if (is_power8) { 3158 if (split == 2 && (dynamic_mt_modes & 2)) { 3159 cmd_bit = HID0_POWER8_1TO2LPAR; 3160 stat_bit = HID0_POWER8_2LPARMODE; 3161 } else { 3162 split = 4; 3163 cmd_bit = HID0_POWER8_1TO4LPAR; 3164 stat_bit = HID0_POWER8_4LPARMODE; 3165 } 3166 subcore_size = MAX_SMT_THREADS / split; 3167 split_info.rpr = mfspr(SPRN_RPR); 3168 split_info.pmmar = mfspr(SPRN_PMMAR); 3169 split_info.ldbar = mfspr(SPRN_LDBAR); 3170 split_info.subcore_size = subcore_size; 3171 } else { 3172 split_info.subcore_size = 1; 3173 if (hpt_on_radix) { 3174 /* Use the split_info for LPCR/LPIDR changes */ 3175 split_info.lpcr_req = vc->lpcr; 3176 split_info.lpidr_req = vc->kvm->arch.lpid; 3177 split_info.host_lpcr = vc->kvm->arch.host_lpcr; 3178 split_info.do_set = 1; 3179 } 3180 } 3181 3182 /* order writes to split_info before kvm_split_mode pointer */ 3183 smp_wmb(); 3184 } 3185 3186 for (thr = 0; thr < controlled_threads; ++thr) { 3187 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3188 3189 paca->kvm_hstate.tid = thr; 3190 paca->kvm_hstate.napping = 0; 3191 paca->kvm_hstate.kvm_split_mode = sip; 3192 } 3193 3194 /* Initiate micro-threading (split-core) on POWER8 if required */ 3195 if (cmd_bit) { 3196 unsigned long hid0 = mfspr(SPRN_HID0); 3197 3198 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS; 3199 mb(); 3200 mtspr(SPRN_HID0, hid0); 3201 isync(); 3202 for (;;) { 3203 hid0 = mfspr(SPRN_HID0); 3204 if (hid0 & stat_bit) 3205 break; 3206 cpu_relax(); 3207 } 3208 } 3209 3210 /* 3211 * On POWER8, set RWMR register. 3212 * Since it only affects PURR and SPURR, it doesn't affect 3213 * the host, so we don't save/restore the host value. 3214 */ 3215 if (is_power8) { 3216 unsigned long rwmr_val = RWMR_RPA_P8_8THREAD; 3217 int n_online = atomic_read(&vc->online_count); 3218 3219 /* 3220 * Use the 8-thread value if we're doing split-core 3221 * or if the vcore's online count looks bogus. 3222 */ 3223 if (split == 1 && threads_per_subcore == MAX_SMT_THREADS && 3224 n_online >= 1 && n_online <= MAX_SMT_THREADS) 3225 rwmr_val = p8_rwmr_values[n_online]; 3226 mtspr(SPRN_RWMR, rwmr_val); 3227 } 3228 3229 /* Start all the threads */ 3230 active = 0; 3231 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3232 thr = is_power8 ? subcore_thread_map[sub] : sub; 3233 thr0_done = false; 3234 active |= 1 << thr; 3235 pvc = core_info.vc[sub]; 3236 pvc->pcpu = pcpu + thr; 3237 for_each_runnable_thread(i, vcpu, pvc) { 3238 kvmppc_start_thread(vcpu, pvc); 3239 kvmppc_create_dtl_entry(vcpu, pvc); 3240 trace_kvm_guest_enter(vcpu); 3241 if (!vcpu->arch.ptid) 3242 thr0_done = true; 3243 active |= 1 << (thr + vcpu->arch.ptid); 3244 } 3245 /* 3246 * We need to start the first thread of each subcore 3247 * even if it doesn't have a vcpu. 3248 */ 3249 if (!thr0_done) 3250 kvmppc_start_thread(NULL, pvc); 3251 } 3252 3253 /* 3254 * Ensure that split_info.do_nap is set after setting 3255 * the vcore pointer in the PACA of the secondaries. 3256 */ 3257 smp_mb(); 3258 3259 /* 3260 * When doing micro-threading, poke the inactive threads as well. 3261 * This gets them to the nap instruction after kvm_do_nap, 3262 * which reduces the time taken to unsplit later. 3263 * For POWER9 HPT guest on radix host, we need all the secondary 3264 * threads woken up so they can do the LPCR/LPIDR change. 3265 */ 3266 if (cmd_bit || hpt_on_radix) { 3267 split_info.do_nap = 1; /* ask secondaries to nap when done */ 3268 for (thr = 1; thr < threads_per_subcore; ++thr) 3269 if (!(active & (1 << thr))) 3270 kvmppc_ipi_thread(pcpu + thr); 3271 } 3272 3273 vc->vcore_state = VCORE_RUNNING; 3274 preempt_disable(); 3275 3276 trace_kvmppc_run_core(vc, 0); 3277 3278 for (sub = 0; sub < core_info.n_subcores; ++sub) 3279 spin_unlock(&core_info.vc[sub]->lock); 3280 3281 guest_enter_irqoff(); 3282 3283 srcu_idx = srcu_read_lock(&vc->kvm->srcu); 3284 3285 this_cpu_disable_ftrace(); 3286 3287 /* 3288 * Interrupts will be enabled once we get into the guest, 3289 * so tell lockdep that we're about to enable interrupts. 3290 */ 3291 trace_hardirqs_on(); 3292 3293 trap = __kvmppc_vcore_entry(); 3294 3295 trace_hardirqs_off(); 3296 3297 this_cpu_enable_ftrace(); 3298 3299 srcu_read_unlock(&vc->kvm->srcu, srcu_idx); 3300 3301 set_irq_happened(trap); 3302 3303 spin_lock(&vc->lock); 3304 /* prevent other vcpu threads from doing kvmppc_start_thread() now */ 3305 vc->vcore_state = VCORE_EXITING; 3306 3307 /* wait for secondary threads to finish writing their state to memory */ 3308 kvmppc_wait_for_nap(controlled_threads); 3309 3310 /* Return to whole-core mode if we split the core earlier */ 3311 if (cmd_bit) { 3312 unsigned long hid0 = mfspr(SPRN_HID0); 3313 unsigned long loops = 0; 3314 3315 hid0 &= ~HID0_POWER8_DYNLPARDIS; 3316 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE; 3317 mb(); 3318 mtspr(SPRN_HID0, hid0); 3319 isync(); 3320 for (;;) { 3321 hid0 = mfspr(SPRN_HID0); 3322 if (!(hid0 & stat_bit)) 3323 break; 3324 cpu_relax(); 3325 ++loops; 3326 } 3327 } else if (hpt_on_radix) { 3328 /* Wait for all threads to have seen final sync */ 3329 for (thr = 1; thr < controlled_threads; ++thr) { 3330 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3331 3332 while (paca->kvm_hstate.kvm_split_mode) { 3333 HMT_low(); 3334 barrier(); 3335 } 3336 HMT_medium(); 3337 } 3338 } 3339 split_info.do_nap = 0; 3340 3341 kvmppc_set_host_core(pcpu); 3342 3343 local_irq_enable(); 3344 guest_exit(); 3345 3346 /* Let secondaries go back to the offline loop */ 3347 for (i = 0; i < controlled_threads; ++i) { 3348 kvmppc_release_hwthread(pcpu + i); 3349 if (sip && sip->napped[i]) 3350 kvmppc_ipi_thread(pcpu + i); 3351 cpumask_clear_cpu(pcpu + i, &vc->kvm->arch.cpu_in_guest); 3352 } 3353 3354 spin_unlock(&vc->lock); 3355 3356 /* make sure updates to secondary vcpu structs are visible now */ 3357 smp_mb(); 3358 3359 preempt_enable(); 3360 3361 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3362 pvc = core_info.vc[sub]; 3363 post_guest_process(pvc, pvc == vc); 3364 } 3365 3366 spin_lock(&vc->lock); 3367 3368 out: 3369 vc->vcore_state = VCORE_INACTIVE; 3370 trace_kvmppc_run_core(vc, 1); 3371 } 3372 3373 /* 3374 * Load up hypervisor-mode registers on P9. 3375 */ 3376 static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit, 3377 unsigned long lpcr) 3378 { 3379 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3380 s64 hdec; 3381 u64 tb, purr, spurr; 3382 int trap; 3383 unsigned long host_hfscr = mfspr(SPRN_HFSCR); 3384 unsigned long host_ciabr = mfspr(SPRN_CIABR); 3385 unsigned long host_dawr = mfspr(SPRN_DAWR); 3386 unsigned long host_dawrx = mfspr(SPRN_DAWRX); 3387 unsigned long host_psscr = mfspr(SPRN_PSSCR); 3388 unsigned long host_pidr = mfspr(SPRN_PID); 3389 3390 hdec = time_limit - mftb(); 3391 if (hdec < 0) 3392 return BOOK3S_INTERRUPT_HV_DECREMENTER; 3393 mtspr(SPRN_HDEC, hdec); 3394 3395 if (vc->tb_offset) { 3396 u64 new_tb = mftb() + vc->tb_offset; 3397 mtspr(SPRN_TBU40, new_tb); 3398 tb = mftb(); 3399 if ((tb & 0xffffff) < (new_tb & 0xffffff)) 3400 mtspr(SPRN_TBU40, new_tb + 0x1000000); 3401 vc->tb_offset_applied = vc->tb_offset; 3402 } 3403 3404 if (vc->pcr) 3405 mtspr(SPRN_PCR, vc->pcr); 3406 mtspr(SPRN_DPDES, vc->dpdes); 3407 mtspr(SPRN_VTB, vc->vtb); 3408 3409 local_paca->kvm_hstate.host_purr = mfspr(SPRN_PURR); 3410 local_paca->kvm_hstate.host_spurr = mfspr(SPRN_SPURR); 3411 mtspr(SPRN_PURR, vcpu->arch.purr); 3412 mtspr(SPRN_SPURR, vcpu->arch.spurr); 3413 3414 if (dawr_enabled()) { 3415 mtspr(SPRN_DAWR, vcpu->arch.dawr); 3416 mtspr(SPRN_DAWRX, vcpu->arch.dawrx); 3417 } 3418 mtspr(SPRN_CIABR, vcpu->arch.ciabr); 3419 mtspr(SPRN_IC, vcpu->arch.ic); 3420 mtspr(SPRN_PID, vcpu->arch.pid); 3421 3422 mtspr(SPRN_PSSCR, vcpu->arch.psscr | PSSCR_EC | 3423 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG)); 3424 3425 mtspr(SPRN_HFSCR, vcpu->arch.hfscr); 3426 3427 mtspr(SPRN_SPRG0, vcpu->arch.shregs.sprg0); 3428 mtspr(SPRN_SPRG1, vcpu->arch.shregs.sprg1); 3429 mtspr(SPRN_SPRG2, vcpu->arch.shregs.sprg2); 3430 mtspr(SPRN_SPRG3, vcpu->arch.shregs.sprg3); 3431 3432 mtspr(SPRN_AMOR, ~0UL); 3433 3434 mtspr(SPRN_LPCR, lpcr); 3435 isync(); 3436 3437 kvmppc_xive_push_vcpu(vcpu); 3438 3439 mtspr(SPRN_SRR0, vcpu->arch.shregs.srr0); 3440 mtspr(SPRN_SRR1, vcpu->arch.shregs.srr1); 3441 3442 trap = __kvmhv_vcpu_entry_p9(vcpu); 3443 3444 /* Advance host PURR/SPURR by the amount used by guest */ 3445 purr = mfspr(SPRN_PURR); 3446 spurr = mfspr(SPRN_SPURR); 3447 mtspr(SPRN_PURR, local_paca->kvm_hstate.host_purr + 3448 purr - vcpu->arch.purr); 3449 mtspr(SPRN_SPURR, local_paca->kvm_hstate.host_spurr + 3450 spurr - vcpu->arch.spurr); 3451 vcpu->arch.purr = purr; 3452 vcpu->arch.spurr = spurr; 3453 3454 vcpu->arch.ic = mfspr(SPRN_IC); 3455 vcpu->arch.pid = mfspr(SPRN_PID); 3456 vcpu->arch.psscr = mfspr(SPRN_PSSCR) & PSSCR_GUEST_VIS; 3457 3458 vcpu->arch.shregs.sprg0 = mfspr(SPRN_SPRG0); 3459 vcpu->arch.shregs.sprg1 = mfspr(SPRN_SPRG1); 3460 vcpu->arch.shregs.sprg2 = mfspr(SPRN_SPRG2); 3461 vcpu->arch.shregs.sprg3 = mfspr(SPRN_SPRG3); 3462 3463 /* Preserve PSSCR[FAKE_SUSPEND] until we've called kvmppc_save_tm_hv */ 3464 mtspr(SPRN_PSSCR, host_psscr | 3465 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG)); 3466 mtspr(SPRN_HFSCR, host_hfscr); 3467 mtspr(SPRN_CIABR, host_ciabr); 3468 mtspr(SPRN_DAWR, host_dawr); 3469 mtspr(SPRN_DAWRX, host_dawrx); 3470 mtspr(SPRN_PID, host_pidr); 3471 3472 /* 3473 * Since this is radix, do a eieio; tlbsync; ptesync sequence in 3474 * case we interrupted the guest between a tlbie and a ptesync. 3475 */ 3476 asm volatile("eieio; tlbsync; ptesync"); 3477 3478 mtspr(SPRN_LPID, vcpu->kvm->arch.host_lpid); /* restore host LPID */ 3479 isync(); 3480 3481 vc->dpdes = mfspr(SPRN_DPDES); 3482 vc->vtb = mfspr(SPRN_VTB); 3483 mtspr(SPRN_DPDES, 0); 3484 if (vc->pcr) 3485 mtspr(SPRN_PCR, 0); 3486 3487 if (vc->tb_offset_applied) { 3488 u64 new_tb = mftb() - vc->tb_offset_applied; 3489 mtspr(SPRN_TBU40, new_tb); 3490 tb = mftb(); 3491 if ((tb & 0xffffff) < (new_tb & 0xffffff)) 3492 mtspr(SPRN_TBU40, new_tb + 0x1000000); 3493 vc->tb_offset_applied = 0; 3494 } 3495 3496 mtspr(SPRN_HDEC, 0x7fffffff); 3497 mtspr(SPRN_LPCR, vcpu->kvm->arch.host_lpcr); 3498 3499 return trap; 3500 } 3501 3502 /* 3503 * Virtual-mode guest entry for POWER9 and later when the host and 3504 * guest are both using the radix MMU. The LPIDR has already been set. 3505 */ 3506 int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit, 3507 unsigned long lpcr) 3508 { 3509 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3510 unsigned long host_dscr = mfspr(SPRN_DSCR); 3511 unsigned long host_tidr = mfspr(SPRN_TIDR); 3512 unsigned long host_iamr = mfspr(SPRN_IAMR); 3513 unsigned long host_amr = mfspr(SPRN_AMR); 3514 s64 dec; 3515 u64 tb; 3516 int trap, save_pmu; 3517 3518 dec = mfspr(SPRN_DEC); 3519 tb = mftb(); 3520 if (dec < 512) 3521 return BOOK3S_INTERRUPT_HV_DECREMENTER; 3522 local_paca->kvm_hstate.dec_expires = dec + tb; 3523 if (local_paca->kvm_hstate.dec_expires < time_limit) 3524 time_limit = local_paca->kvm_hstate.dec_expires; 3525 3526 vcpu->arch.ceded = 0; 3527 3528 kvmhv_save_host_pmu(); /* saves it to PACA kvm_hstate */ 3529 3530 kvmppc_subcore_enter_guest(); 3531 3532 vc->entry_exit_map = 1; 3533 vc->in_guest = 1; 3534 3535 if (vcpu->arch.vpa.pinned_addr) { 3536 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3537 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3538 lp->yield_count = cpu_to_be32(yield_count); 3539 vcpu->arch.vpa.dirty = 1; 3540 } 3541 3542 if (cpu_has_feature(CPU_FTR_TM) || 3543 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3544 kvmppc_restore_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3545 3546 kvmhv_load_guest_pmu(vcpu); 3547 3548 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3549 load_fp_state(&vcpu->arch.fp); 3550 #ifdef CONFIG_ALTIVEC 3551 load_vr_state(&vcpu->arch.vr); 3552 #endif 3553 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave); 3554 3555 mtspr(SPRN_DSCR, vcpu->arch.dscr); 3556 mtspr(SPRN_IAMR, vcpu->arch.iamr); 3557 mtspr(SPRN_PSPB, vcpu->arch.pspb); 3558 mtspr(SPRN_FSCR, vcpu->arch.fscr); 3559 mtspr(SPRN_TAR, vcpu->arch.tar); 3560 mtspr(SPRN_EBBHR, vcpu->arch.ebbhr); 3561 mtspr(SPRN_EBBRR, vcpu->arch.ebbrr); 3562 mtspr(SPRN_BESCR, vcpu->arch.bescr); 3563 mtspr(SPRN_WORT, vcpu->arch.wort); 3564 mtspr(SPRN_TIDR, vcpu->arch.tid); 3565 mtspr(SPRN_DAR, vcpu->arch.shregs.dar); 3566 mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr); 3567 mtspr(SPRN_AMR, vcpu->arch.amr); 3568 mtspr(SPRN_UAMOR, vcpu->arch.uamor); 3569 3570 if (!(vcpu->arch.ctrl & 1)) 3571 mtspr(SPRN_CTRLT, mfspr(SPRN_CTRLF) & ~1); 3572 3573 mtspr(SPRN_DEC, vcpu->arch.dec_expires - mftb()); 3574 3575 if (kvmhv_on_pseries()) { 3576 /* call our hypervisor to load up HV regs and go */ 3577 struct hv_guest_state hvregs; 3578 3579 kvmhv_save_hv_regs(vcpu, &hvregs); 3580 hvregs.lpcr = lpcr; 3581 vcpu->arch.regs.msr = vcpu->arch.shregs.msr; 3582 hvregs.version = HV_GUEST_STATE_VERSION; 3583 if (vcpu->arch.nested) { 3584 hvregs.lpid = vcpu->arch.nested->shadow_lpid; 3585 hvregs.vcpu_token = vcpu->arch.nested_vcpu_id; 3586 } else { 3587 hvregs.lpid = vcpu->kvm->arch.lpid; 3588 hvregs.vcpu_token = vcpu->vcpu_id; 3589 } 3590 hvregs.hdec_expiry = time_limit; 3591 trap = plpar_hcall_norets(H_ENTER_NESTED, __pa(&hvregs), 3592 __pa(&vcpu->arch.regs)); 3593 kvmhv_restore_hv_return_state(vcpu, &hvregs); 3594 vcpu->arch.shregs.msr = vcpu->arch.regs.msr; 3595 vcpu->arch.shregs.dar = mfspr(SPRN_DAR); 3596 vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR); 3597 3598 /* H_CEDE has to be handled now, not later */ 3599 if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested && 3600 kvmppc_get_gpr(vcpu, 3) == H_CEDE) { 3601 kvmppc_nested_cede(vcpu); 3602 trap = 0; 3603 } 3604 } else { 3605 trap = kvmhv_load_hv_regs_and_go(vcpu, time_limit, lpcr); 3606 } 3607 3608 vcpu->arch.slb_max = 0; 3609 dec = mfspr(SPRN_DEC); 3610 tb = mftb(); 3611 vcpu->arch.dec_expires = dec + tb; 3612 vcpu->cpu = -1; 3613 vcpu->arch.thread_cpu = -1; 3614 vcpu->arch.ctrl = mfspr(SPRN_CTRLF); 3615 3616 vcpu->arch.iamr = mfspr(SPRN_IAMR); 3617 vcpu->arch.pspb = mfspr(SPRN_PSPB); 3618 vcpu->arch.fscr = mfspr(SPRN_FSCR); 3619 vcpu->arch.tar = mfspr(SPRN_TAR); 3620 vcpu->arch.ebbhr = mfspr(SPRN_EBBHR); 3621 vcpu->arch.ebbrr = mfspr(SPRN_EBBRR); 3622 vcpu->arch.bescr = mfspr(SPRN_BESCR); 3623 vcpu->arch.wort = mfspr(SPRN_WORT); 3624 vcpu->arch.tid = mfspr(SPRN_TIDR); 3625 vcpu->arch.amr = mfspr(SPRN_AMR); 3626 vcpu->arch.uamor = mfspr(SPRN_UAMOR); 3627 vcpu->arch.dscr = mfspr(SPRN_DSCR); 3628 3629 mtspr(SPRN_PSPB, 0); 3630 mtspr(SPRN_WORT, 0); 3631 mtspr(SPRN_UAMOR, 0); 3632 mtspr(SPRN_DSCR, host_dscr); 3633 mtspr(SPRN_TIDR, host_tidr); 3634 mtspr(SPRN_IAMR, host_iamr); 3635 mtspr(SPRN_PSPB, 0); 3636 3637 if (host_amr != vcpu->arch.amr) 3638 mtspr(SPRN_AMR, host_amr); 3639 3640 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3641 store_fp_state(&vcpu->arch.fp); 3642 #ifdef CONFIG_ALTIVEC 3643 store_vr_state(&vcpu->arch.vr); 3644 #endif 3645 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE); 3646 3647 if (cpu_has_feature(CPU_FTR_TM) || 3648 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3649 kvmppc_save_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3650 3651 save_pmu = 1; 3652 if (vcpu->arch.vpa.pinned_addr) { 3653 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3654 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3655 lp->yield_count = cpu_to_be32(yield_count); 3656 vcpu->arch.vpa.dirty = 1; 3657 save_pmu = lp->pmcregs_in_use; 3658 } 3659 3660 kvmhv_save_guest_pmu(vcpu, save_pmu); 3661 3662 vc->entry_exit_map = 0x101; 3663 vc->in_guest = 0; 3664 3665 mtspr(SPRN_DEC, local_paca->kvm_hstate.dec_expires - mftb()); 3666 3667 kvmhv_load_host_pmu(); 3668 3669 kvmppc_subcore_exit_guest(); 3670 3671 return trap; 3672 } 3673 3674 /* 3675 * Wait for some other vcpu thread to execute us, and 3676 * wake us up when we need to handle something in the host. 3677 */ 3678 static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc, 3679 struct kvm_vcpu *vcpu, int wait_state) 3680 { 3681 DEFINE_WAIT(wait); 3682 3683 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state); 3684 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 3685 spin_unlock(&vc->lock); 3686 schedule(); 3687 spin_lock(&vc->lock); 3688 } 3689 finish_wait(&vcpu->arch.cpu_run, &wait); 3690 } 3691 3692 static void grow_halt_poll_ns(struct kvmppc_vcore *vc) 3693 { 3694 if (!halt_poll_ns_grow) 3695 return; 3696 3697 vc->halt_poll_ns *= halt_poll_ns_grow; 3698 if (vc->halt_poll_ns < halt_poll_ns_grow_start) 3699 vc->halt_poll_ns = halt_poll_ns_grow_start; 3700 } 3701 3702 static void shrink_halt_poll_ns(struct kvmppc_vcore *vc) 3703 { 3704 if (halt_poll_ns_shrink == 0) 3705 vc->halt_poll_ns = 0; 3706 else 3707 vc->halt_poll_ns /= halt_poll_ns_shrink; 3708 } 3709 3710 #ifdef CONFIG_KVM_XICS 3711 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 3712 { 3713 if (!xics_on_xive()) 3714 return false; 3715 return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr < 3716 vcpu->arch.xive_saved_state.cppr; 3717 } 3718 #else 3719 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 3720 { 3721 return false; 3722 } 3723 #endif /* CONFIG_KVM_XICS */ 3724 3725 static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu) 3726 { 3727 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded || 3728 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu)) 3729 return true; 3730 3731 return false; 3732 } 3733 3734 /* 3735 * Check to see if any of the runnable vcpus on the vcore have pending 3736 * exceptions or are no longer ceded 3737 */ 3738 static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc) 3739 { 3740 struct kvm_vcpu *vcpu; 3741 int i; 3742 3743 for_each_runnable_thread(i, vcpu, vc) { 3744 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu)) 3745 return 1; 3746 } 3747 3748 return 0; 3749 } 3750 3751 /* 3752 * All the vcpus in this vcore are idle, so wait for a decrementer 3753 * or external interrupt to one of the vcpus. vc->lock is held. 3754 */ 3755 static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc) 3756 { 3757 ktime_t cur, start_poll, start_wait; 3758 int do_sleep = 1; 3759 u64 block_ns; 3760 DECLARE_SWAITQUEUE(wait); 3761 3762 /* Poll for pending exceptions and ceded state */ 3763 cur = start_poll = ktime_get(); 3764 if (vc->halt_poll_ns) { 3765 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns); 3766 ++vc->runner->stat.halt_attempted_poll; 3767 3768 vc->vcore_state = VCORE_POLLING; 3769 spin_unlock(&vc->lock); 3770 3771 do { 3772 if (kvmppc_vcore_check_block(vc)) { 3773 do_sleep = 0; 3774 break; 3775 } 3776 cur = ktime_get(); 3777 } while (single_task_running() && ktime_before(cur, stop)); 3778 3779 spin_lock(&vc->lock); 3780 vc->vcore_state = VCORE_INACTIVE; 3781 3782 if (!do_sleep) { 3783 ++vc->runner->stat.halt_successful_poll; 3784 goto out; 3785 } 3786 } 3787 3788 prepare_to_swait_exclusive(&vc->wq, &wait, TASK_INTERRUPTIBLE); 3789 3790 if (kvmppc_vcore_check_block(vc)) { 3791 finish_swait(&vc->wq, &wait); 3792 do_sleep = 0; 3793 /* If we polled, count this as a successful poll */ 3794 if (vc->halt_poll_ns) 3795 ++vc->runner->stat.halt_successful_poll; 3796 goto out; 3797 } 3798 3799 start_wait = ktime_get(); 3800 3801 vc->vcore_state = VCORE_SLEEPING; 3802 trace_kvmppc_vcore_blocked(vc, 0); 3803 spin_unlock(&vc->lock); 3804 schedule(); 3805 finish_swait(&vc->wq, &wait); 3806 spin_lock(&vc->lock); 3807 vc->vcore_state = VCORE_INACTIVE; 3808 trace_kvmppc_vcore_blocked(vc, 1); 3809 ++vc->runner->stat.halt_successful_wait; 3810 3811 cur = ktime_get(); 3812 3813 out: 3814 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll); 3815 3816 /* Attribute wait time */ 3817 if (do_sleep) { 3818 vc->runner->stat.halt_wait_ns += 3819 ktime_to_ns(cur) - ktime_to_ns(start_wait); 3820 /* Attribute failed poll time */ 3821 if (vc->halt_poll_ns) 3822 vc->runner->stat.halt_poll_fail_ns += 3823 ktime_to_ns(start_wait) - 3824 ktime_to_ns(start_poll); 3825 } else { 3826 /* Attribute successful poll time */ 3827 if (vc->halt_poll_ns) 3828 vc->runner->stat.halt_poll_success_ns += 3829 ktime_to_ns(cur) - 3830 ktime_to_ns(start_poll); 3831 } 3832 3833 /* Adjust poll time */ 3834 if (halt_poll_ns) { 3835 if (block_ns <= vc->halt_poll_ns) 3836 ; 3837 /* We slept and blocked for longer than the max halt time */ 3838 else if (vc->halt_poll_ns && block_ns > halt_poll_ns) 3839 shrink_halt_poll_ns(vc); 3840 /* We slept and our poll time is too small */ 3841 else if (vc->halt_poll_ns < halt_poll_ns && 3842 block_ns < halt_poll_ns) 3843 grow_halt_poll_ns(vc); 3844 if (vc->halt_poll_ns > halt_poll_ns) 3845 vc->halt_poll_ns = halt_poll_ns; 3846 } else 3847 vc->halt_poll_ns = 0; 3848 3849 trace_kvmppc_vcore_wakeup(do_sleep, block_ns); 3850 } 3851 3852 /* 3853 * This never fails for a radix guest, as none of the operations it does 3854 * for a radix guest can fail or have a way to report failure. 3855 * kvmhv_run_single_vcpu() relies on this fact. 3856 */ 3857 static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu) 3858 { 3859 int r = 0; 3860 struct kvm *kvm = vcpu->kvm; 3861 3862 mutex_lock(&kvm->lock); 3863 if (!kvm->arch.mmu_ready) { 3864 if (!kvm_is_radix(kvm)) 3865 r = kvmppc_hv_setup_htab_rma(vcpu); 3866 if (!r) { 3867 if (cpu_has_feature(CPU_FTR_ARCH_300)) 3868 kvmppc_setup_partition_table(kvm); 3869 kvm->arch.mmu_ready = 1; 3870 } 3871 } 3872 mutex_unlock(&kvm->lock); 3873 return r; 3874 } 3875 3876 static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 3877 { 3878 int n_ceded, i, r; 3879 struct kvmppc_vcore *vc; 3880 struct kvm_vcpu *v; 3881 3882 trace_kvmppc_run_vcpu_enter(vcpu); 3883 3884 kvm_run->exit_reason = 0; 3885 vcpu->arch.ret = RESUME_GUEST; 3886 vcpu->arch.trap = 0; 3887 kvmppc_update_vpas(vcpu); 3888 3889 /* 3890 * Synchronize with other threads in this virtual core 3891 */ 3892 vc = vcpu->arch.vcore; 3893 spin_lock(&vc->lock); 3894 vcpu->arch.ceded = 0; 3895 vcpu->arch.run_task = current; 3896 vcpu->arch.kvm_run = kvm_run; 3897 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 3898 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 3899 vcpu->arch.busy_preempt = TB_NIL; 3900 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu); 3901 ++vc->n_runnable; 3902 3903 /* 3904 * This happens the first time this is called for a vcpu. 3905 * If the vcore is already running, we may be able to start 3906 * this thread straight away and have it join in. 3907 */ 3908 if (!signal_pending(current)) { 3909 if ((vc->vcore_state == VCORE_PIGGYBACK || 3910 vc->vcore_state == VCORE_RUNNING) && 3911 !VCORE_IS_EXITING(vc)) { 3912 kvmppc_create_dtl_entry(vcpu, vc); 3913 kvmppc_start_thread(vcpu, vc); 3914 trace_kvm_guest_enter(vcpu); 3915 } else if (vc->vcore_state == VCORE_SLEEPING) { 3916 swake_up_one(&vc->wq); 3917 } 3918 3919 } 3920 3921 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 3922 !signal_pending(current)) { 3923 /* See if the MMU is ready to go */ 3924 if (!vcpu->kvm->arch.mmu_ready) { 3925 spin_unlock(&vc->lock); 3926 r = kvmhv_setup_mmu(vcpu); 3927 spin_lock(&vc->lock); 3928 if (r) { 3929 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY; 3930 kvm_run->fail_entry. 3931 hardware_entry_failure_reason = 0; 3932 vcpu->arch.ret = r; 3933 break; 3934 } 3935 } 3936 3937 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 3938 kvmppc_vcore_end_preempt(vc); 3939 3940 if (vc->vcore_state != VCORE_INACTIVE) { 3941 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE); 3942 continue; 3943 } 3944 for_each_runnable_thread(i, v, vc) { 3945 kvmppc_core_prepare_to_enter(v); 3946 if (signal_pending(v->arch.run_task)) { 3947 kvmppc_remove_runnable(vc, v); 3948 v->stat.signal_exits++; 3949 v->arch.kvm_run->exit_reason = KVM_EXIT_INTR; 3950 v->arch.ret = -EINTR; 3951 wake_up(&v->arch.cpu_run); 3952 } 3953 } 3954 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 3955 break; 3956 n_ceded = 0; 3957 for_each_runnable_thread(i, v, vc) { 3958 if (!kvmppc_vcpu_woken(v)) 3959 n_ceded += v->arch.ceded; 3960 else 3961 v->arch.ceded = 0; 3962 } 3963 vc->runner = vcpu; 3964 if (n_ceded == vc->n_runnable) { 3965 kvmppc_vcore_blocked(vc); 3966 } else if (need_resched()) { 3967 kvmppc_vcore_preempt(vc); 3968 /* Let something else run */ 3969 cond_resched_lock(&vc->lock); 3970 if (vc->vcore_state == VCORE_PREEMPT) 3971 kvmppc_vcore_end_preempt(vc); 3972 } else { 3973 kvmppc_run_core(vc); 3974 } 3975 vc->runner = NULL; 3976 } 3977 3978 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 3979 (vc->vcore_state == VCORE_RUNNING || 3980 vc->vcore_state == VCORE_EXITING || 3981 vc->vcore_state == VCORE_PIGGYBACK)) 3982 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE); 3983 3984 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 3985 kvmppc_vcore_end_preempt(vc); 3986 3987 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 3988 kvmppc_remove_runnable(vc, vcpu); 3989 vcpu->stat.signal_exits++; 3990 kvm_run->exit_reason = KVM_EXIT_INTR; 3991 vcpu->arch.ret = -EINTR; 3992 } 3993 3994 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) { 3995 /* Wake up some vcpu to run the core */ 3996 i = -1; 3997 v = next_runnable_thread(vc, &i); 3998 wake_up(&v->arch.cpu_run); 3999 } 4000 4001 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run); 4002 spin_unlock(&vc->lock); 4003 return vcpu->arch.ret; 4004 } 4005 4006 int kvmhv_run_single_vcpu(struct kvm_run *kvm_run, 4007 struct kvm_vcpu *vcpu, u64 time_limit, 4008 unsigned long lpcr) 4009 { 4010 int trap, r, pcpu; 4011 int srcu_idx, lpid; 4012 struct kvmppc_vcore *vc; 4013 struct kvm *kvm = vcpu->kvm; 4014 struct kvm_nested_guest *nested = vcpu->arch.nested; 4015 4016 trace_kvmppc_run_vcpu_enter(vcpu); 4017 4018 kvm_run->exit_reason = 0; 4019 vcpu->arch.ret = RESUME_GUEST; 4020 vcpu->arch.trap = 0; 4021 4022 vc = vcpu->arch.vcore; 4023 vcpu->arch.ceded = 0; 4024 vcpu->arch.run_task = current; 4025 vcpu->arch.kvm_run = kvm_run; 4026 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 4027 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 4028 vcpu->arch.busy_preempt = TB_NIL; 4029 vcpu->arch.last_inst = KVM_INST_FETCH_FAILED; 4030 vc->runnable_threads[0] = vcpu; 4031 vc->n_runnable = 1; 4032 vc->runner = vcpu; 4033 4034 /* See if the MMU is ready to go */ 4035 if (!kvm->arch.mmu_ready) 4036 kvmhv_setup_mmu(vcpu); 4037 4038 if (need_resched()) 4039 cond_resched(); 4040 4041 kvmppc_update_vpas(vcpu); 4042 4043 init_vcore_to_run(vc); 4044 vc->preempt_tb = TB_NIL; 4045 4046 preempt_disable(); 4047 pcpu = smp_processor_id(); 4048 vc->pcpu = pcpu; 4049 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 4050 4051 local_irq_disable(); 4052 hard_irq_disable(); 4053 if (signal_pending(current)) 4054 goto sigpend; 4055 if (lazy_irq_pending() || need_resched() || !kvm->arch.mmu_ready) 4056 goto out; 4057 4058 if (!nested) { 4059 kvmppc_core_prepare_to_enter(vcpu); 4060 if (vcpu->arch.doorbell_request) { 4061 vc->dpdes = 1; 4062 smp_wmb(); 4063 vcpu->arch.doorbell_request = 0; 4064 } 4065 if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, 4066 &vcpu->arch.pending_exceptions)) 4067 lpcr |= LPCR_MER; 4068 } else if (vcpu->arch.pending_exceptions || 4069 vcpu->arch.doorbell_request || 4070 xive_interrupt_pending(vcpu)) { 4071 vcpu->arch.ret = RESUME_HOST; 4072 goto out; 4073 } 4074 4075 kvmppc_clear_host_core(pcpu); 4076 4077 local_paca->kvm_hstate.tid = 0; 4078 local_paca->kvm_hstate.napping = 0; 4079 local_paca->kvm_hstate.kvm_split_mode = NULL; 4080 kvmppc_start_thread(vcpu, vc); 4081 kvmppc_create_dtl_entry(vcpu, vc); 4082 trace_kvm_guest_enter(vcpu); 4083 4084 vc->vcore_state = VCORE_RUNNING; 4085 trace_kvmppc_run_core(vc, 0); 4086 4087 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4088 lpid = nested ? nested->shadow_lpid : kvm->arch.lpid; 4089 mtspr(SPRN_LPID, lpid); 4090 isync(); 4091 kvmppc_check_need_tlb_flush(kvm, pcpu, nested); 4092 } 4093 4094 trace_hardirqs_on(); 4095 guest_enter_irqoff(); 4096 4097 srcu_idx = srcu_read_lock(&kvm->srcu); 4098 4099 this_cpu_disable_ftrace(); 4100 4101 trap = kvmhv_p9_guest_entry(vcpu, time_limit, lpcr); 4102 vcpu->arch.trap = trap; 4103 4104 this_cpu_enable_ftrace(); 4105 4106 srcu_read_unlock(&kvm->srcu, srcu_idx); 4107 4108 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4109 mtspr(SPRN_LPID, kvm->arch.host_lpid); 4110 isync(); 4111 } 4112 4113 trace_hardirqs_off(); 4114 set_irq_happened(trap); 4115 4116 kvmppc_set_host_core(pcpu); 4117 4118 local_irq_enable(); 4119 guest_exit(); 4120 4121 cpumask_clear_cpu(pcpu, &kvm->arch.cpu_in_guest); 4122 4123 preempt_enable(); 4124 4125 /* cancel pending decrementer exception if DEC is now positive */ 4126 if (get_tb() < vcpu->arch.dec_expires && kvmppc_core_pending_dec(vcpu)) 4127 kvmppc_core_dequeue_dec(vcpu); 4128 4129 trace_kvm_guest_exit(vcpu); 4130 r = RESUME_GUEST; 4131 if (trap) { 4132 if (!nested) 4133 r = kvmppc_handle_exit_hv(kvm_run, vcpu, current); 4134 else 4135 r = kvmppc_handle_nested_exit(kvm_run, vcpu); 4136 } 4137 vcpu->arch.ret = r; 4138 4139 if (is_kvmppc_resume_guest(r) && vcpu->arch.ceded && 4140 !kvmppc_vcpu_woken(vcpu)) { 4141 kvmppc_set_timer(vcpu); 4142 while (vcpu->arch.ceded && !kvmppc_vcpu_woken(vcpu)) { 4143 if (signal_pending(current)) { 4144 vcpu->stat.signal_exits++; 4145 kvm_run->exit_reason = KVM_EXIT_INTR; 4146 vcpu->arch.ret = -EINTR; 4147 break; 4148 } 4149 spin_lock(&vc->lock); 4150 kvmppc_vcore_blocked(vc); 4151 spin_unlock(&vc->lock); 4152 } 4153 } 4154 vcpu->arch.ceded = 0; 4155 4156 vc->vcore_state = VCORE_INACTIVE; 4157 trace_kvmppc_run_core(vc, 1); 4158 4159 done: 4160 kvmppc_remove_runnable(vc, vcpu); 4161 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run); 4162 4163 return vcpu->arch.ret; 4164 4165 sigpend: 4166 vcpu->stat.signal_exits++; 4167 kvm_run->exit_reason = KVM_EXIT_INTR; 4168 vcpu->arch.ret = -EINTR; 4169 out: 4170 local_irq_enable(); 4171 preempt_enable(); 4172 goto done; 4173 } 4174 4175 static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu) 4176 { 4177 int r; 4178 int srcu_idx; 4179 unsigned long ebb_regs[3] = {}; /* shut up GCC */ 4180 unsigned long user_tar = 0; 4181 unsigned int user_vrsave; 4182 struct kvm *kvm; 4183 4184 if (!vcpu->arch.sane) { 4185 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 4186 return -EINVAL; 4187 } 4188 4189 /* 4190 * Don't allow entry with a suspended transaction, because 4191 * the guest entry/exit code will lose it. 4192 * If the guest has TM enabled, save away their TM-related SPRs 4193 * (they will get restored by the TM unavailable interrupt). 4194 */ 4195 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 4196 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs && 4197 (current->thread.regs->msr & MSR_TM)) { 4198 if (MSR_TM_ACTIVE(current->thread.regs->msr)) { 4199 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4200 run->fail_entry.hardware_entry_failure_reason = 0; 4201 return -EINVAL; 4202 } 4203 /* Enable TM so we can read the TM SPRs */ 4204 mtmsr(mfmsr() | MSR_TM); 4205 current->thread.tm_tfhar = mfspr(SPRN_TFHAR); 4206 current->thread.tm_tfiar = mfspr(SPRN_TFIAR); 4207 current->thread.tm_texasr = mfspr(SPRN_TEXASR); 4208 current->thread.regs->msr &= ~MSR_TM; 4209 } 4210 #endif 4211 4212 /* 4213 * Force online to 1 for the sake of old userspace which doesn't 4214 * set it. 4215 */ 4216 if (!vcpu->arch.online) { 4217 atomic_inc(&vcpu->arch.vcore->online_count); 4218 vcpu->arch.online = 1; 4219 } 4220 4221 kvmppc_core_prepare_to_enter(vcpu); 4222 4223 /* No need to go into the guest when all we'll do is come back out */ 4224 if (signal_pending(current)) { 4225 run->exit_reason = KVM_EXIT_INTR; 4226 return -EINTR; 4227 } 4228 4229 kvm = vcpu->kvm; 4230 atomic_inc(&kvm->arch.vcpus_running); 4231 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */ 4232 smp_mb(); 4233 4234 flush_all_to_thread(current); 4235 4236 /* Save userspace EBB and other register values */ 4237 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4238 ebb_regs[0] = mfspr(SPRN_EBBHR); 4239 ebb_regs[1] = mfspr(SPRN_EBBRR); 4240 ebb_regs[2] = mfspr(SPRN_BESCR); 4241 user_tar = mfspr(SPRN_TAR); 4242 } 4243 user_vrsave = mfspr(SPRN_VRSAVE); 4244 4245 vcpu->arch.wqp = &vcpu->arch.vcore->wq; 4246 vcpu->arch.pgdir = current->mm->pgd; 4247 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 4248 4249 do { 4250 /* 4251 * The early POWER9 chips that can't mix radix and HPT threads 4252 * on the same core also need the workaround for the problem 4253 * where the TLB would prefetch entries in the guest exit path 4254 * for radix guests using the guest PIDR value and LPID 0. 4255 * The workaround is in the old path (kvmppc_run_vcpu()) 4256 * but not the new path (kvmhv_run_single_vcpu()). 4257 */ 4258 if (kvm->arch.threads_indep && kvm_is_radix(kvm) && 4259 !no_mixing_hpt_and_radix) 4260 r = kvmhv_run_single_vcpu(run, vcpu, ~(u64)0, 4261 vcpu->arch.vcore->lpcr); 4262 else 4263 r = kvmppc_run_vcpu(run, vcpu); 4264 4265 if (run->exit_reason == KVM_EXIT_PAPR_HCALL && 4266 !(vcpu->arch.shregs.msr & MSR_PR)) { 4267 trace_kvm_hcall_enter(vcpu); 4268 r = kvmppc_pseries_do_hcall(vcpu); 4269 trace_kvm_hcall_exit(vcpu, r); 4270 kvmppc_core_prepare_to_enter(vcpu); 4271 } else if (r == RESUME_PAGE_FAULT) { 4272 srcu_idx = srcu_read_lock(&kvm->srcu); 4273 r = kvmppc_book3s_hv_page_fault(run, vcpu, 4274 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 4275 srcu_read_unlock(&kvm->srcu, srcu_idx); 4276 } else if (r == RESUME_PASSTHROUGH) { 4277 if (WARN_ON(xics_on_xive())) 4278 r = H_SUCCESS; 4279 else 4280 r = kvmppc_xics_rm_complete(vcpu, 0); 4281 } 4282 } while (is_kvmppc_resume_guest(r)); 4283 4284 /* Restore userspace EBB and other register values */ 4285 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4286 mtspr(SPRN_EBBHR, ebb_regs[0]); 4287 mtspr(SPRN_EBBRR, ebb_regs[1]); 4288 mtspr(SPRN_BESCR, ebb_regs[2]); 4289 mtspr(SPRN_TAR, user_tar); 4290 mtspr(SPRN_FSCR, current->thread.fscr); 4291 } 4292 mtspr(SPRN_VRSAVE, user_vrsave); 4293 4294 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 4295 atomic_dec(&kvm->arch.vcpus_running); 4296 return r; 4297 } 4298 4299 static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps, 4300 int shift, int sllp) 4301 { 4302 (*sps)->page_shift = shift; 4303 (*sps)->slb_enc = sllp; 4304 (*sps)->enc[0].page_shift = shift; 4305 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift); 4306 /* 4307 * Add 16MB MPSS support (may get filtered out by userspace) 4308 */ 4309 if (shift != 24) { 4310 int penc = kvmppc_pgsize_lp_encoding(shift, 24); 4311 if (penc != -1) { 4312 (*sps)->enc[1].page_shift = 24; 4313 (*sps)->enc[1].pte_enc = penc; 4314 } 4315 } 4316 (*sps)++; 4317 } 4318 4319 static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm, 4320 struct kvm_ppc_smmu_info *info) 4321 { 4322 struct kvm_ppc_one_seg_page_size *sps; 4323 4324 /* 4325 * POWER7, POWER8 and POWER9 all support 32 storage keys for data. 4326 * POWER7 doesn't support keys for instruction accesses, 4327 * POWER8 and POWER9 do. 4328 */ 4329 info->data_keys = 32; 4330 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0; 4331 4332 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */ 4333 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS; 4334 info->slb_size = 32; 4335 4336 /* We only support these sizes for now, and no muti-size segments */ 4337 sps = &info->sps[0]; 4338 kvmppc_add_seg_page_size(&sps, 12, 0); 4339 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01); 4340 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L); 4341 4342 /* If running as a nested hypervisor, we don't support HPT guests */ 4343 if (kvmhv_on_pseries()) 4344 info->flags |= KVM_PPC_NO_HASH; 4345 4346 return 0; 4347 } 4348 4349 /* 4350 * Get (and clear) the dirty memory log for a memory slot. 4351 */ 4352 static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm, 4353 struct kvm_dirty_log *log) 4354 { 4355 struct kvm_memslots *slots; 4356 struct kvm_memory_slot *memslot; 4357 int i, r; 4358 unsigned long n; 4359 unsigned long *buf, *p; 4360 struct kvm_vcpu *vcpu; 4361 4362 mutex_lock(&kvm->slots_lock); 4363 4364 r = -EINVAL; 4365 if (log->slot >= KVM_USER_MEM_SLOTS) 4366 goto out; 4367 4368 slots = kvm_memslots(kvm); 4369 memslot = id_to_memslot(slots, log->slot); 4370 r = -ENOENT; 4371 if (!memslot->dirty_bitmap) 4372 goto out; 4373 4374 /* 4375 * Use second half of bitmap area because both HPT and radix 4376 * accumulate bits in the first half. 4377 */ 4378 n = kvm_dirty_bitmap_bytes(memslot); 4379 buf = memslot->dirty_bitmap + n / sizeof(long); 4380 memset(buf, 0, n); 4381 4382 if (kvm_is_radix(kvm)) 4383 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf); 4384 else 4385 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf); 4386 if (r) 4387 goto out; 4388 4389 /* 4390 * We accumulate dirty bits in the first half of the 4391 * memslot's dirty_bitmap area, for when pages are paged 4392 * out or modified by the host directly. Pick up these 4393 * bits and add them to the map. 4394 */ 4395 p = memslot->dirty_bitmap; 4396 for (i = 0; i < n / sizeof(long); ++i) 4397 buf[i] |= xchg(&p[i], 0); 4398 4399 /* Harvest dirty bits from VPA and DTL updates */ 4400 /* Note: we never modify the SLB shadow buffer areas */ 4401 kvm_for_each_vcpu(i, vcpu, kvm) { 4402 spin_lock(&vcpu->arch.vpa_update_lock); 4403 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf); 4404 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf); 4405 spin_unlock(&vcpu->arch.vpa_update_lock); 4406 } 4407 4408 r = -EFAULT; 4409 if (copy_to_user(log->dirty_bitmap, buf, n)) 4410 goto out; 4411 4412 r = 0; 4413 out: 4414 mutex_unlock(&kvm->slots_lock); 4415 return r; 4416 } 4417 4418 static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *free, 4419 struct kvm_memory_slot *dont) 4420 { 4421 if (!dont || free->arch.rmap != dont->arch.rmap) { 4422 vfree(free->arch.rmap); 4423 free->arch.rmap = NULL; 4424 } 4425 } 4426 4427 static int kvmppc_core_create_memslot_hv(struct kvm_memory_slot *slot, 4428 unsigned long npages) 4429 { 4430 slot->arch.rmap = vzalloc(array_size(npages, sizeof(*slot->arch.rmap))); 4431 if (!slot->arch.rmap) 4432 return -ENOMEM; 4433 4434 return 0; 4435 } 4436 4437 static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm, 4438 struct kvm_memory_slot *memslot, 4439 const struct kvm_userspace_memory_region *mem) 4440 { 4441 return 0; 4442 } 4443 4444 static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm, 4445 const struct kvm_userspace_memory_region *mem, 4446 const struct kvm_memory_slot *old, 4447 const struct kvm_memory_slot *new, 4448 enum kvm_mr_change change) 4449 { 4450 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4451 4452 /* 4453 * If we are making a new memslot, it might make 4454 * some address that was previously cached as emulated 4455 * MMIO be no longer emulated MMIO, so invalidate 4456 * all the caches of emulated MMIO translations. 4457 */ 4458 if (npages) 4459 atomic64_inc(&kvm->arch.mmio_update); 4460 4461 /* 4462 * For change == KVM_MR_MOVE or KVM_MR_DELETE, higher levels 4463 * have already called kvm_arch_flush_shadow_memslot() to 4464 * flush shadow mappings. For KVM_MR_CREATE we have no 4465 * previous mappings. So the only case to handle is 4466 * KVM_MR_FLAGS_ONLY when the KVM_MEM_LOG_DIRTY_PAGES bit 4467 * has been changed. 4468 * For radix guests, we flush on setting KVM_MEM_LOG_DIRTY_PAGES 4469 * to get rid of any THP PTEs in the partition-scoped page tables 4470 * so we can track dirtiness at the page level; we flush when 4471 * clearing KVM_MEM_LOG_DIRTY_PAGES so that we can go back to 4472 * using THP PTEs. 4473 */ 4474 if (change == KVM_MR_FLAGS_ONLY && kvm_is_radix(kvm) && 4475 ((new->flags ^ old->flags) & KVM_MEM_LOG_DIRTY_PAGES)) 4476 kvmppc_radix_flush_memslot(kvm, old); 4477 } 4478 4479 /* 4480 * Update LPCR values in kvm->arch and in vcores. 4481 * Caller must hold kvm->lock. 4482 */ 4483 void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask) 4484 { 4485 long int i; 4486 u32 cores_done = 0; 4487 4488 if ((kvm->arch.lpcr & mask) == lpcr) 4489 return; 4490 4491 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr; 4492 4493 for (i = 0; i < KVM_MAX_VCORES; ++i) { 4494 struct kvmppc_vcore *vc = kvm->arch.vcores[i]; 4495 if (!vc) 4496 continue; 4497 spin_lock(&vc->lock); 4498 vc->lpcr = (vc->lpcr & ~mask) | lpcr; 4499 spin_unlock(&vc->lock); 4500 if (++cores_done >= kvm->arch.online_vcores) 4501 break; 4502 } 4503 } 4504 4505 static void kvmppc_mmu_destroy_hv(struct kvm_vcpu *vcpu) 4506 { 4507 return; 4508 } 4509 4510 void kvmppc_setup_partition_table(struct kvm *kvm) 4511 { 4512 unsigned long dw0, dw1; 4513 4514 if (!kvm_is_radix(kvm)) { 4515 /* PS field - page size for VRMA */ 4516 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) | 4517 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1); 4518 /* HTABSIZE and HTABORG fields */ 4519 dw0 |= kvm->arch.sdr1; 4520 4521 /* Second dword as set by userspace */ 4522 dw1 = kvm->arch.process_table; 4523 } else { 4524 dw0 = PATB_HR | radix__get_tree_size() | 4525 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE; 4526 dw1 = PATB_GR | kvm->arch.process_table; 4527 } 4528 kvmhv_set_ptbl_entry(kvm->arch.lpid, dw0, dw1); 4529 } 4530 4531 /* 4532 * Set up HPT (hashed page table) and RMA (real-mode area). 4533 * Must be called with kvm->lock held. 4534 */ 4535 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu) 4536 { 4537 int err = 0; 4538 struct kvm *kvm = vcpu->kvm; 4539 unsigned long hva; 4540 struct kvm_memory_slot *memslot; 4541 struct vm_area_struct *vma; 4542 unsigned long lpcr = 0, senc; 4543 unsigned long psize, porder; 4544 int srcu_idx; 4545 4546 /* Allocate hashed page table (if not done already) and reset it */ 4547 if (!kvm->arch.hpt.virt) { 4548 int order = KVM_DEFAULT_HPT_ORDER; 4549 struct kvm_hpt_info info; 4550 4551 err = kvmppc_allocate_hpt(&info, order); 4552 /* If we get here, it means userspace didn't specify a 4553 * size explicitly. So, try successively smaller 4554 * sizes if the default failed. */ 4555 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER) 4556 err = kvmppc_allocate_hpt(&info, order); 4557 4558 if (err < 0) { 4559 pr_err("KVM: Couldn't alloc HPT\n"); 4560 goto out; 4561 } 4562 4563 kvmppc_set_hpt(kvm, &info); 4564 } 4565 4566 /* Look up the memslot for guest physical address 0 */ 4567 srcu_idx = srcu_read_lock(&kvm->srcu); 4568 memslot = gfn_to_memslot(kvm, 0); 4569 4570 /* We must have some memory at 0 by now */ 4571 err = -EINVAL; 4572 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) 4573 goto out_srcu; 4574 4575 /* Look up the VMA for the start of this memory slot */ 4576 hva = memslot->userspace_addr; 4577 down_read(¤t->mm->mmap_sem); 4578 vma = find_vma(current->mm, hva); 4579 if (!vma || vma->vm_start > hva || (vma->vm_flags & VM_IO)) 4580 goto up_out; 4581 4582 psize = vma_kernel_pagesize(vma); 4583 4584 up_read(¤t->mm->mmap_sem); 4585 4586 /* We can handle 4k, 64k or 16M pages in the VRMA */ 4587 if (psize >= 0x1000000) 4588 psize = 0x1000000; 4589 else if (psize >= 0x10000) 4590 psize = 0x10000; 4591 else 4592 psize = 0x1000; 4593 porder = __ilog2(psize); 4594 4595 senc = slb_pgsize_encoding(psize); 4596 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T | 4597 (VRMA_VSID << SLB_VSID_SHIFT_1T); 4598 /* Create HPTEs in the hash page table for the VRMA */ 4599 kvmppc_map_vrma(vcpu, memslot, porder); 4600 4601 /* Update VRMASD field in the LPCR */ 4602 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 4603 /* the -4 is to account for senc values starting at 0x10 */ 4604 lpcr = senc << (LPCR_VRMASD_SH - 4); 4605 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD); 4606 } 4607 4608 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */ 4609 smp_wmb(); 4610 err = 0; 4611 out_srcu: 4612 srcu_read_unlock(&kvm->srcu, srcu_idx); 4613 out: 4614 return err; 4615 4616 up_out: 4617 up_read(¤t->mm->mmap_sem); 4618 goto out_srcu; 4619 } 4620 4621 /* Must be called with kvm->lock held and mmu_ready = 0 and no vcpus running */ 4622 int kvmppc_switch_mmu_to_hpt(struct kvm *kvm) 4623 { 4624 if (nesting_enabled(kvm)) 4625 kvmhv_release_all_nested(kvm); 4626 kvmppc_rmap_reset(kvm); 4627 kvm->arch.process_table = 0; 4628 /* Mutual exclusion with kvm_unmap_hva_range etc. */ 4629 spin_lock(&kvm->mmu_lock); 4630 kvm->arch.radix = 0; 4631 spin_unlock(&kvm->mmu_lock); 4632 kvmppc_free_radix(kvm); 4633 kvmppc_update_lpcr(kvm, LPCR_VPM1, 4634 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 4635 return 0; 4636 } 4637 4638 /* Must be called with kvm->lock held and mmu_ready = 0 and no vcpus running */ 4639 int kvmppc_switch_mmu_to_radix(struct kvm *kvm) 4640 { 4641 int err; 4642 4643 err = kvmppc_init_vm_radix(kvm); 4644 if (err) 4645 return err; 4646 kvmppc_rmap_reset(kvm); 4647 /* Mutual exclusion with kvm_unmap_hva_range etc. */ 4648 spin_lock(&kvm->mmu_lock); 4649 kvm->arch.radix = 1; 4650 spin_unlock(&kvm->mmu_lock); 4651 kvmppc_free_hpt(&kvm->arch.hpt); 4652 kvmppc_update_lpcr(kvm, LPCR_UPRT | LPCR_GTSE | LPCR_HR, 4653 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 4654 return 0; 4655 } 4656 4657 #ifdef CONFIG_KVM_XICS 4658 /* 4659 * Allocate a per-core structure for managing state about which cores are 4660 * running in the host versus the guest and for exchanging data between 4661 * real mode KVM and CPU running in the host. 4662 * This is only done for the first VM. 4663 * The allocated structure stays even if all VMs have stopped. 4664 * It is only freed when the kvm-hv module is unloaded. 4665 * It's OK for this routine to fail, we just don't support host 4666 * core operations like redirecting H_IPI wakeups. 4667 */ 4668 void kvmppc_alloc_host_rm_ops(void) 4669 { 4670 struct kvmppc_host_rm_ops *ops; 4671 unsigned long l_ops; 4672 int cpu, core; 4673 int size; 4674 4675 /* Not the first time here ? */ 4676 if (kvmppc_host_rm_ops_hv != NULL) 4677 return; 4678 4679 ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL); 4680 if (!ops) 4681 return; 4682 4683 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core); 4684 ops->rm_core = kzalloc(size, GFP_KERNEL); 4685 4686 if (!ops->rm_core) { 4687 kfree(ops); 4688 return; 4689 } 4690 4691 cpus_read_lock(); 4692 4693 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) { 4694 if (!cpu_online(cpu)) 4695 continue; 4696 4697 core = cpu >> threads_shift; 4698 ops->rm_core[core].rm_state.in_host = 1; 4699 } 4700 4701 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv; 4702 4703 /* 4704 * Make the contents of the kvmppc_host_rm_ops structure visible 4705 * to other CPUs before we assign it to the global variable. 4706 * Do an atomic assignment (no locks used here), but if someone 4707 * beats us to it, just free our copy and return. 4708 */ 4709 smp_wmb(); 4710 l_ops = (unsigned long) ops; 4711 4712 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) { 4713 cpus_read_unlock(); 4714 kfree(ops->rm_core); 4715 kfree(ops); 4716 return; 4717 } 4718 4719 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE, 4720 "ppc/kvm_book3s:prepare", 4721 kvmppc_set_host_core, 4722 kvmppc_clear_host_core); 4723 cpus_read_unlock(); 4724 } 4725 4726 void kvmppc_free_host_rm_ops(void) 4727 { 4728 if (kvmppc_host_rm_ops_hv) { 4729 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE); 4730 kfree(kvmppc_host_rm_ops_hv->rm_core); 4731 kfree(kvmppc_host_rm_ops_hv); 4732 kvmppc_host_rm_ops_hv = NULL; 4733 } 4734 } 4735 #endif 4736 4737 static int kvmppc_core_init_vm_hv(struct kvm *kvm) 4738 { 4739 unsigned long lpcr, lpid; 4740 char buf[32]; 4741 int ret; 4742 4743 /* Allocate the guest's logical partition ID */ 4744 4745 lpid = kvmppc_alloc_lpid(); 4746 if ((long)lpid < 0) 4747 return -ENOMEM; 4748 kvm->arch.lpid = lpid; 4749 4750 kvmppc_alloc_host_rm_ops(); 4751 4752 kvmhv_vm_nested_init(kvm); 4753 4754 /* 4755 * Since we don't flush the TLB when tearing down a VM, 4756 * and this lpid might have previously been used, 4757 * make sure we flush on each core before running the new VM. 4758 * On POWER9, the tlbie in mmu_partition_table_set_entry() 4759 * does this flush for us. 4760 */ 4761 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4762 cpumask_setall(&kvm->arch.need_tlb_flush); 4763 4764 /* Start out with the default set of hcalls enabled */ 4765 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls, 4766 sizeof(kvm->arch.enabled_hcalls)); 4767 4768 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4769 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1); 4770 4771 /* Init LPCR for virtual RMA mode */ 4772 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4773 kvm->arch.host_lpid = mfspr(SPRN_LPID); 4774 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR); 4775 lpcr &= LPCR_PECE | LPCR_LPES; 4776 } else { 4777 lpcr = 0; 4778 } 4779 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE | 4780 LPCR_VPM0 | LPCR_VPM1; 4781 kvm->arch.vrma_slb_v = SLB_VSID_B_1T | 4782 (VRMA_VSID << SLB_VSID_SHIFT_1T); 4783 /* On POWER8 turn on online bit to enable PURR/SPURR */ 4784 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 4785 lpcr |= LPCR_ONL; 4786 /* 4787 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed) 4788 * Set HVICE bit to enable hypervisor virtualization interrupts. 4789 * Set HEIC to prevent OS interrupts to go to hypervisor (should 4790 * be unnecessary but better safe than sorry in case we re-enable 4791 * EE in HV mode with this LPCR still set) 4792 */ 4793 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4794 lpcr &= ~LPCR_VPM0; 4795 lpcr |= LPCR_HVICE | LPCR_HEIC; 4796 4797 /* 4798 * If xive is enabled, we route 0x500 interrupts directly 4799 * to the guest. 4800 */ 4801 if (xics_on_xive()) 4802 lpcr |= LPCR_LPES; 4803 } 4804 4805 /* 4806 * If the host uses radix, the guest starts out as radix. 4807 */ 4808 if (radix_enabled()) { 4809 kvm->arch.radix = 1; 4810 kvm->arch.mmu_ready = 1; 4811 lpcr &= ~LPCR_VPM1; 4812 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR; 4813 ret = kvmppc_init_vm_radix(kvm); 4814 if (ret) { 4815 kvmppc_free_lpid(kvm->arch.lpid); 4816 return ret; 4817 } 4818 kvmppc_setup_partition_table(kvm); 4819 } 4820 4821 kvm->arch.lpcr = lpcr; 4822 4823 /* Initialization for future HPT resizes */ 4824 kvm->arch.resize_hpt = NULL; 4825 4826 /* 4827 * Work out how many sets the TLB has, for the use of 4828 * the TLB invalidation loop in book3s_hv_rmhandlers.S. 4829 */ 4830 if (radix_enabled()) 4831 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */ 4832 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 4833 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */ 4834 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 4835 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */ 4836 else 4837 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */ 4838 4839 /* 4840 * Track that we now have a HV mode VM active. This blocks secondary 4841 * CPU threads from coming online. 4842 * On POWER9, we only need to do this if the "indep_threads_mode" 4843 * module parameter has been set to N. 4844 */ 4845 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4846 if (!indep_threads_mode && !cpu_has_feature(CPU_FTR_HVMODE)) { 4847 pr_warn("KVM: Ignoring indep_threads_mode=N in nested hypervisor\n"); 4848 kvm->arch.threads_indep = true; 4849 } else { 4850 kvm->arch.threads_indep = indep_threads_mode; 4851 } 4852 } 4853 if (!kvm->arch.threads_indep) 4854 kvm_hv_vm_activated(); 4855 4856 /* 4857 * Initialize smt_mode depending on processor. 4858 * POWER8 and earlier have to use "strict" threading, where 4859 * all vCPUs in a vcore have to run on the same (sub)core, 4860 * whereas on POWER9 the threads can each run a different 4861 * guest. 4862 */ 4863 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4864 kvm->arch.smt_mode = threads_per_subcore; 4865 else 4866 kvm->arch.smt_mode = 1; 4867 kvm->arch.emul_smt_mode = 1; 4868 4869 /* 4870 * Create a debugfs directory for the VM 4871 */ 4872 snprintf(buf, sizeof(buf), "vm%d", current->pid); 4873 kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir); 4874 kvmppc_mmu_debugfs_init(kvm); 4875 if (radix_enabled()) 4876 kvmhv_radix_debugfs_init(kvm); 4877 4878 return 0; 4879 } 4880 4881 static void kvmppc_free_vcores(struct kvm *kvm) 4882 { 4883 long int i; 4884 4885 for (i = 0; i < KVM_MAX_VCORES; ++i) 4886 kfree(kvm->arch.vcores[i]); 4887 kvm->arch.online_vcores = 0; 4888 } 4889 4890 static void kvmppc_core_destroy_vm_hv(struct kvm *kvm) 4891 { 4892 debugfs_remove_recursive(kvm->arch.debugfs_dir); 4893 4894 if (!kvm->arch.threads_indep) 4895 kvm_hv_vm_deactivated(); 4896 4897 kvmppc_free_vcores(kvm); 4898 4899 4900 if (kvm_is_radix(kvm)) 4901 kvmppc_free_radix(kvm); 4902 else 4903 kvmppc_free_hpt(&kvm->arch.hpt); 4904 4905 /* Perform global invalidation and return lpid to the pool */ 4906 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4907 if (nesting_enabled(kvm)) 4908 kvmhv_release_all_nested(kvm); 4909 kvm->arch.process_table = 0; 4910 kvmhv_set_ptbl_entry(kvm->arch.lpid, 0, 0); 4911 } 4912 kvmppc_free_lpid(kvm->arch.lpid); 4913 4914 kvmppc_free_pimap(kvm); 4915 } 4916 4917 /* We don't need to emulate any privileged instructions or dcbz */ 4918 static int kvmppc_core_emulate_op_hv(struct kvm_run *run, struct kvm_vcpu *vcpu, 4919 unsigned int inst, int *advance) 4920 { 4921 return EMULATE_FAIL; 4922 } 4923 4924 static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn, 4925 ulong spr_val) 4926 { 4927 return EMULATE_FAIL; 4928 } 4929 4930 static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn, 4931 ulong *spr_val) 4932 { 4933 return EMULATE_FAIL; 4934 } 4935 4936 static int kvmppc_core_check_processor_compat_hv(void) 4937 { 4938 if (cpu_has_feature(CPU_FTR_HVMODE) && 4939 cpu_has_feature(CPU_FTR_ARCH_206)) 4940 return 0; 4941 4942 /* POWER9 in radix mode is capable of being a nested hypervisor. */ 4943 if (cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled()) 4944 return 0; 4945 4946 return -EIO; 4947 } 4948 4949 #ifdef CONFIG_KVM_XICS 4950 4951 void kvmppc_free_pimap(struct kvm *kvm) 4952 { 4953 kfree(kvm->arch.pimap); 4954 } 4955 4956 static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void) 4957 { 4958 return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL); 4959 } 4960 4961 static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 4962 { 4963 struct irq_desc *desc; 4964 struct kvmppc_irq_map *irq_map; 4965 struct kvmppc_passthru_irqmap *pimap; 4966 struct irq_chip *chip; 4967 int i, rc = 0; 4968 4969 if (!kvm_irq_bypass) 4970 return 1; 4971 4972 desc = irq_to_desc(host_irq); 4973 if (!desc) 4974 return -EIO; 4975 4976 mutex_lock(&kvm->lock); 4977 4978 pimap = kvm->arch.pimap; 4979 if (pimap == NULL) { 4980 /* First call, allocate structure to hold IRQ map */ 4981 pimap = kvmppc_alloc_pimap(); 4982 if (pimap == NULL) { 4983 mutex_unlock(&kvm->lock); 4984 return -ENOMEM; 4985 } 4986 kvm->arch.pimap = pimap; 4987 } 4988 4989 /* 4990 * For now, we only support interrupts for which the EOI operation 4991 * is an OPAL call followed by a write to XIRR, since that's 4992 * what our real-mode EOI code does, or a XIVE interrupt 4993 */ 4994 chip = irq_data_get_irq_chip(&desc->irq_data); 4995 if (!chip || !(is_pnv_opal_msi(chip) || is_xive_irq(chip))) { 4996 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n", 4997 host_irq, guest_gsi); 4998 mutex_unlock(&kvm->lock); 4999 return -ENOENT; 5000 } 5001 5002 /* 5003 * See if we already have an entry for this guest IRQ number. 5004 * If it's mapped to a hardware IRQ number, that's an error, 5005 * otherwise re-use this entry. 5006 */ 5007 for (i = 0; i < pimap->n_mapped; i++) { 5008 if (guest_gsi == pimap->mapped[i].v_hwirq) { 5009 if (pimap->mapped[i].r_hwirq) { 5010 mutex_unlock(&kvm->lock); 5011 return -EINVAL; 5012 } 5013 break; 5014 } 5015 } 5016 5017 if (i == KVMPPC_PIRQ_MAPPED) { 5018 mutex_unlock(&kvm->lock); 5019 return -EAGAIN; /* table is full */ 5020 } 5021 5022 irq_map = &pimap->mapped[i]; 5023 5024 irq_map->v_hwirq = guest_gsi; 5025 irq_map->desc = desc; 5026 5027 /* 5028 * Order the above two stores before the next to serialize with 5029 * the KVM real mode handler. 5030 */ 5031 smp_wmb(); 5032 irq_map->r_hwirq = desc->irq_data.hwirq; 5033 5034 if (i == pimap->n_mapped) 5035 pimap->n_mapped++; 5036 5037 if (xics_on_xive()) 5038 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc); 5039 else 5040 kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq); 5041 if (rc) 5042 irq_map->r_hwirq = 0; 5043 5044 mutex_unlock(&kvm->lock); 5045 5046 return 0; 5047 } 5048 5049 static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5050 { 5051 struct irq_desc *desc; 5052 struct kvmppc_passthru_irqmap *pimap; 5053 int i, rc = 0; 5054 5055 if (!kvm_irq_bypass) 5056 return 0; 5057 5058 desc = irq_to_desc(host_irq); 5059 if (!desc) 5060 return -EIO; 5061 5062 mutex_lock(&kvm->lock); 5063 if (!kvm->arch.pimap) 5064 goto unlock; 5065 5066 pimap = kvm->arch.pimap; 5067 5068 for (i = 0; i < pimap->n_mapped; i++) { 5069 if (guest_gsi == pimap->mapped[i].v_hwirq) 5070 break; 5071 } 5072 5073 if (i == pimap->n_mapped) { 5074 mutex_unlock(&kvm->lock); 5075 return -ENODEV; 5076 } 5077 5078 if (xics_on_xive()) 5079 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, pimap->mapped[i].desc); 5080 else 5081 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq); 5082 5083 /* invalidate the entry (what do do on error from the above ?) */ 5084 pimap->mapped[i].r_hwirq = 0; 5085 5086 /* 5087 * We don't free this structure even when the count goes to 5088 * zero. The structure is freed when we destroy the VM. 5089 */ 5090 unlock: 5091 mutex_unlock(&kvm->lock); 5092 return rc; 5093 } 5094 5095 static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons, 5096 struct irq_bypass_producer *prod) 5097 { 5098 int ret = 0; 5099 struct kvm_kernel_irqfd *irqfd = 5100 container_of(cons, struct kvm_kernel_irqfd, consumer); 5101 5102 irqfd->producer = prod; 5103 5104 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5105 if (ret) 5106 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n", 5107 prod->irq, irqfd->gsi, ret); 5108 5109 return ret; 5110 } 5111 5112 static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons, 5113 struct irq_bypass_producer *prod) 5114 { 5115 int ret; 5116 struct kvm_kernel_irqfd *irqfd = 5117 container_of(cons, struct kvm_kernel_irqfd, consumer); 5118 5119 irqfd->producer = NULL; 5120 5121 /* 5122 * When producer of consumer is unregistered, we change back to 5123 * default external interrupt handling mode - KVM real mode 5124 * will switch back to host. 5125 */ 5126 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5127 if (ret) 5128 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n", 5129 prod->irq, irqfd->gsi, ret); 5130 } 5131 #endif 5132 5133 static long kvm_arch_vm_ioctl_hv(struct file *filp, 5134 unsigned int ioctl, unsigned long arg) 5135 { 5136 struct kvm *kvm __maybe_unused = filp->private_data; 5137 void __user *argp = (void __user *)arg; 5138 long r; 5139 5140 switch (ioctl) { 5141 5142 case KVM_PPC_ALLOCATE_HTAB: { 5143 u32 htab_order; 5144 5145 r = -EFAULT; 5146 if (get_user(htab_order, (u32 __user *)argp)) 5147 break; 5148 r = kvmppc_alloc_reset_hpt(kvm, htab_order); 5149 if (r) 5150 break; 5151 r = 0; 5152 break; 5153 } 5154 5155 case KVM_PPC_GET_HTAB_FD: { 5156 struct kvm_get_htab_fd ghf; 5157 5158 r = -EFAULT; 5159 if (copy_from_user(&ghf, argp, sizeof(ghf))) 5160 break; 5161 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf); 5162 break; 5163 } 5164 5165 case KVM_PPC_RESIZE_HPT_PREPARE: { 5166 struct kvm_ppc_resize_hpt rhpt; 5167 5168 r = -EFAULT; 5169 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5170 break; 5171 5172 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt); 5173 break; 5174 } 5175 5176 case KVM_PPC_RESIZE_HPT_COMMIT: { 5177 struct kvm_ppc_resize_hpt rhpt; 5178 5179 r = -EFAULT; 5180 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5181 break; 5182 5183 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt); 5184 break; 5185 } 5186 5187 default: 5188 r = -ENOTTY; 5189 } 5190 5191 return r; 5192 } 5193 5194 /* 5195 * List of hcall numbers to enable by default. 5196 * For compatibility with old userspace, we enable by default 5197 * all hcalls that were implemented before the hcall-enabling 5198 * facility was added. Note this list should not include H_RTAS. 5199 */ 5200 static unsigned int default_hcall_list[] = { 5201 H_REMOVE, 5202 H_ENTER, 5203 H_READ, 5204 H_PROTECT, 5205 H_BULK_REMOVE, 5206 H_GET_TCE, 5207 H_PUT_TCE, 5208 H_SET_DABR, 5209 H_SET_XDABR, 5210 H_CEDE, 5211 H_PROD, 5212 H_CONFER, 5213 H_REGISTER_VPA, 5214 #ifdef CONFIG_KVM_XICS 5215 H_EOI, 5216 H_CPPR, 5217 H_IPI, 5218 H_IPOLL, 5219 H_XIRR, 5220 H_XIRR_X, 5221 #endif 5222 0 5223 }; 5224 5225 static void init_default_hcalls(void) 5226 { 5227 int i; 5228 unsigned int hcall; 5229 5230 for (i = 0; default_hcall_list[i]; ++i) { 5231 hcall = default_hcall_list[i]; 5232 WARN_ON(!kvmppc_hcall_impl_hv(hcall)); 5233 __set_bit(hcall / 4, default_enabled_hcalls); 5234 } 5235 } 5236 5237 static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg) 5238 { 5239 unsigned long lpcr; 5240 int radix; 5241 int err; 5242 5243 /* If not on a POWER9, reject it */ 5244 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5245 return -ENODEV; 5246 5247 /* If any unknown flags set, reject it */ 5248 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE)) 5249 return -EINVAL; 5250 5251 /* GR (guest radix) bit in process_table field must match */ 5252 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX); 5253 if (!!(cfg->process_table & PATB_GR) != radix) 5254 return -EINVAL; 5255 5256 /* Process table size field must be reasonable, i.e. <= 24 */ 5257 if ((cfg->process_table & PRTS_MASK) > 24) 5258 return -EINVAL; 5259 5260 /* We can change a guest to/from radix now, if the host is radix */ 5261 if (radix && !radix_enabled()) 5262 return -EINVAL; 5263 5264 /* If we're a nested hypervisor, we currently only support radix */ 5265 if (kvmhv_on_pseries() && !radix) 5266 return -EINVAL; 5267 5268 mutex_lock(&kvm->lock); 5269 if (radix != kvm_is_radix(kvm)) { 5270 if (kvm->arch.mmu_ready) { 5271 kvm->arch.mmu_ready = 0; 5272 /* order mmu_ready vs. vcpus_running */ 5273 smp_mb(); 5274 if (atomic_read(&kvm->arch.vcpus_running)) { 5275 kvm->arch.mmu_ready = 1; 5276 err = -EBUSY; 5277 goto out_unlock; 5278 } 5279 } 5280 if (radix) 5281 err = kvmppc_switch_mmu_to_radix(kvm); 5282 else 5283 err = kvmppc_switch_mmu_to_hpt(kvm); 5284 if (err) 5285 goto out_unlock; 5286 } 5287 5288 kvm->arch.process_table = cfg->process_table; 5289 kvmppc_setup_partition_table(kvm); 5290 5291 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0; 5292 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE); 5293 err = 0; 5294 5295 out_unlock: 5296 mutex_unlock(&kvm->lock); 5297 return err; 5298 } 5299 5300 static int kvmhv_enable_nested(struct kvm *kvm) 5301 { 5302 if (!nested) 5303 return -EPERM; 5304 if (!cpu_has_feature(CPU_FTR_ARCH_300) || no_mixing_hpt_and_radix) 5305 return -ENODEV; 5306 5307 /* kvm == NULL means the caller is testing if the capability exists */ 5308 if (kvm) 5309 kvm->arch.nested_enable = true; 5310 return 0; 5311 } 5312 5313 static int kvmhv_load_from_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5314 int size) 5315 { 5316 int rc = -EINVAL; 5317 5318 if (kvmhv_vcpu_is_radix(vcpu)) { 5319 rc = kvmhv_copy_from_guest_radix(vcpu, *eaddr, ptr, size); 5320 5321 if (rc > 0) 5322 rc = -EINVAL; 5323 } 5324 5325 /* For now quadrants are the only way to access nested guest memory */ 5326 if (rc && vcpu->arch.nested) 5327 rc = -EAGAIN; 5328 5329 return rc; 5330 } 5331 5332 static int kvmhv_store_to_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5333 int size) 5334 { 5335 int rc = -EINVAL; 5336 5337 if (kvmhv_vcpu_is_radix(vcpu)) { 5338 rc = kvmhv_copy_to_guest_radix(vcpu, *eaddr, ptr, size); 5339 5340 if (rc > 0) 5341 rc = -EINVAL; 5342 } 5343 5344 /* For now quadrants are the only way to access nested guest memory */ 5345 if (rc && vcpu->arch.nested) 5346 rc = -EAGAIN; 5347 5348 return rc; 5349 } 5350 5351 static struct kvmppc_ops kvm_ops_hv = { 5352 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv, 5353 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv, 5354 .get_one_reg = kvmppc_get_one_reg_hv, 5355 .set_one_reg = kvmppc_set_one_reg_hv, 5356 .vcpu_load = kvmppc_core_vcpu_load_hv, 5357 .vcpu_put = kvmppc_core_vcpu_put_hv, 5358 .set_msr = kvmppc_set_msr_hv, 5359 .vcpu_run = kvmppc_vcpu_run_hv, 5360 .vcpu_create = kvmppc_core_vcpu_create_hv, 5361 .vcpu_free = kvmppc_core_vcpu_free_hv, 5362 .check_requests = kvmppc_core_check_requests_hv, 5363 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv, 5364 .flush_memslot = kvmppc_core_flush_memslot_hv, 5365 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv, 5366 .commit_memory_region = kvmppc_core_commit_memory_region_hv, 5367 .unmap_hva_range = kvm_unmap_hva_range_hv, 5368 .age_hva = kvm_age_hva_hv, 5369 .test_age_hva = kvm_test_age_hva_hv, 5370 .set_spte_hva = kvm_set_spte_hva_hv, 5371 .mmu_destroy = kvmppc_mmu_destroy_hv, 5372 .free_memslot = kvmppc_core_free_memslot_hv, 5373 .create_memslot = kvmppc_core_create_memslot_hv, 5374 .init_vm = kvmppc_core_init_vm_hv, 5375 .destroy_vm = kvmppc_core_destroy_vm_hv, 5376 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv, 5377 .emulate_op = kvmppc_core_emulate_op_hv, 5378 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv, 5379 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv, 5380 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv, 5381 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv, 5382 .hcall_implemented = kvmppc_hcall_impl_hv, 5383 #ifdef CONFIG_KVM_XICS 5384 .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv, 5385 .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv, 5386 #endif 5387 .configure_mmu = kvmhv_configure_mmu, 5388 .get_rmmu_info = kvmhv_get_rmmu_info, 5389 .set_smt_mode = kvmhv_set_smt_mode, 5390 .enable_nested = kvmhv_enable_nested, 5391 .load_from_eaddr = kvmhv_load_from_eaddr, 5392 .store_to_eaddr = kvmhv_store_to_eaddr, 5393 }; 5394 5395 static int kvm_init_subcore_bitmap(void) 5396 { 5397 int i, j; 5398 int nr_cores = cpu_nr_cores(); 5399 struct sibling_subcore_state *sibling_subcore_state; 5400 5401 for (i = 0; i < nr_cores; i++) { 5402 int first_cpu = i * threads_per_core; 5403 int node = cpu_to_node(first_cpu); 5404 5405 /* Ignore if it is already allocated. */ 5406 if (paca_ptrs[first_cpu]->sibling_subcore_state) 5407 continue; 5408 5409 sibling_subcore_state = 5410 kzalloc_node(sizeof(struct sibling_subcore_state), 5411 GFP_KERNEL, node); 5412 if (!sibling_subcore_state) 5413 return -ENOMEM; 5414 5415 5416 for (j = 0; j < threads_per_core; j++) { 5417 int cpu = first_cpu + j; 5418 5419 paca_ptrs[cpu]->sibling_subcore_state = 5420 sibling_subcore_state; 5421 } 5422 } 5423 return 0; 5424 } 5425 5426 static int kvmppc_radix_possible(void) 5427 { 5428 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled(); 5429 } 5430 5431 static int kvmppc_book3s_init_hv(void) 5432 { 5433 int r; 5434 /* 5435 * FIXME!! Do we need to check on all cpus ? 5436 */ 5437 r = kvmppc_core_check_processor_compat_hv(); 5438 if (r < 0) 5439 return -ENODEV; 5440 5441 r = kvmhv_nested_init(); 5442 if (r) 5443 return r; 5444 5445 r = kvm_init_subcore_bitmap(); 5446 if (r) 5447 return r; 5448 5449 /* 5450 * We need a way of accessing the XICS interrupt controller, 5451 * either directly, via paca_ptrs[cpu]->kvm_hstate.xics_phys, or 5452 * indirectly, via OPAL. 5453 */ 5454 #ifdef CONFIG_SMP 5455 if (!xics_on_xive() && !kvmhv_on_pseries() && 5456 !local_paca->kvm_hstate.xics_phys) { 5457 struct device_node *np; 5458 5459 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc"); 5460 if (!np) { 5461 pr_err("KVM-HV: Cannot determine method for accessing XICS\n"); 5462 return -ENODEV; 5463 } 5464 /* presence of intc confirmed - node can be dropped again */ 5465 of_node_put(np); 5466 } 5467 #endif 5468 5469 kvm_ops_hv.owner = THIS_MODULE; 5470 kvmppc_hv_ops = &kvm_ops_hv; 5471 5472 init_default_hcalls(); 5473 5474 init_vcore_lists(); 5475 5476 r = kvmppc_mmu_hv_init(); 5477 if (r) 5478 return r; 5479 5480 if (kvmppc_radix_possible()) 5481 r = kvmppc_radix_init(); 5482 5483 /* 5484 * POWER9 chips before version 2.02 can't have some threads in 5485 * HPT mode and some in radix mode on the same core. 5486 */ 5487 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5488 unsigned int pvr = mfspr(SPRN_PVR); 5489 if ((pvr >> 16) == PVR_POWER9 && 5490 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) || 5491 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101))) 5492 no_mixing_hpt_and_radix = true; 5493 } 5494 5495 return r; 5496 } 5497 5498 static void kvmppc_book3s_exit_hv(void) 5499 { 5500 kvmppc_free_host_rm_ops(); 5501 if (kvmppc_radix_possible()) 5502 kvmppc_radix_exit(); 5503 kvmppc_hv_ops = NULL; 5504 kvmhv_nested_exit(); 5505 } 5506 5507 module_init(kvmppc_book3s_init_hv); 5508 module_exit(kvmppc_book3s_exit_hv); 5509 MODULE_LICENSE("GPL"); 5510 MODULE_ALIAS_MISCDEV(KVM_MINOR); 5511 MODULE_ALIAS("devname:kvm"); 5512