1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 4 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 5 * 6 * Authors: 7 * Paul Mackerras <paulus@au1.ibm.com> 8 * Alexander Graf <agraf@suse.de> 9 * Kevin Wolf <mail@kevin-wolf.de> 10 * 11 * Description: KVM functions specific to running on Book 3S 12 * processors in hypervisor mode (specifically POWER7 and later). 13 * 14 * This file is derived from arch/powerpc/kvm/book3s.c, 15 * by Alexander Graf <agraf@suse.de>. 16 */ 17 18 #include <linux/kvm_host.h> 19 #include <linux/kernel.h> 20 #include <linux/err.h> 21 #include <linux/slab.h> 22 #include <linux/preempt.h> 23 #include <linux/sched/signal.h> 24 #include <linux/sched/stat.h> 25 #include <linux/delay.h> 26 #include <linux/export.h> 27 #include <linux/fs.h> 28 #include <linux/anon_inodes.h> 29 #include <linux/cpu.h> 30 #include <linux/cpumask.h> 31 #include <linux/spinlock.h> 32 #include <linux/page-flags.h> 33 #include <linux/srcu.h> 34 #include <linux/miscdevice.h> 35 #include <linux/debugfs.h> 36 #include <linux/gfp.h> 37 #include <linux/vmalloc.h> 38 #include <linux/highmem.h> 39 #include <linux/hugetlb.h> 40 #include <linux/kvm_irqfd.h> 41 #include <linux/irqbypass.h> 42 #include <linux/module.h> 43 #include <linux/compiler.h> 44 #include <linux/of.h> 45 46 #include <asm/ftrace.h> 47 #include <asm/reg.h> 48 #include <asm/ppc-opcode.h> 49 #include <asm/asm-prototypes.h> 50 #include <asm/archrandom.h> 51 #include <asm/debug.h> 52 #include <asm/disassemble.h> 53 #include <asm/cputable.h> 54 #include <asm/cacheflush.h> 55 #include <linux/uaccess.h> 56 #include <asm/io.h> 57 #include <asm/kvm_ppc.h> 58 #include <asm/kvm_book3s.h> 59 #include <asm/mmu_context.h> 60 #include <asm/lppaca.h> 61 #include <asm/processor.h> 62 #include <asm/cputhreads.h> 63 #include <asm/page.h> 64 #include <asm/hvcall.h> 65 #include <asm/switch_to.h> 66 #include <asm/smp.h> 67 #include <asm/dbell.h> 68 #include <asm/hmi.h> 69 #include <asm/pnv-pci.h> 70 #include <asm/mmu.h> 71 #include <asm/opal.h> 72 #include <asm/xics.h> 73 #include <asm/xive.h> 74 #include <asm/hw_breakpoint.h> 75 #include <asm/kvm_book3s_uvmem.h> 76 #include <asm/ultravisor.h> 77 #include <asm/dtl.h> 78 79 #include "book3s.h" 80 81 #define CREATE_TRACE_POINTS 82 #include "trace_hv.h" 83 84 /* #define EXIT_DEBUG */ 85 /* #define EXIT_DEBUG_SIMPLE */ 86 /* #define EXIT_DEBUG_INT */ 87 88 /* Used to indicate that a guest page fault needs to be handled */ 89 #define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1) 90 /* Used to indicate that a guest passthrough interrupt needs to be handled */ 91 #define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2) 92 93 /* Used as a "null" value for timebase values */ 94 #define TB_NIL (~(u64)0) 95 96 static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1); 97 98 static int dynamic_mt_modes = 6; 99 module_param(dynamic_mt_modes, int, 0644); 100 MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)"); 101 static int target_smt_mode; 102 module_param(target_smt_mode, int, 0644); 103 MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)"); 104 105 static bool indep_threads_mode = true; 106 module_param(indep_threads_mode, bool, S_IRUGO | S_IWUSR); 107 MODULE_PARM_DESC(indep_threads_mode, "Independent-threads mode (only on POWER9)"); 108 109 static bool one_vm_per_core; 110 module_param(one_vm_per_core, bool, S_IRUGO | S_IWUSR); 111 MODULE_PARM_DESC(one_vm_per_core, "Only run vCPUs from the same VM on a core (requires indep_threads_mode=N)"); 112 113 #ifdef CONFIG_KVM_XICS 114 static const struct kernel_param_ops module_param_ops = { 115 .set = param_set_int, 116 .get = param_get_int, 117 }; 118 119 module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644); 120 MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization"); 121 122 module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644); 123 MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core"); 124 #endif 125 126 /* If set, guests are allowed to create and control nested guests */ 127 static bool nested = true; 128 module_param(nested, bool, S_IRUGO | S_IWUSR); 129 MODULE_PARM_DESC(nested, "Enable nested virtualization (only on POWER9)"); 130 131 static inline bool nesting_enabled(struct kvm *kvm) 132 { 133 return kvm->arch.nested_enable && kvm_is_radix(kvm); 134 } 135 136 /* If set, the threads on each CPU core have to be in the same MMU mode */ 137 static bool no_mixing_hpt_and_radix; 138 139 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu); 140 141 /* 142 * RWMR values for POWER8. These control the rate at which PURR 143 * and SPURR count and should be set according to the number of 144 * online threads in the vcore being run. 145 */ 146 #define RWMR_RPA_P8_1THREAD 0x164520C62609AECAUL 147 #define RWMR_RPA_P8_2THREAD 0x7FFF2908450D8DA9UL 148 #define RWMR_RPA_P8_3THREAD 0x164520C62609AECAUL 149 #define RWMR_RPA_P8_4THREAD 0x199A421245058DA9UL 150 #define RWMR_RPA_P8_5THREAD 0x164520C62609AECAUL 151 #define RWMR_RPA_P8_6THREAD 0x164520C62609AECAUL 152 #define RWMR_RPA_P8_7THREAD 0x164520C62609AECAUL 153 #define RWMR_RPA_P8_8THREAD 0x164520C62609AECAUL 154 155 static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = { 156 RWMR_RPA_P8_1THREAD, 157 RWMR_RPA_P8_1THREAD, 158 RWMR_RPA_P8_2THREAD, 159 RWMR_RPA_P8_3THREAD, 160 RWMR_RPA_P8_4THREAD, 161 RWMR_RPA_P8_5THREAD, 162 RWMR_RPA_P8_6THREAD, 163 RWMR_RPA_P8_7THREAD, 164 RWMR_RPA_P8_8THREAD, 165 }; 166 167 static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc, 168 int *ip) 169 { 170 int i = *ip; 171 struct kvm_vcpu *vcpu; 172 173 while (++i < MAX_SMT_THREADS) { 174 vcpu = READ_ONCE(vc->runnable_threads[i]); 175 if (vcpu) { 176 *ip = i; 177 return vcpu; 178 } 179 } 180 return NULL; 181 } 182 183 /* Used to traverse the list of runnable threads for a given vcore */ 184 #define for_each_runnable_thread(i, vcpu, vc) \ 185 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); ) 186 187 static bool kvmppc_ipi_thread(int cpu) 188 { 189 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 190 191 /* If we're a nested hypervisor, fall back to ordinary IPIs for now */ 192 if (kvmhv_on_pseries()) 193 return false; 194 195 /* On POWER9 we can use msgsnd to IPI any cpu */ 196 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 197 msg |= get_hard_smp_processor_id(cpu); 198 smp_mb(); 199 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 200 return true; 201 } 202 203 /* On POWER8 for IPIs to threads in the same core, use msgsnd */ 204 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 205 preempt_disable(); 206 if (cpu_first_thread_sibling(cpu) == 207 cpu_first_thread_sibling(smp_processor_id())) { 208 msg |= cpu_thread_in_core(cpu); 209 smp_mb(); 210 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 211 preempt_enable(); 212 return true; 213 } 214 preempt_enable(); 215 } 216 217 #if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP) 218 if (cpu >= 0 && cpu < nr_cpu_ids) { 219 if (paca_ptrs[cpu]->kvm_hstate.xics_phys) { 220 xics_wake_cpu(cpu); 221 return true; 222 } 223 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY); 224 return true; 225 } 226 #endif 227 228 return false; 229 } 230 231 static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu) 232 { 233 int cpu; 234 struct rcuwait *waitp; 235 236 waitp = kvm_arch_vcpu_get_wait(vcpu); 237 if (rcuwait_wake_up(waitp)) 238 ++vcpu->stat.halt_wakeup; 239 240 cpu = READ_ONCE(vcpu->arch.thread_cpu); 241 if (cpu >= 0 && kvmppc_ipi_thread(cpu)) 242 return; 243 244 /* CPU points to the first thread of the core */ 245 cpu = vcpu->cpu; 246 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu)) 247 smp_send_reschedule(cpu); 248 } 249 250 /* 251 * We use the vcpu_load/put functions to measure stolen time. 252 * Stolen time is counted as time when either the vcpu is able to 253 * run as part of a virtual core, but the task running the vcore 254 * is preempted or sleeping, or when the vcpu needs something done 255 * in the kernel by the task running the vcpu, but that task is 256 * preempted or sleeping. Those two things have to be counted 257 * separately, since one of the vcpu tasks will take on the job 258 * of running the core, and the other vcpu tasks in the vcore will 259 * sleep waiting for it to do that, but that sleep shouldn't count 260 * as stolen time. 261 * 262 * Hence we accumulate stolen time when the vcpu can run as part of 263 * a vcore using vc->stolen_tb, and the stolen time when the vcpu 264 * needs its task to do other things in the kernel (for example, 265 * service a page fault) in busy_stolen. We don't accumulate 266 * stolen time for a vcore when it is inactive, or for a vcpu 267 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of 268 * a misnomer; it means that the vcpu task is not executing in 269 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in 270 * the kernel. We don't have any way of dividing up that time 271 * between time that the vcpu is genuinely stopped, time that 272 * the task is actively working on behalf of the vcpu, and time 273 * that the task is preempted, so we don't count any of it as 274 * stolen. 275 * 276 * Updates to busy_stolen are protected by arch.tbacct_lock; 277 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock 278 * lock. The stolen times are measured in units of timebase ticks. 279 * (Note that the != TB_NIL checks below are purely defensive; 280 * they should never fail.) 281 */ 282 283 static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc) 284 { 285 unsigned long flags; 286 287 spin_lock_irqsave(&vc->stoltb_lock, flags); 288 vc->preempt_tb = mftb(); 289 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 290 } 291 292 static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc) 293 { 294 unsigned long flags; 295 296 spin_lock_irqsave(&vc->stoltb_lock, flags); 297 if (vc->preempt_tb != TB_NIL) { 298 vc->stolen_tb += mftb() - vc->preempt_tb; 299 vc->preempt_tb = TB_NIL; 300 } 301 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 302 } 303 304 static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu) 305 { 306 struct kvmppc_vcore *vc = vcpu->arch.vcore; 307 unsigned long flags; 308 309 /* 310 * We can test vc->runner without taking the vcore lock, 311 * because only this task ever sets vc->runner to this 312 * vcpu, and once it is set to this vcpu, only this task 313 * ever sets it to NULL. 314 */ 315 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 316 kvmppc_core_end_stolen(vc); 317 318 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 319 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST && 320 vcpu->arch.busy_preempt != TB_NIL) { 321 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt; 322 vcpu->arch.busy_preempt = TB_NIL; 323 } 324 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 325 } 326 327 static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu) 328 { 329 struct kvmppc_vcore *vc = vcpu->arch.vcore; 330 unsigned long flags; 331 332 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 333 kvmppc_core_start_stolen(vc); 334 335 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 336 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST) 337 vcpu->arch.busy_preempt = mftb(); 338 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 339 } 340 341 static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr) 342 { 343 vcpu->arch.pvr = pvr; 344 } 345 346 /* Dummy value used in computing PCR value below */ 347 #define PCR_ARCH_31 (PCR_ARCH_300 << 1) 348 349 static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat) 350 { 351 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0; 352 struct kvmppc_vcore *vc = vcpu->arch.vcore; 353 354 /* We can (emulate) our own architecture version and anything older */ 355 if (cpu_has_feature(CPU_FTR_ARCH_31)) 356 host_pcr_bit = PCR_ARCH_31; 357 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 358 host_pcr_bit = PCR_ARCH_300; 359 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 360 host_pcr_bit = PCR_ARCH_207; 361 else if (cpu_has_feature(CPU_FTR_ARCH_206)) 362 host_pcr_bit = PCR_ARCH_206; 363 else 364 host_pcr_bit = PCR_ARCH_205; 365 366 /* Determine lowest PCR bit needed to run guest in given PVR level */ 367 guest_pcr_bit = host_pcr_bit; 368 if (arch_compat) { 369 switch (arch_compat) { 370 case PVR_ARCH_205: 371 guest_pcr_bit = PCR_ARCH_205; 372 break; 373 case PVR_ARCH_206: 374 case PVR_ARCH_206p: 375 guest_pcr_bit = PCR_ARCH_206; 376 break; 377 case PVR_ARCH_207: 378 guest_pcr_bit = PCR_ARCH_207; 379 break; 380 case PVR_ARCH_300: 381 guest_pcr_bit = PCR_ARCH_300; 382 break; 383 case PVR_ARCH_31: 384 guest_pcr_bit = PCR_ARCH_31; 385 break; 386 default: 387 return -EINVAL; 388 } 389 } 390 391 /* Check requested PCR bits don't exceed our capabilities */ 392 if (guest_pcr_bit > host_pcr_bit) 393 return -EINVAL; 394 395 spin_lock(&vc->lock); 396 vc->arch_compat = arch_compat; 397 /* 398 * Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit 399 * Also set all reserved PCR bits 400 */ 401 vc->pcr = (host_pcr_bit - guest_pcr_bit) | PCR_MASK; 402 spin_unlock(&vc->lock); 403 404 return 0; 405 } 406 407 static void kvmppc_dump_regs(struct kvm_vcpu *vcpu) 408 { 409 int r; 410 411 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id); 412 pr_err("pc = %.16lx msr = %.16llx trap = %x\n", 413 vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap); 414 for (r = 0; r < 16; ++r) 415 pr_err("r%2d = %.16lx r%d = %.16lx\n", 416 r, kvmppc_get_gpr(vcpu, r), 417 r+16, kvmppc_get_gpr(vcpu, r+16)); 418 pr_err("ctr = %.16lx lr = %.16lx\n", 419 vcpu->arch.regs.ctr, vcpu->arch.regs.link); 420 pr_err("srr0 = %.16llx srr1 = %.16llx\n", 421 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1); 422 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n", 423 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1); 424 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n", 425 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3); 426 pr_err("cr = %.8lx xer = %.16lx dsisr = %.8x\n", 427 vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr); 428 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar); 429 pr_err("fault dar = %.16lx dsisr = %.8x\n", 430 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 431 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max); 432 for (r = 0; r < vcpu->arch.slb_max; ++r) 433 pr_err(" ESID = %.16llx VSID = %.16llx\n", 434 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv); 435 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n", 436 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1, 437 vcpu->arch.last_inst); 438 } 439 440 static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id) 441 { 442 return kvm_get_vcpu_by_id(kvm, id); 443 } 444 445 static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa) 446 { 447 vpa->__old_status |= LPPACA_OLD_SHARED_PROC; 448 vpa->yield_count = cpu_to_be32(1); 449 } 450 451 static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v, 452 unsigned long addr, unsigned long len) 453 { 454 /* check address is cacheline aligned */ 455 if (addr & (L1_CACHE_BYTES - 1)) 456 return -EINVAL; 457 spin_lock(&vcpu->arch.vpa_update_lock); 458 if (v->next_gpa != addr || v->len != len) { 459 v->next_gpa = addr; 460 v->len = addr ? len : 0; 461 v->update_pending = 1; 462 } 463 spin_unlock(&vcpu->arch.vpa_update_lock); 464 return 0; 465 } 466 467 /* Length for a per-processor buffer is passed in at offset 4 in the buffer */ 468 struct reg_vpa { 469 u32 dummy; 470 union { 471 __be16 hword; 472 __be32 word; 473 } length; 474 }; 475 476 static int vpa_is_registered(struct kvmppc_vpa *vpap) 477 { 478 if (vpap->update_pending) 479 return vpap->next_gpa != 0; 480 return vpap->pinned_addr != NULL; 481 } 482 483 static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu, 484 unsigned long flags, 485 unsigned long vcpuid, unsigned long vpa) 486 { 487 struct kvm *kvm = vcpu->kvm; 488 unsigned long len, nb; 489 void *va; 490 struct kvm_vcpu *tvcpu; 491 int err; 492 int subfunc; 493 struct kvmppc_vpa *vpap; 494 495 tvcpu = kvmppc_find_vcpu(kvm, vcpuid); 496 if (!tvcpu) 497 return H_PARAMETER; 498 499 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK; 500 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL || 501 subfunc == H_VPA_REG_SLB) { 502 /* Registering new area - address must be cache-line aligned */ 503 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa) 504 return H_PARAMETER; 505 506 /* convert logical addr to kernel addr and read length */ 507 va = kvmppc_pin_guest_page(kvm, vpa, &nb); 508 if (va == NULL) 509 return H_PARAMETER; 510 if (subfunc == H_VPA_REG_VPA) 511 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword); 512 else 513 len = be32_to_cpu(((struct reg_vpa *)va)->length.word); 514 kvmppc_unpin_guest_page(kvm, va, vpa, false); 515 516 /* Check length */ 517 if (len > nb || len < sizeof(struct reg_vpa)) 518 return H_PARAMETER; 519 } else { 520 vpa = 0; 521 len = 0; 522 } 523 524 err = H_PARAMETER; 525 vpap = NULL; 526 spin_lock(&tvcpu->arch.vpa_update_lock); 527 528 switch (subfunc) { 529 case H_VPA_REG_VPA: /* register VPA */ 530 /* 531 * The size of our lppaca is 1kB because of the way we align 532 * it for the guest to avoid crossing a 4kB boundary. We only 533 * use 640 bytes of the structure though, so we should accept 534 * clients that set a size of 640. 535 */ 536 BUILD_BUG_ON(sizeof(struct lppaca) != 640); 537 if (len < sizeof(struct lppaca)) 538 break; 539 vpap = &tvcpu->arch.vpa; 540 err = 0; 541 break; 542 543 case H_VPA_REG_DTL: /* register DTL */ 544 if (len < sizeof(struct dtl_entry)) 545 break; 546 len -= len % sizeof(struct dtl_entry); 547 548 /* Check that they have previously registered a VPA */ 549 err = H_RESOURCE; 550 if (!vpa_is_registered(&tvcpu->arch.vpa)) 551 break; 552 553 vpap = &tvcpu->arch.dtl; 554 err = 0; 555 break; 556 557 case H_VPA_REG_SLB: /* register SLB shadow buffer */ 558 /* Check that they have previously registered a VPA */ 559 err = H_RESOURCE; 560 if (!vpa_is_registered(&tvcpu->arch.vpa)) 561 break; 562 563 vpap = &tvcpu->arch.slb_shadow; 564 err = 0; 565 break; 566 567 case H_VPA_DEREG_VPA: /* deregister VPA */ 568 /* Check they don't still have a DTL or SLB buf registered */ 569 err = H_RESOURCE; 570 if (vpa_is_registered(&tvcpu->arch.dtl) || 571 vpa_is_registered(&tvcpu->arch.slb_shadow)) 572 break; 573 574 vpap = &tvcpu->arch.vpa; 575 err = 0; 576 break; 577 578 case H_VPA_DEREG_DTL: /* deregister DTL */ 579 vpap = &tvcpu->arch.dtl; 580 err = 0; 581 break; 582 583 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */ 584 vpap = &tvcpu->arch.slb_shadow; 585 err = 0; 586 break; 587 } 588 589 if (vpap) { 590 vpap->next_gpa = vpa; 591 vpap->len = len; 592 vpap->update_pending = 1; 593 } 594 595 spin_unlock(&tvcpu->arch.vpa_update_lock); 596 597 return err; 598 } 599 600 static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap) 601 { 602 struct kvm *kvm = vcpu->kvm; 603 void *va; 604 unsigned long nb; 605 unsigned long gpa; 606 607 /* 608 * We need to pin the page pointed to by vpap->next_gpa, 609 * but we can't call kvmppc_pin_guest_page under the lock 610 * as it does get_user_pages() and down_read(). So we 611 * have to drop the lock, pin the page, then get the lock 612 * again and check that a new area didn't get registered 613 * in the meantime. 614 */ 615 for (;;) { 616 gpa = vpap->next_gpa; 617 spin_unlock(&vcpu->arch.vpa_update_lock); 618 va = NULL; 619 nb = 0; 620 if (gpa) 621 va = kvmppc_pin_guest_page(kvm, gpa, &nb); 622 spin_lock(&vcpu->arch.vpa_update_lock); 623 if (gpa == vpap->next_gpa) 624 break; 625 /* sigh... unpin that one and try again */ 626 if (va) 627 kvmppc_unpin_guest_page(kvm, va, gpa, false); 628 } 629 630 vpap->update_pending = 0; 631 if (va && nb < vpap->len) { 632 /* 633 * If it's now too short, it must be that userspace 634 * has changed the mappings underlying guest memory, 635 * so unregister the region. 636 */ 637 kvmppc_unpin_guest_page(kvm, va, gpa, false); 638 va = NULL; 639 } 640 if (vpap->pinned_addr) 641 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa, 642 vpap->dirty); 643 vpap->gpa = gpa; 644 vpap->pinned_addr = va; 645 vpap->dirty = false; 646 if (va) 647 vpap->pinned_end = va + vpap->len; 648 } 649 650 static void kvmppc_update_vpas(struct kvm_vcpu *vcpu) 651 { 652 if (!(vcpu->arch.vpa.update_pending || 653 vcpu->arch.slb_shadow.update_pending || 654 vcpu->arch.dtl.update_pending)) 655 return; 656 657 spin_lock(&vcpu->arch.vpa_update_lock); 658 if (vcpu->arch.vpa.update_pending) { 659 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa); 660 if (vcpu->arch.vpa.pinned_addr) 661 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr); 662 } 663 if (vcpu->arch.dtl.update_pending) { 664 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl); 665 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr; 666 vcpu->arch.dtl_index = 0; 667 } 668 if (vcpu->arch.slb_shadow.update_pending) 669 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow); 670 spin_unlock(&vcpu->arch.vpa_update_lock); 671 } 672 673 /* 674 * Return the accumulated stolen time for the vcore up until `now'. 675 * The caller should hold the vcore lock. 676 */ 677 static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now) 678 { 679 u64 p; 680 unsigned long flags; 681 682 spin_lock_irqsave(&vc->stoltb_lock, flags); 683 p = vc->stolen_tb; 684 if (vc->vcore_state != VCORE_INACTIVE && 685 vc->preempt_tb != TB_NIL) 686 p += now - vc->preempt_tb; 687 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 688 return p; 689 } 690 691 static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu, 692 struct kvmppc_vcore *vc) 693 { 694 struct dtl_entry *dt; 695 struct lppaca *vpa; 696 unsigned long stolen; 697 unsigned long core_stolen; 698 u64 now; 699 unsigned long flags; 700 701 dt = vcpu->arch.dtl_ptr; 702 vpa = vcpu->arch.vpa.pinned_addr; 703 now = mftb(); 704 core_stolen = vcore_stolen_time(vc, now); 705 stolen = core_stolen - vcpu->arch.stolen_logged; 706 vcpu->arch.stolen_logged = core_stolen; 707 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 708 stolen += vcpu->arch.busy_stolen; 709 vcpu->arch.busy_stolen = 0; 710 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 711 if (!dt || !vpa) 712 return; 713 memset(dt, 0, sizeof(struct dtl_entry)); 714 dt->dispatch_reason = 7; 715 dt->processor_id = cpu_to_be16(vc->pcpu + vcpu->arch.ptid); 716 dt->timebase = cpu_to_be64(now + vc->tb_offset); 717 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen); 718 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu)); 719 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr); 720 ++dt; 721 if (dt == vcpu->arch.dtl.pinned_end) 722 dt = vcpu->arch.dtl.pinned_addr; 723 vcpu->arch.dtl_ptr = dt; 724 /* order writing *dt vs. writing vpa->dtl_idx */ 725 smp_wmb(); 726 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index); 727 vcpu->arch.dtl.dirty = true; 728 } 729 730 /* See if there is a doorbell interrupt pending for a vcpu */ 731 static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu) 732 { 733 int thr; 734 struct kvmppc_vcore *vc; 735 736 if (vcpu->arch.doorbell_request) 737 return true; 738 /* 739 * Ensure that the read of vcore->dpdes comes after the read 740 * of vcpu->doorbell_request. This barrier matches the 741 * smp_wmb() in kvmppc_guest_entry_inject(). 742 */ 743 smp_rmb(); 744 vc = vcpu->arch.vcore; 745 thr = vcpu->vcpu_id - vc->first_vcpuid; 746 return !!(vc->dpdes & (1 << thr)); 747 } 748 749 static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu) 750 { 751 if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207) 752 return true; 753 if ((!vcpu->arch.vcore->arch_compat) && 754 cpu_has_feature(CPU_FTR_ARCH_207S)) 755 return true; 756 return false; 757 } 758 759 static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags, 760 unsigned long resource, unsigned long value1, 761 unsigned long value2) 762 { 763 switch (resource) { 764 case H_SET_MODE_RESOURCE_SET_CIABR: 765 if (!kvmppc_power8_compatible(vcpu)) 766 return H_P2; 767 if (value2) 768 return H_P4; 769 if (mflags) 770 return H_UNSUPPORTED_FLAG_START; 771 /* Guests can't breakpoint the hypervisor */ 772 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER) 773 return H_P3; 774 vcpu->arch.ciabr = value1; 775 return H_SUCCESS; 776 case H_SET_MODE_RESOURCE_SET_DAWR0: 777 if (!kvmppc_power8_compatible(vcpu)) 778 return H_P2; 779 if (!ppc_breakpoint_available()) 780 return H_P2; 781 if (mflags) 782 return H_UNSUPPORTED_FLAG_START; 783 if (value2 & DABRX_HYP) 784 return H_P4; 785 vcpu->arch.dawr = value1; 786 vcpu->arch.dawrx = value2; 787 return H_SUCCESS; 788 case H_SET_MODE_RESOURCE_ADDR_TRANS_MODE: 789 /* KVM does not support mflags=2 (AIL=2) */ 790 if (mflags != 0 && mflags != 3) 791 return H_UNSUPPORTED_FLAG_START; 792 return H_TOO_HARD; 793 default: 794 return H_TOO_HARD; 795 } 796 } 797 798 /* Copy guest memory in place - must reside within a single memslot */ 799 static int kvmppc_copy_guest(struct kvm *kvm, gpa_t to, gpa_t from, 800 unsigned long len) 801 { 802 struct kvm_memory_slot *to_memslot = NULL; 803 struct kvm_memory_slot *from_memslot = NULL; 804 unsigned long to_addr, from_addr; 805 int r; 806 807 /* Get HPA for from address */ 808 from_memslot = gfn_to_memslot(kvm, from >> PAGE_SHIFT); 809 if (!from_memslot) 810 return -EFAULT; 811 if ((from + len) >= ((from_memslot->base_gfn + from_memslot->npages) 812 << PAGE_SHIFT)) 813 return -EINVAL; 814 from_addr = gfn_to_hva_memslot(from_memslot, from >> PAGE_SHIFT); 815 if (kvm_is_error_hva(from_addr)) 816 return -EFAULT; 817 from_addr |= (from & (PAGE_SIZE - 1)); 818 819 /* Get HPA for to address */ 820 to_memslot = gfn_to_memslot(kvm, to >> PAGE_SHIFT); 821 if (!to_memslot) 822 return -EFAULT; 823 if ((to + len) >= ((to_memslot->base_gfn + to_memslot->npages) 824 << PAGE_SHIFT)) 825 return -EINVAL; 826 to_addr = gfn_to_hva_memslot(to_memslot, to >> PAGE_SHIFT); 827 if (kvm_is_error_hva(to_addr)) 828 return -EFAULT; 829 to_addr |= (to & (PAGE_SIZE - 1)); 830 831 /* Perform copy */ 832 r = raw_copy_in_user((void __user *)to_addr, (void __user *)from_addr, 833 len); 834 if (r) 835 return -EFAULT; 836 mark_page_dirty(kvm, to >> PAGE_SHIFT); 837 return 0; 838 } 839 840 static long kvmppc_h_page_init(struct kvm_vcpu *vcpu, unsigned long flags, 841 unsigned long dest, unsigned long src) 842 { 843 u64 pg_sz = SZ_4K; /* 4K page size */ 844 u64 pg_mask = SZ_4K - 1; 845 int ret; 846 847 /* Check for invalid flags (H_PAGE_SET_LOANED covers all CMO flags) */ 848 if (flags & ~(H_ICACHE_INVALIDATE | H_ICACHE_SYNCHRONIZE | 849 H_ZERO_PAGE | H_COPY_PAGE | H_PAGE_SET_LOANED)) 850 return H_PARAMETER; 851 852 /* dest (and src if copy_page flag set) must be page aligned */ 853 if ((dest & pg_mask) || ((flags & H_COPY_PAGE) && (src & pg_mask))) 854 return H_PARAMETER; 855 856 /* zero and/or copy the page as determined by the flags */ 857 if (flags & H_COPY_PAGE) { 858 ret = kvmppc_copy_guest(vcpu->kvm, dest, src, pg_sz); 859 if (ret < 0) 860 return H_PARAMETER; 861 } else if (flags & H_ZERO_PAGE) { 862 ret = kvm_clear_guest(vcpu->kvm, dest, pg_sz); 863 if (ret < 0) 864 return H_PARAMETER; 865 } 866 867 /* We can ignore the remaining flags */ 868 869 return H_SUCCESS; 870 } 871 872 static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target) 873 { 874 struct kvmppc_vcore *vcore = target->arch.vcore; 875 876 /* 877 * We expect to have been called by the real mode handler 878 * (kvmppc_rm_h_confer()) which would have directly returned 879 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may 880 * have useful work to do and should not confer) so we don't 881 * recheck that here. 882 */ 883 884 spin_lock(&vcore->lock); 885 if (target->arch.state == KVMPPC_VCPU_RUNNABLE && 886 vcore->vcore_state != VCORE_INACTIVE && 887 vcore->runner) 888 target = vcore->runner; 889 spin_unlock(&vcore->lock); 890 891 return kvm_vcpu_yield_to(target); 892 } 893 894 static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu) 895 { 896 int yield_count = 0; 897 struct lppaca *lppaca; 898 899 spin_lock(&vcpu->arch.vpa_update_lock); 900 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr; 901 if (lppaca) 902 yield_count = be32_to_cpu(lppaca->yield_count); 903 spin_unlock(&vcpu->arch.vpa_update_lock); 904 return yield_count; 905 } 906 907 int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu) 908 { 909 unsigned long req = kvmppc_get_gpr(vcpu, 3); 910 unsigned long target, ret = H_SUCCESS; 911 int yield_count; 912 struct kvm_vcpu *tvcpu; 913 int idx, rc; 914 915 if (req <= MAX_HCALL_OPCODE && 916 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls)) 917 return RESUME_HOST; 918 919 switch (req) { 920 case H_CEDE: 921 break; 922 case H_PROD: 923 target = kvmppc_get_gpr(vcpu, 4); 924 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target); 925 if (!tvcpu) { 926 ret = H_PARAMETER; 927 break; 928 } 929 tvcpu->arch.prodded = 1; 930 smp_mb(); 931 if (tvcpu->arch.ceded) 932 kvmppc_fast_vcpu_kick_hv(tvcpu); 933 break; 934 case H_CONFER: 935 target = kvmppc_get_gpr(vcpu, 4); 936 if (target == -1) 937 break; 938 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target); 939 if (!tvcpu) { 940 ret = H_PARAMETER; 941 break; 942 } 943 yield_count = kvmppc_get_gpr(vcpu, 5); 944 if (kvmppc_get_yield_count(tvcpu) != yield_count) 945 break; 946 kvm_arch_vcpu_yield_to(tvcpu); 947 break; 948 case H_REGISTER_VPA: 949 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4), 950 kvmppc_get_gpr(vcpu, 5), 951 kvmppc_get_gpr(vcpu, 6)); 952 break; 953 case H_RTAS: 954 if (list_empty(&vcpu->kvm->arch.rtas_tokens)) 955 return RESUME_HOST; 956 957 idx = srcu_read_lock(&vcpu->kvm->srcu); 958 rc = kvmppc_rtas_hcall(vcpu); 959 srcu_read_unlock(&vcpu->kvm->srcu, idx); 960 961 if (rc == -ENOENT) 962 return RESUME_HOST; 963 else if (rc == 0) 964 break; 965 966 /* Send the error out to userspace via KVM_RUN */ 967 return rc; 968 case H_LOGICAL_CI_LOAD: 969 ret = kvmppc_h_logical_ci_load(vcpu); 970 if (ret == H_TOO_HARD) 971 return RESUME_HOST; 972 break; 973 case H_LOGICAL_CI_STORE: 974 ret = kvmppc_h_logical_ci_store(vcpu); 975 if (ret == H_TOO_HARD) 976 return RESUME_HOST; 977 break; 978 case H_SET_MODE: 979 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4), 980 kvmppc_get_gpr(vcpu, 5), 981 kvmppc_get_gpr(vcpu, 6), 982 kvmppc_get_gpr(vcpu, 7)); 983 if (ret == H_TOO_HARD) 984 return RESUME_HOST; 985 break; 986 case H_XIRR: 987 case H_CPPR: 988 case H_EOI: 989 case H_IPI: 990 case H_IPOLL: 991 case H_XIRR_X: 992 if (kvmppc_xics_enabled(vcpu)) { 993 if (xics_on_xive()) { 994 ret = H_NOT_AVAILABLE; 995 return RESUME_GUEST; 996 } 997 ret = kvmppc_xics_hcall(vcpu, req); 998 break; 999 } 1000 return RESUME_HOST; 1001 case H_SET_DABR: 1002 ret = kvmppc_h_set_dabr(vcpu, kvmppc_get_gpr(vcpu, 4)); 1003 break; 1004 case H_SET_XDABR: 1005 ret = kvmppc_h_set_xdabr(vcpu, kvmppc_get_gpr(vcpu, 4), 1006 kvmppc_get_gpr(vcpu, 5)); 1007 break; 1008 #ifdef CONFIG_SPAPR_TCE_IOMMU 1009 case H_GET_TCE: 1010 ret = kvmppc_h_get_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1011 kvmppc_get_gpr(vcpu, 5)); 1012 if (ret == H_TOO_HARD) 1013 return RESUME_HOST; 1014 break; 1015 case H_PUT_TCE: 1016 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1017 kvmppc_get_gpr(vcpu, 5), 1018 kvmppc_get_gpr(vcpu, 6)); 1019 if (ret == H_TOO_HARD) 1020 return RESUME_HOST; 1021 break; 1022 case H_PUT_TCE_INDIRECT: 1023 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4), 1024 kvmppc_get_gpr(vcpu, 5), 1025 kvmppc_get_gpr(vcpu, 6), 1026 kvmppc_get_gpr(vcpu, 7)); 1027 if (ret == H_TOO_HARD) 1028 return RESUME_HOST; 1029 break; 1030 case H_STUFF_TCE: 1031 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 1032 kvmppc_get_gpr(vcpu, 5), 1033 kvmppc_get_gpr(vcpu, 6), 1034 kvmppc_get_gpr(vcpu, 7)); 1035 if (ret == H_TOO_HARD) 1036 return RESUME_HOST; 1037 break; 1038 #endif 1039 case H_RANDOM: 1040 if (!powernv_get_random_long(&vcpu->arch.regs.gpr[4])) 1041 ret = H_HARDWARE; 1042 break; 1043 1044 case H_SET_PARTITION_TABLE: 1045 ret = H_FUNCTION; 1046 if (nesting_enabled(vcpu->kvm)) 1047 ret = kvmhv_set_partition_table(vcpu); 1048 break; 1049 case H_ENTER_NESTED: 1050 ret = H_FUNCTION; 1051 if (!nesting_enabled(vcpu->kvm)) 1052 break; 1053 ret = kvmhv_enter_nested_guest(vcpu); 1054 if (ret == H_INTERRUPT) { 1055 kvmppc_set_gpr(vcpu, 3, 0); 1056 vcpu->arch.hcall_needed = 0; 1057 return -EINTR; 1058 } else if (ret == H_TOO_HARD) { 1059 kvmppc_set_gpr(vcpu, 3, 0); 1060 vcpu->arch.hcall_needed = 0; 1061 return RESUME_HOST; 1062 } 1063 break; 1064 case H_TLB_INVALIDATE: 1065 ret = H_FUNCTION; 1066 if (nesting_enabled(vcpu->kvm)) 1067 ret = kvmhv_do_nested_tlbie(vcpu); 1068 break; 1069 case H_COPY_TOFROM_GUEST: 1070 ret = H_FUNCTION; 1071 if (nesting_enabled(vcpu->kvm)) 1072 ret = kvmhv_copy_tofrom_guest_nested(vcpu); 1073 break; 1074 case H_PAGE_INIT: 1075 ret = kvmppc_h_page_init(vcpu, kvmppc_get_gpr(vcpu, 4), 1076 kvmppc_get_gpr(vcpu, 5), 1077 kvmppc_get_gpr(vcpu, 6)); 1078 break; 1079 case H_SVM_PAGE_IN: 1080 ret = H_UNSUPPORTED; 1081 if (kvmppc_get_srr1(vcpu) & MSR_S) 1082 ret = kvmppc_h_svm_page_in(vcpu->kvm, 1083 kvmppc_get_gpr(vcpu, 4), 1084 kvmppc_get_gpr(vcpu, 5), 1085 kvmppc_get_gpr(vcpu, 6)); 1086 break; 1087 case H_SVM_PAGE_OUT: 1088 ret = H_UNSUPPORTED; 1089 if (kvmppc_get_srr1(vcpu) & MSR_S) 1090 ret = kvmppc_h_svm_page_out(vcpu->kvm, 1091 kvmppc_get_gpr(vcpu, 4), 1092 kvmppc_get_gpr(vcpu, 5), 1093 kvmppc_get_gpr(vcpu, 6)); 1094 break; 1095 case H_SVM_INIT_START: 1096 ret = H_UNSUPPORTED; 1097 if (kvmppc_get_srr1(vcpu) & MSR_S) 1098 ret = kvmppc_h_svm_init_start(vcpu->kvm); 1099 break; 1100 case H_SVM_INIT_DONE: 1101 ret = H_UNSUPPORTED; 1102 if (kvmppc_get_srr1(vcpu) & MSR_S) 1103 ret = kvmppc_h_svm_init_done(vcpu->kvm); 1104 break; 1105 case H_SVM_INIT_ABORT: 1106 /* 1107 * Even if that call is made by the Ultravisor, the SSR1 value 1108 * is the guest context one, with the secure bit clear as it has 1109 * not yet been secured. So we can't check it here. 1110 * Instead the kvm->arch.secure_guest flag is checked inside 1111 * kvmppc_h_svm_init_abort(). 1112 */ 1113 ret = kvmppc_h_svm_init_abort(vcpu->kvm); 1114 break; 1115 1116 default: 1117 return RESUME_HOST; 1118 } 1119 kvmppc_set_gpr(vcpu, 3, ret); 1120 vcpu->arch.hcall_needed = 0; 1121 return RESUME_GUEST; 1122 } 1123 1124 /* 1125 * Handle H_CEDE in the nested virtualization case where we haven't 1126 * called the real-mode hcall handlers in book3s_hv_rmhandlers.S. 1127 * This has to be done early, not in kvmppc_pseries_do_hcall(), so 1128 * that the cede logic in kvmppc_run_single_vcpu() works properly. 1129 */ 1130 static void kvmppc_nested_cede(struct kvm_vcpu *vcpu) 1131 { 1132 vcpu->arch.shregs.msr |= MSR_EE; 1133 vcpu->arch.ceded = 1; 1134 smp_mb(); 1135 if (vcpu->arch.prodded) { 1136 vcpu->arch.prodded = 0; 1137 smp_mb(); 1138 vcpu->arch.ceded = 0; 1139 } 1140 } 1141 1142 static int kvmppc_hcall_impl_hv(unsigned long cmd) 1143 { 1144 switch (cmd) { 1145 case H_CEDE: 1146 case H_PROD: 1147 case H_CONFER: 1148 case H_REGISTER_VPA: 1149 case H_SET_MODE: 1150 case H_LOGICAL_CI_LOAD: 1151 case H_LOGICAL_CI_STORE: 1152 #ifdef CONFIG_KVM_XICS 1153 case H_XIRR: 1154 case H_CPPR: 1155 case H_EOI: 1156 case H_IPI: 1157 case H_IPOLL: 1158 case H_XIRR_X: 1159 #endif 1160 case H_PAGE_INIT: 1161 return 1; 1162 } 1163 1164 /* See if it's in the real-mode table */ 1165 return kvmppc_hcall_impl_hv_realmode(cmd); 1166 } 1167 1168 static int kvmppc_emulate_debug_inst(struct kvm_vcpu *vcpu) 1169 { 1170 u32 last_inst; 1171 1172 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) != 1173 EMULATE_DONE) { 1174 /* 1175 * Fetch failed, so return to guest and 1176 * try executing it again. 1177 */ 1178 return RESUME_GUEST; 1179 } 1180 1181 if (last_inst == KVMPPC_INST_SW_BREAKPOINT) { 1182 vcpu->run->exit_reason = KVM_EXIT_DEBUG; 1183 vcpu->run->debug.arch.address = kvmppc_get_pc(vcpu); 1184 return RESUME_HOST; 1185 } else { 1186 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1187 return RESUME_GUEST; 1188 } 1189 } 1190 1191 static void do_nothing(void *x) 1192 { 1193 } 1194 1195 static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu) 1196 { 1197 int thr, cpu, pcpu, nthreads; 1198 struct kvm_vcpu *v; 1199 unsigned long dpdes; 1200 1201 nthreads = vcpu->kvm->arch.emul_smt_mode; 1202 dpdes = 0; 1203 cpu = vcpu->vcpu_id & ~(nthreads - 1); 1204 for (thr = 0; thr < nthreads; ++thr, ++cpu) { 1205 v = kvmppc_find_vcpu(vcpu->kvm, cpu); 1206 if (!v) 1207 continue; 1208 /* 1209 * If the vcpu is currently running on a physical cpu thread, 1210 * interrupt it in order to pull it out of the guest briefly, 1211 * which will update its vcore->dpdes value. 1212 */ 1213 pcpu = READ_ONCE(v->cpu); 1214 if (pcpu >= 0) 1215 smp_call_function_single(pcpu, do_nothing, NULL, 1); 1216 if (kvmppc_doorbell_pending(v)) 1217 dpdes |= 1 << thr; 1218 } 1219 return dpdes; 1220 } 1221 1222 /* 1223 * On POWER9, emulate doorbell-related instructions in order to 1224 * give the guest the illusion of running on a multi-threaded core. 1225 * The instructions emulated are msgsndp, msgclrp, mfspr TIR, 1226 * and mfspr DPDES. 1227 */ 1228 static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu) 1229 { 1230 u32 inst, rb, thr; 1231 unsigned long arg; 1232 struct kvm *kvm = vcpu->kvm; 1233 struct kvm_vcpu *tvcpu; 1234 1235 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE) 1236 return RESUME_GUEST; 1237 if (get_op(inst) != 31) 1238 return EMULATE_FAIL; 1239 rb = get_rb(inst); 1240 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1); 1241 switch (get_xop(inst)) { 1242 case OP_31_XOP_MSGSNDP: 1243 arg = kvmppc_get_gpr(vcpu, rb); 1244 if (((arg >> 27) & 0x1f) != PPC_DBELL_SERVER) 1245 break; 1246 arg &= 0x7f; 1247 if (arg >= kvm->arch.emul_smt_mode) 1248 break; 1249 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg); 1250 if (!tvcpu) 1251 break; 1252 if (!tvcpu->arch.doorbell_request) { 1253 tvcpu->arch.doorbell_request = 1; 1254 kvmppc_fast_vcpu_kick_hv(tvcpu); 1255 } 1256 break; 1257 case OP_31_XOP_MSGCLRP: 1258 arg = kvmppc_get_gpr(vcpu, rb); 1259 if (((arg >> 27) & 0x1f) != PPC_DBELL_SERVER) 1260 break; 1261 vcpu->arch.vcore->dpdes = 0; 1262 vcpu->arch.doorbell_request = 0; 1263 break; 1264 case OP_31_XOP_MFSPR: 1265 switch (get_sprn(inst)) { 1266 case SPRN_TIR: 1267 arg = thr; 1268 break; 1269 case SPRN_DPDES: 1270 arg = kvmppc_read_dpdes(vcpu); 1271 break; 1272 default: 1273 return EMULATE_FAIL; 1274 } 1275 kvmppc_set_gpr(vcpu, get_rt(inst), arg); 1276 break; 1277 default: 1278 return EMULATE_FAIL; 1279 } 1280 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4); 1281 return RESUME_GUEST; 1282 } 1283 1284 static int kvmppc_handle_exit_hv(struct kvm_vcpu *vcpu, 1285 struct task_struct *tsk) 1286 { 1287 struct kvm_run *run = vcpu->run; 1288 int r = RESUME_HOST; 1289 1290 vcpu->stat.sum_exits++; 1291 1292 /* 1293 * This can happen if an interrupt occurs in the last stages 1294 * of guest entry or the first stages of guest exit (i.e. after 1295 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1296 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1297 * That can happen due to a bug, or due to a machine check 1298 * occurring at just the wrong time. 1299 */ 1300 if (vcpu->arch.shregs.msr & MSR_HV) { 1301 printk(KERN_EMERG "KVM trap in HV mode!\n"); 1302 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1303 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1304 vcpu->arch.shregs.msr); 1305 kvmppc_dump_regs(vcpu); 1306 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1307 run->hw.hardware_exit_reason = vcpu->arch.trap; 1308 return RESUME_HOST; 1309 } 1310 run->exit_reason = KVM_EXIT_UNKNOWN; 1311 run->ready_for_interrupt_injection = 1; 1312 switch (vcpu->arch.trap) { 1313 /* We're good on these - the host merely wanted to get our attention */ 1314 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1315 vcpu->stat.dec_exits++; 1316 r = RESUME_GUEST; 1317 break; 1318 case BOOK3S_INTERRUPT_EXTERNAL: 1319 case BOOK3S_INTERRUPT_H_DOORBELL: 1320 case BOOK3S_INTERRUPT_H_VIRT: 1321 vcpu->stat.ext_intr_exits++; 1322 r = RESUME_GUEST; 1323 break; 1324 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1325 case BOOK3S_INTERRUPT_HMI: 1326 case BOOK3S_INTERRUPT_PERFMON: 1327 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1328 r = RESUME_GUEST; 1329 break; 1330 case BOOK3S_INTERRUPT_MACHINE_CHECK: { 1331 static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, 1332 DEFAULT_RATELIMIT_BURST); 1333 /* 1334 * Print the MCE event to host console. Ratelimit so the guest 1335 * can't flood the host log. 1336 */ 1337 if (__ratelimit(&rs)) 1338 machine_check_print_event_info(&vcpu->arch.mce_evt,false, true); 1339 1340 /* 1341 * If the guest can do FWNMI, exit to userspace so it can 1342 * deliver a FWNMI to the guest. 1343 * Otherwise we synthesize a machine check for the guest 1344 * so that it knows that the machine check occurred. 1345 */ 1346 if (!vcpu->kvm->arch.fwnmi_enabled) { 1347 ulong flags = vcpu->arch.shregs.msr & 0x083c0000; 1348 kvmppc_core_queue_machine_check(vcpu, flags); 1349 r = RESUME_GUEST; 1350 break; 1351 } 1352 1353 /* Exit to guest with KVM_EXIT_NMI as exit reason */ 1354 run->exit_reason = KVM_EXIT_NMI; 1355 run->hw.hardware_exit_reason = vcpu->arch.trap; 1356 /* Clear out the old NMI status from run->flags */ 1357 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK; 1358 /* Now set the NMI status */ 1359 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED) 1360 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV; 1361 else 1362 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV; 1363 1364 r = RESUME_HOST; 1365 break; 1366 } 1367 case BOOK3S_INTERRUPT_PROGRAM: 1368 { 1369 ulong flags; 1370 /* 1371 * Normally program interrupts are delivered directly 1372 * to the guest by the hardware, but we can get here 1373 * as a result of a hypervisor emulation interrupt 1374 * (e40) getting turned into a 700 by BML RTAS. 1375 */ 1376 flags = vcpu->arch.shregs.msr & 0x1f0000ull; 1377 kvmppc_core_queue_program(vcpu, flags); 1378 r = RESUME_GUEST; 1379 break; 1380 } 1381 case BOOK3S_INTERRUPT_SYSCALL: 1382 { 1383 /* hcall - punt to userspace */ 1384 int i; 1385 1386 /* hypercall with MSR_PR has already been handled in rmode, 1387 * and never reaches here. 1388 */ 1389 1390 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3); 1391 for (i = 0; i < 9; ++i) 1392 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i); 1393 run->exit_reason = KVM_EXIT_PAPR_HCALL; 1394 vcpu->arch.hcall_needed = 1; 1395 r = RESUME_HOST; 1396 break; 1397 } 1398 /* 1399 * We get these next two if the guest accesses a page which it thinks 1400 * it has mapped but which is not actually present, either because 1401 * it is for an emulated I/O device or because the corresonding 1402 * host page has been paged out. Any other HDSI/HISI interrupts 1403 * have been handled already. 1404 */ 1405 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1406 r = RESUME_PAGE_FAULT; 1407 break; 1408 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1409 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1410 vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr & 1411 DSISR_SRR1_MATCH_64S; 1412 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1413 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1414 r = RESUME_PAGE_FAULT; 1415 break; 1416 /* 1417 * This occurs if the guest executes an illegal instruction. 1418 * If the guest debug is disabled, generate a program interrupt 1419 * to the guest. If guest debug is enabled, we need to check 1420 * whether the instruction is a software breakpoint instruction. 1421 * Accordingly return to Guest or Host. 1422 */ 1423 case BOOK3S_INTERRUPT_H_EMUL_ASSIST: 1424 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED) 1425 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ? 1426 swab32(vcpu->arch.emul_inst) : 1427 vcpu->arch.emul_inst; 1428 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) { 1429 r = kvmppc_emulate_debug_inst(vcpu); 1430 } else { 1431 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1432 r = RESUME_GUEST; 1433 } 1434 break; 1435 /* 1436 * This occurs if the guest (kernel or userspace), does something that 1437 * is prohibited by HFSCR. 1438 * On POWER9, this could be a doorbell instruction that we need 1439 * to emulate. 1440 * Otherwise, we just generate a program interrupt to the guest. 1441 */ 1442 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: 1443 r = EMULATE_FAIL; 1444 if (((vcpu->arch.hfscr >> 56) == FSCR_MSGP_LG) && 1445 cpu_has_feature(CPU_FTR_ARCH_300)) 1446 r = kvmppc_emulate_doorbell_instr(vcpu); 1447 if (r == EMULATE_FAIL) { 1448 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1449 r = RESUME_GUEST; 1450 } 1451 break; 1452 1453 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1454 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1455 /* 1456 * This occurs for various TM-related instructions that 1457 * we need to emulate on POWER9 DD2.2. We have already 1458 * handled the cases where the guest was in real-suspend 1459 * mode and was transitioning to transactional state. 1460 */ 1461 r = kvmhv_p9_tm_emulation(vcpu); 1462 break; 1463 #endif 1464 1465 case BOOK3S_INTERRUPT_HV_RM_HARD: 1466 r = RESUME_PASSTHROUGH; 1467 break; 1468 default: 1469 kvmppc_dump_regs(vcpu); 1470 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1471 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1472 vcpu->arch.shregs.msr); 1473 run->hw.hardware_exit_reason = vcpu->arch.trap; 1474 r = RESUME_HOST; 1475 break; 1476 } 1477 1478 return r; 1479 } 1480 1481 static int kvmppc_handle_nested_exit(struct kvm_vcpu *vcpu) 1482 { 1483 int r; 1484 int srcu_idx; 1485 1486 vcpu->stat.sum_exits++; 1487 1488 /* 1489 * This can happen if an interrupt occurs in the last stages 1490 * of guest entry or the first stages of guest exit (i.e. after 1491 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1492 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1493 * That can happen due to a bug, or due to a machine check 1494 * occurring at just the wrong time. 1495 */ 1496 if (vcpu->arch.shregs.msr & MSR_HV) { 1497 pr_emerg("KVM trap in HV mode while nested!\n"); 1498 pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1499 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1500 vcpu->arch.shregs.msr); 1501 kvmppc_dump_regs(vcpu); 1502 return RESUME_HOST; 1503 } 1504 switch (vcpu->arch.trap) { 1505 /* We're good on these - the host merely wanted to get our attention */ 1506 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1507 vcpu->stat.dec_exits++; 1508 r = RESUME_GUEST; 1509 break; 1510 case BOOK3S_INTERRUPT_EXTERNAL: 1511 vcpu->stat.ext_intr_exits++; 1512 r = RESUME_HOST; 1513 break; 1514 case BOOK3S_INTERRUPT_H_DOORBELL: 1515 case BOOK3S_INTERRUPT_H_VIRT: 1516 vcpu->stat.ext_intr_exits++; 1517 r = RESUME_GUEST; 1518 break; 1519 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1520 case BOOK3S_INTERRUPT_HMI: 1521 case BOOK3S_INTERRUPT_PERFMON: 1522 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1523 r = RESUME_GUEST; 1524 break; 1525 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1526 { 1527 static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL, 1528 DEFAULT_RATELIMIT_BURST); 1529 /* Pass the machine check to the L1 guest */ 1530 r = RESUME_HOST; 1531 /* Print the MCE event to host console. */ 1532 if (__ratelimit(&rs)) 1533 machine_check_print_event_info(&vcpu->arch.mce_evt, false, true); 1534 break; 1535 } 1536 /* 1537 * We get these next two if the guest accesses a page which it thinks 1538 * it has mapped but which is not actually present, either because 1539 * it is for an emulated I/O device or because the corresonding 1540 * host page has been paged out. 1541 */ 1542 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1543 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1544 r = kvmhv_nested_page_fault(vcpu); 1545 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1546 break; 1547 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1548 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1549 vcpu->arch.fault_dsisr = kvmppc_get_msr(vcpu) & 1550 DSISR_SRR1_MATCH_64S; 1551 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1552 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1553 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1554 r = kvmhv_nested_page_fault(vcpu); 1555 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1556 break; 1557 1558 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1559 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1560 /* 1561 * This occurs for various TM-related instructions that 1562 * we need to emulate on POWER9 DD2.2. We have already 1563 * handled the cases where the guest was in real-suspend 1564 * mode and was transitioning to transactional state. 1565 */ 1566 r = kvmhv_p9_tm_emulation(vcpu); 1567 break; 1568 #endif 1569 1570 case BOOK3S_INTERRUPT_HV_RM_HARD: 1571 vcpu->arch.trap = 0; 1572 r = RESUME_GUEST; 1573 if (!xics_on_xive()) 1574 kvmppc_xics_rm_complete(vcpu, 0); 1575 break; 1576 default: 1577 r = RESUME_HOST; 1578 break; 1579 } 1580 1581 return r; 1582 } 1583 1584 static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu, 1585 struct kvm_sregs *sregs) 1586 { 1587 int i; 1588 1589 memset(sregs, 0, sizeof(struct kvm_sregs)); 1590 sregs->pvr = vcpu->arch.pvr; 1591 for (i = 0; i < vcpu->arch.slb_max; i++) { 1592 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige; 1593 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; 1594 } 1595 1596 return 0; 1597 } 1598 1599 static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu, 1600 struct kvm_sregs *sregs) 1601 { 1602 int i, j; 1603 1604 /* Only accept the same PVR as the host's, since we can't spoof it */ 1605 if (sregs->pvr != vcpu->arch.pvr) 1606 return -EINVAL; 1607 1608 j = 0; 1609 for (i = 0; i < vcpu->arch.slb_nr; i++) { 1610 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) { 1611 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe; 1612 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv; 1613 ++j; 1614 } 1615 } 1616 vcpu->arch.slb_max = j; 1617 1618 return 0; 1619 } 1620 1621 static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr, 1622 bool preserve_top32) 1623 { 1624 struct kvm *kvm = vcpu->kvm; 1625 struct kvmppc_vcore *vc = vcpu->arch.vcore; 1626 u64 mask; 1627 1628 spin_lock(&vc->lock); 1629 /* 1630 * If ILE (interrupt little-endian) has changed, update the 1631 * MSR_LE bit in the intr_msr for each vcpu in this vcore. 1632 */ 1633 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) { 1634 struct kvm_vcpu *vcpu; 1635 int i; 1636 1637 kvm_for_each_vcpu(i, vcpu, kvm) { 1638 if (vcpu->arch.vcore != vc) 1639 continue; 1640 if (new_lpcr & LPCR_ILE) 1641 vcpu->arch.intr_msr |= MSR_LE; 1642 else 1643 vcpu->arch.intr_msr &= ~MSR_LE; 1644 } 1645 } 1646 1647 /* 1648 * Userspace can only modify DPFD (default prefetch depth), 1649 * ILE (interrupt little-endian) and TC (translation control). 1650 * On POWER8 and POWER9 userspace can also modify AIL (alt. interrupt loc.). 1651 */ 1652 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC; 1653 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 1654 mask |= LPCR_AIL; 1655 /* 1656 * On POWER9, allow userspace to enable large decrementer for the 1657 * guest, whether or not the host has it enabled. 1658 */ 1659 if (cpu_has_feature(CPU_FTR_ARCH_300)) 1660 mask |= LPCR_LD; 1661 1662 /* Broken 32-bit version of LPCR must not clear top bits */ 1663 if (preserve_top32) 1664 mask &= 0xFFFFFFFF; 1665 vc->lpcr = (vc->lpcr & ~mask) | (new_lpcr & mask); 1666 spin_unlock(&vc->lock); 1667 } 1668 1669 static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 1670 union kvmppc_one_reg *val) 1671 { 1672 int r = 0; 1673 long int i; 1674 1675 switch (id) { 1676 case KVM_REG_PPC_DEBUG_INST: 1677 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 1678 break; 1679 case KVM_REG_PPC_HIOR: 1680 *val = get_reg_val(id, 0); 1681 break; 1682 case KVM_REG_PPC_DABR: 1683 *val = get_reg_val(id, vcpu->arch.dabr); 1684 break; 1685 case KVM_REG_PPC_DABRX: 1686 *val = get_reg_val(id, vcpu->arch.dabrx); 1687 break; 1688 case KVM_REG_PPC_DSCR: 1689 *val = get_reg_val(id, vcpu->arch.dscr); 1690 break; 1691 case KVM_REG_PPC_PURR: 1692 *val = get_reg_val(id, vcpu->arch.purr); 1693 break; 1694 case KVM_REG_PPC_SPURR: 1695 *val = get_reg_val(id, vcpu->arch.spurr); 1696 break; 1697 case KVM_REG_PPC_AMR: 1698 *val = get_reg_val(id, vcpu->arch.amr); 1699 break; 1700 case KVM_REG_PPC_UAMOR: 1701 *val = get_reg_val(id, vcpu->arch.uamor); 1702 break; 1703 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCR1: 1704 i = id - KVM_REG_PPC_MMCR0; 1705 *val = get_reg_val(id, vcpu->arch.mmcr[i]); 1706 break; 1707 case KVM_REG_PPC_MMCR2: 1708 *val = get_reg_val(id, vcpu->arch.mmcr[2]); 1709 break; 1710 case KVM_REG_PPC_MMCRA: 1711 *val = get_reg_val(id, vcpu->arch.mmcra); 1712 break; 1713 case KVM_REG_PPC_MMCRS: 1714 *val = get_reg_val(id, vcpu->arch.mmcrs); 1715 break; 1716 case KVM_REG_PPC_MMCR3: 1717 *val = get_reg_val(id, vcpu->arch.mmcr[3]); 1718 break; 1719 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 1720 i = id - KVM_REG_PPC_PMC1; 1721 *val = get_reg_val(id, vcpu->arch.pmc[i]); 1722 break; 1723 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 1724 i = id - KVM_REG_PPC_SPMC1; 1725 *val = get_reg_val(id, vcpu->arch.spmc[i]); 1726 break; 1727 case KVM_REG_PPC_SIAR: 1728 *val = get_reg_val(id, vcpu->arch.siar); 1729 break; 1730 case KVM_REG_PPC_SDAR: 1731 *val = get_reg_val(id, vcpu->arch.sdar); 1732 break; 1733 case KVM_REG_PPC_SIER: 1734 *val = get_reg_val(id, vcpu->arch.sier[0]); 1735 break; 1736 case KVM_REG_PPC_SIER2: 1737 *val = get_reg_val(id, vcpu->arch.sier[1]); 1738 break; 1739 case KVM_REG_PPC_SIER3: 1740 *val = get_reg_val(id, vcpu->arch.sier[2]); 1741 break; 1742 case KVM_REG_PPC_IAMR: 1743 *val = get_reg_val(id, vcpu->arch.iamr); 1744 break; 1745 case KVM_REG_PPC_PSPB: 1746 *val = get_reg_val(id, vcpu->arch.pspb); 1747 break; 1748 case KVM_REG_PPC_DPDES: 1749 /* 1750 * On POWER9, where we are emulating msgsndp etc., 1751 * we return 1 bit for each vcpu, which can come from 1752 * either vcore->dpdes or doorbell_request. 1753 * On POWER8, doorbell_request is 0. 1754 */ 1755 *val = get_reg_val(id, vcpu->arch.vcore->dpdes | 1756 vcpu->arch.doorbell_request); 1757 break; 1758 case KVM_REG_PPC_VTB: 1759 *val = get_reg_val(id, vcpu->arch.vcore->vtb); 1760 break; 1761 case KVM_REG_PPC_DAWR: 1762 *val = get_reg_val(id, vcpu->arch.dawr); 1763 break; 1764 case KVM_REG_PPC_DAWRX: 1765 *val = get_reg_val(id, vcpu->arch.dawrx); 1766 break; 1767 case KVM_REG_PPC_CIABR: 1768 *val = get_reg_val(id, vcpu->arch.ciabr); 1769 break; 1770 case KVM_REG_PPC_CSIGR: 1771 *val = get_reg_val(id, vcpu->arch.csigr); 1772 break; 1773 case KVM_REG_PPC_TACR: 1774 *val = get_reg_val(id, vcpu->arch.tacr); 1775 break; 1776 case KVM_REG_PPC_TCSCR: 1777 *val = get_reg_val(id, vcpu->arch.tcscr); 1778 break; 1779 case KVM_REG_PPC_PID: 1780 *val = get_reg_val(id, vcpu->arch.pid); 1781 break; 1782 case KVM_REG_PPC_ACOP: 1783 *val = get_reg_val(id, vcpu->arch.acop); 1784 break; 1785 case KVM_REG_PPC_WORT: 1786 *val = get_reg_val(id, vcpu->arch.wort); 1787 break; 1788 case KVM_REG_PPC_TIDR: 1789 *val = get_reg_val(id, vcpu->arch.tid); 1790 break; 1791 case KVM_REG_PPC_PSSCR: 1792 *val = get_reg_val(id, vcpu->arch.psscr); 1793 break; 1794 case KVM_REG_PPC_VPA_ADDR: 1795 spin_lock(&vcpu->arch.vpa_update_lock); 1796 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa); 1797 spin_unlock(&vcpu->arch.vpa_update_lock); 1798 break; 1799 case KVM_REG_PPC_VPA_SLB: 1800 spin_lock(&vcpu->arch.vpa_update_lock); 1801 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa; 1802 val->vpaval.length = vcpu->arch.slb_shadow.len; 1803 spin_unlock(&vcpu->arch.vpa_update_lock); 1804 break; 1805 case KVM_REG_PPC_VPA_DTL: 1806 spin_lock(&vcpu->arch.vpa_update_lock); 1807 val->vpaval.addr = vcpu->arch.dtl.next_gpa; 1808 val->vpaval.length = vcpu->arch.dtl.len; 1809 spin_unlock(&vcpu->arch.vpa_update_lock); 1810 break; 1811 case KVM_REG_PPC_TB_OFFSET: 1812 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset); 1813 break; 1814 case KVM_REG_PPC_LPCR: 1815 case KVM_REG_PPC_LPCR_64: 1816 *val = get_reg_val(id, vcpu->arch.vcore->lpcr); 1817 break; 1818 case KVM_REG_PPC_PPR: 1819 *val = get_reg_val(id, vcpu->arch.ppr); 1820 break; 1821 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1822 case KVM_REG_PPC_TFHAR: 1823 *val = get_reg_val(id, vcpu->arch.tfhar); 1824 break; 1825 case KVM_REG_PPC_TFIAR: 1826 *val = get_reg_val(id, vcpu->arch.tfiar); 1827 break; 1828 case KVM_REG_PPC_TEXASR: 1829 *val = get_reg_val(id, vcpu->arch.texasr); 1830 break; 1831 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 1832 i = id - KVM_REG_PPC_TM_GPR0; 1833 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]); 1834 break; 1835 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 1836 { 1837 int j; 1838 i = id - KVM_REG_PPC_TM_VSR0; 1839 if (i < 32) 1840 for (j = 0; j < TS_FPRWIDTH; j++) 1841 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j]; 1842 else { 1843 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1844 val->vval = vcpu->arch.vr_tm.vr[i-32]; 1845 else 1846 r = -ENXIO; 1847 } 1848 break; 1849 } 1850 case KVM_REG_PPC_TM_CR: 1851 *val = get_reg_val(id, vcpu->arch.cr_tm); 1852 break; 1853 case KVM_REG_PPC_TM_XER: 1854 *val = get_reg_val(id, vcpu->arch.xer_tm); 1855 break; 1856 case KVM_REG_PPC_TM_LR: 1857 *val = get_reg_val(id, vcpu->arch.lr_tm); 1858 break; 1859 case KVM_REG_PPC_TM_CTR: 1860 *val = get_reg_val(id, vcpu->arch.ctr_tm); 1861 break; 1862 case KVM_REG_PPC_TM_FPSCR: 1863 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr); 1864 break; 1865 case KVM_REG_PPC_TM_AMR: 1866 *val = get_reg_val(id, vcpu->arch.amr_tm); 1867 break; 1868 case KVM_REG_PPC_TM_PPR: 1869 *val = get_reg_val(id, vcpu->arch.ppr_tm); 1870 break; 1871 case KVM_REG_PPC_TM_VRSAVE: 1872 *val = get_reg_val(id, vcpu->arch.vrsave_tm); 1873 break; 1874 case KVM_REG_PPC_TM_VSCR: 1875 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1876 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]); 1877 else 1878 r = -ENXIO; 1879 break; 1880 case KVM_REG_PPC_TM_DSCR: 1881 *val = get_reg_val(id, vcpu->arch.dscr_tm); 1882 break; 1883 case KVM_REG_PPC_TM_TAR: 1884 *val = get_reg_val(id, vcpu->arch.tar_tm); 1885 break; 1886 #endif 1887 case KVM_REG_PPC_ARCH_COMPAT: 1888 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat); 1889 break; 1890 case KVM_REG_PPC_DEC_EXPIRY: 1891 *val = get_reg_val(id, vcpu->arch.dec_expires + 1892 vcpu->arch.vcore->tb_offset); 1893 break; 1894 case KVM_REG_PPC_ONLINE: 1895 *val = get_reg_val(id, vcpu->arch.online); 1896 break; 1897 case KVM_REG_PPC_PTCR: 1898 *val = get_reg_val(id, vcpu->kvm->arch.l1_ptcr); 1899 break; 1900 default: 1901 r = -EINVAL; 1902 break; 1903 } 1904 1905 return r; 1906 } 1907 1908 static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 1909 union kvmppc_one_reg *val) 1910 { 1911 int r = 0; 1912 long int i; 1913 unsigned long addr, len; 1914 1915 switch (id) { 1916 case KVM_REG_PPC_HIOR: 1917 /* Only allow this to be set to zero */ 1918 if (set_reg_val(id, *val)) 1919 r = -EINVAL; 1920 break; 1921 case KVM_REG_PPC_DABR: 1922 vcpu->arch.dabr = set_reg_val(id, *val); 1923 break; 1924 case KVM_REG_PPC_DABRX: 1925 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP; 1926 break; 1927 case KVM_REG_PPC_DSCR: 1928 vcpu->arch.dscr = set_reg_val(id, *val); 1929 break; 1930 case KVM_REG_PPC_PURR: 1931 vcpu->arch.purr = set_reg_val(id, *val); 1932 break; 1933 case KVM_REG_PPC_SPURR: 1934 vcpu->arch.spurr = set_reg_val(id, *val); 1935 break; 1936 case KVM_REG_PPC_AMR: 1937 vcpu->arch.amr = set_reg_val(id, *val); 1938 break; 1939 case KVM_REG_PPC_UAMOR: 1940 vcpu->arch.uamor = set_reg_val(id, *val); 1941 break; 1942 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCR1: 1943 i = id - KVM_REG_PPC_MMCR0; 1944 vcpu->arch.mmcr[i] = set_reg_val(id, *val); 1945 break; 1946 case KVM_REG_PPC_MMCR2: 1947 vcpu->arch.mmcr[2] = set_reg_val(id, *val); 1948 break; 1949 case KVM_REG_PPC_MMCRA: 1950 vcpu->arch.mmcra = set_reg_val(id, *val); 1951 break; 1952 case KVM_REG_PPC_MMCRS: 1953 vcpu->arch.mmcrs = set_reg_val(id, *val); 1954 break; 1955 case KVM_REG_PPC_MMCR3: 1956 *val = get_reg_val(id, vcpu->arch.mmcr[3]); 1957 break; 1958 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 1959 i = id - KVM_REG_PPC_PMC1; 1960 vcpu->arch.pmc[i] = set_reg_val(id, *val); 1961 break; 1962 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 1963 i = id - KVM_REG_PPC_SPMC1; 1964 vcpu->arch.spmc[i] = set_reg_val(id, *val); 1965 break; 1966 case KVM_REG_PPC_SIAR: 1967 vcpu->arch.siar = set_reg_val(id, *val); 1968 break; 1969 case KVM_REG_PPC_SDAR: 1970 vcpu->arch.sdar = set_reg_val(id, *val); 1971 break; 1972 case KVM_REG_PPC_SIER: 1973 vcpu->arch.sier[0] = set_reg_val(id, *val); 1974 break; 1975 case KVM_REG_PPC_SIER2: 1976 vcpu->arch.sier[1] = set_reg_val(id, *val); 1977 break; 1978 case KVM_REG_PPC_SIER3: 1979 vcpu->arch.sier[2] = set_reg_val(id, *val); 1980 break; 1981 case KVM_REG_PPC_IAMR: 1982 vcpu->arch.iamr = set_reg_val(id, *val); 1983 break; 1984 case KVM_REG_PPC_PSPB: 1985 vcpu->arch.pspb = set_reg_val(id, *val); 1986 break; 1987 case KVM_REG_PPC_DPDES: 1988 vcpu->arch.vcore->dpdes = set_reg_val(id, *val); 1989 break; 1990 case KVM_REG_PPC_VTB: 1991 vcpu->arch.vcore->vtb = set_reg_val(id, *val); 1992 break; 1993 case KVM_REG_PPC_DAWR: 1994 vcpu->arch.dawr = set_reg_val(id, *val); 1995 break; 1996 case KVM_REG_PPC_DAWRX: 1997 vcpu->arch.dawrx = set_reg_val(id, *val) & ~DAWRX_HYP; 1998 break; 1999 case KVM_REG_PPC_CIABR: 2000 vcpu->arch.ciabr = set_reg_val(id, *val); 2001 /* Don't allow setting breakpoints in hypervisor code */ 2002 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER) 2003 vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */ 2004 break; 2005 case KVM_REG_PPC_CSIGR: 2006 vcpu->arch.csigr = set_reg_val(id, *val); 2007 break; 2008 case KVM_REG_PPC_TACR: 2009 vcpu->arch.tacr = set_reg_val(id, *val); 2010 break; 2011 case KVM_REG_PPC_TCSCR: 2012 vcpu->arch.tcscr = set_reg_val(id, *val); 2013 break; 2014 case KVM_REG_PPC_PID: 2015 vcpu->arch.pid = set_reg_val(id, *val); 2016 break; 2017 case KVM_REG_PPC_ACOP: 2018 vcpu->arch.acop = set_reg_val(id, *val); 2019 break; 2020 case KVM_REG_PPC_WORT: 2021 vcpu->arch.wort = set_reg_val(id, *val); 2022 break; 2023 case KVM_REG_PPC_TIDR: 2024 vcpu->arch.tid = set_reg_val(id, *val); 2025 break; 2026 case KVM_REG_PPC_PSSCR: 2027 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS; 2028 break; 2029 case KVM_REG_PPC_VPA_ADDR: 2030 addr = set_reg_val(id, *val); 2031 r = -EINVAL; 2032 if (!addr && (vcpu->arch.slb_shadow.next_gpa || 2033 vcpu->arch.dtl.next_gpa)) 2034 break; 2035 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca)); 2036 break; 2037 case KVM_REG_PPC_VPA_SLB: 2038 addr = val->vpaval.addr; 2039 len = val->vpaval.length; 2040 r = -EINVAL; 2041 if (addr && !vcpu->arch.vpa.next_gpa) 2042 break; 2043 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len); 2044 break; 2045 case KVM_REG_PPC_VPA_DTL: 2046 addr = val->vpaval.addr; 2047 len = val->vpaval.length; 2048 r = -EINVAL; 2049 if (addr && (len < sizeof(struct dtl_entry) || 2050 !vcpu->arch.vpa.next_gpa)) 2051 break; 2052 len -= len % sizeof(struct dtl_entry); 2053 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len); 2054 break; 2055 case KVM_REG_PPC_TB_OFFSET: 2056 /* round up to multiple of 2^24 */ 2057 vcpu->arch.vcore->tb_offset = 2058 ALIGN(set_reg_val(id, *val), 1UL << 24); 2059 break; 2060 case KVM_REG_PPC_LPCR: 2061 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true); 2062 break; 2063 case KVM_REG_PPC_LPCR_64: 2064 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false); 2065 break; 2066 case KVM_REG_PPC_PPR: 2067 vcpu->arch.ppr = set_reg_val(id, *val); 2068 break; 2069 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 2070 case KVM_REG_PPC_TFHAR: 2071 vcpu->arch.tfhar = set_reg_val(id, *val); 2072 break; 2073 case KVM_REG_PPC_TFIAR: 2074 vcpu->arch.tfiar = set_reg_val(id, *val); 2075 break; 2076 case KVM_REG_PPC_TEXASR: 2077 vcpu->arch.texasr = set_reg_val(id, *val); 2078 break; 2079 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 2080 i = id - KVM_REG_PPC_TM_GPR0; 2081 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val); 2082 break; 2083 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 2084 { 2085 int j; 2086 i = id - KVM_REG_PPC_TM_VSR0; 2087 if (i < 32) 2088 for (j = 0; j < TS_FPRWIDTH; j++) 2089 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j]; 2090 else 2091 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2092 vcpu->arch.vr_tm.vr[i-32] = val->vval; 2093 else 2094 r = -ENXIO; 2095 break; 2096 } 2097 case KVM_REG_PPC_TM_CR: 2098 vcpu->arch.cr_tm = set_reg_val(id, *val); 2099 break; 2100 case KVM_REG_PPC_TM_XER: 2101 vcpu->arch.xer_tm = set_reg_val(id, *val); 2102 break; 2103 case KVM_REG_PPC_TM_LR: 2104 vcpu->arch.lr_tm = set_reg_val(id, *val); 2105 break; 2106 case KVM_REG_PPC_TM_CTR: 2107 vcpu->arch.ctr_tm = set_reg_val(id, *val); 2108 break; 2109 case KVM_REG_PPC_TM_FPSCR: 2110 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val); 2111 break; 2112 case KVM_REG_PPC_TM_AMR: 2113 vcpu->arch.amr_tm = set_reg_val(id, *val); 2114 break; 2115 case KVM_REG_PPC_TM_PPR: 2116 vcpu->arch.ppr_tm = set_reg_val(id, *val); 2117 break; 2118 case KVM_REG_PPC_TM_VRSAVE: 2119 vcpu->arch.vrsave_tm = set_reg_val(id, *val); 2120 break; 2121 case KVM_REG_PPC_TM_VSCR: 2122 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 2123 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val); 2124 else 2125 r = - ENXIO; 2126 break; 2127 case KVM_REG_PPC_TM_DSCR: 2128 vcpu->arch.dscr_tm = set_reg_val(id, *val); 2129 break; 2130 case KVM_REG_PPC_TM_TAR: 2131 vcpu->arch.tar_tm = set_reg_val(id, *val); 2132 break; 2133 #endif 2134 case KVM_REG_PPC_ARCH_COMPAT: 2135 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val)); 2136 break; 2137 case KVM_REG_PPC_DEC_EXPIRY: 2138 vcpu->arch.dec_expires = set_reg_val(id, *val) - 2139 vcpu->arch.vcore->tb_offset; 2140 break; 2141 case KVM_REG_PPC_ONLINE: 2142 i = set_reg_val(id, *val); 2143 if (i && !vcpu->arch.online) 2144 atomic_inc(&vcpu->arch.vcore->online_count); 2145 else if (!i && vcpu->arch.online) 2146 atomic_dec(&vcpu->arch.vcore->online_count); 2147 vcpu->arch.online = i; 2148 break; 2149 case KVM_REG_PPC_PTCR: 2150 vcpu->kvm->arch.l1_ptcr = set_reg_val(id, *val); 2151 break; 2152 default: 2153 r = -EINVAL; 2154 break; 2155 } 2156 2157 return r; 2158 } 2159 2160 /* 2161 * On POWER9, threads are independent and can be in different partitions. 2162 * Therefore we consider each thread to be a subcore. 2163 * There is a restriction that all threads have to be in the same 2164 * MMU mode (radix or HPT), unfortunately, but since we only support 2165 * HPT guests on a HPT host so far, that isn't an impediment yet. 2166 */ 2167 static int threads_per_vcore(struct kvm *kvm) 2168 { 2169 if (kvm->arch.threads_indep) 2170 return 1; 2171 return threads_per_subcore; 2172 } 2173 2174 static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int id) 2175 { 2176 struct kvmppc_vcore *vcore; 2177 2178 vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL); 2179 2180 if (vcore == NULL) 2181 return NULL; 2182 2183 spin_lock_init(&vcore->lock); 2184 spin_lock_init(&vcore->stoltb_lock); 2185 rcuwait_init(&vcore->wait); 2186 vcore->preempt_tb = TB_NIL; 2187 vcore->lpcr = kvm->arch.lpcr; 2188 vcore->first_vcpuid = id; 2189 vcore->kvm = kvm; 2190 INIT_LIST_HEAD(&vcore->preempt_list); 2191 2192 return vcore; 2193 } 2194 2195 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING 2196 static struct debugfs_timings_element { 2197 const char *name; 2198 size_t offset; 2199 } timings[] = { 2200 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)}, 2201 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)}, 2202 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)}, 2203 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)}, 2204 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)}, 2205 }; 2206 2207 #define N_TIMINGS (ARRAY_SIZE(timings)) 2208 2209 struct debugfs_timings_state { 2210 struct kvm_vcpu *vcpu; 2211 unsigned int buflen; 2212 char buf[N_TIMINGS * 100]; 2213 }; 2214 2215 static int debugfs_timings_open(struct inode *inode, struct file *file) 2216 { 2217 struct kvm_vcpu *vcpu = inode->i_private; 2218 struct debugfs_timings_state *p; 2219 2220 p = kzalloc(sizeof(*p), GFP_KERNEL); 2221 if (!p) 2222 return -ENOMEM; 2223 2224 kvm_get_kvm(vcpu->kvm); 2225 p->vcpu = vcpu; 2226 file->private_data = p; 2227 2228 return nonseekable_open(inode, file); 2229 } 2230 2231 static int debugfs_timings_release(struct inode *inode, struct file *file) 2232 { 2233 struct debugfs_timings_state *p = file->private_data; 2234 2235 kvm_put_kvm(p->vcpu->kvm); 2236 kfree(p); 2237 return 0; 2238 } 2239 2240 static ssize_t debugfs_timings_read(struct file *file, char __user *buf, 2241 size_t len, loff_t *ppos) 2242 { 2243 struct debugfs_timings_state *p = file->private_data; 2244 struct kvm_vcpu *vcpu = p->vcpu; 2245 char *s, *buf_end; 2246 struct kvmhv_tb_accumulator tb; 2247 u64 count; 2248 loff_t pos; 2249 ssize_t n; 2250 int i, loops; 2251 bool ok; 2252 2253 if (!p->buflen) { 2254 s = p->buf; 2255 buf_end = s + sizeof(p->buf); 2256 for (i = 0; i < N_TIMINGS; ++i) { 2257 struct kvmhv_tb_accumulator *acc; 2258 2259 acc = (struct kvmhv_tb_accumulator *) 2260 ((unsigned long)vcpu + timings[i].offset); 2261 ok = false; 2262 for (loops = 0; loops < 1000; ++loops) { 2263 count = acc->seqcount; 2264 if (!(count & 1)) { 2265 smp_rmb(); 2266 tb = *acc; 2267 smp_rmb(); 2268 if (count == acc->seqcount) { 2269 ok = true; 2270 break; 2271 } 2272 } 2273 udelay(1); 2274 } 2275 if (!ok) 2276 snprintf(s, buf_end - s, "%s: stuck\n", 2277 timings[i].name); 2278 else 2279 snprintf(s, buf_end - s, 2280 "%s: %llu %llu %llu %llu\n", 2281 timings[i].name, count / 2, 2282 tb_to_ns(tb.tb_total), 2283 tb_to_ns(tb.tb_min), 2284 tb_to_ns(tb.tb_max)); 2285 s += strlen(s); 2286 } 2287 p->buflen = s - p->buf; 2288 } 2289 2290 pos = *ppos; 2291 if (pos >= p->buflen) 2292 return 0; 2293 if (len > p->buflen - pos) 2294 len = p->buflen - pos; 2295 n = copy_to_user(buf, p->buf + pos, len); 2296 if (n) { 2297 if (n == len) 2298 return -EFAULT; 2299 len -= n; 2300 } 2301 *ppos = pos + len; 2302 return len; 2303 } 2304 2305 static ssize_t debugfs_timings_write(struct file *file, const char __user *buf, 2306 size_t len, loff_t *ppos) 2307 { 2308 return -EACCES; 2309 } 2310 2311 static const struct file_operations debugfs_timings_ops = { 2312 .owner = THIS_MODULE, 2313 .open = debugfs_timings_open, 2314 .release = debugfs_timings_release, 2315 .read = debugfs_timings_read, 2316 .write = debugfs_timings_write, 2317 .llseek = generic_file_llseek, 2318 }; 2319 2320 /* Create a debugfs directory for the vcpu */ 2321 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2322 { 2323 char buf[16]; 2324 struct kvm *kvm = vcpu->kvm; 2325 2326 snprintf(buf, sizeof(buf), "vcpu%u", id); 2327 vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir); 2328 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir, vcpu, 2329 &debugfs_timings_ops); 2330 } 2331 2332 #else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2333 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2334 { 2335 } 2336 #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2337 2338 static int kvmppc_core_vcpu_create_hv(struct kvm_vcpu *vcpu) 2339 { 2340 int err; 2341 int core; 2342 struct kvmppc_vcore *vcore; 2343 struct kvm *kvm; 2344 unsigned int id; 2345 2346 kvm = vcpu->kvm; 2347 id = vcpu->vcpu_id; 2348 2349 vcpu->arch.shared = &vcpu->arch.shregs; 2350 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 2351 /* 2352 * The shared struct is never shared on HV, 2353 * so we can always use host endianness 2354 */ 2355 #ifdef __BIG_ENDIAN__ 2356 vcpu->arch.shared_big_endian = true; 2357 #else 2358 vcpu->arch.shared_big_endian = false; 2359 #endif 2360 #endif 2361 vcpu->arch.mmcr[0] = MMCR0_FC; 2362 vcpu->arch.ctrl = CTRL_RUNLATCH; 2363 /* default to host PVR, since we can't spoof it */ 2364 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR)); 2365 spin_lock_init(&vcpu->arch.vpa_update_lock); 2366 spin_lock_init(&vcpu->arch.tbacct_lock); 2367 vcpu->arch.busy_preempt = TB_NIL; 2368 vcpu->arch.intr_msr = MSR_SF | MSR_ME; 2369 2370 /* 2371 * Set the default HFSCR for the guest from the host value. 2372 * This value is only used on POWER9. 2373 * On POWER9, we want to virtualize the doorbell facility, so we 2374 * don't set the HFSCR_MSGP bit, and that causes those instructions 2375 * to trap and then we emulate them. 2376 */ 2377 vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB | 2378 HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP | HFSCR_PREFIX; 2379 if (cpu_has_feature(CPU_FTR_HVMODE)) { 2380 vcpu->arch.hfscr &= mfspr(SPRN_HFSCR); 2381 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 2382 vcpu->arch.hfscr |= HFSCR_TM; 2383 } 2384 if (cpu_has_feature(CPU_FTR_TM_COMP)) 2385 vcpu->arch.hfscr |= HFSCR_TM; 2386 2387 kvmppc_mmu_book3s_hv_init(vcpu); 2388 2389 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 2390 2391 init_waitqueue_head(&vcpu->arch.cpu_run); 2392 2393 mutex_lock(&kvm->lock); 2394 vcore = NULL; 2395 err = -EINVAL; 2396 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 2397 if (id >= (KVM_MAX_VCPUS * kvm->arch.emul_smt_mode)) { 2398 pr_devel("KVM: VCPU ID too high\n"); 2399 core = KVM_MAX_VCORES; 2400 } else { 2401 BUG_ON(kvm->arch.smt_mode != 1); 2402 core = kvmppc_pack_vcpu_id(kvm, id); 2403 } 2404 } else { 2405 core = id / kvm->arch.smt_mode; 2406 } 2407 if (core < KVM_MAX_VCORES) { 2408 vcore = kvm->arch.vcores[core]; 2409 if (vcore && cpu_has_feature(CPU_FTR_ARCH_300)) { 2410 pr_devel("KVM: collision on id %u", id); 2411 vcore = NULL; 2412 } else if (!vcore) { 2413 /* 2414 * Take mmu_setup_lock for mutual exclusion 2415 * with kvmppc_update_lpcr(). 2416 */ 2417 err = -ENOMEM; 2418 vcore = kvmppc_vcore_create(kvm, 2419 id & ~(kvm->arch.smt_mode - 1)); 2420 mutex_lock(&kvm->arch.mmu_setup_lock); 2421 kvm->arch.vcores[core] = vcore; 2422 kvm->arch.online_vcores++; 2423 mutex_unlock(&kvm->arch.mmu_setup_lock); 2424 } 2425 } 2426 mutex_unlock(&kvm->lock); 2427 2428 if (!vcore) 2429 return err; 2430 2431 spin_lock(&vcore->lock); 2432 ++vcore->num_threads; 2433 spin_unlock(&vcore->lock); 2434 vcpu->arch.vcore = vcore; 2435 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid; 2436 vcpu->arch.thread_cpu = -1; 2437 vcpu->arch.prev_cpu = -1; 2438 2439 vcpu->arch.cpu_type = KVM_CPU_3S_64; 2440 kvmppc_sanity_check(vcpu); 2441 2442 debugfs_vcpu_init(vcpu, id); 2443 2444 return 0; 2445 } 2446 2447 static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode, 2448 unsigned long flags) 2449 { 2450 int err; 2451 int esmt = 0; 2452 2453 if (flags) 2454 return -EINVAL; 2455 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode)) 2456 return -EINVAL; 2457 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 2458 /* 2459 * On POWER8 (or POWER7), the threading mode is "strict", 2460 * so we pack smt_mode vcpus per vcore. 2461 */ 2462 if (smt_mode > threads_per_subcore) 2463 return -EINVAL; 2464 } else { 2465 /* 2466 * On POWER9, the threading mode is "loose", 2467 * so each vcpu gets its own vcore. 2468 */ 2469 esmt = smt_mode; 2470 smt_mode = 1; 2471 } 2472 mutex_lock(&kvm->lock); 2473 err = -EBUSY; 2474 if (!kvm->arch.online_vcores) { 2475 kvm->arch.smt_mode = smt_mode; 2476 kvm->arch.emul_smt_mode = esmt; 2477 err = 0; 2478 } 2479 mutex_unlock(&kvm->lock); 2480 2481 return err; 2482 } 2483 2484 static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa) 2485 { 2486 if (vpa->pinned_addr) 2487 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa, 2488 vpa->dirty); 2489 } 2490 2491 static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu) 2492 { 2493 spin_lock(&vcpu->arch.vpa_update_lock); 2494 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl); 2495 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow); 2496 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa); 2497 spin_unlock(&vcpu->arch.vpa_update_lock); 2498 } 2499 2500 static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu) 2501 { 2502 /* Indicate we want to get back into the guest */ 2503 return 1; 2504 } 2505 2506 static void kvmppc_set_timer(struct kvm_vcpu *vcpu) 2507 { 2508 unsigned long dec_nsec, now; 2509 2510 now = get_tb(); 2511 if (now > vcpu->arch.dec_expires) { 2512 /* decrementer has already gone negative */ 2513 kvmppc_core_queue_dec(vcpu); 2514 kvmppc_core_prepare_to_enter(vcpu); 2515 return; 2516 } 2517 dec_nsec = tb_to_ns(vcpu->arch.dec_expires - now); 2518 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL); 2519 vcpu->arch.timer_running = 1; 2520 } 2521 2522 extern int __kvmppc_vcore_entry(void); 2523 2524 static void kvmppc_remove_runnable(struct kvmppc_vcore *vc, 2525 struct kvm_vcpu *vcpu) 2526 { 2527 u64 now; 2528 2529 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 2530 return; 2531 spin_lock_irq(&vcpu->arch.tbacct_lock); 2532 now = mftb(); 2533 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) - 2534 vcpu->arch.stolen_logged; 2535 vcpu->arch.busy_preempt = now; 2536 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 2537 spin_unlock_irq(&vcpu->arch.tbacct_lock); 2538 --vc->n_runnable; 2539 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL); 2540 } 2541 2542 static int kvmppc_grab_hwthread(int cpu) 2543 { 2544 struct paca_struct *tpaca; 2545 long timeout = 10000; 2546 2547 tpaca = paca_ptrs[cpu]; 2548 2549 /* Ensure the thread won't go into the kernel if it wakes */ 2550 tpaca->kvm_hstate.kvm_vcpu = NULL; 2551 tpaca->kvm_hstate.kvm_vcore = NULL; 2552 tpaca->kvm_hstate.napping = 0; 2553 smp_wmb(); 2554 tpaca->kvm_hstate.hwthread_req = 1; 2555 2556 /* 2557 * If the thread is already executing in the kernel (e.g. handling 2558 * a stray interrupt), wait for it to get back to nap mode. 2559 * The smp_mb() is to ensure that our setting of hwthread_req 2560 * is visible before we look at hwthread_state, so if this 2561 * races with the code at system_reset_pSeries and the thread 2562 * misses our setting of hwthread_req, we are sure to see its 2563 * setting of hwthread_state, and vice versa. 2564 */ 2565 smp_mb(); 2566 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) { 2567 if (--timeout <= 0) { 2568 pr_err("KVM: couldn't grab cpu %d\n", cpu); 2569 return -EBUSY; 2570 } 2571 udelay(1); 2572 } 2573 return 0; 2574 } 2575 2576 static void kvmppc_release_hwthread(int cpu) 2577 { 2578 struct paca_struct *tpaca; 2579 2580 tpaca = paca_ptrs[cpu]; 2581 tpaca->kvm_hstate.hwthread_req = 0; 2582 tpaca->kvm_hstate.kvm_vcpu = NULL; 2583 tpaca->kvm_hstate.kvm_vcore = NULL; 2584 tpaca->kvm_hstate.kvm_split_mode = NULL; 2585 } 2586 2587 static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu) 2588 { 2589 struct kvm_nested_guest *nested = vcpu->arch.nested; 2590 cpumask_t *cpu_in_guest; 2591 int i; 2592 2593 cpu = cpu_first_thread_sibling(cpu); 2594 if (nested) { 2595 cpumask_set_cpu(cpu, &nested->need_tlb_flush); 2596 cpu_in_guest = &nested->cpu_in_guest; 2597 } else { 2598 cpumask_set_cpu(cpu, &kvm->arch.need_tlb_flush); 2599 cpu_in_guest = &kvm->arch.cpu_in_guest; 2600 } 2601 /* 2602 * Make sure setting of bit in need_tlb_flush precedes 2603 * testing of cpu_in_guest bits. The matching barrier on 2604 * the other side is the first smp_mb() in kvmppc_run_core(). 2605 */ 2606 smp_mb(); 2607 for (i = 0; i < threads_per_core; ++i) 2608 if (cpumask_test_cpu(cpu + i, cpu_in_guest)) 2609 smp_call_function_single(cpu + i, do_nothing, NULL, 1); 2610 } 2611 2612 static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu) 2613 { 2614 struct kvm_nested_guest *nested = vcpu->arch.nested; 2615 struct kvm *kvm = vcpu->kvm; 2616 int prev_cpu; 2617 2618 if (!cpu_has_feature(CPU_FTR_HVMODE)) 2619 return; 2620 2621 if (nested) 2622 prev_cpu = nested->prev_cpu[vcpu->arch.nested_vcpu_id]; 2623 else 2624 prev_cpu = vcpu->arch.prev_cpu; 2625 2626 /* 2627 * With radix, the guest can do TLB invalidations itself, 2628 * and it could choose to use the local form (tlbiel) if 2629 * it is invalidating a translation that has only ever been 2630 * used on one vcpu. However, that doesn't mean it has 2631 * only ever been used on one physical cpu, since vcpus 2632 * can move around between pcpus. To cope with this, when 2633 * a vcpu moves from one pcpu to another, we need to tell 2634 * any vcpus running on the same core as this vcpu previously 2635 * ran to flush the TLB. The TLB is shared between threads, 2636 * so we use a single bit in .need_tlb_flush for all 4 threads. 2637 */ 2638 if (prev_cpu != pcpu) { 2639 if (prev_cpu >= 0 && 2640 cpu_first_thread_sibling(prev_cpu) != 2641 cpu_first_thread_sibling(pcpu)) 2642 radix_flush_cpu(kvm, prev_cpu, vcpu); 2643 if (nested) 2644 nested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu; 2645 else 2646 vcpu->arch.prev_cpu = pcpu; 2647 } 2648 } 2649 2650 static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc) 2651 { 2652 int cpu; 2653 struct paca_struct *tpaca; 2654 struct kvm *kvm = vc->kvm; 2655 2656 cpu = vc->pcpu; 2657 if (vcpu) { 2658 if (vcpu->arch.timer_running) { 2659 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 2660 vcpu->arch.timer_running = 0; 2661 } 2662 cpu += vcpu->arch.ptid; 2663 vcpu->cpu = vc->pcpu; 2664 vcpu->arch.thread_cpu = cpu; 2665 cpumask_set_cpu(cpu, &kvm->arch.cpu_in_guest); 2666 } 2667 tpaca = paca_ptrs[cpu]; 2668 tpaca->kvm_hstate.kvm_vcpu = vcpu; 2669 tpaca->kvm_hstate.ptid = cpu - vc->pcpu; 2670 tpaca->kvm_hstate.fake_suspend = 0; 2671 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */ 2672 smp_wmb(); 2673 tpaca->kvm_hstate.kvm_vcore = vc; 2674 if (cpu != smp_processor_id()) 2675 kvmppc_ipi_thread(cpu); 2676 } 2677 2678 static void kvmppc_wait_for_nap(int n_threads) 2679 { 2680 int cpu = smp_processor_id(); 2681 int i, loops; 2682 2683 if (n_threads <= 1) 2684 return; 2685 for (loops = 0; loops < 1000000; ++loops) { 2686 /* 2687 * Check if all threads are finished. 2688 * We set the vcore pointer when starting a thread 2689 * and the thread clears it when finished, so we look 2690 * for any threads that still have a non-NULL vcore ptr. 2691 */ 2692 for (i = 1; i < n_threads; ++i) 2693 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 2694 break; 2695 if (i == n_threads) { 2696 HMT_medium(); 2697 return; 2698 } 2699 HMT_low(); 2700 } 2701 HMT_medium(); 2702 for (i = 1; i < n_threads; ++i) 2703 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 2704 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i); 2705 } 2706 2707 /* 2708 * Check that we are on thread 0 and that any other threads in 2709 * this core are off-line. Then grab the threads so they can't 2710 * enter the kernel. 2711 */ 2712 static int on_primary_thread(void) 2713 { 2714 int cpu = smp_processor_id(); 2715 int thr; 2716 2717 /* Are we on a primary subcore? */ 2718 if (cpu_thread_in_subcore(cpu)) 2719 return 0; 2720 2721 thr = 0; 2722 while (++thr < threads_per_subcore) 2723 if (cpu_online(cpu + thr)) 2724 return 0; 2725 2726 /* Grab all hw threads so they can't go into the kernel */ 2727 for (thr = 1; thr < threads_per_subcore; ++thr) { 2728 if (kvmppc_grab_hwthread(cpu + thr)) { 2729 /* Couldn't grab one; let the others go */ 2730 do { 2731 kvmppc_release_hwthread(cpu + thr); 2732 } while (--thr > 0); 2733 return 0; 2734 } 2735 } 2736 return 1; 2737 } 2738 2739 /* 2740 * A list of virtual cores for each physical CPU. 2741 * These are vcores that could run but their runner VCPU tasks are 2742 * (or may be) preempted. 2743 */ 2744 struct preempted_vcore_list { 2745 struct list_head list; 2746 spinlock_t lock; 2747 }; 2748 2749 static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores); 2750 2751 static void init_vcore_lists(void) 2752 { 2753 int cpu; 2754 2755 for_each_possible_cpu(cpu) { 2756 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu); 2757 spin_lock_init(&lp->lock); 2758 INIT_LIST_HEAD(&lp->list); 2759 } 2760 } 2761 2762 static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc) 2763 { 2764 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 2765 2766 vc->vcore_state = VCORE_PREEMPT; 2767 vc->pcpu = smp_processor_id(); 2768 if (vc->num_threads < threads_per_vcore(vc->kvm)) { 2769 spin_lock(&lp->lock); 2770 list_add_tail(&vc->preempt_list, &lp->list); 2771 spin_unlock(&lp->lock); 2772 } 2773 2774 /* Start accumulating stolen time */ 2775 kvmppc_core_start_stolen(vc); 2776 } 2777 2778 static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc) 2779 { 2780 struct preempted_vcore_list *lp; 2781 2782 kvmppc_core_end_stolen(vc); 2783 if (!list_empty(&vc->preempt_list)) { 2784 lp = &per_cpu(preempted_vcores, vc->pcpu); 2785 spin_lock(&lp->lock); 2786 list_del_init(&vc->preempt_list); 2787 spin_unlock(&lp->lock); 2788 } 2789 vc->vcore_state = VCORE_INACTIVE; 2790 } 2791 2792 /* 2793 * This stores information about the virtual cores currently 2794 * assigned to a physical core. 2795 */ 2796 struct core_info { 2797 int n_subcores; 2798 int max_subcore_threads; 2799 int total_threads; 2800 int subcore_threads[MAX_SUBCORES]; 2801 struct kvmppc_vcore *vc[MAX_SUBCORES]; 2802 }; 2803 2804 /* 2805 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7 2806 * respectively in 2-way micro-threading (split-core) mode on POWER8. 2807 */ 2808 static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 }; 2809 2810 static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc) 2811 { 2812 memset(cip, 0, sizeof(*cip)); 2813 cip->n_subcores = 1; 2814 cip->max_subcore_threads = vc->num_threads; 2815 cip->total_threads = vc->num_threads; 2816 cip->subcore_threads[0] = vc->num_threads; 2817 cip->vc[0] = vc; 2818 } 2819 2820 static bool subcore_config_ok(int n_subcores, int n_threads) 2821 { 2822 /* 2823 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way 2824 * split-core mode, with one thread per subcore. 2825 */ 2826 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2827 return n_subcores <= 4 && n_threads == 1; 2828 2829 /* On POWER8, can only dynamically split if unsplit to begin with */ 2830 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS) 2831 return false; 2832 if (n_subcores > MAX_SUBCORES) 2833 return false; 2834 if (n_subcores > 1) { 2835 if (!(dynamic_mt_modes & 2)) 2836 n_subcores = 4; 2837 if (n_subcores > 2 && !(dynamic_mt_modes & 4)) 2838 return false; 2839 } 2840 2841 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS; 2842 } 2843 2844 static void init_vcore_to_run(struct kvmppc_vcore *vc) 2845 { 2846 vc->entry_exit_map = 0; 2847 vc->in_guest = 0; 2848 vc->napping_threads = 0; 2849 vc->conferring_threads = 0; 2850 vc->tb_offset_applied = 0; 2851 } 2852 2853 static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip) 2854 { 2855 int n_threads = vc->num_threads; 2856 int sub; 2857 2858 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 2859 return false; 2860 2861 /* In one_vm_per_core mode, require all vcores to be from the same vm */ 2862 if (one_vm_per_core && vc->kvm != cip->vc[0]->kvm) 2863 return false; 2864 2865 /* Some POWER9 chips require all threads to be in the same MMU mode */ 2866 if (no_mixing_hpt_and_radix && 2867 kvm_is_radix(vc->kvm) != kvm_is_radix(cip->vc[0]->kvm)) 2868 return false; 2869 2870 if (n_threads < cip->max_subcore_threads) 2871 n_threads = cip->max_subcore_threads; 2872 if (!subcore_config_ok(cip->n_subcores + 1, n_threads)) 2873 return false; 2874 cip->max_subcore_threads = n_threads; 2875 2876 sub = cip->n_subcores; 2877 ++cip->n_subcores; 2878 cip->total_threads += vc->num_threads; 2879 cip->subcore_threads[sub] = vc->num_threads; 2880 cip->vc[sub] = vc; 2881 init_vcore_to_run(vc); 2882 list_del_init(&vc->preempt_list); 2883 2884 return true; 2885 } 2886 2887 /* 2888 * Work out whether it is possible to piggyback the execution of 2889 * vcore *pvc onto the execution of the other vcores described in *cip. 2890 */ 2891 static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip, 2892 int target_threads) 2893 { 2894 if (cip->total_threads + pvc->num_threads > target_threads) 2895 return false; 2896 2897 return can_dynamic_split(pvc, cip); 2898 } 2899 2900 static void prepare_threads(struct kvmppc_vcore *vc) 2901 { 2902 int i; 2903 struct kvm_vcpu *vcpu; 2904 2905 for_each_runnable_thread(i, vcpu, vc) { 2906 if (signal_pending(vcpu->arch.run_task)) 2907 vcpu->arch.ret = -EINTR; 2908 else if (vcpu->arch.vpa.update_pending || 2909 vcpu->arch.slb_shadow.update_pending || 2910 vcpu->arch.dtl.update_pending) 2911 vcpu->arch.ret = RESUME_GUEST; 2912 else 2913 continue; 2914 kvmppc_remove_runnable(vc, vcpu); 2915 wake_up(&vcpu->arch.cpu_run); 2916 } 2917 } 2918 2919 static void collect_piggybacks(struct core_info *cip, int target_threads) 2920 { 2921 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 2922 struct kvmppc_vcore *pvc, *vcnext; 2923 2924 spin_lock(&lp->lock); 2925 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) { 2926 if (!spin_trylock(&pvc->lock)) 2927 continue; 2928 prepare_threads(pvc); 2929 if (!pvc->n_runnable || !pvc->kvm->arch.mmu_ready) { 2930 list_del_init(&pvc->preempt_list); 2931 if (pvc->runner == NULL) { 2932 pvc->vcore_state = VCORE_INACTIVE; 2933 kvmppc_core_end_stolen(pvc); 2934 } 2935 spin_unlock(&pvc->lock); 2936 continue; 2937 } 2938 if (!can_piggyback(pvc, cip, target_threads)) { 2939 spin_unlock(&pvc->lock); 2940 continue; 2941 } 2942 kvmppc_core_end_stolen(pvc); 2943 pvc->vcore_state = VCORE_PIGGYBACK; 2944 if (cip->total_threads >= target_threads) 2945 break; 2946 } 2947 spin_unlock(&lp->lock); 2948 } 2949 2950 static bool recheck_signals_and_mmu(struct core_info *cip) 2951 { 2952 int sub, i; 2953 struct kvm_vcpu *vcpu; 2954 struct kvmppc_vcore *vc; 2955 2956 for (sub = 0; sub < cip->n_subcores; ++sub) { 2957 vc = cip->vc[sub]; 2958 if (!vc->kvm->arch.mmu_ready) 2959 return true; 2960 for_each_runnable_thread(i, vcpu, vc) 2961 if (signal_pending(vcpu->arch.run_task)) 2962 return true; 2963 } 2964 return false; 2965 } 2966 2967 static void post_guest_process(struct kvmppc_vcore *vc, bool is_master) 2968 { 2969 int still_running = 0, i; 2970 u64 now; 2971 long ret; 2972 struct kvm_vcpu *vcpu; 2973 2974 spin_lock(&vc->lock); 2975 now = get_tb(); 2976 for_each_runnable_thread(i, vcpu, vc) { 2977 /* 2978 * It's safe to unlock the vcore in the loop here, because 2979 * for_each_runnable_thread() is safe against removal of 2980 * the vcpu, and the vcore state is VCORE_EXITING here, 2981 * so any vcpus becoming runnable will have their arch.trap 2982 * set to zero and can't actually run in the guest. 2983 */ 2984 spin_unlock(&vc->lock); 2985 /* cancel pending dec exception if dec is positive */ 2986 if (now < vcpu->arch.dec_expires && 2987 kvmppc_core_pending_dec(vcpu)) 2988 kvmppc_core_dequeue_dec(vcpu); 2989 2990 trace_kvm_guest_exit(vcpu); 2991 2992 ret = RESUME_GUEST; 2993 if (vcpu->arch.trap) 2994 ret = kvmppc_handle_exit_hv(vcpu, 2995 vcpu->arch.run_task); 2996 2997 vcpu->arch.ret = ret; 2998 vcpu->arch.trap = 0; 2999 3000 spin_lock(&vc->lock); 3001 if (is_kvmppc_resume_guest(vcpu->arch.ret)) { 3002 if (vcpu->arch.pending_exceptions) 3003 kvmppc_core_prepare_to_enter(vcpu); 3004 if (vcpu->arch.ceded) 3005 kvmppc_set_timer(vcpu); 3006 else 3007 ++still_running; 3008 } else { 3009 kvmppc_remove_runnable(vc, vcpu); 3010 wake_up(&vcpu->arch.cpu_run); 3011 } 3012 } 3013 if (!is_master) { 3014 if (still_running > 0) { 3015 kvmppc_vcore_preempt(vc); 3016 } else if (vc->runner) { 3017 vc->vcore_state = VCORE_PREEMPT; 3018 kvmppc_core_start_stolen(vc); 3019 } else { 3020 vc->vcore_state = VCORE_INACTIVE; 3021 } 3022 if (vc->n_runnable > 0 && vc->runner == NULL) { 3023 /* make sure there's a candidate runner awake */ 3024 i = -1; 3025 vcpu = next_runnable_thread(vc, &i); 3026 wake_up(&vcpu->arch.cpu_run); 3027 } 3028 } 3029 spin_unlock(&vc->lock); 3030 } 3031 3032 /* 3033 * Clear core from the list of active host cores as we are about to 3034 * enter the guest. Only do this if it is the primary thread of the 3035 * core (not if a subcore) that is entering the guest. 3036 */ 3037 static inline int kvmppc_clear_host_core(unsigned int cpu) 3038 { 3039 int core; 3040 3041 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 3042 return 0; 3043 /* 3044 * Memory barrier can be omitted here as we will do a smp_wmb() 3045 * later in kvmppc_start_thread and we need ensure that state is 3046 * visible to other CPUs only after we enter guest. 3047 */ 3048 core = cpu >> threads_shift; 3049 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0; 3050 return 0; 3051 } 3052 3053 /* 3054 * Advertise this core as an active host core since we exited the guest 3055 * Only need to do this if it is the primary thread of the core that is 3056 * exiting. 3057 */ 3058 static inline int kvmppc_set_host_core(unsigned int cpu) 3059 { 3060 int core; 3061 3062 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 3063 return 0; 3064 3065 /* 3066 * Memory barrier can be omitted here because we do a spin_unlock 3067 * immediately after this which provides the memory barrier. 3068 */ 3069 core = cpu >> threads_shift; 3070 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1; 3071 return 0; 3072 } 3073 3074 static void set_irq_happened(int trap) 3075 { 3076 switch (trap) { 3077 case BOOK3S_INTERRUPT_EXTERNAL: 3078 local_paca->irq_happened |= PACA_IRQ_EE; 3079 break; 3080 case BOOK3S_INTERRUPT_H_DOORBELL: 3081 local_paca->irq_happened |= PACA_IRQ_DBELL; 3082 break; 3083 case BOOK3S_INTERRUPT_HMI: 3084 local_paca->irq_happened |= PACA_IRQ_HMI; 3085 break; 3086 case BOOK3S_INTERRUPT_SYSTEM_RESET: 3087 replay_system_reset(); 3088 break; 3089 } 3090 } 3091 3092 /* 3093 * Run a set of guest threads on a physical core. 3094 * Called with vc->lock held. 3095 */ 3096 static noinline void kvmppc_run_core(struct kvmppc_vcore *vc) 3097 { 3098 struct kvm_vcpu *vcpu; 3099 int i; 3100 int srcu_idx; 3101 struct core_info core_info; 3102 struct kvmppc_vcore *pvc; 3103 struct kvm_split_mode split_info, *sip; 3104 int split, subcore_size, active; 3105 int sub; 3106 bool thr0_done; 3107 unsigned long cmd_bit, stat_bit; 3108 int pcpu, thr; 3109 int target_threads; 3110 int controlled_threads; 3111 int trap; 3112 bool is_power8; 3113 bool hpt_on_radix; 3114 3115 /* 3116 * Remove from the list any threads that have a signal pending 3117 * or need a VPA update done 3118 */ 3119 prepare_threads(vc); 3120 3121 /* if the runner is no longer runnable, let the caller pick a new one */ 3122 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE) 3123 return; 3124 3125 /* 3126 * Initialize *vc. 3127 */ 3128 init_vcore_to_run(vc); 3129 vc->preempt_tb = TB_NIL; 3130 3131 /* 3132 * Number of threads that we will be controlling: the same as 3133 * the number of threads per subcore, except on POWER9, 3134 * where it's 1 because the threads are (mostly) independent. 3135 */ 3136 controlled_threads = threads_per_vcore(vc->kvm); 3137 3138 /* 3139 * Make sure we are running on primary threads, and that secondary 3140 * threads are offline. Also check if the number of threads in this 3141 * guest are greater than the current system threads per guest. 3142 * On POWER9, we need to be not in independent-threads mode if 3143 * this is a HPT guest on a radix host machine where the 3144 * CPU threads may not be in different MMU modes. 3145 */ 3146 hpt_on_radix = no_mixing_hpt_and_radix && radix_enabled() && 3147 !kvm_is_radix(vc->kvm); 3148 if (((controlled_threads > 1) && 3149 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) || 3150 (hpt_on_radix && vc->kvm->arch.threads_indep)) { 3151 for_each_runnable_thread(i, vcpu, vc) { 3152 vcpu->arch.ret = -EBUSY; 3153 kvmppc_remove_runnable(vc, vcpu); 3154 wake_up(&vcpu->arch.cpu_run); 3155 } 3156 goto out; 3157 } 3158 3159 /* 3160 * See if we could run any other vcores on the physical core 3161 * along with this one. 3162 */ 3163 init_core_info(&core_info, vc); 3164 pcpu = smp_processor_id(); 3165 target_threads = controlled_threads; 3166 if (target_smt_mode && target_smt_mode < target_threads) 3167 target_threads = target_smt_mode; 3168 if (vc->num_threads < target_threads) 3169 collect_piggybacks(&core_info, target_threads); 3170 3171 /* 3172 * On radix, arrange for TLB flushing if necessary. 3173 * This has to be done before disabling interrupts since 3174 * it uses smp_call_function(). 3175 */ 3176 pcpu = smp_processor_id(); 3177 if (kvm_is_radix(vc->kvm)) { 3178 for (sub = 0; sub < core_info.n_subcores; ++sub) 3179 for_each_runnable_thread(i, vcpu, core_info.vc[sub]) 3180 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 3181 } 3182 3183 /* 3184 * Hard-disable interrupts, and check resched flag and signals. 3185 * If we need to reschedule or deliver a signal, clean up 3186 * and return without going into the guest(s). 3187 * If the mmu_ready flag has been cleared, don't go into the 3188 * guest because that means a HPT resize operation is in progress. 3189 */ 3190 local_irq_disable(); 3191 hard_irq_disable(); 3192 if (lazy_irq_pending() || need_resched() || 3193 recheck_signals_and_mmu(&core_info)) { 3194 local_irq_enable(); 3195 vc->vcore_state = VCORE_INACTIVE; 3196 /* Unlock all except the primary vcore */ 3197 for (sub = 1; sub < core_info.n_subcores; ++sub) { 3198 pvc = core_info.vc[sub]; 3199 /* Put back on to the preempted vcores list */ 3200 kvmppc_vcore_preempt(pvc); 3201 spin_unlock(&pvc->lock); 3202 } 3203 for (i = 0; i < controlled_threads; ++i) 3204 kvmppc_release_hwthread(pcpu + i); 3205 return; 3206 } 3207 3208 kvmppc_clear_host_core(pcpu); 3209 3210 /* Decide on micro-threading (split-core) mode */ 3211 subcore_size = threads_per_subcore; 3212 cmd_bit = stat_bit = 0; 3213 split = core_info.n_subcores; 3214 sip = NULL; 3215 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S) 3216 && !cpu_has_feature(CPU_FTR_ARCH_300); 3217 3218 if (split > 1 || hpt_on_radix) { 3219 sip = &split_info; 3220 memset(&split_info, 0, sizeof(split_info)); 3221 for (sub = 0; sub < core_info.n_subcores; ++sub) 3222 split_info.vc[sub] = core_info.vc[sub]; 3223 3224 if (is_power8) { 3225 if (split == 2 && (dynamic_mt_modes & 2)) { 3226 cmd_bit = HID0_POWER8_1TO2LPAR; 3227 stat_bit = HID0_POWER8_2LPARMODE; 3228 } else { 3229 split = 4; 3230 cmd_bit = HID0_POWER8_1TO4LPAR; 3231 stat_bit = HID0_POWER8_4LPARMODE; 3232 } 3233 subcore_size = MAX_SMT_THREADS / split; 3234 split_info.rpr = mfspr(SPRN_RPR); 3235 split_info.pmmar = mfspr(SPRN_PMMAR); 3236 split_info.ldbar = mfspr(SPRN_LDBAR); 3237 split_info.subcore_size = subcore_size; 3238 } else { 3239 split_info.subcore_size = 1; 3240 if (hpt_on_radix) { 3241 /* Use the split_info for LPCR/LPIDR changes */ 3242 split_info.lpcr_req = vc->lpcr; 3243 split_info.lpidr_req = vc->kvm->arch.lpid; 3244 split_info.host_lpcr = vc->kvm->arch.host_lpcr; 3245 split_info.do_set = 1; 3246 } 3247 } 3248 3249 /* order writes to split_info before kvm_split_mode pointer */ 3250 smp_wmb(); 3251 } 3252 3253 for (thr = 0; thr < controlled_threads; ++thr) { 3254 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3255 3256 paca->kvm_hstate.tid = thr; 3257 paca->kvm_hstate.napping = 0; 3258 paca->kvm_hstate.kvm_split_mode = sip; 3259 } 3260 3261 /* Initiate micro-threading (split-core) on POWER8 if required */ 3262 if (cmd_bit) { 3263 unsigned long hid0 = mfspr(SPRN_HID0); 3264 3265 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS; 3266 mb(); 3267 mtspr(SPRN_HID0, hid0); 3268 isync(); 3269 for (;;) { 3270 hid0 = mfspr(SPRN_HID0); 3271 if (hid0 & stat_bit) 3272 break; 3273 cpu_relax(); 3274 } 3275 } 3276 3277 /* 3278 * On POWER8, set RWMR register. 3279 * Since it only affects PURR and SPURR, it doesn't affect 3280 * the host, so we don't save/restore the host value. 3281 */ 3282 if (is_power8) { 3283 unsigned long rwmr_val = RWMR_RPA_P8_8THREAD; 3284 int n_online = atomic_read(&vc->online_count); 3285 3286 /* 3287 * Use the 8-thread value if we're doing split-core 3288 * or if the vcore's online count looks bogus. 3289 */ 3290 if (split == 1 && threads_per_subcore == MAX_SMT_THREADS && 3291 n_online >= 1 && n_online <= MAX_SMT_THREADS) 3292 rwmr_val = p8_rwmr_values[n_online]; 3293 mtspr(SPRN_RWMR, rwmr_val); 3294 } 3295 3296 /* Start all the threads */ 3297 active = 0; 3298 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3299 thr = is_power8 ? subcore_thread_map[sub] : sub; 3300 thr0_done = false; 3301 active |= 1 << thr; 3302 pvc = core_info.vc[sub]; 3303 pvc->pcpu = pcpu + thr; 3304 for_each_runnable_thread(i, vcpu, pvc) { 3305 kvmppc_start_thread(vcpu, pvc); 3306 kvmppc_create_dtl_entry(vcpu, pvc); 3307 trace_kvm_guest_enter(vcpu); 3308 if (!vcpu->arch.ptid) 3309 thr0_done = true; 3310 active |= 1 << (thr + vcpu->arch.ptid); 3311 } 3312 /* 3313 * We need to start the first thread of each subcore 3314 * even if it doesn't have a vcpu. 3315 */ 3316 if (!thr0_done) 3317 kvmppc_start_thread(NULL, pvc); 3318 } 3319 3320 /* 3321 * Ensure that split_info.do_nap is set after setting 3322 * the vcore pointer in the PACA of the secondaries. 3323 */ 3324 smp_mb(); 3325 3326 /* 3327 * When doing micro-threading, poke the inactive threads as well. 3328 * This gets them to the nap instruction after kvm_do_nap, 3329 * which reduces the time taken to unsplit later. 3330 * For POWER9 HPT guest on radix host, we need all the secondary 3331 * threads woken up so they can do the LPCR/LPIDR change. 3332 */ 3333 if (cmd_bit || hpt_on_radix) { 3334 split_info.do_nap = 1; /* ask secondaries to nap when done */ 3335 for (thr = 1; thr < threads_per_subcore; ++thr) 3336 if (!(active & (1 << thr))) 3337 kvmppc_ipi_thread(pcpu + thr); 3338 } 3339 3340 vc->vcore_state = VCORE_RUNNING; 3341 preempt_disable(); 3342 3343 trace_kvmppc_run_core(vc, 0); 3344 3345 for (sub = 0; sub < core_info.n_subcores; ++sub) 3346 spin_unlock(&core_info.vc[sub]->lock); 3347 3348 guest_enter_irqoff(); 3349 3350 srcu_idx = srcu_read_lock(&vc->kvm->srcu); 3351 3352 this_cpu_disable_ftrace(); 3353 3354 /* 3355 * Interrupts will be enabled once we get into the guest, 3356 * so tell lockdep that we're about to enable interrupts. 3357 */ 3358 trace_hardirqs_on(); 3359 3360 trap = __kvmppc_vcore_entry(); 3361 3362 trace_hardirqs_off(); 3363 3364 this_cpu_enable_ftrace(); 3365 3366 srcu_read_unlock(&vc->kvm->srcu, srcu_idx); 3367 3368 set_irq_happened(trap); 3369 3370 spin_lock(&vc->lock); 3371 /* prevent other vcpu threads from doing kvmppc_start_thread() now */ 3372 vc->vcore_state = VCORE_EXITING; 3373 3374 /* wait for secondary threads to finish writing their state to memory */ 3375 kvmppc_wait_for_nap(controlled_threads); 3376 3377 /* Return to whole-core mode if we split the core earlier */ 3378 if (cmd_bit) { 3379 unsigned long hid0 = mfspr(SPRN_HID0); 3380 unsigned long loops = 0; 3381 3382 hid0 &= ~HID0_POWER8_DYNLPARDIS; 3383 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE; 3384 mb(); 3385 mtspr(SPRN_HID0, hid0); 3386 isync(); 3387 for (;;) { 3388 hid0 = mfspr(SPRN_HID0); 3389 if (!(hid0 & stat_bit)) 3390 break; 3391 cpu_relax(); 3392 ++loops; 3393 } 3394 } else if (hpt_on_radix) { 3395 /* Wait for all threads to have seen final sync */ 3396 for (thr = 1; thr < controlled_threads; ++thr) { 3397 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3398 3399 while (paca->kvm_hstate.kvm_split_mode) { 3400 HMT_low(); 3401 barrier(); 3402 } 3403 HMT_medium(); 3404 } 3405 } 3406 split_info.do_nap = 0; 3407 3408 kvmppc_set_host_core(pcpu); 3409 3410 local_irq_enable(); 3411 guest_exit(); 3412 3413 /* Let secondaries go back to the offline loop */ 3414 for (i = 0; i < controlled_threads; ++i) { 3415 kvmppc_release_hwthread(pcpu + i); 3416 if (sip && sip->napped[i]) 3417 kvmppc_ipi_thread(pcpu + i); 3418 cpumask_clear_cpu(pcpu + i, &vc->kvm->arch.cpu_in_guest); 3419 } 3420 3421 spin_unlock(&vc->lock); 3422 3423 /* make sure updates to secondary vcpu structs are visible now */ 3424 smp_mb(); 3425 3426 preempt_enable(); 3427 3428 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3429 pvc = core_info.vc[sub]; 3430 post_guest_process(pvc, pvc == vc); 3431 } 3432 3433 spin_lock(&vc->lock); 3434 3435 out: 3436 vc->vcore_state = VCORE_INACTIVE; 3437 trace_kvmppc_run_core(vc, 1); 3438 } 3439 3440 /* 3441 * Load up hypervisor-mode registers on P9. 3442 */ 3443 static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit, 3444 unsigned long lpcr) 3445 { 3446 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3447 s64 hdec; 3448 u64 tb, purr, spurr; 3449 int trap; 3450 unsigned long host_hfscr = mfspr(SPRN_HFSCR); 3451 unsigned long host_ciabr = mfspr(SPRN_CIABR); 3452 unsigned long host_dawr = mfspr(SPRN_DAWR0); 3453 unsigned long host_dawrx = mfspr(SPRN_DAWRX0); 3454 unsigned long host_psscr = mfspr(SPRN_PSSCR); 3455 unsigned long host_pidr = mfspr(SPRN_PID); 3456 3457 /* 3458 * P8 and P9 suppress the HDEC exception when LPCR[HDICE] = 0, 3459 * so set HDICE before writing HDEC. 3460 */ 3461 mtspr(SPRN_LPCR, vcpu->kvm->arch.host_lpcr | LPCR_HDICE); 3462 isync(); 3463 3464 hdec = time_limit - mftb(); 3465 if (hdec < 0) { 3466 mtspr(SPRN_LPCR, vcpu->kvm->arch.host_lpcr); 3467 isync(); 3468 return BOOK3S_INTERRUPT_HV_DECREMENTER; 3469 } 3470 mtspr(SPRN_HDEC, hdec); 3471 3472 if (vc->tb_offset) { 3473 u64 new_tb = mftb() + vc->tb_offset; 3474 mtspr(SPRN_TBU40, new_tb); 3475 tb = mftb(); 3476 if ((tb & 0xffffff) < (new_tb & 0xffffff)) 3477 mtspr(SPRN_TBU40, new_tb + 0x1000000); 3478 vc->tb_offset_applied = vc->tb_offset; 3479 } 3480 3481 if (vc->pcr) 3482 mtspr(SPRN_PCR, vc->pcr | PCR_MASK); 3483 mtspr(SPRN_DPDES, vc->dpdes); 3484 mtspr(SPRN_VTB, vc->vtb); 3485 3486 local_paca->kvm_hstate.host_purr = mfspr(SPRN_PURR); 3487 local_paca->kvm_hstate.host_spurr = mfspr(SPRN_SPURR); 3488 mtspr(SPRN_PURR, vcpu->arch.purr); 3489 mtspr(SPRN_SPURR, vcpu->arch.spurr); 3490 3491 if (dawr_enabled()) { 3492 mtspr(SPRN_DAWR0, vcpu->arch.dawr); 3493 mtspr(SPRN_DAWRX0, vcpu->arch.dawrx); 3494 } 3495 mtspr(SPRN_CIABR, vcpu->arch.ciabr); 3496 mtspr(SPRN_IC, vcpu->arch.ic); 3497 mtspr(SPRN_PID, vcpu->arch.pid); 3498 3499 mtspr(SPRN_PSSCR, vcpu->arch.psscr | PSSCR_EC | 3500 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG)); 3501 3502 mtspr(SPRN_HFSCR, vcpu->arch.hfscr); 3503 3504 mtspr(SPRN_SPRG0, vcpu->arch.shregs.sprg0); 3505 mtspr(SPRN_SPRG1, vcpu->arch.shregs.sprg1); 3506 mtspr(SPRN_SPRG2, vcpu->arch.shregs.sprg2); 3507 mtspr(SPRN_SPRG3, vcpu->arch.shregs.sprg3); 3508 3509 mtspr(SPRN_AMOR, ~0UL); 3510 3511 mtspr(SPRN_LPCR, lpcr); 3512 isync(); 3513 3514 kvmppc_xive_push_vcpu(vcpu); 3515 3516 mtspr(SPRN_SRR0, vcpu->arch.shregs.srr0); 3517 mtspr(SPRN_SRR1, vcpu->arch.shregs.srr1); 3518 3519 trap = __kvmhv_vcpu_entry_p9(vcpu); 3520 3521 /* Advance host PURR/SPURR by the amount used by guest */ 3522 purr = mfspr(SPRN_PURR); 3523 spurr = mfspr(SPRN_SPURR); 3524 mtspr(SPRN_PURR, local_paca->kvm_hstate.host_purr + 3525 purr - vcpu->arch.purr); 3526 mtspr(SPRN_SPURR, local_paca->kvm_hstate.host_spurr + 3527 spurr - vcpu->arch.spurr); 3528 vcpu->arch.purr = purr; 3529 vcpu->arch.spurr = spurr; 3530 3531 vcpu->arch.ic = mfspr(SPRN_IC); 3532 vcpu->arch.pid = mfspr(SPRN_PID); 3533 vcpu->arch.psscr = mfspr(SPRN_PSSCR) & PSSCR_GUEST_VIS; 3534 3535 vcpu->arch.shregs.sprg0 = mfspr(SPRN_SPRG0); 3536 vcpu->arch.shregs.sprg1 = mfspr(SPRN_SPRG1); 3537 vcpu->arch.shregs.sprg2 = mfspr(SPRN_SPRG2); 3538 vcpu->arch.shregs.sprg3 = mfspr(SPRN_SPRG3); 3539 3540 /* Preserve PSSCR[FAKE_SUSPEND] until we've called kvmppc_save_tm_hv */ 3541 mtspr(SPRN_PSSCR, host_psscr | 3542 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG)); 3543 mtspr(SPRN_HFSCR, host_hfscr); 3544 mtspr(SPRN_CIABR, host_ciabr); 3545 mtspr(SPRN_DAWR0, host_dawr); 3546 mtspr(SPRN_DAWRX0, host_dawrx); 3547 mtspr(SPRN_PID, host_pidr); 3548 3549 /* 3550 * Since this is radix, do a eieio; tlbsync; ptesync sequence in 3551 * case we interrupted the guest between a tlbie and a ptesync. 3552 */ 3553 asm volatile("eieio; tlbsync; ptesync"); 3554 3555 /* 3556 * cp_abort is required if the processor supports local copy-paste 3557 * to clear the copy buffer that was under control of the guest. 3558 */ 3559 if (cpu_has_feature(CPU_FTR_ARCH_31)) 3560 asm volatile(PPC_CP_ABORT); 3561 3562 mtspr(SPRN_LPID, vcpu->kvm->arch.host_lpid); /* restore host LPID */ 3563 isync(); 3564 3565 vc->dpdes = mfspr(SPRN_DPDES); 3566 vc->vtb = mfspr(SPRN_VTB); 3567 mtspr(SPRN_DPDES, 0); 3568 if (vc->pcr) 3569 mtspr(SPRN_PCR, PCR_MASK); 3570 3571 if (vc->tb_offset_applied) { 3572 u64 new_tb = mftb() - vc->tb_offset_applied; 3573 mtspr(SPRN_TBU40, new_tb); 3574 tb = mftb(); 3575 if ((tb & 0xffffff) < (new_tb & 0xffffff)) 3576 mtspr(SPRN_TBU40, new_tb + 0x1000000); 3577 vc->tb_offset_applied = 0; 3578 } 3579 3580 mtspr(SPRN_HDEC, 0x7fffffff); 3581 mtspr(SPRN_LPCR, vcpu->kvm->arch.host_lpcr); 3582 3583 return trap; 3584 } 3585 3586 /* 3587 * Virtual-mode guest entry for POWER9 and later when the host and 3588 * guest are both using the radix MMU. The LPIDR has already been set. 3589 */ 3590 static int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit, 3591 unsigned long lpcr) 3592 { 3593 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3594 unsigned long host_dscr = mfspr(SPRN_DSCR); 3595 unsigned long host_tidr = mfspr(SPRN_TIDR); 3596 unsigned long host_iamr = mfspr(SPRN_IAMR); 3597 unsigned long host_amr = mfspr(SPRN_AMR); 3598 s64 dec; 3599 u64 tb; 3600 int trap, save_pmu; 3601 3602 dec = mfspr(SPRN_DEC); 3603 tb = mftb(); 3604 if (dec < 0) 3605 return BOOK3S_INTERRUPT_HV_DECREMENTER; 3606 local_paca->kvm_hstate.dec_expires = dec + tb; 3607 if (local_paca->kvm_hstate.dec_expires < time_limit) 3608 time_limit = local_paca->kvm_hstate.dec_expires; 3609 3610 vcpu->arch.ceded = 0; 3611 3612 kvmhv_save_host_pmu(); /* saves it to PACA kvm_hstate */ 3613 3614 kvmppc_subcore_enter_guest(); 3615 3616 vc->entry_exit_map = 1; 3617 vc->in_guest = 1; 3618 3619 if (vcpu->arch.vpa.pinned_addr) { 3620 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3621 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3622 lp->yield_count = cpu_to_be32(yield_count); 3623 vcpu->arch.vpa.dirty = 1; 3624 } 3625 3626 if (cpu_has_feature(CPU_FTR_TM) || 3627 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3628 kvmppc_restore_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3629 3630 kvmhv_load_guest_pmu(vcpu); 3631 3632 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3633 load_fp_state(&vcpu->arch.fp); 3634 #ifdef CONFIG_ALTIVEC 3635 load_vr_state(&vcpu->arch.vr); 3636 #endif 3637 mtspr(SPRN_VRSAVE, vcpu->arch.vrsave); 3638 3639 mtspr(SPRN_DSCR, vcpu->arch.dscr); 3640 mtspr(SPRN_IAMR, vcpu->arch.iamr); 3641 mtspr(SPRN_PSPB, vcpu->arch.pspb); 3642 mtspr(SPRN_FSCR, vcpu->arch.fscr); 3643 mtspr(SPRN_TAR, vcpu->arch.tar); 3644 mtspr(SPRN_EBBHR, vcpu->arch.ebbhr); 3645 mtspr(SPRN_EBBRR, vcpu->arch.ebbrr); 3646 mtspr(SPRN_BESCR, vcpu->arch.bescr); 3647 mtspr(SPRN_WORT, vcpu->arch.wort); 3648 mtspr(SPRN_TIDR, vcpu->arch.tid); 3649 mtspr(SPRN_DAR, vcpu->arch.shregs.dar); 3650 mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr); 3651 mtspr(SPRN_AMR, vcpu->arch.amr); 3652 mtspr(SPRN_UAMOR, vcpu->arch.uamor); 3653 3654 if (!(vcpu->arch.ctrl & 1)) 3655 mtspr(SPRN_CTRLT, mfspr(SPRN_CTRLF) & ~1); 3656 3657 mtspr(SPRN_DEC, vcpu->arch.dec_expires - mftb()); 3658 3659 if (kvmhv_on_pseries()) { 3660 /* 3661 * We need to save and restore the guest visible part of the 3662 * psscr (i.e. using SPRN_PSSCR_PR) since the hypervisor 3663 * doesn't do this for us. Note only required if pseries since 3664 * this is done in kvmhv_load_hv_regs_and_go() below otherwise. 3665 */ 3666 unsigned long host_psscr; 3667 /* call our hypervisor to load up HV regs and go */ 3668 struct hv_guest_state hvregs; 3669 3670 host_psscr = mfspr(SPRN_PSSCR_PR); 3671 mtspr(SPRN_PSSCR_PR, vcpu->arch.psscr); 3672 kvmhv_save_hv_regs(vcpu, &hvregs); 3673 hvregs.lpcr = lpcr; 3674 vcpu->arch.regs.msr = vcpu->arch.shregs.msr; 3675 hvregs.version = HV_GUEST_STATE_VERSION; 3676 if (vcpu->arch.nested) { 3677 hvregs.lpid = vcpu->arch.nested->shadow_lpid; 3678 hvregs.vcpu_token = vcpu->arch.nested_vcpu_id; 3679 } else { 3680 hvregs.lpid = vcpu->kvm->arch.lpid; 3681 hvregs.vcpu_token = vcpu->vcpu_id; 3682 } 3683 hvregs.hdec_expiry = time_limit; 3684 trap = plpar_hcall_norets(H_ENTER_NESTED, __pa(&hvregs), 3685 __pa(&vcpu->arch.regs)); 3686 kvmhv_restore_hv_return_state(vcpu, &hvregs); 3687 vcpu->arch.shregs.msr = vcpu->arch.regs.msr; 3688 vcpu->arch.shregs.dar = mfspr(SPRN_DAR); 3689 vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR); 3690 vcpu->arch.psscr = mfspr(SPRN_PSSCR_PR); 3691 mtspr(SPRN_PSSCR_PR, host_psscr); 3692 3693 /* H_CEDE has to be handled now, not later */ 3694 if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested && 3695 kvmppc_get_gpr(vcpu, 3) == H_CEDE) { 3696 kvmppc_nested_cede(vcpu); 3697 kvmppc_set_gpr(vcpu, 3, 0); 3698 trap = 0; 3699 } 3700 } else { 3701 trap = kvmhv_load_hv_regs_and_go(vcpu, time_limit, lpcr); 3702 } 3703 3704 vcpu->arch.slb_max = 0; 3705 dec = mfspr(SPRN_DEC); 3706 if (!(lpcr & LPCR_LD)) /* Sign extend if not using large decrementer */ 3707 dec = (s32) dec; 3708 tb = mftb(); 3709 vcpu->arch.dec_expires = dec + tb; 3710 vcpu->cpu = -1; 3711 vcpu->arch.thread_cpu = -1; 3712 vcpu->arch.ctrl = mfspr(SPRN_CTRLF); 3713 3714 vcpu->arch.iamr = mfspr(SPRN_IAMR); 3715 vcpu->arch.pspb = mfspr(SPRN_PSPB); 3716 vcpu->arch.fscr = mfspr(SPRN_FSCR); 3717 vcpu->arch.tar = mfspr(SPRN_TAR); 3718 vcpu->arch.ebbhr = mfspr(SPRN_EBBHR); 3719 vcpu->arch.ebbrr = mfspr(SPRN_EBBRR); 3720 vcpu->arch.bescr = mfspr(SPRN_BESCR); 3721 vcpu->arch.wort = mfspr(SPRN_WORT); 3722 vcpu->arch.tid = mfspr(SPRN_TIDR); 3723 vcpu->arch.amr = mfspr(SPRN_AMR); 3724 vcpu->arch.uamor = mfspr(SPRN_UAMOR); 3725 vcpu->arch.dscr = mfspr(SPRN_DSCR); 3726 3727 mtspr(SPRN_PSPB, 0); 3728 mtspr(SPRN_WORT, 0); 3729 mtspr(SPRN_UAMOR, 0); 3730 mtspr(SPRN_DSCR, host_dscr); 3731 mtspr(SPRN_TIDR, host_tidr); 3732 mtspr(SPRN_IAMR, host_iamr); 3733 mtspr(SPRN_PSPB, 0); 3734 3735 if (host_amr != vcpu->arch.amr) 3736 mtspr(SPRN_AMR, host_amr); 3737 3738 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3739 store_fp_state(&vcpu->arch.fp); 3740 #ifdef CONFIG_ALTIVEC 3741 store_vr_state(&vcpu->arch.vr); 3742 #endif 3743 vcpu->arch.vrsave = mfspr(SPRN_VRSAVE); 3744 3745 if (cpu_has_feature(CPU_FTR_TM) || 3746 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3747 kvmppc_save_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3748 3749 save_pmu = 1; 3750 if (vcpu->arch.vpa.pinned_addr) { 3751 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3752 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3753 lp->yield_count = cpu_to_be32(yield_count); 3754 vcpu->arch.vpa.dirty = 1; 3755 save_pmu = lp->pmcregs_in_use; 3756 } 3757 /* Must save pmu if this guest is capable of running nested guests */ 3758 save_pmu |= nesting_enabled(vcpu->kvm); 3759 3760 kvmhv_save_guest_pmu(vcpu, save_pmu); 3761 3762 vc->entry_exit_map = 0x101; 3763 vc->in_guest = 0; 3764 3765 mtspr(SPRN_DEC, local_paca->kvm_hstate.dec_expires - mftb()); 3766 mtspr(SPRN_SPRG_VDSO_WRITE, local_paca->sprg_vdso); 3767 3768 kvmhv_load_host_pmu(); 3769 3770 kvmppc_subcore_exit_guest(); 3771 3772 return trap; 3773 } 3774 3775 /* 3776 * Wait for some other vcpu thread to execute us, and 3777 * wake us up when we need to handle something in the host. 3778 */ 3779 static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc, 3780 struct kvm_vcpu *vcpu, int wait_state) 3781 { 3782 DEFINE_WAIT(wait); 3783 3784 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state); 3785 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 3786 spin_unlock(&vc->lock); 3787 schedule(); 3788 spin_lock(&vc->lock); 3789 } 3790 finish_wait(&vcpu->arch.cpu_run, &wait); 3791 } 3792 3793 static void grow_halt_poll_ns(struct kvmppc_vcore *vc) 3794 { 3795 if (!halt_poll_ns_grow) 3796 return; 3797 3798 vc->halt_poll_ns *= halt_poll_ns_grow; 3799 if (vc->halt_poll_ns < halt_poll_ns_grow_start) 3800 vc->halt_poll_ns = halt_poll_ns_grow_start; 3801 } 3802 3803 static void shrink_halt_poll_ns(struct kvmppc_vcore *vc) 3804 { 3805 if (halt_poll_ns_shrink == 0) 3806 vc->halt_poll_ns = 0; 3807 else 3808 vc->halt_poll_ns /= halt_poll_ns_shrink; 3809 } 3810 3811 #ifdef CONFIG_KVM_XICS 3812 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 3813 { 3814 if (!xics_on_xive()) 3815 return false; 3816 return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr < 3817 vcpu->arch.xive_saved_state.cppr; 3818 } 3819 #else 3820 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 3821 { 3822 return false; 3823 } 3824 #endif /* CONFIG_KVM_XICS */ 3825 3826 static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu) 3827 { 3828 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded || 3829 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu)) 3830 return true; 3831 3832 return false; 3833 } 3834 3835 /* 3836 * Check to see if any of the runnable vcpus on the vcore have pending 3837 * exceptions or are no longer ceded 3838 */ 3839 static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc) 3840 { 3841 struct kvm_vcpu *vcpu; 3842 int i; 3843 3844 for_each_runnable_thread(i, vcpu, vc) { 3845 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu)) 3846 return 1; 3847 } 3848 3849 return 0; 3850 } 3851 3852 /* 3853 * All the vcpus in this vcore are idle, so wait for a decrementer 3854 * or external interrupt to one of the vcpus. vc->lock is held. 3855 */ 3856 static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc) 3857 { 3858 ktime_t cur, start_poll, start_wait; 3859 int do_sleep = 1; 3860 u64 block_ns; 3861 3862 /* Poll for pending exceptions and ceded state */ 3863 cur = start_poll = ktime_get(); 3864 if (vc->halt_poll_ns) { 3865 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns); 3866 ++vc->runner->stat.halt_attempted_poll; 3867 3868 vc->vcore_state = VCORE_POLLING; 3869 spin_unlock(&vc->lock); 3870 3871 do { 3872 if (kvmppc_vcore_check_block(vc)) { 3873 do_sleep = 0; 3874 break; 3875 } 3876 cur = ktime_get(); 3877 } while (single_task_running() && ktime_before(cur, stop)); 3878 3879 spin_lock(&vc->lock); 3880 vc->vcore_state = VCORE_INACTIVE; 3881 3882 if (!do_sleep) { 3883 ++vc->runner->stat.halt_successful_poll; 3884 goto out; 3885 } 3886 } 3887 3888 prepare_to_rcuwait(&vc->wait); 3889 set_current_state(TASK_INTERRUPTIBLE); 3890 if (kvmppc_vcore_check_block(vc)) { 3891 finish_rcuwait(&vc->wait); 3892 do_sleep = 0; 3893 /* If we polled, count this as a successful poll */ 3894 if (vc->halt_poll_ns) 3895 ++vc->runner->stat.halt_successful_poll; 3896 goto out; 3897 } 3898 3899 start_wait = ktime_get(); 3900 3901 vc->vcore_state = VCORE_SLEEPING; 3902 trace_kvmppc_vcore_blocked(vc, 0); 3903 spin_unlock(&vc->lock); 3904 schedule(); 3905 finish_rcuwait(&vc->wait); 3906 spin_lock(&vc->lock); 3907 vc->vcore_state = VCORE_INACTIVE; 3908 trace_kvmppc_vcore_blocked(vc, 1); 3909 ++vc->runner->stat.halt_successful_wait; 3910 3911 cur = ktime_get(); 3912 3913 out: 3914 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll); 3915 3916 /* Attribute wait time */ 3917 if (do_sleep) { 3918 vc->runner->stat.halt_wait_ns += 3919 ktime_to_ns(cur) - ktime_to_ns(start_wait); 3920 /* Attribute failed poll time */ 3921 if (vc->halt_poll_ns) 3922 vc->runner->stat.halt_poll_fail_ns += 3923 ktime_to_ns(start_wait) - 3924 ktime_to_ns(start_poll); 3925 } else { 3926 /* Attribute successful poll time */ 3927 if (vc->halt_poll_ns) 3928 vc->runner->stat.halt_poll_success_ns += 3929 ktime_to_ns(cur) - 3930 ktime_to_ns(start_poll); 3931 } 3932 3933 /* Adjust poll time */ 3934 if (halt_poll_ns) { 3935 if (block_ns <= vc->halt_poll_ns) 3936 ; 3937 /* We slept and blocked for longer than the max halt time */ 3938 else if (vc->halt_poll_ns && block_ns > halt_poll_ns) 3939 shrink_halt_poll_ns(vc); 3940 /* We slept and our poll time is too small */ 3941 else if (vc->halt_poll_ns < halt_poll_ns && 3942 block_ns < halt_poll_ns) 3943 grow_halt_poll_ns(vc); 3944 if (vc->halt_poll_ns > halt_poll_ns) 3945 vc->halt_poll_ns = halt_poll_ns; 3946 } else 3947 vc->halt_poll_ns = 0; 3948 3949 trace_kvmppc_vcore_wakeup(do_sleep, block_ns); 3950 } 3951 3952 /* 3953 * This never fails for a radix guest, as none of the operations it does 3954 * for a radix guest can fail or have a way to report failure. 3955 * kvmhv_run_single_vcpu() relies on this fact. 3956 */ 3957 static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu) 3958 { 3959 int r = 0; 3960 struct kvm *kvm = vcpu->kvm; 3961 3962 mutex_lock(&kvm->arch.mmu_setup_lock); 3963 if (!kvm->arch.mmu_ready) { 3964 if (!kvm_is_radix(kvm)) 3965 r = kvmppc_hv_setup_htab_rma(vcpu); 3966 if (!r) { 3967 if (cpu_has_feature(CPU_FTR_ARCH_300)) 3968 kvmppc_setup_partition_table(kvm); 3969 kvm->arch.mmu_ready = 1; 3970 } 3971 } 3972 mutex_unlock(&kvm->arch.mmu_setup_lock); 3973 return r; 3974 } 3975 3976 static int kvmppc_run_vcpu(struct kvm_vcpu *vcpu) 3977 { 3978 struct kvm_run *run = vcpu->run; 3979 int n_ceded, i, r; 3980 struct kvmppc_vcore *vc; 3981 struct kvm_vcpu *v; 3982 3983 trace_kvmppc_run_vcpu_enter(vcpu); 3984 3985 run->exit_reason = 0; 3986 vcpu->arch.ret = RESUME_GUEST; 3987 vcpu->arch.trap = 0; 3988 kvmppc_update_vpas(vcpu); 3989 3990 /* 3991 * Synchronize with other threads in this virtual core 3992 */ 3993 vc = vcpu->arch.vcore; 3994 spin_lock(&vc->lock); 3995 vcpu->arch.ceded = 0; 3996 vcpu->arch.run_task = current; 3997 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 3998 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 3999 vcpu->arch.busy_preempt = TB_NIL; 4000 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu); 4001 ++vc->n_runnable; 4002 4003 /* 4004 * This happens the first time this is called for a vcpu. 4005 * If the vcore is already running, we may be able to start 4006 * this thread straight away and have it join in. 4007 */ 4008 if (!signal_pending(current)) { 4009 if ((vc->vcore_state == VCORE_PIGGYBACK || 4010 vc->vcore_state == VCORE_RUNNING) && 4011 !VCORE_IS_EXITING(vc)) { 4012 kvmppc_create_dtl_entry(vcpu, vc); 4013 kvmppc_start_thread(vcpu, vc); 4014 trace_kvm_guest_enter(vcpu); 4015 } else if (vc->vcore_state == VCORE_SLEEPING) { 4016 rcuwait_wake_up(&vc->wait); 4017 } 4018 4019 } 4020 4021 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 4022 !signal_pending(current)) { 4023 /* See if the MMU is ready to go */ 4024 if (!vcpu->kvm->arch.mmu_ready) { 4025 spin_unlock(&vc->lock); 4026 r = kvmhv_setup_mmu(vcpu); 4027 spin_lock(&vc->lock); 4028 if (r) { 4029 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4030 run->fail_entry. 4031 hardware_entry_failure_reason = 0; 4032 vcpu->arch.ret = r; 4033 break; 4034 } 4035 } 4036 4037 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 4038 kvmppc_vcore_end_preempt(vc); 4039 4040 if (vc->vcore_state != VCORE_INACTIVE) { 4041 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE); 4042 continue; 4043 } 4044 for_each_runnable_thread(i, v, vc) { 4045 kvmppc_core_prepare_to_enter(v); 4046 if (signal_pending(v->arch.run_task)) { 4047 kvmppc_remove_runnable(vc, v); 4048 v->stat.signal_exits++; 4049 v->run->exit_reason = KVM_EXIT_INTR; 4050 v->arch.ret = -EINTR; 4051 wake_up(&v->arch.cpu_run); 4052 } 4053 } 4054 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 4055 break; 4056 n_ceded = 0; 4057 for_each_runnable_thread(i, v, vc) { 4058 if (!kvmppc_vcpu_woken(v)) 4059 n_ceded += v->arch.ceded; 4060 else 4061 v->arch.ceded = 0; 4062 } 4063 vc->runner = vcpu; 4064 if (n_ceded == vc->n_runnable) { 4065 kvmppc_vcore_blocked(vc); 4066 } else if (need_resched()) { 4067 kvmppc_vcore_preempt(vc); 4068 /* Let something else run */ 4069 cond_resched_lock(&vc->lock); 4070 if (vc->vcore_state == VCORE_PREEMPT) 4071 kvmppc_vcore_end_preempt(vc); 4072 } else { 4073 kvmppc_run_core(vc); 4074 } 4075 vc->runner = NULL; 4076 } 4077 4078 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 4079 (vc->vcore_state == VCORE_RUNNING || 4080 vc->vcore_state == VCORE_EXITING || 4081 vc->vcore_state == VCORE_PIGGYBACK)) 4082 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE); 4083 4084 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 4085 kvmppc_vcore_end_preempt(vc); 4086 4087 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 4088 kvmppc_remove_runnable(vc, vcpu); 4089 vcpu->stat.signal_exits++; 4090 run->exit_reason = KVM_EXIT_INTR; 4091 vcpu->arch.ret = -EINTR; 4092 } 4093 4094 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) { 4095 /* Wake up some vcpu to run the core */ 4096 i = -1; 4097 v = next_runnable_thread(vc, &i); 4098 wake_up(&v->arch.cpu_run); 4099 } 4100 4101 trace_kvmppc_run_vcpu_exit(vcpu); 4102 spin_unlock(&vc->lock); 4103 return vcpu->arch.ret; 4104 } 4105 4106 int kvmhv_run_single_vcpu(struct kvm_vcpu *vcpu, u64 time_limit, 4107 unsigned long lpcr) 4108 { 4109 struct kvm_run *run = vcpu->run; 4110 int trap, r, pcpu; 4111 int srcu_idx, lpid; 4112 struct kvmppc_vcore *vc; 4113 struct kvm *kvm = vcpu->kvm; 4114 struct kvm_nested_guest *nested = vcpu->arch.nested; 4115 4116 trace_kvmppc_run_vcpu_enter(vcpu); 4117 4118 run->exit_reason = 0; 4119 vcpu->arch.ret = RESUME_GUEST; 4120 vcpu->arch.trap = 0; 4121 4122 vc = vcpu->arch.vcore; 4123 vcpu->arch.ceded = 0; 4124 vcpu->arch.run_task = current; 4125 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 4126 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 4127 vcpu->arch.busy_preempt = TB_NIL; 4128 vcpu->arch.last_inst = KVM_INST_FETCH_FAILED; 4129 vc->runnable_threads[0] = vcpu; 4130 vc->n_runnable = 1; 4131 vc->runner = vcpu; 4132 4133 /* See if the MMU is ready to go */ 4134 if (!kvm->arch.mmu_ready) 4135 kvmhv_setup_mmu(vcpu); 4136 4137 if (need_resched()) 4138 cond_resched(); 4139 4140 kvmppc_update_vpas(vcpu); 4141 4142 init_vcore_to_run(vc); 4143 vc->preempt_tb = TB_NIL; 4144 4145 preempt_disable(); 4146 pcpu = smp_processor_id(); 4147 vc->pcpu = pcpu; 4148 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 4149 4150 local_irq_disable(); 4151 hard_irq_disable(); 4152 if (signal_pending(current)) 4153 goto sigpend; 4154 if (lazy_irq_pending() || need_resched() || !kvm->arch.mmu_ready) 4155 goto out; 4156 4157 if (!nested) { 4158 kvmppc_core_prepare_to_enter(vcpu); 4159 if (vcpu->arch.doorbell_request) { 4160 vc->dpdes = 1; 4161 smp_wmb(); 4162 vcpu->arch.doorbell_request = 0; 4163 } 4164 if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, 4165 &vcpu->arch.pending_exceptions)) 4166 lpcr |= LPCR_MER; 4167 } else if (vcpu->arch.pending_exceptions || 4168 vcpu->arch.doorbell_request || 4169 xive_interrupt_pending(vcpu)) { 4170 vcpu->arch.ret = RESUME_HOST; 4171 goto out; 4172 } 4173 4174 kvmppc_clear_host_core(pcpu); 4175 4176 local_paca->kvm_hstate.tid = 0; 4177 local_paca->kvm_hstate.napping = 0; 4178 local_paca->kvm_hstate.kvm_split_mode = NULL; 4179 kvmppc_start_thread(vcpu, vc); 4180 kvmppc_create_dtl_entry(vcpu, vc); 4181 trace_kvm_guest_enter(vcpu); 4182 4183 vc->vcore_state = VCORE_RUNNING; 4184 trace_kvmppc_run_core(vc, 0); 4185 4186 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4187 lpid = nested ? nested->shadow_lpid : kvm->arch.lpid; 4188 mtspr(SPRN_LPID, lpid); 4189 isync(); 4190 kvmppc_check_need_tlb_flush(kvm, pcpu, nested); 4191 } 4192 4193 guest_enter_irqoff(); 4194 4195 srcu_idx = srcu_read_lock(&kvm->srcu); 4196 4197 this_cpu_disable_ftrace(); 4198 4199 /* Tell lockdep that we're about to enable interrupts */ 4200 trace_hardirqs_on(); 4201 4202 trap = kvmhv_p9_guest_entry(vcpu, time_limit, lpcr); 4203 vcpu->arch.trap = trap; 4204 4205 trace_hardirqs_off(); 4206 4207 this_cpu_enable_ftrace(); 4208 4209 srcu_read_unlock(&kvm->srcu, srcu_idx); 4210 4211 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4212 mtspr(SPRN_LPID, kvm->arch.host_lpid); 4213 isync(); 4214 } 4215 4216 set_irq_happened(trap); 4217 4218 kvmppc_set_host_core(pcpu); 4219 4220 local_irq_enable(); 4221 guest_exit(); 4222 4223 cpumask_clear_cpu(pcpu, &kvm->arch.cpu_in_guest); 4224 4225 preempt_enable(); 4226 4227 /* 4228 * cancel pending decrementer exception if DEC is now positive, or if 4229 * entering a nested guest in which case the decrementer is now owned 4230 * by L2 and the L1 decrementer is provided in hdec_expires 4231 */ 4232 if (kvmppc_core_pending_dec(vcpu) && 4233 ((get_tb() < vcpu->arch.dec_expires) || 4234 (trap == BOOK3S_INTERRUPT_SYSCALL && 4235 kvmppc_get_gpr(vcpu, 3) == H_ENTER_NESTED))) 4236 kvmppc_core_dequeue_dec(vcpu); 4237 4238 trace_kvm_guest_exit(vcpu); 4239 r = RESUME_GUEST; 4240 if (trap) { 4241 if (!nested) 4242 r = kvmppc_handle_exit_hv(vcpu, current); 4243 else 4244 r = kvmppc_handle_nested_exit(vcpu); 4245 } 4246 vcpu->arch.ret = r; 4247 4248 if (is_kvmppc_resume_guest(r) && vcpu->arch.ceded && 4249 !kvmppc_vcpu_woken(vcpu)) { 4250 kvmppc_set_timer(vcpu); 4251 while (vcpu->arch.ceded && !kvmppc_vcpu_woken(vcpu)) { 4252 if (signal_pending(current)) { 4253 vcpu->stat.signal_exits++; 4254 run->exit_reason = KVM_EXIT_INTR; 4255 vcpu->arch.ret = -EINTR; 4256 break; 4257 } 4258 spin_lock(&vc->lock); 4259 kvmppc_vcore_blocked(vc); 4260 spin_unlock(&vc->lock); 4261 } 4262 } 4263 vcpu->arch.ceded = 0; 4264 4265 vc->vcore_state = VCORE_INACTIVE; 4266 trace_kvmppc_run_core(vc, 1); 4267 4268 done: 4269 kvmppc_remove_runnable(vc, vcpu); 4270 trace_kvmppc_run_vcpu_exit(vcpu); 4271 4272 return vcpu->arch.ret; 4273 4274 sigpend: 4275 vcpu->stat.signal_exits++; 4276 run->exit_reason = KVM_EXIT_INTR; 4277 vcpu->arch.ret = -EINTR; 4278 out: 4279 local_irq_enable(); 4280 preempt_enable(); 4281 goto done; 4282 } 4283 4284 static int kvmppc_vcpu_run_hv(struct kvm_vcpu *vcpu) 4285 { 4286 struct kvm_run *run = vcpu->run; 4287 int r; 4288 int srcu_idx; 4289 unsigned long ebb_regs[3] = {}; /* shut up GCC */ 4290 unsigned long user_tar = 0; 4291 unsigned int user_vrsave; 4292 struct kvm *kvm; 4293 4294 if (!vcpu->arch.sane) { 4295 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 4296 return -EINVAL; 4297 } 4298 4299 /* 4300 * Don't allow entry with a suspended transaction, because 4301 * the guest entry/exit code will lose it. 4302 * If the guest has TM enabled, save away their TM-related SPRs 4303 * (they will get restored by the TM unavailable interrupt). 4304 */ 4305 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 4306 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs && 4307 (current->thread.regs->msr & MSR_TM)) { 4308 if (MSR_TM_ACTIVE(current->thread.regs->msr)) { 4309 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4310 run->fail_entry.hardware_entry_failure_reason = 0; 4311 return -EINVAL; 4312 } 4313 /* Enable TM so we can read the TM SPRs */ 4314 mtmsr(mfmsr() | MSR_TM); 4315 current->thread.tm_tfhar = mfspr(SPRN_TFHAR); 4316 current->thread.tm_tfiar = mfspr(SPRN_TFIAR); 4317 current->thread.tm_texasr = mfspr(SPRN_TEXASR); 4318 current->thread.regs->msr &= ~MSR_TM; 4319 } 4320 #endif 4321 4322 /* 4323 * Force online to 1 for the sake of old userspace which doesn't 4324 * set it. 4325 */ 4326 if (!vcpu->arch.online) { 4327 atomic_inc(&vcpu->arch.vcore->online_count); 4328 vcpu->arch.online = 1; 4329 } 4330 4331 kvmppc_core_prepare_to_enter(vcpu); 4332 4333 /* No need to go into the guest when all we'll do is come back out */ 4334 if (signal_pending(current)) { 4335 run->exit_reason = KVM_EXIT_INTR; 4336 return -EINTR; 4337 } 4338 4339 kvm = vcpu->kvm; 4340 atomic_inc(&kvm->arch.vcpus_running); 4341 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */ 4342 smp_mb(); 4343 4344 flush_all_to_thread(current); 4345 4346 /* Save userspace EBB and other register values */ 4347 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4348 ebb_regs[0] = mfspr(SPRN_EBBHR); 4349 ebb_regs[1] = mfspr(SPRN_EBBRR); 4350 ebb_regs[2] = mfspr(SPRN_BESCR); 4351 user_tar = mfspr(SPRN_TAR); 4352 } 4353 user_vrsave = mfspr(SPRN_VRSAVE); 4354 4355 vcpu->arch.waitp = &vcpu->arch.vcore->wait; 4356 vcpu->arch.pgdir = kvm->mm->pgd; 4357 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 4358 4359 do { 4360 /* 4361 * The early POWER9 chips that can't mix radix and HPT threads 4362 * on the same core also need the workaround for the problem 4363 * where the TLB would prefetch entries in the guest exit path 4364 * for radix guests using the guest PIDR value and LPID 0. 4365 * The workaround is in the old path (kvmppc_run_vcpu()) 4366 * but not the new path (kvmhv_run_single_vcpu()). 4367 */ 4368 if (kvm->arch.threads_indep && kvm_is_radix(kvm) && 4369 !no_mixing_hpt_and_radix) 4370 r = kvmhv_run_single_vcpu(vcpu, ~(u64)0, 4371 vcpu->arch.vcore->lpcr); 4372 else 4373 r = kvmppc_run_vcpu(vcpu); 4374 4375 if (run->exit_reason == KVM_EXIT_PAPR_HCALL && 4376 !(vcpu->arch.shregs.msr & MSR_PR)) { 4377 trace_kvm_hcall_enter(vcpu); 4378 r = kvmppc_pseries_do_hcall(vcpu); 4379 trace_kvm_hcall_exit(vcpu, r); 4380 kvmppc_core_prepare_to_enter(vcpu); 4381 } else if (r == RESUME_PAGE_FAULT) { 4382 srcu_idx = srcu_read_lock(&kvm->srcu); 4383 r = kvmppc_book3s_hv_page_fault(vcpu, 4384 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 4385 srcu_read_unlock(&kvm->srcu, srcu_idx); 4386 } else if (r == RESUME_PASSTHROUGH) { 4387 if (WARN_ON(xics_on_xive())) 4388 r = H_SUCCESS; 4389 else 4390 r = kvmppc_xics_rm_complete(vcpu, 0); 4391 } 4392 } while (is_kvmppc_resume_guest(r)); 4393 4394 /* Restore userspace EBB and other register values */ 4395 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4396 mtspr(SPRN_EBBHR, ebb_regs[0]); 4397 mtspr(SPRN_EBBRR, ebb_regs[1]); 4398 mtspr(SPRN_BESCR, ebb_regs[2]); 4399 mtspr(SPRN_TAR, user_tar); 4400 mtspr(SPRN_FSCR, current->thread.fscr); 4401 } 4402 mtspr(SPRN_VRSAVE, user_vrsave); 4403 4404 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 4405 atomic_dec(&kvm->arch.vcpus_running); 4406 return r; 4407 } 4408 4409 static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps, 4410 int shift, int sllp) 4411 { 4412 (*sps)->page_shift = shift; 4413 (*sps)->slb_enc = sllp; 4414 (*sps)->enc[0].page_shift = shift; 4415 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift); 4416 /* 4417 * Add 16MB MPSS support (may get filtered out by userspace) 4418 */ 4419 if (shift != 24) { 4420 int penc = kvmppc_pgsize_lp_encoding(shift, 24); 4421 if (penc != -1) { 4422 (*sps)->enc[1].page_shift = 24; 4423 (*sps)->enc[1].pte_enc = penc; 4424 } 4425 } 4426 (*sps)++; 4427 } 4428 4429 static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm, 4430 struct kvm_ppc_smmu_info *info) 4431 { 4432 struct kvm_ppc_one_seg_page_size *sps; 4433 4434 /* 4435 * POWER7, POWER8 and POWER9 all support 32 storage keys for data. 4436 * POWER7 doesn't support keys for instruction accesses, 4437 * POWER8 and POWER9 do. 4438 */ 4439 info->data_keys = 32; 4440 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0; 4441 4442 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */ 4443 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS; 4444 info->slb_size = 32; 4445 4446 /* We only support these sizes for now, and no muti-size segments */ 4447 sps = &info->sps[0]; 4448 kvmppc_add_seg_page_size(&sps, 12, 0); 4449 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01); 4450 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L); 4451 4452 /* If running as a nested hypervisor, we don't support HPT guests */ 4453 if (kvmhv_on_pseries()) 4454 info->flags |= KVM_PPC_NO_HASH; 4455 4456 return 0; 4457 } 4458 4459 /* 4460 * Get (and clear) the dirty memory log for a memory slot. 4461 */ 4462 static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm, 4463 struct kvm_dirty_log *log) 4464 { 4465 struct kvm_memslots *slots; 4466 struct kvm_memory_slot *memslot; 4467 int i, r; 4468 unsigned long n; 4469 unsigned long *buf, *p; 4470 struct kvm_vcpu *vcpu; 4471 4472 mutex_lock(&kvm->slots_lock); 4473 4474 r = -EINVAL; 4475 if (log->slot >= KVM_USER_MEM_SLOTS) 4476 goto out; 4477 4478 slots = kvm_memslots(kvm); 4479 memslot = id_to_memslot(slots, log->slot); 4480 r = -ENOENT; 4481 if (!memslot || !memslot->dirty_bitmap) 4482 goto out; 4483 4484 /* 4485 * Use second half of bitmap area because both HPT and radix 4486 * accumulate bits in the first half. 4487 */ 4488 n = kvm_dirty_bitmap_bytes(memslot); 4489 buf = memslot->dirty_bitmap + n / sizeof(long); 4490 memset(buf, 0, n); 4491 4492 if (kvm_is_radix(kvm)) 4493 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf); 4494 else 4495 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf); 4496 if (r) 4497 goto out; 4498 4499 /* 4500 * We accumulate dirty bits in the first half of the 4501 * memslot's dirty_bitmap area, for when pages are paged 4502 * out or modified by the host directly. Pick up these 4503 * bits and add them to the map. 4504 */ 4505 p = memslot->dirty_bitmap; 4506 for (i = 0; i < n / sizeof(long); ++i) 4507 buf[i] |= xchg(&p[i], 0); 4508 4509 /* Harvest dirty bits from VPA and DTL updates */ 4510 /* Note: we never modify the SLB shadow buffer areas */ 4511 kvm_for_each_vcpu(i, vcpu, kvm) { 4512 spin_lock(&vcpu->arch.vpa_update_lock); 4513 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf); 4514 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf); 4515 spin_unlock(&vcpu->arch.vpa_update_lock); 4516 } 4517 4518 r = -EFAULT; 4519 if (copy_to_user(log->dirty_bitmap, buf, n)) 4520 goto out; 4521 4522 r = 0; 4523 out: 4524 mutex_unlock(&kvm->slots_lock); 4525 return r; 4526 } 4527 4528 static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *slot) 4529 { 4530 vfree(slot->arch.rmap); 4531 slot->arch.rmap = NULL; 4532 } 4533 4534 static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm, 4535 struct kvm_memory_slot *slot, 4536 const struct kvm_userspace_memory_region *mem, 4537 enum kvm_mr_change change) 4538 { 4539 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4540 4541 if (change == KVM_MR_CREATE) { 4542 slot->arch.rmap = vzalloc(array_size(npages, 4543 sizeof(*slot->arch.rmap))); 4544 if (!slot->arch.rmap) 4545 return -ENOMEM; 4546 } 4547 4548 return 0; 4549 } 4550 4551 static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm, 4552 const struct kvm_userspace_memory_region *mem, 4553 const struct kvm_memory_slot *old, 4554 const struct kvm_memory_slot *new, 4555 enum kvm_mr_change change) 4556 { 4557 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4558 4559 /* 4560 * If we are making a new memslot, it might make 4561 * some address that was previously cached as emulated 4562 * MMIO be no longer emulated MMIO, so invalidate 4563 * all the caches of emulated MMIO translations. 4564 */ 4565 if (npages) 4566 atomic64_inc(&kvm->arch.mmio_update); 4567 4568 /* 4569 * For change == KVM_MR_MOVE or KVM_MR_DELETE, higher levels 4570 * have already called kvm_arch_flush_shadow_memslot() to 4571 * flush shadow mappings. For KVM_MR_CREATE we have no 4572 * previous mappings. So the only case to handle is 4573 * KVM_MR_FLAGS_ONLY when the KVM_MEM_LOG_DIRTY_PAGES bit 4574 * has been changed. 4575 * For radix guests, we flush on setting KVM_MEM_LOG_DIRTY_PAGES 4576 * to get rid of any THP PTEs in the partition-scoped page tables 4577 * so we can track dirtiness at the page level; we flush when 4578 * clearing KVM_MEM_LOG_DIRTY_PAGES so that we can go back to 4579 * using THP PTEs. 4580 */ 4581 if (change == KVM_MR_FLAGS_ONLY && kvm_is_radix(kvm) && 4582 ((new->flags ^ old->flags) & KVM_MEM_LOG_DIRTY_PAGES)) 4583 kvmppc_radix_flush_memslot(kvm, old); 4584 /* 4585 * If UV hasn't yet called H_SVM_INIT_START, don't register memslots. 4586 */ 4587 if (!kvm->arch.secure_guest) 4588 return; 4589 4590 switch (change) { 4591 case KVM_MR_CREATE: 4592 /* 4593 * @TODO kvmppc_uvmem_memslot_create() can fail and 4594 * return error. Fix this. 4595 */ 4596 kvmppc_uvmem_memslot_create(kvm, new); 4597 break; 4598 case KVM_MR_DELETE: 4599 kvmppc_uvmem_memslot_delete(kvm, old); 4600 break; 4601 default: 4602 /* TODO: Handle KVM_MR_MOVE */ 4603 break; 4604 } 4605 } 4606 4607 /* 4608 * Update LPCR values in kvm->arch and in vcores. 4609 * Caller must hold kvm->arch.mmu_setup_lock (for mutual exclusion 4610 * of kvm->arch.lpcr update). 4611 */ 4612 void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask) 4613 { 4614 long int i; 4615 u32 cores_done = 0; 4616 4617 if ((kvm->arch.lpcr & mask) == lpcr) 4618 return; 4619 4620 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr; 4621 4622 for (i = 0; i < KVM_MAX_VCORES; ++i) { 4623 struct kvmppc_vcore *vc = kvm->arch.vcores[i]; 4624 if (!vc) 4625 continue; 4626 spin_lock(&vc->lock); 4627 vc->lpcr = (vc->lpcr & ~mask) | lpcr; 4628 spin_unlock(&vc->lock); 4629 if (++cores_done >= kvm->arch.online_vcores) 4630 break; 4631 } 4632 } 4633 4634 void kvmppc_setup_partition_table(struct kvm *kvm) 4635 { 4636 unsigned long dw0, dw1; 4637 4638 if (!kvm_is_radix(kvm)) { 4639 /* PS field - page size for VRMA */ 4640 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) | 4641 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1); 4642 /* HTABSIZE and HTABORG fields */ 4643 dw0 |= kvm->arch.sdr1; 4644 4645 /* Second dword as set by userspace */ 4646 dw1 = kvm->arch.process_table; 4647 } else { 4648 dw0 = PATB_HR | radix__get_tree_size() | 4649 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE; 4650 dw1 = PATB_GR | kvm->arch.process_table; 4651 } 4652 kvmhv_set_ptbl_entry(kvm->arch.lpid, dw0, dw1); 4653 } 4654 4655 /* 4656 * Set up HPT (hashed page table) and RMA (real-mode area). 4657 * Must be called with kvm->arch.mmu_setup_lock held. 4658 */ 4659 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu) 4660 { 4661 int err = 0; 4662 struct kvm *kvm = vcpu->kvm; 4663 unsigned long hva; 4664 struct kvm_memory_slot *memslot; 4665 struct vm_area_struct *vma; 4666 unsigned long lpcr = 0, senc; 4667 unsigned long psize, porder; 4668 int srcu_idx; 4669 4670 /* Allocate hashed page table (if not done already) and reset it */ 4671 if (!kvm->arch.hpt.virt) { 4672 int order = KVM_DEFAULT_HPT_ORDER; 4673 struct kvm_hpt_info info; 4674 4675 err = kvmppc_allocate_hpt(&info, order); 4676 /* If we get here, it means userspace didn't specify a 4677 * size explicitly. So, try successively smaller 4678 * sizes if the default failed. */ 4679 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER) 4680 err = kvmppc_allocate_hpt(&info, order); 4681 4682 if (err < 0) { 4683 pr_err("KVM: Couldn't alloc HPT\n"); 4684 goto out; 4685 } 4686 4687 kvmppc_set_hpt(kvm, &info); 4688 } 4689 4690 /* Look up the memslot for guest physical address 0 */ 4691 srcu_idx = srcu_read_lock(&kvm->srcu); 4692 memslot = gfn_to_memslot(kvm, 0); 4693 4694 /* We must have some memory at 0 by now */ 4695 err = -EINVAL; 4696 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) 4697 goto out_srcu; 4698 4699 /* Look up the VMA for the start of this memory slot */ 4700 hva = memslot->userspace_addr; 4701 mmap_read_lock(kvm->mm); 4702 vma = find_vma(kvm->mm, hva); 4703 if (!vma || vma->vm_start > hva || (vma->vm_flags & VM_IO)) 4704 goto up_out; 4705 4706 psize = vma_kernel_pagesize(vma); 4707 4708 mmap_read_unlock(kvm->mm); 4709 4710 /* We can handle 4k, 64k or 16M pages in the VRMA */ 4711 if (psize >= 0x1000000) 4712 psize = 0x1000000; 4713 else if (psize >= 0x10000) 4714 psize = 0x10000; 4715 else 4716 psize = 0x1000; 4717 porder = __ilog2(psize); 4718 4719 senc = slb_pgsize_encoding(psize); 4720 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T | 4721 (VRMA_VSID << SLB_VSID_SHIFT_1T); 4722 /* Create HPTEs in the hash page table for the VRMA */ 4723 kvmppc_map_vrma(vcpu, memslot, porder); 4724 4725 /* Update VRMASD field in the LPCR */ 4726 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 4727 /* the -4 is to account for senc values starting at 0x10 */ 4728 lpcr = senc << (LPCR_VRMASD_SH - 4); 4729 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD); 4730 } 4731 4732 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */ 4733 smp_wmb(); 4734 err = 0; 4735 out_srcu: 4736 srcu_read_unlock(&kvm->srcu, srcu_idx); 4737 out: 4738 return err; 4739 4740 up_out: 4741 mmap_read_unlock(kvm->mm); 4742 goto out_srcu; 4743 } 4744 4745 /* 4746 * Must be called with kvm->arch.mmu_setup_lock held and 4747 * mmu_ready = 0 and no vcpus running. 4748 */ 4749 int kvmppc_switch_mmu_to_hpt(struct kvm *kvm) 4750 { 4751 if (nesting_enabled(kvm)) 4752 kvmhv_release_all_nested(kvm); 4753 kvmppc_rmap_reset(kvm); 4754 kvm->arch.process_table = 0; 4755 /* Mutual exclusion with kvm_unmap_hva_range etc. */ 4756 spin_lock(&kvm->mmu_lock); 4757 kvm->arch.radix = 0; 4758 spin_unlock(&kvm->mmu_lock); 4759 kvmppc_free_radix(kvm); 4760 kvmppc_update_lpcr(kvm, LPCR_VPM1, 4761 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 4762 return 0; 4763 } 4764 4765 /* 4766 * Must be called with kvm->arch.mmu_setup_lock held and 4767 * mmu_ready = 0 and no vcpus running. 4768 */ 4769 int kvmppc_switch_mmu_to_radix(struct kvm *kvm) 4770 { 4771 int err; 4772 4773 err = kvmppc_init_vm_radix(kvm); 4774 if (err) 4775 return err; 4776 kvmppc_rmap_reset(kvm); 4777 /* Mutual exclusion with kvm_unmap_hva_range etc. */ 4778 spin_lock(&kvm->mmu_lock); 4779 kvm->arch.radix = 1; 4780 spin_unlock(&kvm->mmu_lock); 4781 kvmppc_free_hpt(&kvm->arch.hpt); 4782 kvmppc_update_lpcr(kvm, LPCR_UPRT | LPCR_GTSE | LPCR_HR, 4783 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 4784 return 0; 4785 } 4786 4787 #ifdef CONFIG_KVM_XICS 4788 /* 4789 * Allocate a per-core structure for managing state about which cores are 4790 * running in the host versus the guest and for exchanging data between 4791 * real mode KVM and CPU running in the host. 4792 * This is only done for the first VM. 4793 * The allocated structure stays even if all VMs have stopped. 4794 * It is only freed when the kvm-hv module is unloaded. 4795 * It's OK for this routine to fail, we just don't support host 4796 * core operations like redirecting H_IPI wakeups. 4797 */ 4798 void kvmppc_alloc_host_rm_ops(void) 4799 { 4800 struct kvmppc_host_rm_ops *ops; 4801 unsigned long l_ops; 4802 int cpu, core; 4803 int size; 4804 4805 /* Not the first time here ? */ 4806 if (kvmppc_host_rm_ops_hv != NULL) 4807 return; 4808 4809 ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL); 4810 if (!ops) 4811 return; 4812 4813 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core); 4814 ops->rm_core = kzalloc(size, GFP_KERNEL); 4815 4816 if (!ops->rm_core) { 4817 kfree(ops); 4818 return; 4819 } 4820 4821 cpus_read_lock(); 4822 4823 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) { 4824 if (!cpu_online(cpu)) 4825 continue; 4826 4827 core = cpu >> threads_shift; 4828 ops->rm_core[core].rm_state.in_host = 1; 4829 } 4830 4831 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv; 4832 4833 /* 4834 * Make the contents of the kvmppc_host_rm_ops structure visible 4835 * to other CPUs before we assign it to the global variable. 4836 * Do an atomic assignment (no locks used here), but if someone 4837 * beats us to it, just free our copy and return. 4838 */ 4839 smp_wmb(); 4840 l_ops = (unsigned long) ops; 4841 4842 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) { 4843 cpus_read_unlock(); 4844 kfree(ops->rm_core); 4845 kfree(ops); 4846 return; 4847 } 4848 4849 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE, 4850 "ppc/kvm_book3s:prepare", 4851 kvmppc_set_host_core, 4852 kvmppc_clear_host_core); 4853 cpus_read_unlock(); 4854 } 4855 4856 void kvmppc_free_host_rm_ops(void) 4857 { 4858 if (kvmppc_host_rm_ops_hv) { 4859 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE); 4860 kfree(kvmppc_host_rm_ops_hv->rm_core); 4861 kfree(kvmppc_host_rm_ops_hv); 4862 kvmppc_host_rm_ops_hv = NULL; 4863 } 4864 } 4865 #endif 4866 4867 static int kvmppc_core_init_vm_hv(struct kvm *kvm) 4868 { 4869 unsigned long lpcr, lpid; 4870 char buf[32]; 4871 int ret; 4872 4873 mutex_init(&kvm->arch.uvmem_lock); 4874 INIT_LIST_HEAD(&kvm->arch.uvmem_pfns); 4875 mutex_init(&kvm->arch.mmu_setup_lock); 4876 4877 /* Allocate the guest's logical partition ID */ 4878 4879 lpid = kvmppc_alloc_lpid(); 4880 if ((long)lpid < 0) 4881 return -ENOMEM; 4882 kvm->arch.lpid = lpid; 4883 4884 kvmppc_alloc_host_rm_ops(); 4885 4886 kvmhv_vm_nested_init(kvm); 4887 4888 /* 4889 * Since we don't flush the TLB when tearing down a VM, 4890 * and this lpid might have previously been used, 4891 * make sure we flush on each core before running the new VM. 4892 * On POWER9, the tlbie in mmu_partition_table_set_entry() 4893 * does this flush for us. 4894 */ 4895 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4896 cpumask_setall(&kvm->arch.need_tlb_flush); 4897 4898 /* Start out with the default set of hcalls enabled */ 4899 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls, 4900 sizeof(kvm->arch.enabled_hcalls)); 4901 4902 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4903 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1); 4904 4905 /* Init LPCR for virtual RMA mode */ 4906 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4907 kvm->arch.host_lpid = mfspr(SPRN_LPID); 4908 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR); 4909 lpcr &= LPCR_PECE | LPCR_LPES; 4910 } else { 4911 lpcr = 0; 4912 } 4913 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE | 4914 LPCR_VPM0 | LPCR_VPM1; 4915 kvm->arch.vrma_slb_v = SLB_VSID_B_1T | 4916 (VRMA_VSID << SLB_VSID_SHIFT_1T); 4917 /* On POWER8 turn on online bit to enable PURR/SPURR */ 4918 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 4919 lpcr |= LPCR_ONL; 4920 /* 4921 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed) 4922 * Set HVICE bit to enable hypervisor virtualization interrupts. 4923 * Set HEIC to prevent OS interrupts to go to hypervisor (should 4924 * be unnecessary but better safe than sorry in case we re-enable 4925 * EE in HV mode with this LPCR still set) 4926 */ 4927 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4928 lpcr &= ~LPCR_VPM0; 4929 lpcr |= LPCR_HVICE | LPCR_HEIC; 4930 4931 /* 4932 * If xive is enabled, we route 0x500 interrupts directly 4933 * to the guest. 4934 */ 4935 if (xics_on_xive()) 4936 lpcr |= LPCR_LPES; 4937 } 4938 4939 /* 4940 * If the host uses radix, the guest starts out as radix. 4941 */ 4942 if (radix_enabled()) { 4943 kvm->arch.radix = 1; 4944 kvm->arch.mmu_ready = 1; 4945 lpcr &= ~LPCR_VPM1; 4946 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR; 4947 ret = kvmppc_init_vm_radix(kvm); 4948 if (ret) { 4949 kvmppc_free_lpid(kvm->arch.lpid); 4950 return ret; 4951 } 4952 kvmppc_setup_partition_table(kvm); 4953 } 4954 4955 kvm->arch.lpcr = lpcr; 4956 4957 /* Initialization for future HPT resizes */ 4958 kvm->arch.resize_hpt = NULL; 4959 4960 /* 4961 * Work out how many sets the TLB has, for the use of 4962 * the TLB invalidation loop in book3s_hv_rmhandlers.S. 4963 */ 4964 if (cpu_has_feature(CPU_FTR_ARCH_31)) { 4965 /* 4966 * P10 will flush all the congruence class with a single tlbiel 4967 */ 4968 kvm->arch.tlb_sets = 1; 4969 } else if (radix_enabled()) 4970 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */ 4971 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 4972 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */ 4973 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 4974 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */ 4975 else 4976 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */ 4977 4978 /* 4979 * Track that we now have a HV mode VM active. This blocks secondary 4980 * CPU threads from coming online. 4981 * On POWER9, we only need to do this if the "indep_threads_mode" 4982 * module parameter has been set to N. 4983 */ 4984 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4985 if (!indep_threads_mode && !cpu_has_feature(CPU_FTR_HVMODE)) { 4986 pr_warn("KVM: Ignoring indep_threads_mode=N in nested hypervisor\n"); 4987 kvm->arch.threads_indep = true; 4988 } else { 4989 kvm->arch.threads_indep = indep_threads_mode; 4990 } 4991 } 4992 if (!kvm->arch.threads_indep) 4993 kvm_hv_vm_activated(); 4994 4995 /* 4996 * Initialize smt_mode depending on processor. 4997 * POWER8 and earlier have to use "strict" threading, where 4998 * all vCPUs in a vcore have to run on the same (sub)core, 4999 * whereas on POWER9 the threads can each run a different 5000 * guest. 5001 */ 5002 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5003 kvm->arch.smt_mode = threads_per_subcore; 5004 else 5005 kvm->arch.smt_mode = 1; 5006 kvm->arch.emul_smt_mode = 1; 5007 5008 /* 5009 * Create a debugfs directory for the VM 5010 */ 5011 snprintf(buf, sizeof(buf), "vm%d", current->pid); 5012 kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir); 5013 kvmppc_mmu_debugfs_init(kvm); 5014 if (radix_enabled()) 5015 kvmhv_radix_debugfs_init(kvm); 5016 5017 return 0; 5018 } 5019 5020 static void kvmppc_free_vcores(struct kvm *kvm) 5021 { 5022 long int i; 5023 5024 for (i = 0; i < KVM_MAX_VCORES; ++i) 5025 kfree(kvm->arch.vcores[i]); 5026 kvm->arch.online_vcores = 0; 5027 } 5028 5029 static void kvmppc_core_destroy_vm_hv(struct kvm *kvm) 5030 { 5031 debugfs_remove_recursive(kvm->arch.debugfs_dir); 5032 5033 if (!kvm->arch.threads_indep) 5034 kvm_hv_vm_deactivated(); 5035 5036 kvmppc_free_vcores(kvm); 5037 5038 5039 if (kvm_is_radix(kvm)) 5040 kvmppc_free_radix(kvm); 5041 else 5042 kvmppc_free_hpt(&kvm->arch.hpt); 5043 5044 /* Perform global invalidation and return lpid to the pool */ 5045 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5046 if (nesting_enabled(kvm)) 5047 kvmhv_release_all_nested(kvm); 5048 kvm->arch.process_table = 0; 5049 if (kvm->arch.secure_guest) 5050 uv_svm_terminate(kvm->arch.lpid); 5051 kvmhv_set_ptbl_entry(kvm->arch.lpid, 0, 0); 5052 } 5053 5054 kvmppc_free_lpid(kvm->arch.lpid); 5055 5056 kvmppc_free_pimap(kvm); 5057 } 5058 5059 /* We don't need to emulate any privileged instructions or dcbz */ 5060 static int kvmppc_core_emulate_op_hv(struct kvm_vcpu *vcpu, 5061 unsigned int inst, int *advance) 5062 { 5063 return EMULATE_FAIL; 5064 } 5065 5066 static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn, 5067 ulong spr_val) 5068 { 5069 return EMULATE_FAIL; 5070 } 5071 5072 static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn, 5073 ulong *spr_val) 5074 { 5075 return EMULATE_FAIL; 5076 } 5077 5078 static int kvmppc_core_check_processor_compat_hv(void) 5079 { 5080 if (cpu_has_feature(CPU_FTR_HVMODE) && 5081 cpu_has_feature(CPU_FTR_ARCH_206)) 5082 return 0; 5083 5084 /* POWER9 in radix mode is capable of being a nested hypervisor. */ 5085 if (cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled()) 5086 return 0; 5087 5088 return -EIO; 5089 } 5090 5091 #ifdef CONFIG_KVM_XICS 5092 5093 void kvmppc_free_pimap(struct kvm *kvm) 5094 { 5095 kfree(kvm->arch.pimap); 5096 } 5097 5098 static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void) 5099 { 5100 return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL); 5101 } 5102 5103 static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5104 { 5105 struct irq_desc *desc; 5106 struct kvmppc_irq_map *irq_map; 5107 struct kvmppc_passthru_irqmap *pimap; 5108 struct irq_chip *chip; 5109 int i, rc = 0; 5110 5111 if (!kvm_irq_bypass) 5112 return 1; 5113 5114 desc = irq_to_desc(host_irq); 5115 if (!desc) 5116 return -EIO; 5117 5118 mutex_lock(&kvm->lock); 5119 5120 pimap = kvm->arch.pimap; 5121 if (pimap == NULL) { 5122 /* First call, allocate structure to hold IRQ map */ 5123 pimap = kvmppc_alloc_pimap(); 5124 if (pimap == NULL) { 5125 mutex_unlock(&kvm->lock); 5126 return -ENOMEM; 5127 } 5128 kvm->arch.pimap = pimap; 5129 } 5130 5131 /* 5132 * For now, we only support interrupts for which the EOI operation 5133 * is an OPAL call followed by a write to XIRR, since that's 5134 * what our real-mode EOI code does, or a XIVE interrupt 5135 */ 5136 chip = irq_data_get_irq_chip(&desc->irq_data); 5137 if (!chip || !(is_pnv_opal_msi(chip) || is_xive_irq(chip))) { 5138 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n", 5139 host_irq, guest_gsi); 5140 mutex_unlock(&kvm->lock); 5141 return -ENOENT; 5142 } 5143 5144 /* 5145 * See if we already have an entry for this guest IRQ number. 5146 * If it's mapped to a hardware IRQ number, that's an error, 5147 * otherwise re-use this entry. 5148 */ 5149 for (i = 0; i < pimap->n_mapped; i++) { 5150 if (guest_gsi == pimap->mapped[i].v_hwirq) { 5151 if (pimap->mapped[i].r_hwirq) { 5152 mutex_unlock(&kvm->lock); 5153 return -EINVAL; 5154 } 5155 break; 5156 } 5157 } 5158 5159 if (i == KVMPPC_PIRQ_MAPPED) { 5160 mutex_unlock(&kvm->lock); 5161 return -EAGAIN; /* table is full */ 5162 } 5163 5164 irq_map = &pimap->mapped[i]; 5165 5166 irq_map->v_hwirq = guest_gsi; 5167 irq_map->desc = desc; 5168 5169 /* 5170 * Order the above two stores before the next to serialize with 5171 * the KVM real mode handler. 5172 */ 5173 smp_wmb(); 5174 irq_map->r_hwirq = desc->irq_data.hwirq; 5175 5176 if (i == pimap->n_mapped) 5177 pimap->n_mapped++; 5178 5179 if (xics_on_xive()) 5180 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc); 5181 else 5182 kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq); 5183 if (rc) 5184 irq_map->r_hwirq = 0; 5185 5186 mutex_unlock(&kvm->lock); 5187 5188 return 0; 5189 } 5190 5191 static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 5192 { 5193 struct irq_desc *desc; 5194 struct kvmppc_passthru_irqmap *pimap; 5195 int i, rc = 0; 5196 5197 if (!kvm_irq_bypass) 5198 return 0; 5199 5200 desc = irq_to_desc(host_irq); 5201 if (!desc) 5202 return -EIO; 5203 5204 mutex_lock(&kvm->lock); 5205 if (!kvm->arch.pimap) 5206 goto unlock; 5207 5208 pimap = kvm->arch.pimap; 5209 5210 for (i = 0; i < pimap->n_mapped; i++) { 5211 if (guest_gsi == pimap->mapped[i].v_hwirq) 5212 break; 5213 } 5214 5215 if (i == pimap->n_mapped) { 5216 mutex_unlock(&kvm->lock); 5217 return -ENODEV; 5218 } 5219 5220 if (xics_on_xive()) 5221 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, pimap->mapped[i].desc); 5222 else 5223 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq); 5224 5225 /* invalidate the entry (what do do on error from the above ?) */ 5226 pimap->mapped[i].r_hwirq = 0; 5227 5228 /* 5229 * We don't free this structure even when the count goes to 5230 * zero. The structure is freed when we destroy the VM. 5231 */ 5232 unlock: 5233 mutex_unlock(&kvm->lock); 5234 return rc; 5235 } 5236 5237 static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons, 5238 struct irq_bypass_producer *prod) 5239 { 5240 int ret = 0; 5241 struct kvm_kernel_irqfd *irqfd = 5242 container_of(cons, struct kvm_kernel_irqfd, consumer); 5243 5244 irqfd->producer = prod; 5245 5246 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5247 if (ret) 5248 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n", 5249 prod->irq, irqfd->gsi, ret); 5250 5251 return ret; 5252 } 5253 5254 static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons, 5255 struct irq_bypass_producer *prod) 5256 { 5257 int ret; 5258 struct kvm_kernel_irqfd *irqfd = 5259 container_of(cons, struct kvm_kernel_irqfd, consumer); 5260 5261 irqfd->producer = NULL; 5262 5263 /* 5264 * When producer of consumer is unregistered, we change back to 5265 * default external interrupt handling mode - KVM real mode 5266 * will switch back to host. 5267 */ 5268 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5269 if (ret) 5270 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n", 5271 prod->irq, irqfd->gsi, ret); 5272 } 5273 #endif 5274 5275 static long kvm_arch_vm_ioctl_hv(struct file *filp, 5276 unsigned int ioctl, unsigned long arg) 5277 { 5278 struct kvm *kvm __maybe_unused = filp->private_data; 5279 void __user *argp = (void __user *)arg; 5280 long r; 5281 5282 switch (ioctl) { 5283 5284 case KVM_PPC_ALLOCATE_HTAB: { 5285 u32 htab_order; 5286 5287 /* If we're a nested hypervisor, we currently only support radix */ 5288 if (kvmhv_on_pseries()) { 5289 r = -EOPNOTSUPP; 5290 break; 5291 } 5292 5293 r = -EFAULT; 5294 if (get_user(htab_order, (u32 __user *)argp)) 5295 break; 5296 r = kvmppc_alloc_reset_hpt(kvm, htab_order); 5297 if (r) 5298 break; 5299 r = 0; 5300 break; 5301 } 5302 5303 case KVM_PPC_GET_HTAB_FD: { 5304 struct kvm_get_htab_fd ghf; 5305 5306 r = -EFAULT; 5307 if (copy_from_user(&ghf, argp, sizeof(ghf))) 5308 break; 5309 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf); 5310 break; 5311 } 5312 5313 case KVM_PPC_RESIZE_HPT_PREPARE: { 5314 struct kvm_ppc_resize_hpt rhpt; 5315 5316 r = -EFAULT; 5317 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5318 break; 5319 5320 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt); 5321 break; 5322 } 5323 5324 case KVM_PPC_RESIZE_HPT_COMMIT: { 5325 struct kvm_ppc_resize_hpt rhpt; 5326 5327 r = -EFAULT; 5328 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5329 break; 5330 5331 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt); 5332 break; 5333 } 5334 5335 default: 5336 r = -ENOTTY; 5337 } 5338 5339 return r; 5340 } 5341 5342 /* 5343 * List of hcall numbers to enable by default. 5344 * For compatibility with old userspace, we enable by default 5345 * all hcalls that were implemented before the hcall-enabling 5346 * facility was added. Note this list should not include H_RTAS. 5347 */ 5348 static unsigned int default_hcall_list[] = { 5349 H_REMOVE, 5350 H_ENTER, 5351 H_READ, 5352 H_PROTECT, 5353 H_BULK_REMOVE, 5354 H_GET_TCE, 5355 H_PUT_TCE, 5356 H_SET_DABR, 5357 H_SET_XDABR, 5358 H_CEDE, 5359 H_PROD, 5360 H_CONFER, 5361 H_REGISTER_VPA, 5362 #ifdef CONFIG_KVM_XICS 5363 H_EOI, 5364 H_CPPR, 5365 H_IPI, 5366 H_IPOLL, 5367 H_XIRR, 5368 H_XIRR_X, 5369 #endif 5370 0 5371 }; 5372 5373 static void init_default_hcalls(void) 5374 { 5375 int i; 5376 unsigned int hcall; 5377 5378 for (i = 0; default_hcall_list[i]; ++i) { 5379 hcall = default_hcall_list[i]; 5380 WARN_ON(!kvmppc_hcall_impl_hv(hcall)); 5381 __set_bit(hcall / 4, default_enabled_hcalls); 5382 } 5383 } 5384 5385 static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg) 5386 { 5387 unsigned long lpcr; 5388 int radix; 5389 int err; 5390 5391 /* If not on a POWER9, reject it */ 5392 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5393 return -ENODEV; 5394 5395 /* If any unknown flags set, reject it */ 5396 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE)) 5397 return -EINVAL; 5398 5399 /* GR (guest radix) bit in process_table field must match */ 5400 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX); 5401 if (!!(cfg->process_table & PATB_GR) != radix) 5402 return -EINVAL; 5403 5404 /* Process table size field must be reasonable, i.e. <= 24 */ 5405 if ((cfg->process_table & PRTS_MASK) > 24) 5406 return -EINVAL; 5407 5408 /* We can change a guest to/from radix now, if the host is radix */ 5409 if (radix && !radix_enabled()) 5410 return -EINVAL; 5411 5412 /* If we're a nested hypervisor, we currently only support radix */ 5413 if (kvmhv_on_pseries() && !radix) 5414 return -EINVAL; 5415 5416 mutex_lock(&kvm->arch.mmu_setup_lock); 5417 if (radix != kvm_is_radix(kvm)) { 5418 if (kvm->arch.mmu_ready) { 5419 kvm->arch.mmu_ready = 0; 5420 /* order mmu_ready vs. vcpus_running */ 5421 smp_mb(); 5422 if (atomic_read(&kvm->arch.vcpus_running)) { 5423 kvm->arch.mmu_ready = 1; 5424 err = -EBUSY; 5425 goto out_unlock; 5426 } 5427 } 5428 if (radix) 5429 err = kvmppc_switch_mmu_to_radix(kvm); 5430 else 5431 err = kvmppc_switch_mmu_to_hpt(kvm); 5432 if (err) 5433 goto out_unlock; 5434 } 5435 5436 kvm->arch.process_table = cfg->process_table; 5437 kvmppc_setup_partition_table(kvm); 5438 5439 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0; 5440 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE); 5441 err = 0; 5442 5443 out_unlock: 5444 mutex_unlock(&kvm->arch.mmu_setup_lock); 5445 return err; 5446 } 5447 5448 static int kvmhv_enable_nested(struct kvm *kvm) 5449 { 5450 if (!nested) 5451 return -EPERM; 5452 if (!cpu_has_feature(CPU_FTR_ARCH_300) || no_mixing_hpt_and_radix) 5453 return -ENODEV; 5454 5455 /* kvm == NULL means the caller is testing if the capability exists */ 5456 if (kvm) 5457 kvm->arch.nested_enable = true; 5458 return 0; 5459 } 5460 5461 static int kvmhv_load_from_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5462 int size) 5463 { 5464 int rc = -EINVAL; 5465 5466 if (kvmhv_vcpu_is_radix(vcpu)) { 5467 rc = kvmhv_copy_from_guest_radix(vcpu, *eaddr, ptr, size); 5468 5469 if (rc > 0) 5470 rc = -EINVAL; 5471 } 5472 5473 /* For now quadrants are the only way to access nested guest memory */ 5474 if (rc && vcpu->arch.nested) 5475 rc = -EAGAIN; 5476 5477 return rc; 5478 } 5479 5480 static int kvmhv_store_to_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5481 int size) 5482 { 5483 int rc = -EINVAL; 5484 5485 if (kvmhv_vcpu_is_radix(vcpu)) { 5486 rc = kvmhv_copy_to_guest_radix(vcpu, *eaddr, ptr, size); 5487 5488 if (rc > 0) 5489 rc = -EINVAL; 5490 } 5491 5492 /* For now quadrants are the only way to access nested guest memory */ 5493 if (rc && vcpu->arch.nested) 5494 rc = -EAGAIN; 5495 5496 return rc; 5497 } 5498 5499 static void unpin_vpa_reset(struct kvm *kvm, struct kvmppc_vpa *vpa) 5500 { 5501 unpin_vpa(kvm, vpa); 5502 vpa->gpa = 0; 5503 vpa->pinned_addr = NULL; 5504 vpa->dirty = false; 5505 vpa->update_pending = 0; 5506 } 5507 5508 /* 5509 * Enable a guest to become a secure VM, or test whether 5510 * that could be enabled. 5511 * Called when the KVM_CAP_PPC_SECURE_GUEST capability is 5512 * tested (kvm == NULL) or enabled (kvm != NULL). 5513 */ 5514 static int kvmhv_enable_svm(struct kvm *kvm) 5515 { 5516 if (!kvmppc_uvmem_available()) 5517 return -EINVAL; 5518 if (kvm) 5519 kvm->arch.svm_enabled = 1; 5520 return 0; 5521 } 5522 5523 /* 5524 * IOCTL handler to turn off secure mode of guest 5525 * 5526 * - Release all device pages 5527 * - Issue ucall to terminate the guest on the UV side 5528 * - Unpin the VPA pages. 5529 * - Reinit the partition scoped page tables 5530 */ 5531 static int kvmhv_svm_off(struct kvm *kvm) 5532 { 5533 struct kvm_vcpu *vcpu; 5534 int mmu_was_ready; 5535 int srcu_idx; 5536 int ret = 0; 5537 int i; 5538 5539 if (!(kvm->arch.secure_guest & KVMPPC_SECURE_INIT_START)) 5540 return ret; 5541 5542 mutex_lock(&kvm->arch.mmu_setup_lock); 5543 mmu_was_ready = kvm->arch.mmu_ready; 5544 if (kvm->arch.mmu_ready) { 5545 kvm->arch.mmu_ready = 0; 5546 /* order mmu_ready vs. vcpus_running */ 5547 smp_mb(); 5548 if (atomic_read(&kvm->arch.vcpus_running)) { 5549 kvm->arch.mmu_ready = 1; 5550 ret = -EBUSY; 5551 goto out; 5552 } 5553 } 5554 5555 srcu_idx = srcu_read_lock(&kvm->srcu); 5556 for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) { 5557 struct kvm_memory_slot *memslot; 5558 struct kvm_memslots *slots = __kvm_memslots(kvm, i); 5559 5560 if (!slots) 5561 continue; 5562 5563 kvm_for_each_memslot(memslot, slots) { 5564 kvmppc_uvmem_drop_pages(memslot, kvm, true); 5565 uv_unregister_mem_slot(kvm->arch.lpid, memslot->id); 5566 } 5567 } 5568 srcu_read_unlock(&kvm->srcu, srcu_idx); 5569 5570 ret = uv_svm_terminate(kvm->arch.lpid); 5571 if (ret != U_SUCCESS) { 5572 ret = -EINVAL; 5573 goto out; 5574 } 5575 5576 /* 5577 * When secure guest is reset, all the guest pages are sent 5578 * to UV via UV_PAGE_IN before the non-boot vcpus get a 5579 * chance to run and unpin their VPA pages. Unpinning of all 5580 * VPA pages is done here explicitly so that VPA pages 5581 * can be migrated to the secure side. 5582 * 5583 * This is required to for the secure SMP guest to reboot 5584 * correctly. 5585 */ 5586 kvm_for_each_vcpu(i, vcpu, kvm) { 5587 spin_lock(&vcpu->arch.vpa_update_lock); 5588 unpin_vpa_reset(kvm, &vcpu->arch.dtl); 5589 unpin_vpa_reset(kvm, &vcpu->arch.slb_shadow); 5590 unpin_vpa_reset(kvm, &vcpu->arch.vpa); 5591 spin_unlock(&vcpu->arch.vpa_update_lock); 5592 } 5593 5594 kvmppc_setup_partition_table(kvm); 5595 kvm->arch.secure_guest = 0; 5596 kvm->arch.mmu_ready = mmu_was_ready; 5597 out: 5598 mutex_unlock(&kvm->arch.mmu_setup_lock); 5599 return ret; 5600 } 5601 5602 static struct kvmppc_ops kvm_ops_hv = { 5603 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv, 5604 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv, 5605 .get_one_reg = kvmppc_get_one_reg_hv, 5606 .set_one_reg = kvmppc_set_one_reg_hv, 5607 .vcpu_load = kvmppc_core_vcpu_load_hv, 5608 .vcpu_put = kvmppc_core_vcpu_put_hv, 5609 .inject_interrupt = kvmppc_inject_interrupt_hv, 5610 .set_msr = kvmppc_set_msr_hv, 5611 .vcpu_run = kvmppc_vcpu_run_hv, 5612 .vcpu_create = kvmppc_core_vcpu_create_hv, 5613 .vcpu_free = kvmppc_core_vcpu_free_hv, 5614 .check_requests = kvmppc_core_check_requests_hv, 5615 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv, 5616 .flush_memslot = kvmppc_core_flush_memslot_hv, 5617 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv, 5618 .commit_memory_region = kvmppc_core_commit_memory_region_hv, 5619 .unmap_hva_range = kvm_unmap_hva_range_hv, 5620 .age_hva = kvm_age_hva_hv, 5621 .test_age_hva = kvm_test_age_hva_hv, 5622 .set_spte_hva = kvm_set_spte_hva_hv, 5623 .free_memslot = kvmppc_core_free_memslot_hv, 5624 .init_vm = kvmppc_core_init_vm_hv, 5625 .destroy_vm = kvmppc_core_destroy_vm_hv, 5626 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv, 5627 .emulate_op = kvmppc_core_emulate_op_hv, 5628 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv, 5629 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv, 5630 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv, 5631 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv, 5632 .hcall_implemented = kvmppc_hcall_impl_hv, 5633 #ifdef CONFIG_KVM_XICS 5634 .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv, 5635 .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv, 5636 #endif 5637 .configure_mmu = kvmhv_configure_mmu, 5638 .get_rmmu_info = kvmhv_get_rmmu_info, 5639 .set_smt_mode = kvmhv_set_smt_mode, 5640 .enable_nested = kvmhv_enable_nested, 5641 .load_from_eaddr = kvmhv_load_from_eaddr, 5642 .store_to_eaddr = kvmhv_store_to_eaddr, 5643 .enable_svm = kvmhv_enable_svm, 5644 .svm_off = kvmhv_svm_off, 5645 }; 5646 5647 static int kvm_init_subcore_bitmap(void) 5648 { 5649 int i, j; 5650 int nr_cores = cpu_nr_cores(); 5651 struct sibling_subcore_state *sibling_subcore_state; 5652 5653 for (i = 0; i < nr_cores; i++) { 5654 int first_cpu = i * threads_per_core; 5655 int node = cpu_to_node(first_cpu); 5656 5657 /* Ignore if it is already allocated. */ 5658 if (paca_ptrs[first_cpu]->sibling_subcore_state) 5659 continue; 5660 5661 sibling_subcore_state = 5662 kzalloc_node(sizeof(struct sibling_subcore_state), 5663 GFP_KERNEL, node); 5664 if (!sibling_subcore_state) 5665 return -ENOMEM; 5666 5667 5668 for (j = 0; j < threads_per_core; j++) { 5669 int cpu = first_cpu + j; 5670 5671 paca_ptrs[cpu]->sibling_subcore_state = 5672 sibling_subcore_state; 5673 } 5674 } 5675 return 0; 5676 } 5677 5678 static int kvmppc_radix_possible(void) 5679 { 5680 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled(); 5681 } 5682 5683 static int kvmppc_book3s_init_hv(void) 5684 { 5685 int r; 5686 5687 if (!tlbie_capable) { 5688 pr_err("KVM-HV: Host does not support TLBIE\n"); 5689 return -ENODEV; 5690 } 5691 5692 /* 5693 * FIXME!! Do we need to check on all cpus ? 5694 */ 5695 r = kvmppc_core_check_processor_compat_hv(); 5696 if (r < 0) 5697 return -ENODEV; 5698 5699 r = kvmhv_nested_init(); 5700 if (r) 5701 return r; 5702 5703 r = kvm_init_subcore_bitmap(); 5704 if (r) 5705 return r; 5706 5707 /* 5708 * We need a way of accessing the XICS interrupt controller, 5709 * either directly, via paca_ptrs[cpu]->kvm_hstate.xics_phys, or 5710 * indirectly, via OPAL. 5711 */ 5712 #ifdef CONFIG_SMP 5713 if (!xics_on_xive() && !kvmhv_on_pseries() && 5714 !local_paca->kvm_hstate.xics_phys) { 5715 struct device_node *np; 5716 5717 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc"); 5718 if (!np) { 5719 pr_err("KVM-HV: Cannot determine method for accessing XICS\n"); 5720 return -ENODEV; 5721 } 5722 /* presence of intc confirmed - node can be dropped again */ 5723 of_node_put(np); 5724 } 5725 #endif 5726 5727 kvm_ops_hv.owner = THIS_MODULE; 5728 kvmppc_hv_ops = &kvm_ops_hv; 5729 5730 init_default_hcalls(); 5731 5732 init_vcore_lists(); 5733 5734 r = kvmppc_mmu_hv_init(); 5735 if (r) 5736 return r; 5737 5738 if (kvmppc_radix_possible()) 5739 r = kvmppc_radix_init(); 5740 5741 /* 5742 * POWER9 chips before version 2.02 can't have some threads in 5743 * HPT mode and some in radix mode on the same core. 5744 */ 5745 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5746 unsigned int pvr = mfspr(SPRN_PVR); 5747 if ((pvr >> 16) == PVR_POWER9 && 5748 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) || 5749 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101))) 5750 no_mixing_hpt_and_radix = true; 5751 } 5752 5753 r = kvmppc_uvmem_init(); 5754 if (r < 0) 5755 pr_err("KVM-HV: kvmppc_uvmem_init failed %d\n", r); 5756 5757 return r; 5758 } 5759 5760 static void kvmppc_book3s_exit_hv(void) 5761 { 5762 kvmppc_uvmem_free(); 5763 kvmppc_free_host_rm_ops(); 5764 if (kvmppc_radix_possible()) 5765 kvmppc_radix_exit(); 5766 kvmppc_hv_ops = NULL; 5767 kvmhv_nested_exit(); 5768 } 5769 5770 module_init(kvmppc_book3s_init_hv); 5771 module_exit(kvmppc_book3s_exit_hv); 5772 MODULE_LICENSE("GPL"); 5773 MODULE_ALIAS_MISCDEV(KVM_MINOR); 5774 MODULE_ALIAS("devname:kvm"); 5775