xref: /openbmc/linux/arch/powerpc/kvm/book3s_hv.c (revision 2645d8d0)
1 /*
2  * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
3  * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved.
4  *
5  * Authors:
6  *    Paul Mackerras <paulus@au1.ibm.com>
7  *    Alexander Graf <agraf@suse.de>
8  *    Kevin Wolf <mail@kevin-wolf.de>
9  *
10  * Description: KVM functions specific to running on Book 3S
11  * processors in hypervisor mode (specifically POWER7 and later).
12  *
13  * This file is derived from arch/powerpc/kvm/book3s.c,
14  * by Alexander Graf <agraf@suse.de>.
15  *
16  * This program is free software; you can redistribute it and/or modify
17  * it under the terms of the GNU General Public License, version 2, as
18  * published by the Free Software Foundation.
19  */
20 
21 #include <linux/kvm_host.h>
22 #include <linux/kernel.h>
23 #include <linux/err.h>
24 #include <linux/slab.h>
25 #include <linux/preempt.h>
26 #include <linux/sched/signal.h>
27 #include <linux/sched/stat.h>
28 #include <linux/delay.h>
29 #include <linux/export.h>
30 #include <linux/fs.h>
31 #include <linux/anon_inodes.h>
32 #include <linux/cpu.h>
33 #include <linux/cpumask.h>
34 #include <linux/spinlock.h>
35 #include <linux/page-flags.h>
36 #include <linux/srcu.h>
37 #include <linux/miscdevice.h>
38 #include <linux/debugfs.h>
39 #include <linux/gfp.h>
40 #include <linux/vmalloc.h>
41 #include <linux/highmem.h>
42 #include <linux/hugetlb.h>
43 #include <linux/kvm_irqfd.h>
44 #include <linux/irqbypass.h>
45 #include <linux/module.h>
46 #include <linux/compiler.h>
47 #include <linux/of.h>
48 
49 #include <asm/ftrace.h>
50 #include <asm/reg.h>
51 #include <asm/ppc-opcode.h>
52 #include <asm/asm-prototypes.h>
53 #include <asm/archrandom.h>
54 #include <asm/debug.h>
55 #include <asm/disassemble.h>
56 #include <asm/cputable.h>
57 #include <asm/cacheflush.h>
58 #include <linux/uaccess.h>
59 #include <asm/io.h>
60 #include <asm/kvm_ppc.h>
61 #include <asm/kvm_book3s.h>
62 #include <asm/mmu_context.h>
63 #include <asm/lppaca.h>
64 #include <asm/processor.h>
65 #include <asm/cputhreads.h>
66 #include <asm/page.h>
67 #include <asm/hvcall.h>
68 #include <asm/switch_to.h>
69 #include <asm/smp.h>
70 #include <asm/dbell.h>
71 #include <asm/hmi.h>
72 #include <asm/pnv-pci.h>
73 #include <asm/mmu.h>
74 #include <asm/opal.h>
75 #include <asm/xics.h>
76 #include <asm/xive.h>
77 
78 #include "book3s.h"
79 
80 #define CREATE_TRACE_POINTS
81 #include "trace_hv.h"
82 
83 /* #define EXIT_DEBUG */
84 /* #define EXIT_DEBUG_SIMPLE */
85 /* #define EXIT_DEBUG_INT */
86 
87 /* Used to indicate that a guest page fault needs to be handled */
88 #define RESUME_PAGE_FAULT	(RESUME_GUEST | RESUME_FLAG_ARCH1)
89 /* Used to indicate that a guest passthrough interrupt needs to be handled */
90 #define RESUME_PASSTHROUGH	(RESUME_GUEST | RESUME_FLAG_ARCH2)
91 
92 /* Used as a "null" value for timebase values */
93 #define TB_NIL	(~(u64)0)
94 
95 static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1);
96 
97 static int dynamic_mt_modes = 6;
98 module_param(dynamic_mt_modes, int, 0644);
99 MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)");
100 static int target_smt_mode;
101 module_param(target_smt_mode, int, 0644);
102 MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)");
103 
104 static bool indep_threads_mode = true;
105 module_param(indep_threads_mode, bool, S_IRUGO | S_IWUSR);
106 MODULE_PARM_DESC(indep_threads_mode, "Independent-threads mode (only on POWER9)");
107 
108 static bool one_vm_per_core;
109 module_param(one_vm_per_core, bool, S_IRUGO | S_IWUSR);
110 MODULE_PARM_DESC(one_vm_per_core, "Only run vCPUs from the same VM on a core (requires indep_threads_mode=N)");
111 
112 #ifdef CONFIG_KVM_XICS
113 static struct kernel_param_ops module_param_ops = {
114 	.set = param_set_int,
115 	.get = param_get_int,
116 };
117 
118 module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644);
119 MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization");
120 
121 module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644);
122 MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core");
123 #endif
124 
125 /* If set, guests are allowed to create and control nested guests */
126 static bool nested = true;
127 module_param(nested, bool, S_IRUGO | S_IWUSR);
128 MODULE_PARM_DESC(nested, "Enable nested virtualization (only on POWER9)");
129 
130 static inline bool nesting_enabled(struct kvm *kvm)
131 {
132 	return kvm->arch.nested_enable && kvm_is_radix(kvm);
133 }
134 
135 /* If set, the threads on each CPU core have to be in the same MMU mode */
136 static bool no_mixing_hpt_and_radix;
137 
138 static void kvmppc_end_cede(struct kvm_vcpu *vcpu);
139 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu);
140 
141 /*
142  * RWMR values for POWER8.  These control the rate at which PURR
143  * and SPURR count and should be set according to the number of
144  * online threads in the vcore being run.
145  */
146 #define RWMR_RPA_P8_1THREAD	0x164520C62609AECAUL
147 #define RWMR_RPA_P8_2THREAD	0x7FFF2908450D8DA9UL
148 #define RWMR_RPA_P8_3THREAD	0x164520C62609AECAUL
149 #define RWMR_RPA_P8_4THREAD	0x199A421245058DA9UL
150 #define RWMR_RPA_P8_5THREAD	0x164520C62609AECAUL
151 #define RWMR_RPA_P8_6THREAD	0x164520C62609AECAUL
152 #define RWMR_RPA_P8_7THREAD	0x164520C62609AECAUL
153 #define RWMR_RPA_P8_8THREAD	0x164520C62609AECAUL
154 
155 static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = {
156 	RWMR_RPA_P8_1THREAD,
157 	RWMR_RPA_P8_1THREAD,
158 	RWMR_RPA_P8_2THREAD,
159 	RWMR_RPA_P8_3THREAD,
160 	RWMR_RPA_P8_4THREAD,
161 	RWMR_RPA_P8_5THREAD,
162 	RWMR_RPA_P8_6THREAD,
163 	RWMR_RPA_P8_7THREAD,
164 	RWMR_RPA_P8_8THREAD,
165 };
166 
167 static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc,
168 		int *ip)
169 {
170 	int i = *ip;
171 	struct kvm_vcpu *vcpu;
172 
173 	while (++i < MAX_SMT_THREADS) {
174 		vcpu = READ_ONCE(vc->runnable_threads[i]);
175 		if (vcpu) {
176 			*ip = i;
177 			return vcpu;
178 		}
179 	}
180 	return NULL;
181 }
182 
183 /* Used to traverse the list of runnable threads for a given vcore */
184 #define for_each_runnable_thread(i, vcpu, vc) \
185 	for (i = -1; (vcpu = next_runnable_thread(vc, &i)); )
186 
187 static bool kvmppc_ipi_thread(int cpu)
188 {
189 	unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
190 
191 	/* If we're a nested hypervisor, fall back to ordinary IPIs for now */
192 	if (kvmhv_on_pseries())
193 		return false;
194 
195 	/* On POWER9 we can use msgsnd to IPI any cpu */
196 	if (cpu_has_feature(CPU_FTR_ARCH_300)) {
197 		msg |= get_hard_smp_processor_id(cpu);
198 		smp_mb();
199 		__asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
200 		return true;
201 	}
202 
203 	/* On POWER8 for IPIs to threads in the same core, use msgsnd */
204 	if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
205 		preempt_disable();
206 		if (cpu_first_thread_sibling(cpu) ==
207 		    cpu_first_thread_sibling(smp_processor_id())) {
208 			msg |= cpu_thread_in_core(cpu);
209 			smp_mb();
210 			__asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg));
211 			preempt_enable();
212 			return true;
213 		}
214 		preempt_enable();
215 	}
216 
217 #if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP)
218 	if (cpu >= 0 && cpu < nr_cpu_ids) {
219 		if (paca_ptrs[cpu]->kvm_hstate.xics_phys) {
220 			xics_wake_cpu(cpu);
221 			return true;
222 		}
223 		opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY);
224 		return true;
225 	}
226 #endif
227 
228 	return false;
229 }
230 
231 static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu)
232 {
233 	int cpu;
234 	struct swait_queue_head *wqp;
235 
236 	wqp = kvm_arch_vcpu_wq(vcpu);
237 	if (swq_has_sleeper(wqp)) {
238 		swake_up_one(wqp);
239 		++vcpu->stat.halt_wakeup;
240 	}
241 
242 	cpu = READ_ONCE(vcpu->arch.thread_cpu);
243 	if (cpu >= 0 && kvmppc_ipi_thread(cpu))
244 		return;
245 
246 	/* CPU points to the first thread of the core */
247 	cpu = vcpu->cpu;
248 	if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu))
249 		smp_send_reschedule(cpu);
250 }
251 
252 /*
253  * We use the vcpu_load/put functions to measure stolen time.
254  * Stolen time is counted as time when either the vcpu is able to
255  * run as part of a virtual core, but the task running the vcore
256  * is preempted or sleeping, or when the vcpu needs something done
257  * in the kernel by the task running the vcpu, but that task is
258  * preempted or sleeping.  Those two things have to be counted
259  * separately, since one of the vcpu tasks will take on the job
260  * of running the core, and the other vcpu tasks in the vcore will
261  * sleep waiting for it to do that, but that sleep shouldn't count
262  * as stolen time.
263  *
264  * Hence we accumulate stolen time when the vcpu can run as part of
265  * a vcore using vc->stolen_tb, and the stolen time when the vcpu
266  * needs its task to do other things in the kernel (for example,
267  * service a page fault) in busy_stolen.  We don't accumulate
268  * stolen time for a vcore when it is inactive, or for a vcpu
269  * when it is in state RUNNING or NOTREADY.  NOTREADY is a bit of
270  * a misnomer; it means that the vcpu task is not executing in
271  * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in
272  * the kernel.  We don't have any way of dividing up that time
273  * between time that the vcpu is genuinely stopped, time that
274  * the task is actively working on behalf of the vcpu, and time
275  * that the task is preempted, so we don't count any of it as
276  * stolen.
277  *
278  * Updates to busy_stolen are protected by arch.tbacct_lock;
279  * updates to vc->stolen_tb are protected by the vcore->stoltb_lock
280  * lock.  The stolen times are measured in units of timebase ticks.
281  * (Note that the != TB_NIL checks below are purely defensive;
282  * they should never fail.)
283  */
284 
285 static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc)
286 {
287 	unsigned long flags;
288 
289 	spin_lock_irqsave(&vc->stoltb_lock, flags);
290 	vc->preempt_tb = mftb();
291 	spin_unlock_irqrestore(&vc->stoltb_lock, flags);
292 }
293 
294 static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc)
295 {
296 	unsigned long flags;
297 
298 	spin_lock_irqsave(&vc->stoltb_lock, flags);
299 	if (vc->preempt_tb != TB_NIL) {
300 		vc->stolen_tb += mftb() - vc->preempt_tb;
301 		vc->preempt_tb = TB_NIL;
302 	}
303 	spin_unlock_irqrestore(&vc->stoltb_lock, flags);
304 }
305 
306 static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu)
307 {
308 	struct kvmppc_vcore *vc = vcpu->arch.vcore;
309 	unsigned long flags;
310 
311 	/*
312 	 * We can test vc->runner without taking the vcore lock,
313 	 * because only this task ever sets vc->runner to this
314 	 * vcpu, and once it is set to this vcpu, only this task
315 	 * ever sets it to NULL.
316 	 */
317 	if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING)
318 		kvmppc_core_end_stolen(vc);
319 
320 	spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
321 	if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST &&
322 	    vcpu->arch.busy_preempt != TB_NIL) {
323 		vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt;
324 		vcpu->arch.busy_preempt = TB_NIL;
325 	}
326 	spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
327 }
328 
329 static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu)
330 {
331 	struct kvmppc_vcore *vc = vcpu->arch.vcore;
332 	unsigned long flags;
333 
334 	if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING)
335 		kvmppc_core_start_stolen(vc);
336 
337 	spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
338 	if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST)
339 		vcpu->arch.busy_preempt = mftb();
340 	spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
341 }
342 
343 static void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr)
344 {
345 	/*
346 	 * Check for illegal transactional state bit combination
347 	 * and if we find it, force the TS field to a safe state.
348 	 */
349 	if ((msr & MSR_TS_MASK) == MSR_TS_MASK)
350 		msr &= ~MSR_TS_MASK;
351 	vcpu->arch.shregs.msr = msr;
352 	kvmppc_end_cede(vcpu);
353 }
354 
355 static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr)
356 {
357 	vcpu->arch.pvr = pvr;
358 }
359 
360 /* Dummy value used in computing PCR value below */
361 #define PCR_ARCH_300	(PCR_ARCH_207 << 1)
362 
363 static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat)
364 {
365 	unsigned long host_pcr_bit = 0, guest_pcr_bit = 0;
366 	struct kvmppc_vcore *vc = vcpu->arch.vcore;
367 
368 	/* We can (emulate) our own architecture version and anything older */
369 	if (cpu_has_feature(CPU_FTR_ARCH_300))
370 		host_pcr_bit = PCR_ARCH_300;
371 	else if (cpu_has_feature(CPU_FTR_ARCH_207S))
372 		host_pcr_bit = PCR_ARCH_207;
373 	else if (cpu_has_feature(CPU_FTR_ARCH_206))
374 		host_pcr_bit = PCR_ARCH_206;
375 	else
376 		host_pcr_bit = PCR_ARCH_205;
377 
378 	/* Determine lowest PCR bit needed to run guest in given PVR level */
379 	guest_pcr_bit = host_pcr_bit;
380 	if (arch_compat) {
381 		switch (arch_compat) {
382 		case PVR_ARCH_205:
383 			guest_pcr_bit = PCR_ARCH_205;
384 			break;
385 		case PVR_ARCH_206:
386 		case PVR_ARCH_206p:
387 			guest_pcr_bit = PCR_ARCH_206;
388 			break;
389 		case PVR_ARCH_207:
390 			guest_pcr_bit = PCR_ARCH_207;
391 			break;
392 		case PVR_ARCH_300:
393 			guest_pcr_bit = PCR_ARCH_300;
394 			break;
395 		default:
396 			return -EINVAL;
397 		}
398 	}
399 
400 	/* Check requested PCR bits don't exceed our capabilities */
401 	if (guest_pcr_bit > host_pcr_bit)
402 		return -EINVAL;
403 
404 	spin_lock(&vc->lock);
405 	vc->arch_compat = arch_compat;
406 	/* Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit */
407 	vc->pcr = host_pcr_bit - guest_pcr_bit;
408 	spin_unlock(&vc->lock);
409 
410 	return 0;
411 }
412 
413 static void kvmppc_dump_regs(struct kvm_vcpu *vcpu)
414 {
415 	int r;
416 
417 	pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id);
418 	pr_err("pc  = %.16lx  msr = %.16llx  trap = %x\n",
419 	       vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap);
420 	for (r = 0; r < 16; ++r)
421 		pr_err("r%2d = %.16lx  r%d = %.16lx\n",
422 		       r, kvmppc_get_gpr(vcpu, r),
423 		       r+16, kvmppc_get_gpr(vcpu, r+16));
424 	pr_err("ctr = %.16lx  lr  = %.16lx\n",
425 	       vcpu->arch.regs.ctr, vcpu->arch.regs.link);
426 	pr_err("srr0 = %.16llx srr1 = %.16llx\n",
427 	       vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1);
428 	pr_err("sprg0 = %.16llx sprg1 = %.16llx\n",
429 	       vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1);
430 	pr_err("sprg2 = %.16llx sprg3 = %.16llx\n",
431 	       vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3);
432 	pr_err("cr = %.8lx  xer = %.16lx  dsisr = %.8x\n",
433 	       vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr);
434 	pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar);
435 	pr_err("fault dar = %.16lx dsisr = %.8x\n",
436 	       vcpu->arch.fault_dar, vcpu->arch.fault_dsisr);
437 	pr_err("SLB (%d entries):\n", vcpu->arch.slb_max);
438 	for (r = 0; r < vcpu->arch.slb_max; ++r)
439 		pr_err("  ESID = %.16llx VSID = %.16llx\n",
440 		       vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv);
441 	pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n",
442 	       vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1,
443 	       vcpu->arch.last_inst);
444 }
445 
446 static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id)
447 {
448 	struct kvm_vcpu *ret;
449 
450 	mutex_lock(&kvm->lock);
451 	ret = kvm_get_vcpu_by_id(kvm, id);
452 	mutex_unlock(&kvm->lock);
453 	return ret;
454 }
455 
456 static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa)
457 {
458 	vpa->__old_status |= LPPACA_OLD_SHARED_PROC;
459 	vpa->yield_count = cpu_to_be32(1);
460 }
461 
462 static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v,
463 		   unsigned long addr, unsigned long len)
464 {
465 	/* check address is cacheline aligned */
466 	if (addr & (L1_CACHE_BYTES - 1))
467 		return -EINVAL;
468 	spin_lock(&vcpu->arch.vpa_update_lock);
469 	if (v->next_gpa != addr || v->len != len) {
470 		v->next_gpa = addr;
471 		v->len = addr ? len : 0;
472 		v->update_pending = 1;
473 	}
474 	spin_unlock(&vcpu->arch.vpa_update_lock);
475 	return 0;
476 }
477 
478 /* Length for a per-processor buffer is passed in at offset 4 in the buffer */
479 struct reg_vpa {
480 	u32 dummy;
481 	union {
482 		__be16 hword;
483 		__be32 word;
484 	} length;
485 };
486 
487 static int vpa_is_registered(struct kvmppc_vpa *vpap)
488 {
489 	if (vpap->update_pending)
490 		return vpap->next_gpa != 0;
491 	return vpap->pinned_addr != NULL;
492 }
493 
494 static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu,
495 				       unsigned long flags,
496 				       unsigned long vcpuid, unsigned long vpa)
497 {
498 	struct kvm *kvm = vcpu->kvm;
499 	unsigned long len, nb;
500 	void *va;
501 	struct kvm_vcpu *tvcpu;
502 	int err;
503 	int subfunc;
504 	struct kvmppc_vpa *vpap;
505 
506 	tvcpu = kvmppc_find_vcpu(kvm, vcpuid);
507 	if (!tvcpu)
508 		return H_PARAMETER;
509 
510 	subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK;
511 	if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL ||
512 	    subfunc == H_VPA_REG_SLB) {
513 		/* Registering new area - address must be cache-line aligned */
514 		if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa)
515 			return H_PARAMETER;
516 
517 		/* convert logical addr to kernel addr and read length */
518 		va = kvmppc_pin_guest_page(kvm, vpa, &nb);
519 		if (va == NULL)
520 			return H_PARAMETER;
521 		if (subfunc == H_VPA_REG_VPA)
522 			len = be16_to_cpu(((struct reg_vpa *)va)->length.hword);
523 		else
524 			len = be32_to_cpu(((struct reg_vpa *)va)->length.word);
525 		kvmppc_unpin_guest_page(kvm, va, vpa, false);
526 
527 		/* Check length */
528 		if (len > nb || len < sizeof(struct reg_vpa))
529 			return H_PARAMETER;
530 	} else {
531 		vpa = 0;
532 		len = 0;
533 	}
534 
535 	err = H_PARAMETER;
536 	vpap = NULL;
537 	spin_lock(&tvcpu->arch.vpa_update_lock);
538 
539 	switch (subfunc) {
540 	case H_VPA_REG_VPA:		/* register VPA */
541 		/*
542 		 * The size of our lppaca is 1kB because of the way we align
543 		 * it for the guest to avoid crossing a 4kB boundary. We only
544 		 * use 640 bytes of the structure though, so we should accept
545 		 * clients that set a size of 640.
546 		 */
547 		BUILD_BUG_ON(sizeof(struct lppaca) != 640);
548 		if (len < sizeof(struct lppaca))
549 			break;
550 		vpap = &tvcpu->arch.vpa;
551 		err = 0;
552 		break;
553 
554 	case H_VPA_REG_DTL:		/* register DTL */
555 		if (len < sizeof(struct dtl_entry))
556 			break;
557 		len -= len % sizeof(struct dtl_entry);
558 
559 		/* Check that they have previously registered a VPA */
560 		err = H_RESOURCE;
561 		if (!vpa_is_registered(&tvcpu->arch.vpa))
562 			break;
563 
564 		vpap = &tvcpu->arch.dtl;
565 		err = 0;
566 		break;
567 
568 	case H_VPA_REG_SLB:		/* register SLB shadow buffer */
569 		/* Check that they have previously registered a VPA */
570 		err = H_RESOURCE;
571 		if (!vpa_is_registered(&tvcpu->arch.vpa))
572 			break;
573 
574 		vpap = &tvcpu->arch.slb_shadow;
575 		err = 0;
576 		break;
577 
578 	case H_VPA_DEREG_VPA:		/* deregister VPA */
579 		/* Check they don't still have a DTL or SLB buf registered */
580 		err = H_RESOURCE;
581 		if (vpa_is_registered(&tvcpu->arch.dtl) ||
582 		    vpa_is_registered(&tvcpu->arch.slb_shadow))
583 			break;
584 
585 		vpap = &tvcpu->arch.vpa;
586 		err = 0;
587 		break;
588 
589 	case H_VPA_DEREG_DTL:		/* deregister DTL */
590 		vpap = &tvcpu->arch.dtl;
591 		err = 0;
592 		break;
593 
594 	case H_VPA_DEREG_SLB:		/* deregister SLB shadow buffer */
595 		vpap = &tvcpu->arch.slb_shadow;
596 		err = 0;
597 		break;
598 	}
599 
600 	if (vpap) {
601 		vpap->next_gpa = vpa;
602 		vpap->len = len;
603 		vpap->update_pending = 1;
604 	}
605 
606 	spin_unlock(&tvcpu->arch.vpa_update_lock);
607 
608 	return err;
609 }
610 
611 static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap)
612 {
613 	struct kvm *kvm = vcpu->kvm;
614 	void *va;
615 	unsigned long nb;
616 	unsigned long gpa;
617 
618 	/*
619 	 * We need to pin the page pointed to by vpap->next_gpa,
620 	 * but we can't call kvmppc_pin_guest_page under the lock
621 	 * as it does get_user_pages() and down_read().  So we
622 	 * have to drop the lock, pin the page, then get the lock
623 	 * again and check that a new area didn't get registered
624 	 * in the meantime.
625 	 */
626 	for (;;) {
627 		gpa = vpap->next_gpa;
628 		spin_unlock(&vcpu->arch.vpa_update_lock);
629 		va = NULL;
630 		nb = 0;
631 		if (gpa)
632 			va = kvmppc_pin_guest_page(kvm, gpa, &nb);
633 		spin_lock(&vcpu->arch.vpa_update_lock);
634 		if (gpa == vpap->next_gpa)
635 			break;
636 		/* sigh... unpin that one and try again */
637 		if (va)
638 			kvmppc_unpin_guest_page(kvm, va, gpa, false);
639 	}
640 
641 	vpap->update_pending = 0;
642 	if (va && nb < vpap->len) {
643 		/*
644 		 * If it's now too short, it must be that userspace
645 		 * has changed the mappings underlying guest memory,
646 		 * so unregister the region.
647 		 */
648 		kvmppc_unpin_guest_page(kvm, va, gpa, false);
649 		va = NULL;
650 	}
651 	if (vpap->pinned_addr)
652 		kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa,
653 					vpap->dirty);
654 	vpap->gpa = gpa;
655 	vpap->pinned_addr = va;
656 	vpap->dirty = false;
657 	if (va)
658 		vpap->pinned_end = va + vpap->len;
659 }
660 
661 static void kvmppc_update_vpas(struct kvm_vcpu *vcpu)
662 {
663 	if (!(vcpu->arch.vpa.update_pending ||
664 	      vcpu->arch.slb_shadow.update_pending ||
665 	      vcpu->arch.dtl.update_pending))
666 		return;
667 
668 	spin_lock(&vcpu->arch.vpa_update_lock);
669 	if (vcpu->arch.vpa.update_pending) {
670 		kvmppc_update_vpa(vcpu, &vcpu->arch.vpa);
671 		if (vcpu->arch.vpa.pinned_addr)
672 			init_vpa(vcpu, vcpu->arch.vpa.pinned_addr);
673 	}
674 	if (vcpu->arch.dtl.update_pending) {
675 		kvmppc_update_vpa(vcpu, &vcpu->arch.dtl);
676 		vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr;
677 		vcpu->arch.dtl_index = 0;
678 	}
679 	if (vcpu->arch.slb_shadow.update_pending)
680 		kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow);
681 	spin_unlock(&vcpu->arch.vpa_update_lock);
682 }
683 
684 /*
685  * Return the accumulated stolen time for the vcore up until `now'.
686  * The caller should hold the vcore lock.
687  */
688 static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now)
689 {
690 	u64 p;
691 	unsigned long flags;
692 
693 	spin_lock_irqsave(&vc->stoltb_lock, flags);
694 	p = vc->stolen_tb;
695 	if (vc->vcore_state != VCORE_INACTIVE &&
696 	    vc->preempt_tb != TB_NIL)
697 		p += now - vc->preempt_tb;
698 	spin_unlock_irqrestore(&vc->stoltb_lock, flags);
699 	return p;
700 }
701 
702 static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu,
703 				    struct kvmppc_vcore *vc)
704 {
705 	struct dtl_entry *dt;
706 	struct lppaca *vpa;
707 	unsigned long stolen;
708 	unsigned long core_stolen;
709 	u64 now;
710 	unsigned long flags;
711 
712 	dt = vcpu->arch.dtl_ptr;
713 	vpa = vcpu->arch.vpa.pinned_addr;
714 	now = mftb();
715 	core_stolen = vcore_stolen_time(vc, now);
716 	stolen = core_stolen - vcpu->arch.stolen_logged;
717 	vcpu->arch.stolen_logged = core_stolen;
718 	spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags);
719 	stolen += vcpu->arch.busy_stolen;
720 	vcpu->arch.busy_stolen = 0;
721 	spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags);
722 	if (!dt || !vpa)
723 		return;
724 	memset(dt, 0, sizeof(struct dtl_entry));
725 	dt->dispatch_reason = 7;
726 	dt->processor_id = cpu_to_be16(vc->pcpu + vcpu->arch.ptid);
727 	dt->timebase = cpu_to_be64(now + vc->tb_offset);
728 	dt->enqueue_to_dispatch_time = cpu_to_be32(stolen);
729 	dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu));
730 	dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr);
731 	++dt;
732 	if (dt == vcpu->arch.dtl.pinned_end)
733 		dt = vcpu->arch.dtl.pinned_addr;
734 	vcpu->arch.dtl_ptr = dt;
735 	/* order writing *dt vs. writing vpa->dtl_idx */
736 	smp_wmb();
737 	vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index);
738 	vcpu->arch.dtl.dirty = true;
739 }
740 
741 /* See if there is a doorbell interrupt pending for a vcpu */
742 static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu)
743 {
744 	int thr;
745 	struct kvmppc_vcore *vc;
746 
747 	if (vcpu->arch.doorbell_request)
748 		return true;
749 	/*
750 	 * Ensure that the read of vcore->dpdes comes after the read
751 	 * of vcpu->doorbell_request.  This barrier matches the
752 	 * smb_wmb() in kvmppc_guest_entry_inject().
753 	 */
754 	smp_rmb();
755 	vc = vcpu->arch.vcore;
756 	thr = vcpu->vcpu_id - vc->first_vcpuid;
757 	return !!(vc->dpdes & (1 << thr));
758 }
759 
760 static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu)
761 {
762 	if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207)
763 		return true;
764 	if ((!vcpu->arch.vcore->arch_compat) &&
765 	    cpu_has_feature(CPU_FTR_ARCH_207S))
766 		return true;
767 	return false;
768 }
769 
770 static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags,
771 			     unsigned long resource, unsigned long value1,
772 			     unsigned long value2)
773 {
774 	switch (resource) {
775 	case H_SET_MODE_RESOURCE_SET_CIABR:
776 		if (!kvmppc_power8_compatible(vcpu))
777 			return H_P2;
778 		if (value2)
779 			return H_P4;
780 		if (mflags)
781 			return H_UNSUPPORTED_FLAG_START;
782 		/* Guests can't breakpoint the hypervisor */
783 		if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER)
784 			return H_P3;
785 		vcpu->arch.ciabr  = value1;
786 		return H_SUCCESS;
787 	case H_SET_MODE_RESOURCE_SET_DAWR:
788 		if (!kvmppc_power8_compatible(vcpu))
789 			return H_P2;
790 		if (!ppc_breakpoint_available())
791 			return H_P2;
792 		if (mflags)
793 			return H_UNSUPPORTED_FLAG_START;
794 		if (value2 & DABRX_HYP)
795 			return H_P4;
796 		vcpu->arch.dawr  = value1;
797 		vcpu->arch.dawrx = value2;
798 		return H_SUCCESS;
799 	default:
800 		return H_TOO_HARD;
801 	}
802 }
803 
804 static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target)
805 {
806 	struct kvmppc_vcore *vcore = target->arch.vcore;
807 
808 	/*
809 	 * We expect to have been called by the real mode handler
810 	 * (kvmppc_rm_h_confer()) which would have directly returned
811 	 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may
812 	 * have useful work to do and should not confer) so we don't
813 	 * recheck that here.
814 	 */
815 
816 	spin_lock(&vcore->lock);
817 	if (target->arch.state == KVMPPC_VCPU_RUNNABLE &&
818 	    vcore->vcore_state != VCORE_INACTIVE &&
819 	    vcore->runner)
820 		target = vcore->runner;
821 	spin_unlock(&vcore->lock);
822 
823 	return kvm_vcpu_yield_to(target);
824 }
825 
826 static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu)
827 {
828 	int yield_count = 0;
829 	struct lppaca *lppaca;
830 
831 	spin_lock(&vcpu->arch.vpa_update_lock);
832 	lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr;
833 	if (lppaca)
834 		yield_count = be32_to_cpu(lppaca->yield_count);
835 	spin_unlock(&vcpu->arch.vpa_update_lock);
836 	return yield_count;
837 }
838 
839 int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu)
840 {
841 	unsigned long req = kvmppc_get_gpr(vcpu, 3);
842 	unsigned long target, ret = H_SUCCESS;
843 	int yield_count;
844 	struct kvm_vcpu *tvcpu;
845 	int idx, rc;
846 
847 	if (req <= MAX_HCALL_OPCODE &&
848 	    !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls))
849 		return RESUME_HOST;
850 
851 	switch (req) {
852 	case H_CEDE:
853 		break;
854 	case H_PROD:
855 		target = kvmppc_get_gpr(vcpu, 4);
856 		tvcpu = kvmppc_find_vcpu(vcpu->kvm, target);
857 		if (!tvcpu) {
858 			ret = H_PARAMETER;
859 			break;
860 		}
861 		tvcpu->arch.prodded = 1;
862 		smp_mb();
863 		if (tvcpu->arch.ceded)
864 			kvmppc_fast_vcpu_kick_hv(tvcpu);
865 		break;
866 	case H_CONFER:
867 		target = kvmppc_get_gpr(vcpu, 4);
868 		if (target == -1)
869 			break;
870 		tvcpu = kvmppc_find_vcpu(vcpu->kvm, target);
871 		if (!tvcpu) {
872 			ret = H_PARAMETER;
873 			break;
874 		}
875 		yield_count = kvmppc_get_gpr(vcpu, 5);
876 		if (kvmppc_get_yield_count(tvcpu) != yield_count)
877 			break;
878 		kvm_arch_vcpu_yield_to(tvcpu);
879 		break;
880 	case H_REGISTER_VPA:
881 		ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4),
882 					kvmppc_get_gpr(vcpu, 5),
883 					kvmppc_get_gpr(vcpu, 6));
884 		break;
885 	case H_RTAS:
886 		if (list_empty(&vcpu->kvm->arch.rtas_tokens))
887 			return RESUME_HOST;
888 
889 		idx = srcu_read_lock(&vcpu->kvm->srcu);
890 		rc = kvmppc_rtas_hcall(vcpu);
891 		srcu_read_unlock(&vcpu->kvm->srcu, idx);
892 
893 		if (rc == -ENOENT)
894 			return RESUME_HOST;
895 		else if (rc == 0)
896 			break;
897 
898 		/* Send the error out to userspace via KVM_RUN */
899 		return rc;
900 	case H_LOGICAL_CI_LOAD:
901 		ret = kvmppc_h_logical_ci_load(vcpu);
902 		if (ret == H_TOO_HARD)
903 			return RESUME_HOST;
904 		break;
905 	case H_LOGICAL_CI_STORE:
906 		ret = kvmppc_h_logical_ci_store(vcpu);
907 		if (ret == H_TOO_HARD)
908 			return RESUME_HOST;
909 		break;
910 	case H_SET_MODE:
911 		ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4),
912 					kvmppc_get_gpr(vcpu, 5),
913 					kvmppc_get_gpr(vcpu, 6),
914 					kvmppc_get_gpr(vcpu, 7));
915 		if (ret == H_TOO_HARD)
916 			return RESUME_HOST;
917 		break;
918 	case H_XIRR:
919 	case H_CPPR:
920 	case H_EOI:
921 	case H_IPI:
922 	case H_IPOLL:
923 	case H_XIRR_X:
924 		if (kvmppc_xics_enabled(vcpu)) {
925 			if (xics_on_xive()) {
926 				ret = H_NOT_AVAILABLE;
927 				return RESUME_GUEST;
928 			}
929 			ret = kvmppc_xics_hcall(vcpu, req);
930 			break;
931 		}
932 		return RESUME_HOST;
933 	case H_SET_DABR:
934 		ret = kvmppc_h_set_dabr(vcpu, kvmppc_get_gpr(vcpu, 4));
935 		break;
936 	case H_SET_XDABR:
937 		ret = kvmppc_h_set_xdabr(vcpu, kvmppc_get_gpr(vcpu, 4),
938 						kvmppc_get_gpr(vcpu, 5));
939 		break;
940 #ifdef CONFIG_SPAPR_TCE_IOMMU
941 	case H_GET_TCE:
942 		ret = kvmppc_h_get_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
943 						kvmppc_get_gpr(vcpu, 5));
944 		if (ret == H_TOO_HARD)
945 			return RESUME_HOST;
946 		break;
947 	case H_PUT_TCE:
948 		ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
949 						kvmppc_get_gpr(vcpu, 5),
950 						kvmppc_get_gpr(vcpu, 6));
951 		if (ret == H_TOO_HARD)
952 			return RESUME_HOST;
953 		break;
954 	case H_PUT_TCE_INDIRECT:
955 		ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4),
956 						kvmppc_get_gpr(vcpu, 5),
957 						kvmppc_get_gpr(vcpu, 6),
958 						kvmppc_get_gpr(vcpu, 7));
959 		if (ret == H_TOO_HARD)
960 			return RESUME_HOST;
961 		break;
962 	case H_STUFF_TCE:
963 		ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4),
964 						kvmppc_get_gpr(vcpu, 5),
965 						kvmppc_get_gpr(vcpu, 6),
966 						kvmppc_get_gpr(vcpu, 7));
967 		if (ret == H_TOO_HARD)
968 			return RESUME_HOST;
969 		break;
970 #endif
971 	case H_RANDOM:
972 		if (!powernv_get_random_long(&vcpu->arch.regs.gpr[4]))
973 			ret = H_HARDWARE;
974 		break;
975 
976 	case H_SET_PARTITION_TABLE:
977 		ret = H_FUNCTION;
978 		if (nesting_enabled(vcpu->kvm))
979 			ret = kvmhv_set_partition_table(vcpu);
980 		break;
981 	case H_ENTER_NESTED:
982 		ret = H_FUNCTION;
983 		if (!nesting_enabled(vcpu->kvm))
984 			break;
985 		ret = kvmhv_enter_nested_guest(vcpu);
986 		if (ret == H_INTERRUPT) {
987 			kvmppc_set_gpr(vcpu, 3, 0);
988 			vcpu->arch.hcall_needed = 0;
989 			return -EINTR;
990 		} else if (ret == H_TOO_HARD) {
991 			kvmppc_set_gpr(vcpu, 3, 0);
992 			vcpu->arch.hcall_needed = 0;
993 			return RESUME_HOST;
994 		}
995 		break;
996 	case H_TLB_INVALIDATE:
997 		ret = H_FUNCTION;
998 		if (nesting_enabled(vcpu->kvm))
999 			ret = kvmhv_do_nested_tlbie(vcpu);
1000 		break;
1001 	case H_COPY_TOFROM_GUEST:
1002 		ret = H_FUNCTION;
1003 		if (nesting_enabled(vcpu->kvm))
1004 			ret = kvmhv_copy_tofrom_guest_nested(vcpu);
1005 		break;
1006 	default:
1007 		return RESUME_HOST;
1008 	}
1009 	kvmppc_set_gpr(vcpu, 3, ret);
1010 	vcpu->arch.hcall_needed = 0;
1011 	return RESUME_GUEST;
1012 }
1013 
1014 /*
1015  * Handle H_CEDE in the nested virtualization case where we haven't
1016  * called the real-mode hcall handlers in book3s_hv_rmhandlers.S.
1017  * This has to be done early, not in kvmppc_pseries_do_hcall(), so
1018  * that the cede logic in kvmppc_run_single_vcpu() works properly.
1019  */
1020 static void kvmppc_nested_cede(struct kvm_vcpu *vcpu)
1021 {
1022 	vcpu->arch.shregs.msr |= MSR_EE;
1023 	vcpu->arch.ceded = 1;
1024 	smp_mb();
1025 	if (vcpu->arch.prodded) {
1026 		vcpu->arch.prodded = 0;
1027 		smp_mb();
1028 		vcpu->arch.ceded = 0;
1029 	}
1030 }
1031 
1032 static int kvmppc_hcall_impl_hv(unsigned long cmd)
1033 {
1034 	switch (cmd) {
1035 	case H_CEDE:
1036 	case H_PROD:
1037 	case H_CONFER:
1038 	case H_REGISTER_VPA:
1039 	case H_SET_MODE:
1040 	case H_LOGICAL_CI_LOAD:
1041 	case H_LOGICAL_CI_STORE:
1042 #ifdef CONFIG_KVM_XICS
1043 	case H_XIRR:
1044 	case H_CPPR:
1045 	case H_EOI:
1046 	case H_IPI:
1047 	case H_IPOLL:
1048 	case H_XIRR_X:
1049 #endif
1050 		return 1;
1051 	}
1052 
1053 	/* See if it's in the real-mode table */
1054 	return kvmppc_hcall_impl_hv_realmode(cmd);
1055 }
1056 
1057 static int kvmppc_emulate_debug_inst(struct kvm_run *run,
1058 					struct kvm_vcpu *vcpu)
1059 {
1060 	u32 last_inst;
1061 
1062 	if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) !=
1063 					EMULATE_DONE) {
1064 		/*
1065 		 * Fetch failed, so return to guest and
1066 		 * try executing it again.
1067 		 */
1068 		return RESUME_GUEST;
1069 	}
1070 
1071 	if (last_inst == KVMPPC_INST_SW_BREAKPOINT) {
1072 		run->exit_reason = KVM_EXIT_DEBUG;
1073 		run->debug.arch.address = kvmppc_get_pc(vcpu);
1074 		return RESUME_HOST;
1075 	} else {
1076 		kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1077 		return RESUME_GUEST;
1078 	}
1079 }
1080 
1081 static void do_nothing(void *x)
1082 {
1083 }
1084 
1085 static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu)
1086 {
1087 	int thr, cpu, pcpu, nthreads;
1088 	struct kvm_vcpu *v;
1089 	unsigned long dpdes;
1090 
1091 	nthreads = vcpu->kvm->arch.emul_smt_mode;
1092 	dpdes = 0;
1093 	cpu = vcpu->vcpu_id & ~(nthreads - 1);
1094 	for (thr = 0; thr < nthreads; ++thr, ++cpu) {
1095 		v = kvmppc_find_vcpu(vcpu->kvm, cpu);
1096 		if (!v)
1097 			continue;
1098 		/*
1099 		 * If the vcpu is currently running on a physical cpu thread,
1100 		 * interrupt it in order to pull it out of the guest briefly,
1101 		 * which will update its vcore->dpdes value.
1102 		 */
1103 		pcpu = READ_ONCE(v->cpu);
1104 		if (pcpu >= 0)
1105 			smp_call_function_single(pcpu, do_nothing, NULL, 1);
1106 		if (kvmppc_doorbell_pending(v))
1107 			dpdes |= 1 << thr;
1108 	}
1109 	return dpdes;
1110 }
1111 
1112 /*
1113  * On POWER9, emulate doorbell-related instructions in order to
1114  * give the guest the illusion of running on a multi-threaded core.
1115  * The instructions emulated are msgsndp, msgclrp, mfspr TIR,
1116  * and mfspr DPDES.
1117  */
1118 static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu)
1119 {
1120 	u32 inst, rb, thr;
1121 	unsigned long arg;
1122 	struct kvm *kvm = vcpu->kvm;
1123 	struct kvm_vcpu *tvcpu;
1124 
1125 	if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE)
1126 		return RESUME_GUEST;
1127 	if (get_op(inst) != 31)
1128 		return EMULATE_FAIL;
1129 	rb = get_rb(inst);
1130 	thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1);
1131 	switch (get_xop(inst)) {
1132 	case OP_31_XOP_MSGSNDP:
1133 		arg = kvmppc_get_gpr(vcpu, rb);
1134 		if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER)
1135 			break;
1136 		arg &= 0x3f;
1137 		if (arg >= kvm->arch.emul_smt_mode)
1138 			break;
1139 		tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg);
1140 		if (!tvcpu)
1141 			break;
1142 		if (!tvcpu->arch.doorbell_request) {
1143 			tvcpu->arch.doorbell_request = 1;
1144 			kvmppc_fast_vcpu_kick_hv(tvcpu);
1145 		}
1146 		break;
1147 	case OP_31_XOP_MSGCLRP:
1148 		arg = kvmppc_get_gpr(vcpu, rb);
1149 		if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER)
1150 			break;
1151 		vcpu->arch.vcore->dpdes = 0;
1152 		vcpu->arch.doorbell_request = 0;
1153 		break;
1154 	case OP_31_XOP_MFSPR:
1155 		switch (get_sprn(inst)) {
1156 		case SPRN_TIR:
1157 			arg = thr;
1158 			break;
1159 		case SPRN_DPDES:
1160 			arg = kvmppc_read_dpdes(vcpu);
1161 			break;
1162 		default:
1163 			return EMULATE_FAIL;
1164 		}
1165 		kvmppc_set_gpr(vcpu, get_rt(inst), arg);
1166 		break;
1167 	default:
1168 		return EMULATE_FAIL;
1169 	}
1170 	kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4);
1171 	return RESUME_GUEST;
1172 }
1173 
1174 static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
1175 				 struct task_struct *tsk)
1176 {
1177 	int r = RESUME_HOST;
1178 
1179 	vcpu->stat.sum_exits++;
1180 
1181 	/*
1182 	 * This can happen if an interrupt occurs in the last stages
1183 	 * of guest entry or the first stages of guest exit (i.e. after
1184 	 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV
1185 	 * and before setting it to KVM_GUEST_MODE_HOST_HV).
1186 	 * That can happen due to a bug, or due to a machine check
1187 	 * occurring at just the wrong time.
1188 	 */
1189 	if (vcpu->arch.shregs.msr & MSR_HV) {
1190 		printk(KERN_EMERG "KVM trap in HV mode!\n");
1191 		printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1192 			vcpu->arch.trap, kvmppc_get_pc(vcpu),
1193 			vcpu->arch.shregs.msr);
1194 		kvmppc_dump_regs(vcpu);
1195 		run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
1196 		run->hw.hardware_exit_reason = vcpu->arch.trap;
1197 		return RESUME_HOST;
1198 	}
1199 	run->exit_reason = KVM_EXIT_UNKNOWN;
1200 	run->ready_for_interrupt_injection = 1;
1201 	switch (vcpu->arch.trap) {
1202 	/* We're good on these - the host merely wanted to get our attention */
1203 	case BOOK3S_INTERRUPT_HV_DECREMENTER:
1204 		vcpu->stat.dec_exits++;
1205 		r = RESUME_GUEST;
1206 		break;
1207 	case BOOK3S_INTERRUPT_EXTERNAL:
1208 	case BOOK3S_INTERRUPT_H_DOORBELL:
1209 	case BOOK3S_INTERRUPT_H_VIRT:
1210 		vcpu->stat.ext_intr_exits++;
1211 		r = RESUME_GUEST;
1212 		break;
1213 	/* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/
1214 	case BOOK3S_INTERRUPT_HMI:
1215 	case BOOK3S_INTERRUPT_PERFMON:
1216 	case BOOK3S_INTERRUPT_SYSTEM_RESET:
1217 		r = RESUME_GUEST;
1218 		break;
1219 	case BOOK3S_INTERRUPT_MACHINE_CHECK:
1220 		/* Print the MCE event to host console. */
1221 		machine_check_print_event_info(&vcpu->arch.mce_evt, false, true);
1222 
1223 		/*
1224 		 * If the guest can do FWNMI, exit to userspace so it can
1225 		 * deliver a FWNMI to the guest.
1226 		 * Otherwise we synthesize a machine check for the guest
1227 		 * so that it knows that the machine check occurred.
1228 		 */
1229 		if (!vcpu->kvm->arch.fwnmi_enabled) {
1230 			ulong flags = vcpu->arch.shregs.msr & 0x083c0000;
1231 			kvmppc_core_queue_machine_check(vcpu, flags);
1232 			r = RESUME_GUEST;
1233 			break;
1234 		}
1235 
1236 		/* Exit to guest with KVM_EXIT_NMI as exit reason */
1237 		run->exit_reason = KVM_EXIT_NMI;
1238 		run->hw.hardware_exit_reason = vcpu->arch.trap;
1239 		/* Clear out the old NMI status from run->flags */
1240 		run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK;
1241 		/* Now set the NMI status */
1242 		if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED)
1243 			run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV;
1244 		else
1245 			run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV;
1246 
1247 		r = RESUME_HOST;
1248 		break;
1249 	case BOOK3S_INTERRUPT_PROGRAM:
1250 	{
1251 		ulong flags;
1252 		/*
1253 		 * Normally program interrupts are delivered directly
1254 		 * to the guest by the hardware, but we can get here
1255 		 * as a result of a hypervisor emulation interrupt
1256 		 * (e40) getting turned into a 700 by BML RTAS.
1257 		 */
1258 		flags = vcpu->arch.shregs.msr & 0x1f0000ull;
1259 		kvmppc_core_queue_program(vcpu, flags);
1260 		r = RESUME_GUEST;
1261 		break;
1262 	}
1263 	case BOOK3S_INTERRUPT_SYSCALL:
1264 	{
1265 		/* hcall - punt to userspace */
1266 		int i;
1267 
1268 		/* hypercall with MSR_PR has already been handled in rmode,
1269 		 * and never reaches here.
1270 		 */
1271 
1272 		run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3);
1273 		for (i = 0; i < 9; ++i)
1274 			run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i);
1275 		run->exit_reason = KVM_EXIT_PAPR_HCALL;
1276 		vcpu->arch.hcall_needed = 1;
1277 		r = RESUME_HOST;
1278 		break;
1279 	}
1280 	/*
1281 	 * We get these next two if the guest accesses a page which it thinks
1282 	 * it has mapped but which is not actually present, either because
1283 	 * it is for an emulated I/O device or because the corresonding
1284 	 * host page has been paged out.  Any other HDSI/HISI interrupts
1285 	 * have been handled already.
1286 	 */
1287 	case BOOK3S_INTERRUPT_H_DATA_STORAGE:
1288 		r = RESUME_PAGE_FAULT;
1289 		break;
1290 	case BOOK3S_INTERRUPT_H_INST_STORAGE:
1291 		vcpu->arch.fault_dar = kvmppc_get_pc(vcpu);
1292 		vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr &
1293 			DSISR_SRR1_MATCH_64S;
1294 		if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE)
1295 			vcpu->arch.fault_dsisr |= DSISR_ISSTORE;
1296 		r = RESUME_PAGE_FAULT;
1297 		break;
1298 	/*
1299 	 * This occurs if the guest executes an illegal instruction.
1300 	 * If the guest debug is disabled, generate a program interrupt
1301 	 * to the guest. If guest debug is enabled, we need to check
1302 	 * whether the instruction is a software breakpoint instruction.
1303 	 * Accordingly return to Guest or Host.
1304 	 */
1305 	case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
1306 		if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED)
1307 			vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ?
1308 				swab32(vcpu->arch.emul_inst) :
1309 				vcpu->arch.emul_inst;
1310 		if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) {
1311 			r = kvmppc_emulate_debug_inst(run, vcpu);
1312 		} else {
1313 			kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1314 			r = RESUME_GUEST;
1315 		}
1316 		break;
1317 	/*
1318 	 * This occurs if the guest (kernel or userspace), does something that
1319 	 * is prohibited by HFSCR.
1320 	 * On POWER9, this could be a doorbell instruction that we need
1321 	 * to emulate.
1322 	 * Otherwise, we just generate a program interrupt to the guest.
1323 	 */
1324 	case BOOK3S_INTERRUPT_H_FAC_UNAVAIL:
1325 		r = EMULATE_FAIL;
1326 		if (((vcpu->arch.hfscr >> 56) == FSCR_MSGP_LG) &&
1327 		    cpu_has_feature(CPU_FTR_ARCH_300))
1328 			r = kvmppc_emulate_doorbell_instr(vcpu);
1329 		if (r == EMULATE_FAIL) {
1330 			kvmppc_core_queue_program(vcpu, SRR1_PROGILL);
1331 			r = RESUME_GUEST;
1332 		}
1333 		break;
1334 
1335 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1336 	case BOOK3S_INTERRUPT_HV_SOFTPATCH:
1337 		/*
1338 		 * This occurs for various TM-related instructions that
1339 		 * we need to emulate on POWER9 DD2.2.  We have already
1340 		 * handled the cases where the guest was in real-suspend
1341 		 * mode and was transitioning to transactional state.
1342 		 */
1343 		r = kvmhv_p9_tm_emulation(vcpu);
1344 		break;
1345 #endif
1346 
1347 	case BOOK3S_INTERRUPT_HV_RM_HARD:
1348 		r = RESUME_PASSTHROUGH;
1349 		break;
1350 	default:
1351 		kvmppc_dump_regs(vcpu);
1352 		printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1353 			vcpu->arch.trap, kvmppc_get_pc(vcpu),
1354 			vcpu->arch.shregs.msr);
1355 		run->hw.hardware_exit_reason = vcpu->arch.trap;
1356 		r = RESUME_HOST;
1357 		break;
1358 	}
1359 
1360 	return r;
1361 }
1362 
1363 static int kvmppc_handle_nested_exit(struct kvm_run *run, struct kvm_vcpu *vcpu)
1364 {
1365 	int r;
1366 	int srcu_idx;
1367 
1368 	vcpu->stat.sum_exits++;
1369 
1370 	/*
1371 	 * This can happen if an interrupt occurs in the last stages
1372 	 * of guest entry or the first stages of guest exit (i.e. after
1373 	 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV
1374 	 * and before setting it to KVM_GUEST_MODE_HOST_HV).
1375 	 * That can happen due to a bug, or due to a machine check
1376 	 * occurring at just the wrong time.
1377 	 */
1378 	if (vcpu->arch.shregs.msr & MSR_HV) {
1379 		pr_emerg("KVM trap in HV mode while nested!\n");
1380 		pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n",
1381 			 vcpu->arch.trap, kvmppc_get_pc(vcpu),
1382 			 vcpu->arch.shregs.msr);
1383 		kvmppc_dump_regs(vcpu);
1384 		return RESUME_HOST;
1385 	}
1386 	switch (vcpu->arch.trap) {
1387 	/* We're good on these - the host merely wanted to get our attention */
1388 	case BOOK3S_INTERRUPT_HV_DECREMENTER:
1389 		vcpu->stat.dec_exits++;
1390 		r = RESUME_GUEST;
1391 		break;
1392 	case BOOK3S_INTERRUPT_EXTERNAL:
1393 		vcpu->stat.ext_intr_exits++;
1394 		r = RESUME_HOST;
1395 		break;
1396 	case BOOK3S_INTERRUPT_H_DOORBELL:
1397 	case BOOK3S_INTERRUPT_H_VIRT:
1398 		vcpu->stat.ext_intr_exits++;
1399 		r = RESUME_GUEST;
1400 		break;
1401 	/* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/
1402 	case BOOK3S_INTERRUPT_HMI:
1403 	case BOOK3S_INTERRUPT_PERFMON:
1404 	case BOOK3S_INTERRUPT_SYSTEM_RESET:
1405 		r = RESUME_GUEST;
1406 		break;
1407 	case BOOK3S_INTERRUPT_MACHINE_CHECK:
1408 		/* Pass the machine check to the L1 guest */
1409 		r = RESUME_HOST;
1410 		/* Print the MCE event to host console. */
1411 		machine_check_print_event_info(&vcpu->arch.mce_evt, false, true);
1412 		break;
1413 	/*
1414 	 * We get these next two if the guest accesses a page which it thinks
1415 	 * it has mapped but which is not actually present, either because
1416 	 * it is for an emulated I/O device or because the corresonding
1417 	 * host page has been paged out.
1418 	 */
1419 	case BOOK3S_INTERRUPT_H_DATA_STORAGE:
1420 		srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
1421 		r = kvmhv_nested_page_fault(run, vcpu);
1422 		srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
1423 		break;
1424 	case BOOK3S_INTERRUPT_H_INST_STORAGE:
1425 		vcpu->arch.fault_dar = kvmppc_get_pc(vcpu);
1426 		vcpu->arch.fault_dsisr = kvmppc_get_msr(vcpu) &
1427 					 DSISR_SRR1_MATCH_64S;
1428 		if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE)
1429 			vcpu->arch.fault_dsisr |= DSISR_ISSTORE;
1430 		srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
1431 		r = kvmhv_nested_page_fault(run, vcpu);
1432 		srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
1433 		break;
1434 
1435 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1436 	case BOOK3S_INTERRUPT_HV_SOFTPATCH:
1437 		/*
1438 		 * This occurs for various TM-related instructions that
1439 		 * we need to emulate on POWER9 DD2.2.  We have already
1440 		 * handled the cases where the guest was in real-suspend
1441 		 * mode and was transitioning to transactional state.
1442 		 */
1443 		r = kvmhv_p9_tm_emulation(vcpu);
1444 		break;
1445 #endif
1446 
1447 	case BOOK3S_INTERRUPT_HV_RM_HARD:
1448 		vcpu->arch.trap = 0;
1449 		r = RESUME_GUEST;
1450 		if (!xics_on_xive())
1451 			kvmppc_xics_rm_complete(vcpu, 0);
1452 		break;
1453 	default:
1454 		r = RESUME_HOST;
1455 		break;
1456 	}
1457 
1458 	return r;
1459 }
1460 
1461 static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu,
1462 					    struct kvm_sregs *sregs)
1463 {
1464 	int i;
1465 
1466 	memset(sregs, 0, sizeof(struct kvm_sregs));
1467 	sregs->pvr = vcpu->arch.pvr;
1468 	for (i = 0; i < vcpu->arch.slb_max; i++) {
1469 		sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige;
1470 		sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv;
1471 	}
1472 
1473 	return 0;
1474 }
1475 
1476 static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu,
1477 					    struct kvm_sregs *sregs)
1478 {
1479 	int i, j;
1480 
1481 	/* Only accept the same PVR as the host's, since we can't spoof it */
1482 	if (sregs->pvr != vcpu->arch.pvr)
1483 		return -EINVAL;
1484 
1485 	j = 0;
1486 	for (i = 0; i < vcpu->arch.slb_nr; i++) {
1487 		if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) {
1488 			vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe;
1489 			vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv;
1490 			++j;
1491 		}
1492 	}
1493 	vcpu->arch.slb_max = j;
1494 
1495 	return 0;
1496 }
1497 
1498 static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr,
1499 		bool preserve_top32)
1500 {
1501 	struct kvm *kvm = vcpu->kvm;
1502 	struct kvmppc_vcore *vc = vcpu->arch.vcore;
1503 	u64 mask;
1504 
1505 	mutex_lock(&kvm->lock);
1506 	spin_lock(&vc->lock);
1507 	/*
1508 	 * If ILE (interrupt little-endian) has changed, update the
1509 	 * MSR_LE bit in the intr_msr for each vcpu in this vcore.
1510 	 */
1511 	if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) {
1512 		struct kvm_vcpu *vcpu;
1513 		int i;
1514 
1515 		kvm_for_each_vcpu(i, vcpu, kvm) {
1516 			if (vcpu->arch.vcore != vc)
1517 				continue;
1518 			if (new_lpcr & LPCR_ILE)
1519 				vcpu->arch.intr_msr |= MSR_LE;
1520 			else
1521 				vcpu->arch.intr_msr &= ~MSR_LE;
1522 		}
1523 	}
1524 
1525 	/*
1526 	 * Userspace can only modify DPFD (default prefetch depth),
1527 	 * ILE (interrupt little-endian) and TC (translation control).
1528 	 * On POWER8 and POWER9 userspace can also modify AIL (alt. interrupt loc.).
1529 	 */
1530 	mask = LPCR_DPFD | LPCR_ILE | LPCR_TC;
1531 	if (cpu_has_feature(CPU_FTR_ARCH_207S))
1532 		mask |= LPCR_AIL;
1533 	/*
1534 	 * On POWER9, allow userspace to enable large decrementer for the
1535 	 * guest, whether or not the host has it enabled.
1536 	 */
1537 	if (cpu_has_feature(CPU_FTR_ARCH_300))
1538 		mask |= LPCR_LD;
1539 
1540 	/* Broken 32-bit version of LPCR must not clear top bits */
1541 	if (preserve_top32)
1542 		mask &= 0xFFFFFFFF;
1543 	vc->lpcr = (vc->lpcr & ~mask) | (new_lpcr & mask);
1544 	spin_unlock(&vc->lock);
1545 	mutex_unlock(&kvm->lock);
1546 }
1547 
1548 static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
1549 				 union kvmppc_one_reg *val)
1550 {
1551 	int r = 0;
1552 	long int i;
1553 
1554 	switch (id) {
1555 	case KVM_REG_PPC_DEBUG_INST:
1556 		*val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT);
1557 		break;
1558 	case KVM_REG_PPC_HIOR:
1559 		*val = get_reg_val(id, 0);
1560 		break;
1561 	case KVM_REG_PPC_DABR:
1562 		*val = get_reg_val(id, vcpu->arch.dabr);
1563 		break;
1564 	case KVM_REG_PPC_DABRX:
1565 		*val = get_reg_val(id, vcpu->arch.dabrx);
1566 		break;
1567 	case KVM_REG_PPC_DSCR:
1568 		*val = get_reg_val(id, vcpu->arch.dscr);
1569 		break;
1570 	case KVM_REG_PPC_PURR:
1571 		*val = get_reg_val(id, vcpu->arch.purr);
1572 		break;
1573 	case KVM_REG_PPC_SPURR:
1574 		*val = get_reg_val(id, vcpu->arch.spurr);
1575 		break;
1576 	case KVM_REG_PPC_AMR:
1577 		*val = get_reg_val(id, vcpu->arch.amr);
1578 		break;
1579 	case KVM_REG_PPC_UAMOR:
1580 		*val = get_reg_val(id, vcpu->arch.uamor);
1581 		break;
1582 	case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
1583 		i = id - KVM_REG_PPC_MMCR0;
1584 		*val = get_reg_val(id, vcpu->arch.mmcr[i]);
1585 		break;
1586 	case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
1587 		i = id - KVM_REG_PPC_PMC1;
1588 		*val = get_reg_val(id, vcpu->arch.pmc[i]);
1589 		break;
1590 	case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
1591 		i = id - KVM_REG_PPC_SPMC1;
1592 		*val = get_reg_val(id, vcpu->arch.spmc[i]);
1593 		break;
1594 	case KVM_REG_PPC_SIAR:
1595 		*val = get_reg_val(id, vcpu->arch.siar);
1596 		break;
1597 	case KVM_REG_PPC_SDAR:
1598 		*val = get_reg_val(id, vcpu->arch.sdar);
1599 		break;
1600 	case KVM_REG_PPC_SIER:
1601 		*val = get_reg_val(id, vcpu->arch.sier);
1602 		break;
1603 	case KVM_REG_PPC_IAMR:
1604 		*val = get_reg_val(id, vcpu->arch.iamr);
1605 		break;
1606 	case KVM_REG_PPC_PSPB:
1607 		*val = get_reg_val(id, vcpu->arch.pspb);
1608 		break;
1609 	case KVM_REG_PPC_DPDES:
1610 		*val = get_reg_val(id, vcpu->arch.vcore->dpdes);
1611 		break;
1612 	case KVM_REG_PPC_VTB:
1613 		*val = get_reg_val(id, vcpu->arch.vcore->vtb);
1614 		break;
1615 	case KVM_REG_PPC_DAWR:
1616 		*val = get_reg_val(id, vcpu->arch.dawr);
1617 		break;
1618 	case KVM_REG_PPC_DAWRX:
1619 		*val = get_reg_val(id, vcpu->arch.dawrx);
1620 		break;
1621 	case KVM_REG_PPC_CIABR:
1622 		*val = get_reg_val(id, vcpu->arch.ciabr);
1623 		break;
1624 	case KVM_REG_PPC_CSIGR:
1625 		*val = get_reg_val(id, vcpu->arch.csigr);
1626 		break;
1627 	case KVM_REG_PPC_TACR:
1628 		*val = get_reg_val(id, vcpu->arch.tacr);
1629 		break;
1630 	case KVM_REG_PPC_TCSCR:
1631 		*val = get_reg_val(id, vcpu->arch.tcscr);
1632 		break;
1633 	case KVM_REG_PPC_PID:
1634 		*val = get_reg_val(id, vcpu->arch.pid);
1635 		break;
1636 	case KVM_REG_PPC_ACOP:
1637 		*val = get_reg_val(id, vcpu->arch.acop);
1638 		break;
1639 	case KVM_REG_PPC_WORT:
1640 		*val = get_reg_val(id, vcpu->arch.wort);
1641 		break;
1642 	case KVM_REG_PPC_TIDR:
1643 		*val = get_reg_val(id, vcpu->arch.tid);
1644 		break;
1645 	case KVM_REG_PPC_PSSCR:
1646 		*val = get_reg_val(id, vcpu->arch.psscr);
1647 		break;
1648 	case KVM_REG_PPC_VPA_ADDR:
1649 		spin_lock(&vcpu->arch.vpa_update_lock);
1650 		*val = get_reg_val(id, vcpu->arch.vpa.next_gpa);
1651 		spin_unlock(&vcpu->arch.vpa_update_lock);
1652 		break;
1653 	case KVM_REG_PPC_VPA_SLB:
1654 		spin_lock(&vcpu->arch.vpa_update_lock);
1655 		val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa;
1656 		val->vpaval.length = vcpu->arch.slb_shadow.len;
1657 		spin_unlock(&vcpu->arch.vpa_update_lock);
1658 		break;
1659 	case KVM_REG_PPC_VPA_DTL:
1660 		spin_lock(&vcpu->arch.vpa_update_lock);
1661 		val->vpaval.addr = vcpu->arch.dtl.next_gpa;
1662 		val->vpaval.length = vcpu->arch.dtl.len;
1663 		spin_unlock(&vcpu->arch.vpa_update_lock);
1664 		break;
1665 	case KVM_REG_PPC_TB_OFFSET:
1666 		*val = get_reg_val(id, vcpu->arch.vcore->tb_offset);
1667 		break;
1668 	case KVM_REG_PPC_LPCR:
1669 	case KVM_REG_PPC_LPCR_64:
1670 		*val = get_reg_val(id, vcpu->arch.vcore->lpcr);
1671 		break;
1672 	case KVM_REG_PPC_PPR:
1673 		*val = get_reg_val(id, vcpu->arch.ppr);
1674 		break;
1675 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1676 	case KVM_REG_PPC_TFHAR:
1677 		*val = get_reg_val(id, vcpu->arch.tfhar);
1678 		break;
1679 	case KVM_REG_PPC_TFIAR:
1680 		*val = get_reg_val(id, vcpu->arch.tfiar);
1681 		break;
1682 	case KVM_REG_PPC_TEXASR:
1683 		*val = get_reg_val(id, vcpu->arch.texasr);
1684 		break;
1685 	case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
1686 		i = id - KVM_REG_PPC_TM_GPR0;
1687 		*val = get_reg_val(id, vcpu->arch.gpr_tm[i]);
1688 		break;
1689 	case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
1690 	{
1691 		int j;
1692 		i = id - KVM_REG_PPC_TM_VSR0;
1693 		if (i < 32)
1694 			for (j = 0; j < TS_FPRWIDTH; j++)
1695 				val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j];
1696 		else {
1697 			if (cpu_has_feature(CPU_FTR_ALTIVEC))
1698 				val->vval = vcpu->arch.vr_tm.vr[i-32];
1699 			else
1700 				r = -ENXIO;
1701 		}
1702 		break;
1703 	}
1704 	case KVM_REG_PPC_TM_CR:
1705 		*val = get_reg_val(id, vcpu->arch.cr_tm);
1706 		break;
1707 	case KVM_REG_PPC_TM_XER:
1708 		*val = get_reg_val(id, vcpu->arch.xer_tm);
1709 		break;
1710 	case KVM_REG_PPC_TM_LR:
1711 		*val = get_reg_val(id, vcpu->arch.lr_tm);
1712 		break;
1713 	case KVM_REG_PPC_TM_CTR:
1714 		*val = get_reg_val(id, vcpu->arch.ctr_tm);
1715 		break;
1716 	case KVM_REG_PPC_TM_FPSCR:
1717 		*val = get_reg_val(id, vcpu->arch.fp_tm.fpscr);
1718 		break;
1719 	case KVM_REG_PPC_TM_AMR:
1720 		*val = get_reg_val(id, vcpu->arch.amr_tm);
1721 		break;
1722 	case KVM_REG_PPC_TM_PPR:
1723 		*val = get_reg_val(id, vcpu->arch.ppr_tm);
1724 		break;
1725 	case KVM_REG_PPC_TM_VRSAVE:
1726 		*val = get_reg_val(id, vcpu->arch.vrsave_tm);
1727 		break;
1728 	case KVM_REG_PPC_TM_VSCR:
1729 		if (cpu_has_feature(CPU_FTR_ALTIVEC))
1730 			*val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]);
1731 		else
1732 			r = -ENXIO;
1733 		break;
1734 	case KVM_REG_PPC_TM_DSCR:
1735 		*val = get_reg_val(id, vcpu->arch.dscr_tm);
1736 		break;
1737 	case KVM_REG_PPC_TM_TAR:
1738 		*val = get_reg_val(id, vcpu->arch.tar_tm);
1739 		break;
1740 #endif
1741 	case KVM_REG_PPC_ARCH_COMPAT:
1742 		*val = get_reg_val(id, vcpu->arch.vcore->arch_compat);
1743 		break;
1744 	case KVM_REG_PPC_DEC_EXPIRY:
1745 		*val = get_reg_val(id, vcpu->arch.dec_expires +
1746 				   vcpu->arch.vcore->tb_offset);
1747 		break;
1748 	case KVM_REG_PPC_ONLINE:
1749 		*val = get_reg_val(id, vcpu->arch.online);
1750 		break;
1751 	case KVM_REG_PPC_PTCR:
1752 		*val = get_reg_val(id, vcpu->kvm->arch.l1_ptcr);
1753 		break;
1754 	default:
1755 		r = -EINVAL;
1756 		break;
1757 	}
1758 
1759 	return r;
1760 }
1761 
1762 static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id,
1763 				 union kvmppc_one_reg *val)
1764 {
1765 	int r = 0;
1766 	long int i;
1767 	unsigned long addr, len;
1768 
1769 	switch (id) {
1770 	case KVM_REG_PPC_HIOR:
1771 		/* Only allow this to be set to zero */
1772 		if (set_reg_val(id, *val))
1773 			r = -EINVAL;
1774 		break;
1775 	case KVM_REG_PPC_DABR:
1776 		vcpu->arch.dabr = set_reg_val(id, *val);
1777 		break;
1778 	case KVM_REG_PPC_DABRX:
1779 		vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP;
1780 		break;
1781 	case KVM_REG_PPC_DSCR:
1782 		vcpu->arch.dscr = set_reg_val(id, *val);
1783 		break;
1784 	case KVM_REG_PPC_PURR:
1785 		vcpu->arch.purr = set_reg_val(id, *val);
1786 		break;
1787 	case KVM_REG_PPC_SPURR:
1788 		vcpu->arch.spurr = set_reg_val(id, *val);
1789 		break;
1790 	case KVM_REG_PPC_AMR:
1791 		vcpu->arch.amr = set_reg_val(id, *val);
1792 		break;
1793 	case KVM_REG_PPC_UAMOR:
1794 		vcpu->arch.uamor = set_reg_val(id, *val);
1795 		break;
1796 	case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS:
1797 		i = id - KVM_REG_PPC_MMCR0;
1798 		vcpu->arch.mmcr[i] = set_reg_val(id, *val);
1799 		break;
1800 	case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8:
1801 		i = id - KVM_REG_PPC_PMC1;
1802 		vcpu->arch.pmc[i] = set_reg_val(id, *val);
1803 		break;
1804 	case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2:
1805 		i = id - KVM_REG_PPC_SPMC1;
1806 		vcpu->arch.spmc[i] = set_reg_val(id, *val);
1807 		break;
1808 	case KVM_REG_PPC_SIAR:
1809 		vcpu->arch.siar = set_reg_val(id, *val);
1810 		break;
1811 	case KVM_REG_PPC_SDAR:
1812 		vcpu->arch.sdar = set_reg_val(id, *val);
1813 		break;
1814 	case KVM_REG_PPC_SIER:
1815 		vcpu->arch.sier = set_reg_val(id, *val);
1816 		break;
1817 	case KVM_REG_PPC_IAMR:
1818 		vcpu->arch.iamr = set_reg_val(id, *val);
1819 		break;
1820 	case KVM_REG_PPC_PSPB:
1821 		vcpu->arch.pspb = set_reg_val(id, *val);
1822 		break;
1823 	case KVM_REG_PPC_DPDES:
1824 		vcpu->arch.vcore->dpdes = set_reg_val(id, *val);
1825 		break;
1826 	case KVM_REG_PPC_VTB:
1827 		vcpu->arch.vcore->vtb = set_reg_val(id, *val);
1828 		break;
1829 	case KVM_REG_PPC_DAWR:
1830 		vcpu->arch.dawr = set_reg_val(id, *val);
1831 		break;
1832 	case KVM_REG_PPC_DAWRX:
1833 		vcpu->arch.dawrx = set_reg_val(id, *val) & ~DAWRX_HYP;
1834 		break;
1835 	case KVM_REG_PPC_CIABR:
1836 		vcpu->arch.ciabr = set_reg_val(id, *val);
1837 		/* Don't allow setting breakpoints in hypervisor code */
1838 		if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER)
1839 			vcpu->arch.ciabr &= ~CIABR_PRIV;	/* disable */
1840 		break;
1841 	case KVM_REG_PPC_CSIGR:
1842 		vcpu->arch.csigr = set_reg_val(id, *val);
1843 		break;
1844 	case KVM_REG_PPC_TACR:
1845 		vcpu->arch.tacr = set_reg_val(id, *val);
1846 		break;
1847 	case KVM_REG_PPC_TCSCR:
1848 		vcpu->arch.tcscr = set_reg_val(id, *val);
1849 		break;
1850 	case KVM_REG_PPC_PID:
1851 		vcpu->arch.pid = set_reg_val(id, *val);
1852 		break;
1853 	case KVM_REG_PPC_ACOP:
1854 		vcpu->arch.acop = set_reg_val(id, *val);
1855 		break;
1856 	case KVM_REG_PPC_WORT:
1857 		vcpu->arch.wort = set_reg_val(id, *val);
1858 		break;
1859 	case KVM_REG_PPC_TIDR:
1860 		vcpu->arch.tid = set_reg_val(id, *val);
1861 		break;
1862 	case KVM_REG_PPC_PSSCR:
1863 		vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS;
1864 		break;
1865 	case KVM_REG_PPC_VPA_ADDR:
1866 		addr = set_reg_val(id, *val);
1867 		r = -EINVAL;
1868 		if (!addr && (vcpu->arch.slb_shadow.next_gpa ||
1869 			      vcpu->arch.dtl.next_gpa))
1870 			break;
1871 		r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca));
1872 		break;
1873 	case KVM_REG_PPC_VPA_SLB:
1874 		addr = val->vpaval.addr;
1875 		len = val->vpaval.length;
1876 		r = -EINVAL;
1877 		if (addr && !vcpu->arch.vpa.next_gpa)
1878 			break;
1879 		r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len);
1880 		break;
1881 	case KVM_REG_PPC_VPA_DTL:
1882 		addr = val->vpaval.addr;
1883 		len = val->vpaval.length;
1884 		r = -EINVAL;
1885 		if (addr && (len < sizeof(struct dtl_entry) ||
1886 			     !vcpu->arch.vpa.next_gpa))
1887 			break;
1888 		len -= len % sizeof(struct dtl_entry);
1889 		r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len);
1890 		break;
1891 	case KVM_REG_PPC_TB_OFFSET:
1892 		/* round up to multiple of 2^24 */
1893 		vcpu->arch.vcore->tb_offset =
1894 			ALIGN(set_reg_val(id, *val), 1UL << 24);
1895 		break;
1896 	case KVM_REG_PPC_LPCR:
1897 		kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true);
1898 		break;
1899 	case KVM_REG_PPC_LPCR_64:
1900 		kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false);
1901 		break;
1902 	case KVM_REG_PPC_PPR:
1903 		vcpu->arch.ppr = set_reg_val(id, *val);
1904 		break;
1905 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1906 	case KVM_REG_PPC_TFHAR:
1907 		vcpu->arch.tfhar = set_reg_val(id, *val);
1908 		break;
1909 	case KVM_REG_PPC_TFIAR:
1910 		vcpu->arch.tfiar = set_reg_val(id, *val);
1911 		break;
1912 	case KVM_REG_PPC_TEXASR:
1913 		vcpu->arch.texasr = set_reg_val(id, *val);
1914 		break;
1915 	case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31:
1916 		i = id - KVM_REG_PPC_TM_GPR0;
1917 		vcpu->arch.gpr_tm[i] = set_reg_val(id, *val);
1918 		break;
1919 	case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63:
1920 	{
1921 		int j;
1922 		i = id - KVM_REG_PPC_TM_VSR0;
1923 		if (i < 32)
1924 			for (j = 0; j < TS_FPRWIDTH; j++)
1925 				vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j];
1926 		else
1927 			if (cpu_has_feature(CPU_FTR_ALTIVEC))
1928 				vcpu->arch.vr_tm.vr[i-32] = val->vval;
1929 			else
1930 				r = -ENXIO;
1931 		break;
1932 	}
1933 	case KVM_REG_PPC_TM_CR:
1934 		vcpu->arch.cr_tm = set_reg_val(id, *val);
1935 		break;
1936 	case KVM_REG_PPC_TM_XER:
1937 		vcpu->arch.xer_tm = set_reg_val(id, *val);
1938 		break;
1939 	case KVM_REG_PPC_TM_LR:
1940 		vcpu->arch.lr_tm = set_reg_val(id, *val);
1941 		break;
1942 	case KVM_REG_PPC_TM_CTR:
1943 		vcpu->arch.ctr_tm = set_reg_val(id, *val);
1944 		break;
1945 	case KVM_REG_PPC_TM_FPSCR:
1946 		vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val);
1947 		break;
1948 	case KVM_REG_PPC_TM_AMR:
1949 		vcpu->arch.amr_tm = set_reg_val(id, *val);
1950 		break;
1951 	case KVM_REG_PPC_TM_PPR:
1952 		vcpu->arch.ppr_tm = set_reg_val(id, *val);
1953 		break;
1954 	case KVM_REG_PPC_TM_VRSAVE:
1955 		vcpu->arch.vrsave_tm = set_reg_val(id, *val);
1956 		break;
1957 	case KVM_REG_PPC_TM_VSCR:
1958 		if (cpu_has_feature(CPU_FTR_ALTIVEC))
1959 			vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val);
1960 		else
1961 			r = - ENXIO;
1962 		break;
1963 	case KVM_REG_PPC_TM_DSCR:
1964 		vcpu->arch.dscr_tm = set_reg_val(id, *val);
1965 		break;
1966 	case KVM_REG_PPC_TM_TAR:
1967 		vcpu->arch.tar_tm = set_reg_val(id, *val);
1968 		break;
1969 #endif
1970 	case KVM_REG_PPC_ARCH_COMPAT:
1971 		r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val));
1972 		break;
1973 	case KVM_REG_PPC_DEC_EXPIRY:
1974 		vcpu->arch.dec_expires = set_reg_val(id, *val) -
1975 			vcpu->arch.vcore->tb_offset;
1976 		break;
1977 	case KVM_REG_PPC_ONLINE:
1978 		i = set_reg_val(id, *val);
1979 		if (i && !vcpu->arch.online)
1980 			atomic_inc(&vcpu->arch.vcore->online_count);
1981 		else if (!i && vcpu->arch.online)
1982 			atomic_dec(&vcpu->arch.vcore->online_count);
1983 		vcpu->arch.online = i;
1984 		break;
1985 	case KVM_REG_PPC_PTCR:
1986 		vcpu->kvm->arch.l1_ptcr = set_reg_val(id, *val);
1987 		break;
1988 	default:
1989 		r = -EINVAL;
1990 		break;
1991 	}
1992 
1993 	return r;
1994 }
1995 
1996 /*
1997  * On POWER9, threads are independent and can be in different partitions.
1998  * Therefore we consider each thread to be a subcore.
1999  * There is a restriction that all threads have to be in the same
2000  * MMU mode (radix or HPT), unfortunately, but since we only support
2001  * HPT guests on a HPT host so far, that isn't an impediment yet.
2002  */
2003 static int threads_per_vcore(struct kvm *kvm)
2004 {
2005 	if (kvm->arch.threads_indep)
2006 		return 1;
2007 	return threads_per_subcore;
2008 }
2009 
2010 static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int id)
2011 {
2012 	struct kvmppc_vcore *vcore;
2013 
2014 	vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL);
2015 
2016 	if (vcore == NULL)
2017 		return NULL;
2018 
2019 	spin_lock_init(&vcore->lock);
2020 	spin_lock_init(&vcore->stoltb_lock);
2021 	init_swait_queue_head(&vcore->wq);
2022 	vcore->preempt_tb = TB_NIL;
2023 	vcore->lpcr = kvm->arch.lpcr;
2024 	vcore->first_vcpuid = id;
2025 	vcore->kvm = kvm;
2026 	INIT_LIST_HEAD(&vcore->preempt_list);
2027 
2028 	return vcore;
2029 }
2030 
2031 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
2032 static struct debugfs_timings_element {
2033 	const char *name;
2034 	size_t offset;
2035 } timings[] = {
2036 	{"rm_entry",	offsetof(struct kvm_vcpu, arch.rm_entry)},
2037 	{"rm_intr",	offsetof(struct kvm_vcpu, arch.rm_intr)},
2038 	{"rm_exit",	offsetof(struct kvm_vcpu, arch.rm_exit)},
2039 	{"guest",	offsetof(struct kvm_vcpu, arch.guest_time)},
2040 	{"cede",	offsetof(struct kvm_vcpu, arch.cede_time)},
2041 };
2042 
2043 #define N_TIMINGS	(ARRAY_SIZE(timings))
2044 
2045 struct debugfs_timings_state {
2046 	struct kvm_vcpu	*vcpu;
2047 	unsigned int	buflen;
2048 	char		buf[N_TIMINGS * 100];
2049 };
2050 
2051 static int debugfs_timings_open(struct inode *inode, struct file *file)
2052 {
2053 	struct kvm_vcpu *vcpu = inode->i_private;
2054 	struct debugfs_timings_state *p;
2055 
2056 	p = kzalloc(sizeof(*p), GFP_KERNEL);
2057 	if (!p)
2058 		return -ENOMEM;
2059 
2060 	kvm_get_kvm(vcpu->kvm);
2061 	p->vcpu = vcpu;
2062 	file->private_data = p;
2063 
2064 	return nonseekable_open(inode, file);
2065 }
2066 
2067 static int debugfs_timings_release(struct inode *inode, struct file *file)
2068 {
2069 	struct debugfs_timings_state *p = file->private_data;
2070 
2071 	kvm_put_kvm(p->vcpu->kvm);
2072 	kfree(p);
2073 	return 0;
2074 }
2075 
2076 static ssize_t debugfs_timings_read(struct file *file, char __user *buf,
2077 				    size_t len, loff_t *ppos)
2078 {
2079 	struct debugfs_timings_state *p = file->private_data;
2080 	struct kvm_vcpu *vcpu = p->vcpu;
2081 	char *s, *buf_end;
2082 	struct kvmhv_tb_accumulator tb;
2083 	u64 count;
2084 	loff_t pos;
2085 	ssize_t n;
2086 	int i, loops;
2087 	bool ok;
2088 
2089 	if (!p->buflen) {
2090 		s = p->buf;
2091 		buf_end = s + sizeof(p->buf);
2092 		for (i = 0; i < N_TIMINGS; ++i) {
2093 			struct kvmhv_tb_accumulator *acc;
2094 
2095 			acc = (struct kvmhv_tb_accumulator *)
2096 				((unsigned long)vcpu + timings[i].offset);
2097 			ok = false;
2098 			for (loops = 0; loops < 1000; ++loops) {
2099 				count = acc->seqcount;
2100 				if (!(count & 1)) {
2101 					smp_rmb();
2102 					tb = *acc;
2103 					smp_rmb();
2104 					if (count == acc->seqcount) {
2105 						ok = true;
2106 						break;
2107 					}
2108 				}
2109 				udelay(1);
2110 			}
2111 			if (!ok)
2112 				snprintf(s, buf_end - s, "%s: stuck\n",
2113 					timings[i].name);
2114 			else
2115 				snprintf(s, buf_end - s,
2116 					"%s: %llu %llu %llu %llu\n",
2117 					timings[i].name, count / 2,
2118 					tb_to_ns(tb.tb_total),
2119 					tb_to_ns(tb.tb_min),
2120 					tb_to_ns(tb.tb_max));
2121 			s += strlen(s);
2122 		}
2123 		p->buflen = s - p->buf;
2124 	}
2125 
2126 	pos = *ppos;
2127 	if (pos >= p->buflen)
2128 		return 0;
2129 	if (len > p->buflen - pos)
2130 		len = p->buflen - pos;
2131 	n = copy_to_user(buf, p->buf + pos, len);
2132 	if (n) {
2133 		if (n == len)
2134 			return -EFAULT;
2135 		len -= n;
2136 	}
2137 	*ppos = pos + len;
2138 	return len;
2139 }
2140 
2141 static ssize_t debugfs_timings_write(struct file *file, const char __user *buf,
2142 				     size_t len, loff_t *ppos)
2143 {
2144 	return -EACCES;
2145 }
2146 
2147 static const struct file_operations debugfs_timings_ops = {
2148 	.owner	 = THIS_MODULE,
2149 	.open	 = debugfs_timings_open,
2150 	.release = debugfs_timings_release,
2151 	.read	 = debugfs_timings_read,
2152 	.write	 = debugfs_timings_write,
2153 	.llseek	 = generic_file_llseek,
2154 };
2155 
2156 /* Create a debugfs directory for the vcpu */
2157 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id)
2158 {
2159 	char buf[16];
2160 	struct kvm *kvm = vcpu->kvm;
2161 
2162 	snprintf(buf, sizeof(buf), "vcpu%u", id);
2163 	if (IS_ERR_OR_NULL(kvm->arch.debugfs_dir))
2164 		return;
2165 	vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir);
2166 	if (IS_ERR_OR_NULL(vcpu->arch.debugfs_dir))
2167 		return;
2168 	vcpu->arch.debugfs_timings =
2169 		debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir,
2170 				    vcpu, &debugfs_timings_ops);
2171 }
2172 
2173 #else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
2174 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id)
2175 {
2176 }
2177 #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
2178 
2179 static struct kvm_vcpu *kvmppc_core_vcpu_create_hv(struct kvm *kvm,
2180 						   unsigned int id)
2181 {
2182 	struct kvm_vcpu *vcpu;
2183 	int err;
2184 	int core;
2185 	struct kvmppc_vcore *vcore;
2186 
2187 	err = -ENOMEM;
2188 	vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL);
2189 	if (!vcpu)
2190 		goto out;
2191 
2192 	err = kvm_vcpu_init(vcpu, kvm, id);
2193 	if (err)
2194 		goto free_vcpu;
2195 
2196 	vcpu->arch.shared = &vcpu->arch.shregs;
2197 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
2198 	/*
2199 	 * The shared struct is never shared on HV,
2200 	 * so we can always use host endianness
2201 	 */
2202 #ifdef __BIG_ENDIAN__
2203 	vcpu->arch.shared_big_endian = true;
2204 #else
2205 	vcpu->arch.shared_big_endian = false;
2206 #endif
2207 #endif
2208 	vcpu->arch.mmcr[0] = MMCR0_FC;
2209 	vcpu->arch.ctrl = CTRL_RUNLATCH;
2210 	/* default to host PVR, since we can't spoof it */
2211 	kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR));
2212 	spin_lock_init(&vcpu->arch.vpa_update_lock);
2213 	spin_lock_init(&vcpu->arch.tbacct_lock);
2214 	vcpu->arch.busy_preempt = TB_NIL;
2215 	vcpu->arch.intr_msr = MSR_SF | MSR_ME;
2216 
2217 	/*
2218 	 * Set the default HFSCR for the guest from the host value.
2219 	 * This value is only used on POWER9.
2220 	 * On POWER9, we want to virtualize the doorbell facility, so we
2221 	 * don't set the HFSCR_MSGP bit, and that causes those instructions
2222 	 * to trap and then we emulate them.
2223 	 */
2224 	vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB |
2225 		HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP;
2226 	if (cpu_has_feature(CPU_FTR_HVMODE)) {
2227 		vcpu->arch.hfscr &= mfspr(SPRN_HFSCR);
2228 		if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
2229 			vcpu->arch.hfscr |= HFSCR_TM;
2230 	}
2231 	if (cpu_has_feature(CPU_FTR_TM_COMP))
2232 		vcpu->arch.hfscr |= HFSCR_TM;
2233 
2234 	kvmppc_mmu_book3s_hv_init(vcpu);
2235 
2236 	vcpu->arch.state = KVMPPC_VCPU_NOTREADY;
2237 
2238 	init_waitqueue_head(&vcpu->arch.cpu_run);
2239 
2240 	mutex_lock(&kvm->lock);
2241 	vcore = NULL;
2242 	err = -EINVAL;
2243 	if (cpu_has_feature(CPU_FTR_ARCH_300)) {
2244 		if (id >= (KVM_MAX_VCPUS * kvm->arch.emul_smt_mode)) {
2245 			pr_devel("KVM: VCPU ID too high\n");
2246 			core = KVM_MAX_VCORES;
2247 		} else {
2248 			BUG_ON(kvm->arch.smt_mode != 1);
2249 			core = kvmppc_pack_vcpu_id(kvm, id);
2250 		}
2251 	} else {
2252 		core = id / kvm->arch.smt_mode;
2253 	}
2254 	if (core < KVM_MAX_VCORES) {
2255 		vcore = kvm->arch.vcores[core];
2256 		if (vcore && cpu_has_feature(CPU_FTR_ARCH_300)) {
2257 			pr_devel("KVM: collision on id %u", id);
2258 			vcore = NULL;
2259 		} else if (!vcore) {
2260 			err = -ENOMEM;
2261 			vcore = kvmppc_vcore_create(kvm,
2262 					id & ~(kvm->arch.smt_mode - 1));
2263 			kvm->arch.vcores[core] = vcore;
2264 			kvm->arch.online_vcores++;
2265 		}
2266 	}
2267 	mutex_unlock(&kvm->lock);
2268 
2269 	if (!vcore)
2270 		goto free_vcpu;
2271 
2272 	spin_lock(&vcore->lock);
2273 	++vcore->num_threads;
2274 	spin_unlock(&vcore->lock);
2275 	vcpu->arch.vcore = vcore;
2276 	vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid;
2277 	vcpu->arch.thread_cpu = -1;
2278 	vcpu->arch.prev_cpu = -1;
2279 
2280 	vcpu->arch.cpu_type = KVM_CPU_3S_64;
2281 	kvmppc_sanity_check(vcpu);
2282 
2283 	debugfs_vcpu_init(vcpu, id);
2284 
2285 	return vcpu;
2286 
2287 free_vcpu:
2288 	kmem_cache_free(kvm_vcpu_cache, vcpu);
2289 out:
2290 	return ERR_PTR(err);
2291 }
2292 
2293 static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode,
2294 			      unsigned long flags)
2295 {
2296 	int err;
2297 	int esmt = 0;
2298 
2299 	if (flags)
2300 		return -EINVAL;
2301 	if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode))
2302 		return -EINVAL;
2303 	if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
2304 		/*
2305 		 * On POWER8 (or POWER7), the threading mode is "strict",
2306 		 * so we pack smt_mode vcpus per vcore.
2307 		 */
2308 		if (smt_mode > threads_per_subcore)
2309 			return -EINVAL;
2310 	} else {
2311 		/*
2312 		 * On POWER9, the threading mode is "loose",
2313 		 * so each vcpu gets its own vcore.
2314 		 */
2315 		esmt = smt_mode;
2316 		smt_mode = 1;
2317 	}
2318 	mutex_lock(&kvm->lock);
2319 	err = -EBUSY;
2320 	if (!kvm->arch.online_vcores) {
2321 		kvm->arch.smt_mode = smt_mode;
2322 		kvm->arch.emul_smt_mode = esmt;
2323 		err = 0;
2324 	}
2325 	mutex_unlock(&kvm->lock);
2326 
2327 	return err;
2328 }
2329 
2330 static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa)
2331 {
2332 	if (vpa->pinned_addr)
2333 		kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa,
2334 					vpa->dirty);
2335 }
2336 
2337 static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu)
2338 {
2339 	spin_lock(&vcpu->arch.vpa_update_lock);
2340 	unpin_vpa(vcpu->kvm, &vcpu->arch.dtl);
2341 	unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow);
2342 	unpin_vpa(vcpu->kvm, &vcpu->arch.vpa);
2343 	spin_unlock(&vcpu->arch.vpa_update_lock);
2344 	kvm_vcpu_uninit(vcpu);
2345 	kmem_cache_free(kvm_vcpu_cache, vcpu);
2346 }
2347 
2348 static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu)
2349 {
2350 	/* Indicate we want to get back into the guest */
2351 	return 1;
2352 }
2353 
2354 static void kvmppc_set_timer(struct kvm_vcpu *vcpu)
2355 {
2356 	unsigned long dec_nsec, now;
2357 
2358 	now = get_tb();
2359 	if (now > vcpu->arch.dec_expires) {
2360 		/* decrementer has already gone negative */
2361 		kvmppc_core_queue_dec(vcpu);
2362 		kvmppc_core_prepare_to_enter(vcpu);
2363 		return;
2364 	}
2365 	dec_nsec = tb_to_ns(vcpu->arch.dec_expires - now);
2366 	hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL);
2367 	vcpu->arch.timer_running = 1;
2368 }
2369 
2370 static void kvmppc_end_cede(struct kvm_vcpu *vcpu)
2371 {
2372 	vcpu->arch.ceded = 0;
2373 	if (vcpu->arch.timer_running) {
2374 		hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
2375 		vcpu->arch.timer_running = 0;
2376 	}
2377 }
2378 
2379 extern int __kvmppc_vcore_entry(void);
2380 
2381 static void kvmppc_remove_runnable(struct kvmppc_vcore *vc,
2382 				   struct kvm_vcpu *vcpu)
2383 {
2384 	u64 now;
2385 
2386 	if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE)
2387 		return;
2388 	spin_lock_irq(&vcpu->arch.tbacct_lock);
2389 	now = mftb();
2390 	vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) -
2391 		vcpu->arch.stolen_logged;
2392 	vcpu->arch.busy_preempt = now;
2393 	vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
2394 	spin_unlock_irq(&vcpu->arch.tbacct_lock);
2395 	--vc->n_runnable;
2396 	WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL);
2397 }
2398 
2399 static int kvmppc_grab_hwthread(int cpu)
2400 {
2401 	struct paca_struct *tpaca;
2402 	long timeout = 10000;
2403 
2404 	tpaca = paca_ptrs[cpu];
2405 
2406 	/* Ensure the thread won't go into the kernel if it wakes */
2407 	tpaca->kvm_hstate.kvm_vcpu = NULL;
2408 	tpaca->kvm_hstate.kvm_vcore = NULL;
2409 	tpaca->kvm_hstate.napping = 0;
2410 	smp_wmb();
2411 	tpaca->kvm_hstate.hwthread_req = 1;
2412 
2413 	/*
2414 	 * If the thread is already executing in the kernel (e.g. handling
2415 	 * a stray interrupt), wait for it to get back to nap mode.
2416 	 * The smp_mb() is to ensure that our setting of hwthread_req
2417 	 * is visible before we look at hwthread_state, so if this
2418 	 * races with the code at system_reset_pSeries and the thread
2419 	 * misses our setting of hwthread_req, we are sure to see its
2420 	 * setting of hwthread_state, and vice versa.
2421 	 */
2422 	smp_mb();
2423 	while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) {
2424 		if (--timeout <= 0) {
2425 			pr_err("KVM: couldn't grab cpu %d\n", cpu);
2426 			return -EBUSY;
2427 		}
2428 		udelay(1);
2429 	}
2430 	return 0;
2431 }
2432 
2433 static void kvmppc_release_hwthread(int cpu)
2434 {
2435 	struct paca_struct *tpaca;
2436 
2437 	tpaca = paca_ptrs[cpu];
2438 	tpaca->kvm_hstate.hwthread_req = 0;
2439 	tpaca->kvm_hstate.kvm_vcpu = NULL;
2440 	tpaca->kvm_hstate.kvm_vcore = NULL;
2441 	tpaca->kvm_hstate.kvm_split_mode = NULL;
2442 }
2443 
2444 static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu)
2445 {
2446 	struct kvm_nested_guest *nested = vcpu->arch.nested;
2447 	cpumask_t *cpu_in_guest;
2448 	int i;
2449 
2450 	cpu = cpu_first_thread_sibling(cpu);
2451 	if (nested) {
2452 		cpumask_set_cpu(cpu, &nested->need_tlb_flush);
2453 		cpu_in_guest = &nested->cpu_in_guest;
2454 	} else {
2455 		cpumask_set_cpu(cpu, &kvm->arch.need_tlb_flush);
2456 		cpu_in_guest = &kvm->arch.cpu_in_guest;
2457 	}
2458 	/*
2459 	 * Make sure setting of bit in need_tlb_flush precedes
2460 	 * testing of cpu_in_guest bits.  The matching barrier on
2461 	 * the other side is the first smp_mb() in kvmppc_run_core().
2462 	 */
2463 	smp_mb();
2464 	for (i = 0; i < threads_per_core; ++i)
2465 		if (cpumask_test_cpu(cpu + i, cpu_in_guest))
2466 			smp_call_function_single(cpu + i, do_nothing, NULL, 1);
2467 }
2468 
2469 static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu)
2470 {
2471 	struct kvm_nested_guest *nested = vcpu->arch.nested;
2472 	struct kvm *kvm = vcpu->kvm;
2473 	int prev_cpu;
2474 
2475 	if (!cpu_has_feature(CPU_FTR_HVMODE))
2476 		return;
2477 
2478 	if (nested)
2479 		prev_cpu = nested->prev_cpu[vcpu->arch.nested_vcpu_id];
2480 	else
2481 		prev_cpu = vcpu->arch.prev_cpu;
2482 
2483 	/*
2484 	 * With radix, the guest can do TLB invalidations itself,
2485 	 * and it could choose to use the local form (tlbiel) if
2486 	 * it is invalidating a translation that has only ever been
2487 	 * used on one vcpu.  However, that doesn't mean it has
2488 	 * only ever been used on one physical cpu, since vcpus
2489 	 * can move around between pcpus.  To cope with this, when
2490 	 * a vcpu moves from one pcpu to another, we need to tell
2491 	 * any vcpus running on the same core as this vcpu previously
2492 	 * ran to flush the TLB.  The TLB is shared between threads,
2493 	 * so we use a single bit in .need_tlb_flush for all 4 threads.
2494 	 */
2495 	if (prev_cpu != pcpu) {
2496 		if (prev_cpu >= 0 &&
2497 		    cpu_first_thread_sibling(prev_cpu) !=
2498 		    cpu_first_thread_sibling(pcpu))
2499 			radix_flush_cpu(kvm, prev_cpu, vcpu);
2500 		if (nested)
2501 			nested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu;
2502 		else
2503 			vcpu->arch.prev_cpu = pcpu;
2504 	}
2505 }
2506 
2507 static void kvmppc_radix_check_need_tlb_flush(struct kvm *kvm, int pcpu,
2508 					      struct kvm_nested_guest *nested)
2509 {
2510 	cpumask_t *need_tlb_flush;
2511 	int lpid;
2512 
2513 	if (!cpu_has_feature(CPU_FTR_HVMODE))
2514 		return;
2515 
2516 	if (cpu_has_feature(CPU_FTR_ARCH_300))
2517 		pcpu &= ~0x3UL;
2518 
2519 	if (nested) {
2520 		lpid = nested->shadow_lpid;
2521 		need_tlb_flush = &nested->need_tlb_flush;
2522 	} else {
2523 		lpid = kvm->arch.lpid;
2524 		need_tlb_flush = &kvm->arch.need_tlb_flush;
2525 	}
2526 
2527 	mtspr(SPRN_LPID, lpid);
2528 	isync();
2529 	smp_mb();
2530 
2531 	if (cpumask_test_cpu(pcpu, need_tlb_flush)) {
2532 		radix__local_flush_tlb_lpid_guest(lpid);
2533 		/* Clear the bit after the TLB flush */
2534 		cpumask_clear_cpu(pcpu, need_tlb_flush);
2535 	}
2536 }
2537 
2538 static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc)
2539 {
2540 	int cpu;
2541 	struct paca_struct *tpaca;
2542 	struct kvm *kvm = vc->kvm;
2543 
2544 	cpu = vc->pcpu;
2545 	if (vcpu) {
2546 		if (vcpu->arch.timer_running) {
2547 			hrtimer_try_to_cancel(&vcpu->arch.dec_timer);
2548 			vcpu->arch.timer_running = 0;
2549 		}
2550 		cpu += vcpu->arch.ptid;
2551 		vcpu->cpu = vc->pcpu;
2552 		vcpu->arch.thread_cpu = cpu;
2553 		cpumask_set_cpu(cpu, &kvm->arch.cpu_in_guest);
2554 	}
2555 	tpaca = paca_ptrs[cpu];
2556 	tpaca->kvm_hstate.kvm_vcpu = vcpu;
2557 	tpaca->kvm_hstate.ptid = cpu - vc->pcpu;
2558 	tpaca->kvm_hstate.fake_suspend = 0;
2559 	/* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */
2560 	smp_wmb();
2561 	tpaca->kvm_hstate.kvm_vcore = vc;
2562 	if (cpu != smp_processor_id())
2563 		kvmppc_ipi_thread(cpu);
2564 }
2565 
2566 static void kvmppc_wait_for_nap(int n_threads)
2567 {
2568 	int cpu = smp_processor_id();
2569 	int i, loops;
2570 
2571 	if (n_threads <= 1)
2572 		return;
2573 	for (loops = 0; loops < 1000000; ++loops) {
2574 		/*
2575 		 * Check if all threads are finished.
2576 		 * We set the vcore pointer when starting a thread
2577 		 * and the thread clears it when finished, so we look
2578 		 * for any threads that still have a non-NULL vcore ptr.
2579 		 */
2580 		for (i = 1; i < n_threads; ++i)
2581 			if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore)
2582 				break;
2583 		if (i == n_threads) {
2584 			HMT_medium();
2585 			return;
2586 		}
2587 		HMT_low();
2588 	}
2589 	HMT_medium();
2590 	for (i = 1; i < n_threads; ++i)
2591 		if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore)
2592 			pr_err("KVM: CPU %d seems to be stuck\n", cpu + i);
2593 }
2594 
2595 /*
2596  * Check that we are on thread 0 and that any other threads in
2597  * this core are off-line.  Then grab the threads so they can't
2598  * enter the kernel.
2599  */
2600 static int on_primary_thread(void)
2601 {
2602 	int cpu = smp_processor_id();
2603 	int thr;
2604 
2605 	/* Are we on a primary subcore? */
2606 	if (cpu_thread_in_subcore(cpu))
2607 		return 0;
2608 
2609 	thr = 0;
2610 	while (++thr < threads_per_subcore)
2611 		if (cpu_online(cpu + thr))
2612 			return 0;
2613 
2614 	/* Grab all hw threads so they can't go into the kernel */
2615 	for (thr = 1; thr < threads_per_subcore; ++thr) {
2616 		if (kvmppc_grab_hwthread(cpu + thr)) {
2617 			/* Couldn't grab one; let the others go */
2618 			do {
2619 				kvmppc_release_hwthread(cpu + thr);
2620 			} while (--thr > 0);
2621 			return 0;
2622 		}
2623 	}
2624 	return 1;
2625 }
2626 
2627 /*
2628  * A list of virtual cores for each physical CPU.
2629  * These are vcores that could run but their runner VCPU tasks are
2630  * (or may be) preempted.
2631  */
2632 struct preempted_vcore_list {
2633 	struct list_head	list;
2634 	spinlock_t		lock;
2635 };
2636 
2637 static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores);
2638 
2639 static void init_vcore_lists(void)
2640 {
2641 	int cpu;
2642 
2643 	for_each_possible_cpu(cpu) {
2644 		struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu);
2645 		spin_lock_init(&lp->lock);
2646 		INIT_LIST_HEAD(&lp->list);
2647 	}
2648 }
2649 
2650 static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc)
2651 {
2652 	struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores);
2653 
2654 	vc->vcore_state = VCORE_PREEMPT;
2655 	vc->pcpu = smp_processor_id();
2656 	if (vc->num_threads < threads_per_vcore(vc->kvm)) {
2657 		spin_lock(&lp->lock);
2658 		list_add_tail(&vc->preempt_list, &lp->list);
2659 		spin_unlock(&lp->lock);
2660 	}
2661 
2662 	/* Start accumulating stolen time */
2663 	kvmppc_core_start_stolen(vc);
2664 }
2665 
2666 static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc)
2667 {
2668 	struct preempted_vcore_list *lp;
2669 
2670 	kvmppc_core_end_stolen(vc);
2671 	if (!list_empty(&vc->preempt_list)) {
2672 		lp = &per_cpu(preempted_vcores, vc->pcpu);
2673 		spin_lock(&lp->lock);
2674 		list_del_init(&vc->preempt_list);
2675 		spin_unlock(&lp->lock);
2676 	}
2677 	vc->vcore_state = VCORE_INACTIVE;
2678 }
2679 
2680 /*
2681  * This stores information about the virtual cores currently
2682  * assigned to a physical core.
2683  */
2684 struct core_info {
2685 	int		n_subcores;
2686 	int		max_subcore_threads;
2687 	int		total_threads;
2688 	int		subcore_threads[MAX_SUBCORES];
2689 	struct kvmppc_vcore *vc[MAX_SUBCORES];
2690 };
2691 
2692 /*
2693  * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7
2694  * respectively in 2-way micro-threading (split-core) mode on POWER8.
2695  */
2696 static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 };
2697 
2698 static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc)
2699 {
2700 	memset(cip, 0, sizeof(*cip));
2701 	cip->n_subcores = 1;
2702 	cip->max_subcore_threads = vc->num_threads;
2703 	cip->total_threads = vc->num_threads;
2704 	cip->subcore_threads[0] = vc->num_threads;
2705 	cip->vc[0] = vc;
2706 }
2707 
2708 static bool subcore_config_ok(int n_subcores, int n_threads)
2709 {
2710 	/*
2711 	 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way
2712 	 * split-core mode, with one thread per subcore.
2713 	 */
2714 	if (cpu_has_feature(CPU_FTR_ARCH_300))
2715 		return n_subcores <= 4 && n_threads == 1;
2716 
2717 	/* On POWER8, can only dynamically split if unsplit to begin with */
2718 	if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS)
2719 		return false;
2720 	if (n_subcores > MAX_SUBCORES)
2721 		return false;
2722 	if (n_subcores > 1) {
2723 		if (!(dynamic_mt_modes & 2))
2724 			n_subcores = 4;
2725 		if (n_subcores > 2 && !(dynamic_mt_modes & 4))
2726 			return false;
2727 	}
2728 
2729 	return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS;
2730 }
2731 
2732 static void init_vcore_to_run(struct kvmppc_vcore *vc)
2733 {
2734 	vc->entry_exit_map = 0;
2735 	vc->in_guest = 0;
2736 	vc->napping_threads = 0;
2737 	vc->conferring_threads = 0;
2738 	vc->tb_offset_applied = 0;
2739 }
2740 
2741 static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip)
2742 {
2743 	int n_threads = vc->num_threads;
2744 	int sub;
2745 
2746 	if (!cpu_has_feature(CPU_FTR_ARCH_207S))
2747 		return false;
2748 
2749 	/* In one_vm_per_core mode, require all vcores to be from the same vm */
2750 	if (one_vm_per_core && vc->kvm != cip->vc[0]->kvm)
2751 		return false;
2752 
2753 	/* Some POWER9 chips require all threads to be in the same MMU mode */
2754 	if (no_mixing_hpt_and_radix &&
2755 	    kvm_is_radix(vc->kvm) != kvm_is_radix(cip->vc[0]->kvm))
2756 		return false;
2757 
2758 	if (n_threads < cip->max_subcore_threads)
2759 		n_threads = cip->max_subcore_threads;
2760 	if (!subcore_config_ok(cip->n_subcores + 1, n_threads))
2761 		return false;
2762 	cip->max_subcore_threads = n_threads;
2763 
2764 	sub = cip->n_subcores;
2765 	++cip->n_subcores;
2766 	cip->total_threads += vc->num_threads;
2767 	cip->subcore_threads[sub] = vc->num_threads;
2768 	cip->vc[sub] = vc;
2769 	init_vcore_to_run(vc);
2770 	list_del_init(&vc->preempt_list);
2771 
2772 	return true;
2773 }
2774 
2775 /*
2776  * Work out whether it is possible to piggyback the execution of
2777  * vcore *pvc onto the execution of the other vcores described in *cip.
2778  */
2779 static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip,
2780 			  int target_threads)
2781 {
2782 	if (cip->total_threads + pvc->num_threads > target_threads)
2783 		return false;
2784 
2785 	return can_dynamic_split(pvc, cip);
2786 }
2787 
2788 static void prepare_threads(struct kvmppc_vcore *vc)
2789 {
2790 	int i;
2791 	struct kvm_vcpu *vcpu;
2792 
2793 	for_each_runnable_thread(i, vcpu, vc) {
2794 		if (signal_pending(vcpu->arch.run_task))
2795 			vcpu->arch.ret = -EINTR;
2796 		else if (vcpu->arch.vpa.update_pending ||
2797 			 vcpu->arch.slb_shadow.update_pending ||
2798 			 vcpu->arch.dtl.update_pending)
2799 			vcpu->arch.ret = RESUME_GUEST;
2800 		else
2801 			continue;
2802 		kvmppc_remove_runnable(vc, vcpu);
2803 		wake_up(&vcpu->arch.cpu_run);
2804 	}
2805 }
2806 
2807 static void collect_piggybacks(struct core_info *cip, int target_threads)
2808 {
2809 	struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores);
2810 	struct kvmppc_vcore *pvc, *vcnext;
2811 
2812 	spin_lock(&lp->lock);
2813 	list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) {
2814 		if (!spin_trylock(&pvc->lock))
2815 			continue;
2816 		prepare_threads(pvc);
2817 		if (!pvc->n_runnable) {
2818 			list_del_init(&pvc->preempt_list);
2819 			if (pvc->runner == NULL) {
2820 				pvc->vcore_state = VCORE_INACTIVE;
2821 				kvmppc_core_end_stolen(pvc);
2822 			}
2823 			spin_unlock(&pvc->lock);
2824 			continue;
2825 		}
2826 		if (!can_piggyback(pvc, cip, target_threads)) {
2827 			spin_unlock(&pvc->lock);
2828 			continue;
2829 		}
2830 		kvmppc_core_end_stolen(pvc);
2831 		pvc->vcore_state = VCORE_PIGGYBACK;
2832 		if (cip->total_threads >= target_threads)
2833 			break;
2834 	}
2835 	spin_unlock(&lp->lock);
2836 }
2837 
2838 static bool recheck_signals(struct core_info *cip)
2839 {
2840 	int sub, i;
2841 	struct kvm_vcpu *vcpu;
2842 
2843 	for (sub = 0; sub < cip->n_subcores; ++sub)
2844 		for_each_runnable_thread(i, vcpu, cip->vc[sub])
2845 			if (signal_pending(vcpu->arch.run_task))
2846 				return true;
2847 	return false;
2848 }
2849 
2850 static void post_guest_process(struct kvmppc_vcore *vc, bool is_master)
2851 {
2852 	int still_running = 0, i;
2853 	u64 now;
2854 	long ret;
2855 	struct kvm_vcpu *vcpu;
2856 
2857 	spin_lock(&vc->lock);
2858 	now = get_tb();
2859 	for_each_runnable_thread(i, vcpu, vc) {
2860 		/*
2861 		 * It's safe to unlock the vcore in the loop here, because
2862 		 * for_each_runnable_thread() is safe against removal of
2863 		 * the vcpu, and the vcore state is VCORE_EXITING here,
2864 		 * so any vcpus becoming runnable will have their arch.trap
2865 		 * set to zero and can't actually run in the guest.
2866 		 */
2867 		spin_unlock(&vc->lock);
2868 		/* cancel pending dec exception if dec is positive */
2869 		if (now < vcpu->arch.dec_expires &&
2870 		    kvmppc_core_pending_dec(vcpu))
2871 			kvmppc_core_dequeue_dec(vcpu);
2872 
2873 		trace_kvm_guest_exit(vcpu);
2874 
2875 		ret = RESUME_GUEST;
2876 		if (vcpu->arch.trap)
2877 			ret = kvmppc_handle_exit_hv(vcpu->arch.kvm_run, vcpu,
2878 						    vcpu->arch.run_task);
2879 
2880 		vcpu->arch.ret = ret;
2881 		vcpu->arch.trap = 0;
2882 
2883 		spin_lock(&vc->lock);
2884 		if (is_kvmppc_resume_guest(vcpu->arch.ret)) {
2885 			if (vcpu->arch.pending_exceptions)
2886 				kvmppc_core_prepare_to_enter(vcpu);
2887 			if (vcpu->arch.ceded)
2888 				kvmppc_set_timer(vcpu);
2889 			else
2890 				++still_running;
2891 		} else {
2892 			kvmppc_remove_runnable(vc, vcpu);
2893 			wake_up(&vcpu->arch.cpu_run);
2894 		}
2895 	}
2896 	if (!is_master) {
2897 		if (still_running > 0) {
2898 			kvmppc_vcore_preempt(vc);
2899 		} else if (vc->runner) {
2900 			vc->vcore_state = VCORE_PREEMPT;
2901 			kvmppc_core_start_stolen(vc);
2902 		} else {
2903 			vc->vcore_state = VCORE_INACTIVE;
2904 		}
2905 		if (vc->n_runnable > 0 && vc->runner == NULL) {
2906 			/* make sure there's a candidate runner awake */
2907 			i = -1;
2908 			vcpu = next_runnable_thread(vc, &i);
2909 			wake_up(&vcpu->arch.cpu_run);
2910 		}
2911 	}
2912 	spin_unlock(&vc->lock);
2913 }
2914 
2915 /*
2916  * Clear core from the list of active host cores as we are about to
2917  * enter the guest. Only do this if it is the primary thread of the
2918  * core (not if a subcore) that is entering the guest.
2919  */
2920 static inline int kvmppc_clear_host_core(unsigned int cpu)
2921 {
2922 	int core;
2923 
2924 	if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu))
2925 		return 0;
2926 	/*
2927 	 * Memory barrier can be omitted here as we will do a smp_wmb()
2928 	 * later in kvmppc_start_thread and we need ensure that state is
2929 	 * visible to other CPUs only after we enter guest.
2930 	 */
2931 	core = cpu >> threads_shift;
2932 	kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0;
2933 	return 0;
2934 }
2935 
2936 /*
2937  * Advertise this core as an active host core since we exited the guest
2938  * Only need to do this if it is the primary thread of the core that is
2939  * exiting.
2940  */
2941 static inline int kvmppc_set_host_core(unsigned int cpu)
2942 {
2943 	int core;
2944 
2945 	if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu))
2946 		return 0;
2947 
2948 	/*
2949 	 * Memory barrier can be omitted here because we do a spin_unlock
2950 	 * immediately after this which provides the memory barrier.
2951 	 */
2952 	core = cpu >> threads_shift;
2953 	kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1;
2954 	return 0;
2955 }
2956 
2957 static void set_irq_happened(int trap)
2958 {
2959 	switch (trap) {
2960 	case BOOK3S_INTERRUPT_EXTERNAL:
2961 		local_paca->irq_happened |= PACA_IRQ_EE;
2962 		break;
2963 	case BOOK3S_INTERRUPT_H_DOORBELL:
2964 		local_paca->irq_happened |= PACA_IRQ_DBELL;
2965 		break;
2966 	case BOOK3S_INTERRUPT_HMI:
2967 		local_paca->irq_happened |= PACA_IRQ_HMI;
2968 		break;
2969 	case BOOK3S_INTERRUPT_SYSTEM_RESET:
2970 		replay_system_reset();
2971 		break;
2972 	}
2973 }
2974 
2975 /*
2976  * Run a set of guest threads on a physical core.
2977  * Called with vc->lock held.
2978  */
2979 static noinline void kvmppc_run_core(struct kvmppc_vcore *vc)
2980 {
2981 	struct kvm_vcpu *vcpu;
2982 	int i;
2983 	int srcu_idx;
2984 	struct core_info core_info;
2985 	struct kvmppc_vcore *pvc;
2986 	struct kvm_split_mode split_info, *sip;
2987 	int split, subcore_size, active;
2988 	int sub;
2989 	bool thr0_done;
2990 	unsigned long cmd_bit, stat_bit;
2991 	int pcpu, thr;
2992 	int target_threads;
2993 	int controlled_threads;
2994 	int trap;
2995 	bool is_power8;
2996 	bool hpt_on_radix;
2997 
2998 	/*
2999 	 * Remove from the list any threads that have a signal pending
3000 	 * or need a VPA update done
3001 	 */
3002 	prepare_threads(vc);
3003 
3004 	/* if the runner is no longer runnable, let the caller pick a new one */
3005 	if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE)
3006 		return;
3007 
3008 	/*
3009 	 * Initialize *vc.
3010 	 */
3011 	init_vcore_to_run(vc);
3012 	vc->preempt_tb = TB_NIL;
3013 
3014 	/*
3015 	 * Number of threads that we will be controlling: the same as
3016 	 * the number of threads per subcore, except on POWER9,
3017 	 * where it's 1 because the threads are (mostly) independent.
3018 	 */
3019 	controlled_threads = threads_per_vcore(vc->kvm);
3020 
3021 	/*
3022 	 * Make sure we are running on primary threads, and that secondary
3023 	 * threads are offline.  Also check if the number of threads in this
3024 	 * guest are greater than the current system threads per guest.
3025 	 * On POWER9, we need to be not in independent-threads mode if
3026 	 * this is a HPT guest on a radix host machine where the
3027 	 * CPU threads may not be in different MMU modes.
3028 	 */
3029 	hpt_on_radix = no_mixing_hpt_and_radix && radix_enabled() &&
3030 		!kvm_is_radix(vc->kvm);
3031 	if (((controlled_threads > 1) &&
3032 	     ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) ||
3033 	    (hpt_on_radix && vc->kvm->arch.threads_indep)) {
3034 		for_each_runnable_thread(i, vcpu, vc) {
3035 			vcpu->arch.ret = -EBUSY;
3036 			kvmppc_remove_runnable(vc, vcpu);
3037 			wake_up(&vcpu->arch.cpu_run);
3038 		}
3039 		goto out;
3040 	}
3041 
3042 	/*
3043 	 * See if we could run any other vcores on the physical core
3044 	 * along with this one.
3045 	 */
3046 	init_core_info(&core_info, vc);
3047 	pcpu = smp_processor_id();
3048 	target_threads = controlled_threads;
3049 	if (target_smt_mode && target_smt_mode < target_threads)
3050 		target_threads = target_smt_mode;
3051 	if (vc->num_threads < target_threads)
3052 		collect_piggybacks(&core_info, target_threads);
3053 
3054 	/*
3055 	 * On radix, arrange for TLB flushing if necessary.
3056 	 * This has to be done before disabling interrupts since
3057 	 * it uses smp_call_function().
3058 	 */
3059 	pcpu = smp_processor_id();
3060 	if (kvm_is_radix(vc->kvm)) {
3061 		for (sub = 0; sub < core_info.n_subcores; ++sub)
3062 			for_each_runnable_thread(i, vcpu, core_info.vc[sub])
3063 				kvmppc_prepare_radix_vcpu(vcpu, pcpu);
3064 	}
3065 
3066 	/*
3067 	 * Hard-disable interrupts, and check resched flag and signals.
3068 	 * If we need to reschedule or deliver a signal, clean up
3069 	 * and return without going into the guest(s).
3070 	 * If the mmu_ready flag has been cleared, don't go into the
3071 	 * guest because that means a HPT resize operation is in progress.
3072 	 */
3073 	local_irq_disable();
3074 	hard_irq_disable();
3075 	if (lazy_irq_pending() || need_resched() ||
3076 	    recheck_signals(&core_info) || !vc->kvm->arch.mmu_ready) {
3077 		local_irq_enable();
3078 		vc->vcore_state = VCORE_INACTIVE;
3079 		/* Unlock all except the primary vcore */
3080 		for (sub = 1; sub < core_info.n_subcores; ++sub) {
3081 			pvc = core_info.vc[sub];
3082 			/* Put back on to the preempted vcores list */
3083 			kvmppc_vcore_preempt(pvc);
3084 			spin_unlock(&pvc->lock);
3085 		}
3086 		for (i = 0; i < controlled_threads; ++i)
3087 			kvmppc_release_hwthread(pcpu + i);
3088 		return;
3089 	}
3090 
3091 	kvmppc_clear_host_core(pcpu);
3092 
3093 	/* Decide on micro-threading (split-core) mode */
3094 	subcore_size = threads_per_subcore;
3095 	cmd_bit = stat_bit = 0;
3096 	split = core_info.n_subcores;
3097 	sip = NULL;
3098 	is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S)
3099 		&& !cpu_has_feature(CPU_FTR_ARCH_300);
3100 
3101 	if (split > 1 || hpt_on_radix) {
3102 		sip = &split_info;
3103 		memset(&split_info, 0, sizeof(split_info));
3104 		for (sub = 0; sub < core_info.n_subcores; ++sub)
3105 			split_info.vc[sub] = core_info.vc[sub];
3106 
3107 		if (is_power8) {
3108 			if (split == 2 && (dynamic_mt_modes & 2)) {
3109 				cmd_bit = HID0_POWER8_1TO2LPAR;
3110 				stat_bit = HID0_POWER8_2LPARMODE;
3111 			} else {
3112 				split = 4;
3113 				cmd_bit = HID0_POWER8_1TO4LPAR;
3114 				stat_bit = HID0_POWER8_4LPARMODE;
3115 			}
3116 			subcore_size = MAX_SMT_THREADS / split;
3117 			split_info.rpr = mfspr(SPRN_RPR);
3118 			split_info.pmmar = mfspr(SPRN_PMMAR);
3119 			split_info.ldbar = mfspr(SPRN_LDBAR);
3120 			split_info.subcore_size = subcore_size;
3121 		} else {
3122 			split_info.subcore_size = 1;
3123 			if (hpt_on_radix) {
3124 				/* Use the split_info for LPCR/LPIDR changes */
3125 				split_info.lpcr_req = vc->lpcr;
3126 				split_info.lpidr_req = vc->kvm->arch.lpid;
3127 				split_info.host_lpcr = vc->kvm->arch.host_lpcr;
3128 				split_info.do_set = 1;
3129 			}
3130 		}
3131 
3132 		/* order writes to split_info before kvm_split_mode pointer */
3133 		smp_wmb();
3134 	}
3135 
3136 	for (thr = 0; thr < controlled_threads; ++thr) {
3137 		struct paca_struct *paca = paca_ptrs[pcpu + thr];
3138 
3139 		paca->kvm_hstate.tid = thr;
3140 		paca->kvm_hstate.napping = 0;
3141 		paca->kvm_hstate.kvm_split_mode = sip;
3142 	}
3143 
3144 	/* Initiate micro-threading (split-core) on POWER8 if required */
3145 	if (cmd_bit) {
3146 		unsigned long hid0 = mfspr(SPRN_HID0);
3147 
3148 		hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS;
3149 		mb();
3150 		mtspr(SPRN_HID0, hid0);
3151 		isync();
3152 		for (;;) {
3153 			hid0 = mfspr(SPRN_HID0);
3154 			if (hid0 & stat_bit)
3155 				break;
3156 			cpu_relax();
3157 		}
3158 	}
3159 
3160 	/*
3161 	 * On POWER8, set RWMR register.
3162 	 * Since it only affects PURR and SPURR, it doesn't affect
3163 	 * the host, so we don't save/restore the host value.
3164 	 */
3165 	if (is_power8) {
3166 		unsigned long rwmr_val = RWMR_RPA_P8_8THREAD;
3167 		int n_online = atomic_read(&vc->online_count);
3168 
3169 		/*
3170 		 * Use the 8-thread value if we're doing split-core
3171 		 * or if the vcore's online count looks bogus.
3172 		 */
3173 		if (split == 1 && threads_per_subcore == MAX_SMT_THREADS &&
3174 		    n_online >= 1 && n_online <= MAX_SMT_THREADS)
3175 			rwmr_val = p8_rwmr_values[n_online];
3176 		mtspr(SPRN_RWMR, rwmr_val);
3177 	}
3178 
3179 	/* Start all the threads */
3180 	active = 0;
3181 	for (sub = 0; sub < core_info.n_subcores; ++sub) {
3182 		thr = is_power8 ? subcore_thread_map[sub] : sub;
3183 		thr0_done = false;
3184 		active |= 1 << thr;
3185 		pvc = core_info.vc[sub];
3186 		pvc->pcpu = pcpu + thr;
3187 		for_each_runnable_thread(i, vcpu, pvc) {
3188 			kvmppc_start_thread(vcpu, pvc);
3189 			kvmppc_create_dtl_entry(vcpu, pvc);
3190 			trace_kvm_guest_enter(vcpu);
3191 			if (!vcpu->arch.ptid)
3192 				thr0_done = true;
3193 			active |= 1 << (thr + vcpu->arch.ptid);
3194 		}
3195 		/*
3196 		 * We need to start the first thread of each subcore
3197 		 * even if it doesn't have a vcpu.
3198 		 */
3199 		if (!thr0_done)
3200 			kvmppc_start_thread(NULL, pvc);
3201 	}
3202 
3203 	/*
3204 	 * Ensure that split_info.do_nap is set after setting
3205 	 * the vcore pointer in the PACA of the secondaries.
3206 	 */
3207 	smp_mb();
3208 
3209 	/*
3210 	 * When doing micro-threading, poke the inactive threads as well.
3211 	 * This gets them to the nap instruction after kvm_do_nap,
3212 	 * which reduces the time taken to unsplit later.
3213 	 * For POWER9 HPT guest on radix host, we need all the secondary
3214 	 * threads woken up so they can do the LPCR/LPIDR change.
3215 	 */
3216 	if (cmd_bit || hpt_on_radix) {
3217 		split_info.do_nap = 1;	/* ask secondaries to nap when done */
3218 		for (thr = 1; thr < threads_per_subcore; ++thr)
3219 			if (!(active & (1 << thr)))
3220 				kvmppc_ipi_thread(pcpu + thr);
3221 	}
3222 
3223 	vc->vcore_state = VCORE_RUNNING;
3224 	preempt_disable();
3225 
3226 	trace_kvmppc_run_core(vc, 0);
3227 
3228 	for (sub = 0; sub < core_info.n_subcores; ++sub)
3229 		spin_unlock(&core_info.vc[sub]->lock);
3230 
3231 	if (kvm_is_radix(vc->kvm)) {
3232 		/*
3233 		 * Do we need to flush the process scoped TLB for the LPAR?
3234 		 *
3235 		 * On POWER9, individual threads can come in here, but the
3236 		 * TLB is shared between the 4 threads in a core, hence
3237 		 * invalidating on one thread invalidates for all.
3238 		 * Thus we make all 4 threads use the same bit here.
3239 		 *
3240 		 * Hash must be flushed in realmode in order to use tlbiel.
3241 		 */
3242 		kvmppc_radix_check_need_tlb_flush(vc->kvm, pcpu, NULL);
3243 	}
3244 
3245 	/*
3246 	 * Interrupts will be enabled once we get into the guest,
3247 	 * so tell lockdep that we're about to enable interrupts.
3248 	 */
3249 	trace_hardirqs_on();
3250 
3251 	guest_enter_irqoff();
3252 
3253 	srcu_idx = srcu_read_lock(&vc->kvm->srcu);
3254 
3255 	this_cpu_disable_ftrace();
3256 
3257 	trap = __kvmppc_vcore_entry();
3258 
3259 	this_cpu_enable_ftrace();
3260 
3261 	srcu_read_unlock(&vc->kvm->srcu, srcu_idx);
3262 
3263 	trace_hardirqs_off();
3264 	set_irq_happened(trap);
3265 
3266 	spin_lock(&vc->lock);
3267 	/* prevent other vcpu threads from doing kvmppc_start_thread() now */
3268 	vc->vcore_state = VCORE_EXITING;
3269 
3270 	/* wait for secondary threads to finish writing their state to memory */
3271 	kvmppc_wait_for_nap(controlled_threads);
3272 
3273 	/* Return to whole-core mode if we split the core earlier */
3274 	if (cmd_bit) {
3275 		unsigned long hid0 = mfspr(SPRN_HID0);
3276 		unsigned long loops = 0;
3277 
3278 		hid0 &= ~HID0_POWER8_DYNLPARDIS;
3279 		stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE;
3280 		mb();
3281 		mtspr(SPRN_HID0, hid0);
3282 		isync();
3283 		for (;;) {
3284 			hid0 = mfspr(SPRN_HID0);
3285 			if (!(hid0 & stat_bit))
3286 				break;
3287 			cpu_relax();
3288 			++loops;
3289 		}
3290 	} else if (hpt_on_radix) {
3291 		/* Wait for all threads to have seen final sync */
3292 		for (thr = 1; thr < controlled_threads; ++thr) {
3293 			struct paca_struct *paca = paca_ptrs[pcpu + thr];
3294 
3295 			while (paca->kvm_hstate.kvm_split_mode) {
3296 				HMT_low();
3297 				barrier();
3298 			}
3299 			HMT_medium();
3300 		}
3301 	}
3302 	split_info.do_nap = 0;
3303 
3304 	kvmppc_set_host_core(pcpu);
3305 
3306 	local_irq_enable();
3307 	guest_exit();
3308 
3309 	/* Let secondaries go back to the offline loop */
3310 	for (i = 0; i < controlled_threads; ++i) {
3311 		kvmppc_release_hwthread(pcpu + i);
3312 		if (sip && sip->napped[i])
3313 			kvmppc_ipi_thread(pcpu + i);
3314 		cpumask_clear_cpu(pcpu + i, &vc->kvm->arch.cpu_in_guest);
3315 	}
3316 
3317 	spin_unlock(&vc->lock);
3318 
3319 	/* make sure updates to secondary vcpu structs are visible now */
3320 	smp_mb();
3321 
3322 	preempt_enable();
3323 
3324 	for (sub = 0; sub < core_info.n_subcores; ++sub) {
3325 		pvc = core_info.vc[sub];
3326 		post_guest_process(pvc, pvc == vc);
3327 	}
3328 
3329 	spin_lock(&vc->lock);
3330 
3331  out:
3332 	vc->vcore_state = VCORE_INACTIVE;
3333 	trace_kvmppc_run_core(vc, 1);
3334 }
3335 
3336 /*
3337  * Load up hypervisor-mode registers on P9.
3338  */
3339 static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit,
3340 				     unsigned long lpcr)
3341 {
3342 	struct kvmppc_vcore *vc = vcpu->arch.vcore;
3343 	s64 hdec;
3344 	u64 tb, purr, spurr;
3345 	int trap;
3346 	unsigned long host_hfscr = mfspr(SPRN_HFSCR);
3347 	unsigned long host_ciabr = mfspr(SPRN_CIABR);
3348 	unsigned long host_dawr = mfspr(SPRN_DAWR);
3349 	unsigned long host_dawrx = mfspr(SPRN_DAWRX);
3350 	unsigned long host_psscr = mfspr(SPRN_PSSCR);
3351 	unsigned long host_pidr = mfspr(SPRN_PID);
3352 
3353 	hdec = time_limit - mftb();
3354 	if (hdec < 0)
3355 		return BOOK3S_INTERRUPT_HV_DECREMENTER;
3356 	mtspr(SPRN_HDEC, hdec);
3357 
3358 	if (vc->tb_offset) {
3359 		u64 new_tb = mftb() + vc->tb_offset;
3360 		mtspr(SPRN_TBU40, new_tb);
3361 		tb = mftb();
3362 		if ((tb & 0xffffff) < (new_tb & 0xffffff))
3363 			mtspr(SPRN_TBU40, new_tb + 0x1000000);
3364 		vc->tb_offset_applied = vc->tb_offset;
3365 	}
3366 
3367 	if (vc->pcr)
3368 		mtspr(SPRN_PCR, vc->pcr);
3369 	mtspr(SPRN_DPDES, vc->dpdes);
3370 	mtspr(SPRN_VTB, vc->vtb);
3371 
3372 	local_paca->kvm_hstate.host_purr = mfspr(SPRN_PURR);
3373 	local_paca->kvm_hstate.host_spurr = mfspr(SPRN_SPURR);
3374 	mtspr(SPRN_PURR, vcpu->arch.purr);
3375 	mtspr(SPRN_SPURR, vcpu->arch.spurr);
3376 
3377 	if (cpu_has_feature(CPU_FTR_DAWR)) {
3378 		mtspr(SPRN_DAWR, vcpu->arch.dawr);
3379 		mtspr(SPRN_DAWRX, vcpu->arch.dawrx);
3380 	}
3381 	mtspr(SPRN_CIABR, vcpu->arch.ciabr);
3382 	mtspr(SPRN_IC, vcpu->arch.ic);
3383 	mtspr(SPRN_PID, vcpu->arch.pid);
3384 
3385 	mtspr(SPRN_PSSCR, vcpu->arch.psscr | PSSCR_EC |
3386 	      (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG));
3387 
3388 	mtspr(SPRN_HFSCR, vcpu->arch.hfscr);
3389 
3390 	mtspr(SPRN_SPRG0, vcpu->arch.shregs.sprg0);
3391 	mtspr(SPRN_SPRG1, vcpu->arch.shregs.sprg1);
3392 	mtspr(SPRN_SPRG2, vcpu->arch.shregs.sprg2);
3393 	mtspr(SPRN_SPRG3, vcpu->arch.shregs.sprg3);
3394 
3395 	mtspr(SPRN_AMOR, ~0UL);
3396 
3397 	mtspr(SPRN_LPCR, lpcr);
3398 	isync();
3399 
3400 	kvmppc_xive_push_vcpu(vcpu);
3401 
3402 	mtspr(SPRN_SRR0, vcpu->arch.shregs.srr0);
3403 	mtspr(SPRN_SRR1, vcpu->arch.shregs.srr1);
3404 
3405 	trap = __kvmhv_vcpu_entry_p9(vcpu);
3406 
3407 	/* Advance host PURR/SPURR by the amount used by guest */
3408 	purr = mfspr(SPRN_PURR);
3409 	spurr = mfspr(SPRN_SPURR);
3410 	mtspr(SPRN_PURR, local_paca->kvm_hstate.host_purr +
3411 	      purr - vcpu->arch.purr);
3412 	mtspr(SPRN_SPURR, local_paca->kvm_hstate.host_spurr +
3413 	      spurr - vcpu->arch.spurr);
3414 	vcpu->arch.purr = purr;
3415 	vcpu->arch.spurr = spurr;
3416 
3417 	vcpu->arch.ic = mfspr(SPRN_IC);
3418 	vcpu->arch.pid = mfspr(SPRN_PID);
3419 	vcpu->arch.psscr = mfspr(SPRN_PSSCR) & PSSCR_GUEST_VIS;
3420 
3421 	vcpu->arch.shregs.sprg0 = mfspr(SPRN_SPRG0);
3422 	vcpu->arch.shregs.sprg1 = mfspr(SPRN_SPRG1);
3423 	vcpu->arch.shregs.sprg2 = mfspr(SPRN_SPRG2);
3424 	vcpu->arch.shregs.sprg3 = mfspr(SPRN_SPRG3);
3425 
3426 	mtspr(SPRN_PSSCR, host_psscr);
3427 	mtspr(SPRN_HFSCR, host_hfscr);
3428 	mtspr(SPRN_CIABR, host_ciabr);
3429 	mtspr(SPRN_DAWR, host_dawr);
3430 	mtspr(SPRN_DAWRX, host_dawrx);
3431 	mtspr(SPRN_PID, host_pidr);
3432 
3433 	/*
3434 	 * Since this is radix, do a eieio; tlbsync; ptesync sequence in
3435 	 * case we interrupted the guest between a tlbie and a ptesync.
3436 	 */
3437 	asm volatile("eieio; tlbsync; ptesync");
3438 
3439 	mtspr(SPRN_LPID, vcpu->kvm->arch.host_lpid);	/* restore host LPID */
3440 	isync();
3441 
3442 	vc->dpdes = mfspr(SPRN_DPDES);
3443 	vc->vtb = mfspr(SPRN_VTB);
3444 	mtspr(SPRN_DPDES, 0);
3445 	if (vc->pcr)
3446 		mtspr(SPRN_PCR, 0);
3447 
3448 	if (vc->tb_offset_applied) {
3449 		u64 new_tb = mftb() - vc->tb_offset_applied;
3450 		mtspr(SPRN_TBU40, new_tb);
3451 		tb = mftb();
3452 		if ((tb & 0xffffff) < (new_tb & 0xffffff))
3453 			mtspr(SPRN_TBU40, new_tb + 0x1000000);
3454 		vc->tb_offset_applied = 0;
3455 	}
3456 
3457 	mtspr(SPRN_HDEC, 0x7fffffff);
3458 	mtspr(SPRN_LPCR, vcpu->kvm->arch.host_lpcr);
3459 
3460 	return trap;
3461 }
3462 
3463 /*
3464  * Virtual-mode guest entry for POWER9 and later when the host and
3465  * guest are both using the radix MMU.  The LPIDR has already been set.
3466  */
3467 int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit,
3468 			 unsigned long lpcr)
3469 {
3470 	struct kvmppc_vcore *vc = vcpu->arch.vcore;
3471 	unsigned long host_dscr = mfspr(SPRN_DSCR);
3472 	unsigned long host_tidr = mfspr(SPRN_TIDR);
3473 	unsigned long host_iamr = mfspr(SPRN_IAMR);
3474 	unsigned long host_amr = mfspr(SPRN_AMR);
3475 	s64 dec;
3476 	u64 tb;
3477 	int trap, save_pmu;
3478 
3479 	dec = mfspr(SPRN_DEC);
3480 	tb = mftb();
3481 	if (dec < 512)
3482 		return BOOK3S_INTERRUPT_HV_DECREMENTER;
3483 	local_paca->kvm_hstate.dec_expires = dec + tb;
3484 	if (local_paca->kvm_hstate.dec_expires < time_limit)
3485 		time_limit = local_paca->kvm_hstate.dec_expires;
3486 
3487 	vcpu->arch.ceded = 0;
3488 
3489 	kvmhv_save_host_pmu();		/* saves it to PACA kvm_hstate */
3490 
3491 	kvmppc_subcore_enter_guest();
3492 
3493 	vc->entry_exit_map = 1;
3494 	vc->in_guest = 1;
3495 
3496 	if (vcpu->arch.vpa.pinned_addr) {
3497 		struct lppaca *lp = vcpu->arch.vpa.pinned_addr;
3498 		u32 yield_count = be32_to_cpu(lp->yield_count) + 1;
3499 		lp->yield_count = cpu_to_be32(yield_count);
3500 		vcpu->arch.vpa.dirty = 1;
3501 	}
3502 
3503 	if (cpu_has_feature(CPU_FTR_TM) ||
3504 	    cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
3505 		kvmppc_restore_tm_hv(vcpu, vcpu->arch.shregs.msr, true);
3506 
3507 	kvmhv_load_guest_pmu(vcpu);
3508 
3509 	msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX);
3510 	load_fp_state(&vcpu->arch.fp);
3511 #ifdef CONFIG_ALTIVEC
3512 	load_vr_state(&vcpu->arch.vr);
3513 #endif
3514 
3515 	mtspr(SPRN_DSCR, vcpu->arch.dscr);
3516 	mtspr(SPRN_IAMR, vcpu->arch.iamr);
3517 	mtspr(SPRN_PSPB, vcpu->arch.pspb);
3518 	mtspr(SPRN_FSCR, vcpu->arch.fscr);
3519 	mtspr(SPRN_TAR, vcpu->arch.tar);
3520 	mtspr(SPRN_EBBHR, vcpu->arch.ebbhr);
3521 	mtspr(SPRN_EBBRR, vcpu->arch.ebbrr);
3522 	mtspr(SPRN_BESCR, vcpu->arch.bescr);
3523 	mtspr(SPRN_WORT, vcpu->arch.wort);
3524 	mtspr(SPRN_TIDR, vcpu->arch.tid);
3525 	mtspr(SPRN_DAR, vcpu->arch.shregs.dar);
3526 	mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr);
3527 	mtspr(SPRN_AMR, vcpu->arch.amr);
3528 	mtspr(SPRN_UAMOR, vcpu->arch.uamor);
3529 
3530 	if (!(vcpu->arch.ctrl & 1))
3531 		mtspr(SPRN_CTRLT, mfspr(SPRN_CTRLF) & ~1);
3532 
3533 	mtspr(SPRN_DEC, vcpu->arch.dec_expires - mftb());
3534 
3535 	if (kvmhv_on_pseries()) {
3536 		/* call our hypervisor to load up HV regs and go */
3537 		struct hv_guest_state hvregs;
3538 
3539 		kvmhv_save_hv_regs(vcpu, &hvregs);
3540 		hvregs.lpcr = lpcr;
3541 		vcpu->arch.regs.msr = vcpu->arch.shregs.msr;
3542 		hvregs.version = HV_GUEST_STATE_VERSION;
3543 		if (vcpu->arch.nested) {
3544 			hvregs.lpid = vcpu->arch.nested->shadow_lpid;
3545 			hvregs.vcpu_token = vcpu->arch.nested_vcpu_id;
3546 		} else {
3547 			hvregs.lpid = vcpu->kvm->arch.lpid;
3548 			hvregs.vcpu_token = vcpu->vcpu_id;
3549 		}
3550 		hvregs.hdec_expiry = time_limit;
3551 		trap = plpar_hcall_norets(H_ENTER_NESTED, __pa(&hvregs),
3552 					  __pa(&vcpu->arch.regs));
3553 		kvmhv_restore_hv_return_state(vcpu, &hvregs);
3554 		vcpu->arch.shregs.msr = vcpu->arch.regs.msr;
3555 		vcpu->arch.shregs.dar = mfspr(SPRN_DAR);
3556 		vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR);
3557 
3558 		/* H_CEDE has to be handled now, not later */
3559 		if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested &&
3560 		    kvmppc_get_gpr(vcpu, 3) == H_CEDE) {
3561 			kvmppc_nested_cede(vcpu);
3562 			trap = 0;
3563 		}
3564 	} else {
3565 		trap = kvmhv_load_hv_regs_and_go(vcpu, time_limit, lpcr);
3566 	}
3567 
3568 	vcpu->arch.slb_max = 0;
3569 	dec = mfspr(SPRN_DEC);
3570 	tb = mftb();
3571 	vcpu->arch.dec_expires = dec + tb;
3572 	vcpu->cpu = -1;
3573 	vcpu->arch.thread_cpu = -1;
3574 	vcpu->arch.ctrl = mfspr(SPRN_CTRLF);
3575 
3576 	vcpu->arch.iamr = mfspr(SPRN_IAMR);
3577 	vcpu->arch.pspb = mfspr(SPRN_PSPB);
3578 	vcpu->arch.fscr = mfspr(SPRN_FSCR);
3579 	vcpu->arch.tar = mfspr(SPRN_TAR);
3580 	vcpu->arch.ebbhr = mfspr(SPRN_EBBHR);
3581 	vcpu->arch.ebbrr = mfspr(SPRN_EBBRR);
3582 	vcpu->arch.bescr = mfspr(SPRN_BESCR);
3583 	vcpu->arch.wort = mfspr(SPRN_WORT);
3584 	vcpu->arch.tid = mfspr(SPRN_TIDR);
3585 	vcpu->arch.amr = mfspr(SPRN_AMR);
3586 	vcpu->arch.uamor = mfspr(SPRN_UAMOR);
3587 	vcpu->arch.dscr = mfspr(SPRN_DSCR);
3588 
3589 	mtspr(SPRN_PSPB, 0);
3590 	mtspr(SPRN_WORT, 0);
3591 	mtspr(SPRN_UAMOR, 0);
3592 	mtspr(SPRN_DSCR, host_dscr);
3593 	mtspr(SPRN_TIDR, host_tidr);
3594 	mtspr(SPRN_IAMR, host_iamr);
3595 	mtspr(SPRN_PSPB, 0);
3596 
3597 	if (host_amr != vcpu->arch.amr)
3598 		mtspr(SPRN_AMR, host_amr);
3599 
3600 	msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX);
3601 	store_fp_state(&vcpu->arch.fp);
3602 #ifdef CONFIG_ALTIVEC
3603 	store_vr_state(&vcpu->arch.vr);
3604 #endif
3605 
3606 	if (cpu_has_feature(CPU_FTR_TM) ||
3607 	    cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST))
3608 		kvmppc_save_tm_hv(vcpu, vcpu->arch.shregs.msr, true);
3609 
3610 	save_pmu = 1;
3611 	if (vcpu->arch.vpa.pinned_addr) {
3612 		struct lppaca *lp = vcpu->arch.vpa.pinned_addr;
3613 		u32 yield_count = be32_to_cpu(lp->yield_count) + 1;
3614 		lp->yield_count = cpu_to_be32(yield_count);
3615 		vcpu->arch.vpa.dirty = 1;
3616 		save_pmu = lp->pmcregs_in_use;
3617 	}
3618 
3619 	kvmhv_save_guest_pmu(vcpu, save_pmu);
3620 
3621 	vc->entry_exit_map = 0x101;
3622 	vc->in_guest = 0;
3623 
3624 	mtspr(SPRN_DEC, local_paca->kvm_hstate.dec_expires - mftb());
3625 
3626 	kvmhv_load_host_pmu();
3627 
3628 	kvmppc_subcore_exit_guest();
3629 
3630 	return trap;
3631 }
3632 
3633 /*
3634  * Wait for some other vcpu thread to execute us, and
3635  * wake us up when we need to handle something in the host.
3636  */
3637 static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc,
3638 				 struct kvm_vcpu *vcpu, int wait_state)
3639 {
3640 	DEFINE_WAIT(wait);
3641 
3642 	prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state);
3643 	if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) {
3644 		spin_unlock(&vc->lock);
3645 		schedule();
3646 		spin_lock(&vc->lock);
3647 	}
3648 	finish_wait(&vcpu->arch.cpu_run, &wait);
3649 }
3650 
3651 static void grow_halt_poll_ns(struct kvmppc_vcore *vc)
3652 {
3653 	if (!halt_poll_ns_grow)
3654 		return;
3655 
3656 	vc->halt_poll_ns *= halt_poll_ns_grow;
3657 	if (vc->halt_poll_ns < halt_poll_ns_grow_start)
3658 		vc->halt_poll_ns = halt_poll_ns_grow_start;
3659 }
3660 
3661 static void shrink_halt_poll_ns(struct kvmppc_vcore *vc)
3662 {
3663 	if (halt_poll_ns_shrink == 0)
3664 		vc->halt_poll_ns = 0;
3665 	else
3666 		vc->halt_poll_ns /= halt_poll_ns_shrink;
3667 }
3668 
3669 #ifdef CONFIG_KVM_XICS
3670 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu)
3671 {
3672 	if (!xics_on_xive())
3673 		return false;
3674 	return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr <
3675 		vcpu->arch.xive_saved_state.cppr;
3676 }
3677 #else
3678 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu)
3679 {
3680 	return false;
3681 }
3682 #endif /* CONFIG_KVM_XICS */
3683 
3684 static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu)
3685 {
3686 	if (vcpu->arch.pending_exceptions || vcpu->arch.prodded ||
3687 	    kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu))
3688 		return true;
3689 
3690 	return false;
3691 }
3692 
3693 /*
3694  * Check to see if any of the runnable vcpus on the vcore have pending
3695  * exceptions or are no longer ceded
3696  */
3697 static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc)
3698 {
3699 	struct kvm_vcpu *vcpu;
3700 	int i;
3701 
3702 	for_each_runnable_thread(i, vcpu, vc) {
3703 		if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu))
3704 			return 1;
3705 	}
3706 
3707 	return 0;
3708 }
3709 
3710 /*
3711  * All the vcpus in this vcore are idle, so wait for a decrementer
3712  * or external interrupt to one of the vcpus.  vc->lock is held.
3713  */
3714 static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc)
3715 {
3716 	ktime_t cur, start_poll, start_wait;
3717 	int do_sleep = 1;
3718 	u64 block_ns;
3719 	DECLARE_SWAITQUEUE(wait);
3720 
3721 	/* Poll for pending exceptions and ceded state */
3722 	cur = start_poll = ktime_get();
3723 	if (vc->halt_poll_ns) {
3724 		ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns);
3725 		++vc->runner->stat.halt_attempted_poll;
3726 
3727 		vc->vcore_state = VCORE_POLLING;
3728 		spin_unlock(&vc->lock);
3729 
3730 		do {
3731 			if (kvmppc_vcore_check_block(vc)) {
3732 				do_sleep = 0;
3733 				break;
3734 			}
3735 			cur = ktime_get();
3736 		} while (single_task_running() && ktime_before(cur, stop));
3737 
3738 		spin_lock(&vc->lock);
3739 		vc->vcore_state = VCORE_INACTIVE;
3740 
3741 		if (!do_sleep) {
3742 			++vc->runner->stat.halt_successful_poll;
3743 			goto out;
3744 		}
3745 	}
3746 
3747 	prepare_to_swait_exclusive(&vc->wq, &wait, TASK_INTERRUPTIBLE);
3748 
3749 	if (kvmppc_vcore_check_block(vc)) {
3750 		finish_swait(&vc->wq, &wait);
3751 		do_sleep = 0;
3752 		/* If we polled, count this as a successful poll */
3753 		if (vc->halt_poll_ns)
3754 			++vc->runner->stat.halt_successful_poll;
3755 		goto out;
3756 	}
3757 
3758 	start_wait = ktime_get();
3759 
3760 	vc->vcore_state = VCORE_SLEEPING;
3761 	trace_kvmppc_vcore_blocked(vc, 0);
3762 	spin_unlock(&vc->lock);
3763 	schedule();
3764 	finish_swait(&vc->wq, &wait);
3765 	spin_lock(&vc->lock);
3766 	vc->vcore_state = VCORE_INACTIVE;
3767 	trace_kvmppc_vcore_blocked(vc, 1);
3768 	++vc->runner->stat.halt_successful_wait;
3769 
3770 	cur = ktime_get();
3771 
3772 out:
3773 	block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll);
3774 
3775 	/* Attribute wait time */
3776 	if (do_sleep) {
3777 		vc->runner->stat.halt_wait_ns +=
3778 			ktime_to_ns(cur) - ktime_to_ns(start_wait);
3779 		/* Attribute failed poll time */
3780 		if (vc->halt_poll_ns)
3781 			vc->runner->stat.halt_poll_fail_ns +=
3782 				ktime_to_ns(start_wait) -
3783 				ktime_to_ns(start_poll);
3784 	} else {
3785 		/* Attribute successful poll time */
3786 		if (vc->halt_poll_ns)
3787 			vc->runner->stat.halt_poll_success_ns +=
3788 				ktime_to_ns(cur) -
3789 				ktime_to_ns(start_poll);
3790 	}
3791 
3792 	/* Adjust poll time */
3793 	if (halt_poll_ns) {
3794 		if (block_ns <= vc->halt_poll_ns)
3795 			;
3796 		/* We slept and blocked for longer than the max halt time */
3797 		else if (vc->halt_poll_ns && block_ns > halt_poll_ns)
3798 			shrink_halt_poll_ns(vc);
3799 		/* We slept and our poll time is too small */
3800 		else if (vc->halt_poll_ns < halt_poll_ns &&
3801 				block_ns < halt_poll_ns)
3802 			grow_halt_poll_ns(vc);
3803 		if (vc->halt_poll_ns > halt_poll_ns)
3804 			vc->halt_poll_ns = halt_poll_ns;
3805 	} else
3806 		vc->halt_poll_ns = 0;
3807 
3808 	trace_kvmppc_vcore_wakeup(do_sleep, block_ns);
3809 }
3810 
3811 /*
3812  * This never fails for a radix guest, as none of the operations it does
3813  * for a radix guest can fail or have a way to report failure.
3814  * kvmhv_run_single_vcpu() relies on this fact.
3815  */
3816 static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu)
3817 {
3818 	int r = 0;
3819 	struct kvm *kvm = vcpu->kvm;
3820 
3821 	mutex_lock(&kvm->lock);
3822 	if (!kvm->arch.mmu_ready) {
3823 		if (!kvm_is_radix(kvm))
3824 			r = kvmppc_hv_setup_htab_rma(vcpu);
3825 		if (!r) {
3826 			if (cpu_has_feature(CPU_FTR_ARCH_300))
3827 				kvmppc_setup_partition_table(kvm);
3828 			kvm->arch.mmu_ready = 1;
3829 		}
3830 	}
3831 	mutex_unlock(&kvm->lock);
3832 	return r;
3833 }
3834 
3835 static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
3836 {
3837 	int n_ceded, i, r;
3838 	struct kvmppc_vcore *vc;
3839 	struct kvm_vcpu *v;
3840 
3841 	trace_kvmppc_run_vcpu_enter(vcpu);
3842 
3843 	kvm_run->exit_reason = 0;
3844 	vcpu->arch.ret = RESUME_GUEST;
3845 	vcpu->arch.trap = 0;
3846 	kvmppc_update_vpas(vcpu);
3847 
3848 	/*
3849 	 * Synchronize with other threads in this virtual core
3850 	 */
3851 	vc = vcpu->arch.vcore;
3852 	spin_lock(&vc->lock);
3853 	vcpu->arch.ceded = 0;
3854 	vcpu->arch.run_task = current;
3855 	vcpu->arch.kvm_run = kvm_run;
3856 	vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb());
3857 	vcpu->arch.state = KVMPPC_VCPU_RUNNABLE;
3858 	vcpu->arch.busy_preempt = TB_NIL;
3859 	WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu);
3860 	++vc->n_runnable;
3861 
3862 	/*
3863 	 * This happens the first time this is called for a vcpu.
3864 	 * If the vcore is already running, we may be able to start
3865 	 * this thread straight away and have it join in.
3866 	 */
3867 	if (!signal_pending(current)) {
3868 		if ((vc->vcore_state == VCORE_PIGGYBACK ||
3869 		     vc->vcore_state == VCORE_RUNNING) &&
3870 			   !VCORE_IS_EXITING(vc)) {
3871 			kvmppc_create_dtl_entry(vcpu, vc);
3872 			kvmppc_start_thread(vcpu, vc);
3873 			trace_kvm_guest_enter(vcpu);
3874 		} else if (vc->vcore_state == VCORE_SLEEPING) {
3875 			swake_up_one(&vc->wq);
3876 		}
3877 
3878 	}
3879 
3880 	while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE &&
3881 	       !signal_pending(current)) {
3882 		/* See if the MMU is ready to go */
3883 		if (!vcpu->kvm->arch.mmu_ready) {
3884 			spin_unlock(&vc->lock);
3885 			r = kvmhv_setup_mmu(vcpu);
3886 			spin_lock(&vc->lock);
3887 			if (r) {
3888 				kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
3889 				kvm_run->fail_entry.
3890 					hardware_entry_failure_reason = 0;
3891 				vcpu->arch.ret = r;
3892 				break;
3893 			}
3894 		}
3895 
3896 		if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL)
3897 			kvmppc_vcore_end_preempt(vc);
3898 
3899 		if (vc->vcore_state != VCORE_INACTIVE) {
3900 			kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE);
3901 			continue;
3902 		}
3903 		for_each_runnable_thread(i, v, vc) {
3904 			kvmppc_core_prepare_to_enter(v);
3905 			if (signal_pending(v->arch.run_task)) {
3906 				kvmppc_remove_runnable(vc, v);
3907 				v->stat.signal_exits++;
3908 				v->arch.kvm_run->exit_reason = KVM_EXIT_INTR;
3909 				v->arch.ret = -EINTR;
3910 				wake_up(&v->arch.cpu_run);
3911 			}
3912 		}
3913 		if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE)
3914 			break;
3915 		n_ceded = 0;
3916 		for_each_runnable_thread(i, v, vc) {
3917 			if (!kvmppc_vcpu_woken(v))
3918 				n_ceded += v->arch.ceded;
3919 			else
3920 				v->arch.ceded = 0;
3921 		}
3922 		vc->runner = vcpu;
3923 		if (n_ceded == vc->n_runnable) {
3924 			kvmppc_vcore_blocked(vc);
3925 		} else if (need_resched()) {
3926 			kvmppc_vcore_preempt(vc);
3927 			/* Let something else run */
3928 			cond_resched_lock(&vc->lock);
3929 			if (vc->vcore_state == VCORE_PREEMPT)
3930 				kvmppc_vcore_end_preempt(vc);
3931 		} else {
3932 			kvmppc_run_core(vc);
3933 		}
3934 		vc->runner = NULL;
3935 	}
3936 
3937 	while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE &&
3938 	       (vc->vcore_state == VCORE_RUNNING ||
3939 		vc->vcore_state == VCORE_EXITING ||
3940 		vc->vcore_state == VCORE_PIGGYBACK))
3941 		kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE);
3942 
3943 	if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL)
3944 		kvmppc_vcore_end_preempt(vc);
3945 
3946 	if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) {
3947 		kvmppc_remove_runnable(vc, vcpu);
3948 		vcpu->stat.signal_exits++;
3949 		kvm_run->exit_reason = KVM_EXIT_INTR;
3950 		vcpu->arch.ret = -EINTR;
3951 	}
3952 
3953 	if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) {
3954 		/* Wake up some vcpu to run the core */
3955 		i = -1;
3956 		v = next_runnable_thread(vc, &i);
3957 		wake_up(&v->arch.cpu_run);
3958 	}
3959 
3960 	trace_kvmppc_run_vcpu_exit(vcpu, kvm_run);
3961 	spin_unlock(&vc->lock);
3962 	return vcpu->arch.ret;
3963 }
3964 
3965 int kvmhv_run_single_vcpu(struct kvm_run *kvm_run,
3966 			  struct kvm_vcpu *vcpu, u64 time_limit,
3967 			  unsigned long lpcr)
3968 {
3969 	int trap, r, pcpu;
3970 	int srcu_idx;
3971 	struct kvmppc_vcore *vc;
3972 	struct kvm *kvm = vcpu->kvm;
3973 	struct kvm_nested_guest *nested = vcpu->arch.nested;
3974 
3975 	trace_kvmppc_run_vcpu_enter(vcpu);
3976 
3977 	kvm_run->exit_reason = 0;
3978 	vcpu->arch.ret = RESUME_GUEST;
3979 	vcpu->arch.trap = 0;
3980 
3981 	vc = vcpu->arch.vcore;
3982 	vcpu->arch.ceded = 0;
3983 	vcpu->arch.run_task = current;
3984 	vcpu->arch.kvm_run = kvm_run;
3985 	vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb());
3986 	vcpu->arch.state = KVMPPC_VCPU_RUNNABLE;
3987 	vcpu->arch.busy_preempt = TB_NIL;
3988 	vcpu->arch.last_inst = KVM_INST_FETCH_FAILED;
3989 	vc->runnable_threads[0] = vcpu;
3990 	vc->n_runnable = 1;
3991 	vc->runner = vcpu;
3992 
3993 	/* See if the MMU is ready to go */
3994 	if (!kvm->arch.mmu_ready)
3995 		kvmhv_setup_mmu(vcpu);
3996 
3997 	if (need_resched())
3998 		cond_resched();
3999 
4000 	kvmppc_update_vpas(vcpu);
4001 
4002 	init_vcore_to_run(vc);
4003 	vc->preempt_tb = TB_NIL;
4004 
4005 	preempt_disable();
4006 	pcpu = smp_processor_id();
4007 	vc->pcpu = pcpu;
4008 	kvmppc_prepare_radix_vcpu(vcpu, pcpu);
4009 
4010 	local_irq_disable();
4011 	hard_irq_disable();
4012 	if (signal_pending(current))
4013 		goto sigpend;
4014 	if (lazy_irq_pending() || need_resched() || !kvm->arch.mmu_ready)
4015 		goto out;
4016 
4017 	if (!nested) {
4018 		kvmppc_core_prepare_to_enter(vcpu);
4019 		if (vcpu->arch.doorbell_request) {
4020 			vc->dpdes = 1;
4021 			smp_wmb();
4022 			vcpu->arch.doorbell_request = 0;
4023 		}
4024 		if (test_bit(BOOK3S_IRQPRIO_EXTERNAL,
4025 			     &vcpu->arch.pending_exceptions))
4026 			lpcr |= LPCR_MER;
4027 	} else if (vcpu->arch.pending_exceptions ||
4028 		   vcpu->arch.doorbell_request ||
4029 		   xive_interrupt_pending(vcpu)) {
4030 		vcpu->arch.ret = RESUME_HOST;
4031 		goto out;
4032 	}
4033 
4034 	kvmppc_clear_host_core(pcpu);
4035 
4036 	local_paca->kvm_hstate.tid = 0;
4037 	local_paca->kvm_hstate.napping = 0;
4038 	local_paca->kvm_hstate.kvm_split_mode = NULL;
4039 	kvmppc_start_thread(vcpu, vc);
4040 	kvmppc_create_dtl_entry(vcpu, vc);
4041 	trace_kvm_guest_enter(vcpu);
4042 
4043 	vc->vcore_state = VCORE_RUNNING;
4044 	trace_kvmppc_run_core(vc, 0);
4045 
4046 	if (cpu_has_feature(CPU_FTR_HVMODE))
4047 		kvmppc_radix_check_need_tlb_flush(kvm, pcpu, nested);
4048 
4049 	trace_hardirqs_on();
4050 	guest_enter_irqoff();
4051 
4052 	srcu_idx = srcu_read_lock(&kvm->srcu);
4053 
4054 	this_cpu_disable_ftrace();
4055 
4056 	trap = kvmhv_p9_guest_entry(vcpu, time_limit, lpcr);
4057 	vcpu->arch.trap = trap;
4058 
4059 	this_cpu_enable_ftrace();
4060 
4061 	srcu_read_unlock(&kvm->srcu, srcu_idx);
4062 
4063 	if (cpu_has_feature(CPU_FTR_HVMODE)) {
4064 		mtspr(SPRN_LPID, kvm->arch.host_lpid);
4065 		isync();
4066 	}
4067 
4068 	trace_hardirqs_off();
4069 	set_irq_happened(trap);
4070 
4071 	kvmppc_set_host_core(pcpu);
4072 
4073 	local_irq_enable();
4074 	guest_exit();
4075 
4076 	cpumask_clear_cpu(pcpu, &kvm->arch.cpu_in_guest);
4077 
4078 	preempt_enable();
4079 
4080 	/* cancel pending decrementer exception if DEC is now positive */
4081 	if (get_tb() < vcpu->arch.dec_expires && kvmppc_core_pending_dec(vcpu))
4082 		kvmppc_core_dequeue_dec(vcpu);
4083 
4084 	trace_kvm_guest_exit(vcpu);
4085 	r = RESUME_GUEST;
4086 	if (trap) {
4087 		if (!nested)
4088 			r = kvmppc_handle_exit_hv(kvm_run, vcpu, current);
4089 		else
4090 			r = kvmppc_handle_nested_exit(kvm_run, vcpu);
4091 	}
4092 	vcpu->arch.ret = r;
4093 
4094 	if (is_kvmppc_resume_guest(r) && vcpu->arch.ceded &&
4095 	    !kvmppc_vcpu_woken(vcpu)) {
4096 		kvmppc_set_timer(vcpu);
4097 		while (vcpu->arch.ceded && !kvmppc_vcpu_woken(vcpu)) {
4098 			if (signal_pending(current)) {
4099 				vcpu->stat.signal_exits++;
4100 				kvm_run->exit_reason = KVM_EXIT_INTR;
4101 				vcpu->arch.ret = -EINTR;
4102 				break;
4103 			}
4104 			spin_lock(&vc->lock);
4105 			kvmppc_vcore_blocked(vc);
4106 			spin_unlock(&vc->lock);
4107 		}
4108 	}
4109 	vcpu->arch.ceded = 0;
4110 
4111 	vc->vcore_state = VCORE_INACTIVE;
4112 	trace_kvmppc_run_core(vc, 1);
4113 
4114  done:
4115 	kvmppc_remove_runnable(vc, vcpu);
4116 	trace_kvmppc_run_vcpu_exit(vcpu, kvm_run);
4117 
4118 	return vcpu->arch.ret;
4119 
4120  sigpend:
4121 	vcpu->stat.signal_exits++;
4122 	kvm_run->exit_reason = KVM_EXIT_INTR;
4123 	vcpu->arch.ret = -EINTR;
4124  out:
4125 	local_irq_enable();
4126 	preempt_enable();
4127 	goto done;
4128 }
4129 
4130 static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu)
4131 {
4132 	int r;
4133 	int srcu_idx;
4134 	unsigned long ebb_regs[3] = {};	/* shut up GCC */
4135 	unsigned long user_tar = 0;
4136 	unsigned int user_vrsave;
4137 	struct kvm *kvm;
4138 
4139 	if (!vcpu->arch.sane) {
4140 		run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4141 		return -EINVAL;
4142 	}
4143 
4144 	/*
4145 	 * Don't allow entry with a suspended transaction, because
4146 	 * the guest entry/exit code will lose it.
4147 	 * If the guest has TM enabled, save away their TM-related SPRs
4148 	 * (they will get restored by the TM unavailable interrupt).
4149 	 */
4150 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
4151 	if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs &&
4152 	    (current->thread.regs->msr & MSR_TM)) {
4153 		if (MSR_TM_ACTIVE(current->thread.regs->msr)) {
4154 			run->exit_reason = KVM_EXIT_FAIL_ENTRY;
4155 			run->fail_entry.hardware_entry_failure_reason = 0;
4156 			return -EINVAL;
4157 		}
4158 		/* Enable TM so we can read the TM SPRs */
4159 		mtmsr(mfmsr() | MSR_TM);
4160 		current->thread.tm_tfhar = mfspr(SPRN_TFHAR);
4161 		current->thread.tm_tfiar = mfspr(SPRN_TFIAR);
4162 		current->thread.tm_texasr = mfspr(SPRN_TEXASR);
4163 		current->thread.regs->msr &= ~MSR_TM;
4164 	}
4165 #endif
4166 
4167 	/*
4168 	 * Force online to 1 for the sake of old userspace which doesn't
4169 	 * set it.
4170 	 */
4171 	if (!vcpu->arch.online) {
4172 		atomic_inc(&vcpu->arch.vcore->online_count);
4173 		vcpu->arch.online = 1;
4174 	}
4175 
4176 	kvmppc_core_prepare_to_enter(vcpu);
4177 
4178 	/* No need to go into the guest when all we'll do is come back out */
4179 	if (signal_pending(current)) {
4180 		run->exit_reason = KVM_EXIT_INTR;
4181 		return -EINTR;
4182 	}
4183 
4184 	kvm = vcpu->kvm;
4185 	atomic_inc(&kvm->arch.vcpus_running);
4186 	/* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */
4187 	smp_mb();
4188 
4189 	flush_all_to_thread(current);
4190 
4191 	/* Save userspace EBB and other register values */
4192 	if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
4193 		ebb_regs[0] = mfspr(SPRN_EBBHR);
4194 		ebb_regs[1] = mfspr(SPRN_EBBRR);
4195 		ebb_regs[2] = mfspr(SPRN_BESCR);
4196 		user_tar = mfspr(SPRN_TAR);
4197 	}
4198 	user_vrsave = mfspr(SPRN_VRSAVE);
4199 
4200 	vcpu->arch.wqp = &vcpu->arch.vcore->wq;
4201 	vcpu->arch.pgdir = current->mm->pgd;
4202 	vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST;
4203 
4204 	do {
4205 		/*
4206 		 * The early POWER9 chips that can't mix radix and HPT threads
4207 		 * on the same core also need the workaround for the problem
4208 		 * where the TLB would prefetch entries in the guest exit path
4209 		 * for radix guests using the guest PIDR value and LPID 0.
4210 		 * The workaround is in the old path (kvmppc_run_vcpu())
4211 		 * but not the new path (kvmhv_run_single_vcpu()).
4212 		 */
4213 		if (kvm->arch.threads_indep && kvm_is_radix(kvm) &&
4214 		    !no_mixing_hpt_and_radix)
4215 			r = kvmhv_run_single_vcpu(run, vcpu, ~(u64)0,
4216 						  vcpu->arch.vcore->lpcr);
4217 		else
4218 			r = kvmppc_run_vcpu(run, vcpu);
4219 
4220 		if (run->exit_reason == KVM_EXIT_PAPR_HCALL &&
4221 		    !(vcpu->arch.shregs.msr & MSR_PR)) {
4222 			trace_kvm_hcall_enter(vcpu);
4223 			r = kvmppc_pseries_do_hcall(vcpu);
4224 			trace_kvm_hcall_exit(vcpu, r);
4225 			kvmppc_core_prepare_to_enter(vcpu);
4226 		} else if (r == RESUME_PAGE_FAULT) {
4227 			srcu_idx = srcu_read_lock(&kvm->srcu);
4228 			r = kvmppc_book3s_hv_page_fault(run, vcpu,
4229 				vcpu->arch.fault_dar, vcpu->arch.fault_dsisr);
4230 			srcu_read_unlock(&kvm->srcu, srcu_idx);
4231 		} else if (r == RESUME_PASSTHROUGH) {
4232 			if (WARN_ON(xics_on_xive()))
4233 				r = H_SUCCESS;
4234 			else
4235 				r = kvmppc_xics_rm_complete(vcpu, 0);
4236 		}
4237 	} while (is_kvmppc_resume_guest(r));
4238 
4239 	/* Restore userspace EBB and other register values */
4240 	if (cpu_has_feature(CPU_FTR_ARCH_207S)) {
4241 		mtspr(SPRN_EBBHR, ebb_regs[0]);
4242 		mtspr(SPRN_EBBRR, ebb_regs[1]);
4243 		mtspr(SPRN_BESCR, ebb_regs[2]);
4244 		mtspr(SPRN_TAR, user_tar);
4245 		mtspr(SPRN_FSCR, current->thread.fscr);
4246 	}
4247 	mtspr(SPRN_VRSAVE, user_vrsave);
4248 
4249 	vcpu->arch.state = KVMPPC_VCPU_NOTREADY;
4250 	atomic_dec(&kvm->arch.vcpus_running);
4251 	return r;
4252 }
4253 
4254 static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps,
4255 				     int shift, int sllp)
4256 {
4257 	(*sps)->page_shift = shift;
4258 	(*sps)->slb_enc = sllp;
4259 	(*sps)->enc[0].page_shift = shift;
4260 	(*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift);
4261 	/*
4262 	 * Add 16MB MPSS support (may get filtered out by userspace)
4263 	 */
4264 	if (shift != 24) {
4265 		int penc = kvmppc_pgsize_lp_encoding(shift, 24);
4266 		if (penc != -1) {
4267 			(*sps)->enc[1].page_shift = 24;
4268 			(*sps)->enc[1].pte_enc = penc;
4269 		}
4270 	}
4271 	(*sps)++;
4272 }
4273 
4274 static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm,
4275 					 struct kvm_ppc_smmu_info *info)
4276 {
4277 	struct kvm_ppc_one_seg_page_size *sps;
4278 
4279 	/*
4280 	 * POWER7, POWER8 and POWER9 all support 32 storage keys for data.
4281 	 * POWER7 doesn't support keys for instruction accesses,
4282 	 * POWER8 and POWER9 do.
4283 	 */
4284 	info->data_keys = 32;
4285 	info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0;
4286 
4287 	/* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */
4288 	info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS;
4289 	info->slb_size = 32;
4290 
4291 	/* We only support these sizes for now, and no muti-size segments */
4292 	sps = &info->sps[0];
4293 	kvmppc_add_seg_page_size(&sps, 12, 0);
4294 	kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01);
4295 	kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L);
4296 
4297 	/* If running as a nested hypervisor, we don't support HPT guests */
4298 	if (kvmhv_on_pseries())
4299 		info->flags |= KVM_PPC_NO_HASH;
4300 
4301 	return 0;
4302 }
4303 
4304 /*
4305  * Get (and clear) the dirty memory log for a memory slot.
4306  */
4307 static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm,
4308 					 struct kvm_dirty_log *log)
4309 {
4310 	struct kvm_memslots *slots;
4311 	struct kvm_memory_slot *memslot;
4312 	int i, r;
4313 	unsigned long n;
4314 	unsigned long *buf, *p;
4315 	struct kvm_vcpu *vcpu;
4316 
4317 	mutex_lock(&kvm->slots_lock);
4318 
4319 	r = -EINVAL;
4320 	if (log->slot >= KVM_USER_MEM_SLOTS)
4321 		goto out;
4322 
4323 	slots = kvm_memslots(kvm);
4324 	memslot = id_to_memslot(slots, log->slot);
4325 	r = -ENOENT;
4326 	if (!memslot->dirty_bitmap)
4327 		goto out;
4328 
4329 	/*
4330 	 * Use second half of bitmap area because both HPT and radix
4331 	 * accumulate bits in the first half.
4332 	 */
4333 	n = kvm_dirty_bitmap_bytes(memslot);
4334 	buf = memslot->dirty_bitmap + n / sizeof(long);
4335 	memset(buf, 0, n);
4336 
4337 	if (kvm_is_radix(kvm))
4338 		r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf);
4339 	else
4340 		r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf);
4341 	if (r)
4342 		goto out;
4343 
4344 	/*
4345 	 * We accumulate dirty bits in the first half of the
4346 	 * memslot's dirty_bitmap area, for when pages are paged
4347 	 * out or modified by the host directly.  Pick up these
4348 	 * bits and add them to the map.
4349 	 */
4350 	p = memslot->dirty_bitmap;
4351 	for (i = 0; i < n / sizeof(long); ++i)
4352 		buf[i] |= xchg(&p[i], 0);
4353 
4354 	/* Harvest dirty bits from VPA and DTL updates */
4355 	/* Note: we never modify the SLB shadow buffer areas */
4356 	kvm_for_each_vcpu(i, vcpu, kvm) {
4357 		spin_lock(&vcpu->arch.vpa_update_lock);
4358 		kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf);
4359 		kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf);
4360 		spin_unlock(&vcpu->arch.vpa_update_lock);
4361 	}
4362 
4363 	r = -EFAULT;
4364 	if (copy_to_user(log->dirty_bitmap, buf, n))
4365 		goto out;
4366 
4367 	r = 0;
4368 out:
4369 	mutex_unlock(&kvm->slots_lock);
4370 	return r;
4371 }
4372 
4373 static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *free,
4374 					struct kvm_memory_slot *dont)
4375 {
4376 	if (!dont || free->arch.rmap != dont->arch.rmap) {
4377 		vfree(free->arch.rmap);
4378 		free->arch.rmap = NULL;
4379 	}
4380 }
4381 
4382 static int kvmppc_core_create_memslot_hv(struct kvm_memory_slot *slot,
4383 					 unsigned long npages)
4384 {
4385 	slot->arch.rmap = vzalloc(array_size(npages, sizeof(*slot->arch.rmap)));
4386 	if (!slot->arch.rmap)
4387 		return -ENOMEM;
4388 
4389 	return 0;
4390 }
4391 
4392 static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm,
4393 					struct kvm_memory_slot *memslot,
4394 					const struct kvm_userspace_memory_region *mem)
4395 {
4396 	return 0;
4397 }
4398 
4399 static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm,
4400 				const struct kvm_userspace_memory_region *mem,
4401 				const struct kvm_memory_slot *old,
4402 				const struct kvm_memory_slot *new,
4403 				enum kvm_mr_change change)
4404 {
4405 	unsigned long npages = mem->memory_size >> PAGE_SHIFT;
4406 
4407 	/*
4408 	 * If we are making a new memslot, it might make
4409 	 * some address that was previously cached as emulated
4410 	 * MMIO be no longer emulated MMIO, so invalidate
4411 	 * all the caches of emulated MMIO translations.
4412 	 */
4413 	if (npages)
4414 		atomic64_inc(&kvm->arch.mmio_update);
4415 
4416 	/*
4417 	 * For change == KVM_MR_MOVE or KVM_MR_DELETE, higher levels
4418 	 * have already called kvm_arch_flush_shadow_memslot() to
4419 	 * flush shadow mappings.  For KVM_MR_CREATE we have no
4420 	 * previous mappings.  So the only case to handle is
4421 	 * KVM_MR_FLAGS_ONLY when the KVM_MEM_LOG_DIRTY_PAGES bit
4422 	 * has been changed.
4423 	 * For radix guests, we flush on setting KVM_MEM_LOG_DIRTY_PAGES
4424 	 * to get rid of any THP PTEs in the partition-scoped page tables
4425 	 * so we can track dirtiness at the page level; we flush when
4426 	 * clearing KVM_MEM_LOG_DIRTY_PAGES so that we can go back to
4427 	 * using THP PTEs.
4428 	 */
4429 	if (change == KVM_MR_FLAGS_ONLY && kvm_is_radix(kvm) &&
4430 	    ((new->flags ^ old->flags) & KVM_MEM_LOG_DIRTY_PAGES))
4431 		kvmppc_radix_flush_memslot(kvm, old);
4432 }
4433 
4434 /*
4435  * Update LPCR values in kvm->arch and in vcores.
4436  * Caller must hold kvm->lock.
4437  */
4438 void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask)
4439 {
4440 	long int i;
4441 	u32 cores_done = 0;
4442 
4443 	if ((kvm->arch.lpcr & mask) == lpcr)
4444 		return;
4445 
4446 	kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr;
4447 
4448 	for (i = 0; i < KVM_MAX_VCORES; ++i) {
4449 		struct kvmppc_vcore *vc = kvm->arch.vcores[i];
4450 		if (!vc)
4451 			continue;
4452 		spin_lock(&vc->lock);
4453 		vc->lpcr = (vc->lpcr & ~mask) | lpcr;
4454 		spin_unlock(&vc->lock);
4455 		if (++cores_done >= kvm->arch.online_vcores)
4456 			break;
4457 	}
4458 }
4459 
4460 static void kvmppc_mmu_destroy_hv(struct kvm_vcpu *vcpu)
4461 {
4462 	return;
4463 }
4464 
4465 void kvmppc_setup_partition_table(struct kvm *kvm)
4466 {
4467 	unsigned long dw0, dw1;
4468 
4469 	if (!kvm_is_radix(kvm)) {
4470 		/* PS field - page size for VRMA */
4471 		dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) |
4472 			((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1);
4473 		/* HTABSIZE and HTABORG fields */
4474 		dw0 |= kvm->arch.sdr1;
4475 
4476 		/* Second dword as set by userspace */
4477 		dw1 = kvm->arch.process_table;
4478 	} else {
4479 		dw0 = PATB_HR | radix__get_tree_size() |
4480 			__pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE;
4481 		dw1 = PATB_GR | kvm->arch.process_table;
4482 	}
4483 	kvmhv_set_ptbl_entry(kvm->arch.lpid, dw0, dw1);
4484 }
4485 
4486 /*
4487  * Set up HPT (hashed page table) and RMA (real-mode area).
4488  * Must be called with kvm->lock held.
4489  */
4490 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu)
4491 {
4492 	int err = 0;
4493 	struct kvm *kvm = vcpu->kvm;
4494 	unsigned long hva;
4495 	struct kvm_memory_slot *memslot;
4496 	struct vm_area_struct *vma;
4497 	unsigned long lpcr = 0, senc;
4498 	unsigned long psize, porder;
4499 	int srcu_idx;
4500 
4501 	/* Allocate hashed page table (if not done already) and reset it */
4502 	if (!kvm->arch.hpt.virt) {
4503 		int order = KVM_DEFAULT_HPT_ORDER;
4504 		struct kvm_hpt_info info;
4505 
4506 		err = kvmppc_allocate_hpt(&info, order);
4507 		/* If we get here, it means userspace didn't specify a
4508 		 * size explicitly.  So, try successively smaller
4509 		 * sizes if the default failed. */
4510 		while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER)
4511 			err  = kvmppc_allocate_hpt(&info, order);
4512 
4513 		if (err < 0) {
4514 			pr_err("KVM: Couldn't alloc HPT\n");
4515 			goto out;
4516 		}
4517 
4518 		kvmppc_set_hpt(kvm, &info);
4519 	}
4520 
4521 	/* Look up the memslot for guest physical address 0 */
4522 	srcu_idx = srcu_read_lock(&kvm->srcu);
4523 	memslot = gfn_to_memslot(kvm, 0);
4524 
4525 	/* We must have some memory at 0 by now */
4526 	err = -EINVAL;
4527 	if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
4528 		goto out_srcu;
4529 
4530 	/* Look up the VMA for the start of this memory slot */
4531 	hva = memslot->userspace_addr;
4532 	down_read(&current->mm->mmap_sem);
4533 	vma = find_vma(current->mm, hva);
4534 	if (!vma || vma->vm_start > hva || (vma->vm_flags & VM_IO))
4535 		goto up_out;
4536 
4537 	psize = vma_kernel_pagesize(vma);
4538 
4539 	up_read(&current->mm->mmap_sem);
4540 
4541 	/* We can handle 4k, 64k or 16M pages in the VRMA */
4542 	if (psize >= 0x1000000)
4543 		psize = 0x1000000;
4544 	else if (psize >= 0x10000)
4545 		psize = 0x10000;
4546 	else
4547 		psize = 0x1000;
4548 	porder = __ilog2(psize);
4549 
4550 	senc = slb_pgsize_encoding(psize);
4551 	kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T |
4552 		(VRMA_VSID << SLB_VSID_SHIFT_1T);
4553 	/* Create HPTEs in the hash page table for the VRMA */
4554 	kvmppc_map_vrma(vcpu, memslot, porder);
4555 
4556 	/* Update VRMASD field in the LPCR */
4557 	if (!cpu_has_feature(CPU_FTR_ARCH_300)) {
4558 		/* the -4 is to account for senc values starting at 0x10 */
4559 		lpcr = senc << (LPCR_VRMASD_SH - 4);
4560 		kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD);
4561 	}
4562 
4563 	/* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */
4564 	smp_wmb();
4565 	err = 0;
4566  out_srcu:
4567 	srcu_read_unlock(&kvm->srcu, srcu_idx);
4568  out:
4569 	return err;
4570 
4571  up_out:
4572 	up_read(&current->mm->mmap_sem);
4573 	goto out_srcu;
4574 }
4575 
4576 /* Must be called with kvm->lock held and mmu_ready = 0 and no vcpus running */
4577 int kvmppc_switch_mmu_to_hpt(struct kvm *kvm)
4578 {
4579 	if (nesting_enabled(kvm))
4580 		kvmhv_release_all_nested(kvm);
4581 	kvmppc_rmap_reset(kvm);
4582 	kvm->arch.process_table = 0;
4583 	/* Mutual exclusion with kvm_unmap_hva_range etc. */
4584 	spin_lock(&kvm->mmu_lock);
4585 	kvm->arch.radix = 0;
4586 	spin_unlock(&kvm->mmu_lock);
4587 	kvmppc_free_radix(kvm);
4588 	kvmppc_update_lpcr(kvm, LPCR_VPM1,
4589 			   LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR);
4590 	return 0;
4591 }
4592 
4593 /* Must be called with kvm->lock held and mmu_ready = 0 and no vcpus running */
4594 int kvmppc_switch_mmu_to_radix(struct kvm *kvm)
4595 {
4596 	int err;
4597 
4598 	err = kvmppc_init_vm_radix(kvm);
4599 	if (err)
4600 		return err;
4601 	kvmppc_rmap_reset(kvm);
4602 	/* Mutual exclusion with kvm_unmap_hva_range etc. */
4603 	spin_lock(&kvm->mmu_lock);
4604 	kvm->arch.radix = 1;
4605 	spin_unlock(&kvm->mmu_lock);
4606 	kvmppc_free_hpt(&kvm->arch.hpt);
4607 	kvmppc_update_lpcr(kvm, LPCR_UPRT | LPCR_GTSE | LPCR_HR,
4608 			   LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR);
4609 	return 0;
4610 }
4611 
4612 #ifdef CONFIG_KVM_XICS
4613 /*
4614  * Allocate a per-core structure for managing state about which cores are
4615  * running in the host versus the guest and for exchanging data between
4616  * real mode KVM and CPU running in the host.
4617  * This is only done for the first VM.
4618  * The allocated structure stays even if all VMs have stopped.
4619  * It is only freed when the kvm-hv module is unloaded.
4620  * It's OK for this routine to fail, we just don't support host
4621  * core operations like redirecting H_IPI wakeups.
4622  */
4623 void kvmppc_alloc_host_rm_ops(void)
4624 {
4625 	struct kvmppc_host_rm_ops *ops;
4626 	unsigned long l_ops;
4627 	int cpu, core;
4628 	int size;
4629 
4630 	/* Not the first time here ? */
4631 	if (kvmppc_host_rm_ops_hv != NULL)
4632 		return;
4633 
4634 	ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL);
4635 	if (!ops)
4636 		return;
4637 
4638 	size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core);
4639 	ops->rm_core = kzalloc(size, GFP_KERNEL);
4640 
4641 	if (!ops->rm_core) {
4642 		kfree(ops);
4643 		return;
4644 	}
4645 
4646 	cpus_read_lock();
4647 
4648 	for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) {
4649 		if (!cpu_online(cpu))
4650 			continue;
4651 
4652 		core = cpu >> threads_shift;
4653 		ops->rm_core[core].rm_state.in_host = 1;
4654 	}
4655 
4656 	ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv;
4657 
4658 	/*
4659 	 * Make the contents of the kvmppc_host_rm_ops structure visible
4660 	 * to other CPUs before we assign it to the global variable.
4661 	 * Do an atomic assignment (no locks used here), but if someone
4662 	 * beats us to it, just free our copy and return.
4663 	 */
4664 	smp_wmb();
4665 	l_ops = (unsigned long) ops;
4666 
4667 	if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) {
4668 		cpus_read_unlock();
4669 		kfree(ops->rm_core);
4670 		kfree(ops);
4671 		return;
4672 	}
4673 
4674 	cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE,
4675 					     "ppc/kvm_book3s:prepare",
4676 					     kvmppc_set_host_core,
4677 					     kvmppc_clear_host_core);
4678 	cpus_read_unlock();
4679 }
4680 
4681 void kvmppc_free_host_rm_ops(void)
4682 {
4683 	if (kvmppc_host_rm_ops_hv) {
4684 		cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE);
4685 		kfree(kvmppc_host_rm_ops_hv->rm_core);
4686 		kfree(kvmppc_host_rm_ops_hv);
4687 		kvmppc_host_rm_ops_hv = NULL;
4688 	}
4689 }
4690 #endif
4691 
4692 static int kvmppc_core_init_vm_hv(struct kvm *kvm)
4693 {
4694 	unsigned long lpcr, lpid;
4695 	char buf[32];
4696 	int ret;
4697 
4698 	/* Allocate the guest's logical partition ID */
4699 
4700 	lpid = kvmppc_alloc_lpid();
4701 	if ((long)lpid < 0)
4702 		return -ENOMEM;
4703 	kvm->arch.lpid = lpid;
4704 
4705 	kvmppc_alloc_host_rm_ops();
4706 
4707 	kvmhv_vm_nested_init(kvm);
4708 
4709 	/*
4710 	 * Since we don't flush the TLB when tearing down a VM,
4711 	 * and this lpid might have previously been used,
4712 	 * make sure we flush on each core before running the new VM.
4713 	 * On POWER9, the tlbie in mmu_partition_table_set_entry()
4714 	 * does this flush for us.
4715 	 */
4716 	if (!cpu_has_feature(CPU_FTR_ARCH_300))
4717 		cpumask_setall(&kvm->arch.need_tlb_flush);
4718 
4719 	/* Start out with the default set of hcalls enabled */
4720 	memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls,
4721 	       sizeof(kvm->arch.enabled_hcalls));
4722 
4723 	if (!cpu_has_feature(CPU_FTR_ARCH_300))
4724 		kvm->arch.host_sdr1 = mfspr(SPRN_SDR1);
4725 
4726 	/* Init LPCR for virtual RMA mode */
4727 	if (cpu_has_feature(CPU_FTR_HVMODE)) {
4728 		kvm->arch.host_lpid = mfspr(SPRN_LPID);
4729 		kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR);
4730 		lpcr &= LPCR_PECE | LPCR_LPES;
4731 	} else {
4732 		lpcr = 0;
4733 	}
4734 	lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE |
4735 		LPCR_VPM0 | LPCR_VPM1;
4736 	kvm->arch.vrma_slb_v = SLB_VSID_B_1T |
4737 		(VRMA_VSID << SLB_VSID_SHIFT_1T);
4738 	/* On POWER8 turn on online bit to enable PURR/SPURR */
4739 	if (cpu_has_feature(CPU_FTR_ARCH_207S))
4740 		lpcr |= LPCR_ONL;
4741 	/*
4742 	 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed)
4743 	 * Set HVICE bit to enable hypervisor virtualization interrupts.
4744 	 * Set HEIC to prevent OS interrupts to go to hypervisor (should
4745 	 * be unnecessary but better safe than sorry in case we re-enable
4746 	 * EE in HV mode with this LPCR still set)
4747 	 */
4748 	if (cpu_has_feature(CPU_FTR_ARCH_300)) {
4749 		lpcr &= ~LPCR_VPM0;
4750 		lpcr |= LPCR_HVICE | LPCR_HEIC;
4751 
4752 		/*
4753 		 * If xive is enabled, we route 0x500 interrupts directly
4754 		 * to the guest.
4755 		 */
4756 		if (xics_on_xive())
4757 			lpcr |= LPCR_LPES;
4758 	}
4759 
4760 	/*
4761 	 * If the host uses radix, the guest starts out as radix.
4762 	 */
4763 	if (radix_enabled()) {
4764 		kvm->arch.radix = 1;
4765 		kvm->arch.mmu_ready = 1;
4766 		lpcr &= ~LPCR_VPM1;
4767 		lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR;
4768 		ret = kvmppc_init_vm_radix(kvm);
4769 		if (ret) {
4770 			kvmppc_free_lpid(kvm->arch.lpid);
4771 			return ret;
4772 		}
4773 		kvmppc_setup_partition_table(kvm);
4774 	}
4775 
4776 	kvm->arch.lpcr = lpcr;
4777 
4778 	/* Initialization for future HPT resizes */
4779 	kvm->arch.resize_hpt = NULL;
4780 
4781 	/*
4782 	 * Work out how many sets the TLB has, for the use of
4783 	 * the TLB invalidation loop in book3s_hv_rmhandlers.S.
4784 	 */
4785 	if (radix_enabled())
4786 		kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX;	/* 128 */
4787 	else if (cpu_has_feature(CPU_FTR_ARCH_300))
4788 		kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH;	/* 256 */
4789 	else if (cpu_has_feature(CPU_FTR_ARCH_207S))
4790 		kvm->arch.tlb_sets = POWER8_TLB_SETS;		/* 512 */
4791 	else
4792 		kvm->arch.tlb_sets = POWER7_TLB_SETS;		/* 128 */
4793 
4794 	/*
4795 	 * Track that we now have a HV mode VM active. This blocks secondary
4796 	 * CPU threads from coming online.
4797 	 * On POWER9, we only need to do this if the "indep_threads_mode"
4798 	 * module parameter has been set to N.
4799 	 */
4800 	if (cpu_has_feature(CPU_FTR_ARCH_300)) {
4801 		if (!indep_threads_mode && !cpu_has_feature(CPU_FTR_HVMODE)) {
4802 			pr_warn("KVM: Ignoring indep_threads_mode=N in nested hypervisor\n");
4803 			kvm->arch.threads_indep = true;
4804 		} else {
4805 			kvm->arch.threads_indep = indep_threads_mode;
4806 		}
4807 	}
4808 	if (!kvm->arch.threads_indep)
4809 		kvm_hv_vm_activated();
4810 
4811 	/*
4812 	 * Initialize smt_mode depending on processor.
4813 	 * POWER8 and earlier have to use "strict" threading, where
4814 	 * all vCPUs in a vcore have to run on the same (sub)core,
4815 	 * whereas on POWER9 the threads can each run a different
4816 	 * guest.
4817 	 */
4818 	if (!cpu_has_feature(CPU_FTR_ARCH_300))
4819 		kvm->arch.smt_mode = threads_per_subcore;
4820 	else
4821 		kvm->arch.smt_mode = 1;
4822 	kvm->arch.emul_smt_mode = 1;
4823 
4824 	/*
4825 	 * Create a debugfs directory for the VM
4826 	 */
4827 	snprintf(buf, sizeof(buf), "vm%d", current->pid);
4828 	kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir);
4829 	kvmppc_mmu_debugfs_init(kvm);
4830 	if (radix_enabled())
4831 		kvmhv_radix_debugfs_init(kvm);
4832 
4833 	return 0;
4834 }
4835 
4836 static void kvmppc_free_vcores(struct kvm *kvm)
4837 {
4838 	long int i;
4839 
4840 	for (i = 0; i < KVM_MAX_VCORES; ++i)
4841 		kfree(kvm->arch.vcores[i]);
4842 	kvm->arch.online_vcores = 0;
4843 }
4844 
4845 static void kvmppc_core_destroy_vm_hv(struct kvm *kvm)
4846 {
4847 	debugfs_remove_recursive(kvm->arch.debugfs_dir);
4848 
4849 	if (!kvm->arch.threads_indep)
4850 		kvm_hv_vm_deactivated();
4851 
4852 	kvmppc_free_vcores(kvm);
4853 
4854 
4855 	if (kvm_is_radix(kvm))
4856 		kvmppc_free_radix(kvm);
4857 	else
4858 		kvmppc_free_hpt(&kvm->arch.hpt);
4859 
4860 	/* Perform global invalidation and return lpid to the pool */
4861 	if (cpu_has_feature(CPU_FTR_ARCH_300)) {
4862 		if (nesting_enabled(kvm))
4863 			kvmhv_release_all_nested(kvm);
4864 		kvm->arch.process_table = 0;
4865 		kvmhv_set_ptbl_entry(kvm->arch.lpid, 0, 0);
4866 	}
4867 	kvmppc_free_lpid(kvm->arch.lpid);
4868 
4869 	kvmppc_free_pimap(kvm);
4870 }
4871 
4872 /* We don't need to emulate any privileged instructions or dcbz */
4873 static int kvmppc_core_emulate_op_hv(struct kvm_run *run, struct kvm_vcpu *vcpu,
4874 				     unsigned int inst, int *advance)
4875 {
4876 	return EMULATE_FAIL;
4877 }
4878 
4879 static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn,
4880 					ulong spr_val)
4881 {
4882 	return EMULATE_FAIL;
4883 }
4884 
4885 static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn,
4886 					ulong *spr_val)
4887 {
4888 	return EMULATE_FAIL;
4889 }
4890 
4891 static int kvmppc_core_check_processor_compat_hv(void)
4892 {
4893 	if (cpu_has_feature(CPU_FTR_HVMODE) &&
4894 	    cpu_has_feature(CPU_FTR_ARCH_206))
4895 		return 0;
4896 
4897 	/* POWER9 in radix mode is capable of being a nested hypervisor. */
4898 	if (cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled())
4899 		return 0;
4900 
4901 	return -EIO;
4902 }
4903 
4904 #ifdef CONFIG_KVM_XICS
4905 
4906 void kvmppc_free_pimap(struct kvm *kvm)
4907 {
4908 	kfree(kvm->arch.pimap);
4909 }
4910 
4911 static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void)
4912 {
4913 	return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL);
4914 }
4915 
4916 static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
4917 {
4918 	struct irq_desc *desc;
4919 	struct kvmppc_irq_map *irq_map;
4920 	struct kvmppc_passthru_irqmap *pimap;
4921 	struct irq_chip *chip;
4922 	int i, rc = 0;
4923 
4924 	if (!kvm_irq_bypass)
4925 		return 1;
4926 
4927 	desc = irq_to_desc(host_irq);
4928 	if (!desc)
4929 		return -EIO;
4930 
4931 	mutex_lock(&kvm->lock);
4932 
4933 	pimap = kvm->arch.pimap;
4934 	if (pimap == NULL) {
4935 		/* First call, allocate structure to hold IRQ map */
4936 		pimap = kvmppc_alloc_pimap();
4937 		if (pimap == NULL) {
4938 			mutex_unlock(&kvm->lock);
4939 			return -ENOMEM;
4940 		}
4941 		kvm->arch.pimap = pimap;
4942 	}
4943 
4944 	/*
4945 	 * For now, we only support interrupts for which the EOI operation
4946 	 * is an OPAL call followed by a write to XIRR, since that's
4947 	 * what our real-mode EOI code does, or a XIVE interrupt
4948 	 */
4949 	chip = irq_data_get_irq_chip(&desc->irq_data);
4950 	if (!chip || !(is_pnv_opal_msi(chip) || is_xive_irq(chip))) {
4951 		pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n",
4952 			host_irq, guest_gsi);
4953 		mutex_unlock(&kvm->lock);
4954 		return -ENOENT;
4955 	}
4956 
4957 	/*
4958 	 * See if we already have an entry for this guest IRQ number.
4959 	 * If it's mapped to a hardware IRQ number, that's an error,
4960 	 * otherwise re-use this entry.
4961 	 */
4962 	for (i = 0; i < pimap->n_mapped; i++) {
4963 		if (guest_gsi == pimap->mapped[i].v_hwirq) {
4964 			if (pimap->mapped[i].r_hwirq) {
4965 				mutex_unlock(&kvm->lock);
4966 				return -EINVAL;
4967 			}
4968 			break;
4969 		}
4970 	}
4971 
4972 	if (i == KVMPPC_PIRQ_MAPPED) {
4973 		mutex_unlock(&kvm->lock);
4974 		return -EAGAIN;		/* table is full */
4975 	}
4976 
4977 	irq_map = &pimap->mapped[i];
4978 
4979 	irq_map->v_hwirq = guest_gsi;
4980 	irq_map->desc = desc;
4981 
4982 	/*
4983 	 * Order the above two stores before the next to serialize with
4984 	 * the KVM real mode handler.
4985 	 */
4986 	smp_wmb();
4987 	irq_map->r_hwirq = desc->irq_data.hwirq;
4988 
4989 	if (i == pimap->n_mapped)
4990 		pimap->n_mapped++;
4991 
4992 	if (xics_on_xive())
4993 		rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc);
4994 	else
4995 		kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq);
4996 	if (rc)
4997 		irq_map->r_hwirq = 0;
4998 
4999 	mutex_unlock(&kvm->lock);
5000 
5001 	return 0;
5002 }
5003 
5004 static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi)
5005 {
5006 	struct irq_desc *desc;
5007 	struct kvmppc_passthru_irqmap *pimap;
5008 	int i, rc = 0;
5009 
5010 	if (!kvm_irq_bypass)
5011 		return 0;
5012 
5013 	desc = irq_to_desc(host_irq);
5014 	if (!desc)
5015 		return -EIO;
5016 
5017 	mutex_lock(&kvm->lock);
5018 	if (!kvm->arch.pimap)
5019 		goto unlock;
5020 
5021 	pimap = kvm->arch.pimap;
5022 
5023 	for (i = 0; i < pimap->n_mapped; i++) {
5024 		if (guest_gsi == pimap->mapped[i].v_hwirq)
5025 			break;
5026 	}
5027 
5028 	if (i == pimap->n_mapped) {
5029 		mutex_unlock(&kvm->lock);
5030 		return -ENODEV;
5031 	}
5032 
5033 	if (xics_on_xive())
5034 		rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, pimap->mapped[i].desc);
5035 	else
5036 		kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq);
5037 
5038 	/* invalidate the entry (what do do on error from the above ?) */
5039 	pimap->mapped[i].r_hwirq = 0;
5040 
5041 	/*
5042 	 * We don't free this structure even when the count goes to
5043 	 * zero. The structure is freed when we destroy the VM.
5044 	 */
5045  unlock:
5046 	mutex_unlock(&kvm->lock);
5047 	return rc;
5048 }
5049 
5050 static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons,
5051 					     struct irq_bypass_producer *prod)
5052 {
5053 	int ret = 0;
5054 	struct kvm_kernel_irqfd *irqfd =
5055 		container_of(cons, struct kvm_kernel_irqfd, consumer);
5056 
5057 	irqfd->producer = prod;
5058 
5059 	ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi);
5060 	if (ret)
5061 		pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n",
5062 			prod->irq, irqfd->gsi, ret);
5063 
5064 	return ret;
5065 }
5066 
5067 static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons,
5068 					      struct irq_bypass_producer *prod)
5069 {
5070 	int ret;
5071 	struct kvm_kernel_irqfd *irqfd =
5072 		container_of(cons, struct kvm_kernel_irqfd, consumer);
5073 
5074 	irqfd->producer = NULL;
5075 
5076 	/*
5077 	 * When producer of consumer is unregistered, we change back to
5078 	 * default external interrupt handling mode - KVM real mode
5079 	 * will switch back to host.
5080 	 */
5081 	ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi);
5082 	if (ret)
5083 		pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n",
5084 			prod->irq, irqfd->gsi, ret);
5085 }
5086 #endif
5087 
5088 static long kvm_arch_vm_ioctl_hv(struct file *filp,
5089 				 unsigned int ioctl, unsigned long arg)
5090 {
5091 	struct kvm *kvm __maybe_unused = filp->private_data;
5092 	void __user *argp = (void __user *)arg;
5093 	long r;
5094 
5095 	switch (ioctl) {
5096 
5097 	case KVM_PPC_ALLOCATE_HTAB: {
5098 		u32 htab_order;
5099 
5100 		r = -EFAULT;
5101 		if (get_user(htab_order, (u32 __user *)argp))
5102 			break;
5103 		r = kvmppc_alloc_reset_hpt(kvm, htab_order);
5104 		if (r)
5105 			break;
5106 		r = 0;
5107 		break;
5108 	}
5109 
5110 	case KVM_PPC_GET_HTAB_FD: {
5111 		struct kvm_get_htab_fd ghf;
5112 
5113 		r = -EFAULT;
5114 		if (copy_from_user(&ghf, argp, sizeof(ghf)))
5115 			break;
5116 		r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf);
5117 		break;
5118 	}
5119 
5120 	case KVM_PPC_RESIZE_HPT_PREPARE: {
5121 		struct kvm_ppc_resize_hpt rhpt;
5122 
5123 		r = -EFAULT;
5124 		if (copy_from_user(&rhpt, argp, sizeof(rhpt)))
5125 			break;
5126 
5127 		r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt);
5128 		break;
5129 	}
5130 
5131 	case KVM_PPC_RESIZE_HPT_COMMIT: {
5132 		struct kvm_ppc_resize_hpt rhpt;
5133 
5134 		r = -EFAULT;
5135 		if (copy_from_user(&rhpt, argp, sizeof(rhpt)))
5136 			break;
5137 
5138 		r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt);
5139 		break;
5140 	}
5141 
5142 	default:
5143 		r = -ENOTTY;
5144 	}
5145 
5146 	return r;
5147 }
5148 
5149 /*
5150  * List of hcall numbers to enable by default.
5151  * For compatibility with old userspace, we enable by default
5152  * all hcalls that were implemented before the hcall-enabling
5153  * facility was added.  Note this list should not include H_RTAS.
5154  */
5155 static unsigned int default_hcall_list[] = {
5156 	H_REMOVE,
5157 	H_ENTER,
5158 	H_READ,
5159 	H_PROTECT,
5160 	H_BULK_REMOVE,
5161 	H_GET_TCE,
5162 	H_PUT_TCE,
5163 	H_SET_DABR,
5164 	H_SET_XDABR,
5165 	H_CEDE,
5166 	H_PROD,
5167 	H_CONFER,
5168 	H_REGISTER_VPA,
5169 #ifdef CONFIG_KVM_XICS
5170 	H_EOI,
5171 	H_CPPR,
5172 	H_IPI,
5173 	H_IPOLL,
5174 	H_XIRR,
5175 	H_XIRR_X,
5176 #endif
5177 	0
5178 };
5179 
5180 static void init_default_hcalls(void)
5181 {
5182 	int i;
5183 	unsigned int hcall;
5184 
5185 	for (i = 0; default_hcall_list[i]; ++i) {
5186 		hcall = default_hcall_list[i];
5187 		WARN_ON(!kvmppc_hcall_impl_hv(hcall));
5188 		__set_bit(hcall / 4, default_enabled_hcalls);
5189 	}
5190 }
5191 
5192 static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg)
5193 {
5194 	unsigned long lpcr;
5195 	int radix;
5196 	int err;
5197 
5198 	/* If not on a POWER9, reject it */
5199 	if (!cpu_has_feature(CPU_FTR_ARCH_300))
5200 		return -ENODEV;
5201 
5202 	/* If any unknown flags set, reject it */
5203 	if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE))
5204 		return -EINVAL;
5205 
5206 	/* GR (guest radix) bit in process_table field must match */
5207 	radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX);
5208 	if (!!(cfg->process_table & PATB_GR) != radix)
5209 		return -EINVAL;
5210 
5211 	/* Process table size field must be reasonable, i.e. <= 24 */
5212 	if ((cfg->process_table & PRTS_MASK) > 24)
5213 		return -EINVAL;
5214 
5215 	/* We can change a guest to/from radix now, if the host is radix */
5216 	if (radix && !radix_enabled())
5217 		return -EINVAL;
5218 
5219 	/* If we're a nested hypervisor, we currently only support radix */
5220 	if (kvmhv_on_pseries() && !radix)
5221 		return -EINVAL;
5222 
5223 	mutex_lock(&kvm->lock);
5224 	if (radix != kvm_is_radix(kvm)) {
5225 		if (kvm->arch.mmu_ready) {
5226 			kvm->arch.mmu_ready = 0;
5227 			/* order mmu_ready vs. vcpus_running */
5228 			smp_mb();
5229 			if (atomic_read(&kvm->arch.vcpus_running)) {
5230 				kvm->arch.mmu_ready = 1;
5231 				err = -EBUSY;
5232 				goto out_unlock;
5233 			}
5234 		}
5235 		if (radix)
5236 			err = kvmppc_switch_mmu_to_radix(kvm);
5237 		else
5238 			err = kvmppc_switch_mmu_to_hpt(kvm);
5239 		if (err)
5240 			goto out_unlock;
5241 	}
5242 
5243 	kvm->arch.process_table = cfg->process_table;
5244 	kvmppc_setup_partition_table(kvm);
5245 
5246 	lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0;
5247 	kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE);
5248 	err = 0;
5249 
5250  out_unlock:
5251 	mutex_unlock(&kvm->lock);
5252 	return err;
5253 }
5254 
5255 static int kvmhv_enable_nested(struct kvm *kvm)
5256 {
5257 	if (!nested)
5258 		return -EPERM;
5259 	if (!cpu_has_feature(CPU_FTR_ARCH_300) || no_mixing_hpt_and_radix)
5260 		return -ENODEV;
5261 
5262 	/* kvm == NULL means the caller is testing if the capability exists */
5263 	if (kvm)
5264 		kvm->arch.nested_enable = true;
5265 	return 0;
5266 }
5267 
5268 static int kvmhv_load_from_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr,
5269 				 int size)
5270 {
5271 	int rc = -EINVAL;
5272 
5273 	if (kvmhv_vcpu_is_radix(vcpu)) {
5274 		rc = kvmhv_copy_from_guest_radix(vcpu, *eaddr, ptr, size);
5275 
5276 		if (rc > 0)
5277 			rc = -EINVAL;
5278 	}
5279 
5280 	/* For now quadrants are the only way to access nested guest memory */
5281 	if (rc && vcpu->arch.nested)
5282 		rc = -EAGAIN;
5283 
5284 	return rc;
5285 }
5286 
5287 static int kvmhv_store_to_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr,
5288 				int size)
5289 {
5290 	int rc = -EINVAL;
5291 
5292 	if (kvmhv_vcpu_is_radix(vcpu)) {
5293 		rc = kvmhv_copy_to_guest_radix(vcpu, *eaddr, ptr, size);
5294 
5295 		if (rc > 0)
5296 			rc = -EINVAL;
5297 	}
5298 
5299 	/* For now quadrants are the only way to access nested guest memory */
5300 	if (rc && vcpu->arch.nested)
5301 		rc = -EAGAIN;
5302 
5303 	return rc;
5304 }
5305 
5306 static struct kvmppc_ops kvm_ops_hv = {
5307 	.get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv,
5308 	.set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv,
5309 	.get_one_reg = kvmppc_get_one_reg_hv,
5310 	.set_one_reg = kvmppc_set_one_reg_hv,
5311 	.vcpu_load   = kvmppc_core_vcpu_load_hv,
5312 	.vcpu_put    = kvmppc_core_vcpu_put_hv,
5313 	.set_msr     = kvmppc_set_msr_hv,
5314 	.vcpu_run    = kvmppc_vcpu_run_hv,
5315 	.vcpu_create = kvmppc_core_vcpu_create_hv,
5316 	.vcpu_free   = kvmppc_core_vcpu_free_hv,
5317 	.check_requests = kvmppc_core_check_requests_hv,
5318 	.get_dirty_log  = kvm_vm_ioctl_get_dirty_log_hv,
5319 	.flush_memslot  = kvmppc_core_flush_memslot_hv,
5320 	.prepare_memory_region = kvmppc_core_prepare_memory_region_hv,
5321 	.commit_memory_region  = kvmppc_core_commit_memory_region_hv,
5322 	.unmap_hva_range = kvm_unmap_hva_range_hv,
5323 	.age_hva  = kvm_age_hva_hv,
5324 	.test_age_hva = kvm_test_age_hva_hv,
5325 	.set_spte_hva = kvm_set_spte_hva_hv,
5326 	.mmu_destroy  = kvmppc_mmu_destroy_hv,
5327 	.free_memslot = kvmppc_core_free_memslot_hv,
5328 	.create_memslot = kvmppc_core_create_memslot_hv,
5329 	.init_vm =  kvmppc_core_init_vm_hv,
5330 	.destroy_vm = kvmppc_core_destroy_vm_hv,
5331 	.get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv,
5332 	.emulate_op = kvmppc_core_emulate_op_hv,
5333 	.emulate_mtspr = kvmppc_core_emulate_mtspr_hv,
5334 	.emulate_mfspr = kvmppc_core_emulate_mfspr_hv,
5335 	.fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv,
5336 	.arch_vm_ioctl  = kvm_arch_vm_ioctl_hv,
5337 	.hcall_implemented = kvmppc_hcall_impl_hv,
5338 #ifdef CONFIG_KVM_XICS
5339 	.irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv,
5340 	.irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv,
5341 #endif
5342 	.configure_mmu = kvmhv_configure_mmu,
5343 	.get_rmmu_info = kvmhv_get_rmmu_info,
5344 	.set_smt_mode = kvmhv_set_smt_mode,
5345 	.enable_nested = kvmhv_enable_nested,
5346 	.load_from_eaddr = kvmhv_load_from_eaddr,
5347 	.store_to_eaddr = kvmhv_store_to_eaddr,
5348 };
5349 
5350 static int kvm_init_subcore_bitmap(void)
5351 {
5352 	int i, j;
5353 	int nr_cores = cpu_nr_cores();
5354 	struct sibling_subcore_state *sibling_subcore_state;
5355 
5356 	for (i = 0; i < nr_cores; i++) {
5357 		int first_cpu = i * threads_per_core;
5358 		int node = cpu_to_node(first_cpu);
5359 
5360 		/* Ignore if it is already allocated. */
5361 		if (paca_ptrs[first_cpu]->sibling_subcore_state)
5362 			continue;
5363 
5364 		sibling_subcore_state =
5365 			kzalloc_node(sizeof(struct sibling_subcore_state),
5366 							GFP_KERNEL, node);
5367 		if (!sibling_subcore_state)
5368 			return -ENOMEM;
5369 
5370 
5371 		for (j = 0; j < threads_per_core; j++) {
5372 			int cpu = first_cpu + j;
5373 
5374 			paca_ptrs[cpu]->sibling_subcore_state =
5375 						sibling_subcore_state;
5376 		}
5377 	}
5378 	return 0;
5379 }
5380 
5381 static int kvmppc_radix_possible(void)
5382 {
5383 	return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled();
5384 }
5385 
5386 static int kvmppc_book3s_init_hv(void)
5387 {
5388 	int r;
5389 	/*
5390 	 * FIXME!! Do we need to check on all cpus ?
5391 	 */
5392 	r = kvmppc_core_check_processor_compat_hv();
5393 	if (r < 0)
5394 		return -ENODEV;
5395 
5396 	r = kvmhv_nested_init();
5397 	if (r)
5398 		return r;
5399 
5400 	r = kvm_init_subcore_bitmap();
5401 	if (r)
5402 		return r;
5403 
5404 	/*
5405 	 * We need a way of accessing the XICS interrupt controller,
5406 	 * either directly, via paca_ptrs[cpu]->kvm_hstate.xics_phys, or
5407 	 * indirectly, via OPAL.
5408 	 */
5409 #ifdef CONFIG_SMP
5410 	if (!xics_on_xive() && !kvmhv_on_pseries() &&
5411 	    !local_paca->kvm_hstate.xics_phys) {
5412 		struct device_node *np;
5413 
5414 		np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc");
5415 		if (!np) {
5416 			pr_err("KVM-HV: Cannot determine method for accessing XICS\n");
5417 			return -ENODEV;
5418 		}
5419 		/* presence of intc confirmed - node can be dropped again */
5420 		of_node_put(np);
5421 	}
5422 #endif
5423 
5424 	kvm_ops_hv.owner = THIS_MODULE;
5425 	kvmppc_hv_ops = &kvm_ops_hv;
5426 
5427 	init_default_hcalls();
5428 
5429 	init_vcore_lists();
5430 
5431 	r = kvmppc_mmu_hv_init();
5432 	if (r)
5433 		return r;
5434 
5435 	if (kvmppc_radix_possible())
5436 		r = kvmppc_radix_init();
5437 
5438 	/*
5439 	 * POWER9 chips before version 2.02 can't have some threads in
5440 	 * HPT mode and some in radix mode on the same core.
5441 	 */
5442 	if (cpu_has_feature(CPU_FTR_ARCH_300)) {
5443 		unsigned int pvr = mfspr(SPRN_PVR);
5444 		if ((pvr >> 16) == PVR_POWER9 &&
5445 		    (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) ||
5446 		     ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101)))
5447 			no_mixing_hpt_and_radix = true;
5448 	}
5449 
5450 	return r;
5451 }
5452 
5453 static void kvmppc_book3s_exit_hv(void)
5454 {
5455 	kvmppc_free_host_rm_ops();
5456 	if (kvmppc_radix_possible())
5457 		kvmppc_radix_exit();
5458 	kvmppc_hv_ops = NULL;
5459 	kvmhv_nested_exit();
5460 }
5461 
5462 module_init(kvmppc_book3s_init_hv);
5463 module_exit(kvmppc_book3s_exit_hv);
5464 MODULE_LICENSE("GPL");
5465 MODULE_ALIAS_MISCDEV(KVM_MINOR);
5466 MODULE_ALIAS("devname:kvm");
5467