1 /* 2 * Copyright 2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com> 3 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 4 * 5 * Authors: 6 * Paul Mackerras <paulus@au1.ibm.com> 7 * Alexander Graf <agraf@suse.de> 8 * Kevin Wolf <mail@kevin-wolf.de> 9 * 10 * Description: KVM functions specific to running on Book 3S 11 * processors in hypervisor mode (specifically POWER7 and later). 12 * 13 * This file is derived from arch/powerpc/kvm/book3s.c, 14 * by Alexander Graf <agraf@suse.de>. 15 * 16 * This program is free software; you can redistribute it and/or modify 17 * it under the terms of the GNU General Public License, version 2, as 18 * published by the Free Software Foundation. 19 */ 20 21 #include <linux/kvm_host.h> 22 #include <linux/kernel.h> 23 #include <linux/err.h> 24 #include <linux/slab.h> 25 #include <linux/preempt.h> 26 #include <linux/sched/signal.h> 27 #include <linux/sched/stat.h> 28 #include <linux/delay.h> 29 #include <linux/export.h> 30 #include <linux/fs.h> 31 #include <linux/anon_inodes.h> 32 #include <linux/cpu.h> 33 #include <linux/cpumask.h> 34 #include <linux/spinlock.h> 35 #include <linux/page-flags.h> 36 #include <linux/srcu.h> 37 #include <linux/miscdevice.h> 38 #include <linux/debugfs.h> 39 #include <linux/gfp.h> 40 #include <linux/vmalloc.h> 41 #include <linux/highmem.h> 42 #include <linux/hugetlb.h> 43 #include <linux/kvm_irqfd.h> 44 #include <linux/irqbypass.h> 45 #include <linux/module.h> 46 #include <linux/compiler.h> 47 #include <linux/of.h> 48 49 #include <asm/ftrace.h> 50 #include <asm/reg.h> 51 #include <asm/ppc-opcode.h> 52 #include <asm/asm-prototypes.h> 53 #include <asm/archrandom.h> 54 #include <asm/debug.h> 55 #include <asm/disassemble.h> 56 #include <asm/cputable.h> 57 #include <asm/cacheflush.h> 58 #include <linux/uaccess.h> 59 #include <asm/io.h> 60 #include <asm/kvm_ppc.h> 61 #include <asm/kvm_book3s.h> 62 #include <asm/mmu_context.h> 63 #include <asm/lppaca.h> 64 #include <asm/processor.h> 65 #include <asm/cputhreads.h> 66 #include <asm/page.h> 67 #include <asm/hvcall.h> 68 #include <asm/switch_to.h> 69 #include <asm/smp.h> 70 #include <asm/dbell.h> 71 #include <asm/hmi.h> 72 #include <asm/pnv-pci.h> 73 #include <asm/mmu.h> 74 #include <asm/opal.h> 75 #include <asm/xics.h> 76 #include <asm/xive.h> 77 78 #include "book3s.h" 79 80 #define CREATE_TRACE_POINTS 81 #include "trace_hv.h" 82 83 /* #define EXIT_DEBUG */ 84 /* #define EXIT_DEBUG_SIMPLE */ 85 /* #define EXIT_DEBUG_INT */ 86 87 /* Used to indicate that a guest page fault needs to be handled */ 88 #define RESUME_PAGE_FAULT (RESUME_GUEST | RESUME_FLAG_ARCH1) 89 /* Used to indicate that a guest passthrough interrupt needs to be handled */ 90 #define RESUME_PASSTHROUGH (RESUME_GUEST | RESUME_FLAG_ARCH2) 91 92 /* Used as a "null" value for timebase values */ 93 #define TB_NIL (~(u64)0) 94 95 static DECLARE_BITMAP(default_enabled_hcalls, MAX_HCALL_OPCODE/4 + 1); 96 97 static int dynamic_mt_modes = 6; 98 module_param(dynamic_mt_modes, int, 0644); 99 MODULE_PARM_DESC(dynamic_mt_modes, "Set of allowed dynamic micro-threading modes: 0 (= none), 2, 4, or 6 (= 2 or 4)"); 100 static int target_smt_mode; 101 module_param(target_smt_mode, int, 0644); 102 MODULE_PARM_DESC(target_smt_mode, "Target threads per core (0 = max)"); 103 104 static bool indep_threads_mode = true; 105 module_param(indep_threads_mode, bool, S_IRUGO | S_IWUSR); 106 MODULE_PARM_DESC(indep_threads_mode, "Independent-threads mode (only on POWER9)"); 107 108 static bool one_vm_per_core; 109 module_param(one_vm_per_core, bool, S_IRUGO | S_IWUSR); 110 MODULE_PARM_DESC(one_vm_per_core, "Only run vCPUs from the same VM on a core (requires indep_threads_mode=N)"); 111 112 #ifdef CONFIG_KVM_XICS 113 static struct kernel_param_ops module_param_ops = { 114 .set = param_set_int, 115 .get = param_get_int, 116 }; 117 118 module_param_cb(kvm_irq_bypass, &module_param_ops, &kvm_irq_bypass, 0644); 119 MODULE_PARM_DESC(kvm_irq_bypass, "Bypass passthrough interrupt optimization"); 120 121 module_param_cb(h_ipi_redirect, &module_param_ops, &h_ipi_redirect, 0644); 122 MODULE_PARM_DESC(h_ipi_redirect, "Redirect H_IPI wakeup to a free host core"); 123 #endif 124 125 /* If set, guests are allowed to create and control nested guests */ 126 static bool nested = true; 127 module_param(nested, bool, S_IRUGO | S_IWUSR); 128 MODULE_PARM_DESC(nested, "Enable nested virtualization (only on POWER9)"); 129 130 static inline bool nesting_enabled(struct kvm *kvm) 131 { 132 return kvm->arch.nested_enable && kvm_is_radix(kvm); 133 } 134 135 /* If set, the threads on each CPU core have to be in the same MMU mode */ 136 static bool no_mixing_hpt_and_radix; 137 138 static void kvmppc_end_cede(struct kvm_vcpu *vcpu); 139 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu); 140 141 /* 142 * RWMR values for POWER8. These control the rate at which PURR 143 * and SPURR count and should be set according to the number of 144 * online threads in the vcore being run. 145 */ 146 #define RWMR_RPA_P8_1THREAD 0x164520C62609AECAUL 147 #define RWMR_RPA_P8_2THREAD 0x7FFF2908450D8DA9UL 148 #define RWMR_RPA_P8_3THREAD 0x164520C62609AECAUL 149 #define RWMR_RPA_P8_4THREAD 0x199A421245058DA9UL 150 #define RWMR_RPA_P8_5THREAD 0x164520C62609AECAUL 151 #define RWMR_RPA_P8_6THREAD 0x164520C62609AECAUL 152 #define RWMR_RPA_P8_7THREAD 0x164520C62609AECAUL 153 #define RWMR_RPA_P8_8THREAD 0x164520C62609AECAUL 154 155 static unsigned long p8_rwmr_values[MAX_SMT_THREADS + 1] = { 156 RWMR_RPA_P8_1THREAD, 157 RWMR_RPA_P8_1THREAD, 158 RWMR_RPA_P8_2THREAD, 159 RWMR_RPA_P8_3THREAD, 160 RWMR_RPA_P8_4THREAD, 161 RWMR_RPA_P8_5THREAD, 162 RWMR_RPA_P8_6THREAD, 163 RWMR_RPA_P8_7THREAD, 164 RWMR_RPA_P8_8THREAD, 165 }; 166 167 static inline struct kvm_vcpu *next_runnable_thread(struct kvmppc_vcore *vc, 168 int *ip) 169 { 170 int i = *ip; 171 struct kvm_vcpu *vcpu; 172 173 while (++i < MAX_SMT_THREADS) { 174 vcpu = READ_ONCE(vc->runnable_threads[i]); 175 if (vcpu) { 176 *ip = i; 177 return vcpu; 178 } 179 } 180 return NULL; 181 } 182 183 /* Used to traverse the list of runnable threads for a given vcore */ 184 #define for_each_runnable_thread(i, vcpu, vc) \ 185 for (i = -1; (vcpu = next_runnable_thread(vc, &i)); ) 186 187 static bool kvmppc_ipi_thread(int cpu) 188 { 189 unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER); 190 191 /* If we're a nested hypervisor, fall back to ordinary IPIs for now */ 192 if (kvmhv_on_pseries()) 193 return false; 194 195 /* On POWER9 we can use msgsnd to IPI any cpu */ 196 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 197 msg |= get_hard_smp_processor_id(cpu); 198 smp_mb(); 199 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 200 return true; 201 } 202 203 /* On POWER8 for IPIs to threads in the same core, use msgsnd */ 204 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 205 preempt_disable(); 206 if (cpu_first_thread_sibling(cpu) == 207 cpu_first_thread_sibling(smp_processor_id())) { 208 msg |= cpu_thread_in_core(cpu); 209 smp_mb(); 210 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); 211 preempt_enable(); 212 return true; 213 } 214 preempt_enable(); 215 } 216 217 #if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP) 218 if (cpu >= 0 && cpu < nr_cpu_ids) { 219 if (paca_ptrs[cpu]->kvm_hstate.xics_phys) { 220 xics_wake_cpu(cpu); 221 return true; 222 } 223 opal_int_set_mfrr(get_hard_smp_processor_id(cpu), IPI_PRIORITY); 224 return true; 225 } 226 #endif 227 228 return false; 229 } 230 231 static void kvmppc_fast_vcpu_kick_hv(struct kvm_vcpu *vcpu) 232 { 233 int cpu; 234 struct swait_queue_head *wqp; 235 236 wqp = kvm_arch_vcpu_wq(vcpu); 237 if (swq_has_sleeper(wqp)) { 238 swake_up_one(wqp); 239 ++vcpu->stat.halt_wakeup; 240 } 241 242 cpu = READ_ONCE(vcpu->arch.thread_cpu); 243 if (cpu >= 0 && kvmppc_ipi_thread(cpu)) 244 return; 245 246 /* CPU points to the first thread of the core */ 247 cpu = vcpu->cpu; 248 if (cpu >= 0 && cpu < nr_cpu_ids && cpu_online(cpu)) 249 smp_send_reschedule(cpu); 250 } 251 252 /* 253 * We use the vcpu_load/put functions to measure stolen time. 254 * Stolen time is counted as time when either the vcpu is able to 255 * run as part of a virtual core, but the task running the vcore 256 * is preempted or sleeping, or when the vcpu needs something done 257 * in the kernel by the task running the vcpu, but that task is 258 * preempted or sleeping. Those two things have to be counted 259 * separately, since one of the vcpu tasks will take on the job 260 * of running the core, and the other vcpu tasks in the vcore will 261 * sleep waiting for it to do that, but that sleep shouldn't count 262 * as stolen time. 263 * 264 * Hence we accumulate stolen time when the vcpu can run as part of 265 * a vcore using vc->stolen_tb, and the stolen time when the vcpu 266 * needs its task to do other things in the kernel (for example, 267 * service a page fault) in busy_stolen. We don't accumulate 268 * stolen time for a vcore when it is inactive, or for a vcpu 269 * when it is in state RUNNING or NOTREADY. NOTREADY is a bit of 270 * a misnomer; it means that the vcpu task is not executing in 271 * the KVM_VCPU_RUN ioctl, i.e. it is in userspace or elsewhere in 272 * the kernel. We don't have any way of dividing up that time 273 * between time that the vcpu is genuinely stopped, time that 274 * the task is actively working on behalf of the vcpu, and time 275 * that the task is preempted, so we don't count any of it as 276 * stolen. 277 * 278 * Updates to busy_stolen are protected by arch.tbacct_lock; 279 * updates to vc->stolen_tb are protected by the vcore->stoltb_lock 280 * lock. The stolen times are measured in units of timebase ticks. 281 * (Note that the != TB_NIL checks below are purely defensive; 282 * they should never fail.) 283 */ 284 285 static void kvmppc_core_start_stolen(struct kvmppc_vcore *vc) 286 { 287 unsigned long flags; 288 289 spin_lock_irqsave(&vc->stoltb_lock, flags); 290 vc->preempt_tb = mftb(); 291 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 292 } 293 294 static void kvmppc_core_end_stolen(struct kvmppc_vcore *vc) 295 { 296 unsigned long flags; 297 298 spin_lock_irqsave(&vc->stoltb_lock, flags); 299 if (vc->preempt_tb != TB_NIL) { 300 vc->stolen_tb += mftb() - vc->preempt_tb; 301 vc->preempt_tb = TB_NIL; 302 } 303 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 304 } 305 306 static void kvmppc_core_vcpu_load_hv(struct kvm_vcpu *vcpu, int cpu) 307 { 308 struct kvmppc_vcore *vc = vcpu->arch.vcore; 309 unsigned long flags; 310 311 /* 312 * We can test vc->runner without taking the vcore lock, 313 * because only this task ever sets vc->runner to this 314 * vcpu, and once it is set to this vcpu, only this task 315 * ever sets it to NULL. 316 */ 317 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 318 kvmppc_core_end_stolen(vc); 319 320 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 321 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST && 322 vcpu->arch.busy_preempt != TB_NIL) { 323 vcpu->arch.busy_stolen += mftb() - vcpu->arch.busy_preempt; 324 vcpu->arch.busy_preempt = TB_NIL; 325 } 326 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 327 } 328 329 static void kvmppc_core_vcpu_put_hv(struct kvm_vcpu *vcpu) 330 { 331 struct kvmppc_vcore *vc = vcpu->arch.vcore; 332 unsigned long flags; 333 334 if (vc->runner == vcpu && vc->vcore_state >= VCORE_SLEEPING) 335 kvmppc_core_start_stolen(vc); 336 337 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 338 if (vcpu->arch.state == KVMPPC_VCPU_BUSY_IN_HOST) 339 vcpu->arch.busy_preempt = mftb(); 340 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 341 } 342 343 static void kvmppc_set_msr_hv(struct kvm_vcpu *vcpu, u64 msr) 344 { 345 /* 346 * Check for illegal transactional state bit combination 347 * and if we find it, force the TS field to a safe state. 348 */ 349 if ((msr & MSR_TS_MASK) == MSR_TS_MASK) 350 msr &= ~MSR_TS_MASK; 351 vcpu->arch.shregs.msr = msr; 352 kvmppc_end_cede(vcpu); 353 } 354 355 static void kvmppc_set_pvr_hv(struct kvm_vcpu *vcpu, u32 pvr) 356 { 357 vcpu->arch.pvr = pvr; 358 } 359 360 /* Dummy value used in computing PCR value below */ 361 #define PCR_ARCH_300 (PCR_ARCH_207 << 1) 362 363 static int kvmppc_set_arch_compat(struct kvm_vcpu *vcpu, u32 arch_compat) 364 { 365 unsigned long host_pcr_bit = 0, guest_pcr_bit = 0; 366 struct kvmppc_vcore *vc = vcpu->arch.vcore; 367 368 /* We can (emulate) our own architecture version and anything older */ 369 if (cpu_has_feature(CPU_FTR_ARCH_300)) 370 host_pcr_bit = PCR_ARCH_300; 371 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 372 host_pcr_bit = PCR_ARCH_207; 373 else if (cpu_has_feature(CPU_FTR_ARCH_206)) 374 host_pcr_bit = PCR_ARCH_206; 375 else 376 host_pcr_bit = PCR_ARCH_205; 377 378 /* Determine lowest PCR bit needed to run guest in given PVR level */ 379 guest_pcr_bit = host_pcr_bit; 380 if (arch_compat) { 381 switch (arch_compat) { 382 case PVR_ARCH_205: 383 guest_pcr_bit = PCR_ARCH_205; 384 break; 385 case PVR_ARCH_206: 386 case PVR_ARCH_206p: 387 guest_pcr_bit = PCR_ARCH_206; 388 break; 389 case PVR_ARCH_207: 390 guest_pcr_bit = PCR_ARCH_207; 391 break; 392 case PVR_ARCH_300: 393 guest_pcr_bit = PCR_ARCH_300; 394 break; 395 default: 396 return -EINVAL; 397 } 398 } 399 400 /* Check requested PCR bits don't exceed our capabilities */ 401 if (guest_pcr_bit > host_pcr_bit) 402 return -EINVAL; 403 404 spin_lock(&vc->lock); 405 vc->arch_compat = arch_compat; 406 /* Set all PCR bits for which guest_pcr_bit <= bit < host_pcr_bit */ 407 vc->pcr = host_pcr_bit - guest_pcr_bit; 408 spin_unlock(&vc->lock); 409 410 return 0; 411 } 412 413 static void kvmppc_dump_regs(struct kvm_vcpu *vcpu) 414 { 415 int r; 416 417 pr_err("vcpu %p (%d):\n", vcpu, vcpu->vcpu_id); 418 pr_err("pc = %.16lx msr = %.16llx trap = %x\n", 419 vcpu->arch.regs.nip, vcpu->arch.shregs.msr, vcpu->arch.trap); 420 for (r = 0; r < 16; ++r) 421 pr_err("r%2d = %.16lx r%d = %.16lx\n", 422 r, kvmppc_get_gpr(vcpu, r), 423 r+16, kvmppc_get_gpr(vcpu, r+16)); 424 pr_err("ctr = %.16lx lr = %.16lx\n", 425 vcpu->arch.regs.ctr, vcpu->arch.regs.link); 426 pr_err("srr0 = %.16llx srr1 = %.16llx\n", 427 vcpu->arch.shregs.srr0, vcpu->arch.shregs.srr1); 428 pr_err("sprg0 = %.16llx sprg1 = %.16llx\n", 429 vcpu->arch.shregs.sprg0, vcpu->arch.shregs.sprg1); 430 pr_err("sprg2 = %.16llx sprg3 = %.16llx\n", 431 vcpu->arch.shregs.sprg2, vcpu->arch.shregs.sprg3); 432 pr_err("cr = %.8lx xer = %.16lx dsisr = %.8x\n", 433 vcpu->arch.regs.ccr, vcpu->arch.regs.xer, vcpu->arch.shregs.dsisr); 434 pr_err("dar = %.16llx\n", vcpu->arch.shregs.dar); 435 pr_err("fault dar = %.16lx dsisr = %.8x\n", 436 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 437 pr_err("SLB (%d entries):\n", vcpu->arch.slb_max); 438 for (r = 0; r < vcpu->arch.slb_max; ++r) 439 pr_err(" ESID = %.16llx VSID = %.16llx\n", 440 vcpu->arch.slb[r].orige, vcpu->arch.slb[r].origv); 441 pr_err("lpcr = %.16lx sdr1 = %.16lx last_inst = %.8x\n", 442 vcpu->arch.vcore->lpcr, vcpu->kvm->arch.sdr1, 443 vcpu->arch.last_inst); 444 } 445 446 static struct kvm_vcpu *kvmppc_find_vcpu(struct kvm *kvm, int id) 447 { 448 struct kvm_vcpu *ret; 449 450 mutex_lock(&kvm->lock); 451 ret = kvm_get_vcpu_by_id(kvm, id); 452 mutex_unlock(&kvm->lock); 453 return ret; 454 } 455 456 static void init_vpa(struct kvm_vcpu *vcpu, struct lppaca *vpa) 457 { 458 vpa->__old_status |= LPPACA_OLD_SHARED_PROC; 459 vpa->yield_count = cpu_to_be32(1); 460 } 461 462 static int set_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *v, 463 unsigned long addr, unsigned long len) 464 { 465 /* check address is cacheline aligned */ 466 if (addr & (L1_CACHE_BYTES - 1)) 467 return -EINVAL; 468 spin_lock(&vcpu->arch.vpa_update_lock); 469 if (v->next_gpa != addr || v->len != len) { 470 v->next_gpa = addr; 471 v->len = addr ? len : 0; 472 v->update_pending = 1; 473 } 474 spin_unlock(&vcpu->arch.vpa_update_lock); 475 return 0; 476 } 477 478 /* Length for a per-processor buffer is passed in at offset 4 in the buffer */ 479 struct reg_vpa { 480 u32 dummy; 481 union { 482 __be16 hword; 483 __be32 word; 484 } length; 485 }; 486 487 static int vpa_is_registered(struct kvmppc_vpa *vpap) 488 { 489 if (vpap->update_pending) 490 return vpap->next_gpa != 0; 491 return vpap->pinned_addr != NULL; 492 } 493 494 static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu, 495 unsigned long flags, 496 unsigned long vcpuid, unsigned long vpa) 497 { 498 struct kvm *kvm = vcpu->kvm; 499 unsigned long len, nb; 500 void *va; 501 struct kvm_vcpu *tvcpu; 502 int err; 503 int subfunc; 504 struct kvmppc_vpa *vpap; 505 506 tvcpu = kvmppc_find_vcpu(kvm, vcpuid); 507 if (!tvcpu) 508 return H_PARAMETER; 509 510 subfunc = (flags >> H_VPA_FUNC_SHIFT) & H_VPA_FUNC_MASK; 511 if (subfunc == H_VPA_REG_VPA || subfunc == H_VPA_REG_DTL || 512 subfunc == H_VPA_REG_SLB) { 513 /* Registering new area - address must be cache-line aligned */ 514 if ((vpa & (L1_CACHE_BYTES - 1)) || !vpa) 515 return H_PARAMETER; 516 517 /* convert logical addr to kernel addr and read length */ 518 va = kvmppc_pin_guest_page(kvm, vpa, &nb); 519 if (va == NULL) 520 return H_PARAMETER; 521 if (subfunc == H_VPA_REG_VPA) 522 len = be16_to_cpu(((struct reg_vpa *)va)->length.hword); 523 else 524 len = be32_to_cpu(((struct reg_vpa *)va)->length.word); 525 kvmppc_unpin_guest_page(kvm, va, vpa, false); 526 527 /* Check length */ 528 if (len > nb || len < sizeof(struct reg_vpa)) 529 return H_PARAMETER; 530 } else { 531 vpa = 0; 532 len = 0; 533 } 534 535 err = H_PARAMETER; 536 vpap = NULL; 537 spin_lock(&tvcpu->arch.vpa_update_lock); 538 539 switch (subfunc) { 540 case H_VPA_REG_VPA: /* register VPA */ 541 /* 542 * The size of our lppaca is 1kB because of the way we align 543 * it for the guest to avoid crossing a 4kB boundary. We only 544 * use 640 bytes of the structure though, so we should accept 545 * clients that set a size of 640. 546 */ 547 BUILD_BUG_ON(sizeof(struct lppaca) != 640); 548 if (len < sizeof(struct lppaca)) 549 break; 550 vpap = &tvcpu->arch.vpa; 551 err = 0; 552 break; 553 554 case H_VPA_REG_DTL: /* register DTL */ 555 if (len < sizeof(struct dtl_entry)) 556 break; 557 len -= len % sizeof(struct dtl_entry); 558 559 /* Check that they have previously registered a VPA */ 560 err = H_RESOURCE; 561 if (!vpa_is_registered(&tvcpu->arch.vpa)) 562 break; 563 564 vpap = &tvcpu->arch.dtl; 565 err = 0; 566 break; 567 568 case H_VPA_REG_SLB: /* register SLB shadow buffer */ 569 /* Check that they have previously registered a VPA */ 570 err = H_RESOURCE; 571 if (!vpa_is_registered(&tvcpu->arch.vpa)) 572 break; 573 574 vpap = &tvcpu->arch.slb_shadow; 575 err = 0; 576 break; 577 578 case H_VPA_DEREG_VPA: /* deregister VPA */ 579 /* Check they don't still have a DTL or SLB buf registered */ 580 err = H_RESOURCE; 581 if (vpa_is_registered(&tvcpu->arch.dtl) || 582 vpa_is_registered(&tvcpu->arch.slb_shadow)) 583 break; 584 585 vpap = &tvcpu->arch.vpa; 586 err = 0; 587 break; 588 589 case H_VPA_DEREG_DTL: /* deregister DTL */ 590 vpap = &tvcpu->arch.dtl; 591 err = 0; 592 break; 593 594 case H_VPA_DEREG_SLB: /* deregister SLB shadow buffer */ 595 vpap = &tvcpu->arch.slb_shadow; 596 err = 0; 597 break; 598 } 599 600 if (vpap) { 601 vpap->next_gpa = vpa; 602 vpap->len = len; 603 vpap->update_pending = 1; 604 } 605 606 spin_unlock(&tvcpu->arch.vpa_update_lock); 607 608 return err; 609 } 610 611 static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap) 612 { 613 struct kvm *kvm = vcpu->kvm; 614 void *va; 615 unsigned long nb; 616 unsigned long gpa; 617 618 /* 619 * We need to pin the page pointed to by vpap->next_gpa, 620 * but we can't call kvmppc_pin_guest_page under the lock 621 * as it does get_user_pages() and down_read(). So we 622 * have to drop the lock, pin the page, then get the lock 623 * again and check that a new area didn't get registered 624 * in the meantime. 625 */ 626 for (;;) { 627 gpa = vpap->next_gpa; 628 spin_unlock(&vcpu->arch.vpa_update_lock); 629 va = NULL; 630 nb = 0; 631 if (gpa) 632 va = kvmppc_pin_guest_page(kvm, gpa, &nb); 633 spin_lock(&vcpu->arch.vpa_update_lock); 634 if (gpa == vpap->next_gpa) 635 break; 636 /* sigh... unpin that one and try again */ 637 if (va) 638 kvmppc_unpin_guest_page(kvm, va, gpa, false); 639 } 640 641 vpap->update_pending = 0; 642 if (va && nb < vpap->len) { 643 /* 644 * If it's now too short, it must be that userspace 645 * has changed the mappings underlying guest memory, 646 * so unregister the region. 647 */ 648 kvmppc_unpin_guest_page(kvm, va, gpa, false); 649 va = NULL; 650 } 651 if (vpap->pinned_addr) 652 kvmppc_unpin_guest_page(kvm, vpap->pinned_addr, vpap->gpa, 653 vpap->dirty); 654 vpap->gpa = gpa; 655 vpap->pinned_addr = va; 656 vpap->dirty = false; 657 if (va) 658 vpap->pinned_end = va + vpap->len; 659 } 660 661 static void kvmppc_update_vpas(struct kvm_vcpu *vcpu) 662 { 663 if (!(vcpu->arch.vpa.update_pending || 664 vcpu->arch.slb_shadow.update_pending || 665 vcpu->arch.dtl.update_pending)) 666 return; 667 668 spin_lock(&vcpu->arch.vpa_update_lock); 669 if (vcpu->arch.vpa.update_pending) { 670 kvmppc_update_vpa(vcpu, &vcpu->arch.vpa); 671 if (vcpu->arch.vpa.pinned_addr) 672 init_vpa(vcpu, vcpu->arch.vpa.pinned_addr); 673 } 674 if (vcpu->arch.dtl.update_pending) { 675 kvmppc_update_vpa(vcpu, &vcpu->arch.dtl); 676 vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr; 677 vcpu->arch.dtl_index = 0; 678 } 679 if (vcpu->arch.slb_shadow.update_pending) 680 kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow); 681 spin_unlock(&vcpu->arch.vpa_update_lock); 682 } 683 684 /* 685 * Return the accumulated stolen time for the vcore up until `now'. 686 * The caller should hold the vcore lock. 687 */ 688 static u64 vcore_stolen_time(struct kvmppc_vcore *vc, u64 now) 689 { 690 u64 p; 691 unsigned long flags; 692 693 spin_lock_irqsave(&vc->stoltb_lock, flags); 694 p = vc->stolen_tb; 695 if (vc->vcore_state != VCORE_INACTIVE && 696 vc->preempt_tb != TB_NIL) 697 p += now - vc->preempt_tb; 698 spin_unlock_irqrestore(&vc->stoltb_lock, flags); 699 return p; 700 } 701 702 static void kvmppc_create_dtl_entry(struct kvm_vcpu *vcpu, 703 struct kvmppc_vcore *vc) 704 { 705 struct dtl_entry *dt; 706 struct lppaca *vpa; 707 unsigned long stolen; 708 unsigned long core_stolen; 709 u64 now; 710 unsigned long flags; 711 712 dt = vcpu->arch.dtl_ptr; 713 vpa = vcpu->arch.vpa.pinned_addr; 714 now = mftb(); 715 core_stolen = vcore_stolen_time(vc, now); 716 stolen = core_stolen - vcpu->arch.stolen_logged; 717 vcpu->arch.stolen_logged = core_stolen; 718 spin_lock_irqsave(&vcpu->arch.tbacct_lock, flags); 719 stolen += vcpu->arch.busy_stolen; 720 vcpu->arch.busy_stolen = 0; 721 spin_unlock_irqrestore(&vcpu->arch.tbacct_lock, flags); 722 if (!dt || !vpa) 723 return; 724 memset(dt, 0, sizeof(struct dtl_entry)); 725 dt->dispatch_reason = 7; 726 dt->processor_id = cpu_to_be16(vc->pcpu + vcpu->arch.ptid); 727 dt->timebase = cpu_to_be64(now + vc->tb_offset); 728 dt->enqueue_to_dispatch_time = cpu_to_be32(stolen); 729 dt->srr0 = cpu_to_be64(kvmppc_get_pc(vcpu)); 730 dt->srr1 = cpu_to_be64(vcpu->arch.shregs.msr); 731 ++dt; 732 if (dt == vcpu->arch.dtl.pinned_end) 733 dt = vcpu->arch.dtl.pinned_addr; 734 vcpu->arch.dtl_ptr = dt; 735 /* order writing *dt vs. writing vpa->dtl_idx */ 736 smp_wmb(); 737 vpa->dtl_idx = cpu_to_be64(++vcpu->arch.dtl_index); 738 vcpu->arch.dtl.dirty = true; 739 } 740 741 /* See if there is a doorbell interrupt pending for a vcpu */ 742 static bool kvmppc_doorbell_pending(struct kvm_vcpu *vcpu) 743 { 744 int thr; 745 struct kvmppc_vcore *vc; 746 747 if (vcpu->arch.doorbell_request) 748 return true; 749 /* 750 * Ensure that the read of vcore->dpdes comes after the read 751 * of vcpu->doorbell_request. This barrier matches the 752 * smb_wmb() in kvmppc_guest_entry_inject(). 753 */ 754 smp_rmb(); 755 vc = vcpu->arch.vcore; 756 thr = vcpu->vcpu_id - vc->first_vcpuid; 757 return !!(vc->dpdes & (1 << thr)); 758 } 759 760 static bool kvmppc_power8_compatible(struct kvm_vcpu *vcpu) 761 { 762 if (vcpu->arch.vcore->arch_compat >= PVR_ARCH_207) 763 return true; 764 if ((!vcpu->arch.vcore->arch_compat) && 765 cpu_has_feature(CPU_FTR_ARCH_207S)) 766 return true; 767 return false; 768 } 769 770 static int kvmppc_h_set_mode(struct kvm_vcpu *vcpu, unsigned long mflags, 771 unsigned long resource, unsigned long value1, 772 unsigned long value2) 773 { 774 switch (resource) { 775 case H_SET_MODE_RESOURCE_SET_CIABR: 776 if (!kvmppc_power8_compatible(vcpu)) 777 return H_P2; 778 if (value2) 779 return H_P4; 780 if (mflags) 781 return H_UNSUPPORTED_FLAG_START; 782 /* Guests can't breakpoint the hypervisor */ 783 if ((value1 & CIABR_PRIV) == CIABR_PRIV_HYPER) 784 return H_P3; 785 vcpu->arch.ciabr = value1; 786 return H_SUCCESS; 787 case H_SET_MODE_RESOURCE_SET_DAWR: 788 if (!kvmppc_power8_compatible(vcpu)) 789 return H_P2; 790 if (!ppc_breakpoint_available()) 791 return H_P2; 792 if (mflags) 793 return H_UNSUPPORTED_FLAG_START; 794 if (value2 & DABRX_HYP) 795 return H_P4; 796 vcpu->arch.dawr = value1; 797 vcpu->arch.dawrx = value2; 798 return H_SUCCESS; 799 default: 800 return H_TOO_HARD; 801 } 802 } 803 804 static int kvm_arch_vcpu_yield_to(struct kvm_vcpu *target) 805 { 806 struct kvmppc_vcore *vcore = target->arch.vcore; 807 808 /* 809 * We expect to have been called by the real mode handler 810 * (kvmppc_rm_h_confer()) which would have directly returned 811 * H_SUCCESS if the source vcore wasn't idle (e.g. if it may 812 * have useful work to do and should not confer) so we don't 813 * recheck that here. 814 */ 815 816 spin_lock(&vcore->lock); 817 if (target->arch.state == KVMPPC_VCPU_RUNNABLE && 818 vcore->vcore_state != VCORE_INACTIVE && 819 vcore->runner) 820 target = vcore->runner; 821 spin_unlock(&vcore->lock); 822 823 return kvm_vcpu_yield_to(target); 824 } 825 826 static int kvmppc_get_yield_count(struct kvm_vcpu *vcpu) 827 { 828 int yield_count = 0; 829 struct lppaca *lppaca; 830 831 spin_lock(&vcpu->arch.vpa_update_lock); 832 lppaca = (struct lppaca *)vcpu->arch.vpa.pinned_addr; 833 if (lppaca) 834 yield_count = be32_to_cpu(lppaca->yield_count); 835 spin_unlock(&vcpu->arch.vpa_update_lock); 836 return yield_count; 837 } 838 839 int kvmppc_pseries_do_hcall(struct kvm_vcpu *vcpu) 840 { 841 unsigned long req = kvmppc_get_gpr(vcpu, 3); 842 unsigned long target, ret = H_SUCCESS; 843 int yield_count; 844 struct kvm_vcpu *tvcpu; 845 int idx, rc; 846 847 if (req <= MAX_HCALL_OPCODE && 848 !test_bit(req/4, vcpu->kvm->arch.enabled_hcalls)) 849 return RESUME_HOST; 850 851 switch (req) { 852 case H_CEDE: 853 break; 854 case H_PROD: 855 target = kvmppc_get_gpr(vcpu, 4); 856 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target); 857 if (!tvcpu) { 858 ret = H_PARAMETER; 859 break; 860 } 861 tvcpu->arch.prodded = 1; 862 smp_mb(); 863 if (tvcpu->arch.ceded) 864 kvmppc_fast_vcpu_kick_hv(tvcpu); 865 break; 866 case H_CONFER: 867 target = kvmppc_get_gpr(vcpu, 4); 868 if (target == -1) 869 break; 870 tvcpu = kvmppc_find_vcpu(vcpu->kvm, target); 871 if (!tvcpu) { 872 ret = H_PARAMETER; 873 break; 874 } 875 yield_count = kvmppc_get_gpr(vcpu, 5); 876 if (kvmppc_get_yield_count(tvcpu) != yield_count) 877 break; 878 kvm_arch_vcpu_yield_to(tvcpu); 879 break; 880 case H_REGISTER_VPA: 881 ret = do_h_register_vpa(vcpu, kvmppc_get_gpr(vcpu, 4), 882 kvmppc_get_gpr(vcpu, 5), 883 kvmppc_get_gpr(vcpu, 6)); 884 break; 885 case H_RTAS: 886 if (list_empty(&vcpu->kvm->arch.rtas_tokens)) 887 return RESUME_HOST; 888 889 idx = srcu_read_lock(&vcpu->kvm->srcu); 890 rc = kvmppc_rtas_hcall(vcpu); 891 srcu_read_unlock(&vcpu->kvm->srcu, idx); 892 893 if (rc == -ENOENT) 894 return RESUME_HOST; 895 else if (rc == 0) 896 break; 897 898 /* Send the error out to userspace via KVM_RUN */ 899 return rc; 900 case H_LOGICAL_CI_LOAD: 901 ret = kvmppc_h_logical_ci_load(vcpu); 902 if (ret == H_TOO_HARD) 903 return RESUME_HOST; 904 break; 905 case H_LOGICAL_CI_STORE: 906 ret = kvmppc_h_logical_ci_store(vcpu); 907 if (ret == H_TOO_HARD) 908 return RESUME_HOST; 909 break; 910 case H_SET_MODE: 911 ret = kvmppc_h_set_mode(vcpu, kvmppc_get_gpr(vcpu, 4), 912 kvmppc_get_gpr(vcpu, 5), 913 kvmppc_get_gpr(vcpu, 6), 914 kvmppc_get_gpr(vcpu, 7)); 915 if (ret == H_TOO_HARD) 916 return RESUME_HOST; 917 break; 918 case H_XIRR: 919 case H_CPPR: 920 case H_EOI: 921 case H_IPI: 922 case H_IPOLL: 923 case H_XIRR_X: 924 if (kvmppc_xics_enabled(vcpu)) { 925 if (xive_enabled()) { 926 ret = H_NOT_AVAILABLE; 927 return RESUME_GUEST; 928 } 929 ret = kvmppc_xics_hcall(vcpu, req); 930 break; 931 } 932 return RESUME_HOST; 933 case H_SET_DABR: 934 ret = kvmppc_h_set_dabr(vcpu, kvmppc_get_gpr(vcpu, 4)); 935 break; 936 case H_SET_XDABR: 937 ret = kvmppc_h_set_xdabr(vcpu, kvmppc_get_gpr(vcpu, 4), 938 kvmppc_get_gpr(vcpu, 5)); 939 break; 940 case H_GET_TCE: 941 ret = kvmppc_h_get_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 942 kvmppc_get_gpr(vcpu, 5)); 943 if (ret == H_TOO_HARD) 944 return RESUME_HOST; 945 break; 946 case H_PUT_TCE: 947 ret = kvmppc_h_put_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 948 kvmppc_get_gpr(vcpu, 5), 949 kvmppc_get_gpr(vcpu, 6)); 950 if (ret == H_TOO_HARD) 951 return RESUME_HOST; 952 break; 953 case H_PUT_TCE_INDIRECT: 954 ret = kvmppc_h_put_tce_indirect(vcpu, kvmppc_get_gpr(vcpu, 4), 955 kvmppc_get_gpr(vcpu, 5), 956 kvmppc_get_gpr(vcpu, 6), 957 kvmppc_get_gpr(vcpu, 7)); 958 if (ret == H_TOO_HARD) 959 return RESUME_HOST; 960 break; 961 case H_STUFF_TCE: 962 ret = kvmppc_h_stuff_tce(vcpu, kvmppc_get_gpr(vcpu, 4), 963 kvmppc_get_gpr(vcpu, 5), 964 kvmppc_get_gpr(vcpu, 6), 965 kvmppc_get_gpr(vcpu, 7)); 966 if (ret == H_TOO_HARD) 967 return RESUME_HOST; 968 break; 969 case H_RANDOM: 970 if (!powernv_get_random_long(&vcpu->arch.regs.gpr[4])) 971 ret = H_HARDWARE; 972 break; 973 974 case H_SET_PARTITION_TABLE: 975 ret = H_FUNCTION; 976 if (nesting_enabled(vcpu->kvm)) 977 ret = kvmhv_set_partition_table(vcpu); 978 break; 979 case H_ENTER_NESTED: 980 ret = H_FUNCTION; 981 if (!nesting_enabled(vcpu->kvm)) 982 break; 983 ret = kvmhv_enter_nested_guest(vcpu); 984 if (ret == H_INTERRUPT) { 985 kvmppc_set_gpr(vcpu, 3, 0); 986 vcpu->arch.hcall_needed = 0; 987 return -EINTR; 988 } else if (ret == H_TOO_HARD) { 989 kvmppc_set_gpr(vcpu, 3, 0); 990 vcpu->arch.hcall_needed = 0; 991 return RESUME_HOST; 992 } 993 break; 994 case H_TLB_INVALIDATE: 995 ret = H_FUNCTION; 996 if (nesting_enabled(vcpu->kvm)) 997 ret = kvmhv_do_nested_tlbie(vcpu); 998 break; 999 case H_COPY_TOFROM_GUEST: 1000 ret = H_FUNCTION; 1001 if (nesting_enabled(vcpu->kvm)) 1002 ret = kvmhv_copy_tofrom_guest_nested(vcpu); 1003 break; 1004 default: 1005 return RESUME_HOST; 1006 } 1007 kvmppc_set_gpr(vcpu, 3, ret); 1008 vcpu->arch.hcall_needed = 0; 1009 return RESUME_GUEST; 1010 } 1011 1012 /* 1013 * Handle H_CEDE in the nested virtualization case where we haven't 1014 * called the real-mode hcall handlers in book3s_hv_rmhandlers.S. 1015 * This has to be done early, not in kvmppc_pseries_do_hcall(), so 1016 * that the cede logic in kvmppc_run_single_vcpu() works properly. 1017 */ 1018 static void kvmppc_nested_cede(struct kvm_vcpu *vcpu) 1019 { 1020 vcpu->arch.shregs.msr |= MSR_EE; 1021 vcpu->arch.ceded = 1; 1022 smp_mb(); 1023 if (vcpu->arch.prodded) { 1024 vcpu->arch.prodded = 0; 1025 smp_mb(); 1026 vcpu->arch.ceded = 0; 1027 } 1028 } 1029 1030 static int kvmppc_hcall_impl_hv(unsigned long cmd) 1031 { 1032 switch (cmd) { 1033 case H_CEDE: 1034 case H_PROD: 1035 case H_CONFER: 1036 case H_REGISTER_VPA: 1037 case H_SET_MODE: 1038 case H_LOGICAL_CI_LOAD: 1039 case H_LOGICAL_CI_STORE: 1040 #ifdef CONFIG_KVM_XICS 1041 case H_XIRR: 1042 case H_CPPR: 1043 case H_EOI: 1044 case H_IPI: 1045 case H_IPOLL: 1046 case H_XIRR_X: 1047 #endif 1048 return 1; 1049 } 1050 1051 /* See if it's in the real-mode table */ 1052 return kvmppc_hcall_impl_hv_realmode(cmd); 1053 } 1054 1055 static int kvmppc_emulate_debug_inst(struct kvm_run *run, 1056 struct kvm_vcpu *vcpu) 1057 { 1058 u32 last_inst; 1059 1060 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst) != 1061 EMULATE_DONE) { 1062 /* 1063 * Fetch failed, so return to guest and 1064 * try executing it again. 1065 */ 1066 return RESUME_GUEST; 1067 } 1068 1069 if (last_inst == KVMPPC_INST_SW_BREAKPOINT) { 1070 run->exit_reason = KVM_EXIT_DEBUG; 1071 run->debug.arch.address = kvmppc_get_pc(vcpu); 1072 return RESUME_HOST; 1073 } else { 1074 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1075 return RESUME_GUEST; 1076 } 1077 } 1078 1079 static void do_nothing(void *x) 1080 { 1081 } 1082 1083 static unsigned long kvmppc_read_dpdes(struct kvm_vcpu *vcpu) 1084 { 1085 int thr, cpu, pcpu, nthreads; 1086 struct kvm_vcpu *v; 1087 unsigned long dpdes; 1088 1089 nthreads = vcpu->kvm->arch.emul_smt_mode; 1090 dpdes = 0; 1091 cpu = vcpu->vcpu_id & ~(nthreads - 1); 1092 for (thr = 0; thr < nthreads; ++thr, ++cpu) { 1093 v = kvmppc_find_vcpu(vcpu->kvm, cpu); 1094 if (!v) 1095 continue; 1096 /* 1097 * If the vcpu is currently running on a physical cpu thread, 1098 * interrupt it in order to pull it out of the guest briefly, 1099 * which will update its vcore->dpdes value. 1100 */ 1101 pcpu = READ_ONCE(v->cpu); 1102 if (pcpu >= 0) 1103 smp_call_function_single(pcpu, do_nothing, NULL, 1); 1104 if (kvmppc_doorbell_pending(v)) 1105 dpdes |= 1 << thr; 1106 } 1107 return dpdes; 1108 } 1109 1110 /* 1111 * On POWER9, emulate doorbell-related instructions in order to 1112 * give the guest the illusion of running on a multi-threaded core. 1113 * The instructions emulated are msgsndp, msgclrp, mfspr TIR, 1114 * and mfspr DPDES. 1115 */ 1116 static int kvmppc_emulate_doorbell_instr(struct kvm_vcpu *vcpu) 1117 { 1118 u32 inst, rb, thr; 1119 unsigned long arg; 1120 struct kvm *kvm = vcpu->kvm; 1121 struct kvm_vcpu *tvcpu; 1122 1123 if (kvmppc_get_last_inst(vcpu, INST_GENERIC, &inst) != EMULATE_DONE) 1124 return RESUME_GUEST; 1125 if (get_op(inst) != 31) 1126 return EMULATE_FAIL; 1127 rb = get_rb(inst); 1128 thr = vcpu->vcpu_id & (kvm->arch.emul_smt_mode - 1); 1129 switch (get_xop(inst)) { 1130 case OP_31_XOP_MSGSNDP: 1131 arg = kvmppc_get_gpr(vcpu, rb); 1132 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER) 1133 break; 1134 arg &= 0x3f; 1135 if (arg >= kvm->arch.emul_smt_mode) 1136 break; 1137 tvcpu = kvmppc_find_vcpu(kvm, vcpu->vcpu_id - thr + arg); 1138 if (!tvcpu) 1139 break; 1140 if (!tvcpu->arch.doorbell_request) { 1141 tvcpu->arch.doorbell_request = 1; 1142 kvmppc_fast_vcpu_kick_hv(tvcpu); 1143 } 1144 break; 1145 case OP_31_XOP_MSGCLRP: 1146 arg = kvmppc_get_gpr(vcpu, rb); 1147 if (((arg >> 27) & 0xf) != PPC_DBELL_SERVER) 1148 break; 1149 vcpu->arch.vcore->dpdes = 0; 1150 vcpu->arch.doorbell_request = 0; 1151 break; 1152 case OP_31_XOP_MFSPR: 1153 switch (get_sprn(inst)) { 1154 case SPRN_TIR: 1155 arg = thr; 1156 break; 1157 case SPRN_DPDES: 1158 arg = kvmppc_read_dpdes(vcpu); 1159 break; 1160 default: 1161 return EMULATE_FAIL; 1162 } 1163 kvmppc_set_gpr(vcpu, get_rt(inst), arg); 1164 break; 1165 default: 1166 return EMULATE_FAIL; 1167 } 1168 kvmppc_set_pc(vcpu, kvmppc_get_pc(vcpu) + 4); 1169 return RESUME_GUEST; 1170 } 1171 1172 static int kvmppc_handle_exit_hv(struct kvm_run *run, struct kvm_vcpu *vcpu, 1173 struct task_struct *tsk) 1174 { 1175 int r = RESUME_HOST; 1176 1177 vcpu->stat.sum_exits++; 1178 1179 /* 1180 * This can happen if an interrupt occurs in the last stages 1181 * of guest entry or the first stages of guest exit (i.e. after 1182 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1183 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1184 * That can happen due to a bug, or due to a machine check 1185 * occurring at just the wrong time. 1186 */ 1187 if (vcpu->arch.shregs.msr & MSR_HV) { 1188 printk(KERN_EMERG "KVM trap in HV mode!\n"); 1189 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1190 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1191 vcpu->arch.shregs.msr); 1192 kvmppc_dump_regs(vcpu); 1193 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 1194 run->hw.hardware_exit_reason = vcpu->arch.trap; 1195 return RESUME_HOST; 1196 } 1197 run->exit_reason = KVM_EXIT_UNKNOWN; 1198 run->ready_for_interrupt_injection = 1; 1199 switch (vcpu->arch.trap) { 1200 /* We're good on these - the host merely wanted to get our attention */ 1201 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1202 vcpu->stat.dec_exits++; 1203 r = RESUME_GUEST; 1204 break; 1205 case BOOK3S_INTERRUPT_EXTERNAL: 1206 case BOOK3S_INTERRUPT_H_DOORBELL: 1207 case BOOK3S_INTERRUPT_H_VIRT: 1208 vcpu->stat.ext_intr_exits++; 1209 r = RESUME_GUEST; 1210 break; 1211 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1212 case BOOK3S_INTERRUPT_HMI: 1213 case BOOK3S_INTERRUPT_PERFMON: 1214 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1215 r = RESUME_GUEST; 1216 break; 1217 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1218 /* Exit to guest with KVM_EXIT_NMI as exit reason */ 1219 run->exit_reason = KVM_EXIT_NMI; 1220 run->hw.hardware_exit_reason = vcpu->arch.trap; 1221 /* Clear out the old NMI status from run->flags */ 1222 run->flags &= ~KVM_RUN_PPC_NMI_DISP_MASK; 1223 /* Now set the NMI status */ 1224 if (vcpu->arch.mce_evt.disposition == MCE_DISPOSITION_RECOVERED) 1225 run->flags |= KVM_RUN_PPC_NMI_DISP_FULLY_RECOV; 1226 else 1227 run->flags |= KVM_RUN_PPC_NMI_DISP_NOT_RECOV; 1228 1229 r = RESUME_HOST; 1230 /* Print the MCE event to host console. */ 1231 machine_check_print_event_info(&vcpu->arch.mce_evt, false); 1232 break; 1233 case BOOK3S_INTERRUPT_PROGRAM: 1234 { 1235 ulong flags; 1236 /* 1237 * Normally program interrupts are delivered directly 1238 * to the guest by the hardware, but we can get here 1239 * as a result of a hypervisor emulation interrupt 1240 * (e40) getting turned into a 700 by BML RTAS. 1241 */ 1242 flags = vcpu->arch.shregs.msr & 0x1f0000ull; 1243 kvmppc_core_queue_program(vcpu, flags); 1244 r = RESUME_GUEST; 1245 break; 1246 } 1247 case BOOK3S_INTERRUPT_SYSCALL: 1248 { 1249 /* hcall - punt to userspace */ 1250 int i; 1251 1252 /* hypercall with MSR_PR has already been handled in rmode, 1253 * and never reaches here. 1254 */ 1255 1256 run->papr_hcall.nr = kvmppc_get_gpr(vcpu, 3); 1257 for (i = 0; i < 9; ++i) 1258 run->papr_hcall.args[i] = kvmppc_get_gpr(vcpu, 4 + i); 1259 run->exit_reason = KVM_EXIT_PAPR_HCALL; 1260 vcpu->arch.hcall_needed = 1; 1261 r = RESUME_HOST; 1262 break; 1263 } 1264 /* 1265 * We get these next two if the guest accesses a page which it thinks 1266 * it has mapped but which is not actually present, either because 1267 * it is for an emulated I/O device or because the corresonding 1268 * host page has been paged out. Any other HDSI/HISI interrupts 1269 * have been handled already. 1270 */ 1271 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1272 r = RESUME_PAGE_FAULT; 1273 break; 1274 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1275 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1276 vcpu->arch.fault_dsisr = vcpu->arch.shregs.msr & 1277 DSISR_SRR1_MATCH_64S; 1278 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1279 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1280 r = RESUME_PAGE_FAULT; 1281 break; 1282 /* 1283 * This occurs if the guest executes an illegal instruction. 1284 * If the guest debug is disabled, generate a program interrupt 1285 * to the guest. If guest debug is enabled, we need to check 1286 * whether the instruction is a software breakpoint instruction. 1287 * Accordingly return to Guest or Host. 1288 */ 1289 case BOOK3S_INTERRUPT_H_EMUL_ASSIST: 1290 if (vcpu->arch.emul_inst != KVM_INST_FETCH_FAILED) 1291 vcpu->arch.last_inst = kvmppc_need_byteswap(vcpu) ? 1292 swab32(vcpu->arch.emul_inst) : 1293 vcpu->arch.emul_inst; 1294 if (vcpu->guest_debug & KVM_GUESTDBG_USE_SW_BP) { 1295 r = kvmppc_emulate_debug_inst(run, vcpu); 1296 } else { 1297 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1298 r = RESUME_GUEST; 1299 } 1300 break; 1301 /* 1302 * This occurs if the guest (kernel or userspace), does something that 1303 * is prohibited by HFSCR. 1304 * On POWER9, this could be a doorbell instruction that we need 1305 * to emulate. 1306 * Otherwise, we just generate a program interrupt to the guest. 1307 */ 1308 case BOOK3S_INTERRUPT_H_FAC_UNAVAIL: 1309 r = EMULATE_FAIL; 1310 if (((vcpu->arch.hfscr >> 56) == FSCR_MSGP_LG) && 1311 cpu_has_feature(CPU_FTR_ARCH_300)) 1312 r = kvmppc_emulate_doorbell_instr(vcpu); 1313 if (r == EMULATE_FAIL) { 1314 kvmppc_core_queue_program(vcpu, SRR1_PROGILL); 1315 r = RESUME_GUEST; 1316 } 1317 break; 1318 1319 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1320 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1321 /* 1322 * This occurs for various TM-related instructions that 1323 * we need to emulate on POWER9 DD2.2. We have already 1324 * handled the cases where the guest was in real-suspend 1325 * mode and was transitioning to transactional state. 1326 */ 1327 r = kvmhv_p9_tm_emulation(vcpu); 1328 break; 1329 #endif 1330 1331 case BOOK3S_INTERRUPT_HV_RM_HARD: 1332 r = RESUME_PASSTHROUGH; 1333 break; 1334 default: 1335 kvmppc_dump_regs(vcpu); 1336 printk(KERN_EMERG "trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1337 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1338 vcpu->arch.shregs.msr); 1339 run->hw.hardware_exit_reason = vcpu->arch.trap; 1340 r = RESUME_HOST; 1341 break; 1342 } 1343 1344 return r; 1345 } 1346 1347 static int kvmppc_handle_nested_exit(struct kvm_run *run, struct kvm_vcpu *vcpu) 1348 { 1349 int r; 1350 int srcu_idx; 1351 1352 vcpu->stat.sum_exits++; 1353 1354 /* 1355 * This can happen if an interrupt occurs in the last stages 1356 * of guest entry or the first stages of guest exit (i.e. after 1357 * setting paca->kvm_hstate.in_guest to KVM_GUEST_MODE_GUEST_HV 1358 * and before setting it to KVM_GUEST_MODE_HOST_HV). 1359 * That can happen due to a bug, or due to a machine check 1360 * occurring at just the wrong time. 1361 */ 1362 if (vcpu->arch.shregs.msr & MSR_HV) { 1363 pr_emerg("KVM trap in HV mode while nested!\n"); 1364 pr_emerg("trap=0x%x | pc=0x%lx | msr=0x%llx\n", 1365 vcpu->arch.trap, kvmppc_get_pc(vcpu), 1366 vcpu->arch.shregs.msr); 1367 kvmppc_dump_regs(vcpu); 1368 return RESUME_HOST; 1369 } 1370 switch (vcpu->arch.trap) { 1371 /* We're good on these - the host merely wanted to get our attention */ 1372 case BOOK3S_INTERRUPT_HV_DECREMENTER: 1373 vcpu->stat.dec_exits++; 1374 r = RESUME_GUEST; 1375 break; 1376 case BOOK3S_INTERRUPT_EXTERNAL: 1377 vcpu->stat.ext_intr_exits++; 1378 r = RESUME_HOST; 1379 break; 1380 case BOOK3S_INTERRUPT_H_DOORBELL: 1381 case BOOK3S_INTERRUPT_H_VIRT: 1382 vcpu->stat.ext_intr_exits++; 1383 r = RESUME_GUEST; 1384 break; 1385 /* SR/HMI/PMI are HV interrupts that host has handled. Resume guest.*/ 1386 case BOOK3S_INTERRUPT_HMI: 1387 case BOOK3S_INTERRUPT_PERFMON: 1388 case BOOK3S_INTERRUPT_SYSTEM_RESET: 1389 r = RESUME_GUEST; 1390 break; 1391 case BOOK3S_INTERRUPT_MACHINE_CHECK: 1392 /* Pass the machine check to the L1 guest */ 1393 r = RESUME_HOST; 1394 /* Print the MCE event to host console. */ 1395 machine_check_print_event_info(&vcpu->arch.mce_evt, false); 1396 break; 1397 /* 1398 * We get these next two if the guest accesses a page which it thinks 1399 * it has mapped but which is not actually present, either because 1400 * it is for an emulated I/O device or because the corresonding 1401 * host page has been paged out. 1402 */ 1403 case BOOK3S_INTERRUPT_H_DATA_STORAGE: 1404 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1405 r = kvmhv_nested_page_fault(run, vcpu); 1406 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1407 break; 1408 case BOOK3S_INTERRUPT_H_INST_STORAGE: 1409 vcpu->arch.fault_dar = kvmppc_get_pc(vcpu); 1410 vcpu->arch.fault_dsisr = kvmppc_get_msr(vcpu) & 1411 DSISR_SRR1_MATCH_64S; 1412 if (vcpu->arch.shregs.msr & HSRR1_HISI_WRITE) 1413 vcpu->arch.fault_dsisr |= DSISR_ISSTORE; 1414 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 1415 r = kvmhv_nested_page_fault(run, vcpu); 1416 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 1417 break; 1418 1419 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1420 case BOOK3S_INTERRUPT_HV_SOFTPATCH: 1421 /* 1422 * This occurs for various TM-related instructions that 1423 * we need to emulate on POWER9 DD2.2. We have already 1424 * handled the cases where the guest was in real-suspend 1425 * mode and was transitioning to transactional state. 1426 */ 1427 r = kvmhv_p9_tm_emulation(vcpu); 1428 break; 1429 #endif 1430 1431 case BOOK3S_INTERRUPT_HV_RM_HARD: 1432 vcpu->arch.trap = 0; 1433 r = RESUME_GUEST; 1434 if (!xive_enabled()) 1435 kvmppc_xics_rm_complete(vcpu, 0); 1436 break; 1437 default: 1438 r = RESUME_HOST; 1439 break; 1440 } 1441 1442 return r; 1443 } 1444 1445 static int kvm_arch_vcpu_ioctl_get_sregs_hv(struct kvm_vcpu *vcpu, 1446 struct kvm_sregs *sregs) 1447 { 1448 int i; 1449 1450 memset(sregs, 0, sizeof(struct kvm_sregs)); 1451 sregs->pvr = vcpu->arch.pvr; 1452 for (i = 0; i < vcpu->arch.slb_max; i++) { 1453 sregs->u.s.ppc64.slb[i].slbe = vcpu->arch.slb[i].orige; 1454 sregs->u.s.ppc64.slb[i].slbv = vcpu->arch.slb[i].origv; 1455 } 1456 1457 return 0; 1458 } 1459 1460 static int kvm_arch_vcpu_ioctl_set_sregs_hv(struct kvm_vcpu *vcpu, 1461 struct kvm_sregs *sregs) 1462 { 1463 int i, j; 1464 1465 /* Only accept the same PVR as the host's, since we can't spoof it */ 1466 if (sregs->pvr != vcpu->arch.pvr) 1467 return -EINVAL; 1468 1469 j = 0; 1470 for (i = 0; i < vcpu->arch.slb_nr; i++) { 1471 if (sregs->u.s.ppc64.slb[i].slbe & SLB_ESID_V) { 1472 vcpu->arch.slb[j].orige = sregs->u.s.ppc64.slb[i].slbe; 1473 vcpu->arch.slb[j].origv = sregs->u.s.ppc64.slb[i].slbv; 1474 ++j; 1475 } 1476 } 1477 vcpu->arch.slb_max = j; 1478 1479 return 0; 1480 } 1481 1482 static void kvmppc_set_lpcr(struct kvm_vcpu *vcpu, u64 new_lpcr, 1483 bool preserve_top32) 1484 { 1485 struct kvm *kvm = vcpu->kvm; 1486 struct kvmppc_vcore *vc = vcpu->arch.vcore; 1487 u64 mask; 1488 1489 mutex_lock(&kvm->lock); 1490 spin_lock(&vc->lock); 1491 /* 1492 * If ILE (interrupt little-endian) has changed, update the 1493 * MSR_LE bit in the intr_msr for each vcpu in this vcore. 1494 */ 1495 if ((new_lpcr & LPCR_ILE) != (vc->lpcr & LPCR_ILE)) { 1496 struct kvm_vcpu *vcpu; 1497 int i; 1498 1499 kvm_for_each_vcpu(i, vcpu, kvm) { 1500 if (vcpu->arch.vcore != vc) 1501 continue; 1502 if (new_lpcr & LPCR_ILE) 1503 vcpu->arch.intr_msr |= MSR_LE; 1504 else 1505 vcpu->arch.intr_msr &= ~MSR_LE; 1506 } 1507 } 1508 1509 /* 1510 * Userspace can only modify DPFD (default prefetch depth), 1511 * ILE (interrupt little-endian) and TC (translation control). 1512 * On POWER8 and POWER9 userspace can also modify AIL (alt. interrupt loc.). 1513 */ 1514 mask = LPCR_DPFD | LPCR_ILE | LPCR_TC; 1515 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 1516 mask |= LPCR_AIL; 1517 /* 1518 * On POWER9, allow userspace to enable large decrementer for the 1519 * guest, whether or not the host has it enabled. 1520 */ 1521 if (cpu_has_feature(CPU_FTR_ARCH_300)) 1522 mask |= LPCR_LD; 1523 1524 /* Broken 32-bit version of LPCR must not clear top bits */ 1525 if (preserve_top32) 1526 mask &= 0xFFFFFFFF; 1527 vc->lpcr = (vc->lpcr & ~mask) | (new_lpcr & mask); 1528 spin_unlock(&vc->lock); 1529 mutex_unlock(&kvm->lock); 1530 } 1531 1532 static int kvmppc_get_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 1533 union kvmppc_one_reg *val) 1534 { 1535 int r = 0; 1536 long int i; 1537 1538 switch (id) { 1539 case KVM_REG_PPC_DEBUG_INST: 1540 *val = get_reg_val(id, KVMPPC_INST_SW_BREAKPOINT); 1541 break; 1542 case KVM_REG_PPC_HIOR: 1543 *val = get_reg_val(id, 0); 1544 break; 1545 case KVM_REG_PPC_DABR: 1546 *val = get_reg_val(id, vcpu->arch.dabr); 1547 break; 1548 case KVM_REG_PPC_DABRX: 1549 *val = get_reg_val(id, vcpu->arch.dabrx); 1550 break; 1551 case KVM_REG_PPC_DSCR: 1552 *val = get_reg_val(id, vcpu->arch.dscr); 1553 break; 1554 case KVM_REG_PPC_PURR: 1555 *val = get_reg_val(id, vcpu->arch.purr); 1556 break; 1557 case KVM_REG_PPC_SPURR: 1558 *val = get_reg_val(id, vcpu->arch.spurr); 1559 break; 1560 case KVM_REG_PPC_AMR: 1561 *val = get_reg_val(id, vcpu->arch.amr); 1562 break; 1563 case KVM_REG_PPC_UAMOR: 1564 *val = get_reg_val(id, vcpu->arch.uamor); 1565 break; 1566 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS: 1567 i = id - KVM_REG_PPC_MMCR0; 1568 *val = get_reg_val(id, vcpu->arch.mmcr[i]); 1569 break; 1570 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 1571 i = id - KVM_REG_PPC_PMC1; 1572 *val = get_reg_val(id, vcpu->arch.pmc[i]); 1573 break; 1574 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 1575 i = id - KVM_REG_PPC_SPMC1; 1576 *val = get_reg_val(id, vcpu->arch.spmc[i]); 1577 break; 1578 case KVM_REG_PPC_SIAR: 1579 *val = get_reg_val(id, vcpu->arch.siar); 1580 break; 1581 case KVM_REG_PPC_SDAR: 1582 *val = get_reg_val(id, vcpu->arch.sdar); 1583 break; 1584 case KVM_REG_PPC_SIER: 1585 *val = get_reg_val(id, vcpu->arch.sier); 1586 break; 1587 case KVM_REG_PPC_IAMR: 1588 *val = get_reg_val(id, vcpu->arch.iamr); 1589 break; 1590 case KVM_REG_PPC_PSPB: 1591 *val = get_reg_val(id, vcpu->arch.pspb); 1592 break; 1593 case KVM_REG_PPC_DPDES: 1594 *val = get_reg_val(id, vcpu->arch.vcore->dpdes); 1595 break; 1596 case KVM_REG_PPC_VTB: 1597 *val = get_reg_val(id, vcpu->arch.vcore->vtb); 1598 break; 1599 case KVM_REG_PPC_DAWR: 1600 *val = get_reg_val(id, vcpu->arch.dawr); 1601 break; 1602 case KVM_REG_PPC_DAWRX: 1603 *val = get_reg_val(id, vcpu->arch.dawrx); 1604 break; 1605 case KVM_REG_PPC_CIABR: 1606 *val = get_reg_val(id, vcpu->arch.ciabr); 1607 break; 1608 case KVM_REG_PPC_CSIGR: 1609 *val = get_reg_val(id, vcpu->arch.csigr); 1610 break; 1611 case KVM_REG_PPC_TACR: 1612 *val = get_reg_val(id, vcpu->arch.tacr); 1613 break; 1614 case KVM_REG_PPC_TCSCR: 1615 *val = get_reg_val(id, vcpu->arch.tcscr); 1616 break; 1617 case KVM_REG_PPC_PID: 1618 *val = get_reg_val(id, vcpu->arch.pid); 1619 break; 1620 case KVM_REG_PPC_ACOP: 1621 *val = get_reg_val(id, vcpu->arch.acop); 1622 break; 1623 case KVM_REG_PPC_WORT: 1624 *val = get_reg_val(id, vcpu->arch.wort); 1625 break; 1626 case KVM_REG_PPC_TIDR: 1627 *val = get_reg_val(id, vcpu->arch.tid); 1628 break; 1629 case KVM_REG_PPC_PSSCR: 1630 *val = get_reg_val(id, vcpu->arch.psscr); 1631 break; 1632 case KVM_REG_PPC_VPA_ADDR: 1633 spin_lock(&vcpu->arch.vpa_update_lock); 1634 *val = get_reg_val(id, vcpu->arch.vpa.next_gpa); 1635 spin_unlock(&vcpu->arch.vpa_update_lock); 1636 break; 1637 case KVM_REG_PPC_VPA_SLB: 1638 spin_lock(&vcpu->arch.vpa_update_lock); 1639 val->vpaval.addr = vcpu->arch.slb_shadow.next_gpa; 1640 val->vpaval.length = vcpu->arch.slb_shadow.len; 1641 spin_unlock(&vcpu->arch.vpa_update_lock); 1642 break; 1643 case KVM_REG_PPC_VPA_DTL: 1644 spin_lock(&vcpu->arch.vpa_update_lock); 1645 val->vpaval.addr = vcpu->arch.dtl.next_gpa; 1646 val->vpaval.length = vcpu->arch.dtl.len; 1647 spin_unlock(&vcpu->arch.vpa_update_lock); 1648 break; 1649 case KVM_REG_PPC_TB_OFFSET: 1650 *val = get_reg_val(id, vcpu->arch.vcore->tb_offset); 1651 break; 1652 case KVM_REG_PPC_LPCR: 1653 case KVM_REG_PPC_LPCR_64: 1654 *val = get_reg_val(id, vcpu->arch.vcore->lpcr); 1655 break; 1656 case KVM_REG_PPC_PPR: 1657 *val = get_reg_val(id, vcpu->arch.ppr); 1658 break; 1659 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1660 case KVM_REG_PPC_TFHAR: 1661 *val = get_reg_val(id, vcpu->arch.tfhar); 1662 break; 1663 case KVM_REG_PPC_TFIAR: 1664 *val = get_reg_val(id, vcpu->arch.tfiar); 1665 break; 1666 case KVM_REG_PPC_TEXASR: 1667 *val = get_reg_val(id, vcpu->arch.texasr); 1668 break; 1669 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 1670 i = id - KVM_REG_PPC_TM_GPR0; 1671 *val = get_reg_val(id, vcpu->arch.gpr_tm[i]); 1672 break; 1673 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 1674 { 1675 int j; 1676 i = id - KVM_REG_PPC_TM_VSR0; 1677 if (i < 32) 1678 for (j = 0; j < TS_FPRWIDTH; j++) 1679 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j]; 1680 else { 1681 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1682 val->vval = vcpu->arch.vr_tm.vr[i-32]; 1683 else 1684 r = -ENXIO; 1685 } 1686 break; 1687 } 1688 case KVM_REG_PPC_TM_CR: 1689 *val = get_reg_val(id, vcpu->arch.cr_tm); 1690 break; 1691 case KVM_REG_PPC_TM_XER: 1692 *val = get_reg_val(id, vcpu->arch.xer_tm); 1693 break; 1694 case KVM_REG_PPC_TM_LR: 1695 *val = get_reg_val(id, vcpu->arch.lr_tm); 1696 break; 1697 case KVM_REG_PPC_TM_CTR: 1698 *val = get_reg_val(id, vcpu->arch.ctr_tm); 1699 break; 1700 case KVM_REG_PPC_TM_FPSCR: 1701 *val = get_reg_val(id, vcpu->arch.fp_tm.fpscr); 1702 break; 1703 case KVM_REG_PPC_TM_AMR: 1704 *val = get_reg_val(id, vcpu->arch.amr_tm); 1705 break; 1706 case KVM_REG_PPC_TM_PPR: 1707 *val = get_reg_val(id, vcpu->arch.ppr_tm); 1708 break; 1709 case KVM_REG_PPC_TM_VRSAVE: 1710 *val = get_reg_val(id, vcpu->arch.vrsave_tm); 1711 break; 1712 case KVM_REG_PPC_TM_VSCR: 1713 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1714 *val = get_reg_val(id, vcpu->arch.vr_tm.vscr.u[3]); 1715 else 1716 r = -ENXIO; 1717 break; 1718 case KVM_REG_PPC_TM_DSCR: 1719 *val = get_reg_val(id, vcpu->arch.dscr_tm); 1720 break; 1721 case KVM_REG_PPC_TM_TAR: 1722 *val = get_reg_val(id, vcpu->arch.tar_tm); 1723 break; 1724 #endif 1725 case KVM_REG_PPC_ARCH_COMPAT: 1726 *val = get_reg_val(id, vcpu->arch.vcore->arch_compat); 1727 break; 1728 case KVM_REG_PPC_DEC_EXPIRY: 1729 *val = get_reg_val(id, vcpu->arch.dec_expires + 1730 vcpu->arch.vcore->tb_offset); 1731 break; 1732 case KVM_REG_PPC_ONLINE: 1733 *val = get_reg_val(id, vcpu->arch.online); 1734 break; 1735 case KVM_REG_PPC_PTCR: 1736 *val = get_reg_val(id, vcpu->kvm->arch.l1_ptcr); 1737 break; 1738 default: 1739 r = -EINVAL; 1740 break; 1741 } 1742 1743 return r; 1744 } 1745 1746 static int kvmppc_set_one_reg_hv(struct kvm_vcpu *vcpu, u64 id, 1747 union kvmppc_one_reg *val) 1748 { 1749 int r = 0; 1750 long int i; 1751 unsigned long addr, len; 1752 1753 switch (id) { 1754 case KVM_REG_PPC_HIOR: 1755 /* Only allow this to be set to zero */ 1756 if (set_reg_val(id, *val)) 1757 r = -EINVAL; 1758 break; 1759 case KVM_REG_PPC_DABR: 1760 vcpu->arch.dabr = set_reg_val(id, *val); 1761 break; 1762 case KVM_REG_PPC_DABRX: 1763 vcpu->arch.dabrx = set_reg_val(id, *val) & ~DABRX_HYP; 1764 break; 1765 case KVM_REG_PPC_DSCR: 1766 vcpu->arch.dscr = set_reg_val(id, *val); 1767 break; 1768 case KVM_REG_PPC_PURR: 1769 vcpu->arch.purr = set_reg_val(id, *val); 1770 break; 1771 case KVM_REG_PPC_SPURR: 1772 vcpu->arch.spurr = set_reg_val(id, *val); 1773 break; 1774 case KVM_REG_PPC_AMR: 1775 vcpu->arch.amr = set_reg_val(id, *val); 1776 break; 1777 case KVM_REG_PPC_UAMOR: 1778 vcpu->arch.uamor = set_reg_val(id, *val); 1779 break; 1780 case KVM_REG_PPC_MMCR0 ... KVM_REG_PPC_MMCRS: 1781 i = id - KVM_REG_PPC_MMCR0; 1782 vcpu->arch.mmcr[i] = set_reg_val(id, *val); 1783 break; 1784 case KVM_REG_PPC_PMC1 ... KVM_REG_PPC_PMC8: 1785 i = id - KVM_REG_PPC_PMC1; 1786 vcpu->arch.pmc[i] = set_reg_val(id, *val); 1787 break; 1788 case KVM_REG_PPC_SPMC1 ... KVM_REG_PPC_SPMC2: 1789 i = id - KVM_REG_PPC_SPMC1; 1790 vcpu->arch.spmc[i] = set_reg_val(id, *val); 1791 break; 1792 case KVM_REG_PPC_SIAR: 1793 vcpu->arch.siar = set_reg_val(id, *val); 1794 break; 1795 case KVM_REG_PPC_SDAR: 1796 vcpu->arch.sdar = set_reg_val(id, *val); 1797 break; 1798 case KVM_REG_PPC_SIER: 1799 vcpu->arch.sier = set_reg_val(id, *val); 1800 break; 1801 case KVM_REG_PPC_IAMR: 1802 vcpu->arch.iamr = set_reg_val(id, *val); 1803 break; 1804 case KVM_REG_PPC_PSPB: 1805 vcpu->arch.pspb = set_reg_val(id, *val); 1806 break; 1807 case KVM_REG_PPC_DPDES: 1808 vcpu->arch.vcore->dpdes = set_reg_val(id, *val); 1809 break; 1810 case KVM_REG_PPC_VTB: 1811 vcpu->arch.vcore->vtb = set_reg_val(id, *val); 1812 break; 1813 case KVM_REG_PPC_DAWR: 1814 vcpu->arch.dawr = set_reg_val(id, *val); 1815 break; 1816 case KVM_REG_PPC_DAWRX: 1817 vcpu->arch.dawrx = set_reg_val(id, *val) & ~DAWRX_HYP; 1818 break; 1819 case KVM_REG_PPC_CIABR: 1820 vcpu->arch.ciabr = set_reg_val(id, *val); 1821 /* Don't allow setting breakpoints in hypervisor code */ 1822 if ((vcpu->arch.ciabr & CIABR_PRIV) == CIABR_PRIV_HYPER) 1823 vcpu->arch.ciabr &= ~CIABR_PRIV; /* disable */ 1824 break; 1825 case KVM_REG_PPC_CSIGR: 1826 vcpu->arch.csigr = set_reg_val(id, *val); 1827 break; 1828 case KVM_REG_PPC_TACR: 1829 vcpu->arch.tacr = set_reg_val(id, *val); 1830 break; 1831 case KVM_REG_PPC_TCSCR: 1832 vcpu->arch.tcscr = set_reg_val(id, *val); 1833 break; 1834 case KVM_REG_PPC_PID: 1835 vcpu->arch.pid = set_reg_val(id, *val); 1836 break; 1837 case KVM_REG_PPC_ACOP: 1838 vcpu->arch.acop = set_reg_val(id, *val); 1839 break; 1840 case KVM_REG_PPC_WORT: 1841 vcpu->arch.wort = set_reg_val(id, *val); 1842 break; 1843 case KVM_REG_PPC_TIDR: 1844 vcpu->arch.tid = set_reg_val(id, *val); 1845 break; 1846 case KVM_REG_PPC_PSSCR: 1847 vcpu->arch.psscr = set_reg_val(id, *val) & PSSCR_GUEST_VIS; 1848 break; 1849 case KVM_REG_PPC_VPA_ADDR: 1850 addr = set_reg_val(id, *val); 1851 r = -EINVAL; 1852 if (!addr && (vcpu->arch.slb_shadow.next_gpa || 1853 vcpu->arch.dtl.next_gpa)) 1854 break; 1855 r = set_vpa(vcpu, &vcpu->arch.vpa, addr, sizeof(struct lppaca)); 1856 break; 1857 case KVM_REG_PPC_VPA_SLB: 1858 addr = val->vpaval.addr; 1859 len = val->vpaval.length; 1860 r = -EINVAL; 1861 if (addr && !vcpu->arch.vpa.next_gpa) 1862 break; 1863 r = set_vpa(vcpu, &vcpu->arch.slb_shadow, addr, len); 1864 break; 1865 case KVM_REG_PPC_VPA_DTL: 1866 addr = val->vpaval.addr; 1867 len = val->vpaval.length; 1868 r = -EINVAL; 1869 if (addr && (len < sizeof(struct dtl_entry) || 1870 !vcpu->arch.vpa.next_gpa)) 1871 break; 1872 len -= len % sizeof(struct dtl_entry); 1873 r = set_vpa(vcpu, &vcpu->arch.dtl, addr, len); 1874 break; 1875 case KVM_REG_PPC_TB_OFFSET: 1876 /* round up to multiple of 2^24 */ 1877 vcpu->arch.vcore->tb_offset = 1878 ALIGN(set_reg_val(id, *val), 1UL << 24); 1879 break; 1880 case KVM_REG_PPC_LPCR: 1881 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), true); 1882 break; 1883 case KVM_REG_PPC_LPCR_64: 1884 kvmppc_set_lpcr(vcpu, set_reg_val(id, *val), false); 1885 break; 1886 case KVM_REG_PPC_PPR: 1887 vcpu->arch.ppr = set_reg_val(id, *val); 1888 break; 1889 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 1890 case KVM_REG_PPC_TFHAR: 1891 vcpu->arch.tfhar = set_reg_val(id, *val); 1892 break; 1893 case KVM_REG_PPC_TFIAR: 1894 vcpu->arch.tfiar = set_reg_val(id, *val); 1895 break; 1896 case KVM_REG_PPC_TEXASR: 1897 vcpu->arch.texasr = set_reg_val(id, *val); 1898 break; 1899 case KVM_REG_PPC_TM_GPR0 ... KVM_REG_PPC_TM_GPR31: 1900 i = id - KVM_REG_PPC_TM_GPR0; 1901 vcpu->arch.gpr_tm[i] = set_reg_val(id, *val); 1902 break; 1903 case KVM_REG_PPC_TM_VSR0 ... KVM_REG_PPC_TM_VSR63: 1904 { 1905 int j; 1906 i = id - KVM_REG_PPC_TM_VSR0; 1907 if (i < 32) 1908 for (j = 0; j < TS_FPRWIDTH; j++) 1909 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j]; 1910 else 1911 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1912 vcpu->arch.vr_tm.vr[i-32] = val->vval; 1913 else 1914 r = -ENXIO; 1915 break; 1916 } 1917 case KVM_REG_PPC_TM_CR: 1918 vcpu->arch.cr_tm = set_reg_val(id, *val); 1919 break; 1920 case KVM_REG_PPC_TM_XER: 1921 vcpu->arch.xer_tm = set_reg_val(id, *val); 1922 break; 1923 case KVM_REG_PPC_TM_LR: 1924 vcpu->arch.lr_tm = set_reg_val(id, *val); 1925 break; 1926 case KVM_REG_PPC_TM_CTR: 1927 vcpu->arch.ctr_tm = set_reg_val(id, *val); 1928 break; 1929 case KVM_REG_PPC_TM_FPSCR: 1930 vcpu->arch.fp_tm.fpscr = set_reg_val(id, *val); 1931 break; 1932 case KVM_REG_PPC_TM_AMR: 1933 vcpu->arch.amr_tm = set_reg_val(id, *val); 1934 break; 1935 case KVM_REG_PPC_TM_PPR: 1936 vcpu->arch.ppr_tm = set_reg_val(id, *val); 1937 break; 1938 case KVM_REG_PPC_TM_VRSAVE: 1939 vcpu->arch.vrsave_tm = set_reg_val(id, *val); 1940 break; 1941 case KVM_REG_PPC_TM_VSCR: 1942 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 1943 vcpu->arch.vr.vscr.u[3] = set_reg_val(id, *val); 1944 else 1945 r = - ENXIO; 1946 break; 1947 case KVM_REG_PPC_TM_DSCR: 1948 vcpu->arch.dscr_tm = set_reg_val(id, *val); 1949 break; 1950 case KVM_REG_PPC_TM_TAR: 1951 vcpu->arch.tar_tm = set_reg_val(id, *val); 1952 break; 1953 #endif 1954 case KVM_REG_PPC_ARCH_COMPAT: 1955 r = kvmppc_set_arch_compat(vcpu, set_reg_val(id, *val)); 1956 break; 1957 case KVM_REG_PPC_DEC_EXPIRY: 1958 vcpu->arch.dec_expires = set_reg_val(id, *val) - 1959 vcpu->arch.vcore->tb_offset; 1960 break; 1961 case KVM_REG_PPC_ONLINE: 1962 i = set_reg_val(id, *val); 1963 if (i && !vcpu->arch.online) 1964 atomic_inc(&vcpu->arch.vcore->online_count); 1965 else if (!i && vcpu->arch.online) 1966 atomic_dec(&vcpu->arch.vcore->online_count); 1967 vcpu->arch.online = i; 1968 break; 1969 case KVM_REG_PPC_PTCR: 1970 vcpu->kvm->arch.l1_ptcr = set_reg_val(id, *val); 1971 break; 1972 default: 1973 r = -EINVAL; 1974 break; 1975 } 1976 1977 return r; 1978 } 1979 1980 /* 1981 * On POWER9, threads are independent and can be in different partitions. 1982 * Therefore we consider each thread to be a subcore. 1983 * There is a restriction that all threads have to be in the same 1984 * MMU mode (radix or HPT), unfortunately, but since we only support 1985 * HPT guests on a HPT host so far, that isn't an impediment yet. 1986 */ 1987 static int threads_per_vcore(struct kvm *kvm) 1988 { 1989 if (kvm->arch.threads_indep) 1990 return 1; 1991 return threads_per_subcore; 1992 } 1993 1994 static struct kvmppc_vcore *kvmppc_vcore_create(struct kvm *kvm, int id) 1995 { 1996 struct kvmppc_vcore *vcore; 1997 1998 vcore = kzalloc(sizeof(struct kvmppc_vcore), GFP_KERNEL); 1999 2000 if (vcore == NULL) 2001 return NULL; 2002 2003 spin_lock_init(&vcore->lock); 2004 spin_lock_init(&vcore->stoltb_lock); 2005 init_swait_queue_head(&vcore->wq); 2006 vcore->preempt_tb = TB_NIL; 2007 vcore->lpcr = kvm->arch.lpcr; 2008 vcore->first_vcpuid = id; 2009 vcore->kvm = kvm; 2010 INIT_LIST_HEAD(&vcore->preempt_list); 2011 2012 return vcore; 2013 } 2014 2015 #ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING 2016 static struct debugfs_timings_element { 2017 const char *name; 2018 size_t offset; 2019 } timings[] = { 2020 {"rm_entry", offsetof(struct kvm_vcpu, arch.rm_entry)}, 2021 {"rm_intr", offsetof(struct kvm_vcpu, arch.rm_intr)}, 2022 {"rm_exit", offsetof(struct kvm_vcpu, arch.rm_exit)}, 2023 {"guest", offsetof(struct kvm_vcpu, arch.guest_time)}, 2024 {"cede", offsetof(struct kvm_vcpu, arch.cede_time)}, 2025 }; 2026 2027 #define N_TIMINGS (ARRAY_SIZE(timings)) 2028 2029 struct debugfs_timings_state { 2030 struct kvm_vcpu *vcpu; 2031 unsigned int buflen; 2032 char buf[N_TIMINGS * 100]; 2033 }; 2034 2035 static int debugfs_timings_open(struct inode *inode, struct file *file) 2036 { 2037 struct kvm_vcpu *vcpu = inode->i_private; 2038 struct debugfs_timings_state *p; 2039 2040 p = kzalloc(sizeof(*p), GFP_KERNEL); 2041 if (!p) 2042 return -ENOMEM; 2043 2044 kvm_get_kvm(vcpu->kvm); 2045 p->vcpu = vcpu; 2046 file->private_data = p; 2047 2048 return nonseekable_open(inode, file); 2049 } 2050 2051 static int debugfs_timings_release(struct inode *inode, struct file *file) 2052 { 2053 struct debugfs_timings_state *p = file->private_data; 2054 2055 kvm_put_kvm(p->vcpu->kvm); 2056 kfree(p); 2057 return 0; 2058 } 2059 2060 static ssize_t debugfs_timings_read(struct file *file, char __user *buf, 2061 size_t len, loff_t *ppos) 2062 { 2063 struct debugfs_timings_state *p = file->private_data; 2064 struct kvm_vcpu *vcpu = p->vcpu; 2065 char *s, *buf_end; 2066 struct kvmhv_tb_accumulator tb; 2067 u64 count; 2068 loff_t pos; 2069 ssize_t n; 2070 int i, loops; 2071 bool ok; 2072 2073 if (!p->buflen) { 2074 s = p->buf; 2075 buf_end = s + sizeof(p->buf); 2076 for (i = 0; i < N_TIMINGS; ++i) { 2077 struct kvmhv_tb_accumulator *acc; 2078 2079 acc = (struct kvmhv_tb_accumulator *) 2080 ((unsigned long)vcpu + timings[i].offset); 2081 ok = false; 2082 for (loops = 0; loops < 1000; ++loops) { 2083 count = acc->seqcount; 2084 if (!(count & 1)) { 2085 smp_rmb(); 2086 tb = *acc; 2087 smp_rmb(); 2088 if (count == acc->seqcount) { 2089 ok = true; 2090 break; 2091 } 2092 } 2093 udelay(1); 2094 } 2095 if (!ok) 2096 snprintf(s, buf_end - s, "%s: stuck\n", 2097 timings[i].name); 2098 else 2099 snprintf(s, buf_end - s, 2100 "%s: %llu %llu %llu %llu\n", 2101 timings[i].name, count / 2, 2102 tb_to_ns(tb.tb_total), 2103 tb_to_ns(tb.tb_min), 2104 tb_to_ns(tb.tb_max)); 2105 s += strlen(s); 2106 } 2107 p->buflen = s - p->buf; 2108 } 2109 2110 pos = *ppos; 2111 if (pos >= p->buflen) 2112 return 0; 2113 if (len > p->buflen - pos) 2114 len = p->buflen - pos; 2115 n = copy_to_user(buf, p->buf + pos, len); 2116 if (n) { 2117 if (n == len) 2118 return -EFAULT; 2119 len -= n; 2120 } 2121 *ppos = pos + len; 2122 return len; 2123 } 2124 2125 static ssize_t debugfs_timings_write(struct file *file, const char __user *buf, 2126 size_t len, loff_t *ppos) 2127 { 2128 return -EACCES; 2129 } 2130 2131 static const struct file_operations debugfs_timings_ops = { 2132 .owner = THIS_MODULE, 2133 .open = debugfs_timings_open, 2134 .release = debugfs_timings_release, 2135 .read = debugfs_timings_read, 2136 .write = debugfs_timings_write, 2137 .llseek = generic_file_llseek, 2138 }; 2139 2140 /* Create a debugfs directory for the vcpu */ 2141 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2142 { 2143 char buf[16]; 2144 struct kvm *kvm = vcpu->kvm; 2145 2146 snprintf(buf, sizeof(buf), "vcpu%u", id); 2147 if (IS_ERR_OR_NULL(kvm->arch.debugfs_dir)) 2148 return; 2149 vcpu->arch.debugfs_dir = debugfs_create_dir(buf, kvm->arch.debugfs_dir); 2150 if (IS_ERR_OR_NULL(vcpu->arch.debugfs_dir)) 2151 return; 2152 vcpu->arch.debugfs_timings = 2153 debugfs_create_file("timings", 0444, vcpu->arch.debugfs_dir, 2154 vcpu, &debugfs_timings_ops); 2155 } 2156 2157 #else /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2158 static void debugfs_vcpu_init(struct kvm_vcpu *vcpu, unsigned int id) 2159 { 2160 } 2161 #endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */ 2162 2163 static struct kvm_vcpu *kvmppc_core_vcpu_create_hv(struct kvm *kvm, 2164 unsigned int id) 2165 { 2166 struct kvm_vcpu *vcpu; 2167 int err; 2168 int core; 2169 struct kvmppc_vcore *vcore; 2170 2171 err = -ENOMEM; 2172 vcpu = kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL); 2173 if (!vcpu) 2174 goto out; 2175 2176 err = kvm_vcpu_init(vcpu, kvm, id); 2177 if (err) 2178 goto free_vcpu; 2179 2180 vcpu->arch.shared = &vcpu->arch.shregs; 2181 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE 2182 /* 2183 * The shared struct is never shared on HV, 2184 * so we can always use host endianness 2185 */ 2186 #ifdef __BIG_ENDIAN__ 2187 vcpu->arch.shared_big_endian = true; 2188 #else 2189 vcpu->arch.shared_big_endian = false; 2190 #endif 2191 #endif 2192 vcpu->arch.mmcr[0] = MMCR0_FC; 2193 vcpu->arch.ctrl = CTRL_RUNLATCH; 2194 /* default to host PVR, since we can't spoof it */ 2195 kvmppc_set_pvr_hv(vcpu, mfspr(SPRN_PVR)); 2196 spin_lock_init(&vcpu->arch.vpa_update_lock); 2197 spin_lock_init(&vcpu->arch.tbacct_lock); 2198 vcpu->arch.busy_preempt = TB_NIL; 2199 vcpu->arch.intr_msr = MSR_SF | MSR_ME; 2200 2201 /* 2202 * Set the default HFSCR for the guest from the host value. 2203 * This value is only used on POWER9. 2204 * On POWER9, we want to virtualize the doorbell facility, so we 2205 * don't set the HFSCR_MSGP bit, and that causes those instructions 2206 * to trap and then we emulate them. 2207 */ 2208 vcpu->arch.hfscr = HFSCR_TAR | HFSCR_EBB | HFSCR_PM | HFSCR_BHRB | 2209 HFSCR_DSCR | HFSCR_VECVSX | HFSCR_FP; 2210 if (cpu_has_feature(CPU_FTR_HVMODE)) { 2211 vcpu->arch.hfscr &= mfspr(SPRN_HFSCR); 2212 if (cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 2213 vcpu->arch.hfscr |= HFSCR_TM; 2214 } 2215 if (cpu_has_feature(CPU_FTR_TM_COMP)) 2216 vcpu->arch.hfscr |= HFSCR_TM; 2217 2218 kvmppc_mmu_book3s_hv_init(vcpu); 2219 2220 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 2221 2222 init_waitqueue_head(&vcpu->arch.cpu_run); 2223 2224 mutex_lock(&kvm->lock); 2225 vcore = NULL; 2226 err = -EINVAL; 2227 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 2228 if (id >= (KVM_MAX_VCPUS * kvm->arch.emul_smt_mode)) { 2229 pr_devel("KVM: VCPU ID too high\n"); 2230 core = KVM_MAX_VCORES; 2231 } else { 2232 BUG_ON(kvm->arch.smt_mode != 1); 2233 core = kvmppc_pack_vcpu_id(kvm, id); 2234 } 2235 } else { 2236 core = id / kvm->arch.smt_mode; 2237 } 2238 if (core < KVM_MAX_VCORES) { 2239 vcore = kvm->arch.vcores[core]; 2240 if (vcore && cpu_has_feature(CPU_FTR_ARCH_300)) { 2241 pr_devel("KVM: collision on id %u", id); 2242 vcore = NULL; 2243 } else if (!vcore) { 2244 err = -ENOMEM; 2245 vcore = kvmppc_vcore_create(kvm, 2246 id & ~(kvm->arch.smt_mode - 1)); 2247 kvm->arch.vcores[core] = vcore; 2248 kvm->arch.online_vcores++; 2249 } 2250 } 2251 mutex_unlock(&kvm->lock); 2252 2253 if (!vcore) 2254 goto free_vcpu; 2255 2256 spin_lock(&vcore->lock); 2257 ++vcore->num_threads; 2258 spin_unlock(&vcore->lock); 2259 vcpu->arch.vcore = vcore; 2260 vcpu->arch.ptid = vcpu->vcpu_id - vcore->first_vcpuid; 2261 vcpu->arch.thread_cpu = -1; 2262 vcpu->arch.prev_cpu = -1; 2263 2264 vcpu->arch.cpu_type = KVM_CPU_3S_64; 2265 kvmppc_sanity_check(vcpu); 2266 2267 debugfs_vcpu_init(vcpu, id); 2268 2269 return vcpu; 2270 2271 free_vcpu: 2272 kmem_cache_free(kvm_vcpu_cache, vcpu); 2273 out: 2274 return ERR_PTR(err); 2275 } 2276 2277 static int kvmhv_set_smt_mode(struct kvm *kvm, unsigned long smt_mode, 2278 unsigned long flags) 2279 { 2280 int err; 2281 int esmt = 0; 2282 2283 if (flags) 2284 return -EINVAL; 2285 if (smt_mode > MAX_SMT_THREADS || !is_power_of_2(smt_mode)) 2286 return -EINVAL; 2287 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 2288 /* 2289 * On POWER8 (or POWER7), the threading mode is "strict", 2290 * so we pack smt_mode vcpus per vcore. 2291 */ 2292 if (smt_mode > threads_per_subcore) 2293 return -EINVAL; 2294 } else { 2295 /* 2296 * On POWER9, the threading mode is "loose", 2297 * so each vcpu gets its own vcore. 2298 */ 2299 esmt = smt_mode; 2300 smt_mode = 1; 2301 } 2302 mutex_lock(&kvm->lock); 2303 err = -EBUSY; 2304 if (!kvm->arch.online_vcores) { 2305 kvm->arch.smt_mode = smt_mode; 2306 kvm->arch.emul_smt_mode = esmt; 2307 err = 0; 2308 } 2309 mutex_unlock(&kvm->lock); 2310 2311 return err; 2312 } 2313 2314 static void unpin_vpa(struct kvm *kvm, struct kvmppc_vpa *vpa) 2315 { 2316 if (vpa->pinned_addr) 2317 kvmppc_unpin_guest_page(kvm, vpa->pinned_addr, vpa->gpa, 2318 vpa->dirty); 2319 } 2320 2321 static void kvmppc_core_vcpu_free_hv(struct kvm_vcpu *vcpu) 2322 { 2323 spin_lock(&vcpu->arch.vpa_update_lock); 2324 unpin_vpa(vcpu->kvm, &vcpu->arch.dtl); 2325 unpin_vpa(vcpu->kvm, &vcpu->arch.slb_shadow); 2326 unpin_vpa(vcpu->kvm, &vcpu->arch.vpa); 2327 spin_unlock(&vcpu->arch.vpa_update_lock); 2328 kvm_vcpu_uninit(vcpu); 2329 kmem_cache_free(kvm_vcpu_cache, vcpu); 2330 } 2331 2332 static int kvmppc_core_check_requests_hv(struct kvm_vcpu *vcpu) 2333 { 2334 /* Indicate we want to get back into the guest */ 2335 return 1; 2336 } 2337 2338 static void kvmppc_set_timer(struct kvm_vcpu *vcpu) 2339 { 2340 unsigned long dec_nsec, now; 2341 2342 now = get_tb(); 2343 if (now > vcpu->arch.dec_expires) { 2344 /* decrementer has already gone negative */ 2345 kvmppc_core_queue_dec(vcpu); 2346 kvmppc_core_prepare_to_enter(vcpu); 2347 return; 2348 } 2349 dec_nsec = tb_to_ns(vcpu->arch.dec_expires - now); 2350 hrtimer_start(&vcpu->arch.dec_timer, dec_nsec, HRTIMER_MODE_REL); 2351 vcpu->arch.timer_running = 1; 2352 } 2353 2354 static void kvmppc_end_cede(struct kvm_vcpu *vcpu) 2355 { 2356 vcpu->arch.ceded = 0; 2357 if (vcpu->arch.timer_running) { 2358 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 2359 vcpu->arch.timer_running = 0; 2360 } 2361 } 2362 2363 extern int __kvmppc_vcore_entry(void); 2364 2365 static void kvmppc_remove_runnable(struct kvmppc_vcore *vc, 2366 struct kvm_vcpu *vcpu) 2367 { 2368 u64 now; 2369 2370 if (vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 2371 return; 2372 spin_lock_irq(&vcpu->arch.tbacct_lock); 2373 now = mftb(); 2374 vcpu->arch.busy_stolen += vcore_stolen_time(vc, now) - 2375 vcpu->arch.stolen_logged; 2376 vcpu->arch.busy_preempt = now; 2377 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 2378 spin_unlock_irq(&vcpu->arch.tbacct_lock); 2379 --vc->n_runnable; 2380 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], NULL); 2381 } 2382 2383 static int kvmppc_grab_hwthread(int cpu) 2384 { 2385 struct paca_struct *tpaca; 2386 long timeout = 10000; 2387 2388 tpaca = paca_ptrs[cpu]; 2389 2390 /* Ensure the thread won't go into the kernel if it wakes */ 2391 tpaca->kvm_hstate.kvm_vcpu = NULL; 2392 tpaca->kvm_hstate.kvm_vcore = NULL; 2393 tpaca->kvm_hstate.napping = 0; 2394 smp_wmb(); 2395 tpaca->kvm_hstate.hwthread_req = 1; 2396 2397 /* 2398 * If the thread is already executing in the kernel (e.g. handling 2399 * a stray interrupt), wait for it to get back to nap mode. 2400 * The smp_mb() is to ensure that our setting of hwthread_req 2401 * is visible before we look at hwthread_state, so if this 2402 * races with the code at system_reset_pSeries and the thread 2403 * misses our setting of hwthread_req, we are sure to see its 2404 * setting of hwthread_state, and vice versa. 2405 */ 2406 smp_mb(); 2407 while (tpaca->kvm_hstate.hwthread_state == KVM_HWTHREAD_IN_KERNEL) { 2408 if (--timeout <= 0) { 2409 pr_err("KVM: couldn't grab cpu %d\n", cpu); 2410 return -EBUSY; 2411 } 2412 udelay(1); 2413 } 2414 return 0; 2415 } 2416 2417 static void kvmppc_release_hwthread(int cpu) 2418 { 2419 struct paca_struct *tpaca; 2420 2421 tpaca = paca_ptrs[cpu]; 2422 tpaca->kvm_hstate.hwthread_req = 0; 2423 tpaca->kvm_hstate.kvm_vcpu = NULL; 2424 tpaca->kvm_hstate.kvm_vcore = NULL; 2425 tpaca->kvm_hstate.kvm_split_mode = NULL; 2426 } 2427 2428 static void radix_flush_cpu(struct kvm *kvm, int cpu, struct kvm_vcpu *vcpu) 2429 { 2430 struct kvm_nested_guest *nested = vcpu->arch.nested; 2431 cpumask_t *cpu_in_guest; 2432 int i; 2433 2434 cpu = cpu_first_thread_sibling(cpu); 2435 if (nested) { 2436 cpumask_set_cpu(cpu, &nested->need_tlb_flush); 2437 cpu_in_guest = &nested->cpu_in_guest; 2438 } else { 2439 cpumask_set_cpu(cpu, &kvm->arch.need_tlb_flush); 2440 cpu_in_guest = &kvm->arch.cpu_in_guest; 2441 } 2442 /* 2443 * Make sure setting of bit in need_tlb_flush precedes 2444 * testing of cpu_in_guest bits. The matching barrier on 2445 * the other side is the first smp_mb() in kvmppc_run_core(). 2446 */ 2447 smp_mb(); 2448 for (i = 0; i < threads_per_core; ++i) 2449 if (cpumask_test_cpu(cpu + i, cpu_in_guest)) 2450 smp_call_function_single(cpu + i, do_nothing, NULL, 1); 2451 } 2452 2453 static void kvmppc_prepare_radix_vcpu(struct kvm_vcpu *vcpu, int pcpu) 2454 { 2455 struct kvm_nested_guest *nested = vcpu->arch.nested; 2456 struct kvm *kvm = vcpu->kvm; 2457 int prev_cpu; 2458 2459 if (!cpu_has_feature(CPU_FTR_HVMODE)) 2460 return; 2461 2462 if (nested) 2463 prev_cpu = nested->prev_cpu[vcpu->arch.nested_vcpu_id]; 2464 else 2465 prev_cpu = vcpu->arch.prev_cpu; 2466 2467 /* 2468 * With radix, the guest can do TLB invalidations itself, 2469 * and it could choose to use the local form (tlbiel) if 2470 * it is invalidating a translation that has only ever been 2471 * used on one vcpu. However, that doesn't mean it has 2472 * only ever been used on one physical cpu, since vcpus 2473 * can move around between pcpus. To cope with this, when 2474 * a vcpu moves from one pcpu to another, we need to tell 2475 * any vcpus running on the same core as this vcpu previously 2476 * ran to flush the TLB. The TLB is shared between threads, 2477 * so we use a single bit in .need_tlb_flush for all 4 threads. 2478 */ 2479 if (prev_cpu != pcpu) { 2480 if (prev_cpu >= 0 && 2481 cpu_first_thread_sibling(prev_cpu) != 2482 cpu_first_thread_sibling(pcpu)) 2483 radix_flush_cpu(kvm, prev_cpu, vcpu); 2484 if (nested) 2485 nested->prev_cpu[vcpu->arch.nested_vcpu_id] = pcpu; 2486 else 2487 vcpu->arch.prev_cpu = pcpu; 2488 } 2489 } 2490 2491 static void kvmppc_radix_check_need_tlb_flush(struct kvm *kvm, int pcpu, 2492 struct kvm_nested_guest *nested) 2493 { 2494 cpumask_t *need_tlb_flush; 2495 int lpid; 2496 2497 if (!cpu_has_feature(CPU_FTR_HVMODE)) 2498 return; 2499 2500 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2501 pcpu &= ~0x3UL; 2502 2503 if (nested) { 2504 lpid = nested->shadow_lpid; 2505 need_tlb_flush = &nested->need_tlb_flush; 2506 } else { 2507 lpid = kvm->arch.lpid; 2508 need_tlb_flush = &kvm->arch.need_tlb_flush; 2509 } 2510 2511 mtspr(SPRN_LPID, lpid); 2512 isync(); 2513 smp_mb(); 2514 2515 if (cpumask_test_cpu(pcpu, need_tlb_flush)) { 2516 radix__local_flush_tlb_lpid_guest(lpid); 2517 /* Clear the bit after the TLB flush */ 2518 cpumask_clear_cpu(pcpu, need_tlb_flush); 2519 } 2520 } 2521 2522 static void kvmppc_start_thread(struct kvm_vcpu *vcpu, struct kvmppc_vcore *vc) 2523 { 2524 int cpu; 2525 struct paca_struct *tpaca; 2526 struct kvm *kvm = vc->kvm; 2527 2528 cpu = vc->pcpu; 2529 if (vcpu) { 2530 if (vcpu->arch.timer_running) { 2531 hrtimer_try_to_cancel(&vcpu->arch.dec_timer); 2532 vcpu->arch.timer_running = 0; 2533 } 2534 cpu += vcpu->arch.ptid; 2535 vcpu->cpu = vc->pcpu; 2536 vcpu->arch.thread_cpu = cpu; 2537 cpumask_set_cpu(cpu, &kvm->arch.cpu_in_guest); 2538 } 2539 tpaca = paca_ptrs[cpu]; 2540 tpaca->kvm_hstate.kvm_vcpu = vcpu; 2541 tpaca->kvm_hstate.ptid = cpu - vc->pcpu; 2542 tpaca->kvm_hstate.fake_suspend = 0; 2543 /* Order stores to hstate.kvm_vcpu etc. before store to kvm_vcore */ 2544 smp_wmb(); 2545 tpaca->kvm_hstate.kvm_vcore = vc; 2546 if (cpu != smp_processor_id()) 2547 kvmppc_ipi_thread(cpu); 2548 } 2549 2550 static void kvmppc_wait_for_nap(int n_threads) 2551 { 2552 int cpu = smp_processor_id(); 2553 int i, loops; 2554 2555 if (n_threads <= 1) 2556 return; 2557 for (loops = 0; loops < 1000000; ++loops) { 2558 /* 2559 * Check if all threads are finished. 2560 * We set the vcore pointer when starting a thread 2561 * and the thread clears it when finished, so we look 2562 * for any threads that still have a non-NULL vcore ptr. 2563 */ 2564 for (i = 1; i < n_threads; ++i) 2565 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 2566 break; 2567 if (i == n_threads) { 2568 HMT_medium(); 2569 return; 2570 } 2571 HMT_low(); 2572 } 2573 HMT_medium(); 2574 for (i = 1; i < n_threads; ++i) 2575 if (paca_ptrs[cpu + i]->kvm_hstate.kvm_vcore) 2576 pr_err("KVM: CPU %d seems to be stuck\n", cpu + i); 2577 } 2578 2579 /* 2580 * Check that we are on thread 0 and that any other threads in 2581 * this core are off-line. Then grab the threads so they can't 2582 * enter the kernel. 2583 */ 2584 static int on_primary_thread(void) 2585 { 2586 int cpu = smp_processor_id(); 2587 int thr; 2588 2589 /* Are we on a primary subcore? */ 2590 if (cpu_thread_in_subcore(cpu)) 2591 return 0; 2592 2593 thr = 0; 2594 while (++thr < threads_per_subcore) 2595 if (cpu_online(cpu + thr)) 2596 return 0; 2597 2598 /* Grab all hw threads so they can't go into the kernel */ 2599 for (thr = 1; thr < threads_per_subcore; ++thr) { 2600 if (kvmppc_grab_hwthread(cpu + thr)) { 2601 /* Couldn't grab one; let the others go */ 2602 do { 2603 kvmppc_release_hwthread(cpu + thr); 2604 } while (--thr > 0); 2605 return 0; 2606 } 2607 } 2608 return 1; 2609 } 2610 2611 /* 2612 * A list of virtual cores for each physical CPU. 2613 * These are vcores that could run but their runner VCPU tasks are 2614 * (or may be) preempted. 2615 */ 2616 struct preempted_vcore_list { 2617 struct list_head list; 2618 spinlock_t lock; 2619 }; 2620 2621 static DEFINE_PER_CPU(struct preempted_vcore_list, preempted_vcores); 2622 2623 static void init_vcore_lists(void) 2624 { 2625 int cpu; 2626 2627 for_each_possible_cpu(cpu) { 2628 struct preempted_vcore_list *lp = &per_cpu(preempted_vcores, cpu); 2629 spin_lock_init(&lp->lock); 2630 INIT_LIST_HEAD(&lp->list); 2631 } 2632 } 2633 2634 static void kvmppc_vcore_preempt(struct kvmppc_vcore *vc) 2635 { 2636 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 2637 2638 vc->vcore_state = VCORE_PREEMPT; 2639 vc->pcpu = smp_processor_id(); 2640 if (vc->num_threads < threads_per_vcore(vc->kvm)) { 2641 spin_lock(&lp->lock); 2642 list_add_tail(&vc->preempt_list, &lp->list); 2643 spin_unlock(&lp->lock); 2644 } 2645 2646 /* Start accumulating stolen time */ 2647 kvmppc_core_start_stolen(vc); 2648 } 2649 2650 static void kvmppc_vcore_end_preempt(struct kvmppc_vcore *vc) 2651 { 2652 struct preempted_vcore_list *lp; 2653 2654 kvmppc_core_end_stolen(vc); 2655 if (!list_empty(&vc->preempt_list)) { 2656 lp = &per_cpu(preempted_vcores, vc->pcpu); 2657 spin_lock(&lp->lock); 2658 list_del_init(&vc->preempt_list); 2659 spin_unlock(&lp->lock); 2660 } 2661 vc->vcore_state = VCORE_INACTIVE; 2662 } 2663 2664 /* 2665 * This stores information about the virtual cores currently 2666 * assigned to a physical core. 2667 */ 2668 struct core_info { 2669 int n_subcores; 2670 int max_subcore_threads; 2671 int total_threads; 2672 int subcore_threads[MAX_SUBCORES]; 2673 struct kvmppc_vcore *vc[MAX_SUBCORES]; 2674 }; 2675 2676 /* 2677 * This mapping means subcores 0 and 1 can use threads 0-3 and 4-7 2678 * respectively in 2-way micro-threading (split-core) mode on POWER8. 2679 */ 2680 static int subcore_thread_map[MAX_SUBCORES] = { 0, 4, 2, 6 }; 2681 2682 static void init_core_info(struct core_info *cip, struct kvmppc_vcore *vc) 2683 { 2684 memset(cip, 0, sizeof(*cip)); 2685 cip->n_subcores = 1; 2686 cip->max_subcore_threads = vc->num_threads; 2687 cip->total_threads = vc->num_threads; 2688 cip->subcore_threads[0] = vc->num_threads; 2689 cip->vc[0] = vc; 2690 } 2691 2692 static bool subcore_config_ok(int n_subcores, int n_threads) 2693 { 2694 /* 2695 * POWER9 "SMT4" cores are permanently in what is effectively a 4-way 2696 * split-core mode, with one thread per subcore. 2697 */ 2698 if (cpu_has_feature(CPU_FTR_ARCH_300)) 2699 return n_subcores <= 4 && n_threads == 1; 2700 2701 /* On POWER8, can only dynamically split if unsplit to begin with */ 2702 if (n_subcores > 1 && threads_per_subcore < MAX_SMT_THREADS) 2703 return false; 2704 if (n_subcores > MAX_SUBCORES) 2705 return false; 2706 if (n_subcores > 1) { 2707 if (!(dynamic_mt_modes & 2)) 2708 n_subcores = 4; 2709 if (n_subcores > 2 && !(dynamic_mt_modes & 4)) 2710 return false; 2711 } 2712 2713 return n_subcores * roundup_pow_of_two(n_threads) <= MAX_SMT_THREADS; 2714 } 2715 2716 static void init_vcore_to_run(struct kvmppc_vcore *vc) 2717 { 2718 vc->entry_exit_map = 0; 2719 vc->in_guest = 0; 2720 vc->napping_threads = 0; 2721 vc->conferring_threads = 0; 2722 vc->tb_offset_applied = 0; 2723 } 2724 2725 static bool can_dynamic_split(struct kvmppc_vcore *vc, struct core_info *cip) 2726 { 2727 int n_threads = vc->num_threads; 2728 int sub; 2729 2730 if (!cpu_has_feature(CPU_FTR_ARCH_207S)) 2731 return false; 2732 2733 /* In one_vm_per_core mode, require all vcores to be from the same vm */ 2734 if (one_vm_per_core && vc->kvm != cip->vc[0]->kvm) 2735 return false; 2736 2737 /* Some POWER9 chips require all threads to be in the same MMU mode */ 2738 if (no_mixing_hpt_and_radix && 2739 kvm_is_radix(vc->kvm) != kvm_is_radix(cip->vc[0]->kvm)) 2740 return false; 2741 2742 if (n_threads < cip->max_subcore_threads) 2743 n_threads = cip->max_subcore_threads; 2744 if (!subcore_config_ok(cip->n_subcores + 1, n_threads)) 2745 return false; 2746 cip->max_subcore_threads = n_threads; 2747 2748 sub = cip->n_subcores; 2749 ++cip->n_subcores; 2750 cip->total_threads += vc->num_threads; 2751 cip->subcore_threads[sub] = vc->num_threads; 2752 cip->vc[sub] = vc; 2753 init_vcore_to_run(vc); 2754 list_del_init(&vc->preempt_list); 2755 2756 return true; 2757 } 2758 2759 /* 2760 * Work out whether it is possible to piggyback the execution of 2761 * vcore *pvc onto the execution of the other vcores described in *cip. 2762 */ 2763 static bool can_piggyback(struct kvmppc_vcore *pvc, struct core_info *cip, 2764 int target_threads) 2765 { 2766 if (cip->total_threads + pvc->num_threads > target_threads) 2767 return false; 2768 2769 return can_dynamic_split(pvc, cip); 2770 } 2771 2772 static void prepare_threads(struct kvmppc_vcore *vc) 2773 { 2774 int i; 2775 struct kvm_vcpu *vcpu; 2776 2777 for_each_runnable_thread(i, vcpu, vc) { 2778 if (signal_pending(vcpu->arch.run_task)) 2779 vcpu->arch.ret = -EINTR; 2780 else if (vcpu->arch.vpa.update_pending || 2781 vcpu->arch.slb_shadow.update_pending || 2782 vcpu->arch.dtl.update_pending) 2783 vcpu->arch.ret = RESUME_GUEST; 2784 else 2785 continue; 2786 kvmppc_remove_runnable(vc, vcpu); 2787 wake_up(&vcpu->arch.cpu_run); 2788 } 2789 } 2790 2791 static void collect_piggybacks(struct core_info *cip, int target_threads) 2792 { 2793 struct preempted_vcore_list *lp = this_cpu_ptr(&preempted_vcores); 2794 struct kvmppc_vcore *pvc, *vcnext; 2795 2796 spin_lock(&lp->lock); 2797 list_for_each_entry_safe(pvc, vcnext, &lp->list, preempt_list) { 2798 if (!spin_trylock(&pvc->lock)) 2799 continue; 2800 prepare_threads(pvc); 2801 if (!pvc->n_runnable) { 2802 list_del_init(&pvc->preempt_list); 2803 if (pvc->runner == NULL) { 2804 pvc->vcore_state = VCORE_INACTIVE; 2805 kvmppc_core_end_stolen(pvc); 2806 } 2807 spin_unlock(&pvc->lock); 2808 continue; 2809 } 2810 if (!can_piggyback(pvc, cip, target_threads)) { 2811 spin_unlock(&pvc->lock); 2812 continue; 2813 } 2814 kvmppc_core_end_stolen(pvc); 2815 pvc->vcore_state = VCORE_PIGGYBACK; 2816 if (cip->total_threads >= target_threads) 2817 break; 2818 } 2819 spin_unlock(&lp->lock); 2820 } 2821 2822 static bool recheck_signals(struct core_info *cip) 2823 { 2824 int sub, i; 2825 struct kvm_vcpu *vcpu; 2826 2827 for (sub = 0; sub < cip->n_subcores; ++sub) 2828 for_each_runnable_thread(i, vcpu, cip->vc[sub]) 2829 if (signal_pending(vcpu->arch.run_task)) 2830 return true; 2831 return false; 2832 } 2833 2834 static void post_guest_process(struct kvmppc_vcore *vc, bool is_master) 2835 { 2836 int still_running = 0, i; 2837 u64 now; 2838 long ret; 2839 struct kvm_vcpu *vcpu; 2840 2841 spin_lock(&vc->lock); 2842 now = get_tb(); 2843 for_each_runnable_thread(i, vcpu, vc) { 2844 /* 2845 * It's safe to unlock the vcore in the loop here, because 2846 * for_each_runnable_thread() is safe against removal of 2847 * the vcpu, and the vcore state is VCORE_EXITING here, 2848 * so any vcpus becoming runnable will have their arch.trap 2849 * set to zero and can't actually run in the guest. 2850 */ 2851 spin_unlock(&vc->lock); 2852 /* cancel pending dec exception if dec is positive */ 2853 if (now < vcpu->arch.dec_expires && 2854 kvmppc_core_pending_dec(vcpu)) 2855 kvmppc_core_dequeue_dec(vcpu); 2856 2857 trace_kvm_guest_exit(vcpu); 2858 2859 ret = RESUME_GUEST; 2860 if (vcpu->arch.trap) 2861 ret = kvmppc_handle_exit_hv(vcpu->arch.kvm_run, vcpu, 2862 vcpu->arch.run_task); 2863 2864 vcpu->arch.ret = ret; 2865 vcpu->arch.trap = 0; 2866 2867 spin_lock(&vc->lock); 2868 if (is_kvmppc_resume_guest(vcpu->arch.ret)) { 2869 if (vcpu->arch.pending_exceptions) 2870 kvmppc_core_prepare_to_enter(vcpu); 2871 if (vcpu->arch.ceded) 2872 kvmppc_set_timer(vcpu); 2873 else 2874 ++still_running; 2875 } else { 2876 kvmppc_remove_runnable(vc, vcpu); 2877 wake_up(&vcpu->arch.cpu_run); 2878 } 2879 } 2880 if (!is_master) { 2881 if (still_running > 0) { 2882 kvmppc_vcore_preempt(vc); 2883 } else if (vc->runner) { 2884 vc->vcore_state = VCORE_PREEMPT; 2885 kvmppc_core_start_stolen(vc); 2886 } else { 2887 vc->vcore_state = VCORE_INACTIVE; 2888 } 2889 if (vc->n_runnable > 0 && vc->runner == NULL) { 2890 /* make sure there's a candidate runner awake */ 2891 i = -1; 2892 vcpu = next_runnable_thread(vc, &i); 2893 wake_up(&vcpu->arch.cpu_run); 2894 } 2895 } 2896 spin_unlock(&vc->lock); 2897 } 2898 2899 /* 2900 * Clear core from the list of active host cores as we are about to 2901 * enter the guest. Only do this if it is the primary thread of the 2902 * core (not if a subcore) that is entering the guest. 2903 */ 2904 static inline int kvmppc_clear_host_core(unsigned int cpu) 2905 { 2906 int core; 2907 2908 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 2909 return 0; 2910 /* 2911 * Memory barrier can be omitted here as we will do a smp_wmb() 2912 * later in kvmppc_start_thread and we need ensure that state is 2913 * visible to other CPUs only after we enter guest. 2914 */ 2915 core = cpu >> threads_shift; 2916 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 0; 2917 return 0; 2918 } 2919 2920 /* 2921 * Advertise this core as an active host core since we exited the guest 2922 * Only need to do this if it is the primary thread of the core that is 2923 * exiting. 2924 */ 2925 static inline int kvmppc_set_host_core(unsigned int cpu) 2926 { 2927 int core; 2928 2929 if (!kvmppc_host_rm_ops_hv || cpu_thread_in_core(cpu)) 2930 return 0; 2931 2932 /* 2933 * Memory barrier can be omitted here because we do a spin_unlock 2934 * immediately after this which provides the memory barrier. 2935 */ 2936 core = cpu >> threads_shift; 2937 kvmppc_host_rm_ops_hv->rm_core[core].rm_state.in_host = 1; 2938 return 0; 2939 } 2940 2941 static void set_irq_happened(int trap) 2942 { 2943 switch (trap) { 2944 case BOOK3S_INTERRUPT_EXTERNAL: 2945 local_paca->irq_happened |= PACA_IRQ_EE; 2946 break; 2947 case BOOK3S_INTERRUPT_H_DOORBELL: 2948 local_paca->irq_happened |= PACA_IRQ_DBELL; 2949 break; 2950 case BOOK3S_INTERRUPT_HMI: 2951 local_paca->irq_happened |= PACA_IRQ_HMI; 2952 break; 2953 case BOOK3S_INTERRUPT_SYSTEM_RESET: 2954 replay_system_reset(); 2955 break; 2956 } 2957 } 2958 2959 /* 2960 * Run a set of guest threads on a physical core. 2961 * Called with vc->lock held. 2962 */ 2963 static noinline void kvmppc_run_core(struct kvmppc_vcore *vc) 2964 { 2965 struct kvm_vcpu *vcpu; 2966 int i; 2967 int srcu_idx; 2968 struct core_info core_info; 2969 struct kvmppc_vcore *pvc; 2970 struct kvm_split_mode split_info, *sip; 2971 int split, subcore_size, active; 2972 int sub; 2973 bool thr0_done; 2974 unsigned long cmd_bit, stat_bit; 2975 int pcpu, thr; 2976 int target_threads; 2977 int controlled_threads; 2978 int trap; 2979 bool is_power8; 2980 bool hpt_on_radix; 2981 2982 /* 2983 * Remove from the list any threads that have a signal pending 2984 * or need a VPA update done 2985 */ 2986 prepare_threads(vc); 2987 2988 /* if the runner is no longer runnable, let the caller pick a new one */ 2989 if (vc->runner->arch.state != KVMPPC_VCPU_RUNNABLE) 2990 return; 2991 2992 /* 2993 * Initialize *vc. 2994 */ 2995 init_vcore_to_run(vc); 2996 vc->preempt_tb = TB_NIL; 2997 2998 /* 2999 * Number of threads that we will be controlling: the same as 3000 * the number of threads per subcore, except on POWER9, 3001 * where it's 1 because the threads are (mostly) independent. 3002 */ 3003 controlled_threads = threads_per_vcore(vc->kvm); 3004 3005 /* 3006 * Make sure we are running on primary threads, and that secondary 3007 * threads are offline. Also check if the number of threads in this 3008 * guest are greater than the current system threads per guest. 3009 * On POWER9, we need to be not in independent-threads mode if 3010 * this is a HPT guest on a radix host machine where the 3011 * CPU threads may not be in different MMU modes. 3012 */ 3013 hpt_on_radix = no_mixing_hpt_and_radix && radix_enabled() && 3014 !kvm_is_radix(vc->kvm); 3015 if (((controlled_threads > 1) && 3016 ((vc->num_threads > threads_per_subcore) || !on_primary_thread())) || 3017 (hpt_on_radix && vc->kvm->arch.threads_indep)) { 3018 for_each_runnable_thread(i, vcpu, vc) { 3019 vcpu->arch.ret = -EBUSY; 3020 kvmppc_remove_runnable(vc, vcpu); 3021 wake_up(&vcpu->arch.cpu_run); 3022 } 3023 goto out; 3024 } 3025 3026 /* 3027 * See if we could run any other vcores on the physical core 3028 * along with this one. 3029 */ 3030 init_core_info(&core_info, vc); 3031 pcpu = smp_processor_id(); 3032 target_threads = controlled_threads; 3033 if (target_smt_mode && target_smt_mode < target_threads) 3034 target_threads = target_smt_mode; 3035 if (vc->num_threads < target_threads) 3036 collect_piggybacks(&core_info, target_threads); 3037 3038 /* 3039 * On radix, arrange for TLB flushing if necessary. 3040 * This has to be done before disabling interrupts since 3041 * it uses smp_call_function(). 3042 */ 3043 pcpu = smp_processor_id(); 3044 if (kvm_is_radix(vc->kvm)) { 3045 for (sub = 0; sub < core_info.n_subcores; ++sub) 3046 for_each_runnable_thread(i, vcpu, core_info.vc[sub]) 3047 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 3048 } 3049 3050 /* 3051 * Hard-disable interrupts, and check resched flag and signals. 3052 * If we need to reschedule or deliver a signal, clean up 3053 * and return without going into the guest(s). 3054 * If the mmu_ready flag has been cleared, don't go into the 3055 * guest because that means a HPT resize operation is in progress. 3056 */ 3057 local_irq_disable(); 3058 hard_irq_disable(); 3059 if (lazy_irq_pending() || need_resched() || 3060 recheck_signals(&core_info) || !vc->kvm->arch.mmu_ready) { 3061 local_irq_enable(); 3062 vc->vcore_state = VCORE_INACTIVE; 3063 /* Unlock all except the primary vcore */ 3064 for (sub = 1; sub < core_info.n_subcores; ++sub) { 3065 pvc = core_info.vc[sub]; 3066 /* Put back on to the preempted vcores list */ 3067 kvmppc_vcore_preempt(pvc); 3068 spin_unlock(&pvc->lock); 3069 } 3070 for (i = 0; i < controlled_threads; ++i) 3071 kvmppc_release_hwthread(pcpu + i); 3072 return; 3073 } 3074 3075 kvmppc_clear_host_core(pcpu); 3076 3077 /* Decide on micro-threading (split-core) mode */ 3078 subcore_size = threads_per_subcore; 3079 cmd_bit = stat_bit = 0; 3080 split = core_info.n_subcores; 3081 sip = NULL; 3082 is_power8 = cpu_has_feature(CPU_FTR_ARCH_207S) 3083 && !cpu_has_feature(CPU_FTR_ARCH_300); 3084 3085 if (split > 1 || hpt_on_radix) { 3086 sip = &split_info; 3087 memset(&split_info, 0, sizeof(split_info)); 3088 for (sub = 0; sub < core_info.n_subcores; ++sub) 3089 split_info.vc[sub] = core_info.vc[sub]; 3090 3091 if (is_power8) { 3092 if (split == 2 && (dynamic_mt_modes & 2)) { 3093 cmd_bit = HID0_POWER8_1TO2LPAR; 3094 stat_bit = HID0_POWER8_2LPARMODE; 3095 } else { 3096 split = 4; 3097 cmd_bit = HID0_POWER8_1TO4LPAR; 3098 stat_bit = HID0_POWER8_4LPARMODE; 3099 } 3100 subcore_size = MAX_SMT_THREADS / split; 3101 split_info.rpr = mfspr(SPRN_RPR); 3102 split_info.pmmar = mfspr(SPRN_PMMAR); 3103 split_info.ldbar = mfspr(SPRN_LDBAR); 3104 split_info.subcore_size = subcore_size; 3105 } else { 3106 split_info.subcore_size = 1; 3107 if (hpt_on_radix) { 3108 /* Use the split_info for LPCR/LPIDR changes */ 3109 split_info.lpcr_req = vc->lpcr; 3110 split_info.lpidr_req = vc->kvm->arch.lpid; 3111 split_info.host_lpcr = vc->kvm->arch.host_lpcr; 3112 split_info.do_set = 1; 3113 } 3114 } 3115 3116 /* order writes to split_info before kvm_split_mode pointer */ 3117 smp_wmb(); 3118 } 3119 3120 for (thr = 0; thr < controlled_threads; ++thr) { 3121 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3122 3123 paca->kvm_hstate.tid = thr; 3124 paca->kvm_hstate.napping = 0; 3125 paca->kvm_hstate.kvm_split_mode = sip; 3126 } 3127 3128 /* Initiate micro-threading (split-core) on POWER8 if required */ 3129 if (cmd_bit) { 3130 unsigned long hid0 = mfspr(SPRN_HID0); 3131 3132 hid0 |= cmd_bit | HID0_POWER8_DYNLPARDIS; 3133 mb(); 3134 mtspr(SPRN_HID0, hid0); 3135 isync(); 3136 for (;;) { 3137 hid0 = mfspr(SPRN_HID0); 3138 if (hid0 & stat_bit) 3139 break; 3140 cpu_relax(); 3141 } 3142 } 3143 3144 /* 3145 * On POWER8, set RWMR register. 3146 * Since it only affects PURR and SPURR, it doesn't affect 3147 * the host, so we don't save/restore the host value. 3148 */ 3149 if (is_power8) { 3150 unsigned long rwmr_val = RWMR_RPA_P8_8THREAD; 3151 int n_online = atomic_read(&vc->online_count); 3152 3153 /* 3154 * Use the 8-thread value if we're doing split-core 3155 * or if the vcore's online count looks bogus. 3156 */ 3157 if (split == 1 && threads_per_subcore == MAX_SMT_THREADS && 3158 n_online >= 1 && n_online <= MAX_SMT_THREADS) 3159 rwmr_val = p8_rwmr_values[n_online]; 3160 mtspr(SPRN_RWMR, rwmr_val); 3161 } 3162 3163 /* Start all the threads */ 3164 active = 0; 3165 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3166 thr = is_power8 ? subcore_thread_map[sub] : sub; 3167 thr0_done = false; 3168 active |= 1 << thr; 3169 pvc = core_info.vc[sub]; 3170 pvc->pcpu = pcpu + thr; 3171 for_each_runnable_thread(i, vcpu, pvc) { 3172 kvmppc_start_thread(vcpu, pvc); 3173 kvmppc_create_dtl_entry(vcpu, pvc); 3174 trace_kvm_guest_enter(vcpu); 3175 if (!vcpu->arch.ptid) 3176 thr0_done = true; 3177 active |= 1 << (thr + vcpu->arch.ptid); 3178 } 3179 /* 3180 * We need to start the first thread of each subcore 3181 * even if it doesn't have a vcpu. 3182 */ 3183 if (!thr0_done) 3184 kvmppc_start_thread(NULL, pvc); 3185 } 3186 3187 /* 3188 * Ensure that split_info.do_nap is set after setting 3189 * the vcore pointer in the PACA of the secondaries. 3190 */ 3191 smp_mb(); 3192 3193 /* 3194 * When doing micro-threading, poke the inactive threads as well. 3195 * This gets them to the nap instruction after kvm_do_nap, 3196 * which reduces the time taken to unsplit later. 3197 * For POWER9 HPT guest on radix host, we need all the secondary 3198 * threads woken up so they can do the LPCR/LPIDR change. 3199 */ 3200 if (cmd_bit || hpt_on_radix) { 3201 split_info.do_nap = 1; /* ask secondaries to nap when done */ 3202 for (thr = 1; thr < threads_per_subcore; ++thr) 3203 if (!(active & (1 << thr))) 3204 kvmppc_ipi_thread(pcpu + thr); 3205 } 3206 3207 vc->vcore_state = VCORE_RUNNING; 3208 preempt_disable(); 3209 3210 trace_kvmppc_run_core(vc, 0); 3211 3212 for (sub = 0; sub < core_info.n_subcores; ++sub) 3213 spin_unlock(&core_info.vc[sub]->lock); 3214 3215 if (kvm_is_radix(vc->kvm)) { 3216 /* 3217 * Do we need to flush the process scoped TLB for the LPAR? 3218 * 3219 * On POWER9, individual threads can come in here, but the 3220 * TLB is shared between the 4 threads in a core, hence 3221 * invalidating on one thread invalidates for all. 3222 * Thus we make all 4 threads use the same bit here. 3223 * 3224 * Hash must be flushed in realmode in order to use tlbiel. 3225 */ 3226 kvmppc_radix_check_need_tlb_flush(vc->kvm, pcpu, NULL); 3227 } 3228 3229 /* 3230 * Interrupts will be enabled once we get into the guest, 3231 * so tell lockdep that we're about to enable interrupts. 3232 */ 3233 trace_hardirqs_on(); 3234 3235 guest_enter_irqoff(); 3236 3237 srcu_idx = srcu_read_lock(&vc->kvm->srcu); 3238 3239 this_cpu_disable_ftrace(); 3240 3241 trap = __kvmppc_vcore_entry(); 3242 3243 this_cpu_enable_ftrace(); 3244 3245 srcu_read_unlock(&vc->kvm->srcu, srcu_idx); 3246 3247 trace_hardirqs_off(); 3248 set_irq_happened(trap); 3249 3250 spin_lock(&vc->lock); 3251 /* prevent other vcpu threads from doing kvmppc_start_thread() now */ 3252 vc->vcore_state = VCORE_EXITING; 3253 3254 /* wait for secondary threads to finish writing their state to memory */ 3255 kvmppc_wait_for_nap(controlled_threads); 3256 3257 /* Return to whole-core mode if we split the core earlier */ 3258 if (cmd_bit) { 3259 unsigned long hid0 = mfspr(SPRN_HID0); 3260 unsigned long loops = 0; 3261 3262 hid0 &= ~HID0_POWER8_DYNLPARDIS; 3263 stat_bit = HID0_POWER8_2LPARMODE | HID0_POWER8_4LPARMODE; 3264 mb(); 3265 mtspr(SPRN_HID0, hid0); 3266 isync(); 3267 for (;;) { 3268 hid0 = mfspr(SPRN_HID0); 3269 if (!(hid0 & stat_bit)) 3270 break; 3271 cpu_relax(); 3272 ++loops; 3273 } 3274 } else if (hpt_on_radix) { 3275 /* Wait for all threads to have seen final sync */ 3276 for (thr = 1; thr < controlled_threads; ++thr) { 3277 struct paca_struct *paca = paca_ptrs[pcpu + thr]; 3278 3279 while (paca->kvm_hstate.kvm_split_mode) { 3280 HMT_low(); 3281 barrier(); 3282 } 3283 HMT_medium(); 3284 } 3285 } 3286 split_info.do_nap = 0; 3287 3288 kvmppc_set_host_core(pcpu); 3289 3290 local_irq_enable(); 3291 guest_exit(); 3292 3293 /* Let secondaries go back to the offline loop */ 3294 for (i = 0; i < controlled_threads; ++i) { 3295 kvmppc_release_hwthread(pcpu + i); 3296 if (sip && sip->napped[i]) 3297 kvmppc_ipi_thread(pcpu + i); 3298 cpumask_clear_cpu(pcpu + i, &vc->kvm->arch.cpu_in_guest); 3299 } 3300 3301 spin_unlock(&vc->lock); 3302 3303 /* make sure updates to secondary vcpu structs are visible now */ 3304 smp_mb(); 3305 3306 preempt_enable(); 3307 3308 for (sub = 0; sub < core_info.n_subcores; ++sub) { 3309 pvc = core_info.vc[sub]; 3310 post_guest_process(pvc, pvc == vc); 3311 } 3312 3313 spin_lock(&vc->lock); 3314 3315 out: 3316 vc->vcore_state = VCORE_INACTIVE; 3317 trace_kvmppc_run_core(vc, 1); 3318 } 3319 3320 /* 3321 * Load up hypervisor-mode registers on P9. 3322 */ 3323 static int kvmhv_load_hv_regs_and_go(struct kvm_vcpu *vcpu, u64 time_limit, 3324 unsigned long lpcr) 3325 { 3326 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3327 s64 hdec; 3328 u64 tb, purr, spurr; 3329 int trap; 3330 unsigned long host_hfscr = mfspr(SPRN_HFSCR); 3331 unsigned long host_ciabr = mfspr(SPRN_CIABR); 3332 unsigned long host_dawr = mfspr(SPRN_DAWR); 3333 unsigned long host_dawrx = mfspr(SPRN_DAWRX); 3334 unsigned long host_psscr = mfspr(SPRN_PSSCR); 3335 unsigned long host_pidr = mfspr(SPRN_PID); 3336 3337 hdec = time_limit - mftb(); 3338 if (hdec < 0) 3339 return BOOK3S_INTERRUPT_HV_DECREMENTER; 3340 mtspr(SPRN_HDEC, hdec); 3341 3342 if (vc->tb_offset) { 3343 u64 new_tb = mftb() + vc->tb_offset; 3344 mtspr(SPRN_TBU40, new_tb); 3345 tb = mftb(); 3346 if ((tb & 0xffffff) < (new_tb & 0xffffff)) 3347 mtspr(SPRN_TBU40, new_tb + 0x1000000); 3348 vc->tb_offset_applied = vc->tb_offset; 3349 } 3350 3351 if (vc->pcr) 3352 mtspr(SPRN_PCR, vc->pcr); 3353 mtspr(SPRN_DPDES, vc->dpdes); 3354 mtspr(SPRN_VTB, vc->vtb); 3355 3356 local_paca->kvm_hstate.host_purr = mfspr(SPRN_PURR); 3357 local_paca->kvm_hstate.host_spurr = mfspr(SPRN_SPURR); 3358 mtspr(SPRN_PURR, vcpu->arch.purr); 3359 mtspr(SPRN_SPURR, vcpu->arch.spurr); 3360 3361 if (cpu_has_feature(CPU_FTR_DAWR)) { 3362 mtspr(SPRN_DAWR, vcpu->arch.dawr); 3363 mtspr(SPRN_DAWRX, vcpu->arch.dawrx); 3364 } 3365 mtspr(SPRN_CIABR, vcpu->arch.ciabr); 3366 mtspr(SPRN_IC, vcpu->arch.ic); 3367 mtspr(SPRN_PID, vcpu->arch.pid); 3368 3369 mtspr(SPRN_PSSCR, vcpu->arch.psscr | PSSCR_EC | 3370 (local_paca->kvm_hstate.fake_suspend << PSSCR_FAKE_SUSPEND_LG)); 3371 3372 mtspr(SPRN_HFSCR, vcpu->arch.hfscr); 3373 3374 mtspr(SPRN_SPRG0, vcpu->arch.shregs.sprg0); 3375 mtspr(SPRN_SPRG1, vcpu->arch.shregs.sprg1); 3376 mtspr(SPRN_SPRG2, vcpu->arch.shregs.sprg2); 3377 mtspr(SPRN_SPRG3, vcpu->arch.shregs.sprg3); 3378 3379 mtspr(SPRN_AMOR, ~0UL); 3380 3381 mtspr(SPRN_LPCR, lpcr); 3382 isync(); 3383 3384 kvmppc_xive_push_vcpu(vcpu); 3385 3386 mtspr(SPRN_SRR0, vcpu->arch.shregs.srr0); 3387 mtspr(SPRN_SRR1, vcpu->arch.shregs.srr1); 3388 3389 trap = __kvmhv_vcpu_entry_p9(vcpu); 3390 3391 /* Advance host PURR/SPURR by the amount used by guest */ 3392 purr = mfspr(SPRN_PURR); 3393 spurr = mfspr(SPRN_SPURR); 3394 mtspr(SPRN_PURR, local_paca->kvm_hstate.host_purr + 3395 purr - vcpu->arch.purr); 3396 mtspr(SPRN_SPURR, local_paca->kvm_hstate.host_spurr + 3397 spurr - vcpu->arch.spurr); 3398 vcpu->arch.purr = purr; 3399 vcpu->arch.spurr = spurr; 3400 3401 vcpu->arch.ic = mfspr(SPRN_IC); 3402 vcpu->arch.pid = mfspr(SPRN_PID); 3403 vcpu->arch.psscr = mfspr(SPRN_PSSCR) & PSSCR_GUEST_VIS; 3404 3405 vcpu->arch.shregs.sprg0 = mfspr(SPRN_SPRG0); 3406 vcpu->arch.shregs.sprg1 = mfspr(SPRN_SPRG1); 3407 vcpu->arch.shregs.sprg2 = mfspr(SPRN_SPRG2); 3408 vcpu->arch.shregs.sprg3 = mfspr(SPRN_SPRG3); 3409 3410 mtspr(SPRN_PSSCR, host_psscr); 3411 mtspr(SPRN_HFSCR, host_hfscr); 3412 mtspr(SPRN_CIABR, host_ciabr); 3413 mtspr(SPRN_DAWR, host_dawr); 3414 mtspr(SPRN_DAWRX, host_dawrx); 3415 mtspr(SPRN_PID, host_pidr); 3416 3417 /* 3418 * Since this is radix, do a eieio; tlbsync; ptesync sequence in 3419 * case we interrupted the guest between a tlbie and a ptesync. 3420 */ 3421 asm volatile("eieio; tlbsync; ptesync"); 3422 3423 mtspr(SPRN_LPID, vcpu->kvm->arch.host_lpid); /* restore host LPID */ 3424 isync(); 3425 3426 vc->dpdes = mfspr(SPRN_DPDES); 3427 vc->vtb = mfspr(SPRN_VTB); 3428 mtspr(SPRN_DPDES, 0); 3429 if (vc->pcr) 3430 mtspr(SPRN_PCR, 0); 3431 3432 if (vc->tb_offset_applied) { 3433 u64 new_tb = mftb() - vc->tb_offset_applied; 3434 mtspr(SPRN_TBU40, new_tb); 3435 tb = mftb(); 3436 if ((tb & 0xffffff) < (new_tb & 0xffffff)) 3437 mtspr(SPRN_TBU40, new_tb + 0x1000000); 3438 vc->tb_offset_applied = 0; 3439 } 3440 3441 mtspr(SPRN_HDEC, 0x7fffffff); 3442 mtspr(SPRN_LPCR, vcpu->kvm->arch.host_lpcr); 3443 3444 return trap; 3445 } 3446 3447 /* 3448 * Virtual-mode guest entry for POWER9 and later when the host and 3449 * guest are both using the radix MMU. The LPIDR has already been set. 3450 */ 3451 int kvmhv_p9_guest_entry(struct kvm_vcpu *vcpu, u64 time_limit, 3452 unsigned long lpcr) 3453 { 3454 struct kvmppc_vcore *vc = vcpu->arch.vcore; 3455 unsigned long host_dscr = mfspr(SPRN_DSCR); 3456 unsigned long host_tidr = mfspr(SPRN_TIDR); 3457 unsigned long host_iamr = mfspr(SPRN_IAMR); 3458 s64 dec; 3459 u64 tb; 3460 int trap, save_pmu; 3461 3462 dec = mfspr(SPRN_DEC); 3463 tb = mftb(); 3464 if (dec < 512) 3465 return BOOK3S_INTERRUPT_HV_DECREMENTER; 3466 local_paca->kvm_hstate.dec_expires = dec + tb; 3467 if (local_paca->kvm_hstate.dec_expires < time_limit) 3468 time_limit = local_paca->kvm_hstate.dec_expires; 3469 3470 vcpu->arch.ceded = 0; 3471 3472 kvmhv_save_host_pmu(); /* saves it to PACA kvm_hstate */ 3473 3474 kvmppc_subcore_enter_guest(); 3475 3476 vc->entry_exit_map = 1; 3477 vc->in_guest = 1; 3478 3479 if (vcpu->arch.vpa.pinned_addr) { 3480 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3481 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3482 lp->yield_count = cpu_to_be32(yield_count); 3483 vcpu->arch.vpa.dirty = 1; 3484 } 3485 3486 if (cpu_has_feature(CPU_FTR_TM) || 3487 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3488 kvmppc_restore_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3489 3490 kvmhv_load_guest_pmu(vcpu); 3491 3492 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3493 load_fp_state(&vcpu->arch.fp); 3494 #ifdef CONFIG_ALTIVEC 3495 load_vr_state(&vcpu->arch.vr); 3496 #endif 3497 3498 mtspr(SPRN_DSCR, vcpu->arch.dscr); 3499 mtspr(SPRN_IAMR, vcpu->arch.iamr); 3500 mtspr(SPRN_PSPB, vcpu->arch.pspb); 3501 mtspr(SPRN_FSCR, vcpu->arch.fscr); 3502 mtspr(SPRN_TAR, vcpu->arch.tar); 3503 mtspr(SPRN_EBBHR, vcpu->arch.ebbhr); 3504 mtspr(SPRN_EBBRR, vcpu->arch.ebbrr); 3505 mtspr(SPRN_BESCR, vcpu->arch.bescr); 3506 mtspr(SPRN_WORT, vcpu->arch.wort); 3507 mtspr(SPRN_TIDR, vcpu->arch.tid); 3508 mtspr(SPRN_DAR, vcpu->arch.shregs.dar); 3509 mtspr(SPRN_DSISR, vcpu->arch.shregs.dsisr); 3510 mtspr(SPRN_AMR, vcpu->arch.amr); 3511 mtspr(SPRN_UAMOR, vcpu->arch.uamor); 3512 3513 if (!(vcpu->arch.ctrl & 1)) 3514 mtspr(SPRN_CTRLT, mfspr(SPRN_CTRLF) & ~1); 3515 3516 mtspr(SPRN_DEC, vcpu->arch.dec_expires - mftb()); 3517 3518 if (kvmhv_on_pseries()) { 3519 /* call our hypervisor to load up HV regs and go */ 3520 struct hv_guest_state hvregs; 3521 3522 kvmhv_save_hv_regs(vcpu, &hvregs); 3523 hvregs.lpcr = lpcr; 3524 vcpu->arch.regs.msr = vcpu->arch.shregs.msr; 3525 hvregs.version = HV_GUEST_STATE_VERSION; 3526 if (vcpu->arch.nested) { 3527 hvregs.lpid = vcpu->arch.nested->shadow_lpid; 3528 hvregs.vcpu_token = vcpu->arch.nested_vcpu_id; 3529 } else { 3530 hvregs.lpid = vcpu->kvm->arch.lpid; 3531 hvregs.vcpu_token = vcpu->vcpu_id; 3532 } 3533 hvregs.hdec_expiry = time_limit; 3534 trap = plpar_hcall_norets(H_ENTER_NESTED, __pa(&hvregs), 3535 __pa(&vcpu->arch.regs)); 3536 kvmhv_restore_hv_return_state(vcpu, &hvregs); 3537 vcpu->arch.shregs.msr = vcpu->arch.regs.msr; 3538 vcpu->arch.shregs.dar = mfspr(SPRN_DAR); 3539 vcpu->arch.shregs.dsisr = mfspr(SPRN_DSISR); 3540 3541 /* H_CEDE has to be handled now, not later */ 3542 if (trap == BOOK3S_INTERRUPT_SYSCALL && !vcpu->arch.nested && 3543 kvmppc_get_gpr(vcpu, 3) == H_CEDE) { 3544 kvmppc_nested_cede(vcpu); 3545 trap = 0; 3546 } 3547 } else { 3548 trap = kvmhv_load_hv_regs_and_go(vcpu, time_limit, lpcr); 3549 } 3550 3551 vcpu->arch.slb_max = 0; 3552 dec = mfspr(SPRN_DEC); 3553 tb = mftb(); 3554 vcpu->arch.dec_expires = dec + tb; 3555 vcpu->cpu = -1; 3556 vcpu->arch.thread_cpu = -1; 3557 vcpu->arch.ctrl = mfspr(SPRN_CTRLF); 3558 3559 vcpu->arch.iamr = mfspr(SPRN_IAMR); 3560 vcpu->arch.pspb = mfspr(SPRN_PSPB); 3561 vcpu->arch.fscr = mfspr(SPRN_FSCR); 3562 vcpu->arch.tar = mfspr(SPRN_TAR); 3563 vcpu->arch.ebbhr = mfspr(SPRN_EBBHR); 3564 vcpu->arch.ebbrr = mfspr(SPRN_EBBRR); 3565 vcpu->arch.bescr = mfspr(SPRN_BESCR); 3566 vcpu->arch.wort = mfspr(SPRN_WORT); 3567 vcpu->arch.tid = mfspr(SPRN_TIDR); 3568 vcpu->arch.amr = mfspr(SPRN_AMR); 3569 vcpu->arch.uamor = mfspr(SPRN_UAMOR); 3570 vcpu->arch.dscr = mfspr(SPRN_DSCR); 3571 3572 mtspr(SPRN_PSPB, 0); 3573 mtspr(SPRN_WORT, 0); 3574 mtspr(SPRN_AMR, 0); 3575 mtspr(SPRN_UAMOR, 0); 3576 mtspr(SPRN_DSCR, host_dscr); 3577 mtspr(SPRN_TIDR, host_tidr); 3578 mtspr(SPRN_IAMR, host_iamr); 3579 mtspr(SPRN_PSPB, 0); 3580 3581 msr_check_and_set(MSR_FP | MSR_VEC | MSR_VSX); 3582 store_fp_state(&vcpu->arch.fp); 3583 #ifdef CONFIG_ALTIVEC 3584 store_vr_state(&vcpu->arch.vr); 3585 #endif 3586 3587 if (cpu_has_feature(CPU_FTR_TM) || 3588 cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)) 3589 kvmppc_save_tm_hv(vcpu, vcpu->arch.shregs.msr, true); 3590 3591 save_pmu = 1; 3592 if (vcpu->arch.vpa.pinned_addr) { 3593 struct lppaca *lp = vcpu->arch.vpa.pinned_addr; 3594 u32 yield_count = be32_to_cpu(lp->yield_count) + 1; 3595 lp->yield_count = cpu_to_be32(yield_count); 3596 vcpu->arch.vpa.dirty = 1; 3597 save_pmu = lp->pmcregs_in_use; 3598 } 3599 3600 kvmhv_save_guest_pmu(vcpu, save_pmu); 3601 3602 vc->entry_exit_map = 0x101; 3603 vc->in_guest = 0; 3604 3605 mtspr(SPRN_DEC, local_paca->kvm_hstate.dec_expires - mftb()); 3606 3607 kvmhv_load_host_pmu(); 3608 3609 kvmppc_subcore_exit_guest(); 3610 3611 return trap; 3612 } 3613 3614 /* 3615 * Wait for some other vcpu thread to execute us, and 3616 * wake us up when we need to handle something in the host. 3617 */ 3618 static void kvmppc_wait_for_exec(struct kvmppc_vcore *vc, 3619 struct kvm_vcpu *vcpu, int wait_state) 3620 { 3621 DEFINE_WAIT(wait); 3622 3623 prepare_to_wait(&vcpu->arch.cpu_run, &wait, wait_state); 3624 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 3625 spin_unlock(&vc->lock); 3626 schedule(); 3627 spin_lock(&vc->lock); 3628 } 3629 finish_wait(&vcpu->arch.cpu_run, &wait); 3630 } 3631 3632 static void grow_halt_poll_ns(struct kvmppc_vcore *vc) 3633 { 3634 /* 10us base */ 3635 if (vc->halt_poll_ns == 0 && halt_poll_ns_grow) 3636 vc->halt_poll_ns = 10000; 3637 else 3638 vc->halt_poll_ns *= halt_poll_ns_grow; 3639 } 3640 3641 static void shrink_halt_poll_ns(struct kvmppc_vcore *vc) 3642 { 3643 if (halt_poll_ns_shrink == 0) 3644 vc->halt_poll_ns = 0; 3645 else 3646 vc->halt_poll_ns /= halt_poll_ns_shrink; 3647 } 3648 3649 #ifdef CONFIG_KVM_XICS 3650 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 3651 { 3652 if (!xive_enabled()) 3653 return false; 3654 return vcpu->arch.irq_pending || vcpu->arch.xive_saved_state.pipr < 3655 vcpu->arch.xive_saved_state.cppr; 3656 } 3657 #else 3658 static inline bool xive_interrupt_pending(struct kvm_vcpu *vcpu) 3659 { 3660 return false; 3661 } 3662 #endif /* CONFIG_KVM_XICS */ 3663 3664 static bool kvmppc_vcpu_woken(struct kvm_vcpu *vcpu) 3665 { 3666 if (vcpu->arch.pending_exceptions || vcpu->arch.prodded || 3667 kvmppc_doorbell_pending(vcpu) || xive_interrupt_pending(vcpu)) 3668 return true; 3669 3670 return false; 3671 } 3672 3673 /* 3674 * Check to see if any of the runnable vcpus on the vcore have pending 3675 * exceptions or are no longer ceded 3676 */ 3677 static int kvmppc_vcore_check_block(struct kvmppc_vcore *vc) 3678 { 3679 struct kvm_vcpu *vcpu; 3680 int i; 3681 3682 for_each_runnable_thread(i, vcpu, vc) { 3683 if (!vcpu->arch.ceded || kvmppc_vcpu_woken(vcpu)) 3684 return 1; 3685 } 3686 3687 return 0; 3688 } 3689 3690 /* 3691 * All the vcpus in this vcore are idle, so wait for a decrementer 3692 * or external interrupt to one of the vcpus. vc->lock is held. 3693 */ 3694 static void kvmppc_vcore_blocked(struct kvmppc_vcore *vc) 3695 { 3696 ktime_t cur, start_poll, start_wait; 3697 int do_sleep = 1; 3698 u64 block_ns; 3699 DECLARE_SWAITQUEUE(wait); 3700 3701 /* Poll for pending exceptions and ceded state */ 3702 cur = start_poll = ktime_get(); 3703 if (vc->halt_poll_ns) { 3704 ktime_t stop = ktime_add_ns(start_poll, vc->halt_poll_ns); 3705 ++vc->runner->stat.halt_attempted_poll; 3706 3707 vc->vcore_state = VCORE_POLLING; 3708 spin_unlock(&vc->lock); 3709 3710 do { 3711 if (kvmppc_vcore_check_block(vc)) { 3712 do_sleep = 0; 3713 break; 3714 } 3715 cur = ktime_get(); 3716 } while (single_task_running() && ktime_before(cur, stop)); 3717 3718 spin_lock(&vc->lock); 3719 vc->vcore_state = VCORE_INACTIVE; 3720 3721 if (!do_sleep) { 3722 ++vc->runner->stat.halt_successful_poll; 3723 goto out; 3724 } 3725 } 3726 3727 prepare_to_swait_exclusive(&vc->wq, &wait, TASK_INTERRUPTIBLE); 3728 3729 if (kvmppc_vcore_check_block(vc)) { 3730 finish_swait(&vc->wq, &wait); 3731 do_sleep = 0; 3732 /* If we polled, count this as a successful poll */ 3733 if (vc->halt_poll_ns) 3734 ++vc->runner->stat.halt_successful_poll; 3735 goto out; 3736 } 3737 3738 start_wait = ktime_get(); 3739 3740 vc->vcore_state = VCORE_SLEEPING; 3741 trace_kvmppc_vcore_blocked(vc, 0); 3742 spin_unlock(&vc->lock); 3743 schedule(); 3744 finish_swait(&vc->wq, &wait); 3745 spin_lock(&vc->lock); 3746 vc->vcore_state = VCORE_INACTIVE; 3747 trace_kvmppc_vcore_blocked(vc, 1); 3748 ++vc->runner->stat.halt_successful_wait; 3749 3750 cur = ktime_get(); 3751 3752 out: 3753 block_ns = ktime_to_ns(cur) - ktime_to_ns(start_poll); 3754 3755 /* Attribute wait time */ 3756 if (do_sleep) { 3757 vc->runner->stat.halt_wait_ns += 3758 ktime_to_ns(cur) - ktime_to_ns(start_wait); 3759 /* Attribute failed poll time */ 3760 if (vc->halt_poll_ns) 3761 vc->runner->stat.halt_poll_fail_ns += 3762 ktime_to_ns(start_wait) - 3763 ktime_to_ns(start_poll); 3764 } else { 3765 /* Attribute successful poll time */ 3766 if (vc->halt_poll_ns) 3767 vc->runner->stat.halt_poll_success_ns += 3768 ktime_to_ns(cur) - 3769 ktime_to_ns(start_poll); 3770 } 3771 3772 /* Adjust poll time */ 3773 if (halt_poll_ns) { 3774 if (block_ns <= vc->halt_poll_ns) 3775 ; 3776 /* We slept and blocked for longer than the max halt time */ 3777 else if (vc->halt_poll_ns && block_ns > halt_poll_ns) 3778 shrink_halt_poll_ns(vc); 3779 /* We slept and our poll time is too small */ 3780 else if (vc->halt_poll_ns < halt_poll_ns && 3781 block_ns < halt_poll_ns) 3782 grow_halt_poll_ns(vc); 3783 if (vc->halt_poll_ns > halt_poll_ns) 3784 vc->halt_poll_ns = halt_poll_ns; 3785 } else 3786 vc->halt_poll_ns = 0; 3787 3788 trace_kvmppc_vcore_wakeup(do_sleep, block_ns); 3789 } 3790 3791 /* 3792 * This never fails for a radix guest, as none of the operations it does 3793 * for a radix guest can fail or have a way to report failure. 3794 * kvmhv_run_single_vcpu() relies on this fact. 3795 */ 3796 static int kvmhv_setup_mmu(struct kvm_vcpu *vcpu) 3797 { 3798 int r = 0; 3799 struct kvm *kvm = vcpu->kvm; 3800 3801 mutex_lock(&kvm->lock); 3802 if (!kvm->arch.mmu_ready) { 3803 if (!kvm_is_radix(kvm)) 3804 r = kvmppc_hv_setup_htab_rma(vcpu); 3805 if (!r) { 3806 if (cpu_has_feature(CPU_FTR_ARCH_300)) 3807 kvmppc_setup_partition_table(kvm); 3808 kvm->arch.mmu_ready = 1; 3809 } 3810 } 3811 mutex_unlock(&kvm->lock); 3812 return r; 3813 } 3814 3815 static int kvmppc_run_vcpu(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 3816 { 3817 int n_ceded, i, r; 3818 struct kvmppc_vcore *vc; 3819 struct kvm_vcpu *v; 3820 3821 trace_kvmppc_run_vcpu_enter(vcpu); 3822 3823 kvm_run->exit_reason = 0; 3824 vcpu->arch.ret = RESUME_GUEST; 3825 vcpu->arch.trap = 0; 3826 kvmppc_update_vpas(vcpu); 3827 3828 /* 3829 * Synchronize with other threads in this virtual core 3830 */ 3831 vc = vcpu->arch.vcore; 3832 spin_lock(&vc->lock); 3833 vcpu->arch.ceded = 0; 3834 vcpu->arch.run_task = current; 3835 vcpu->arch.kvm_run = kvm_run; 3836 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 3837 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 3838 vcpu->arch.busy_preempt = TB_NIL; 3839 WRITE_ONCE(vc->runnable_threads[vcpu->arch.ptid], vcpu); 3840 ++vc->n_runnable; 3841 3842 /* 3843 * This happens the first time this is called for a vcpu. 3844 * If the vcore is already running, we may be able to start 3845 * this thread straight away and have it join in. 3846 */ 3847 if (!signal_pending(current)) { 3848 if ((vc->vcore_state == VCORE_PIGGYBACK || 3849 vc->vcore_state == VCORE_RUNNING) && 3850 !VCORE_IS_EXITING(vc)) { 3851 kvmppc_create_dtl_entry(vcpu, vc); 3852 kvmppc_start_thread(vcpu, vc); 3853 trace_kvm_guest_enter(vcpu); 3854 } else if (vc->vcore_state == VCORE_SLEEPING) { 3855 swake_up_one(&vc->wq); 3856 } 3857 3858 } 3859 3860 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 3861 !signal_pending(current)) { 3862 /* See if the MMU is ready to go */ 3863 if (!vcpu->kvm->arch.mmu_ready) { 3864 spin_unlock(&vc->lock); 3865 r = kvmhv_setup_mmu(vcpu); 3866 spin_lock(&vc->lock); 3867 if (r) { 3868 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY; 3869 kvm_run->fail_entry. 3870 hardware_entry_failure_reason = 0; 3871 vcpu->arch.ret = r; 3872 break; 3873 } 3874 } 3875 3876 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 3877 kvmppc_vcore_end_preempt(vc); 3878 3879 if (vc->vcore_state != VCORE_INACTIVE) { 3880 kvmppc_wait_for_exec(vc, vcpu, TASK_INTERRUPTIBLE); 3881 continue; 3882 } 3883 for_each_runnable_thread(i, v, vc) { 3884 kvmppc_core_prepare_to_enter(v); 3885 if (signal_pending(v->arch.run_task)) { 3886 kvmppc_remove_runnable(vc, v); 3887 v->stat.signal_exits++; 3888 v->arch.kvm_run->exit_reason = KVM_EXIT_INTR; 3889 v->arch.ret = -EINTR; 3890 wake_up(&v->arch.cpu_run); 3891 } 3892 } 3893 if (!vc->n_runnable || vcpu->arch.state != KVMPPC_VCPU_RUNNABLE) 3894 break; 3895 n_ceded = 0; 3896 for_each_runnable_thread(i, v, vc) { 3897 if (!kvmppc_vcpu_woken(v)) 3898 n_ceded += v->arch.ceded; 3899 else 3900 v->arch.ceded = 0; 3901 } 3902 vc->runner = vcpu; 3903 if (n_ceded == vc->n_runnable) { 3904 kvmppc_vcore_blocked(vc); 3905 } else if (need_resched()) { 3906 kvmppc_vcore_preempt(vc); 3907 /* Let something else run */ 3908 cond_resched_lock(&vc->lock); 3909 if (vc->vcore_state == VCORE_PREEMPT) 3910 kvmppc_vcore_end_preempt(vc); 3911 } else { 3912 kvmppc_run_core(vc); 3913 } 3914 vc->runner = NULL; 3915 } 3916 3917 while (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE && 3918 (vc->vcore_state == VCORE_RUNNING || 3919 vc->vcore_state == VCORE_EXITING || 3920 vc->vcore_state == VCORE_PIGGYBACK)) 3921 kvmppc_wait_for_exec(vc, vcpu, TASK_UNINTERRUPTIBLE); 3922 3923 if (vc->vcore_state == VCORE_PREEMPT && vc->runner == NULL) 3924 kvmppc_vcore_end_preempt(vc); 3925 3926 if (vcpu->arch.state == KVMPPC_VCPU_RUNNABLE) { 3927 kvmppc_remove_runnable(vc, vcpu); 3928 vcpu->stat.signal_exits++; 3929 kvm_run->exit_reason = KVM_EXIT_INTR; 3930 vcpu->arch.ret = -EINTR; 3931 } 3932 3933 if (vc->n_runnable && vc->vcore_state == VCORE_INACTIVE) { 3934 /* Wake up some vcpu to run the core */ 3935 i = -1; 3936 v = next_runnable_thread(vc, &i); 3937 wake_up(&v->arch.cpu_run); 3938 } 3939 3940 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run); 3941 spin_unlock(&vc->lock); 3942 return vcpu->arch.ret; 3943 } 3944 3945 int kvmhv_run_single_vcpu(struct kvm_run *kvm_run, 3946 struct kvm_vcpu *vcpu, u64 time_limit, 3947 unsigned long lpcr) 3948 { 3949 int trap, r, pcpu; 3950 int srcu_idx; 3951 struct kvmppc_vcore *vc; 3952 struct kvm *kvm = vcpu->kvm; 3953 struct kvm_nested_guest *nested = vcpu->arch.nested; 3954 3955 trace_kvmppc_run_vcpu_enter(vcpu); 3956 3957 kvm_run->exit_reason = 0; 3958 vcpu->arch.ret = RESUME_GUEST; 3959 vcpu->arch.trap = 0; 3960 3961 vc = vcpu->arch.vcore; 3962 vcpu->arch.ceded = 0; 3963 vcpu->arch.run_task = current; 3964 vcpu->arch.kvm_run = kvm_run; 3965 vcpu->arch.stolen_logged = vcore_stolen_time(vc, mftb()); 3966 vcpu->arch.state = KVMPPC_VCPU_RUNNABLE; 3967 vcpu->arch.busy_preempt = TB_NIL; 3968 vcpu->arch.last_inst = KVM_INST_FETCH_FAILED; 3969 vc->runnable_threads[0] = vcpu; 3970 vc->n_runnable = 1; 3971 vc->runner = vcpu; 3972 3973 /* See if the MMU is ready to go */ 3974 if (!kvm->arch.mmu_ready) 3975 kvmhv_setup_mmu(vcpu); 3976 3977 if (need_resched()) 3978 cond_resched(); 3979 3980 kvmppc_update_vpas(vcpu); 3981 3982 init_vcore_to_run(vc); 3983 vc->preempt_tb = TB_NIL; 3984 3985 preempt_disable(); 3986 pcpu = smp_processor_id(); 3987 vc->pcpu = pcpu; 3988 kvmppc_prepare_radix_vcpu(vcpu, pcpu); 3989 3990 local_irq_disable(); 3991 hard_irq_disable(); 3992 if (signal_pending(current)) 3993 goto sigpend; 3994 if (lazy_irq_pending() || need_resched() || !kvm->arch.mmu_ready) 3995 goto out; 3996 3997 if (!nested) { 3998 kvmppc_core_prepare_to_enter(vcpu); 3999 if (vcpu->arch.doorbell_request) { 4000 vc->dpdes = 1; 4001 smp_wmb(); 4002 vcpu->arch.doorbell_request = 0; 4003 } 4004 if (test_bit(BOOK3S_IRQPRIO_EXTERNAL, 4005 &vcpu->arch.pending_exceptions)) 4006 lpcr |= LPCR_MER; 4007 } else if (vcpu->arch.pending_exceptions || 4008 vcpu->arch.doorbell_request || 4009 xive_interrupt_pending(vcpu)) { 4010 vcpu->arch.ret = RESUME_HOST; 4011 goto out; 4012 } 4013 4014 kvmppc_clear_host_core(pcpu); 4015 4016 local_paca->kvm_hstate.tid = 0; 4017 local_paca->kvm_hstate.napping = 0; 4018 local_paca->kvm_hstate.kvm_split_mode = NULL; 4019 kvmppc_start_thread(vcpu, vc); 4020 kvmppc_create_dtl_entry(vcpu, vc); 4021 trace_kvm_guest_enter(vcpu); 4022 4023 vc->vcore_state = VCORE_RUNNING; 4024 trace_kvmppc_run_core(vc, 0); 4025 4026 if (cpu_has_feature(CPU_FTR_HVMODE)) 4027 kvmppc_radix_check_need_tlb_flush(kvm, pcpu, nested); 4028 4029 trace_hardirqs_on(); 4030 guest_enter_irqoff(); 4031 4032 srcu_idx = srcu_read_lock(&kvm->srcu); 4033 4034 this_cpu_disable_ftrace(); 4035 4036 trap = kvmhv_p9_guest_entry(vcpu, time_limit, lpcr); 4037 vcpu->arch.trap = trap; 4038 4039 this_cpu_enable_ftrace(); 4040 4041 srcu_read_unlock(&kvm->srcu, srcu_idx); 4042 4043 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4044 mtspr(SPRN_LPID, kvm->arch.host_lpid); 4045 isync(); 4046 } 4047 4048 trace_hardirqs_off(); 4049 set_irq_happened(trap); 4050 4051 kvmppc_set_host_core(pcpu); 4052 4053 local_irq_enable(); 4054 guest_exit(); 4055 4056 cpumask_clear_cpu(pcpu, &kvm->arch.cpu_in_guest); 4057 4058 preempt_enable(); 4059 4060 /* cancel pending decrementer exception if DEC is now positive */ 4061 if (get_tb() < vcpu->arch.dec_expires && kvmppc_core_pending_dec(vcpu)) 4062 kvmppc_core_dequeue_dec(vcpu); 4063 4064 trace_kvm_guest_exit(vcpu); 4065 r = RESUME_GUEST; 4066 if (trap) { 4067 if (!nested) 4068 r = kvmppc_handle_exit_hv(kvm_run, vcpu, current); 4069 else 4070 r = kvmppc_handle_nested_exit(kvm_run, vcpu); 4071 } 4072 vcpu->arch.ret = r; 4073 4074 if (is_kvmppc_resume_guest(r) && vcpu->arch.ceded && 4075 !kvmppc_vcpu_woken(vcpu)) { 4076 kvmppc_set_timer(vcpu); 4077 while (vcpu->arch.ceded && !kvmppc_vcpu_woken(vcpu)) { 4078 if (signal_pending(current)) { 4079 vcpu->stat.signal_exits++; 4080 kvm_run->exit_reason = KVM_EXIT_INTR; 4081 vcpu->arch.ret = -EINTR; 4082 break; 4083 } 4084 spin_lock(&vc->lock); 4085 kvmppc_vcore_blocked(vc); 4086 spin_unlock(&vc->lock); 4087 } 4088 } 4089 vcpu->arch.ceded = 0; 4090 4091 vc->vcore_state = VCORE_INACTIVE; 4092 trace_kvmppc_run_core(vc, 1); 4093 4094 done: 4095 kvmppc_remove_runnable(vc, vcpu); 4096 trace_kvmppc_run_vcpu_exit(vcpu, kvm_run); 4097 4098 return vcpu->arch.ret; 4099 4100 sigpend: 4101 vcpu->stat.signal_exits++; 4102 kvm_run->exit_reason = KVM_EXIT_INTR; 4103 vcpu->arch.ret = -EINTR; 4104 out: 4105 local_irq_enable(); 4106 preempt_enable(); 4107 goto done; 4108 } 4109 4110 static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu) 4111 { 4112 int r; 4113 int srcu_idx; 4114 unsigned long ebb_regs[3] = {}; /* shut up GCC */ 4115 unsigned long user_tar = 0; 4116 unsigned int user_vrsave; 4117 struct kvm *kvm; 4118 4119 if (!vcpu->arch.sane) { 4120 run->exit_reason = KVM_EXIT_INTERNAL_ERROR; 4121 return -EINVAL; 4122 } 4123 4124 /* 4125 * Don't allow entry with a suspended transaction, because 4126 * the guest entry/exit code will lose it. 4127 * If the guest has TM enabled, save away their TM-related SPRs 4128 * (they will get restored by the TM unavailable interrupt). 4129 */ 4130 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM 4131 if (cpu_has_feature(CPU_FTR_TM) && current->thread.regs && 4132 (current->thread.regs->msr & MSR_TM)) { 4133 if (MSR_TM_ACTIVE(current->thread.regs->msr)) { 4134 run->exit_reason = KVM_EXIT_FAIL_ENTRY; 4135 run->fail_entry.hardware_entry_failure_reason = 0; 4136 return -EINVAL; 4137 } 4138 /* Enable TM so we can read the TM SPRs */ 4139 mtmsr(mfmsr() | MSR_TM); 4140 current->thread.tm_tfhar = mfspr(SPRN_TFHAR); 4141 current->thread.tm_tfiar = mfspr(SPRN_TFIAR); 4142 current->thread.tm_texasr = mfspr(SPRN_TEXASR); 4143 current->thread.regs->msr &= ~MSR_TM; 4144 } 4145 #endif 4146 4147 /* 4148 * Force online to 1 for the sake of old userspace which doesn't 4149 * set it. 4150 */ 4151 if (!vcpu->arch.online) { 4152 atomic_inc(&vcpu->arch.vcore->online_count); 4153 vcpu->arch.online = 1; 4154 } 4155 4156 kvmppc_core_prepare_to_enter(vcpu); 4157 4158 /* No need to go into the guest when all we'll do is come back out */ 4159 if (signal_pending(current)) { 4160 run->exit_reason = KVM_EXIT_INTR; 4161 return -EINTR; 4162 } 4163 4164 kvm = vcpu->kvm; 4165 atomic_inc(&kvm->arch.vcpus_running); 4166 /* Order vcpus_running vs. mmu_ready, see kvmppc_alloc_reset_hpt */ 4167 smp_mb(); 4168 4169 flush_all_to_thread(current); 4170 4171 /* Save userspace EBB and other register values */ 4172 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4173 ebb_regs[0] = mfspr(SPRN_EBBHR); 4174 ebb_regs[1] = mfspr(SPRN_EBBRR); 4175 ebb_regs[2] = mfspr(SPRN_BESCR); 4176 user_tar = mfspr(SPRN_TAR); 4177 } 4178 user_vrsave = mfspr(SPRN_VRSAVE); 4179 4180 vcpu->arch.wqp = &vcpu->arch.vcore->wq; 4181 vcpu->arch.pgdir = current->mm->pgd; 4182 vcpu->arch.state = KVMPPC_VCPU_BUSY_IN_HOST; 4183 4184 do { 4185 /* 4186 * The early POWER9 chips that can't mix radix and HPT threads 4187 * on the same core also need the workaround for the problem 4188 * where the TLB would prefetch entries in the guest exit path 4189 * for radix guests using the guest PIDR value and LPID 0. 4190 * The workaround is in the old path (kvmppc_run_vcpu()) 4191 * but not the new path (kvmhv_run_single_vcpu()). 4192 */ 4193 if (kvm->arch.threads_indep && kvm_is_radix(kvm) && 4194 !no_mixing_hpt_and_radix) 4195 r = kvmhv_run_single_vcpu(run, vcpu, ~(u64)0, 4196 vcpu->arch.vcore->lpcr); 4197 else 4198 r = kvmppc_run_vcpu(run, vcpu); 4199 4200 if (run->exit_reason == KVM_EXIT_PAPR_HCALL && 4201 !(vcpu->arch.shregs.msr & MSR_PR)) { 4202 trace_kvm_hcall_enter(vcpu); 4203 r = kvmppc_pseries_do_hcall(vcpu); 4204 trace_kvm_hcall_exit(vcpu, r); 4205 kvmppc_core_prepare_to_enter(vcpu); 4206 } else if (r == RESUME_PAGE_FAULT) { 4207 srcu_idx = srcu_read_lock(&kvm->srcu); 4208 r = kvmppc_book3s_hv_page_fault(run, vcpu, 4209 vcpu->arch.fault_dar, vcpu->arch.fault_dsisr); 4210 srcu_read_unlock(&kvm->srcu, srcu_idx); 4211 } else if (r == RESUME_PASSTHROUGH) { 4212 if (WARN_ON(xive_enabled())) 4213 r = H_SUCCESS; 4214 else 4215 r = kvmppc_xics_rm_complete(vcpu, 0); 4216 } 4217 } while (is_kvmppc_resume_guest(r)); 4218 4219 /* Restore userspace EBB and other register values */ 4220 if (cpu_has_feature(CPU_FTR_ARCH_207S)) { 4221 mtspr(SPRN_EBBHR, ebb_regs[0]); 4222 mtspr(SPRN_EBBRR, ebb_regs[1]); 4223 mtspr(SPRN_BESCR, ebb_regs[2]); 4224 mtspr(SPRN_TAR, user_tar); 4225 mtspr(SPRN_FSCR, current->thread.fscr); 4226 } 4227 mtspr(SPRN_VRSAVE, user_vrsave); 4228 4229 vcpu->arch.state = KVMPPC_VCPU_NOTREADY; 4230 atomic_dec(&kvm->arch.vcpus_running); 4231 return r; 4232 } 4233 4234 static void kvmppc_add_seg_page_size(struct kvm_ppc_one_seg_page_size **sps, 4235 int shift, int sllp) 4236 { 4237 (*sps)->page_shift = shift; 4238 (*sps)->slb_enc = sllp; 4239 (*sps)->enc[0].page_shift = shift; 4240 (*sps)->enc[0].pte_enc = kvmppc_pgsize_lp_encoding(shift, shift); 4241 /* 4242 * Add 16MB MPSS support (may get filtered out by userspace) 4243 */ 4244 if (shift != 24) { 4245 int penc = kvmppc_pgsize_lp_encoding(shift, 24); 4246 if (penc != -1) { 4247 (*sps)->enc[1].page_shift = 24; 4248 (*sps)->enc[1].pte_enc = penc; 4249 } 4250 } 4251 (*sps)++; 4252 } 4253 4254 static int kvm_vm_ioctl_get_smmu_info_hv(struct kvm *kvm, 4255 struct kvm_ppc_smmu_info *info) 4256 { 4257 struct kvm_ppc_one_seg_page_size *sps; 4258 4259 /* 4260 * POWER7, POWER8 and POWER9 all support 32 storage keys for data. 4261 * POWER7 doesn't support keys for instruction accesses, 4262 * POWER8 and POWER9 do. 4263 */ 4264 info->data_keys = 32; 4265 info->instr_keys = cpu_has_feature(CPU_FTR_ARCH_207S) ? 32 : 0; 4266 4267 /* POWER7, 8 and 9 all have 1T segments and 32-entry SLB */ 4268 info->flags = KVM_PPC_PAGE_SIZES_REAL | KVM_PPC_1T_SEGMENTS; 4269 info->slb_size = 32; 4270 4271 /* We only support these sizes for now, and no muti-size segments */ 4272 sps = &info->sps[0]; 4273 kvmppc_add_seg_page_size(&sps, 12, 0); 4274 kvmppc_add_seg_page_size(&sps, 16, SLB_VSID_L | SLB_VSID_LP_01); 4275 kvmppc_add_seg_page_size(&sps, 24, SLB_VSID_L); 4276 4277 /* If running as a nested hypervisor, we don't support HPT guests */ 4278 if (kvmhv_on_pseries()) 4279 info->flags |= KVM_PPC_NO_HASH; 4280 4281 return 0; 4282 } 4283 4284 /* 4285 * Get (and clear) the dirty memory log for a memory slot. 4286 */ 4287 static int kvm_vm_ioctl_get_dirty_log_hv(struct kvm *kvm, 4288 struct kvm_dirty_log *log) 4289 { 4290 struct kvm_memslots *slots; 4291 struct kvm_memory_slot *memslot; 4292 int i, r; 4293 unsigned long n; 4294 unsigned long *buf, *p; 4295 struct kvm_vcpu *vcpu; 4296 4297 mutex_lock(&kvm->slots_lock); 4298 4299 r = -EINVAL; 4300 if (log->slot >= KVM_USER_MEM_SLOTS) 4301 goto out; 4302 4303 slots = kvm_memslots(kvm); 4304 memslot = id_to_memslot(slots, log->slot); 4305 r = -ENOENT; 4306 if (!memslot->dirty_bitmap) 4307 goto out; 4308 4309 /* 4310 * Use second half of bitmap area because both HPT and radix 4311 * accumulate bits in the first half. 4312 */ 4313 n = kvm_dirty_bitmap_bytes(memslot); 4314 buf = memslot->dirty_bitmap + n / sizeof(long); 4315 memset(buf, 0, n); 4316 4317 if (kvm_is_radix(kvm)) 4318 r = kvmppc_hv_get_dirty_log_radix(kvm, memslot, buf); 4319 else 4320 r = kvmppc_hv_get_dirty_log_hpt(kvm, memslot, buf); 4321 if (r) 4322 goto out; 4323 4324 /* 4325 * We accumulate dirty bits in the first half of the 4326 * memslot's dirty_bitmap area, for when pages are paged 4327 * out or modified by the host directly. Pick up these 4328 * bits and add them to the map. 4329 */ 4330 p = memslot->dirty_bitmap; 4331 for (i = 0; i < n / sizeof(long); ++i) 4332 buf[i] |= xchg(&p[i], 0); 4333 4334 /* Harvest dirty bits from VPA and DTL updates */ 4335 /* Note: we never modify the SLB shadow buffer areas */ 4336 kvm_for_each_vcpu(i, vcpu, kvm) { 4337 spin_lock(&vcpu->arch.vpa_update_lock); 4338 kvmppc_harvest_vpa_dirty(&vcpu->arch.vpa, memslot, buf); 4339 kvmppc_harvest_vpa_dirty(&vcpu->arch.dtl, memslot, buf); 4340 spin_unlock(&vcpu->arch.vpa_update_lock); 4341 } 4342 4343 r = -EFAULT; 4344 if (copy_to_user(log->dirty_bitmap, buf, n)) 4345 goto out; 4346 4347 r = 0; 4348 out: 4349 mutex_unlock(&kvm->slots_lock); 4350 return r; 4351 } 4352 4353 static void kvmppc_core_free_memslot_hv(struct kvm_memory_slot *free, 4354 struct kvm_memory_slot *dont) 4355 { 4356 if (!dont || free->arch.rmap != dont->arch.rmap) { 4357 vfree(free->arch.rmap); 4358 free->arch.rmap = NULL; 4359 } 4360 } 4361 4362 static int kvmppc_core_create_memslot_hv(struct kvm_memory_slot *slot, 4363 unsigned long npages) 4364 { 4365 slot->arch.rmap = vzalloc(array_size(npages, sizeof(*slot->arch.rmap))); 4366 if (!slot->arch.rmap) 4367 return -ENOMEM; 4368 4369 return 0; 4370 } 4371 4372 static int kvmppc_core_prepare_memory_region_hv(struct kvm *kvm, 4373 struct kvm_memory_slot *memslot, 4374 const struct kvm_userspace_memory_region *mem) 4375 { 4376 return 0; 4377 } 4378 4379 static void kvmppc_core_commit_memory_region_hv(struct kvm *kvm, 4380 const struct kvm_userspace_memory_region *mem, 4381 const struct kvm_memory_slot *old, 4382 const struct kvm_memory_slot *new, 4383 enum kvm_mr_change change) 4384 { 4385 unsigned long npages = mem->memory_size >> PAGE_SHIFT; 4386 4387 /* 4388 * If we are making a new memslot, it might make 4389 * some address that was previously cached as emulated 4390 * MMIO be no longer emulated MMIO, so invalidate 4391 * all the caches of emulated MMIO translations. 4392 */ 4393 if (npages) 4394 atomic64_inc(&kvm->arch.mmio_update); 4395 4396 /* 4397 * For change == KVM_MR_MOVE or KVM_MR_DELETE, higher levels 4398 * have already called kvm_arch_flush_shadow_memslot() to 4399 * flush shadow mappings. For KVM_MR_CREATE we have no 4400 * previous mappings. So the only case to handle is 4401 * KVM_MR_FLAGS_ONLY when the KVM_MEM_LOG_DIRTY_PAGES bit 4402 * has been changed. 4403 * For radix guests, we flush on setting KVM_MEM_LOG_DIRTY_PAGES 4404 * to get rid of any THP PTEs in the partition-scoped page tables 4405 * so we can track dirtiness at the page level; we flush when 4406 * clearing KVM_MEM_LOG_DIRTY_PAGES so that we can go back to 4407 * using THP PTEs. 4408 */ 4409 if (change == KVM_MR_FLAGS_ONLY && kvm_is_radix(kvm) && 4410 ((new->flags ^ old->flags) & KVM_MEM_LOG_DIRTY_PAGES)) 4411 kvmppc_radix_flush_memslot(kvm, old); 4412 } 4413 4414 /* 4415 * Update LPCR values in kvm->arch and in vcores. 4416 * Caller must hold kvm->lock. 4417 */ 4418 void kvmppc_update_lpcr(struct kvm *kvm, unsigned long lpcr, unsigned long mask) 4419 { 4420 long int i; 4421 u32 cores_done = 0; 4422 4423 if ((kvm->arch.lpcr & mask) == lpcr) 4424 return; 4425 4426 kvm->arch.lpcr = (kvm->arch.lpcr & ~mask) | lpcr; 4427 4428 for (i = 0; i < KVM_MAX_VCORES; ++i) { 4429 struct kvmppc_vcore *vc = kvm->arch.vcores[i]; 4430 if (!vc) 4431 continue; 4432 spin_lock(&vc->lock); 4433 vc->lpcr = (vc->lpcr & ~mask) | lpcr; 4434 spin_unlock(&vc->lock); 4435 if (++cores_done >= kvm->arch.online_vcores) 4436 break; 4437 } 4438 } 4439 4440 static void kvmppc_mmu_destroy_hv(struct kvm_vcpu *vcpu) 4441 { 4442 return; 4443 } 4444 4445 void kvmppc_setup_partition_table(struct kvm *kvm) 4446 { 4447 unsigned long dw0, dw1; 4448 4449 if (!kvm_is_radix(kvm)) { 4450 /* PS field - page size for VRMA */ 4451 dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) | 4452 ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1); 4453 /* HTABSIZE and HTABORG fields */ 4454 dw0 |= kvm->arch.sdr1; 4455 4456 /* Second dword as set by userspace */ 4457 dw1 = kvm->arch.process_table; 4458 } else { 4459 dw0 = PATB_HR | radix__get_tree_size() | 4460 __pa(kvm->arch.pgtable) | RADIX_PGD_INDEX_SIZE; 4461 dw1 = PATB_GR | kvm->arch.process_table; 4462 } 4463 kvmhv_set_ptbl_entry(kvm->arch.lpid, dw0, dw1); 4464 } 4465 4466 /* 4467 * Set up HPT (hashed page table) and RMA (real-mode area). 4468 * Must be called with kvm->lock held. 4469 */ 4470 static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu) 4471 { 4472 int err = 0; 4473 struct kvm *kvm = vcpu->kvm; 4474 unsigned long hva; 4475 struct kvm_memory_slot *memslot; 4476 struct vm_area_struct *vma; 4477 unsigned long lpcr = 0, senc; 4478 unsigned long psize, porder; 4479 int srcu_idx; 4480 4481 /* Allocate hashed page table (if not done already) and reset it */ 4482 if (!kvm->arch.hpt.virt) { 4483 int order = KVM_DEFAULT_HPT_ORDER; 4484 struct kvm_hpt_info info; 4485 4486 err = kvmppc_allocate_hpt(&info, order); 4487 /* If we get here, it means userspace didn't specify a 4488 * size explicitly. So, try successively smaller 4489 * sizes if the default failed. */ 4490 while ((err == -ENOMEM) && --order >= PPC_MIN_HPT_ORDER) 4491 err = kvmppc_allocate_hpt(&info, order); 4492 4493 if (err < 0) { 4494 pr_err("KVM: Couldn't alloc HPT\n"); 4495 goto out; 4496 } 4497 4498 kvmppc_set_hpt(kvm, &info); 4499 } 4500 4501 /* Look up the memslot for guest physical address 0 */ 4502 srcu_idx = srcu_read_lock(&kvm->srcu); 4503 memslot = gfn_to_memslot(kvm, 0); 4504 4505 /* We must have some memory at 0 by now */ 4506 err = -EINVAL; 4507 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID)) 4508 goto out_srcu; 4509 4510 /* Look up the VMA for the start of this memory slot */ 4511 hva = memslot->userspace_addr; 4512 down_read(¤t->mm->mmap_sem); 4513 vma = find_vma(current->mm, hva); 4514 if (!vma || vma->vm_start > hva || (vma->vm_flags & VM_IO)) 4515 goto up_out; 4516 4517 psize = vma_kernel_pagesize(vma); 4518 4519 up_read(¤t->mm->mmap_sem); 4520 4521 /* We can handle 4k, 64k or 16M pages in the VRMA */ 4522 if (psize >= 0x1000000) 4523 psize = 0x1000000; 4524 else if (psize >= 0x10000) 4525 psize = 0x10000; 4526 else 4527 psize = 0x1000; 4528 porder = __ilog2(psize); 4529 4530 senc = slb_pgsize_encoding(psize); 4531 kvm->arch.vrma_slb_v = senc | SLB_VSID_B_1T | 4532 (VRMA_VSID << SLB_VSID_SHIFT_1T); 4533 /* Create HPTEs in the hash page table for the VRMA */ 4534 kvmppc_map_vrma(vcpu, memslot, porder); 4535 4536 /* Update VRMASD field in the LPCR */ 4537 if (!cpu_has_feature(CPU_FTR_ARCH_300)) { 4538 /* the -4 is to account for senc values starting at 0x10 */ 4539 lpcr = senc << (LPCR_VRMASD_SH - 4); 4540 kvmppc_update_lpcr(kvm, lpcr, LPCR_VRMASD); 4541 } 4542 4543 /* Order updates to kvm->arch.lpcr etc. vs. mmu_ready */ 4544 smp_wmb(); 4545 err = 0; 4546 out_srcu: 4547 srcu_read_unlock(&kvm->srcu, srcu_idx); 4548 out: 4549 return err; 4550 4551 up_out: 4552 up_read(¤t->mm->mmap_sem); 4553 goto out_srcu; 4554 } 4555 4556 /* Must be called with kvm->lock held and mmu_ready = 0 and no vcpus running */ 4557 int kvmppc_switch_mmu_to_hpt(struct kvm *kvm) 4558 { 4559 if (nesting_enabled(kvm)) 4560 kvmhv_release_all_nested(kvm); 4561 kvmppc_rmap_reset(kvm); 4562 kvm->arch.process_table = 0; 4563 /* Mutual exclusion with kvm_unmap_hva_range etc. */ 4564 spin_lock(&kvm->mmu_lock); 4565 kvm->arch.radix = 0; 4566 spin_unlock(&kvm->mmu_lock); 4567 kvmppc_free_radix(kvm); 4568 kvmppc_update_lpcr(kvm, LPCR_VPM1, 4569 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 4570 return 0; 4571 } 4572 4573 /* Must be called with kvm->lock held and mmu_ready = 0 and no vcpus running */ 4574 int kvmppc_switch_mmu_to_radix(struct kvm *kvm) 4575 { 4576 int err; 4577 4578 err = kvmppc_init_vm_radix(kvm); 4579 if (err) 4580 return err; 4581 kvmppc_rmap_reset(kvm); 4582 /* Mutual exclusion with kvm_unmap_hva_range etc. */ 4583 spin_lock(&kvm->mmu_lock); 4584 kvm->arch.radix = 1; 4585 spin_unlock(&kvm->mmu_lock); 4586 kvmppc_free_hpt(&kvm->arch.hpt); 4587 kvmppc_update_lpcr(kvm, LPCR_UPRT | LPCR_GTSE | LPCR_HR, 4588 LPCR_VPM1 | LPCR_UPRT | LPCR_GTSE | LPCR_HR); 4589 return 0; 4590 } 4591 4592 #ifdef CONFIG_KVM_XICS 4593 /* 4594 * Allocate a per-core structure for managing state about which cores are 4595 * running in the host versus the guest and for exchanging data between 4596 * real mode KVM and CPU running in the host. 4597 * This is only done for the first VM. 4598 * The allocated structure stays even if all VMs have stopped. 4599 * It is only freed when the kvm-hv module is unloaded. 4600 * It's OK for this routine to fail, we just don't support host 4601 * core operations like redirecting H_IPI wakeups. 4602 */ 4603 void kvmppc_alloc_host_rm_ops(void) 4604 { 4605 struct kvmppc_host_rm_ops *ops; 4606 unsigned long l_ops; 4607 int cpu, core; 4608 int size; 4609 4610 /* Not the first time here ? */ 4611 if (kvmppc_host_rm_ops_hv != NULL) 4612 return; 4613 4614 ops = kzalloc(sizeof(struct kvmppc_host_rm_ops), GFP_KERNEL); 4615 if (!ops) 4616 return; 4617 4618 size = cpu_nr_cores() * sizeof(struct kvmppc_host_rm_core); 4619 ops->rm_core = kzalloc(size, GFP_KERNEL); 4620 4621 if (!ops->rm_core) { 4622 kfree(ops); 4623 return; 4624 } 4625 4626 cpus_read_lock(); 4627 4628 for (cpu = 0; cpu < nr_cpu_ids; cpu += threads_per_core) { 4629 if (!cpu_online(cpu)) 4630 continue; 4631 4632 core = cpu >> threads_shift; 4633 ops->rm_core[core].rm_state.in_host = 1; 4634 } 4635 4636 ops->vcpu_kick = kvmppc_fast_vcpu_kick_hv; 4637 4638 /* 4639 * Make the contents of the kvmppc_host_rm_ops structure visible 4640 * to other CPUs before we assign it to the global variable. 4641 * Do an atomic assignment (no locks used here), but if someone 4642 * beats us to it, just free our copy and return. 4643 */ 4644 smp_wmb(); 4645 l_ops = (unsigned long) ops; 4646 4647 if (cmpxchg64((unsigned long *)&kvmppc_host_rm_ops_hv, 0, l_ops)) { 4648 cpus_read_unlock(); 4649 kfree(ops->rm_core); 4650 kfree(ops); 4651 return; 4652 } 4653 4654 cpuhp_setup_state_nocalls_cpuslocked(CPUHP_KVM_PPC_BOOK3S_PREPARE, 4655 "ppc/kvm_book3s:prepare", 4656 kvmppc_set_host_core, 4657 kvmppc_clear_host_core); 4658 cpus_read_unlock(); 4659 } 4660 4661 void kvmppc_free_host_rm_ops(void) 4662 { 4663 if (kvmppc_host_rm_ops_hv) { 4664 cpuhp_remove_state_nocalls(CPUHP_KVM_PPC_BOOK3S_PREPARE); 4665 kfree(kvmppc_host_rm_ops_hv->rm_core); 4666 kfree(kvmppc_host_rm_ops_hv); 4667 kvmppc_host_rm_ops_hv = NULL; 4668 } 4669 } 4670 #endif 4671 4672 static int kvmppc_core_init_vm_hv(struct kvm *kvm) 4673 { 4674 unsigned long lpcr, lpid; 4675 char buf[32]; 4676 int ret; 4677 4678 /* Allocate the guest's logical partition ID */ 4679 4680 lpid = kvmppc_alloc_lpid(); 4681 if ((long)lpid < 0) 4682 return -ENOMEM; 4683 kvm->arch.lpid = lpid; 4684 4685 kvmppc_alloc_host_rm_ops(); 4686 4687 kvmhv_vm_nested_init(kvm); 4688 4689 /* 4690 * Since we don't flush the TLB when tearing down a VM, 4691 * and this lpid might have previously been used, 4692 * make sure we flush on each core before running the new VM. 4693 * On POWER9, the tlbie in mmu_partition_table_set_entry() 4694 * does this flush for us. 4695 */ 4696 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4697 cpumask_setall(&kvm->arch.need_tlb_flush); 4698 4699 /* Start out with the default set of hcalls enabled */ 4700 memcpy(kvm->arch.enabled_hcalls, default_enabled_hcalls, 4701 sizeof(kvm->arch.enabled_hcalls)); 4702 4703 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4704 kvm->arch.host_sdr1 = mfspr(SPRN_SDR1); 4705 4706 /* Init LPCR for virtual RMA mode */ 4707 if (cpu_has_feature(CPU_FTR_HVMODE)) { 4708 kvm->arch.host_lpid = mfspr(SPRN_LPID); 4709 kvm->arch.host_lpcr = lpcr = mfspr(SPRN_LPCR); 4710 lpcr &= LPCR_PECE | LPCR_LPES; 4711 } else { 4712 lpcr = 0; 4713 } 4714 lpcr |= (4UL << LPCR_DPFD_SH) | LPCR_HDICE | 4715 LPCR_VPM0 | LPCR_VPM1; 4716 kvm->arch.vrma_slb_v = SLB_VSID_B_1T | 4717 (VRMA_VSID << SLB_VSID_SHIFT_1T); 4718 /* On POWER8 turn on online bit to enable PURR/SPURR */ 4719 if (cpu_has_feature(CPU_FTR_ARCH_207S)) 4720 lpcr |= LPCR_ONL; 4721 /* 4722 * On POWER9, VPM0 bit is reserved (VPM0=1 behaviour is assumed) 4723 * Set HVICE bit to enable hypervisor virtualization interrupts. 4724 * Set HEIC to prevent OS interrupts to go to hypervisor (should 4725 * be unnecessary but better safe than sorry in case we re-enable 4726 * EE in HV mode with this LPCR still set) 4727 */ 4728 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4729 lpcr &= ~LPCR_VPM0; 4730 lpcr |= LPCR_HVICE | LPCR_HEIC; 4731 4732 /* 4733 * If xive is enabled, we route 0x500 interrupts directly 4734 * to the guest. 4735 */ 4736 if (xive_enabled()) 4737 lpcr |= LPCR_LPES; 4738 } 4739 4740 /* 4741 * If the host uses radix, the guest starts out as radix. 4742 */ 4743 if (radix_enabled()) { 4744 kvm->arch.radix = 1; 4745 kvm->arch.mmu_ready = 1; 4746 lpcr &= ~LPCR_VPM1; 4747 lpcr |= LPCR_UPRT | LPCR_GTSE | LPCR_HR; 4748 ret = kvmppc_init_vm_radix(kvm); 4749 if (ret) { 4750 kvmppc_free_lpid(kvm->arch.lpid); 4751 return ret; 4752 } 4753 kvmppc_setup_partition_table(kvm); 4754 } 4755 4756 kvm->arch.lpcr = lpcr; 4757 4758 /* Initialization for future HPT resizes */ 4759 kvm->arch.resize_hpt = NULL; 4760 4761 /* 4762 * Work out how many sets the TLB has, for the use of 4763 * the TLB invalidation loop in book3s_hv_rmhandlers.S. 4764 */ 4765 if (radix_enabled()) 4766 kvm->arch.tlb_sets = POWER9_TLB_SETS_RADIX; /* 128 */ 4767 else if (cpu_has_feature(CPU_FTR_ARCH_300)) 4768 kvm->arch.tlb_sets = POWER9_TLB_SETS_HASH; /* 256 */ 4769 else if (cpu_has_feature(CPU_FTR_ARCH_207S)) 4770 kvm->arch.tlb_sets = POWER8_TLB_SETS; /* 512 */ 4771 else 4772 kvm->arch.tlb_sets = POWER7_TLB_SETS; /* 128 */ 4773 4774 /* 4775 * Track that we now have a HV mode VM active. This blocks secondary 4776 * CPU threads from coming online. 4777 * On POWER9, we only need to do this if the "indep_threads_mode" 4778 * module parameter has been set to N. 4779 */ 4780 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4781 if (!indep_threads_mode && !cpu_has_feature(CPU_FTR_HVMODE)) { 4782 pr_warn("KVM: Ignoring indep_threads_mode=N in nested hypervisor\n"); 4783 kvm->arch.threads_indep = true; 4784 } else { 4785 kvm->arch.threads_indep = indep_threads_mode; 4786 } 4787 } 4788 if (!kvm->arch.threads_indep) 4789 kvm_hv_vm_activated(); 4790 4791 /* 4792 * Initialize smt_mode depending on processor. 4793 * POWER8 and earlier have to use "strict" threading, where 4794 * all vCPUs in a vcore have to run on the same (sub)core, 4795 * whereas on POWER9 the threads can each run a different 4796 * guest. 4797 */ 4798 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 4799 kvm->arch.smt_mode = threads_per_subcore; 4800 else 4801 kvm->arch.smt_mode = 1; 4802 kvm->arch.emul_smt_mode = 1; 4803 4804 /* 4805 * Create a debugfs directory for the VM 4806 */ 4807 snprintf(buf, sizeof(buf), "vm%d", current->pid); 4808 kvm->arch.debugfs_dir = debugfs_create_dir(buf, kvm_debugfs_dir); 4809 kvmppc_mmu_debugfs_init(kvm); 4810 if (radix_enabled()) 4811 kvmhv_radix_debugfs_init(kvm); 4812 4813 return 0; 4814 } 4815 4816 static void kvmppc_free_vcores(struct kvm *kvm) 4817 { 4818 long int i; 4819 4820 for (i = 0; i < KVM_MAX_VCORES; ++i) 4821 kfree(kvm->arch.vcores[i]); 4822 kvm->arch.online_vcores = 0; 4823 } 4824 4825 static void kvmppc_core_destroy_vm_hv(struct kvm *kvm) 4826 { 4827 debugfs_remove_recursive(kvm->arch.debugfs_dir); 4828 4829 if (!kvm->arch.threads_indep) 4830 kvm_hv_vm_deactivated(); 4831 4832 kvmppc_free_vcores(kvm); 4833 4834 4835 if (kvm_is_radix(kvm)) 4836 kvmppc_free_radix(kvm); 4837 else 4838 kvmppc_free_hpt(&kvm->arch.hpt); 4839 4840 /* Perform global invalidation and return lpid to the pool */ 4841 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 4842 if (nesting_enabled(kvm)) 4843 kvmhv_release_all_nested(kvm); 4844 kvm->arch.process_table = 0; 4845 kvmhv_set_ptbl_entry(kvm->arch.lpid, 0, 0); 4846 } 4847 kvmppc_free_lpid(kvm->arch.lpid); 4848 4849 kvmppc_free_pimap(kvm); 4850 } 4851 4852 /* We don't need to emulate any privileged instructions or dcbz */ 4853 static int kvmppc_core_emulate_op_hv(struct kvm_run *run, struct kvm_vcpu *vcpu, 4854 unsigned int inst, int *advance) 4855 { 4856 return EMULATE_FAIL; 4857 } 4858 4859 static int kvmppc_core_emulate_mtspr_hv(struct kvm_vcpu *vcpu, int sprn, 4860 ulong spr_val) 4861 { 4862 return EMULATE_FAIL; 4863 } 4864 4865 static int kvmppc_core_emulate_mfspr_hv(struct kvm_vcpu *vcpu, int sprn, 4866 ulong *spr_val) 4867 { 4868 return EMULATE_FAIL; 4869 } 4870 4871 static int kvmppc_core_check_processor_compat_hv(void) 4872 { 4873 if (cpu_has_feature(CPU_FTR_HVMODE) && 4874 cpu_has_feature(CPU_FTR_ARCH_206)) 4875 return 0; 4876 4877 /* POWER9 in radix mode is capable of being a nested hypervisor. */ 4878 if (cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled()) 4879 return 0; 4880 4881 return -EIO; 4882 } 4883 4884 #ifdef CONFIG_KVM_XICS 4885 4886 void kvmppc_free_pimap(struct kvm *kvm) 4887 { 4888 kfree(kvm->arch.pimap); 4889 } 4890 4891 static struct kvmppc_passthru_irqmap *kvmppc_alloc_pimap(void) 4892 { 4893 return kzalloc(sizeof(struct kvmppc_passthru_irqmap), GFP_KERNEL); 4894 } 4895 4896 static int kvmppc_set_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 4897 { 4898 struct irq_desc *desc; 4899 struct kvmppc_irq_map *irq_map; 4900 struct kvmppc_passthru_irqmap *pimap; 4901 struct irq_chip *chip; 4902 int i, rc = 0; 4903 4904 if (!kvm_irq_bypass) 4905 return 1; 4906 4907 desc = irq_to_desc(host_irq); 4908 if (!desc) 4909 return -EIO; 4910 4911 mutex_lock(&kvm->lock); 4912 4913 pimap = kvm->arch.pimap; 4914 if (pimap == NULL) { 4915 /* First call, allocate structure to hold IRQ map */ 4916 pimap = kvmppc_alloc_pimap(); 4917 if (pimap == NULL) { 4918 mutex_unlock(&kvm->lock); 4919 return -ENOMEM; 4920 } 4921 kvm->arch.pimap = pimap; 4922 } 4923 4924 /* 4925 * For now, we only support interrupts for which the EOI operation 4926 * is an OPAL call followed by a write to XIRR, since that's 4927 * what our real-mode EOI code does, or a XIVE interrupt 4928 */ 4929 chip = irq_data_get_irq_chip(&desc->irq_data); 4930 if (!chip || !(is_pnv_opal_msi(chip) || is_xive_irq(chip))) { 4931 pr_warn("kvmppc_set_passthru_irq_hv: Could not assign IRQ map for (%d,%d)\n", 4932 host_irq, guest_gsi); 4933 mutex_unlock(&kvm->lock); 4934 return -ENOENT; 4935 } 4936 4937 /* 4938 * See if we already have an entry for this guest IRQ number. 4939 * If it's mapped to a hardware IRQ number, that's an error, 4940 * otherwise re-use this entry. 4941 */ 4942 for (i = 0; i < pimap->n_mapped; i++) { 4943 if (guest_gsi == pimap->mapped[i].v_hwirq) { 4944 if (pimap->mapped[i].r_hwirq) { 4945 mutex_unlock(&kvm->lock); 4946 return -EINVAL; 4947 } 4948 break; 4949 } 4950 } 4951 4952 if (i == KVMPPC_PIRQ_MAPPED) { 4953 mutex_unlock(&kvm->lock); 4954 return -EAGAIN; /* table is full */ 4955 } 4956 4957 irq_map = &pimap->mapped[i]; 4958 4959 irq_map->v_hwirq = guest_gsi; 4960 irq_map->desc = desc; 4961 4962 /* 4963 * Order the above two stores before the next to serialize with 4964 * the KVM real mode handler. 4965 */ 4966 smp_wmb(); 4967 irq_map->r_hwirq = desc->irq_data.hwirq; 4968 4969 if (i == pimap->n_mapped) 4970 pimap->n_mapped++; 4971 4972 if (xive_enabled()) 4973 rc = kvmppc_xive_set_mapped(kvm, guest_gsi, desc); 4974 else 4975 kvmppc_xics_set_mapped(kvm, guest_gsi, desc->irq_data.hwirq); 4976 if (rc) 4977 irq_map->r_hwirq = 0; 4978 4979 mutex_unlock(&kvm->lock); 4980 4981 return 0; 4982 } 4983 4984 static int kvmppc_clr_passthru_irq(struct kvm *kvm, int host_irq, int guest_gsi) 4985 { 4986 struct irq_desc *desc; 4987 struct kvmppc_passthru_irqmap *pimap; 4988 int i, rc = 0; 4989 4990 if (!kvm_irq_bypass) 4991 return 0; 4992 4993 desc = irq_to_desc(host_irq); 4994 if (!desc) 4995 return -EIO; 4996 4997 mutex_lock(&kvm->lock); 4998 if (!kvm->arch.pimap) 4999 goto unlock; 5000 5001 pimap = kvm->arch.pimap; 5002 5003 for (i = 0; i < pimap->n_mapped; i++) { 5004 if (guest_gsi == pimap->mapped[i].v_hwirq) 5005 break; 5006 } 5007 5008 if (i == pimap->n_mapped) { 5009 mutex_unlock(&kvm->lock); 5010 return -ENODEV; 5011 } 5012 5013 if (xive_enabled()) 5014 rc = kvmppc_xive_clr_mapped(kvm, guest_gsi, pimap->mapped[i].desc); 5015 else 5016 kvmppc_xics_clr_mapped(kvm, guest_gsi, pimap->mapped[i].r_hwirq); 5017 5018 /* invalidate the entry (what do do on error from the above ?) */ 5019 pimap->mapped[i].r_hwirq = 0; 5020 5021 /* 5022 * We don't free this structure even when the count goes to 5023 * zero. The structure is freed when we destroy the VM. 5024 */ 5025 unlock: 5026 mutex_unlock(&kvm->lock); 5027 return rc; 5028 } 5029 5030 static int kvmppc_irq_bypass_add_producer_hv(struct irq_bypass_consumer *cons, 5031 struct irq_bypass_producer *prod) 5032 { 5033 int ret = 0; 5034 struct kvm_kernel_irqfd *irqfd = 5035 container_of(cons, struct kvm_kernel_irqfd, consumer); 5036 5037 irqfd->producer = prod; 5038 5039 ret = kvmppc_set_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5040 if (ret) 5041 pr_info("kvmppc_set_passthru_irq (irq %d, gsi %d) fails: %d\n", 5042 prod->irq, irqfd->gsi, ret); 5043 5044 return ret; 5045 } 5046 5047 static void kvmppc_irq_bypass_del_producer_hv(struct irq_bypass_consumer *cons, 5048 struct irq_bypass_producer *prod) 5049 { 5050 int ret; 5051 struct kvm_kernel_irqfd *irqfd = 5052 container_of(cons, struct kvm_kernel_irqfd, consumer); 5053 5054 irqfd->producer = NULL; 5055 5056 /* 5057 * When producer of consumer is unregistered, we change back to 5058 * default external interrupt handling mode - KVM real mode 5059 * will switch back to host. 5060 */ 5061 ret = kvmppc_clr_passthru_irq(irqfd->kvm, prod->irq, irqfd->gsi); 5062 if (ret) 5063 pr_warn("kvmppc_clr_passthru_irq (irq %d, gsi %d) fails: %d\n", 5064 prod->irq, irqfd->gsi, ret); 5065 } 5066 #endif 5067 5068 static long kvm_arch_vm_ioctl_hv(struct file *filp, 5069 unsigned int ioctl, unsigned long arg) 5070 { 5071 struct kvm *kvm __maybe_unused = filp->private_data; 5072 void __user *argp = (void __user *)arg; 5073 long r; 5074 5075 switch (ioctl) { 5076 5077 case KVM_PPC_ALLOCATE_HTAB: { 5078 u32 htab_order; 5079 5080 r = -EFAULT; 5081 if (get_user(htab_order, (u32 __user *)argp)) 5082 break; 5083 r = kvmppc_alloc_reset_hpt(kvm, htab_order); 5084 if (r) 5085 break; 5086 r = 0; 5087 break; 5088 } 5089 5090 case KVM_PPC_GET_HTAB_FD: { 5091 struct kvm_get_htab_fd ghf; 5092 5093 r = -EFAULT; 5094 if (copy_from_user(&ghf, argp, sizeof(ghf))) 5095 break; 5096 r = kvm_vm_ioctl_get_htab_fd(kvm, &ghf); 5097 break; 5098 } 5099 5100 case KVM_PPC_RESIZE_HPT_PREPARE: { 5101 struct kvm_ppc_resize_hpt rhpt; 5102 5103 r = -EFAULT; 5104 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5105 break; 5106 5107 r = kvm_vm_ioctl_resize_hpt_prepare(kvm, &rhpt); 5108 break; 5109 } 5110 5111 case KVM_PPC_RESIZE_HPT_COMMIT: { 5112 struct kvm_ppc_resize_hpt rhpt; 5113 5114 r = -EFAULT; 5115 if (copy_from_user(&rhpt, argp, sizeof(rhpt))) 5116 break; 5117 5118 r = kvm_vm_ioctl_resize_hpt_commit(kvm, &rhpt); 5119 break; 5120 } 5121 5122 default: 5123 r = -ENOTTY; 5124 } 5125 5126 return r; 5127 } 5128 5129 /* 5130 * List of hcall numbers to enable by default. 5131 * For compatibility with old userspace, we enable by default 5132 * all hcalls that were implemented before the hcall-enabling 5133 * facility was added. Note this list should not include H_RTAS. 5134 */ 5135 static unsigned int default_hcall_list[] = { 5136 H_REMOVE, 5137 H_ENTER, 5138 H_READ, 5139 H_PROTECT, 5140 H_BULK_REMOVE, 5141 H_GET_TCE, 5142 H_PUT_TCE, 5143 H_SET_DABR, 5144 H_SET_XDABR, 5145 H_CEDE, 5146 H_PROD, 5147 H_CONFER, 5148 H_REGISTER_VPA, 5149 #ifdef CONFIG_KVM_XICS 5150 H_EOI, 5151 H_CPPR, 5152 H_IPI, 5153 H_IPOLL, 5154 H_XIRR, 5155 H_XIRR_X, 5156 #endif 5157 0 5158 }; 5159 5160 static void init_default_hcalls(void) 5161 { 5162 int i; 5163 unsigned int hcall; 5164 5165 for (i = 0; default_hcall_list[i]; ++i) { 5166 hcall = default_hcall_list[i]; 5167 WARN_ON(!kvmppc_hcall_impl_hv(hcall)); 5168 __set_bit(hcall / 4, default_enabled_hcalls); 5169 } 5170 } 5171 5172 static int kvmhv_configure_mmu(struct kvm *kvm, struct kvm_ppc_mmuv3_cfg *cfg) 5173 { 5174 unsigned long lpcr; 5175 int radix; 5176 int err; 5177 5178 /* If not on a POWER9, reject it */ 5179 if (!cpu_has_feature(CPU_FTR_ARCH_300)) 5180 return -ENODEV; 5181 5182 /* If any unknown flags set, reject it */ 5183 if (cfg->flags & ~(KVM_PPC_MMUV3_RADIX | KVM_PPC_MMUV3_GTSE)) 5184 return -EINVAL; 5185 5186 /* GR (guest radix) bit in process_table field must match */ 5187 radix = !!(cfg->flags & KVM_PPC_MMUV3_RADIX); 5188 if (!!(cfg->process_table & PATB_GR) != radix) 5189 return -EINVAL; 5190 5191 /* Process table size field must be reasonable, i.e. <= 24 */ 5192 if ((cfg->process_table & PRTS_MASK) > 24) 5193 return -EINVAL; 5194 5195 /* We can change a guest to/from radix now, if the host is radix */ 5196 if (radix && !radix_enabled()) 5197 return -EINVAL; 5198 5199 /* If we're a nested hypervisor, we currently only support radix */ 5200 if (kvmhv_on_pseries() && !radix) 5201 return -EINVAL; 5202 5203 mutex_lock(&kvm->lock); 5204 if (radix != kvm_is_radix(kvm)) { 5205 if (kvm->arch.mmu_ready) { 5206 kvm->arch.mmu_ready = 0; 5207 /* order mmu_ready vs. vcpus_running */ 5208 smp_mb(); 5209 if (atomic_read(&kvm->arch.vcpus_running)) { 5210 kvm->arch.mmu_ready = 1; 5211 err = -EBUSY; 5212 goto out_unlock; 5213 } 5214 } 5215 if (radix) 5216 err = kvmppc_switch_mmu_to_radix(kvm); 5217 else 5218 err = kvmppc_switch_mmu_to_hpt(kvm); 5219 if (err) 5220 goto out_unlock; 5221 } 5222 5223 kvm->arch.process_table = cfg->process_table; 5224 kvmppc_setup_partition_table(kvm); 5225 5226 lpcr = (cfg->flags & KVM_PPC_MMUV3_GTSE) ? LPCR_GTSE : 0; 5227 kvmppc_update_lpcr(kvm, lpcr, LPCR_GTSE); 5228 err = 0; 5229 5230 out_unlock: 5231 mutex_unlock(&kvm->lock); 5232 return err; 5233 } 5234 5235 static int kvmhv_enable_nested(struct kvm *kvm) 5236 { 5237 if (!nested) 5238 return -EPERM; 5239 if (!cpu_has_feature(CPU_FTR_ARCH_300) || no_mixing_hpt_and_radix) 5240 return -ENODEV; 5241 5242 /* kvm == NULL means the caller is testing if the capability exists */ 5243 if (kvm) 5244 kvm->arch.nested_enable = true; 5245 return 0; 5246 } 5247 5248 static int kvmhv_load_from_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5249 int size) 5250 { 5251 int rc = -EINVAL; 5252 5253 if (kvmhv_vcpu_is_radix(vcpu)) { 5254 rc = kvmhv_copy_from_guest_radix(vcpu, *eaddr, ptr, size); 5255 5256 if (rc > 0) 5257 rc = -EINVAL; 5258 } 5259 5260 /* For now quadrants are the only way to access nested guest memory */ 5261 if (rc && vcpu->arch.nested) 5262 rc = -EAGAIN; 5263 5264 return rc; 5265 } 5266 5267 static int kvmhv_store_to_eaddr(struct kvm_vcpu *vcpu, ulong *eaddr, void *ptr, 5268 int size) 5269 { 5270 int rc = -EINVAL; 5271 5272 if (kvmhv_vcpu_is_radix(vcpu)) { 5273 rc = kvmhv_copy_to_guest_radix(vcpu, *eaddr, ptr, size); 5274 5275 if (rc > 0) 5276 rc = -EINVAL; 5277 } 5278 5279 /* For now quadrants are the only way to access nested guest memory */ 5280 if (rc && vcpu->arch.nested) 5281 rc = -EAGAIN; 5282 5283 return rc; 5284 } 5285 5286 static struct kvmppc_ops kvm_ops_hv = { 5287 .get_sregs = kvm_arch_vcpu_ioctl_get_sregs_hv, 5288 .set_sregs = kvm_arch_vcpu_ioctl_set_sregs_hv, 5289 .get_one_reg = kvmppc_get_one_reg_hv, 5290 .set_one_reg = kvmppc_set_one_reg_hv, 5291 .vcpu_load = kvmppc_core_vcpu_load_hv, 5292 .vcpu_put = kvmppc_core_vcpu_put_hv, 5293 .set_msr = kvmppc_set_msr_hv, 5294 .vcpu_run = kvmppc_vcpu_run_hv, 5295 .vcpu_create = kvmppc_core_vcpu_create_hv, 5296 .vcpu_free = kvmppc_core_vcpu_free_hv, 5297 .check_requests = kvmppc_core_check_requests_hv, 5298 .get_dirty_log = kvm_vm_ioctl_get_dirty_log_hv, 5299 .flush_memslot = kvmppc_core_flush_memslot_hv, 5300 .prepare_memory_region = kvmppc_core_prepare_memory_region_hv, 5301 .commit_memory_region = kvmppc_core_commit_memory_region_hv, 5302 .unmap_hva_range = kvm_unmap_hva_range_hv, 5303 .age_hva = kvm_age_hva_hv, 5304 .test_age_hva = kvm_test_age_hva_hv, 5305 .set_spte_hva = kvm_set_spte_hva_hv, 5306 .mmu_destroy = kvmppc_mmu_destroy_hv, 5307 .free_memslot = kvmppc_core_free_memslot_hv, 5308 .create_memslot = kvmppc_core_create_memslot_hv, 5309 .init_vm = kvmppc_core_init_vm_hv, 5310 .destroy_vm = kvmppc_core_destroy_vm_hv, 5311 .get_smmu_info = kvm_vm_ioctl_get_smmu_info_hv, 5312 .emulate_op = kvmppc_core_emulate_op_hv, 5313 .emulate_mtspr = kvmppc_core_emulate_mtspr_hv, 5314 .emulate_mfspr = kvmppc_core_emulate_mfspr_hv, 5315 .fast_vcpu_kick = kvmppc_fast_vcpu_kick_hv, 5316 .arch_vm_ioctl = kvm_arch_vm_ioctl_hv, 5317 .hcall_implemented = kvmppc_hcall_impl_hv, 5318 #ifdef CONFIG_KVM_XICS 5319 .irq_bypass_add_producer = kvmppc_irq_bypass_add_producer_hv, 5320 .irq_bypass_del_producer = kvmppc_irq_bypass_del_producer_hv, 5321 #endif 5322 .configure_mmu = kvmhv_configure_mmu, 5323 .get_rmmu_info = kvmhv_get_rmmu_info, 5324 .set_smt_mode = kvmhv_set_smt_mode, 5325 .enable_nested = kvmhv_enable_nested, 5326 .load_from_eaddr = kvmhv_load_from_eaddr, 5327 .store_to_eaddr = kvmhv_store_to_eaddr, 5328 }; 5329 5330 static int kvm_init_subcore_bitmap(void) 5331 { 5332 int i, j; 5333 int nr_cores = cpu_nr_cores(); 5334 struct sibling_subcore_state *sibling_subcore_state; 5335 5336 for (i = 0; i < nr_cores; i++) { 5337 int first_cpu = i * threads_per_core; 5338 int node = cpu_to_node(first_cpu); 5339 5340 /* Ignore if it is already allocated. */ 5341 if (paca_ptrs[first_cpu]->sibling_subcore_state) 5342 continue; 5343 5344 sibling_subcore_state = 5345 kmalloc_node(sizeof(struct sibling_subcore_state), 5346 GFP_KERNEL, node); 5347 if (!sibling_subcore_state) 5348 return -ENOMEM; 5349 5350 memset(sibling_subcore_state, 0, 5351 sizeof(struct sibling_subcore_state)); 5352 5353 for (j = 0; j < threads_per_core; j++) { 5354 int cpu = first_cpu + j; 5355 5356 paca_ptrs[cpu]->sibling_subcore_state = 5357 sibling_subcore_state; 5358 } 5359 } 5360 return 0; 5361 } 5362 5363 static int kvmppc_radix_possible(void) 5364 { 5365 return cpu_has_feature(CPU_FTR_ARCH_300) && radix_enabled(); 5366 } 5367 5368 static int kvmppc_book3s_init_hv(void) 5369 { 5370 int r; 5371 /* 5372 * FIXME!! Do we need to check on all cpus ? 5373 */ 5374 r = kvmppc_core_check_processor_compat_hv(); 5375 if (r < 0) 5376 return -ENODEV; 5377 5378 r = kvmhv_nested_init(); 5379 if (r) 5380 return r; 5381 5382 r = kvm_init_subcore_bitmap(); 5383 if (r) 5384 return r; 5385 5386 /* 5387 * We need a way of accessing the XICS interrupt controller, 5388 * either directly, via paca_ptrs[cpu]->kvm_hstate.xics_phys, or 5389 * indirectly, via OPAL. 5390 */ 5391 #ifdef CONFIG_SMP 5392 if (!xive_enabled() && !kvmhv_on_pseries() && 5393 !local_paca->kvm_hstate.xics_phys) { 5394 struct device_node *np; 5395 5396 np = of_find_compatible_node(NULL, NULL, "ibm,opal-intc"); 5397 if (!np) { 5398 pr_err("KVM-HV: Cannot determine method for accessing XICS\n"); 5399 return -ENODEV; 5400 } 5401 /* presence of intc confirmed - node can be dropped again */ 5402 of_node_put(np); 5403 } 5404 #endif 5405 5406 kvm_ops_hv.owner = THIS_MODULE; 5407 kvmppc_hv_ops = &kvm_ops_hv; 5408 5409 init_default_hcalls(); 5410 5411 init_vcore_lists(); 5412 5413 r = kvmppc_mmu_hv_init(); 5414 if (r) 5415 return r; 5416 5417 if (kvmppc_radix_possible()) 5418 r = kvmppc_radix_init(); 5419 5420 /* 5421 * POWER9 chips before version 2.02 can't have some threads in 5422 * HPT mode and some in radix mode on the same core. 5423 */ 5424 if (cpu_has_feature(CPU_FTR_ARCH_300)) { 5425 unsigned int pvr = mfspr(SPRN_PVR); 5426 if ((pvr >> 16) == PVR_POWER9 && 5427 (((pvr & 0xe000) == 0 && (pvr & 0xfff) < 0x202) || 5428 ((pvr & 0xe000) == 0x2000 && (pvr & 0xfff) < 0x101))) 5429 no_mixing_hpt_and_radix = true; 5430 } 5431 5432 return r; 5433 } 5434 5435 static void kvmppc_book3s_exit_hv(void) 5436 { 5437 kvmppc_free_host_rm_ops(); 5438 if (kvmppc_radix_possible()) 5439 kvmppc_radix_exit(); 5440 kvmppc_hv_ops = NULL; 5441 kvmhv_nested_exit(); 5442 } 5443 5444 module_init(kvmppc_book3s_init_hv); 5445 module_exit(kvmppc_book3s_exit_hv); 5446 MODULE_LICENSE("GPL"); 5447 MODULE_ALIAS_MISCDEV(KVM_MINOR); 5448 MODULE_ALIAS("devname:kvm"); 5449