1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License, version 2, as 4 * published by the Free Software Foundation. 5 * 6 * This program is distributed in the hope that it will be useful, 7 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * GNU General Public License for more details. 10 * 11 * You should have received a copy of the GNU General Public License 12 * along with this program; if not, write to the Free Software 13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14 * 15 * Copyright SUSE Linux Products GmbH 2009 16 * 17 * Authors: Alexander Graf <agraf@suse.de> 18 */ 19 20 #include <asm/kvm_ppc.h> 21 #include <asm/disassemble.h> 22 #include <asm/kvm_book3s.h> 23 #include <asm/reg.h> 24 #include <asm/switch_to.h> 25 #include <asm/time.h> 26 27 #define OP_19_XOP_RFID 18 28 #define OP_19_XOP_RFI 50 29 30 #define OP_31_XOP_MFMSR 83 31 #define OP_31_XOP_MTMSR 146 32 #define OP_31_XOP_MTMSRD 178 33 #define OP_31_XOP_MTSR 210 34 #define OP_31_XOP_MTSRIN 242 35 #define OP_31_XOP_TLBIEL 274 36 #define OP_31_XOP_TLBIE 306 37 /* Opcode is officially reserved, reuse it as sc 1 when sc 1 doesn't trap */ 38 #define OP_31_XOP_FAKE_SC1 308 39 #define OP_31_XOP_SLBMTE 402 40 #define OP_31_XOP_SLBIE 434 41 #define OP_31_XOP_SLBIA 498 42 #define OP_31_XOP_MFSR 595 43 #define OP_31_XOP_MFSRIN 659 44 #define OP_31_XOP_DCBA 758 45 #define OP_31_XOP_SLBMFEV 851 46 #define OP_31_XOP_EIOIO 854 47 #define OP_31_XOP_SLBMFEE 915 48 49 /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */ 50 #define OP_31_XOP_DCBZ 1010 51 52 #define OP_LFS 48 53 #define OP_LFD 50 54 #define OP_STFS 52 55 #define OP_STFD 54 56 57 #define SPRN_GQR0 912 58 #define SPRN_GQR1 913 59 #define SPRN_GQR2 914 60 #define SPRN_GQR3 915 61 #define SPRN_GQR4 916 62 #define SPRN_GQR5 917 63 #define SPRN_GQR6 918 64 #define SPRN_GQR7 919 65 66 /* Book3S_32 defines mfsrin(v) - but that messes up our abstract 67 * function pointers, so let's just disable the define. */ 68 #undef mfsrin 69 70 enum priv_level { 71 PRIV_PROBLEM = 0, 72 PRIV_SUPER = 1, 73 PRIV_HYPER = 2, 74 }; 75 76 static bool spr_allowed(struct kvm_vcpu *vcpu, enum priv_level level) 77 { 78 /* PAPR VMs only access supervisor SPRs */ 79 if (vcpu->arch.papr_enabled && (level > PRIV_SUPER)) 80 return false; 81 82 /* Limit user space to its own small SPR set */ 83 if ((vcpu->arch.shared->msr & MSR_PR) && level > PRIV_PROBLEM) 84 return false; 85 86 return true; 87 } 88 89 int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu, 90 unsigned int inst, int *advance) 91 { 92 int emulated = EMULATE_DONE; 93 int rt = get_rt(inst); 94 int rs = get_rs(inst); 95 int ra = get_ra(inst); 96 int rb = get_rb(inst); 97 98 switch (get_op(inst)) { 99 case 19: 100 switch (get_xop(inst)) { 101 case OP_19_XOP_RFID: 102 case OP_19_XOP_RFI: 103 kvmppc_set_pc(vcpu, vcpu->arch.shared->srr0); 104 kvmppc_set_msr(vcpu, vcpu->arch.shared->srr1); 105 *advance = 0; 106 break; 107 108 default: 109 emulated = EMULATE_FAIL; 110 break; 111 } 112 break; 113 case 31: 114 switch (get_xop(inst)) { 115 case OP_31_XOP_MFMSR: 116 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->msr); 117 break; 118 case OP_31_XOP_MTMSRD: 119 { 120 ulong rs_val = kvmppc_get_gpr(vcpu, rs); 121 if (inst & 0x10000) { 122 ulong new_msr = vcpu->arch.shared->msr; 123 new_msr &= ~(MSR_RI | MSR_EE); 124 new_msr |= rs_val & (MSR_RI | MSR_EE); 125 vcpu->arch.shared->msr = new_msr; 126 } else 127 kvmppc_set_msr(vcpu, rs_val); 128 break; 129 } 130 case OP_31_XOP_MTMSR: 131 kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, rs)); 132 break; 133 case OP_31_XOP_MFSR: 134 { 135 int srnum; 136 137 srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32); 138 if (vcpu->arch.mmu.mfsrin) { 139 u32 sr; 140 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum); 141 kvmppc_set_gpr(vcpu, rt, sr); 142 } 143 break; 144 } 145 case OP_31_XOP_MFSRIN: 146 { 147 int srnum; 148 149 srnum = (kvmppc_get_gpr(vcpu, rb) >> 28) & 0xf; 150 if (vcpu->arch.mmu.mfsrin) { 151 u32 sr; 152 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum); 153 kvmppc_set_gpr(vcpu, rt, sr); 154 } 155 break; 156 } 157 case OP_31_XOP_MTSR: 158 vcpu->arch.mmu.mtsrin(vcpu, 159 (inst >> 16) & 0xf, 160 kvmppc_get_gpr(vcpu, rs)); 161 break; 162 case OP_31_XOP_MTSRIN: 163 vcpu->arch.mmu.mtsrin(vcpu, 164 (kvmppc_get_gpr(vcpu, rb) >> 28) & 0xf, 165 kvmppc_get_gpr(vcpu, rs)); 166 break; 167 case OP_31_XOP_TLBIE: 168 case OP_31_XOP_TLBIEL: 169 { 170 bool large = (inst & 0x00200000) ? true : false; 171 ulong addr = kvmppc_get_gpr(vcpu, rb); 172 vcpu->arch.mmu.tlbie(vcpu, addr, large); 173 break; 174 } 175 #ifdef CONFIG_KVM_BOOK3S_64_PR 176 case OP_31_XOP_FAKE_SC1: 177 { 178 /* SC 1 papr hypercalls */ 179 ulong cmd = kvmppc_get_gpr(vcpu, 3); 180 int i; 181 182 if ((vcpu->arch.shared->msr & MSR_PR) || 183 !vcpu->arch.papr_enabled) { 184 emulated = EMULATE_FAIL; 185 break; 186 } 187 188 if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) 189 break; 190 191 run->papr_hcall.nr = cmd; 192 for (i = 0; i < 9; ++i) { 193 ulong gpr = kvmppc_get_gpr(vcpu, 4 + i); 194 run->papr_hcall.args[i] = gpr; 195 } 196 197 run->exit_reason = KVM_EXIT_PAPR_HCALL; 198 vcpu->arch.hcall_needed = 1; 199 emulated = EMULATE_EXIT_USER; 200 break; 201 } 202 #endif 203 case OP_31_XOP_EIOIO: 204 break; 205 case OP_31_XOP_SLBMTE: 206 if (!vcpu->arch.mmu.slbmte) 207 return EMULATE_FAIL; 208 209 vcpu->arch.mmu.slbmte(vcpu, 210 kvmppc_get_gpr(vcpu, rs), 211 kvmppc_get_gpr(vcpu, rb)); 212 break; 213 case OP_31_XOP_SLBIE: 214 if (!vcpu->arch.mmu.slbie) 215 return EMULATE_FAIL; 216 217 vcpu->arch.mmu.slbie(vcpu, 218 kvmppc_get_gpr(vcpu, rb)); 219 break; 220 case OP_31_XOP_SLBIA: 221 if (!vcpu->arch.mmu.slbia) 222 return EMULATE_FAIL; 223 224 vcpu->arch.mmu.slbia(vcpu); 225 break; 226 case OP_31_XOP_SLBMFEE: 227 if (!vcpu->arch.mmu.slbmfee) { 228 emulated = EMULATE_FAIL; 229 } else { 230 ulong t, rb_val; 231 232 rb_val = kvmppc_get_gpr(vcpu, rb); 233 t = vcpu->arch.mmu.slbmfee(vcpu, rb_val); 234 kvmppc_set_gpr(vcpu, rt, t); 235 } 236 break; 237 case OP_31_XOP_SLBMFEV: 238 if (!vcpu->arch.mmu.slbmfev) { 239 emulated = EMULATE_FAIL; 240 } else { 241 ulong t, rb_val; 242 243 rb_val = kvmppc_get_gpr(vcpu, rb); 244 t = vcpu->arch.mmu.slbmfev(vcpu, rb_val); 245 kvmppc_set_gpr(vcpu, rt, t); 246 } 247 break; 248 case OP_31_XOP_DCBA: 249 /* Gets treated as NOP */ 250 break; 251 case OP_31_XOP_DCBZ: 252 { 253 ulong rb_val = kvmppc_get_gpr(vcpu, rb); 254 ulong ra_val = 0; 255 ulong addr, vaddr; 256 u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 }; 257 u32 dsisr; 258 int r; 259 260 if (ra) 261 ra_val = kvmppc_get_gpr(vcpu, ra); 262 263 addr = (ra_val + rb_val) & ~31ULL; 264 if (!(vcpu->arch.shared->msr & MSR_SF)) 265 addr &= 0xffffffff; 266 vaddr = addr; 267 268 r = kvmppc_st(vcpu, &addr, 32, zeros, true); 269 if ((r == -ENOENT) || (r == -EPERM)) { 270 struct kvmppc_book3s_shadow_vcpu *svcpu; 271 272 svcpu = svcpu_get(vcpu); 273 *advance = 0; 274 vcpu->arch.shared->dar = vaddr; 275 svcpu->fault_dar = vaddr; 276 277 dsisr = DSISR_ISSTORE; 278 if (r == -ENOENT) 279 dsisr |= DSISR_NOHPTE; 280 else if (r == -EPERM) 281 dsisr |= DSISR_PROTFAULT; 282 283 vcpu->arch.shared->dsisr = dsisr; 284 svcpu->fault_dsisr = dsisr; 285 svcpu_put(svcpu); 286 287 kvmppc_book3s_queue_irqprio(vcpu, 288 BOOK3S_INTERRUPT_DATA_STORAGE); 289 } 290 291 break; 292 } 293 default: 294 emulated = EMULATE_FAIL; 295 } 296 break; 297 default: 298 emulated = EMULATE_FAIL; 299 } 300 301 if (emulated == EMULATE_FAIL) 302 emulated = kvmppc_emulate_paired_single(run, vcpu); 303 304 return emulated; 305 } 306 307 void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper, 308 u32 val) 309 { 310 if (upper) { 311 /* Upper BAT */ 312 u32 bl = (val >> 2) & 0x7ff; 313 bat->bepi_mask = (~bl << 17); 314 bat->bepi = val & 0xfffe0000; 315 bat->vs = (val & 2) ? 1 : 0; 316 bat->vp = (val & 1) ? 1 : 0; 317 bat->raw = (bat->raw & 0xffffffff00000000ULL) | val; 318 } else { 319 /* Lower BAT */ 320 bat->brpn = val & 0xfffe0000; 321 bat->wimg = (val >> 3) & 0xf; 322 bat->pp = val & 3; 323 bat->raw = (bat->raw & 0x00000000ffffffffULL) | ((u64)val << 32); 324 } 325 } 326 327 static struct kvmppc_bat *kvmppc_find_bat(struct kvm_vcpu *vcpu, int sprn) 328 { 329 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); 330 struct kvmppc_bat *bat; 331 332 switch (sprn) { 333 case SPRN_IBAT0U ... SPRN_IBAT3L: 334 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2]; 335 break; 336 case SPRN_IBAT4U ... SPRN_IBAT7L: 337 bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)]; 338 break; 339 case SPRN_DBAT0U ... SPRN_DBAT3L: 340 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2]; 341 break; 342 case SPRN_DBAT4U ... SPRN_DBAT7L: 343 bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)]; 344 break; 345 default: 346 BUG(); 347 } 348 349 return bat; 350 } 351 352 int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val) 353 { 354 int emulated = EMULATE_DONE; 355 356 switch (sprn) { 357 case SPRN_SDR1: 358 if (!spr_allowed(vcpu, PRIV_HYPER)) 359 goto unprivileged; 360 to_book3s(vcpu)->sdr1 = spr_val; 361 break; 362 case SPRN_DSISR: 363 vcpu->arch.shared->dsisr = spr_val; 364 break; 365 case SPRN_DAR: 366 vcpu->arch.shared->dar = spr_val; 367 break; 368 case SPRN_HIOR: 369 to_book3s(vcpu)->hior = spr_val; 370 break; 371 case SPRN_IBAT0U ... SPRN_IBAT3L: 372 case SPRN_IBAT4U ... SPRN_IBAT7L: 373 case SPRN_DBAT0U ... SPRN_DBAT3L: 374 case SPRN_DBAT4U ... SPRN_DBAT7L: 375 { 376 struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn); 377 378 kvmppc_set_bat(vcpu, bat, !(sprn % 2), (u32)spr_val); 379 /* BAT writes happen so rarely that we're ok to flush 380 * everything here */ 381 kvmppc_mmu_pte_flush(vcpu, 0, 0); 382 kvmppc_mmu_flush_segments(vcpu); 383 break; 384 } 385 case SPRN_HID0: 386 to_book3s(vcpu)->hid[0] = spr_val; 387 break; 388 case SPRN_HID1: 389 to_book3s(vcpu)->hid[1] = spr_val; 390 break; 391 case SPRN_HID2: 392 to_book3s(vcpu)->hid[2] = spr_val; 393 break; 394 case SPRN_HID2_GEKKO: 395 to_book3s(vcpu)->hid[2] = spr_val; 396 /* HID2.PSE controls paired single on gekko */ 397 switch (vcpu->arch.pvr) { 398 case 0x00080200: /* lonestar 2.0 */ 399 case 0x00088202: /* lonestar 2.2 */ 400 case 0x70000100: /* gekko 1.0 */ 401 case 0x00080100: /* gekko 2.0 */ 402 case 0x00083203: /* gekko 2.3a */ 403 case 0x00083213: /* gekko 2.3b */ 404 case 0x00083204: /* gekko 2.4 */ 405 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */ 406 case 0x00087200: /* broadway */ 407 if (vcpu->arch.hflags & BOOK3S_HFLAG_NATIVE_PS) { 408 /* Native paired singles */ 409 } else if (spr_val & (1 << 29)) { /* HID2.PSE */ 410 vcpu->arch.hflags |= BOOK3S_HFLAG_PAIRED_SINGLE; 411 kvmppc_giveup_ext(vcpu, MSR_FP); 412 } else { 413 vcpu->arch.hflags &= ~BOOK3S_HFLAG_PAIRED_SINGLE; 414 } 415 break; 416 } 417 break; 418 case SPRN_HID4: 419 case SPRN_HID4_GEKKO: 420 to_book3s(vcpu)->hid[4] = spr_val; 421 break; 422 case SPRN_HID5: 423 to_book3s(vcpu)->hid[5] = spr_val; 424 /* guest HID5 set can change is_dcbz32 */ 425 if (vcpu->arch.mmu.is_dcbz32(vcpu) && 426 (mfmsr() & MSR_HV)) 427 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32; 428 break; 429 case SPRN_PURR: 430 to_book3s(vcpu)->purr_offset = spr_val - get_tb(); 431 break; 432 case SPRN_SPURR: 433 to_book3s(vcpu)->spurr_offset = spr_val - get_tb(); 434 break; 435 case SPRN_GQR0: 436 case SPRN_GQR1: 437 case SPRN_GQR2: 438 case SPRN_GQR3: 439 case SPRN_GQR4: 440 case SPRN_GQR5: 441 case SPRN_GQR6: 442 case SPRN_GQR7: 443 to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val; 444 break; 445 case SPRN_ICTC: 446 case SPRN_THRM1: 447 case SPRN_THRM2: 448 case SPRN_THRM3: 449 case SPRN_CTRLF: 450 case SPRN_CTRLT: 451 case SPRN_L2CR: 452 case SPRN_DSCR: 453 case SPRN_MMCR0_GEKKO: 454 case SPRN_MMCR1_GEKKO: 455 case SPRN_PMC1_GEKKO: 456 case SPRN_PMC2_GEKKO: 457 case SPRN_PMC3_GEKKO: 458 case SPRN_PMC4_GEKKO: 459 case SPRN_WPAR_GEKKO: 460 case SPRN_MSSSR0: 461 case SPRN_DABR: 462 break; 463 unprivileged: 464 default: 465 printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn); 466 #ifndef DEBUG_SPR 467 emulated = EMULATE_FAIL; 468 #endif 469 break; 470 } 471 472 return emulated; 473 } 474 475 int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val) 476 { 477 int emulated = EMULATE_DONE; 478 479 switch (sprn) { 480 case SPRN_IBAT0U ... SPRN_IBAT3L: 481 case SPRN_IBAT4U ... SPRN_IBAT7L: 482 case SPRN_DBAT0U ... SPRN_DBAT3L: 483 case SPRN_DBAT4U ... SPRN_DBAT7L: 484 { 485 struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn); 486 487 if (sprn % 2) 488 *spr_val = bat->raw >> 32; 489 else 490 *spr_val = bat->raw; 491 492 break; 493 } 494 case SPRN_SDR1: 495 if (!spr_allowed(vcpu, PRIV_HYPER)) 496 goto unprivileged; 497 *spr_val = to_book3s(vcpu)->sdr1; 498 break; 499 case SPRN_DSISR: 500 *spr_val = vcpu->arch.shared->dsisr; 501 break; 502 case SPRN_DAR: 503 *spr_val = vcpu->arch.shared->dar; 504 break; 505 case SPRN_HIOR: 506 *spr_val = to_book3s(vcpu)->hior; 507 break; 508 case SPRN_HID0: 509 *spr_val = to_book3s(vcpu)->hid[0]; 510 break; 511 case SPRN_HID1: 512 *spr_val = to_book3s(vcpu)->hid[1]; 513 break; 514 case SPRN_HID2: 515 case SPRN_HID2_GEKKO: 516 *spr_val = to_book3s(vcpu)->hid[2]; 517 break; 518 case SPRN_HID4: 519 case SPRN_HID4_GEKKO: 520 *spr_val = to_book3s(vcpu)->hid[4]; 521 break; 522 case SPRN_HID5: 523 *spr_val = to_book3s(vcpu)->hid[5]; 524 break; 525 case SPRN_CFAR: 526 case SPRN_DSCR: 527 *spr_val = 0; 528 break; 529 case SPRN_PURR: 530 *spr_val = get_tb() + to_book3s(vcpu)->purr_offset; 531 break; 532 case SPRN_SPURR: 533 *spr_val = get_tb() + to_book3s(vcpu)->purr_offset; 534 break; 535 case SPRN_GQR0: 536 case SPRN_GQR1: 537 case SPRN_GQR2: 538 case SPRN_GQR3: 539 case SPRN_GQR4: 540 case SPRN_GQR5: 541 case SPRN_GQR6: 542 case SPRN_GQR7: 543 *spr_val = to_book3s(vcpu)->gqr[sprn - SPRN_GQR0]; 544 break; 545 case SPRN_THRM1: 546 case SPRN_THRM2: 547 case SPRN_THRM3: 548 case SPRN_CTRLF: 549 case SPRN_CTRLT: 550 case SPRN_L2CR: 551 case SPRN_MMCR0_GEKKO: 552 case SPRN_MMCR1_GEKKO: 553 case SPRN_PMC1_GEKKO: 554 case SPRN_PMC2_GEKKO: 555 case SPRN_PMC3_GEKKO: 556 case SPRN_PMC4_GEKKO: 557 case SPRN_WPAR_GEKKO: 558 case SPRN_MSSSR0: 559 case SPRN_DABR: 560 *spr_val = 0; 561 break; 562 default: 563 unprivileged: 564 printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn); 565 #ifndef DEBUG_SPR 566 emulated = EMULATE_FAIL; 567 #endif 568 break; 569 } 570 571 return emulated; 572 } 573 574 u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst) 575 { 576 u32 dsisr = 0; 577 578 /* 579 * This is what the spec says about DSISR bits (not mentioned = 0): 580 * 581 * 12:13 [DS] Set to bits 30:31 582 * 15:16 [X] Set to bits 29:30 583 * 17 [X] Set to bit 25 584 * [D/DS] Set to bit 5 585 * 18:21 [X] Set to bits 21:24 586 * [D/DS] Set to bits 1:4 587 * 22:26 Set to bits 6:10 (RT/RS/FRT/FRS) 588 * 27:31 Set to bits 11:15 (RA) 589 */ 590 591 switch (get_op(inst)) { 592 /* D-form */ 593 case OP_LFS: 594 case OP_LFD: 595 case OP_STFD: 596 case OP_STFS: 597 dsisr |= (inst >> 12) & 0x4000; /* bit 17 */ 598 dsisr |= (inst >> 17) & 0x3c00; /* bits 18:21 */ 599 break; 600 /* X-form */ 601 case 31: 602 dsisr |= (inst << 14) & 0x18000; /* bits 15:16 */ 603 dsisr |= (inst << 8) & 0x04000; /* bit 17 */ 604 dsisr |= (inst << 3) & 0x03c00; /* bits 18:21 */ 605 break; 606 default: 607 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst); 608 break; 609 } 610 611 dsisr |= (inst >> 16) & 0x03ff; /* bits 22:31 */ 612 613 return dsisr; 614 } 615 616 ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst) 617 { 618 ulong dar = 0; 619 ulong ra = get_ra(inst); 620 ulong rb = get_rb(inst); 621 622 switch (get_op(inst)) { 623 case OP_LFS: 624 case OP_LFD: 625 case OP_STFD: 626 case OP_STFS: 627 if (ra) 628 dar = kvmppc_get_gpr(vcpu, ra); 629 dar += (s32)((s16)inst); 630 break; 631 case 31: 632 if (ra) 633 dar = kvmppc_get_gpr(vcpu, ra); 634 dar += kvmppc_get_gpr(vcpu, rb); 635 break; 636 default: 637 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst); 638 break; 639 } 640 641 return dar; 642 } 643