1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License, version 2, as 4 * published by the Free Software Foundation. 5 * 6 * This program is distributed in the hope that it will be useful, 7 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * GNU General Public License for more details. 10 * 11 * You should have received a copy of the GNU General Public License 12 * along with this program; if not, write to the Free Software 13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14 * 15 * Copyright SUSE Linux Products GmbH 2009 16 * 17 * Authors: Alexander Graf <agraf@suse.de> 18 */ 19 20 #include <linux/types.h> 21 #include <linux/string.h> 22 #include <linux/kvm.h> 23 #include <linux/kvm_host.h> 24 #include <linux/highmem.h> 25 26 #include <asm/tlbflush.h> 27 #include <asm/kvm_ppc.h> 28 #include <asm/kvm_book3s.h> 29 #include <asm/book3s/64/mmu-hash.h> 30 31 /* #define DEBUG_MMU */ 32 33 #ifdef DEBUG_MMU 34 #define dprintk(X...) printk(KERN_INFO X) 35 #else 36 #define dprintk(X...) do { } while(0) 37 #endif 38 39 static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu) 40 { 41 kvmppc_set_msr(vcpu, vcpu->arch.intr_msr); 42 } 43 44 static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe( 45 struct kvm_vcpu *vcpu, 46 gva_t eaddr) 47 { 48 int i; 49 u64 esid = GET_ESID(eaddr); 50 u64 esid_1t = GET_ESID_1T(eaddr); 51 52 for (i = 0; i < vcpu->arch.slb_nr; i++) { 53 u64 cmp_esid = esid; 54 55 if (!vcpu->arch.slb[i].valid) 56 continue; 57 58 if (vcpu->arch.slb[i].tb) 59 cmp_esid = esid_1t; 60 61 if (vcpu->arch.slb[i].esid == cmp_esid) 62 return &vcpu->arch.slb[i]; 63 } 64 65 dprintk("KVM: No SLB entry found for 0x%lx [%llx | %llx]\n", 66 eaddr, esid, esid_1t); 67 for (i = 0; i < vcpu->arch.slb_nr; i++) { 68 if (vcpu->arch.slb[i].vsid) 69 dprintk(" %d: %c%c%c %llx %llx\n", i, 70 vcpu->arch.slb[i].valid ? 'v' : ' ', 71 vcpu->arch.slb[i].large ? 'l' : ' ', 72 vcpu->arch.slb[i].tb ? 't' : ' ', 73 vcpu->arch.slb[i].esid, 74 vcpu->arch.slb[i].vsid); 75 } 76 77 return NULL; 78 } 79 80 static int kvmppc_slb_sid_shift(struct kvmppc_slb *slbe) 81 { 82 return slbe->tb ? SID_SHIFT_1T : SID_SHIFT; 83 } 84 85 static u64 kvmppc_slb_offset_mask(struct kvmppc_slb *slbe) 86 { 87 return (1ul << kvmppc_slb_sid_shift(slbe)) - 1; 88 } 89 90 static u64 kvmppc_slb_calc_vpn(struct kvmppc_slb *slb, gva_t eaddr) 91 { 92 eaddr &= kvmppc_slb_offset_mask(slb); 93 94 return (eaddr >> VPN_SHIFT) | 95 ((slb->vsid) << (kvmppc_slb_sid_shift(slb) - VPN_SHIFT)); 96 } 97 98 static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr, 99 bool data) 100 { 101 struct kvmppc_slb *slb; 102 103 slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr); 104 if (!slb) 105 return 0; 106 107 return kvmppc_slb_calc_vpn(slb, eaddr); 108 } 109 110 static int mmu_pagesize(int mmu_pg) 111 { 112 switch (mmu_pg) { 113 case MMU_PAGE_64K: 114 return 16; 115 case MMU_PAGE_16M: 116 return 24; 117 } 118 return 12; 119 } 120 121 static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe) 122 { 123 return mmu_pagesize(slbe->base_page_size); 124 } 125 126 static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr) 127 { 128 int p = kvmppc_mmu_book3s_64_get_pagesize(slbe); 129 130 return ((eaddr & kvmppc_slb_offset_mask(slbe)) >> p); 131 } 132 133 static hva_t kvmppc_mmu_book3s_64_get_pteg(struct kvm_vcpu *vcpu, 134 struct kvmppc_slb *slbe, gva_t eaddr, 135 bool second) 136 { 137 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); 138 u64 hash, pteg, htabsize; 139 u32 ssize; 140 hva_t r; 141 u64 vpn; 142 143 htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1); 144 145 vpn = kvmppc_slb_calc_vpn(slbe, eaddr); 146 ssize = slbe->tb ? MMU_SEGSIZE_1T : MMU_SEGSIZE_256M; 147 hash = hpt_hash(vpn, kvmppc_mmu_book3s_64_get_pagesize(slbe), ssize); 148 if (second) 149 hash = ~hash; 150 hash &= ((1ULL << 39ULL) - 1ULL); 151 hash &= htabsize; 152 hash <<= 7ULL; 153 154 pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL; 155 pteg |= hash; 156 157 dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n", 158 page, vcpu_book3s->sdr1, pteg, slbe->vsid); 159 160 /* When running a PAPR guest, SDR1 contains a HVA address instead 161 of a GPA */ 162 if (vcpu->arch.papr_enabled) 163 r = pteg; 164 else 165 r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT); 166 167 if (kvm_is_error_hva(r)) 168 return r; 169 return r | (pteg & ~PAGE_MASK); 170 } 171 172 static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr) 173 { 174 int p = kvmppc_mmu_book3s_64_get_pagesize(slbe); 175 u64 avpn; 176 177 avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr); 178 avpn |= slbe->vsid << (kvmppc_slb_sid_shift(slbe) - p); 179 180 if (p < 16) 181 avpn >>= ((80 - p) - 56) - 8; /* 16 - p */ 182 else 183 avpn <<= p - 16; 184 185 return avpn; 186 } 187 188 /* 189 * Return page size encoded in the second word of a HPTE, or 190 * -1 for an invalid encoding for the base page size indicated by 191 * the SLB entry. This doesn't handle mixed pagesize segments yet. 192 */ 193 static int decode_pagesize(struct kvmppc_slb *slbe, u64 r) 194 { 195 switch (slbe->base_page_size) { 196 case MMU_PAGE_64K: 197 if ((r & 0xf000) == 0x1000) 198 return MMU_PAGE_64K; 199 break; 200 case MMU_PAGE_16M: 201 if ((r & 0xff000) == 0) 202 return MMU_PAGE_16M; 203 break; 204 } 205 return -1; 206 } 207 208 static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr, 209 struct kvmppc_pte *gpte, bool data, 210 bool iswrite) 211 { 212 struct kvmppc_slb *slbe; 213 hva_t ptegp; 214 u64 pteg[16]; 215 u64 avpn = 0; 216 u64 v, r; 217 u64 v_val, v_mask; 218 u64 eaddr_mask; 219 int i; 220 u8 pp, key = 0; 221 bool found = false; 222 bool second = false; 223 int pgsize; 224 ulong mp_ea = vcpu->arch.magic_page_ea; 225 226 /* Magic page override */ 227 if (unlikely(mp_ea) && 228 unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) && 229 !(kvmppc_get_msr(vcpu) & MSR_PR)) { 230 gpte->eaddr = eaddr; 231 gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data); 232 gpte->raddr = vcpu->arch.magic_page_pa | (gpte->raddr & 0xfff); 233 gpte->raddr &= KVM_PAM; 234 gpte->may_execute = true; 235 gpte->may_read = true; 236 gpte->may_write = true; 237 gpte->page_size = MMU_PAGE_4K; 238 239 return 0; 240 } 241 242 slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr); 243 if (!slbe) 244 goto no_seg_found; 245 246 avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr); 247 v_val = avpn & HPTE_V_AVPN; 248 249 if (slbe->tb) 250 v_val |= SLB_VSID_B_1T; 251 if (slbe->large) 252 v_val |= HPTE_V_LARGE; 253 v_val |= HPTE_V_VALID; 254 255 v_mask = SLB_VSID_B | HPTE_V_AVPN | HPTE_V_LARGE | HPTE_V_VALID | 256 HPTE_V_SECONDARY; 257 258 pgsize = slbe->large ? MMU_PAGE_16M : MMU_PAGE_4K; 259 260 mutex_lock(&vcpu->kvm->arch.hpt_mutex); 261 262 do_second: 263 ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu, slbe, eaddr, second); 264 if (kvm_is_error_hva(ptegp)) 265 goto no_page_found; 266 267 if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) { 268 printk_ratelimited(KERN_ERR 269 "KVM: Can't copy data from 0x%lx!\n", ptegp); 270 goto no_page_found; 271 } 272 273 if ((kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Kp) 274 key = 4; 275 else if (!(kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Ks) 276 key = 4; 277 278 for (i=0; i<16; i+=2) { 279 u64 pte0 = be64_to_cpu(pteg[i]); 280 u64 pte1 = be64_to_cpu(pteg[i + 1]); 281 282 /* Check all relevant fields of 1st dword */ 283 if ((pte0 & v_mask) == v_val) { 284 /* If large page bit is set, check pgsize encoding */ 285 if (slbe->large && 286 (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) { 287 pgsize = decode_pagesize(slbe, pte1); 288 if (pgsize < 0) 289 continue; 290 } 291 found = true; 292 break; 293 } 294 } 295 296 if (!found) { 297 if (second) 298 goto no_page_found; 299 v_val |= HPTE_V_SECONDARY; 300 second = true; 301 goto do_second; 302 } 303 304 v = be64_to_cpu(pteg[i]); 305 r = be64_to_cpu(pteg[i+1]); 306 pp = (r & HPTE_R_PP) | key; 307 if (r & HPTE_R_PP0) 308 pp |= 8; 309 310 gpte->eaddr = eaddr; 311 gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data); 312 313 eaddr_mask = (1ull << mmu_pagesize(pgsize)) - 1; 314 gpte->raddr = (r & HPTE_R_RPN & ~eaddr_mask) | (eaddr & eaddr_mask); 315 gpte->page_size = pgsize; 316 gpte->may_execute = ((r & HPTE_R_N) ? false : true); 317 if (unlikely(vcpu->arch.disable_kernel_nx) && 318 !(kvmppc_get_msr(vcpu) & MSR_PR)) 319 gpte->may_execute = true; 320 gpte->may_read = false; 321 gpte->may_write = false; 322 gpte->wimg = r & HPTE_R_WIMG; 323 324 switch (pp) { 325 case 0: 326 case 1: 327 case 2: 328 case 6: 329 gpte->may_write = true; 330 /* fall through */ 331 case 3: 332 case 5: 333 case 7: 334 case 10: 335 gpte->may_read = true; 336 break; 337 } 338 339 dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx " 340 "-> 0x%lx\n", 341 eaddr, avpn, gpte->vpage, gpte->raddr); 342 343 /* Update PTE R and C bits, so the guest's swapper knows we used the 344 * page */ 345 if (gpte->may_read && !(r & HPTE_R_R)) { 346 /* 347 * Set the accessed flag. 348 * We have to write this back with a single byte write 349 * because another vcpu may be accessing this on 350 * non-PAPR platforms such as mac99, and this is 351 * what real hardware does. 352 */ 353 char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64)); 354 r |= HPTE_R_R; 355 put_user(r >> 8, addr + 6); 356 } 357 if (iswrite && gpte->may_write && !(r & HPTE_R_C)) { 358 /* Set the dirty flag */ 359 /* Use a single byte write */ 360 char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64)); 361 r |= HPTE_R_C; 362 put_user(r, addr + 7); 363 } 364 365 mutex_unlock(&vcpu->kvm->arch.hpt_mutex); 366 367 if (!gpte->may_read || (iswrite && !gpte->may_write)) 368 return -EPERM; 369 return 0; 370 371 no_page_found: 372 mutex_unlock(&vcpu->kvm->arch.hpt_mutex); 373 return -ENOENT; 374 375 no_seg_found: 376 dprintk("KVM MMU: Trigger segment fault\n"); 377 return -EINVAL; 378 } 379 380 static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb) 381 { 382 u64 esid, esid_1t; 383 int slb_nr; 384 struct kvmppc_slb *slbe; 385 386 dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb); 387 388 esid = GET_ESID(rb); 389 esid_1t = GET_ESID_1T(rb); 390 slb_nr = rb & 0xfff; 391 392 if (slb_nr > vcpu->arch.slb_nr) 393 return; 394 395 slbe = &vcpu->arch.slb[slb_nr]; 396 397 slbe->large = (rs & SLB_VSID_L) ? 1 : 0; 398 slbe->tb = (rs & SLB_VSID_B_1T) ? 1 : 0; 399 slbe->esid = slbe->tb ? esid_1t : esid; 400 slbe->vsid = (rs & ~SLB_VSID_B) >> (kvmppc_slb_sid_shift(slbe) - 16); 401 slbe->valid = (rb & SLB_ESID_V) ? 1 : 0; 402 slbe->Ks = (rs & SLB_VSID_KS) ? 1 : 0; 403 slbe->Kp = (rs & SLB_VSID_KP) ? 1 : 0; 404 slbe->nx = (rs & SLB_VSID_N) ? 1 : 0; 405 slbe->class = (rs & SLB_VSID_C) ? 1 : 0; 406 407 slbe->base_page_size = MMU_PAGE_4K; 408 if (slbe->large) { 409 if (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE) { 410 switch (rs & SLB_VSID_LP) { 411 case SLB_VSID_LP_00: 412 slbe->base_page_size = MMU_PAGE_16M; 413 break; 414 case SLB_VSID_LP_01: 415 slbe->base_page_size = MMU_PAGE_64K; 416 break; 417 } 418 } else 419 slbe->base_page_size = MMU_PAGE_16M; 420 } 421 422 slbe->orige = rb & (ESID_MASK | SLB_ESID_V); 423 slbe->origv = rs; 424 425 /* Map the new segment */ 426 kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT); 427 } 428 429 static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr) 430 { 431 struct kvmppc_slb *slbe; 432 433 if (slb_nr > vcpu->arch.slb_nr) 434 return 0; 435 436 slbe = &vcpu->arch.slb[slb_nr]; 437 438 return slbe->orige; 439 } 440 441 static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr) 442 { 443 struct kvmppc_slb *slbe; 444 445 if (slb_nr > vcpu->arch.slb_nr) 446 return 0; 447 448 slbe = &vcpu->arch.slb[slb_nr]; 449 450 return slbe->origv; 451 } 452 453 static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea) 454 { 455 struct kvmppc_slb *slbe; 456 u64 seg_size; 457 458 dprintk("KVM MMU: slbie(0x%llx)\n", ea); 459 460 slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea); 461 462 if (!slbe) 463 return; 464 465 dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid); 466 467 slbe->valid = false; 468 slbe->orige = 0; 469 slbe->origv = 0; 470 471 seg_size = 1ull << kvmppc_slb_sid_shift(slbe); 472 kvmppc_mmu_flush_segment(vcpu, ea & ~(seg_size - 1), seg_size); 473 } 474 475 static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu) 476 { 477 int i; 478 479 dprintk("KVM MMU: slbia()\n"); 480 481 for (i = 1; i < vcpu->arch.slb_nr; i++) { 482 vcpu->arch.slb[i].valid = false; 483 vcpu->arch.slb[i].orige = 0; 484 vcpu->arch.slb[i].origv = 0; 485 } 486 487 if (kvmppc_get_msr(vcpu) & MSR_IR) { 488 kvmppc_mmu_flush_segments(vcpu); 489 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); 490 } 491 } 492 493 static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum, 494 ulong value) 495 { 496 u64 rb = 0, rs = 0; 497 498 /* 499 * According to Book3 2.01 mtsrin is implemented as: 500 * 501 * The SLB entry specified by (RB)32:35 is loaded from register 502 * RS, as follows. 503 * 504 * SLBE Bit Source SLB Field 505 * 506 * 0:31 0x0000_0000 ESID-0:31 507 * 32:35 (RB)32:35 ESID-32:35 508 * 36 0b1 V 509 * 37:61 0x00_0000|| 0b0 VSID-0:24 510 * 62:88 (RS)37:63 VSID-25:51 511 * 89:91 (RS)33:35 Ks Kp N 512 * 92 (RS)36 L ((RS)36 must be 0b0) 513 * 93 0b0 C 514 */ 515 516 dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value); 517 518 /* ESID = srnum */ 519 rb |= (srnum & 0xf) << 28; 520 /* Set the valid bit */ 521 rb |= 1 << 27; 522 /* Index = ESID */ 523 rb |= srnum; 524 525 /* VSID = VSID */ 526 rs |= (value & 0xfffffff) << 12; 527 /* flags = flags */ 528 rs |= ((value >> 28) & 0x7) << 9; 529 530 kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb); 531 } 532 533 static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va, 534 bool large) 535 { 536 u64 mask = 0xFFFFFFFFFULL; 537 long i; 538 struct kvm_vcpu *v; 539 540 dprintk("KVM MMU: tlbie(0x%lx)\n", va); 541 542 /* 543 * The tlbie instruction changed behaviour starting with 544 * POWER6. POWER6 and later don't have the large page flag 545 * in the instruction but in the RB value, along with bits 546 * indicating page and segment sizes. 547 */ 548 if (vcpu->arch.hflags & BOOK3S_HFLAG_NEW_TLBIE) { 549 /* POWER6 or later */ 550 if (va & 1) { /* L bit */ 551 if ((va & 0xf000) == 0x1000) 552 mask = 0xFFFFFFFF0ULL; /* 64k page */ 553 else 554 mask = 0xFFFFFF000ULL; /* 16M page */ 555 } 556 } else { 557 /* older processors, e.g. PPC970 */ 558 if (large) 559 mask = 0xFFFFFF000ULL; 560 } 561 /* flush this VA on all vcpus */ 562 kvm_for_each_vcpu(i, v, vcpu->kvm) 563 kvmppc_mmu_pte_vflush(v, va >> 12, mask); 564 } 565 566 #ifdef CONFIG_PPC_64K_PAGES 567 static int segment_contains_magic_page(struct kvm_vcpu *vcpu, ulong esid) 568 { 569 ulong mp_ea = vcpu->arch.magic_page_ea; 570 571 return mp_ea && !(kvmppc_get_msr(vcpu) & MSR_PR) && 572 (mp_ea >> SID_SHIFT) == esid; 573 } 574 #endif 575 576 static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid, 577 u64 *vsid) 578 { 579 ulong ea = esid << SID_SHIFT; 580 struct kvmppc_slb *slb; 581 u64 gvsid = esid; 582 ulong mp_ea = vcpu->arch.magic_page_ea; 583 int pagesize = MMU_PAGE_64K; 584 u64 msr = kvmppc_get_msr(vcpu); 585 586 if (msr & (MSR_DR|MSR_IR)) { 587 slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea); 588 if (slb) { 589 gvsid = slb->vsid; 590 pagesize = slb->base_page_size; 591 if (slb->tb) { 592 gvsid <<= SID_SHIFT_1T - SID_SHIFT; 593 gvsid |= esid & ((1ul << (SID_SHIFT_1T - SID_SHIFT)) - 1); 594 gvsid |= VSID_1T; 595 } 596 } 597 } 598 599 switch (msr & (MSR_DR|MSR_IR)) { 600 case 0: 601 gvsid = VSID_REAL | esid; 602 break; 603 case MSR_IR: 604 gvsid |= VSID_REAL_IR; 605 break; 606 case MSR_DR: 607 gvsid |= VSID_REAL_DR; 608 break; 609 case MSR_DR|MSR_IR: 610 if (!slb) 611 goto no_slb; 612 613 break; 614 default: 615 BUG(); 616 break; 617 } 618 619 #ifdef CONFIG_PPC_64K_PAGES 620 /* 621 * Mark this as a 64k segment if the host is using 622 * 64k pages, the host MMU supports 64k pages and 623 * the guest segment page size is >= 64k, 624 * but not if this segment contains the magic page. 625 */ 626 if (pagesize >= MMU_PAGE_64K && 627 mmu_psize_defs[MMU_PAGE_64K].shift && 628 !segment_contains_magic_page(vcpu, esid)) 629 gvsid |= VSID_64K; 630 #endif 631 632 if (kvmppc_get_msr(vcpu) & MSR_PR) 633 gvsid |= VSID_PR; 634 635 *vsid = gvsid; 636 return 0; 637 638 no_slb: 639 /* Catch magic page case */ 640 if (unlikely(mp_ea) && 641 unlikely(esid == (mp_ea >> SID_SHIFT)) && 642 !(kvmppc_get_msr(vcpu) & MSR_PR)) { 643 *vsid = VSID_REAL | esid; 644 return 0; 645 } 646 647 return -EINVAL; 648 } 649 650 static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu) 651 { 652 return (to_book3s(vcpu)->hid[5] & 0x80); 653 } 654 655 void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu) 656 { 657 struct kvmppc_mmu *mmu = &vcpu->arch.mmu; 658 659 mmu->mfsrin = NULL; 660 mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin; 661 mmu->slbmte = kvmppc_mmu_book3s_64_slbmte; 662 mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee; 663 mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev; 664 mmu->slbie = kvmppc_mmu_book3s_64_slbie; 665 mmu->slbia = kvmppc_mmu_book3s_64_slbia; 666 mmu->xlate = kvmppc_mmu_book3s_64_xlate; 667 mmu->reset_msr = kvmppc_mmu_book3s_64_reset_msr; 668 mmu->tlbie = kvmppc_mmu_book3s_64_tlbie; 669 mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid; 670 mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp; 671 mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32; 672 673 vcpu->arch.hflags |= BOOK3S_HFLAG_SLB; 674 } 675