1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License, version 2, as 4 * published by the Free Software Foundation. 5 * 6 * This program is distributed in the hope that it will be useful, 7 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * GNU General Public License for more details. 10 * 11 * You should have received a copy of the GNU General Public License 12 * along with this program; if not, write to the Free Software 13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14 * 15 * Copyright SUSE Linux Products GmbH 2009 16 * 17 * Authors: Alexander Graf <agraf@suse.de> 18 */ 19 20 #include <linux/types.h> 21 #include <linux/string.h> 22 #include <linux/kvm.h> 23 #include <linux/kvm_host.h> 24 #include <linux/highmem.h> 25 26 #include <asm/tlbflush.h> 27 #include <asm/kvm_ppc.h> 28 #include <asm/kvm_book3s.h> 29 #include <asm/book3s/64/mmu-hash.h> 30 31 /* #define DEBUG_MMU */ 32 33 #ifdef DEBUG_MMU 34 #define dprintk(X...) printk(KERN_INFO X) 35 #else 36 #define dprintk(X...) do { } while(0) 37 #endif 38 39 static void kvmppc_mmu_book3s_64_reset_msr(struct kvm_vcpu *vcpu) 40 { 41 kvmppc_set_msr(vcpu, vcpu->arch.intr_msr); 42 } 43 44 static struct kvmppc_slb *kvmppc_mmu_book3s_64_find_slbe( 45 struct kvm_vcpu *vcpu, 46 gva_t eaddr) 47 { 48 int i; 49 u64 esid = GET_ESID(eaddr); 50 u64 esid_1t = GET_ESID_1T(eaddr); 51 52 for (i = 0; i < vcpu->arch.slb_nr; i++) { 53 u64 cmp_esid = esid; 54 55 if (!vcpu->arch.slb[i].valid) 56 continue; 57 58 if (vcpu->arch.slb[i].tb) 59 cmp_esid = esid_1t; 60 61 if (vcpu->arch.slb[i].esid == cmp_esid) 62 return &vcpu->arch.slb[i]; 63 } 64 65 dprintk("KVM: No SLB entry found for 0x%lx [%llx | %llx]\n", 66 eaddr, esid, esid_1t); 67 for (i = 0; i < vcpu->arch.slb_nr; i++) { 68 if (vcpu->arch.slb[i].vsid) 69 dprintk(" %d: %c%c%c %llx %llx\n", i, 70 vcpu->arch.slb[i].valid ? 'v' : ' ', 71 vcpu->arch.slb[i].large ? 'l' : ' ', 72 vcpu->arch.slb[i].tb ? 't' : ' ', 73 vcpu->arch.slb[i].esid, 74 vcpu->arch.slb[i].vsid); 75 } 76 77 return NULL; 78 } 79 80 static int kvmppc_slb_sid_shift(struct kvmppc_slb *slbe) 81 { 82 return slbe->tb ? SID_SHIFT_1T : SID_SHIFT; 83 } 84 85 static u64 kvmppc_slb_offset_mask(struct kvmppc_slb *slbe) 86 { 87 return (1ul << kvmppc_slb_sid_shift(slbe)) - 1; 88 } 89 90 static u64 kvmppc_slb_calc_vpn(struct kvmppc_slb *slb, gva_t eaddr) 91 { 92 eaddr &= kvmppc_slb_offset_mask(slb); 93 94 return (eaddr >> VPN_SHIFT) | 95 ((slb->vsid) << (kvmppc_slb_sid_shift(slb) - VPN_SHIFT)); 96 } 97 98 static u64 kvmppc_mmu_book3s_64_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr, 99 bool data) 100 { 101 struct kvmppc_slb *slb; 102 103 slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr); 104 if (!slb) 105 return 0; 106 107 return kvmppc_slb_calc_vpn(slb, eaddr); 108 } 109 110 static int mmu_pagesize(int mmu_pg) 111 { 112 switch (mmu_pg) { 113 case MMU_PAGE_64K: 114 return 16; 115 case MMU_PAGE_16M: 116 return 24; 117 } 118 return 12; 119 } 120 121 static int kvmppc_mmu_book3s_64_get_pagesize(struct kvmppc_slb *slbe) 122 { 123 return mmu_pagesize(slbe->base_page_size); 124 } 125 126 static u32 kvmppc_mmu_book3s_64_get_page(struct kvmppc_slb *slbe, gva_t eaddr) 127 { 128 int p = kvmppc_mmu_book3s_64_get_pagesize(slbe); 129 130 return ((eaddr & kvmppc_slb_offset_mask(slbe)) >> p); 131 } 132 133 static hva_t kvmppc_mmu_book3s_64_get_pteg(struct kvm_vcpu *vcpu, 134 struct kvmppc_slb *slbe, gva_t eaddr, 135 bool second) 136 { 137 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); 138 u64 hash, pteg, htabsize; 139 u32 ssize; 140 hva_t r; 141 u64 vpn; 142 143 htabsize = ((1 << ((vcpu_book3s->sdr1 & 0x1f) + 11)) - 1); 144 145 vpn = kvmppc_slb_calc_vpn(slbe, eaddr); 146 ssize = slbe->tb ? MMU_SEGSIZE_1T : MMU_SEGSIZE_256M; 147 hash = hpt_hash(vpn, kvmppc_mmu_book3s_64_get_pagesize(slbe), ssize); 148 if (second) 149 hash = ~hash; 150 hash &= ((1ULL << 39ULL) - 1ULL); 151 hash &= htabsize; 152 hash <<= 7ULL; 153 154 pteg = vcpu_book3s->sdr1 & 0xfffffffffffc0000ULL; 155 pteg |= hash; 156 157 dprintk("MMU: page=0x%x sdr1=0x%llx pteg=0x%llx vsid=0x%llx\n", 158 page, vcpu_book3s->sdr1, pteg, slbe->vsid); 159 160 /* When running a PAPR guest, SDR1 contains a HVA address instead 161 of a GPA */ 162 if (vcpu->arch.papr_enabled) 163 r = pteg; 164 else 165 r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT); 166 167 if (kvm_is_error_hva(r)) 168 return r; 169 return r | (pteg & ~PAGE_MASK); 170 } 171 172 static u64 kvmppc_mmu_book3s_64_get_avpn(struct kvmppc_slb *slbe, gva_t eaddr) 173 { 174 int p = kvmppc_mmu_book3s_64_get_pagesize(slbe); 175 u64 avpn; 176 177 avpn = kvmppc_mmu_book3s_64_get_page(slbe, eaddr); 178 avpn |= slbe->vsid << (kvmppc_slb_sid_shift(slbe) - p); 179 180 if (p < 16) 181 avpn >>= ((80 - p) - 56) - 8; /* 16 - p */ 182 else 183 avpn <<= p - 16; 184 185 return avpn; 186 } 187 188 /* 189 * Return page size encoded in the second word of a HPTE, or 190 * -1 for an invalid encoding for the base page size indicated by 191 * the SLB entry. This doesn't handle mixed pagesize segments yet. 192 */ 193 static int decode_pagesize(struct kvmppc_slb *slbe, u64 r) 194 { 195 switch (slbe->base_page_size) { 196 case MMU_PAGE_64K: 197 if ((r & 0xf000) == 0x1000) 198 return MMU_PAGE_64K; 199 break; 200 case MMU_PAGE_16M: 201 if ((r & 0xff000) == 0) 202 return MMU_PAGE_16M; 203 break; 204 } 205 return -1; 206 } 207 208 static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr, 209 struct kvmppc_pte *gpte, bool data, 210 bool iswrite) 211 { 212 struct kvmppc_slb *slbe; 213 hva_t ptegp; 214 u64 pteg[16]; 215 u64 avpn = 0; 216 u64 v, r; 217 u64 v_val, v_mask; 218 u64 eaddr_mask; 219 int i; 220 u8 pp, key = 0; 221 bool found = false; 222 bool second = false; 223 int pgsize; 224 ulong mp_ea = vcpu->arch.magic_page_ea; 225 226 /* Magic page override */ 227 if (unlikely(mp_ea) && 228 unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) && 229 !(kvmppc_get_msr(vcpu) & MSR_PR)) { 230 gpte->eaddr = eaddr; 231 gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data); 232 gpte->raddr = vcpu->arch.magic_page_pa | (gpte->raddr & 0xfff); 233 gpte->raddr &= KVM_PAM; 234 gpte->may_execute = true; 235 gpte->may_read = true; 236 gpte->may_write = true; 237 gpte->page_size = MMU_PAGE_4K; 238 239 return 0; 240 } 241 242 slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, eaddr); 243 if (!slbe) 244 goto no_seg_found; 245 246 avpn = kvmppc_mmu_book3s_64_get_avpn(slbe, eaddr); 247 v_val = avpn & HPTE_V_AVPN; 248 249 if (slbe->tb) 250 v_val |= SLB_VSID_B_1T; 251 if (slbe->large) 252 v_val |= HPTE_V_LARGE; 253 v_val |= HPTE_V_VALID; 254 255 v_mask = SLB_VSID_B | HPTE_V_AVPN | HPTE_V_LARGE | HPTE_V_VALID | 256 HPTE_V_SECONDARY; 257 258 pgsize = slbe->large ? MMU_PAGE_16M : MMU_PAGE_4K; 259 260 mutex_lock(&vcpu->kvm->arch.hpt_mutex); 261 262 do_second: 263 ptegp = kvmppc_mmu_book3s_64_get_pteg(vcpu, slbe, eaddr, second); 264 if (kvm_is_error_hva(ptegp)) 265 goto no_page_found; 266 267 if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) { 268 printk_ratelimited(KERN_ERR 269 "KVM: Can't copy data from 0x%lx!\n", ptegp); 270 goto no_page_found; 271 } 272 273 if ((kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Kp) 274 key = 4; 275 else if (!(kvmppc_get_msr(vcpu) & MSR_PR) && slbe->Ks) 276 key = 4; 277 278 for (i=0; i<16; i+=2) { 279 u64 pte0 = be64_to_cpu(pteg[i]); 280 u64 pte1 = be64_to_cpu(pteg[i + 1]); 281 282 /* Check all relevant fields of 1st dword */ 283 if ((pte0 & v_mask) == v_val) { 284 /* If large page bit is set, check pgsize encoding */ 285 if (slbe->large && 286 (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE)) { 287 pgsize = decode_pagesize(slbe, pte1); 288 if (pgsize < 0) 289 continue; 290 } 291 found = true; 292 break; 293 } 294 } 295 296 if (!found) { 297 if (second) 298 goto no_page_found; 299 v_val |= HPTE_V_SECONDARY; 300 second = true; 301 goto do_second; 302 } 303 304 v = be64_to_cpu(pteg[i]); 305 r = be64_to_cpu(pteg[i+1]); 306 pp = (r & HPTE_R_PP) | key; 307 if (r & HPTE_R_PP0) 308 pp |= 8; 309 310 gpte->eaddr = eaddr; 311 gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data); 312 313 eaddr_mask = (1ull << mmu_pagesize(pgsize)) - 1; 314 gpte->raddr = (r & HPTE_R_RPN & ~eaddr_mask) | (eaddr & eaddr_mask); 315 gpte->page_size = pgsize; 316 gpte->may_execute = ((r & HPTE_R_N) ? false : true); 317 if (unlikely(vcpu->arch.disable_kernel_nx) && 318 !(kvmppc_get_msr(vcpu) & MSR_PR)) 319 gpte->may_execute = true; 320 gpte->may_read = false; 321 gpte->may_write = false; 322 323 switch (pp) { 324 case 0: 325 case 1: 326 case 2: 327 case 6: 328 gpte->may_write = true; 329 /* fall through */ 330 case 3: 331 case 5: 332 case 7: 333 case 10: 334 gpte->may_read = true; 335 break; 336 } 337 338 dprintk("KVM MMU: Translated 0x%lx [0x%llx] -> 0x%llx " 339 "-> 0x%lx\n", 340 eaddr, avpn, gpte->vpage, gpte->raddr); 341 342 /* Update PTE R and C bits, so the guest's swapper knows we used the 343 * page */ 344 if (gpte->may_read && !(r & HPTE_R_R)) { 345 /* 346 * Set the accessed flag. 347 * We have to write this back with a single byte write 348 * because another vcpu may be accessing this on 349 * non-PAPR platforms such as mac99, and this is 350 * what real hardware does. 351 */ 352 char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64)); 353 r |= HPTE_R_R; 354 put_user(r >> 8, addr + 6); 355 } 356 if (iswrite && gpte->may_write && !(r & HPTE_R_C)) { 357 /* Set the dirty flag */ 358 /* Use a single byte write */ 359 char __user *addr = (char __user *) (ptegp + (i + 1) * sizeof(u64)); 360 r |= HPTE_R_C; 361 put_user(r, addr + 7); 362 } 363 364 mutex_unlock(&vcpu->kvm->arch.hpt_mutex); 365 366 if (!gpte->may_read || (iswrite && !gpte->may_write)) 367 return -EPERM; 368 return 0; 369 370 no_page_found: 371 mutex_unlock(&vcpu->kvm->arch.hpt_mutex); 372 return -ENOENT; 373 374 no_seg_found: 375 dprintk("KVM MMU: Trigger segment fault\n"); 376 return -EINVAL; 377 } 378 379 static void kvmppc_mmu_book3s_64_slbmte(struct kvm_vcpu *vcpu, u64 rs, u64 rb) 380 { 381 u64 esid, esid_1t; 382 int slb_nr; 383 struct kvmppc_slb *slbe; 384 385 dprintk("KVM MMU: slbmte(0x%llx, 0x%llx)\n", rs, rb); 386 387 esid = GET_ESID(rb); 388 esid_1t = GET_ESID_1T(rb); 389 slb_nr = rb & 0xfff; 390 391 if (slb_nr > vcpu->arch.slb_nr) 392 return; 393 394 slbe = &vcpu->arch.slb[slb_nr]; 395 396 slbe->large = (rs & SLB_VSID_L) ? 1 : 0; 397 slbe->tb = (rs & SLB_VSID_B_1T) ? 1 : 0; 398 slbe->esid = slbe->tb ? esid_1t : esid; 399 slbe->vsid = (rs & ~SLB_VSID_B) >> (kvmppc_slb_sid_shift(slbe) - 16); 400 slbe->valid = (rb & SLB_ESID_V) ? 1 : 0; 401 slbe->Ks = (rs & SLB_VSID_KS) ? 1 : 0; 402 slbe->Kp = (rs & SLB_VSID_KP) ? 1 : 0; 403 slbe->nx = (rs & SLB_VSID_N) ? 1 : 0; 404 slbe->class = (rs & SLB_VSID_C) ? 1 : 0; 405 406 slbe->base_page_size = MMU_PAGE_4K; 407 if (slbe->large) { 408 if (vcpu->arch.hflags & BOOK3S_HFLAG_MULTI_PGSIZE) { 409 switch (rs & SLB_VSID_LP) { 410 case SLB_VSID_LP_00: 411 slbe->base_page_size = MMU_PAGE_16M; 412 break; 413 case SLB_VSID_LP_01: 414 slbe->base_page_size = MMU_PAGE_64K; 415 break; 416 } 417 } else 418 slbe->base_page_size = MMU_PAGE_16M; 419 } 420 421 slbe->orige = rb & (ESID_MASK | SLB_ESID_V); 422 slbe->origv = rs; 423 424 /* Map the new segment */ 425 kvmppc_mmu_map_segment(vcpu, esid << SID_SHIFT); 426 } 427 428 static u64 kvmppc_mmu_book3s_64_slbmfee(struct kvm_vcpu *vcpu, u64 slb_nr) 429 { 430 struct kvmppc_slb *slbe; 431 432 if (slb_nr > vcpu->arch.slb_nr) 433 return 0; 434 435 slbe = &vcpu->arch.slb[slb_nr]; 436 437 return slbe->orige; 438 } 439 440 static u64 kvmppc_mmu_book3s_64_slbmfev(struct kvm_vcpu *vcpu, u64 slb_nr) 441 { 442 struct kvmppc_slb *slbe; 443 444 if (slb_nr > vcpu->arch.slb_nr) 445 return 0; 446 447 slbe = &vcpu->arch.slb[slb_nr]; 448 449 return slbe->origv; 450 } 451 452 static void kvmppc_mmu_book3s_64_slbie(struct kvm_vcpu *vcpu, u64 ea) 453 { 454 struct kvmppc_slb *slbe; 455 u64 seg_size; 456 457 dprintk("KVM MMU: slbie(0x%llx)\n", ea); 458 459 slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea); 460 461 if (!slbe) 462 return; 463 464 dprintk("KVM MMU: slbie(0x%llx, 0x%llx)\n", ea, slbe->esid); 465 466 slbe->valid = false; 467 slbe->orige = 0; 468 slbe->origv = 0; 469 470 seg_size = 1ull << kvmppc_slb_sid_shift(slbe); 471 kvmppc_mmu_flush_segment(vcpu, ea & ~(seg_size - 1), seg_size); 472 } 473 474 static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu) 475 { 476 int i; 477 478 dprintk("KVM MMU: slbia()\n"); 479 480 for (i = 1; i < vcpu->arch.slb_nr; i++) { 481 vcpu->arch.slb[i].valid = false; 482 vcpu->arch.slb[i].orige = 0; 483 vcpu->arch.slb[i].origv = 0; 484 } 485 486 if (kvmppc_get_msr(vcpu) & MSR_IR) { 487 kvmppc_mmu_flush_segments(vcpu); 488 kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu)); 489 } 490 } 491 492 static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum, 493 ulong value) 494 { 495 u64 rb = 0, rs = 0; 496 497 /* 498 * According to Book3 2.01 mtsrin is implemented as: 499 * 500 * The SLB entry specified by (RB)32:35 is loaded from register 501 * RS, as follows. 502 * 503 * SLBE Bit Source SLB Field 504 * 505 * 0:31 0x0000_0000 ESID-0:31 506 * 32:35 (RB)32:35 ESID-32:35 507 * 36 0b1 V 508 * 37:61 0x00_0000|| 0b0 VSID-0:24 509 * 62:88 (RS)37:63 VSID-25:51 510 * 89:91 (RS)33:35 Ks Kp N 511 * 92 (RS)36 L ((RS)36 must be 0b0) 512 * 93 0b0 C 513 */ 514 515 dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value); 516 517 /* ESID = srnum */ 518 rb |= (srnum & 0xf) << 28; 519 /* Set the valid bit */ 520 rb |= 1 << 27; 521 /* Index = ESID */ 522 rb |= srnum; 523 524 /* VSID = VSID */ 525 rs |= (value & 0xfffffff) << 12; 526 /* flags = flags */ 527 rs |= ((value >> 28) & 0x7) << 9; 528 529 kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb); 530 } 531 532 static void kvmppc_mmu_book3s_64_tlbie(struct kvm_vcpu *vcpu, ulong va, 533 bool large) 534 { 535 u64 mask = 0xFFFFFFFFFULL; 536 long i; 537 struct kvm_vcpu *v; 538 539 dprintk("KVM MMU: tlbie(0x%lx)\n", va); 540 541 /* 542 * The tlbie instruction changed behaviour starting with 543 * POWER6. POWER6 and later don't have the large page flag 544 * in the instruction but in the RB value, along with bits 545 * indicating page and segment sizes. 546 */ 547 if (vcpu->arch.hflags & BOOK3S_HFLAG_NEW_TLBIE) { 548 /* POWER6 or later */ 549 if (va & 1) { /* L bit */ 550 if ((va & 0xf000) == 0x1000) 551 mask = 0xFFFFFFFF0ULL; /* 64k page */ 552 else 553 mask = 0xFFFFFF000ULL; /* 16M page */ 554 } 555 } else { 556 /* older processors, e.g. PPC970 */ 557 if (large) 558 mask = 0xFFFFFF000ULL; 559 } 560 /* flush this VA on all vcpus */ 561 kvm_for_each_vcpu(i, v, vcpu->kvm) 562 kvmppc_mmu_pte_vflush(v, va >> 12, mask); 563 } 564 565 #ifdef CONFIG_PPC_64K_PAGES 566 static int segment_contains_magic_page(struct kvm_vcpu *vcpu, ulong esid) 567 { 568 ulong mp_ea = vcpu->arch.magic_page_ea; 569 570 return mp_ea && !(kvmppc_get_msr(vcpu) & MSR_PR) && 571 (mp_ea >> SID_SHIFT) == esid; 572 } 573 #endif 574 575 static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid, 576 u64 *vsid) 577 { 578 ulong ea = esid << SID_SHIFT; 579 struct kvmppc_slb *slb; 580 u64 gvsid = esid; 581 ulong mp_ea = vcpu->arch.magic_page_ea; 582 int pagesize = MMU_PAGE_64K; 583 u64 msr = kvmppc_get_msr(vcpu); 584 585 if (msr & (MSR_DR|MSR_IR)) { 586 slb = kvmppc_mmu_book3s_64_find_slbe(vcpu, ea); 587 if (slb) { 588 gvsid = slb->vsid; 589 pagesize = slb->base_page_size; 590 if (slb->tb) { 591 gvsid <<= SID_SHIFT_1T - SID_SHIFT; 592 gvsid |= esid & ((1ul << (SID_SHIFT_1T - SID_SHIFT)) - 1); 593 gvsid |= VSID_1T; 594 } 595 } 596 } 597 598 switch (msr & (MSR_DR|MSR_IR)) { 599 case 0: 600 gvsid = VSID_REAL | esid; 601 break; 602 case MSR_IR: 603 gvsid |= VSID_REAL_IR; 604 break; 605 case MSR_DR: 606 gvsid |= VSID_REAL_DR; 607 break; 608 case MSR_DR|MSR_IR: 609 if (!slb) 610 goto no_slb; 611 612 break; 613 default: 614 BUG(); 615 break; 616 } 617 618 #ifdef CONFIG_PPC_64K_PAGES 619 /* 620 * Mark this as a 64k segment if the host is using 621 * 64k pages, the host MMU supports 64k pages and 622 * the guest segment page size is >= 64k, 623 * but not if this segment contains the magic page. 624 */ 625 if (pagesize >= MMU_PAGE_64K && 626 mmu_psize_defs[MMU_PAGE_64K].shift && 627 !segment_contains_magic_page(vcpu, esid)) 628 gvsid |= VSID_64K; 629 #endif 630 631 if (kvmppc_get_msr(vcpu) & MSR_PR) 632 gvsid |= VSID_PR; 633 634 *vsid = gvsid; 635 return 0; 636 637 no_slb: 638 /* Catch magic page case */ 639 if (unlikely(mp_ea) && 640 unlikely(esid == (mp_ea >> SID_SHIFT)) && 641 !(kvmppc_get_msr(vcpu) & MSR_PR)) { 642 *vsid = VSID_REAL | esid; 643 return 0; 644 } 645 646 return -EINVAL; 647 } 648 649 static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu) 650 { 651 return (to_book3s(vcpu)->hid[5] & 0x80); 652 } 653 654 void kvmppc_mmu_book3s_64_init(struct kvm_vcpu *vcpu) 655 { 656 struct kvmppc_mmu *mmu = &vcpu->arch.mmu; 657 658 mmu->mfsrin = NULL; 659 mmu->mtsrin = kvmppc_mmu_book3s_64_mtsrin; 660 mmu->slbmte = kvmppc_mmu_book3s_64_slbmte; 661 mmu->slbmfee = kvmppc_mmu_book3s_64_slbmfee; 662 mmu->slbmfev = kvmppc_mmu_book3s_64_slbmfev; 663 mmu->slbie = kvmppc_mmu_book3s_64_slbie; 664 mmu->slbia = kvmppc_mmu_book3s_64_slbia; 665 mmu->xlate = kvmppc_mmu_book3s_64_xlate; 666 mmu->reset_msr = kvmppc_mmu_book3s_64_reset_msr; 667 mmu->tlbie = kvmppc_mmu_book3s_64_tlbie; 668 mmu->esid_to_vsid = kvmppc_mmu_book3s_64_esid_to_vsid; 669 mmu->ea_to_vp = kvmppc_mmu_book3s_64_ea_to_vp; 670 mmu->is_dcbz32 = kvmppc_mmu_book3s_64_is_dcbz32; 671 672 vcpu->arch.hflags |= BOOK3S_HFLAG_SLB; 673 } 674