1 /* 2 * This program is free software; you can redistribute it and/or modify 3 * it under the terms of the GNU General Public License, version 2, as 4 * published by the Free Software Foundation. 5 * 6 * This program is distributed in the hope that it will be useful, 7 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * GNU General Public License for more details. 10 * 11 * You should have received a copy of the GNU General Public License 12 * along with this program; if not, write to the Free Software 13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. 14 * 15 * Copyright SUSE Linux Products GmbH 2009 16 * 17 * Authors: Alexander Graf <agraf@suse.de> 18 */ 19 20 #include <linux/types.h> 21 #include <linux/string.h> 22 #include <linux/kvm.h> 23 #include <linux/kvm_host.h> 24 #include <linux/highmem.h> 25 26 #include <asm/kvm_ppc.h> 27 #include <asm/kvm_book3s.h> 28 29 /* #define DEBUG_MMU */ 30 /* #define DEBUG_MMU_PTE */ 31 /* #define DEBUG_MMU_PTE_IP 0xfff14c40 */ 32 33 #ifdef DEBUG_MMU 34 #define dprintk(X...) printk(KERN_INFO X) 35 #else 36 #define dprintk(X...) do { } while(0) 37 #endif 38 39 #ifdef DEBUG_MMU_PTE 40 #define dprintk_pte(X...) printk(KERN_INFO X) 41 #else 42 #define dprintk_pte(X...) do { } while(0) 43 #endif 44 45 #define PTEG_FLAG_ACCESSED 0x00000100 46 #define PTEG_FLAG_DIRTY 0x00000080 47 #ifndef SID_SHIFT 48 #define SID_SHIFT 28 49 #endif 50 51 static inline bool check_debug_ip(struct kvm_vcpu *vcpu) 52 { 53 #ifdef DEBUG_MMU_PTE_IP 54 return vcpu->arch.regs.nip == DEBUG_MMU_PTE_IP; 55 #else 56 return true; 57 #endif 58 } 59 60 static inline u32 sr_vsid(u32 sr_raw) 61 { 62 return sr_raw & 0x0fffffff; 63 } 64 65 static inline bool sr_valid(u32 sr_raw) 66 { 67 return (sr_raw & 0x80000000) ? false : true; 68 } 69 70 static inline bool sr_ks(u32 sr_raw) 71 { 72 return (sr_raw & 0x40000000) ? true: false; 73 } 74 75 static inline bool sr_kp(u32 sr_raw) 76 { 77 return (sr_raw & 0x20000000) ? true: false; 78 } 79 80 static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr, 81 struct kvmppc_pte *pte, bool data, 82 bool iswrite); 83 static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid, 84 u64 *vsid); 85 86 static u32 find_sr(struct kvm_vcpu *vcpu, gva_t eaddr) 87 { 88 return kvmppc_get_sr(vcpu, (eaddr >> 28) & 0xf); 89 } 90 91 static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr, 92 bool data) 93 { 94 u64 vsid; 95 struct kvmppc_pte pte; 96 97 if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data, false)) 98 return pte.vpage; 99 100 kvmppc_mmu_book3s_32_esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid); 101 return (((u64)eaddr >> 12) & 0xffff) | (vsid << 16); 102 } 103 104 static void kvmppc_mmu_book3s_32_reset_msr(struct kvm_vcpu *vcpu) 105 { 106 kvmppc_set_msr(vcpu, 0); 107 } 108 109 static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvm_vcpu *vcpu, 110 u32 sre, gva_t eaddr, 111 bool primary) 112 { 113 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); 114 u32 page, hash, pteg, htabmask; 115 hva_t r; 116 117 page = (eaddr & 0x0FFFFFFF) >> 12; 118 htabmask = ((vcpu_book3s->sdr1 & 0x1FF) << 16) | 0xFFC0; 119 120 hash = ((sr_vsid(sre) ^ page) << 6); 121 if (!primary) 122 hash = ~hash; 123 hash &= htabmask; 124 125 pteg = (vcpu_book3s->sdr1 & 0xffff0000) | hash; 126 127 dprintk("MMU: pc=0x%lx eaddr=0x%lx sdr1=0x%llx pteg=0x%x vsid=0x%x\n", 128 kvmppc_get_pc(vcpu), eaddr, vcpu_book3s->sdr1, pteg, 129 sr_vsid(sre)); 130 131 r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT); 132 if (kvm_is_error_hva(r)) 133 return r; 134 return r | (pteg & ~PAGE_MASK); 135 } 136 137 static u32 kvmppc_mmu_book3s_32_get_ptem(u32 sre, gva_t eaddr, bool primary) 138 { 139 return ((eaddr & 0x0fffffff) >> 22) | (sr_vsid(sre) << 7) | 140 (primary ? 0 : 0x40) | 0x80000000; 141 } 142 143 static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr, 144 struct kvmppc_pte *pte, bool data, 145 bool iswrite) 146 { 147 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu); 148 struct kvmppc_bat *bat; 149 int i; 150 151 for (i = 0; i < 8; i++) { 152 if (data) 153 bat = &vcpu_book3s->dbat[i]; 154 else 155 bat = &vcpu_book3s->ibat[i]; 156 157 if (kvmppc_get_msr(vcpu) & MSR_PR) { 158 if (!bat->vp) 159 continue; 160 } else { 161 if (!bat->vs) 162 continue; 163 } 164 165 if (check_debug_ip(vcpu)) 166 { 167 dprintk_pte("%cBAT %02d: 0x%lx - 0x%x (0x%x)\n", 168 data ? 'd' : 'i', i, eaddr, bat->bepi, 169 bat->bepi_mask); 170 } 171 if ((eaddr & bat->bepi_mask) == bat->bepi) { 172 u64 vsid; 173 kvmppc_mmu_book3s_32_esid_to_vsid(vcpu, 174 eaddr >> SID_SHIFT, &vsid); 175 vsid <<= 16; 176 pte->vpage = (((u64)eaddr >> 12) & 0xffff) | vsid; 177 178 pte->raddr = bat->brpn | (eaddr & ~bat->bepi_mask); 179 pte->may_read = bat->pp; 180 pte->may_write = bat->pp > 1; 181 pte->may_execute = true; 182 if (!pte->may_read) { 183 printk(KERN_INFO "BAT is not readable!\n"); 184 continue; 185 } 186 if (iswrite && !pte->may_write) { 187 dprintk_pte("BAT is read-only!\n"); 188 continue; 189 } 190 191 return 0; 192 } 193 } 194 195 return -ENOENT; 196 } 197 198 static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr, 199 struct kvmppc_pte *pte, bool data, 200 bool iswrite, bool primary) 201 { 202 u32 sre; 203 hva_t ptegp; 204 u32 pteg[16]; 205 u32 pte0, pte1; 206 u32 ptem = 0; 207 int i; 208 int found = 0; 209 210 sre = find_sr(vcpu, eaddr); 211 212 dprintk_pte("SR 0x%lx: vsid=0x%x, raw=0x%x\n", eaddr >> 28, 213 sr_vsid(sre), sre); 214 215 pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data); 216 217 ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu, sre, eaddr, primary); 218 if (kvm_is_error_hva(ptegp)) { 219 printk(KERN_INFO "KVM: Invalid PTEG!\n"); 220 goto no_page_found; 221 } 222 223 ptem = kvmppc_mmu_book3s_32_get_ptem(sre, eaddr, primary); 224 225 if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) { 226 printk_ratelimited(KERN_ERR 227 "KVM: Can't copy data from 0x%lx!\n", ptegp); 228 goto no_page_found; 229 } 230 231 for (i=0; i<16; i+=2) { 232 pte0 = be32_to_cpu(pteg[i]); 233 pte1 = be32_to_cpu(pteg[i + 1]); 234 if (ptem == pte0) { 235 u8 pp; 236 237 pte->raddr = (pte1 & ~(0xFFFULL)) | (eaddr & 0xFFF); 238 pp = pte1 & 3; 239 240 if ((sr_kp(sre) && (kvmppc_get_msr(vcpu) & MSR_PR)) || 241 (sr_ks(sre) && !(kvmppc_get_msr(vcpu) & MSR_PR))) 242 pp |= 4; 243 244 pte->may_write = false; 245 pte->may_read = false; 246 pte->may_execute = true; 247 switch (pp) { 248 case 0: 249 case 1: 250 case 2: 251 case 6: 252 pte->may_write = true; 253 case 3: 254 case 5: 255 case 7: 256 pte->may_read = true; 257 break; 258 } 259 260 dprintk_pte("MMU: Found PTE -> %x %x - %x\n", 261 pte0, pte1, pp); 262 found = 1; 263 break; 264 } 265 } 266 267 /* Update PTE C and A bits, so the guest's swapper knows we used the 268 page */ 269 if (found) { 270 u32 pte_r = pte1; 271 char __user *addr = (char __user *) (ptegp + (i+1) * sizeof(u32)); 272 273 /* 274 * Use single-byte writes to update the HPTE, to 275 * conform to what real hardware does. 276 */ 277 if (pte->may_read && !(pte_r & PTEG_FLAG_ACCESSED)) { 278 pte_r |= PTEG_FLAG_ACCESSED; 279 put_user(pte_r >> 8, addr + 2); 280 } 281 if (iswrite && pte->may_write && !(pte_r & PTEG_FLAG_DIRTY)) { 282 pte_r |= PTEG_FLAG_DIRTY; 283 put_user(pte_r, addr + 3); 284 } 285 if (!pte->may_read || (iswrite && !pte->may_write)) 286 return -EPERM; 287 return 0; 288 } 289 290 no_page_found: 291 292 if (check_debug_ip(vcpu)) { 293 dprintk_pte("KVM MMU: No PTE found (sdr1=0x%llx ptegp=0x%lx)\n", 294 to_book3s(vcpu)->sdr1, ptegp); 295 for (i=0; i<16; i+=2) { 296 dprintk_pte(" %02d: 0x%x - 0x%x (0x%x)\n", 297 i, be32_to_cpu(pteg[i]), 298 be32_to_cpu(pteg[i+1]), ptem); 299 } 300 } 301 302 return -ENOENT; 303 } 304 305 static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr, 306 struct kvmppc_pte *pte, bool data, 307 bool iswrite) 308 { 309 int r; 310 ulong mp_ea = vcpu->arch.magic_page_ea; 311 312 pte->eaddr = eaddr; 313 pte->page_size = MMU_PAGE_4K; 314 315 /* Magic page override */ 316 if (unlikely(mp_ea) && 317 unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) && 318 !(kvmppc_get_msr(vcpu) & MSR_PR)) { 319 pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data); 320 pte->raddr = vcpu->arch.magic_page_pa | (pte->raddr & 0xfff); 321 pte->raddr &= KVM_PAM; 322 pte->may_execute = true; 323 pte->may_read = true; 324 pte->may_write = true; 325 326 return 0; 327 } 328 329 r = kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, pte, data, iswrite); 330 if (r < 0) 331 r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte, 332 data, iswrite, true); 333 if (r == -ENOENT) 334 r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte, 335 data, iswrite, false); 336 337 return r; 338 } 339 340 341 static u32 kvmppc_mmu_book3s_32_mfsrin(struct kvm_vcpu *vcpu, u32 srnum) 342 { 343 return kvmppc_get_sr(vcpu, srnum); 344 } 345 346 static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum, 347 ulong value) 348 { 349 kvmppc_set_sr(vcpu, srnum, value); 350 kvmppc_mmu_map_segment(vcpu, srnum << SID_SHIFT); 351 } 352 353 static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large) 354 { 355 int i; 356 struct kvm_vcpu *v; 357 358 /* flush this VA on all cpus */ 359 kvm_for_each_vcpu(i, v, vcpu->kvm) 360 kvmppc_mmu_pte_flush(v, ea, 0x0FFFF000); 361 } 362 363 static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid, 364 u64 *vsid) 365 { 366 ulong ea = esid << SID_SHIFT; 367 u32 sr; 368 u64 gvsid = esid; 369 u64 msr = kvmppc_get_msr(vcpu); 370 371 if (msr & (MSR_DR|MSR_IR)) { 372 sr = find_sr(vcpu, ea); 373 if (sr_valid(sr)) 374 gvsid = sr_vsid(sr); 375 } 376 377 /* In case we only have one of MSR_IR or MSR_DR set, let's put 378 that in the real-mode context (and hope RM doesn't access 379 high memory) */ 380 switch (msr & (MSR_DR|MSR_IR)) { 381 case 0: 382 *vsid = VSID_REAL | esid; 383 break; 384 case MSR_IR: 385 *vsid = VSID_REAL_IR | gvsid; 386 break; 387 case MSR_DR: 388 *vsid = VSID_REAL_DR | gvsid; 389 break; 390 case MSR_DR|MSR_IR: 391 if (sr_valid(sr)) 392 *vsid = sr_vsid(sr); 393 else 394 *vsid = VSID_BAT | gvsid; 395 break; 396 default: 397 BUG(); 398 } 399 400 if (msr & MSR_PR) 401 *vsid |= VSID_PR; 402 403 return 0; 404 } 405 406 static bool kvmppc_mmu_book3s_32_is_dcbz32(struct kvm_vcpu *vcpu) 407 { 408 return true; 409 } 410 411 412 void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu) 413 { 414 struct kvmppc_mmu *mmu = &vcpu->arch.mmu; 415 416 mmu->mtsrin = kvmppc_mmu_book3s_32_mtsrin; 417 mmu->mfsrin = kvmppc_mmu_book3s_32_mfsrin; 418 mmu->xlate = kvmppc_mmu_book3s_32_xlate; 419 mmu->reset_msr = kvmppc_mmu_book3s_32_reset_msr; 420 mmu->tlbie = kvmppc_mmu_book3s_32_tlbie; 421 mmu->esid_to_vsid = kvmppc_mmu_book3s_32_esid_to_vsid; 422 mmu->ea_to_vp = kvmppc_mmu_book3s_32_ea_to_vp; 423 mmu->is_dcbz32 = kvmppc_mmu_book3s_32_is_dcbz32; 424 425 mmu->slbmte = NULL; 426 mmu->slbmfee = NULL; 427 mmu->slbmfev = NULL; 428 mmu->slbie = NULL; 429 mmu->slbia = NULL; 430 } 431