1 /* 2 * Copyright (C) 2009. SUSE Linux Products GmbH. All rights reserved. 3 * 4 * Authors: 5 * Alexander Graf <agraf@suse.de> 6 * Kevin Wolf <mail@kevin-wolf.de> 7 * 8 * Description: 9 * This file is derived from arch/powerpc/kvm/44x.c, 10 * by Hollis Blanchard <hollisb@us.ibm.com>. 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License, version 2, as 14 * published by the Free Software Foundation. 15 */ 16 17 #include <linux/kvm_host.h> 18 #include <linux/err.h> 19 #include <linux/export.h> 20 #include <linux/slab.h> 21 #include <linux/module.h> 22 #include <linux/miscdevice.h> 23 #include <linux/gfp.h> 24 #include <linux/sched.h> 25 #include <linux/vmalloc.h> 26 #include <linux/highmem.h> 27 28 #include <asm/reg.h> 29 #include <asm/cputable.h> 30 #include <asm/cacheflush.h> 31 #include <asm/tlbflush.h> 32 #include <linux/uaccess.h> 33 #include <asm/io.h> 34 #include <asm/kvm_ppc.h> 35 #include <asm/kvm_book3s.h> 36 #include <asm/mmu_context.h> 37 #include <asm/page.h> 38 #include <asm/xive.h> 39 40 #include "book3s.h" 41 #include "trace.h" 42 43 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU 44 45 /* #define EXIT_DEBUG */ 46 47 struct kvm_stats_debugfs_item debugfs_entries[] = { 48 { "exits", VCPU_STAT(sum_exits) }, 49 { "mmio", VCPU_STAT(mmio_exits) }, 50 { "sig", VCPU_STAT(signal_exits) }, 51 { "sysc", VCPU_STAT(syscall_exits) }, 52 { "inst_emu", VCPU_STAT(emulated_inst_exits) }, 53 { "dec", VCPU_STAT(dec_exits) }, 54 { "ext_intr", VCPU_STAT(ext_intr_exits) }, 55 { "queue_intr", VCPU_STAT(queue_intr) }, 56 { "halt_poll_success_ns", VCPU_STAT(halt_poll_success_ns) }, 57 { "halt_poll_fail_ns", VCPU_STAT(halt_poll_fail_ns) }, 58 { "halt_wait_ns", VCPU_STAT(halt_wait_ns) }, 59 { "halt_successful_poll", VCPU_STAT(halt_successful_poll), }, 60 { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll), }, 61 { "halt_successful_wait", VCPU_STAT(halt_successful_wait) }, 62 { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) }, 63 { "halt_wakeup", VCPU_STAT(halt_wakeup) }, 64 { "pf_storage", VCPU_STAT(pf_storage) }, 65 { "sp_storage", VCPU_STAT(sp_storage) }, 66 { "pf_instruc", VCPU_STAT(pf_instruc) }, 67 { "sp_instruc", VCPU_STAT(sp_instruc) }, 68 { "ld", VCPU_STAT(ld) }, 69 { "ld_slow", VCPU_STAT(ld_slow) }, 70 { "st", VCPU_STAT(st) }, 71 { "st_slow", VCPU_STAT(st_slow) }, 72 { "pthru_all", VCPU_STAT(pthru_all) }, 73 { "pthru_host", VCPU_STAT(pthru_host) }, 74 { "pthru_bad_aff", VCPU_STAT(pthru_bad_aff) }, 75 { NULL } 76 }; 77 78 void kvmppc_unfixup_split_real(struct kvm_vcpu *vcpu) 79 { 80 if (vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) { 81 ulong pc = kvmppc_get_pc(vcpu); 82 if ((pc & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS) 83 kvmppc_set_pc(vcpu, pc & ~SPLIT_HACK_MASK); 84 vcpu->arch.hflags &= ~BOOK3S_HFLAG_SPLIT_HACK; 85 } 86 } 87 EXPORT_SYMBOL_GPL(kvmppc_unfixup_split_real); 88 89 static inline unsigned long kvmppc_interrupt_offset(struct kvm_vcpu *vcpu) 90 { 91 if (!is_kvmppc_hv_enabled(vcpu->kvm)) 92 return to_book3s(vcpu)->hior; 93 return 0; 94 } 95 96 static inline void kvmppc_update_int_pending(struct kvm_vcpu *vcpu, 97 unsigned long pending_now, unsigned long old_pending) 98 { 99 if (is_kvmppc_hv_enabled(vcpu->kvm)) 100 return; 101 if (pending_now) 102 kvmppc_set_int_pending(vcpu, 1); 103 else if (old_pending) 104 kvmppc_set_int_pending(vcpu, 0); 105 } 106 107 static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu) 108 { 109 ulong crit_raw; 110 ulong crit_r1; 111 bool crit; 112 113 if (is_kvmppc_hv_enabled(vcpu->kvm)) 114 return false; 115 116 crit_raw = kvmppc_get_critical(vcpu); 117 crit_r1 = kvmppc_get_gpr(vcpu, 1); 118 119 /* Truncate crit indicators in 32 bit mode */ 120 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) { 121 crit_raw &= 0xffffffff; 122 crit_r1 &= 0xffffffff; 123 } 124 125 /* Critical section when crit == r1 */ 126 crit = (crit_raw == crit_r1); 127 /* ... and we're in supervisor mode */ 128 crit = crit && !(kvmppc_get_msr(vcpu) & MSR_PR); 129 130 return crit; 131 } 132 133 void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags) 134 { 135 kvmppc_unfixup_split_real(vcpu); 136 kvmppc_set_srr0(vcpu, kvmppc_get_pc(vcpu)); 137 kvmppc_set_srr1(vcpu, kvmppc_get_msr(vcpu) | flags); 138 kvmppc_set_pc(vcpu, kvmppc_interrupt_offset(vcpu) + vec); 139 vcpu->arch.mmu.reset_msr(vcpu); 140 } 141 142 static int kvmppc_book3s_vec2irqprio(unsigned int vec) 143 { 144 unsigned int prio; 145 146 switch (vec) { 147 case 0x100: prio = BOOK3S_IRQPRIO_SYSTEM_RESET; break; 148 case 0x200: prio = BOOK3S_IRQPRIO_MACHINE_CHECK; break; 149 case 0x300: prio = BOOK3S_IRQPRIO_DATA_STORAGE; break; 150 case 0x380: prio = BOOK3S_IRQPRIO_DATA_SEGMENT; break; 151 case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE; break; 152 case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT; break; 153 case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL; break; 154 case 0x501: prio = BOOK3S_IRQPRIO_EXTERNAL_LEVEL; break; 155 case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT; break; 156 case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM; break; 157 case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL; break; 158 case 0x900: prio = BOOK3S_IRQPRIO_DECREMENTER; break; 159 case 0xc00: prio = BOOK3S_IRQPRIO_SYSCALL; break; 160 case 0xd00: prio = BOOK3S_IRQPRIO_DEBUG; break; 161 case 0xf20: prio = BOOK3S_IRQPRIO_ALTIVEC; break; 162 case 0xf40: prio = BOOK3S_IRQPRIO_VSX; break; 163 case 0xf60: prio = BOOK3S_IRQPRIO_FAC_UNAVAIL; break; 164 default: prio = BOOK3S_IRQPRIO_MAX; break; 165 } 166 167 return prio; 168 } 169 170 void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu, 171 unsigned int vec) 172 { 173 unsigned long old_pending = vcpu->arch.pending_exceptions; 174 175 clear_bit(kvmppc_book3s_vec2irqprio(vec), 176 &vcpu->arch.pending_exceptions); 177 178 kvmppc_update_int_pending(vcpu, vcpu->arch.pending_exceptions, 179 old_pending); 180 } 181 182 void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec) 183 { 184 vcpu->stat.queue_intr++; 185 186 set_bit(kvmppc_book3s_vec2irqprio(vec), 187 &vcpu->arch.pending_exceptions); 188 #ifdef EXIT_DEBUG 189 printk(KERN_INFO "Queueing interrupt %x\n", vec); 190 #endif 191 } 192 EXPORT_SYMBOL_GPL(kvmppc_book3s_queue_irqprio); 193 194 void kvmppc_core_queue_program(struct kvm_vcpu *vcpu, ulong flags) 195 { 196 /* might as well deliver this straight away */ 197 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_PROGRAM, flags); 198 } 199 EXPORT_SYMBOL_GPL(kvmppc_core_queue_program); 200 201 void kvmppc_core_queue_fpunavail(struct kvm_vcpu *vcpu) 202 { 203 /* might as well deliver this straight away */ 204 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, 0); 205 } 206 207 void kvmppc_core_queue_vec_unavail(struct kvm_vcpu *vcpu) 208 { 209 /* might as well deliver this straight away */ 210 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_ALTIVEC, 0); 211 } 212 213 void kvmppc_core_queue_vsx_unavail(struct kvm_vcpu *vcpu) 214 { 215 /* might as well deliver this straight away */ 216 kvmppc_inject_interrupt(vcpu, BOOK3S_INTERRUPT_VSX, 0); 217 } 218 219 void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) 220 { 221 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); 222 } 223 EXPORT_SYMBOL_GPL(kvmppc_core_queue_dec); 224 225 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) 226 { 227 return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions); 228 } 229 EXPORT_SYMBOL_GPL(kvmppc_core_pending_dec); 230 231 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu) 232 { 233 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_DECREMENTER); 234 } 235 EXPORT_SYMBOL_GPL(kvmppc_core_dequeue_dec); 236 237 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, 238 struct kvm_interrupt *irq) 239 { 240 unsigned int vec = BOOK3S_INTERRUPT_EXTERNAL; 241 242 if (irq->irq == KVM_INTERRUPT_SET_LEVEL) 243 vec = BOOK3S_INTERRUPT_EXTERNAL_LEVEL; 244 245 kvmppc_book3s_queue_irqprio(vcpu, vec); 246 } 247 248 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu) 249 { 250 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL); 251 kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL_LEVEL); 252 } 253 254 void kvmppc_core_queue_data_storage(struct kvm_vcpu *vcpu, ulong dar, 255 ulong flags) 256 { 257 kvmppc_set_dar(vcpu, dar); 258 kvmppc_set_dsisr(vcpu, flags); 259 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE); 260 } 261 EXPORT_SYMBOL_GPL(kvmppc_core_queue_data_storage); /* used by kvm_hv */ 262 263 void kvmppc_core_queue_inst_storage(struct kvm_vcpu *vcpu, ulong flags) 264 { 265 u64 msr = kvmppc_get_msr(vcpu); 266 msr &= ~(SRR1_ISI_NOPT | SRR1_ISI_N_OR_G | SRR1_ISI_PROT); 267 msr |= flags & (SRR1_ISI_NOPT | SRR1_ISI_N_OR_G | SRR1_ISI_PROT); 268 kvmppc_set_msr_fast(vcpu, msr); 269 kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE); 270 } 271 272 static int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, 273 unsigned int priority) 274 { 275 int deliver = 1; 276 int vec = 0; 277 bool crit = kvmppc_critical_section(vcpu); 278 279 switch (priority) { 280 case BOOK3S_IRQPRIO_DECREMENTER: 281 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; 282 vec = BOOK3S_INTERRUPT_DECREMENTER; 283 break; 284 case BOOK3S_IRQPRIO_EXTERNAL: 285 case BOOK3S_IRQPRIO_EXTERNAL_LEVEL: 286 deliver = (kvmppc_get_msr(vcpu) & MSR_EE) && !crit; 287 vec = BOOK3S_INTERRUPT_EXTERNAL; 288 break; 289 case BOOK3S_IRQPRIO_SYSTEM_RESET: 290 vec = BOOK3S_INTERRUPT_SYSTEM_RESET; 291 break; 292 case BOOK3S_IRQPRIO_MACHINE_CHECK: 293 vec = BOOK3S_INTERRUPT_MACHINE_CHECK; 294 break; 295 case BOOK3S_IRQPRIO_DATA_STORAGE: 296 vec = BOOK3S_INTERRUPT_DATA_STORAGE; 297 break; 298 case BOOK3S_IRQPRIO_INST_STORAGE: 299 vec = BOOK3S_INTERRUPT_INST_STORAGE; 300 break; 301 case BOOK3S_IRQPRIO_DATA_SEGMENT: 302 vec = BOOK3S_INTERRUPT_DATA_SEGMENT; 303 break; 304 case BOOK3S_IRQPRIO_INST_SEGMENT: 305 vec = BOOK3S_INTERRUPT_INST_SEGMENT; 306 break; 307 case BOOK3S_IRQPRIO_ALIGNMENT: 308 vec = BOOK3S_INTERRUPT_ALIGNMENT; 309 break; 310 case BOOK3S_IRQPRIO_PROGRAM: 311 vec = BOOK3S_INTERRUPT_PROGRAM; 312 break; 313 case BOOK3S_IRQPRIO_VSX: 314 vec = BOOK3S_INTERRUPT_VSX; 315 break; 316 case BOOK3S_IRQPRIO_ALTIVEC: 317 vec = BOOK3S_INTERRUPT_ALTIVEC; 318 break; 319 case BOOK3S_IRQPRIO_FP_UNAVAIL: 320 vec = BOOK3S_INTERRUPT_FP_UNAVAIL; 321 break; 322 case BOOK3S_IRQPRIO_SYSCALL: 323 vec = BOOK3S_INTERRUPT_SYSCALL; 324 break; 325 case BOOK3S_IRQPRIO_DEBUG: 326 vec = BOOK3S_INTERRUPT_TRACE; 327 break; 328 case BOOK3S_IRQPRIO_PERFORMANCE_MONITOR: 329 vec = BOOK3S_INTERRUPT_PERFMON; 330 break; 331 case BOOK3S_IRQPRIO_FAC_UNAVAIL: 332 vec = BOOK3S_INTERRUPT_FAC_UNAVAIL; 333 break; 334 default: 335 deliver = 0; 336 printk(KERN_ERR "KVM: Unknown interrupt: 0x%x\n", priority); 337 break; 338 } 339 340 #if 0 341 printk(KERN_INFO "Deliver interrupt 0x%x? %x\n", vec, deliver); 342 #endif 343 344 if (deliver) 345 kvmppc_inject_interrupt(vcpu, vec, 0); 346 347 return deliver; 348 } 349 350 /* 351 * This function determines if an irqprio should be cleared once issued. 352 */ 353 static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority) 354 { 355 switch (priority) { 356 case BOOK3S_IRQPRIO_DECREMENTER: 357 /* DEC interrupts get cleared by mtdec */ 358 return false; 359 case BOOK3S_IRQPRIO_EXTERNAL_LEVEL: 360 /* External interrupts get cleared by userspace */ 361 return false; 362 } 363 364 return true; 365 } 366 367 int kvmppc_core_prepare_to_enter(struct kvm_vcpu *vcpu) 368 { 369 unsigned long *pending = &vcpu->arch.pending_exceptions; 370 unsigned long old_pending = vcpu->arch.pending_exceptions; 371 unsigned int priority; 372 373 #ifdef EXIT_DEBUG 374 if (vcpu->arch.pending_exceptions) 375 printk(KERN_EMERG "KVM: Check pending: %lx\n", vcpu->arch.pending_exceptions); 376 #endif 377 priority = __ffs(*pending); 378 while (priority < BOOK3S_IRQPRIO_MAX) { 379 if (kvmppc_book3s_irqprio_deliver(vcpu, priority) && 380 clear_irqprio(vcpu, priority)) { 381 clear_bit(priority, &vcpu->arch.pending_exceptions); 382 break; 383 } 384 385 priority = find_next_bit(pending, 386 BITS_PER_BYTE * sizeof(*pending), 387 priority + 1); 388 } 389 390 /* Tell the guest about our interrupt status */ 391 kvmppc_update_int_pending(vcpu, *pending, old_pending); 392 393 return 0; 394 } 395 EXPORT_SYMBOL_GPL(kvmppc_core_prepare_to_enter); 396 397 kvm_pfn_t kvmppc_gpa_to_pfn(struct kvm_vcpu *vcpu, gpa_t gpa, bool writing, 398 bool *writable) 399 { 400 ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM; 401 gfn_t gfn = gpa >> PAGE_SHIFT; 402 403 if (!(kvmppc_get_msr(vcpu) & MSR_SF)) 404 mp_pa = (uint32_t)mp_pa; 405 406 /* Magic page override */ 407 gpa &= ~0xFFFULL; 408 if (unlikely(mp_pa) && unlikely((gpa & KVM_PAM) == mp_pa)) { 409 ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK; 410 kvm_pfn_t pfn; 411 412 pfn = (kvm_pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT; 413 get_page(pfn_to_page(pfn)); 414 if (writable) 415 *writable = true; 416 return pfn; 417 } 418 419 return gfn_to_pfn_prot(vcpu->kvm, gfn, writing, writable); 420 } 421 EXPORT_SYMBOL_GPL(kvmppc_gpa_to_pfn); 422 423 int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, enum xlate_instdata xlid, 424 enum xlate_readwrite xlrw, struct kvmppc_pte *pte) 425 { 426 bool data = (xlid == XLATE_DATA); 427 bool iswrite = (xlrw == XLATE_WRITE); 428 int relocated = (kvmppc_get_msr(vcpu) & (data ? MSR_DR : MSR_IR)); 429 int r; 430 431 if (relocated) { 432 r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data, iswrite); 433 } else { 434 pte->eaddr = eaddr; 435 pte->raddr = eaddr & KVM_PAM; 436 pte->vpage = VSID_REAL | eaddr >> 12; 437 pte->may_read = true; 438 pte->may_write = true; 439 pte->may_execute = true; 440 r = 0; 441 442 if ((kvmppc_get_msr(vcpu) & (MSR_IR | MSR_DR)) == MSR_DR && 443 !data) { 444 if ((vcpu->arch.hflags & BOOK3S_HFLAG_SPLIT_HACK) && 445 ((eaddr & SPLIT_HACK_MASK) == SPLIT_HACK_OFFS)) 446 pte->raddr &= ~SPLIT_HACK_MASK; 447 } 448 } 449 450 return r; 451 } 452 453 int kvmppc_load_last_inst(struct kvm_vcpu *vcpu, enum instruction_type type, 454 u32 *inst) 455 { 456 ulong pc = kvmppc_get_pc(vcpu); 457 int r; 458 459 if (type == INST_SC) 460 pc -= 4; 461 462 r = kvmppc_ld(vcpu, &pc, sizeof(u32), inst, false); 463 if (r == EMULATE_DONE) 464 return r; 465 else 466 return EMULATE_AGAIN; 467 } 468 EXPORT_SYMBOL_GPL(kvmppc_load_last_inst); 469 470 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) 471 { 472 return 0; 473 } 474 475 int kvmppc_subarch_vcpu_init(struct kvm_vcpu *vcpu) 476 { 477 return 0; 478 } 479 480 void kvmppc_subarch_vcpu_uninit(struct kvm_vcpu *vcpu) 481 { 482 } 483 484 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, 485 struct kvm_sregs *sregs) 486 { 487 int ret; 488 489 vcpu_load(vcpu); 490 ret = vcpu->kvm->arch.kvm_ops->get_sregs(vcpu, sregs); 491 vcpu_put(vcpu); 492 493 return ret; 494 } 495 496 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, 497 struct kvm_sregs *sregs) 498 { 499 int ret; 500 501 vcpu_load(vcpu); 502 ret = vcpu->kvm->arch.kvm_ops->set_sregs(vcpu, sregs); 503 vcpu_put(vcpu); 504 505 return ret; 506 } 507 508 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 509 { 510 int i; 511 512 vcpu_load(vcpu); 513 514 regs->pc = kvmppc_get_pc(vcpu); 515 regs->cr = kvmppc_get_cr(vcpu); 516 regs->ctr = kvmppc_get_ctr(vcpu); 517 regs->lr = kvmppc_get_lr(vcpu); 518 regs->xer = kvmppc_get_xer(vcpu); 519 regs->msr = kvmppc_get_msr(vcpu); 520 regs->srr0 = kvmppc_get_srr0(vcpu); 521 regs->srr1 = kvmppc_get_srr1(vcpu); 522 regs->pid = vcpu->arch.pid; 523 regs->sprg0 = kvmppc_get_sprg0(vcpu); 524 regs->sprg1 = kvmppc_get_sprg1(vcpu); 525 regs->sprg2 = kvmppc_get_sprg2(vcpu); 526 regs->sprg3 = kvmppc_get_sprg3(vcpu); 527 regs->sprg4 = kvmppc_get_sprg4(vcpu); 528 regs->sprg5 = kvmppc_get_sprg5(vcpu); 529 regs->sprg6 = kvmppc_get_sprg6(vcpu); 530 regs->sprg7 = kvmppc_get_sprg7(vcpu); 531 532 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 533 regs->gpr[i] = kvmppc_get_gpr(vcpu, i); 534 535 vcpu_put(vcpu); 536 return 0; 537 } 538 539 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) 540 { 541 int i; 542 543 vcpu_load(vcpu); 544 545 kvmppc_set_pc(vcpu, regs->pc); 546 kvmppc_set_cr(vcpu, regs->cr); 547 kvmppc_set_ctr(vcpu, regs->ctr); 548 kvmppc_set_lr(vcpu, regs->lr); 549 kvmppc_set_xer(vcpu, regs->xer); 550 kvmppc_set_msr(vcpu, regs->msr); 551 kvmppc_set_srr0(vcpu, regs->srr0); 552 kvmppc_set_srr1(vcpu, regs->srr1); 553 kvmppc_set_sprg0(vcpu, regs->sprg0); 554 kvmppc_set_sprg1(vcpu, regs->sprg1); 555 kvmppc_set_sprg2(vcpu, regs->sprg2); 556 kvmppc_set_sprg3(vcpu, regs->sprg3); 557 kvmppc_set_sprg4(vcpu, regs->sprg4); 558 kvmppc_set_sprg5(vcpu, regs->sprg5); 559 kvmppc_set_sprg6(vcpu, regs->sprg6); 560 kvmppc_set_sprg7(vcpu, regs->sprg7); 561 562 for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) 563 kvmppc_set_gpr(vcpu, i, regs->gpr[i]); 564 565 vcpu_put(vcpu); 566 return 0; 567 } 568 569 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 570 { 571 return -ENOTSUPP; 572 } 573 574 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) 575 { 576 return -ENOTSUPP; 577 } 578 579 int kvmppc_get_one_reg(struct kvm_vcpu *vcpu, u64 id, 580 union kvmppc_one_reg *val) 581 { 582 int r = 0; 583 long int i; 584 585 r = vcpu->kvm->arch.kvm_ops->get_one_reg(vcpu, id, val); 586 if (r == -EINVAL) { 587 r = 0; 588 switch (id) { 589 case KVM_REG_PPC_DAR: 590 *val = get_reg_val(id, kvmppc_get_dar(vcpu)); 591 break; 592 case KVM_REG_PPC_DSISR: 593 *val = get_reg_val(id, kvmppc_get_dsisr(vcpu)); 594 break; 595 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: 596 i = id - KVM_REG_PPC_FPR0; 597 *val = get_reg_val(id, VCPU_FPR(vcpu, i)); 598 break; 599 case KVM_REG_PPC_FPSCR: 600 *val = get_reg_val(id, vcpu->arch.fp.fpscr); 601 break; 602 #ifdef CONFIG_VSX 603 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: 604 if (cpu_has_feature(CPU_FTR_VSX)) { 605 i = id - KVM_REG_PPC_VSR0; 606 val->vsxval[0] = vcpu->arch.fp.fpr[i][0]; 607 val->vsxval[1] = vcpu->arch.fp.fpr[i][1]; 608 } else { 609 r = -ENXIO; 610 } 611 break; 612 #endif /* CONFIG_VSX */ 613 case KVM_REG_PPC_DEBUG_INST: 614 *val = get_reg_val(id, INS_TW); 615 break; 616 #ifdef CONFIG_KVM_XICS 617 case KVM_REG_PPC_ICP_STATE: 618 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) { 619 r = -ENXIO; 620 break; 621 } 622 if (xive_enabled()) 623 *val = get_reg_val(id, kvmppc_xive_get_icp(vcpu)); 624 else 625 *val = get_reg_val(id, kvmppc_xics_get_icp(vcpu)); 626 break; 627 #endif /* CONFIG_KVM_XICS */ 628 case KVM_REG_PPC_FSCR: 629 *val = get_reg_val(id, vcpu->arch.fscr); 630 break; 631 case KVM_REG_PPC_TAR: 632 *val = get_reg_val(id, vcpu->arch.tar); 633 break; 634 case KVM_REG_PPC_EBBHR: 635 *val = get_reg_val(id, vcpu->arch.ebbhr); 636 break; 637 case KVM_REG_PPC_EBBRR: 638 *val = get_reg_val(id, vcpu->arch.ebbrr); 639 break; 640 case KVM_REG_PPC_BESCR: 641 *val = get_reg_val(id, vcpu->arch.bescr); 642 break; 643 case KVM_REG_PPC_IC: 644 *val = get_reg_val(id, vcpu->arch.ic); 645 break; 646 default: 647 r = -EINVAL; 648 break; 649 } 650 } 651 652 return r; 653 } 654 655 int kvmppc_set_one_reg(struct kvm_vcpu *vcpu, u64 id, 656 union kvmppc_one_reg *val) 657 { 658 int r = 0; 659 long int i; 660 661 r = vcpu->kvm->arch.kvm_ops->set_one_reg(vcpu, id, val); 662 if (r == -EINVAL) { 663 r = 0; 664 switch (id) { 665 case KVM_REG_PPC_DAR: 666 kvmppc_set_dar(vcpu, set_reg_val(id, *val)); 667 break; 668 case KVM_REG_PPC_DSISR: 669 kvmppc_set_dsisr(vcpu, set_reg_val(id, *val)); 670 break; 671 case KVM_REG_PPC_FPR0 ... KVM_REG_PPC_FPR31: 672 i = id - KVM_REG_PPC_FPR0; 673 VCPU_FPR(vcpu, i) = set_reg_val(id, *val); 674 break; 675 case KVM_REG_PPC_FPSCR: 676 vcpu->arch.fp.fpscr = set_reg_val(id, *val); 677 break; 678 #ifdef CONFIG_VSX 679 case KVM_REG_PPC_VSR0 ... KVM_REG_PPC_VSR31: 680 if (cpu_has_feature(CPU_FTR_VSX)) { 681 i = id - KVM_REG_PPC_VSR0; 682 vcpu->arch.fp.fpr[i][0] = val->vsxval[0]; 683 vcpu->arch.fp.fpr[i][1] = val->vsxval[1]; 684 } else { 685 r = -ENXIO; 686 } 687 break; 688 #endif /* CONFIG_VSX */ 689 #ifdef CONFIG_KVM_XICS 690 case KVM_REG_PPC_ICP_STATE: 691 if (!vcpu->arch.icp && !vcpu->arch.xive_vcpu) { 692 r = -ENXIO; 693 break; 694 } 695 if (xive_enabled()) 696 r = kvmppc_xive_set_icp(vcpu, set_reg_val(id, *val)); 697 else 698 r = kvmppc_xics_set_icp(vcpu, set_reg_val(id, *val)); 699 break; 700 #endif /* CONFIG_KVM_XICS */ 701 case KVM_REG_PPC_FSCR: 702 vcpu->arch.fscr = set_reg_val(id, *val); 703 break; 704 case KVM_REG_PPC_TAR: 705 vcpu->arch.tar = set_reg_val(id, *val); 706 break; 707 case KVM_REG_PPC_EBBHR: 708 vcpu->arch.ebbhr = set_reg_val(id, *val); 709 break; 710 case KVM_REG_PPC_EBBRR: 711 vcpu->arch.ebbrr = set_reg_val(id, *val); 712 break; 713 case KVM_REG_PPC_BESCR: 714 vcpu->arch.bescr = set_reg_val(id, *val); 715 break; 716 case KVM_REG_PPC_IC: 717 vcpu->arch.ic = set_reg_val(id, *val); 718 break; 719 default: 720 r = -EINVAL; 721 break; 722 } 723 } 724 725 return r; 726 } 727 728 void kvmppc_core_vcpu_load(struct kvm_vcpu *vcpu, int cpu) 729 { 730 vcpu->kvm->arch.kvm_ops->vcpu_load(vcpu, cpu); 731 } 732 733 void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu) 734 { 735 vcpu->kvm->arch.kvm_ops->vcpu_put(vcpu); 736 } 737 738 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr) 739 { 740 vcpu->kvm->arch.kvm_ops->set_msr(vcpu, msr); 741 } 742 EXPORT_SYMBOL_GPL(kvmppc_set_msr); 743 744 int kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu) 745 { 746 return vcpu->kvm->arch.kvm_ops->vcpu_run(kvm_run, vcpu); 747 } 748 749 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, 750 struct kvm_translation *tr) 751 { 752 return 0; 753 } 754 755 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu, 756 struct kvm_guest_debug *dbg) 757 { 758 vcpu_load(vcpu); 759 vcpu->guest_debug = dbg->control; 760 vcpu_put(vcpu); 761 return 0; 762 } 763 764 void kvmppc_decrementer_func(struct kvm_vcpu *vcpu) 765 { 766 kvmppc_core_queue_dec(vcpu); 767 kvm_vcpu_kick(vcpu); 768 } 769 770 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id) 771 { 772 return kvm->arch.kvm_ops->vcpu_create(kvm, id); 773 } 774 775 void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu) 776 { 777 vcpu->kvm->arch.kvm_ops->vcpu_free(vcpu); 778 } 779 780 int kvmppc_core_check_requests(struct kvm_vcpu *vcpu) 781 { 782 return vcpu->kvm->arch.kvm_ops->check_requests(vcpu); 783 } 784 785 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log) 786 { 787 return kvm->arch.kvm_ops->get_dirty_log(kvm, log); 788 } 789 790 void kvmppc_core_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, 791 struct kvm_memory_slot *dont) 792 { 793 kvm->arch.kvm_ops->free_memslot(free, dont); 794 } 795 796 int kvmppc_core_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, 797 unsigned long npages) 798 { 799 return kvm->arch.kvm_ops->create_memslot(slot, npages); 800 } 801 802 void kvmppc_core_flush_memslot(struct kvm *kvm, struct kvm_memory_slot *memslot) 803 { 804 kvm->arch.kvm_ops->flush_memslot(kvm, memslot); 805 } 806 807 int kvmppc_core_prepare_memory_region(struct kvm *kvm, 808 struct kvm_memory_slot *memslot, 809 const struct kvm_userspace_memory_region *mem) 810 { 811 return kvm->arch.kvm_ops->prepare_memory_region(kvm, memslot, mem); 812 } 813 814 void kvmppc_core_commit_memory_region(struct kvm *kvm, 815 const struct kvm_userspace_memory_region *mem, 816 const struct kvm_memory_slot *old, 817 const struct kvm_memory_slot *new) 818 { 819 kvm->arch.kvm_ops->commit_memory_region(kvm, mem, old, new); 820 } 821 822 int kvm_unmap_hva(struct kvm *kvm, unsigned long hva) 823 { 824 return kvm->arch.kvm_ops->unmap_hva(kvm, hva); 825 } 826 EXPORT_SYMBOL_GPL(kvm_unmap_hva); 827 828 int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end) 829 { 830 return kvm->arch.kvm_ops->unmap_hva_range(kvm, start, end); 831 } 832 833 int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end) 834 { 835 return kvm->arch.kvm_ops->age_hva(kvm, start, end); 836 } 837 838 int kvm_test_age_hva(struct kvm *kvm, unsigned long hva) 839 { 840 return kvm->arch.kvm_ops->test_age_hva(kvm, hva); 841 } 842 843 void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte) 844 { 845 kvm->arch.kvm_ops->set_spte_hva(kvm, hva, pte); 846 } 847 848 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu) 849 { 850 vcpu->kvm->arch.kvm_ops->mmu_destroy(vcpu); 851 } 852 853 int kvmppc_core_init_vm(struct kvm *kvm) 854 { 855 856 #ifdef CONFIG_PPC64 857 INIT_LIST_HEAD_RCU(&kvm->arch.spapr_tce_tables); 858 INIT_LIST_HEAD(&kvm->arch.rtas_tokens); 859 #endif 860 861 return kvm->arch.kvm_ops->init_vm(kvm); 862 } 863 864 void kvmppc_core_destroy_vm(struct kvm *kvm) 865 { 866 kvm->arch.kvm_ops->destroy_vm(kvm); 867 868 #ifdef CONFIG_PPC64 869 kvmppc_rtas_tokens_free(kvm); 870 WARN_ON(!list_empty(&kvm->arch.spapr_tce_tables)); 871 #endif 872 } 873 874 int kvmppc_h_logical_ci_load(struct kvm_vcpu *vcpu) 875 { 876 unsigned long size = kvmppc_get_gpr(vcpu, 4); 877 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 878 u64 buf; 879 int srcu_idx; 880 int ret; 881 882 if (!is_power_of_2(size) || (size > sizeof(buf))) 883 return H_TOO_HARD; 884 885 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 886 ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, size, &buf); 887 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 888 if (ret != 0) 889 return H_TOO_HARD; 890 891 switch (size) { 892 case 1: 893 kvmppc_set_gpr(vcpu, 4, *(u8 *)&buf); 894 break; 895 896 case 2: 897 kvmppc_set_gpr(vcpu, 4, be16_to_cpu(*(__be16 *)&buf)); 898 break; 899 900 case 4: 901 kvmppc_set_gpr(vcpu, 4, be32_to_cpu(*(__be32 *)&buf)); 902 break; 903 904 case 8: 905 kvmppc_set_gpr(vcpu, 4, be64_to_cpu(*(__be64 *)&buf)); 906 break; 907 908 default: 909 BUG(); 910 } 911 912 return H_SUCCESS; 913 } 914 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_load); 915 916 int kvmppc_h_logical_ci_store(struct kvm_vcpu *vcpu) 917 { 918 unsigned long size = kvmppc_get_gpr(vcpu, 4); 919 unsigned long addr = kvmppc_get_gpr(vcpu, 5); 920 unsigned long val = kvmppc_get_gpr(vcpu, 6); 921 u64 buf; 922 int srcu_idx; 923 int ret; 924 925 switch (size) { 926 case 1: 927 *(u8 *)&buf = val; 928 break; 929 930 case 2: 931 *(__be16 *)&buf = cpu_to_be16(val); 932 break; 933 934 case 4: 935 *(__be32 *)&buf = cpu_to_be32(val); 936 break; 937 938 case 8: 939 *(__be64 *)&buf = cpu_to_be64(val); 940 break; 941 942 default: 943 return H_TOO_HARD; 944 } 945 946 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu); 947 ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, size, &buf); 948 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx); 949 if (ret != 0) 950 return H_TOO_HARD; 951 952 return H_SUCCESS; 953 } 954 EXPORT_SYMBOL_GPL(kvmppc_h_logical_ci_store); 955 956 int kvmppc_core_check_processor_compat(void) 957 { 958 /* 959 * We always return 0 for book3s. We check 960 * for compatibility while loading the HV 961 * or PR module 962 */ 963 return 0; 964 } 965 966 int kvmppc_book3s_hcall_implemented(struct kvm *kvm, unsigned long hcall) 967 { 968 return kvm->arch.kvm_ops->hcall_implemented(hcall); 969 } 970 971 #ifdef CONFIG_KVM_XICS 972 int kvm_set_irq(struct kvm *kvm, int irq_source_id, u32 irq, int level, 973 bool line_status) 974 { 975 if (xive_enabled()) 976 return kvmppc_xive_set_irq(kvm, irq_source_id, irq, level, 977 line_status); 978 else 979 return kvmppc_xics_set_irq(kvm, irq_source_id, irq, level, 980 line_status); 981 } 982 983 int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *irq_entry, 984 struct kvm *kvm, int irq_source_id, 985 int level, bool line_status) 986 { 987 return kvm_set_irq(kvm, irq_source_id, irq_entry->gsi, 988 level, line_status); 989 } 990 static int kvmppc_book3s_set_irq(struct kvm_kernel_irq_routing_entry *e, 991 struct kvm *kvm, int irq_source_id, int level, 992 bool line_status) 993 { 994 return kvm_set_irq(kvm, irq_source_id, e->gsi, level, line_status); 995 } 996 997 int kvm_irq_map_gsi(struct kvm *kvm, 998 struct kvm_kernel_irq_routing_entry *entries, int gsi) 999 { 1000 entries->gsi = gsi; 1001 entries->type = KVM_IRQ_ROUTING_IRQCHIP; 1002 entries->set = kvmppc_book3s_set_irq; 1003 entries->irqchip.irqchip = 0; 1004 entries->irqchip.pin = gsi; 1005 return 1; 1006 } 1007 1008 int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin) 1009 { 1010 return pin; 1011 } 1012 1013 #endif /* CONFIG_KVM_XICS */ 1014 1015 static int kvmppc_book3s_init(void) 1016 { 1017 int r; 1018 1019 r = kvm_init(NULL, sizeof(struct kvm_vcpu), 0, THIS_MODULE); 1020 if (r) 1021 return r; 1022 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1023 r = kvmppc_book3s_init_pr(); 1024 #endif 1025 1026 #ifdef CONFIG_KVM_XICS 1027 #ifdef CONFIG_KVM_XIVE 1028 if (xive_enabled()) { 1029 kvmppc_xive_init_module(); 1030 kvm_register_device_ops(&kvm_xive_ops, KVM_DEV_TYPE_XICS); 1031 } else 1032 #endif 1033 kvm_register_device_ops(&kvm_xics_ops, KVM_DEV_TYPE_XICS); 1034 #endif 1035 return r; 1036 } 1037 1038 static void kvmppc_book3s_exit(void) 1039 { 1040 #ifdef CONFIG_KVM_XICS 1041 if (xive_enabled()) 1042 kvmppc_xive_exit_module(); 1043 #endif 1044 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1045 kvmppc_book3s_exit_pr(); 1046 #endif 1047 kvm_exit(); 1048 } 1049 1050 module_init(kvmppc_book3s_init); 1051 module_exit(kvmppc_book3s_exit); 1052 1053 /* On 32bit this is our one and only kernel module */ 1054 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER 1055 MODULE_ALIAS_MISCDEV(KVM_MINOR); 1056 MODULE_ALIAS("devname:kvm"); 1057 #endif 1058