1 /* 2 * 3 * Common boot and setup code. 4 * 5 * Copyright (C) 2001 PPC64 Team, IBM Corp 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #undef DEBUG 14 15 #include <linux/module.h> 16 #include <linux/string.h> 17 #include <linux/sched.h> 18 #include <linux/init.h> 19 #include <linux/kernel.h> 20 #include <linux/reboot.h> 21 #include <linux/delay.h> 22 #include <linux/initrd.h> 23 #include <linux/seq_file.h> 24 #include <linux/ioport.h> 25 #include <linux/console.h> 26 #include <linux/utsname.h> 27 #include <linux/tty.h> 28 #include <linux/root_dev.h> 29 #include <linux/notifier.h> 30 #include <linux/cpu.h> 31 #include <linux/unistd.h> 32 #include <linux/serial.h> 33 #include <linux/serial_8250.h> 34 #include <linux/bootmem.h> 35 #include <linux/pci.h> 36 #include <linux/lockdep.h> 37 #include <linux/lmb.h> 38 #include <asm/io.h> 39 #include <asm/kdump.h> 40 #include <asm/prom.h> 41 #include <asm/processor.h> 42 #include <asm/pgtable.h> 43 #include <asm/smp.h> 44 #include <asm/elf.h> 45 #include <asm/machdep.h> 46 #include <asm/paca.h> 47 #include <asm/time.h> 48 #include <asm/cputable.h> 49 #include <asm/sections.h> 50 #include <asm/btext.h> 51 #include <asm/nvram.h> 52 #include <asm/setup.h> 53 #include <asm/system.h> 54 #include <asm/rtas.h> 55 #include <asm/iommu.h> 56 #include <asm/serial.h> 57 #include <asm/cache.h> 58 #include <asm/page.h> 59 #include <asm/mmu.h> 60 #include <asm/firmware.h> 61 #include <asm/xmon.h> 62 #include <asm/udbg.h> 63 #include <asm/kexec.h> 64 #include <asm/swiotlb.h> 65 #include <asm/mmu_context.h> 66 67 #include "setup.h" 68 69 #ifdef DEBUG 70 #define DBG(fmt...) udbg_printf(fmt) 71 #else 72 #define DBG(fmt...) 73 #endif 74 75 int boot_cpuid = 0; 76 u64 ppc64_pft_size; 77 78 /* Pick defaults since we might want to patch instructions 79 * before we've read this from the device tree. 80 */ 81 struct ppc64_caches ppc64_caches = { 82 .dline_size = 0x40, 83 .log_dline_size = 6, 84 .iline_size = 0x40, 85 .log_iline_size = 6 86 }; 87 EXPORT_SYMBOL_GPL(ppc64_caches); 88 89 /* 90 * These are used in binfmt_elf.c to put aux entries on the stack 91 * for each elf executable being started. 92 */ 93 int dcache_bsize; 94 int icache_bsize; 95 int ucache_bsize; 96 97 #ifdef CONFIG_SMP 98 99 static int smt_enabled_cmdline; 100 101 /* Look for ibm,smt-enabled OF option */ 102 static void check_smt_enabled(void) 103 { 104 struct device_node *dn; 105 const char *smt_option; 106 107 /* Allow the command line to overrule the OF option */ 108 if (smt_enabled_cmdline) 109 return; 110 111 dn = of_find_node_by_path("/options"); 112 113 if (dn) { 114 smt_option = of_get_property(dn, "ibm,smt-enabled", NULL); 115 116 if (smt_option) { 117 if (!strcmp(smt_option, "on")) 118 smt_enabled_at_boot = 1; 119 else if (!strcmp(smt_option, "off")) 120 smt_enabled_at_boot = 0; 121 } 122 } 123 } 124 125 /* Look for smt-enabled= cmdline option */ 126 static int __init early_smt_enabled(char *p) 127 { 128 smt_enabled_cmdline = 1; 129 130 if (!p) 131 return 0; 132 133 if (!strcmp(p, "on") || !strcmp(p, "1")) 134 smt_enabled_at_boot = 1; 135 else if (!strcmp(p, "off") || !strcmp(p, "0")) 136 smt_enabled_at_boot = 0; 137 138 return 0; 139 } 140 early_param("smt-enabled", early_smt_enabled); 141 142 #else 143 #define check_smt_enabled() 144 #endif /* CONFIG_SMP */ 145 146 /* Put the paca pointer into r13 and SPRG_PACA */ 147 void __init setup_paca(int cpu) 148 { 149 local_paca = &paca[cpu]; 150 mtspr(SPRN_SPRG_PACA, local_paca); 151 #ifdef CONFIG_PPC_BOOK3E 152 mtspr(SPRN_SPRG_TLB_EXFRAME, local_paca->extlb); 153 #endif 154 } 155 156 /* 157 * Early initialization entry point. This is called by head.S 158 * with MMU translation disabled. We rely on the "feature" of 159 * the CPU that ignores the top 2 bits of the address in real 160 * mode so we can access kernel globals normally provided we 161 * only toy with things in the RMO region. From here, we do 162 * some early parsing of the device-tree to setup out LMB 163 * data structures, and allocate & initialize the hash table 164 * and segment tables so we can start running with translation 165 * enabled. 166 * 167 * It is this function which will call the probe() callback of 168 * the various platform types and copy the matching one to the 169 * global ppc_md structure. Your platform can eventually do 170 * some very early initializations from the probe() routine, but 171 * this is not recommended, be very careful as, for example, the 172 * device-tree is not accessible via normal means at this point. 173 */ 174 175 void __init early_setup(unsigned long dt_ptr) 176 { 177 /* -------- printk is _NOT_ safe to use here ! ------- */ 178 179 /* Fill in any unititialised pacas */ 180 initialise_pacas(); 181 182 /* Identify CPU type */ 183 identify_cpu(0, mfspr(SPRN_PVR)); 184 185 /* Assume we're on cpu 0 for now. Don't write to the paca yet! */ 186 setup_paca(0); 187 188 /* Initialize lockdep early or else spinlocks will blow */ 189 lockdep_init(); 190 191 /* -------- printk is now safe to use ------- */ 192 193 /* Enable early debugging if any specified (see udbg.h) */ 194 udbg_early_init(); 195 196 DBG(" -> early_setup(), dt_ptr: 0x%lx\n", dt_ptr); 197 198 /* 199 * Do early initialization using the flattened device 200 * tree, such as retrieving the physical memory map or 201 * calculating/retrieving the hash table size. 202 */ 203 early_init_devtree(__va(dt_ptr)); 204 205 /* Now we know the logical id of our boot cpu, setup the paca. */ 206 setup_paca(boot_cpuid); 207 208 /* Fix up paca fields required for the boot cpu */ 209 get_paca()->cpu_start = 1; 210 211 /* Probe the machine type */ 212 probe_machine(); 213 214 setup_kdump_trampoline(); 215 216 DBG("Found, Initializing memory management...\n"); 217 218 /* Initialize the hash table or TLB handling */ 219 early_init_mmu(); 220 221 DBG(" <- early_setup()\n"); 222 } 223 224 #ifdef CONFIG_SMP 225 void early_setup_secondary(void) 226 { 227 /* Mark interrupts enabled in PACA */ 228 get_paca()->soft_enabled = 0; 229 230 /* Initialize the hash table or TLB handling */ 231 early_init_mmu_secondary(); 232 } 233 234 #endif /* CONFIG_SMP */ 235 236 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC) 237 void smp_release_cpus(void) 238 { 239 unsigned long *ptr; 240 241 DBG(" -> smp_release_cpus()\n"); 242 243 /* All secondary cpus are spinning on a common spinloop, release them 244 * all now so they can start to spin on their individual paca 245 * spinloops. For non SMP kernels, the secondary cpus never get out 246 * of the common spinloop. 247 */ 248 249 ptr = (unsigned long *)((unsigned long)&__secondary_hold_spinloop 250 - PHYSICAL_START); 251 *ptr = __pa(generic_secondary_smp_init); 252 mb(); 253 254 DBG(" <- smp_release_cpus()\n"); 255 } 256 #endif /* CONFIG_SMP || CONFIG_KEXEC */ 257 258 /* 259 * Initialize some remaining members of the ppc64_caches and systemcfg 260 * structures 261 * (at least until we get rid of them completely). This is mostly some 262 * cache informations about the CPU that will be used by cache flush 263 * routines and/or provided to userland 264 */ 265 static void __init initialize_cache_info(void) 266 { 267 struct device_node *np; 268 unsigned long num_cpus = 0; 269 270 DBG(" -> initialize_cache_info()\n"); 271 272 for (np = NULL; (np = of_find_node_by_type(np, "cpu"));) { 273 num_cpus += 1; 274 275 /* We're assuming *all* of the CPUs have the same 276 * d-cache and i-cache sizes... -Peter 277 */ 278 279 if ( num_cpus == 1 ) { 280 const u32 *sizep, *lsizep; 281 u32 size, lsize; 282 283 size = 0; 284 lsize = cur_cpu_spec->dcache_bsize; 285 sizep = of_get_property(np, "d-cache-size", NULL); 286 if (sizep != NULL) 287 size = *sizep; 288 lsizep = of_get_property(np, "d-cache-block-size", NULL); 289 /* fallback if block size missing */ 290 if (lsizep == NULL) 291 lsizep = of_get_property(np, "d-cache-line-size", NULL); 292 if (lsizep != NULL) 293 lsize = *lsizep; 294 if (sizep == 0 || lsizep == 0) 295 DBG("Argh, can't find dcache properties ! " 296 "sizep: %p, lsizep: %p\n", sizep, lsizep); 297 298 ppc64_caches.dsize = size; 299 ppc64_caches.dline_size = lsize; 300 ppc64_caches.log_dline_size = __ilog2(lsize); 301 ppc64_caches.dlines_per_page = PAGE_SIZE / lsize; 302 303 size = 0; 304 lsize = cur_cpu_spec->icache_bsize; 305 sizep = of_get_property(np, "i-cache-size", NULL); 306 if (sizep != NULL) 307 size = *sizep; 308 lsizep = of_get_property(np, "i-cache-block-size", NULL); 309 if (lsizep == NULL) 310 lsizep = of_get_property(np, "i-cache-line-size", NULL); 311 if (lsizep != NULL) 312 lsize = *lsizep; 313 if (sizep == 0 || lsizep == 0) 314 DBG("Argh, can't find icache properties ! " 315 "sizep: %p, lsizep: %p\n", sizep, lsizep); 316 317 ppc64_caches.isize = size; 318 ppc64_caches.iline_size = lsize; 319 ppc64_caches.log_iline_size = __ilog2(lsize); 320 ppc64_caches.ilines_per_page = PAGE_SIZE / lsize; 321 } 322 } 323 324 DBG(" <- initialize_cache_info()\n"); 325 } 326 327 328 /* 329 * Do some initial setup of the system. The parameters are those which 330 * were passed in from the bootloader. 331 */ 332 void __init setup_system(void) 333 { 334 DBG(" -> setup_system()\n"); 335 336 /* Apply the CPUs-specific and firmware specific fixups to kernel 337 * text (nop out sections not relevant to this CPU or this firmware) 338 */ 339 do_feature_fixups(cur_cpu_spec->cpu_features, 340 &__start___ftr_fixup, &__stop___ftr_fixup); 341 do_feature_fixups(cur_cpu_spec->mmu_features, 342 &__start___mmu_ftr_fixup, &__stop___mmu_ftr_fixup); 343 do_feature_fixups(powerpc_firmware_features, 344 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); 345 do_lwsync_fixups(cur_cpu_spec->cpu_features, 346 &__start___lwsync_fixup, &__stop___lwsync_fixup); 347 348 /* 349 * Unflatten the device-tree passed by prom_init or kexec 350 */ 351 unflatten_device_tree(); 352 353 /* 354 * Fill the ppc64_caches & systemcfg structures with informations 355 * retrieved from the device-tree. 356 */ 357 initialize_cache_info(); 358 359 #ifdef CONFIG_PPC_RTAS 360 /* 361 * Initialize RTAS if available 362 */ 363 rtas_initialize(); 364 #endif /* CONFIG_PPC_RTAS */ 365 366 /* 367 * Check if we have an initrd provided via the device-tree 368 */ 369 check_for_initrd(); 370 371 /* 372 * Do some platform specific early initializations, that includes 373 * setting up the hash table pointers. It also sets up some interrupt-mapping 374 * related options that will be used by finish_device_tree() 375 */ 376 if (ppc_md.init_early) 377 ppc_md.init_early(); 378 379 /* 380 * We can discover serial ports now since the above did setup the 381 * hash table management for us, thus ioremap works. We do that early 382 * so that further code can be debugged 383 */ 384 find_legacy_serial_ports(); 385 386 /* 387 * Register early console 388 */ 389 register_early_udbg_console(); 390 391 /* 392 * Initialize xmon 393 */ 394 xmon_setup(); 395 396 check_smt_enabled(); 397 smp_setup_cpu_maps(); 398 399 #ifdef CONFIG_SMP 400 /* Release secondary cpus out of their spinloops at 0x60 now that 401 * we can map physical -> logical CPU ids 402 */ 403 smp_release_cpus(); 404 #endif 405 406 printk("Starting Linux PPC64 %s\n", init_utsname()->version); 407 408 printk("-----------------------------------------------------\n"); 409 printk("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); 410 printk("physicalMemorySize = 0x%llx\n", lmb_phys_mem_size()); 411 if (ppc64_caches.dline_size != 0x80) 412 printk("ppc64_caches.dcache_line_size = 0x%x\n", 413 ppc64_caches.dline_size); 414 if (ppc64_caches.iline_size != 0x80) 415 printk("ppc64_caches.icache_line_size = 0x%x\n", 416 ppc64_caches.iline_size); 417 #ifdef CONFIG_PPC_STD_MMU_64 418 if (htab_address) 419 printk("htab_address = 0x%p\n", htab_address); 420 printk("htab_hash_mask = 0x%lx\n", htab_hash_mask); 421 #endif /* CONFIG_PPC_STD_MMU_64 */ 422 if (PHYSICAL_START > 0) 423 printk("physical_start = 0x%llx\n", 424 (unsigned long long)PHYSICAL_START); 425 printk("-----------------------------------------------------\n"); 426 427 DBG(" <- setup_system()\n"); 428 } 429 430 #ifdef CONFIG_IRQSTACKS 431 static void __init irqstack_early_init(void) 432 { 433 unsigned int i; 434 435 /* 436 * interrupt stacks must be under 256MB, we cannot afford to take 437 * SLB misses on them. 438 */ 439 for_each_possible_cpu(i) { 440 softirq_ctx[i] = (struct thread_info *) 441 __va(lmb_alloc_base(THREAD_SIZE, 442 THREAD_SIZE, 0x10000000)); 443 hardirq_ctx[i] = (struct thread_info *) 444 __va(lmb_alloc_base(THREAD_SIZE, 445 THREAD_SIZE, 0x10000000)); 446 } 447 } 448 #else 449 #define irqstack_early_init() 450 #endif 451 452 #ifdef CONFIG_PPC_BOOK3E 453 static void __init exc_lvl_early_init(void) 454 { 455 unsigned int i; 456 457 for_each_possible_cpu(i) { 458 critirq_ctx[i] = (struct thread_info *) 459 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 460 dbgirq_ctx[i] = (struct thread_info *) 461 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 462 mcheckirq_ctx[i] = (struct thread_info *) 463 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 464 } 465 } 466 #else 467 #define exc_lvl_early_init() 468 #endif 469 470 /* 471 * Stack space used when we detect a bad kernel stack pointer, and 472 * early in SMP boots before relocation is enabled. 473 */ 474 static void __init emergency_stack_init(void) 475 { 476 unsigned long limit; 477 unsigned int i; 478 479 /* 480 * Emergency stacks must be under 256MB, we cannot afford to take 481 * SLB misses on them. The ABI also requires them to be 128-byte 482 * aligned. 483 * 484 * Since we use these as temporary stacks during secondary CPU 485 * bringup, we need to get at them in real mode. This means they 486 * must also be within the RMO region. 487 */ 488 limit = min(0x10000000ULL, lmb.rmo_size); 489 490 for_each_possible_cpu(i) { 491 unsigned long sp; 492 sp = lmb_alloc_base(THREAD_SIZE, THREAD_SIZE, limit); 493 sp += THREAD_SIZE; 494 paca[i].emergency_sp = __va(sp); 495 } 496 } 497 498 /* 499 * Called into from start_kernel, after lock_kernel has been called. 500 * Initializes bootmem, which is unsed to manage page allocation until 501 * mem_init is called. 502 */ 503 void __init setup_arch(char **cmdline_p) 504 { 505 ppc64_boot_msg(0x12, "Setup Arch"); 506 507 *cmdline_p = cmd_line; 508 509 /* 510 * Set cache line size based on type of cpu as a default. 511 * Systems with OF can look in the properties on the cpu node(s) 512 * for a possibly more accurate value. 513 */ 514 dcache_bsize = ppc64_caches.dline_size; 515 icache_bsize = ppc64_caches.iline_size; 516 517 /* reboot on panic */ 518 panic_timeout = 180; 519 520 if (ppc_md.panic) 521 setup_panic(); 522 523 init_mm.start_code = (unsigned long)_stext; 524 init_mm.end_code = (unsigned long) _etext; 525 init_mm.end_data = (unsigned long) _edata; 526 init_mm.brk = klimit; 527 528 irqstack_early_init(); 529 exc_lvl_early_init(); 530 emergency_stack_init(); 531 532 #ifdef CONFIG_PPC_STD_MMU_64 533 stabs_alloc(); 534 #endif 535 /* set up the bootmem stuff with available memory */ 536 do_init_bootmem(); 537 sparse_init(); 538 539 #ifdef CONFIG_DUMMY_CONSOLE 540 conswitchp = &dummy_con; 541 #endif 542 543 if (ppc_md.setup_arch) 544 ppc_md.setup_arch(); 545 546 #ifdef CONFIG_SWIOTLB 547 if (ppc_swiotlb_enable) 548 swiotlb_init(1); 549 #endif 550 551 paging_init(); 552 553 /* Initialize the MMU context management stuff */ 554 mmu_context_init(); 555 556 ppc64_boot_msg(0x15, "Setup Done"); 557 } 558 559 560 /* ToDo: do something useful if ppc_md is not yet setup. */ 561 #define PPC64_LINUX_FUNCTION 0x0f000000 562 #define PPC64_IPL_MESSAGE 0xc0000000 563 #define PPC64_TERM_MESSAGE 0xb0000000 564 565 static void ppc64_do_msg(unsigned int src, const char *msg) 566 { 567 if (ppc_md.progress) { 568 char buf[128]; 569 570 sprintf(buf, "%08X\n", src); 571 ppc_md.progress(buf, 0); 572 snprintf(buf, 128, "%s", msg); 573 ppc_md.progress(buf, 0); 574 } 575 } 576 577 /* Print a boot progress message. */ 578 void ppc64_boot_msg(unsigned int src, const char *msg) 579 { 580 ppc64_do_msg(PPC64_LINUX_FUNCTION|PPC64_IPL_MESSAGE|src, msg); 581 printk("[boot]%04x %s\n", src, msg); 582 } 583 584 void cpu_die(void) 585 { 586 if (ppc_md.cpu_die) 587 ppc_md.cpu_die(); 588 } 589 590 #ifdef CONFIG_SMP 591 #define PCPU_DYN_SIZE () 592 593 static void * __init pcpu_fc_alloc(unsigned int cpu, size_t size, size_t align) 594 { 595 return __alloc_bootmem_node(NODE_DATA(cpu_to_node(cpu)), size, align, 596 __pa(MAX_DMA_ADDRESS)); 597 } 598 599 static void __init pcpu_fc_free(void *ptr, size_t size) 600 { 601 free_bootmem(__pa(ptr), size); 602 } 603 604 static int pcpu_cpu_distance(unsigned int from, unsigned int to) 605 { 606 if (cpu_to_node(from) == cpu_to_node(to)) 607 return LOCAL_DISTANCE; 608 else 609 return REMOTE_DISTANCE; 610 } 611 612 void __init setup_per_cpu_areas(void) 613 { 614 const size_t dyn_size = PERCPU_MODULE_RESERVE + PERCPU_DYNAMIC_RESERVE; 615 size_t atom_size; 616 unsigned long delta; 617 unsigned int cpu; 618 int rc; 619 620 /* 621 * Linear mapping is one of 4K, 1M and 16M. For 4K, no need 622 * to group units. For larger mappings, use 1M atom which 623 * should be large enough to contain a number of units. 624 */ 625 if (mmu_linear_psize == MMU_PAGE_4K) 626 atom_size = PAGE_SIZE; 627 else 628 atom_size = 1 << 20; 629 630 rc = pcpu_embed_first_chunk(0, dyn_size, atom_size, pcpu_cpu_distance, 631 pcpu_fc_alloc, pcpu_fc_free); 632 if (rc < 0) 633 panic("cannot initialize percpu area (err=%d)", rc); 634 635 delta = (unsigned long)pcpu_base_addr - (unsigned long)__per_cpu_start; 636 for_each_possible_cpu(cpu) 637 paca[cpu].data_offset = delta + pcpu_unit_offsets[cpu]; 638 } 639 #endif 640 641 642 #ifdef CONFIG_PPC_INDIRECT_IO 643 struct ppc_pci_io ppc_pci_io; 644 EXPORT_SYMBOL(ppc_pci_io); 645 #endif /* CONFIG_PPC_INDIRECT_IO */ 646 647