xref: /openbmc/linux/arch/powerpc/kernel/setup_32.c (revision bc000245)
1 /*
2  * Common prep/pmac/chrp boot and setup code.
3  */
4 
5 #include <linux/module.h>
6 #include <linux/string.h>
7 #include <linux/sched.h>
8 #include <linux/init.h>
9 #include <linux/kernel.h>
10 #include <linux/reboot.h>
11 #include <linux/delay.h>
12 #include <linux/initrd.h>
13 #include <linux/tty.h>
14 #include <linux/bootmem.h>
15 #include <linux/seq_file.h>
16 #include <linux/root_dev.h>
17 #include <linux/cpu.h>
18 #include <linux/console.h>
19 #include <linux/memblock.h>
20 
21 #include <asm/io.h>
22 #include <asm/prom.h>
23 #include <asm/processor.h>
24 #include <asm/pgtable.h>
25 #include <asm/setup.h>
26 #include <asm/smp.h>
27 #include <asm/elf.h>
28 #include <asm/cputable.h>
29 #include <asm/bootx.h>
30 #include <asm/btext.h>
31 #include <asm/machdep.h>
32 #include <asm/uaccess.h>
33 #include <asm/pmac_feature.h>
34 #include <asm/sections.h>
35 #include <asm/nvram.h>
36 #include <asm/xmon.h>
37 #include <asm/time.h>
38 #include <asm/serial.h>
39 #include <asm/udbg.h>
40 #include <asm/mmu_context.h>
41 #include <asm/epapr_hcalls.h>
42 
43 #define DBG(fmt...)
44 
45 extern void bootx_init(unsigned long r4, unsigned long phys);
46 
47 int boot_cpuid = -1;
48 EXPORT_SYMBOL_GPL(boot_cpuid);
49 int boot_cpuid_phys;
50 EXPORT_SYMBOL_GPL(boot_cpuid_phys);
51 
52 int smp_hw_index[NR_CPUS];
53 
54 unsigned long ISA_DMA_THRESHOLD;
55 unsigned int DMA_MODE_READ;
56 unsigned int DMA_MODE_WRITE;
57 
58 #ifdef CONFIG_VGA_CONSOLE
59 unsigned long vgacon_remap_base;
60 EXPORT_SYMBOL(vgacon_remap_base);
61 #endif
62 
63 /*
64  * These are used in binfmt_elf.c to put aux entries on the stack
65  * for each elf executable being started.
66  */
67 int dcache_bsize;
68 int icache_bsize;
69 int ucache_bsize;
70 
71 /*
72  * We're called here very early in the boot.  We determine the machine
73  * type and call the appropriate low-level setup functions.
74  *  -- Cort <cort@fsmlabs.com>
75  *
76  * Note that the kernel may be running at an address which is different
77  * from the address that it was linked at, so we must use RELOC/PTRRELOC
78  * to access static data (including strings).  -- paulus
79  */
80 notrace unsigned long __init early_init(unsigned long dt_ptr)
81 {
82 	unsigned long offset = reloc_offset();
83 	struct cpu_spec *spec;
84 
85 	/* First zero the BSS -- use memset_io, some platforms don't have
86 	 * caches on yet */
87 	memset_io((void __iomem *)PTRRELOC(&__bss_start), 0,
88 			__bss_stop - __bss_start);
89 
90 	/*
91 	 * Identify the CPU type and fix up code sections
92 	 * that depend on which cpu we have.
93 	 */
94 	spec = identify_cpu(offset, mfspr(SPRN_PVR));
95 
96 	do_feature_fixups(spec->cpu_features,
97 			  PTRRELOC(&__start___ftr_fixup),
98 			  PTRRELOC(&__stop___ftr_fixup));
99 
100 	do_feature_fixups(spec->mmu_features,
101 			  PTRRELOC(&__start___mmu_ftr_fixup),
102 			  PTRRELOC(&__stop___mmu_ftr_fixup));
103 
104 	do_lwsync_fixups(spec->cpu_features,
105 			 PTRRELOC(&__start___lwsync_fixup),
106 			 PTRRELOC(&__stop___lwsync_fixup));
107 
108 	do_final_fixups();
109 
110 	return KERNELBASE + offset;
111 }
112 
113 
114 /*
115  * Find out what kind of machine we're on and save any data we need
116  * from the early boot process (devtree is copied on pmac by prom_init()).
117  * This is called very early on the boot process, after a minimal
118  * MMU environment has been set up but before MMU_init is called.
119  */
120 notrace void __init machine_init(u64 dt_ptr)
121 {
122 	lockdep_init();
123 
124 	/* Enable early debugging if any specified (see udbg.h) */
125 	udbg_early_init();
126 
127 	/* Do some early initialization based on the flat device tree */
128 	early_init_devtree(__va(dt_ptr));
129 
130 	epapr_paravirt_early_init();
131 
132 	early_init_mmu();
133 
134 	probe_machine();
135 
136 	setup_kdump_trampoline();
137 
138 #ifdef CONFIG_6xx
139 	if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
140 	    cpu_has_feature(CPU_FTR_CAN_NAP))
141 		ppc_md.power_save = ppc6xx_idle;
142 #endif
143 
144 #ifdef CONFIG_E500
145 	if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
146 	    cpu_has_feature(CPU_FTR_CAN_NAP))
147 		ppc_md.power_save = e500_idle;
148 #endif
149 	if (ppc_md.progress)
150 		ppc_md.progress("id mach(): done", 0x200);
151 }
152 
153 /* Checks "l2cr=xxxx" command-line option */
154 int __init ppc_setup_l2cr(char *str)
155 {
156 	if (cpu_has_feature(CPU_FTR_L2CR)) {
157 		unsigned long val = simple_strtoul(str, NULL, 0);
158 		printk(KERN_INFO "l2cr set to %lx\n", val);
159 		_set_L2CR(0);		/* force invalidate by disable cache */
160 		_set_L2CR(val);		/* and enable it */
161 	}
162 	return 1;
163 }
164 __setup("l2cr=", ppc_setup_l2cr);
165 
166 /* Checks "l3cr=xxxx" command-line option */
167 int __init ppc_setup_l3cr(char *str)
168 {
169 	if (cpu_has_feature(CPU_FTR_L3CR)) {
170 		unsigned long val = simple_strtoul(str, NULL, 0);
171 		printk(KERN_INFO "l3cr set to %lx\n", val);
172 		_set_L3CR(val);		/* and enable it */
173 	}
174 	return 1;
175 }
176 __setup("l3cr=", ppc_setup_l3cr);
177 
178 #ifdef CONFIG_GENERIC_NVRAM
179 
180 /* Generic nvram hooks used by drivers/char/gen_nvram.c */
181 unsigned char nvram_read_byte(int addr)
182 {
183 	if (ppc_md.nvram_read_val)
184 		return ppc_md.nvram_read_val(addr);
185 	return 0xff;
186 }
187 EXPORT_SYMBOL(nvram_read_byte);
188 
189 void nvram_write_byte(unsigned char val, int addr)
190 {
191 	if (ppc_md.nvram_write_val)
192 		ppc_md.nvram_write_val(addr, val);
193 }
194 EXPORT_SYMBOL(nvram_write_byte);
195 
196 ssize_t nvram_get_size(void)
197 {
198 	if (ppc_md.nvram_size)
199 		return ppc_md.nvram_size();
200 	return -1;
201 }
202 EXPORT_SYMBOL(nvram_get_size);
203 
204 void nvram_sync(void)
205 {
206 	if (ppc_md.nvram_sync)
207 		ppc_md.nvram_sync();
208 }
209 EXPORT_SYMBOL(nvram_sync);
210 
211 #endif /* CONFIG_NVRAM */
212 
213 int __init ppc_init(void)
214 {
215 	/* clear the progress line */
216 	if (ppc_md.progress)
217 		ppc_md.progress("             ", 0xffff);
218 
219 	/* call platform init */
220 	if (ppc_md.init != NULL) {
221 		ppc_md.init();
222 	}
223 	return 0;
224 }
225 
226 arch_initcall(ppc_init);
227 
228 static void __init irqstack_early_init(void)
229 {
230 	unsigned int i;
231 
232 	/* interrupt stacks must be in lowmem, we get that for free on ppc32
233 	 * as the memblock is limited to lowmem by default */
234 	for_each_possible_cpu(i) {
235 		softirq_ctx[i] = (struct thread_info *)
236 			__va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
237 		hardirq_ctx[i] = (struct thread_info *)
238 			__va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
239 	}
240 }
241 
242 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
243 static void __init exc_lvl_early_init(void)
244 {
245 	unsigned int i, hw_cpu;
246 
247 	/* interrupt stacks must be in lowmem, we get that for free on ppc32
248 	 * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */
249 	for_each_possible_cpu(i) {
250 		hw_cpu = get_hard_smp_processor_id(i);
251 		critirq_ctx[hw_cpu] = (struct thread_info *)
252 			__va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
253 #ifdef CONFIG_BOOKE
254 		dbgirq_ctx[hw_cpu] = (struct thread_info *)
255 			__va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
256 		mcheckirq_ctx[hw_cpu] = (struct thread_info *)
257 			__va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
258 #endif
259 	}
260 }
261 #else
262 #define exc_lvl_early_init()
263 #endif
264 
265 /* Warning, IO base is not yet inited */
266 void __init setup_arch(char **cmdline_p)
267 {
268 	*cmdline_p = cmd_line;
269 
270 	/* so udelay does something sensible, assume <= 1000 bogomips */
271 	loops_per_jiffy = 500000000 / HZ;
272 
273 	unflatten_device_tree();
274 	check_for_initrd();
275 
276 	if (ppc_md.init_early)
277 		ppc_md.init_early();
278 
279 	find_legacy_serial_ports();
280 
281 	smp_setup_cpu_maps();
282 
283 	/* Register early console */
284 	register_early_udbg_console();
285 
286 	xmon_setup();
287 
288 	/*
289 	 * Set cache line size based on type of cpu as a default.
290 	 * Systems with OF can look in the properties on the cpu node(s)
291 	 * for a possibly more accurate value.
292 	 */
293 	dcache_bsize = cur_cpu_spec->dcache_bsize;
294 	icache_bsize = cur_cpu_spec->icache_bsize;
295 	ucache_bsize = 0;
296 	if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE))
297 		ucache_bsize = icache_bsize = dcache_bsize;
298 
299 	/* reboot on panic */
300 	panic_timeout = 180;
301 
302 	if (ppc_md.panic)
303 		setup_panic();
304 
305 	init_mm.start_code = (unsigned long)_stext;
306 	init_mm.end_code = (unsigned long) _etext;
307 	init_mm.end_data = (unsigned long) _edata;
308 	init_mm.brk = klimit;
309 
310 	exc_lvl_early_init();
311 
312 	irqstack_early_init();
313 
314 	/* set up the bootmem stuff with available memory */
315 	do_init_bootmem();
316 	if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab);
317 
318 #ifdef CONFIG_DUMMY_CONSOLE
319 	conswitchp = &dummy_con;
320 #endif
321 
322 	if (ppc_md.setup_arch)
323 		ppc_md.setup_arch();
324 	if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab);
325 
326 	paging_init();
327 
328 	/* Initialize the MMU context management stuff */
329 	mmu_context_init();
330 }
331