1 /* 2 * Common prep/pmac/chrp boot and setup code. 3 */ 4 5 #include <linux/module.h> 6 #include <linux/string.h> 7 #include <linux/sched.h> 8 #include <linux/init.h> 9 #include <linux/kernel.h> 10 #include <linux/reboot.h> 11 #include <linux/delay.h> 12 #include <linux/initrd.h> 13 #include <linux/tty.h> 14 #include <linux/bootmem.h> 15 #include <linux/seq_file.h> 16 #include <linux/root_dev.h> 17 #include <linux/cpu.h> 18 #include <linux/console.h> 19 #include <linux/lmb.h> 20 21 #include <asm/io.h> 22 #include <asm/prom.h> 23 #include <asm/processor.h> 24 #include <asm/pgtable.h> 25 #include <asm/setup.h> 26 #include <asm/smp.h> 27 #include <asm/elf.h> 28 #include <asm/cputable.h> 29 #include <asm/bootx.h> 30 #include <asm/btext.h> 31 #include <asm/machdep.h> 32 #include <asm/uaccess.h> 33 #include <asm/system.h> 34 #include <asm/pmac_feature.h> 35 #include <asm/sections.h> 36 #include <asm/nvram.h> 37 #include <asm/xmon.h> 38 #include <asm/time.h> 39 #include <asm/serial.h> 40 #include <asm/udbg.h> 41 #include <asm/mmu_context.h> 42 43 #include "setup.h" 44 45 #define DBG(fmt...) 46 47 extern void bootx_init(unsigned long r4, unsigned long phys); 48 49 int boot_cpuid; 50 EXPORT_SYMBOL_GPL(boot_cpuid); 51 int boot_cpuid_phys; 52 53 int smp_hw_index[NR_CPUS]; 54 55 unsigned long ISA_DMA_THRESHOLD; 56 unsigned int DMA_MODE_READ; 57 unsigned int DMA_MODE_WRITE; 58 59 #ifdef CONFIG_VGA_CONSOLE 60 unsigned long vgacon_remap_base; 61 EXPORT_SYMBOL(vgacon_remap_base); 62 #endif 63 64 /* 65 * These are used in binfmt_elf.c to put aux entries on the stack 66 * for each elf executable being started. 67 */ 68 int dcache_bsize; 69 int icache_bsize; 70 int ucache_bsize; 71 72 /* 73 * We're called here very early in the boot. We determine the machine 74 * type and call the appropriate low-level setup functions. 75 * -- Cort <cort@fsmlabs.com> 76 * 77 * Note that the kernel may be running at an address which is different 78 * from the address that it was linked at, so we must use RELOC/PTRRELOC 79 * to access static data (including strings). -- paulus 80 */ 81 notrace unsigned long __init early_init(unsigned long dt_ptr) 82 { 83 unsigned long offset = reloc_offset(); 84 struct cpu_spec *spec; 85 86 /* First zero the BSS -- use memset_io, some platforms don't have 87 * caches on yet */ 88 memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, 89 __bss_stop - __bss_start); 90 91 /* 92 * Identify the CPU type and fix up code sections 93 * that depend on which cpu we have. 94 */ 95 spec = identify_cpu(offset, mfspr(SPRN_PVR)); 96 97 do_feature_fixups(spec->cpu_features, 98 PTRRELOC(&__start___ftr_fixup), 99 PTRRELOC(&__stop___ftr_fixup)); 100 101 do_feature_fixups(spec->mmu_features, 102 PTRRELOC(&__start___mmu_ftr_fixup), 103 PTRRELOC(&__stop___mmu_ftr_fixup)); 104 105 do_lwsync_fixups(spec->cpu_features, 106 PTRRELOC(&__start___lwsync_fixup), 107 PTRRELOC(&__stop___lwsync_fixup)); 108 109 return KERNELBASE + offset; 110 } 111 112 113 /* 114 * Find out what kind of machine we're on and save any data we need 115 * from the early boot process (devtree is copied on pmac by prom_init()). 116 * This is called very early on the boot process, after a minimal 117 * MMU environment has been set up but before MMU_init is called. 118 */ 119 notrace void __init machine_init(unsigned long dt_ptr) 120 { 121 /* Enable early debugging if any specified (see udbg.h) */ 122 udbg_early_init(); 123 124 /* Do some early initialization based on the flat device tree */ 125 early_init_devtree(__va(dt_ptr)); 126 127 probe_machine(); 128 129 setup_kdump_trampoline(); 130 131 #ifdef CONFIG_6xx 132 if (cpu_has_feature(CPU_FTR_CAN_DOZE) || 133 cpu_has_feature(CPU_FTR_CAN_NAP)) 134 ppc_md.power_save = ppc6xx_idle; 135 #endif 136 137 #ifdef CONFIG_E500 138 if (cpu_has_feature(CPU_FTR_CAN_DOZE) || 139 cpu_has_feature(CPU_FTR_CAN_NAP)) 140 ppc_md.power_save = e500_idle; 141 #endif 142 if (ppc_md.progress) 143 ppc_md.progress("id mach(): done", 0x200); 144 } 145 146 #ifdef CONFIG_BOOKE_WDT 147 /* Checks wdt=x and wdt_period=xx command-line option */ 148 notrace int __init early_parse_wdt(char *p) 149 { 150 if (p && strncmp(p, "0", 1) != 0) 151 booke_wdt_enabled = 1; 152 153 return 0; 154 } 155 early_param("wdt", early_parse_wdt); 156 157 int __init early_parse_wdt_period (char *p) 158 { 159 if (p) 160 booke_wdt_period = simple_strtoul(p, NULL, 0); 161 162 return 0; 163 } 164 early_param("wdt_period", early_parse_wdt_period); 165 #endif /* CONFIG_BOOKE_WDT */ 166 167 /* Checks "l2cr=xxxx" command-line option */ 168 int __init ppc_setup_l2cr(char *str) 169 { 170 if (cpu_has_feature(CPU_FTR_L2CR)) { 171 unsigned long val = simple_strtoul(str, NULL, 0); 172 printk(KERN_INFO "l2cr set to %lx\n", val); 173 _set_L2CR(0); /* force invalidate by disable cache */ 174 _set_L2CR(val); /* and enable it */ 175 } 176 return 1; 177 } 178 __setup("l2cr=", ppc_setup_l2cr); 179 180 /* Checks "l3cr=xxxx" command-line option */ 181 int __init ppc_setup_l3cr(char *str) 182 { 183 if (cpu_has_feature(CPU_FTR_L3CR)) { 184 unsigned long val = simple_strtoul(str, NULL, 0); 185 printk(KERN_INFO "l3cr set to %lx\n", val); 186 _set_L3CR(val); /* and enable it */ 187 } 188 return 1; 189 } 190 __setup("l3cr=", ppc_setup_l3cr); 191 192 #ifdef CONFIG_GENERIC_NVRAM 193 194 /* Generic nvram hooks used by drivers/char/gen_nvram.c */ 195 unsigned char nvram_read_byte(int addr) 196 { 197 if (ppc_md.nvram_read_val) 198 return ppc_md.nvram_read_val(addr); 199 return 0xff; 200 } 201 EXPORT_SYMBOL(nvram_read_byte); 202 203 void nvram_write_byte(unsigned char val, int addr) 204 { 205 if (ppc_md.nvram_write_val) 206 ppc_md.nvram_write_val(addr, val); 207 } 208 EXPORT_SYMBOL(nvram_write_byte); 209 210 void nvram_sync(void) 211 { 212 if (ppc_md.nvram_sync) 213 ppc_md.nvram_sync(); 214 } 215 EXPORT_SYMBOL(nvram_sync); 216 217 #endif /* CONFIG_NVRAM */ 218 219 int __init ppc_init(void) 220 { 221 /* clear the progress line */ 222 if (ppc_md.progress) 223 ppc_md.progress(" ", 0xffff); 224 225 /* call platform init */ 226 if (ppc_md.init != NULL) { 227 ppc_md.init(); 228 } 229 return 0; 230 } 231 232 arch_initcall(ppc_init); 233 234 #ifdef CONFIG_IRQSTACKS 235 static void __init irqstack_early_init(void) 236 { 237 unsigned int i; 238 239 /* interrupt stacks must be in lowmem, we get that for free on ppc32 240 * as the lmb is limited to lowmem by LMB_REAL_LIMIT */ 241 for_each_possible_cpu(i) { 242 softirq_ctx[i] = (struct thread_info *) 243 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 244 hardirq_ctx[i] = (struct thread_info *) 245 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 246 } 247 } 248 #else 249 #define irqstack_early_init() 250 #endif 251 252 #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) 253 static void __init exc_lvl_early_init(void) 254 { 255 unsigned int i; 256 257 /* interrupt stacks must be in lowmem, we get that for free on ppc32 258 * as the lmb is limited to lowmem by LMB_REAL_LIMIT */ 259 for_each_possible_cpu(i) { 260 critirq_ctx[i] = (struct thread_info *) 261 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 262 #ifdef CONFIG_BOOKE 263 dbgirq_ctx[i] = (struct thread_info *) 264 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 265 mcheckirq_ctx[i] = (struct thread_info *) 266 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); 267 #endif 268 } 269 } 270 #else 271 #define exc_lvl_early_init() 272 #endif 273 274 /* Warning, IO base is not yet inited */ 275 void __init setup_arch(char **cmdline_p) 276 { 277 *cmdline_p = cmd_line; 278 279 /* so udelay does something sensible, assume <= 1000 bogomips */ 280 loops_per_jiffy = 500000000 / HZ; 281 282 unflatten_device_tree(); 283 check_for_initrd(); 284 285 if (ppc_md.init_early) 286 ppc_md.init_early(); 287 288 find_legacy_serial_ports(); 289 290 smp_setup_cpu_maps(); 291 292 /* Register early console */ 293 register_early_udbg_console(); 294 295 xmon_setup(); 296 297 /* 298 * Set cache line size based on type of cpu as a default. 299 * Systems with OF can look in the properties on the cpu node(s) 300 * for a possibly more accurate value. 301 */ 302 dcache_bsize = cur_cpu_spec->dcache_bsize; 303 icache_bsize = cur_cpu_spec->icache_bsize; 304 ucache_bsize = 0; 305 if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE)) 306 ucache_bsize = icache_bsize = dcache_bsize; 307 308 /* reboot on panic */ 309 panic_timeout = 180; 310 311 if (ppc_md.panic) 312 setup_panic(); 313 314 init_mm.start_code = (unsigned long)_stext; 315 init_mm.end_code = (unsigned long) _etext; 316 init_mm.end_data = (unsigned long) _edata; 317 init_mm.brk = klimit; 318 319 exc_lvl_early_init(); 320 321 irqstack_early_init(); 322 323 /* set up the bootmem stuff with available memory */ 324 do_init_bootmem(); 325 if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab); 326 327 #ifdef CONFIG_DUMMY_CONSOLE 328 conswitchp = &dummy_con; 329 #endif 330 331 if (ppc_md.setup_arch) 332 ppc_md.setup_arch(); 333 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); 334 335 paging_init(); 336 337 /* Initialize the MMU context management stuff */ 338 mmu_context_init(); 339 340 } 341