1 /* 2 * Common prep/pmac/chrp boot and setup code. 3 */ 4 5 #include <linux/module.h> 6 #include <linux/string.h> 7 #include <linux/sched.h> 8 #include <linux/init.h> 9 #include <linux/kernel.h> 10 #include <linux/reboot.h> 11 #include <linux/delay.h> 12 #include <linux/initrd.h> 13 #if defined(CONFIG_IDE) || defined(CONFIG_IDE_MODULE) 14 #include <linux/ide.h> 15 #endif 16 #include <linux/tty.h> 17 #include <linux/bootmem.h> 18 #include <linux/seq_file.h> 19 #include <linux/root_dev.h> 20 #include <linux/cpu.h> 21 #include <linux/console.h> 22 23 #include <asm/io.h> 24 #include <asm/prom.h> 25 #include <asm/processor.h> 26 #include <asm/pgtable.h> 27 #include <asm/setup.h> 28 #include <asm/smp.h> 29 #include <asm/elf.h> 30 #include <asm/cputable.h> 31 #include <asm/bootx.h> 32 #include <asm/btext.h> 33 #include <asm/machdep.h> 34 #include <asm/uaccess.h> 35 #include <asm/system.h> 36 #include <asm/pmac_feature.h> 37 #include <asm/sections.h> 38 #include <asm/nvram.h> 39 #include <asm/xmon.h> 40 #include <asm/time.h> 41 #include <asm/serial.h> 42 #include <asm/udbg.h> 43 44 #include "setup.h" 45 46 #define DBG(fmt...) 47 48 #if defined CONFIG_KGDB 49 #include <asm/kgdb.h> 50 #endif 51 52 extern void bootx_init(unsigned long r4, unsigned long phys); 53 54 #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) 55 struct ide_machdep_calls ppc_ide_md; 56 EXPORT_SYMBOL(ppc_ide_md); 57 #endif 58 59 int boot_cpuid; 60 EXPORT_SYMBOL_GPL(boot_cpuid); 61 int boot_cpuid_phys; 62 63 unsigned long ISA_DMA_THRESHOLD; 64 unsigned int DMA_MODE_READ; 65 unsigned int DMA_MODE_WRITE; 66 67 int have_of = 1; 68 69 #ifdef CONFIG_VGA_CONSOLE 70 unsigned long vgacon_remap_base; 71 EXPORT_SYMBOL(vgacon_remap_base); 72 #endif 73 74 /* 75 * These are used in binfmt_elf.c to put aux entries on the stack 76 * for each elf executable being started. 77 */ 78 int dcache_bsize; 79 int icache_bsize; 80 int ucache_bsize; 81 82 /* 83 * We're called here very early in the boot. We determine the machine 84 * type and call the appropriate low-level setup functions. 85 * -- Cort <cort@fsmlabs.com> 86 * 87 * Note that the kernel may be running at an address which is different 88 * from the address that it was linked at, so we must use RELOC/PTRRELOC 89 * to access static data (including strings). -- paulus 90 */ 91 unsigned long __init early_init(unsigned long dt_ptr) 92 { 93 unsigned long offset = reloc_offset(); 94 struct cpu_spec *spec; 95 96 /* First zero the BSS -- use memset_io, some platforms don't have 97 * caches on yet */ 98 memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, 99 __bss_stop - __bss_start); 100 101 /* 102 * Identify the CPU type and fix up code sections 103 * that depend on which cpu we have. 104 */ 105 spec = identify_cpu(offset, mfspr(SPRN_PVR)); 106 107 do_feature_fixups(spec->cpu_features, 108 PTRRELOC(&__start___ftr_fixup), 109 PTRRELOC(&__stop___ftr_fixup)); 110 111 return KERNELBASE + offset; 112 } 113 114 115 /* 116 * Find out what kind of machine we're on and save any data we need 117 * from the early boot process (devtree is copied on pmac by prom_init()). 118 * This is called very early on the boot process, after a minimal 119 * MMU environment has been set up but before MMU_init is called. 120 */ 121 void __init machine_init(unsigned long dt_ptr, unsigned long phys) 122 { 123 /* Enable early debugging if any specified (see udbg.h) */ 124 udbg_early_init(); 125 126 /* Do some early initialization based on the flat device tree */ 127 early_init_devtree(__va(dt_ptr)); 128 129 probe_machine(); 130 131 #ifdef CONFIG_6xx 132 if (cpu_has_feature(CPU_FTR_CAN_DOZE) || 133 cpu_has_feature(CPU_FTR_CAN_NAP)) 134 ppc_md.power_save = ppc6xx_idle; 135 #endif 136 137 if (ppc_md.progress) 138 ppc_md.progress("id mach(): done", 0x200); 139 } 140 141 #ifdef CONFIG_BOOKE_WDT 142 /* Checks wdt=x and wdt_period=xx command-line option */ 143 int __init early_parse_wdt(char *p) 144 { 145 if (p && strncmp(p, "0", 1) != 0) 146 booke_wdt_enabled = 1; 147 148 return 0; 149 } 150 early_param("wdt", early_parse_wdt); 151 152 int __init early_parse_wdt_period (char *p) 153 { 154 if (p) 155 booke_wdt_period = simple_strtoul(p, NULL, 0); 156 157 return 0; 158 } 159 early_param("wdt_period", early_parse_wdt_period); 160 #endif /* CONFIG_BOOKE_WDT */ 161 162 /* Checks "l2cr=xxxx" command-line option */ 163 int __init ppc_setup_l2cr(char *str) 164 { 165 if (cpu_has_feature(CPU_FTR_L2CR)) { 166 unsigned long val = simple_strtoul(str, NULL, 0); 167 printk(KERN_INFO "l2cr set to %lx\n", val); 168 _set_L2CR(0); /* force invalidate by disable cache */ 169 _set_L2CR(val); /* and enable it */ 170 } 171 return 1; 172 } 173 __setup("l2cr=", ppc_setup_l2cr); 174 175 #ifdef CONFIG_GENERIC_NVRAM 176 177 /* Generic nvram hooks used by drivers/char/gen_nvram.c */ 178 unsigned char nvram_read_byte(int addr) 179 { 180 if (ppc_md.nvram_read_val) 181 return ppc_md.nvram_read_val(addr); 182 return 0xff; 183 } 184 EXPORT_SYMBOL(nvram_read_byte); 185 186 void nvram_write_byte(unsigned char val, int addr) 187 { 188 if (ppc_md.nvram_write_val) 189 ppc_md.nvram_write_val(addr, val); 190 } 191 EXPORT_SYMBOL(nvram_write_byte); 192 193 void nvram_sync(void) 194 { 195 if (ppc_md.nvram_sync) 196 ppc_md.nvram_sync(); 197 } 198 EXPORT_SYMBOL(nvram_sync); 199 200 #endif /* CONFIG_NVRAM */ 201 202 static DEFINE_PER_CPU(struct cpu, cpu_devices); 203 204 int __init ppc_init(void) 205 { 206 int cpu; 207 208 /* clear the progress line */ 209 if (ppc_md.progress) 210 ppc_md.progress(" ", 0xffff); 211 212 /* register CPU devices */ 213 for_each_possible_cpu(cpu) { 214 struct cpu *c = &per_cpu(cpu_devices, cpu); 215 c->hotpluggable = 1; 216 register_cpu(c, cpu); 217 } 218 219 /* call platform init */ 220 if (ppc_md.init != NULL) { 221 ppc_md.init(); 222 } 223 return 0; 224 } 225 226 arch_initcall(ppc_init); 227 228 /* Warning, IO base is not yet inited */ 229 void __init setup_arch(char **cmdline_p) 230 { 231 *cmdline_p = cmd_line; 232 233 /* so udelay does something sensible, assume <= 1000 bogomips */ 234 loops_per_jiffy = 500000000 / HZ; 235 236 unflatten_device_tree(); 237 check_for_initrd(); 238 239 if (ppc_md.init_early) 240 ppc_md.init_early(); 241 242 find_legacy_serial_ports(); 243 244 smp_setup_cpu_maps(); 245 246 /* Register early console */ 247 register_early_udbg_console(); 248 249 xmon_setup(); 250 251 #if defined(CONFIG_KGDB) 252 if (ppc_md.kgdb_map_scc) 253 ppc_md.kgdb_map_scc(); 254 set_debug_traps(); 255 if (strstr(cmd_line, "gdb")) { 256 if (ppc_md.progress) 257 ppc_md.progress("setup_arch: kgdb breakpoint", 0x4000); 258 printk("kgdb breakpoint activated\n"); 259 breakpoint(); 260 } 261 #endif 262 263 /* 264 * Set cache line size based on type of cpu as a default. 265 * Systems with OF can look in the properties on the cpu node(s) 266 * for a possibly more accurate value. 267 */ 268 dcache_bsize = cur_cpu_spec->dcache_bsize; 269 icache_bsize = cur_cpu_spec->icache_bsize; 270 ucache_bsize = 0; 271 if (cpu_has_feature(CPU_FTR_UNIFIED_ID_CACHE)) 272 ucache_bsize = icache_bsize = dcache_bsize; 273 274 /* reboot on panic */ 275 panic_timeout = 180; 276 277 if (ppc_md.panic) 278 setup_panic(); 279 280 init_mm.start_code = PAGE_OFFSET; 281 init_mm.end_code = (unsigned long) _etext; 282 init_mm.end_data = (unsigned long) _edata; 283 init_mm.brk = klimit; 284 285 /* set up the bootmem stuff with available memory */ 286 do_init_bootmem(); 287 if ( ppc_md.progress ) ppc_md.progress("setup_arch: bootmem", 0x3eab); 288 289 #ifdef CONFIG_DUMMY_CONSOLE 290 conswitchp = &dummy_con; 291 #endif 292 293 if (ppc_md.setup_arch) 294 ppc_md.setup_arch(); 295 if ( ppc_md.progress ) ppc_md.progress("arch: exit", 0x3eab); 296 297 paging_init(); 298 } 299