1 /* 2 * Common boot and setup code for both 32-bit and 64-bit. 3 * Extracted from arch/powerpc/kernel/setup_64.c. 4 * 5 * Copyright (C) 2001 PPC64 Team, IBM Corp 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 #undef DEBUG 14 15 #include <linux/export.h> 16 #include <linux/string.h> 17 #include <linux/sched.h> 18 #include <linux/init.h> 19 #include <linux/kernel.h> 20 #include <linux/reboot.h> 21 #include <linux/delay.h> 22 #include <linux/initrd.h> 23 #include <linux/platform_device.h> 24 #include <linux/seq_file.h> 25 #include <linux/ioport.h> 26 #include <linux/console.h> 27 #include <linux/screen_info.h> 28 #include <linux/root_dev.h> 29 #include <linux/notifier.h> 30 #include <linux/cpu.h> 31 #include <linux/unistd.h> 32 #include <linux/serial.h> 33 #include <linux/serial_8250.h> 34 #include <linux/percpu.h> 35 #include <linux/memblock.h> 36 #include <linux/of_platform.h> 37 #include <linux/hugetlb.h> 38 #include <asm/debugfs.h> 39 #include <asm/io.h> 40 #include <asm/paca.h> 41 #include <asm/prom.h> 42 #include <asm/processor.h> 43 #include <asm/vdso_datapage.h> 44 #include <asm/pgtable.h> 45 #include <asm/smp.h> 46 #include <asm/elf.h> 47 #include <asm/machdep.h> 48 #include <asm/time.h> 49 #include <asm/cputable.h> 50 #include <asm/sections.h> 51 #include <asm/firmware.h> 52 #include <asm/btext.h> 53 #include <asm/nvram.h> 54 #include <asm/setup.h> 55 #include <asm/rtas.h> 56 #include <asm/iommu.h> 57 #include <asm/serial.h> 58 #include <asm/cache.h> 59 #include <asm/page.h> 60 #include <asm/mmu.h> 61 #include <asm/xmon.h> 62 #include <asm/cputhreads.h> 63 #include <mm/mmu_decl.h> 64 #include <asm/fadump.h> 65 #include <asm/udbg.h> 66 #include <asm/hugetlb.h> 67 #include <asm/livepatch.h> 68 #include <asm/mmu_context.h> 69 #include <asm/cpu_has_feature.h> 70 71 #include "setup.h" 72 73 #ifdef DEBUG 74 #include <asm/udbg.h> 75 #define DBG(fmt...) udbg_printf(fmt) 76 #else 77 #define DBG(fmt...) 78 #endif 79 80 /* The main machine-dep calls structure 81 */ 82 struct machdep_calls ppc_md; 83 EXPORT_SYMBOL(ppc_md); 84 struct machdep_calls *machine_id; 85 EXPORT_SYMBOL(machine_id); 86 87 int boot_cpuid = -1; 88 EXPORT_SYMBOL_GPL(boot_cpuid); 89 90 /* 91 * These are used in binfmt_elf.c to put aux entries on the stack 92 * for each elf executable being started. 93 */ 94 int dcache_bsize; 95 int icache_bsize; 96 int ucache_bsize; 97 98 99 unsigned long klimit = (unsigned long) _end; 100 101 /* 102 * This still seems to be needed... -- paulus 103 */ 104 struct screen_info screen_info = { 105 .orig_x = 0, 106 .orig_y = 25, 107 .orig_video_cols = 80, 108 .orig_video_lines = 25, 109 .orig_video_isVGA = 1, 110 .orig_video_points = 16 111 }; 112 #if defined(CONFIG_FB_VGA16_MODULE) 113 EXPORT_SYMBOL(screen_info); 114 #endif 115 116 /* Variables required to store legacy IO irq routing */ 117 int of_i8042_kbd_irq; 118 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq); 119 int of_i8042_aux_irq; 120 EXPORT_SYMBOL_GPL(of_i8042_aux_irq); 121 122 #ifdef __DO_IRQ_CANON 123 /* XXX should go elsewhere eventually */ 124 int ppc_do_canonicalize_irqs; 125 EXPORT_SYMBOL(ppc_do_canonicalize_irqs); 126 #endif 127 128 #ifdef CONFIG_CRASH_CORE 129 /* This keeps a track of which one is the crashing cpu. */ 130 int crashing_cpu = -1; 131 #endif 132 133 /* also used by kexec */ 134 void machine_shutdown(void) 135 { 136 #ifdef CONFIG_FA_DUMP 137 /* 138 * if fadump is active, cleanup the fadump registration before we 139 * shutdown. 140 */ 141 fadump_cleanup(); 142 #endif 143 144 if (ppc_md.machine_shutdown) 145 ppc_md.machine_shutdown(); 146 } 147 148 static void machine_hang(void) 149 { 150 pr_emerg("System Halted, OK to turn off power\n"); 151 local_irq_disable(); 152 while (1) 153 ; 154 } 155 156 void machine_restart(char *cmd) 157 { 158 machine_shutdown(); 159 if (ppc_md.restart) 160 ppc_md.restart(cmd); 161 162 smp_send_stop(); 163 164 do_kernel_restart(cmd); 165 mdelay(1000); 166 167 machine_hang(); 168 } 169 170 void machine_power_off(void) 171 { 172 machine_shutdown(); 173 if (pm_power_off) 174 pm_power_off(); 175 176 smp_send_stop(); 177 machine_hang(); 178 } 179 /* Used by the G5 thermal driver */ 180 EXPORT_SYMBOL_GPL(machine_power_off); 181 182 void (*pm_power_off)(void); 183 EXPORT_SYMBOL_GPL(pm_power_off); 184 185 void machine_halt(void) 186 { 187 machine_shutdown(); 188 if (ppc_md.halt) 189 ppc_md.halt(); 190 191 smp_send_stop(); 192 machine_hang(); 193 } 194 195 196 #ifdef CONFIG_TAU 197 extern u32 cpu_temp(unsigned long cpu); 198 extern u32 cpu_temp_both(unsigned long cpu); 199 #endif /* CONFIG_TAU */ 200 201 #ifdef CONFIG_SMP 202 DEFINE_PER_CPU(unsigned int, cpu_pvr); 203 #endif 204 205 static void show_cpuinfo_summary(struct seq_file *m) 206 { 207 struct device_node *root; 208 const char *model = NULL; 209 #if defined(CONFIG_SMP) && defined(CONFIG_PPC32) 210 unsigned long bogosum = 0; 211 int i; 212 for_each_online_cpu(i) 213 bogosum += loops_per_jiffy; 214 seq_printf(m, "total bogomips\t: %lu.%02lu\n", 215 bogosum/(500000/HZ), bogosum/(5000/HZ) % 100); 216 #endif /* CONFIG_SMP && CONFIG_PPC32 */ 217 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq); 218 if (ppc_md.name) 219 seq_printf(m, "platform\t: %s\n", ppc_md.name); 220 root = of_find_node_by_path("/"); 221 if (root) 222 model = of_get_property(root, "model", NULL); 223 if (model) 224 seq_printf(m, "model\t\t: %s\n", model); 225 of_node_put(root); 226 227 if (ppc_md.show_cpuinfo != NULL) 228 ppc_md.show_cpuinfo(m); 229 230 #ifdef CONFIG_PPC32 231 /* Display the amount of memory */ 232 seq_printf(m, "Memory\t\t: %d MB\n", 233 (unsigned int)(total_memory / (1024 * 1024))); 234 #endif 235 } 236 237 static int show_cpuinfo(struct seq_file *m, void *v) 238 { 239 unsigned long cpu_id = (unsigned long)v - 1; 240 unsigned int pvr; 241 unsigned long proc_freq; 242 unsigned short maj; 243 unsigned short min; 244 245 #ifdef CONFIG_SMP 246 pvr = per_cpu(cpu_pvr, cpu_id); 247 #else 248 pvr = mfspr(SPRN_PVR); 249 #endif 250 maj = (pvr >> 8) & 0xFF; 251 min = pvr & 0xFF; 252 253 seq_printf(m, "processor\t: %lu\n", cpu_id); 254 seq_printf(m, "cpu\t\t: "); 255 256 if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name) 257 seq_printf(m, "%s", cur_cpu_spec->cpu_name); 258 else 259 seq_printf(m, "unknown (%08x)", pvr); 260 261 #ifdef CONFIG_ALTIVEC 262 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 263 seq_printf(m, ", altivec supported"); 264 #endif /* CONFIG_ALTIVEC */ 265 266 seq_printf(m, "\n"); 267 268 #ifdef CONFIG_TAU 269 if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) { 270 #ifdef CONFIG_TAU_AVERAGE 271 /* more straightforward, but potentially misleading */ 272 seq_printf(m, "temperature \t: %u C (uncalibrated)\n", 273 cpu_temp(cpu_id)); 274 #else 275 /* show the actual temp sensor range */ 276 u32 temp; 277 temp = cpu_temp_both(cpu_id); 278 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n", 279 temp & 0xff, temp >> 16); 280 #endif 281 } 282 #endif /* CONFIG_TAU */ 283 284 /* 285 * Platforms that have variable clock rates, should implement 286 * the method ppc_md.get_proc_freq() that reports the clock 287 * rate of a given cpu. The rest can use ppc_proc_freq to 288 * report the clock rate that is same across all cpus. 289 */ 290 if (ppc_md.get_proc_freq) 291 proc_freq = ppc_md.get_proc_freq(cpu_id); 292 else 293 proc_freq = ppc_proc_freq; 294 295 if (proc_freq) 296 seq_printf(m, "clock\t\t: %lu.%06luMHz\n", 297 proc_freq / 1000000, proc_freq % 1000000); 298 299 if (ppc_md.show_percpuinfo != NULL) 300 ppc_md.show_percpuinfo(m, cpu_id); 301 302 /* If we are a Freescale core do a simple check so 303 * we dont have to keep adding cases in the future */ 304 if (PVR_VER(pvr) & 0x8000) { 305 switch (PVR_VER(pvr)) { 306 case 0x8000: /* 7441/7450/7451, Voyager */ 307 case 0x8001: /* 7445/7455, Apollo 6 */ 308 case 0x8002: /* 7447/7457, Apollo 7 */ 309 case 0x8003: /* 7447A, Apollo 7 PM */ 310 case 0x8004: /* 7448, Apollo 8 */ 311 case 0x800c: /* 7410, Nitro */ 312 maj = ((pvr >> 8) & 0xF); 313 min = PVR_MIN(pvr); 314 break; 315 default: /* e500/book-e */ 316 maj = PVR_MAJ(pvr); 317 min = PVR_MIN(pvr); 318 break; 319 } 320 } else { 321 switch (PVR_VER(pvr)) { 322 case 0x0020: /* 403 family */ 323 maj = PVR_MAJ(pvr) + 1; 324 min = PVR_MIN(pvr); 325 break; 326 case 0x1008: /* 740P/750P ?? */ 327 maj = ((pvr >> 8) & 0xFF) - 1; 328 min = pvr & 0xFF; 329 break; 330 case 0x004e: /* POWER9 bits 12-15 give chip type */ 331 maj = (pvr >> 8) & 0x0F; 332 min = pvr & 0xFF; 333 break; 334 default: 335 maj = (pvr >> 8) & 0xFF; 336 min = pvr & 0xFF; 337 break; 338 } 339 } 340 341 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n", 342 maj, min, PVR_VER(pvr), PVR_REV(pvr)); 343 344 #ifdef CONFIG_PPC32 345 seq_printf(m, "bogomips\t: %lu.%02lu\n", 346 loops_per_jiffy / (500000/HZ), 347 (loops_per_jiffy / (5000/HZ)) % 100); 348 #endif 349 seq_printf(m, "\n"); 350 351 /* If this is the last cpu, print the summary */ 352 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids) 353 show_cpuinfo_summary(m); 354 355 return 0; 356 } 357 358 static void *c_start(struct seq_file *m, loff_t *pos) 359 { 360 if (*pos == 0) /* just in case, cpu 0 is not the first */ 361 *pos = cpumask_first(cpu_online_mask); 362 else 363 *pos = cpumask_next(*pos - 1, cpu_online_mask); 364 if ((*pos) < nr_cpu_ids) 365 return (void *)(unsigned long)(*pos + 1); 366 return NULL; 367 } 368 369 static void *c_next(struct seq_file *m, void *v, loff_t *pos) 370 { 371 (*pos)++; 372 return c_start(m, pos); 373 } 374 375 static void c_stop(struct seq_file *m, void *v) 376 { 377 } 378 379 const struct seq_operations cpuinfo_op = { 380 .start = c_start, 381 .next = c_next, 382 .stop = c_stop, 383 .show = show_cpuinfo, 384 }; 385 386 void __init check_for_initrd(void) 387 { 388 #ifdef CONFIG_BLK_DEV_INITRD 389 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n", 390 initrd_start, initrd_end); 391 392 /* If we were passed an initrd, set the ROOT_DEV properly if the values 393 * look sensible. If not, clear initrd reference. 394 */ 395 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) && 396 initrd_end > initrd_start) 397 ROOT_DEV = Root_RAM0; 398 else 399 initrd_start = initrd_end = 0; 400 401 if (initrd_start) 402 pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end); 403 404 DBG(" <- check_for_initrd()\n"); 405 #endif /* CONFIG_BLK_DEV_INITRD */ 406 } 407 408 #ifdef CONFIG_SMP 409 410 int threads_per_core, threads_per_subcore, threads_shift; 411 cpumask_t threads_core_mask; 412 EXPORT_SYMBOL_GPL(threads_per_core); 413 EXPORT_SYMBOL_GPL(threads_per_subcore); 414 EXPORT_SYMBOL_GPL(threads_shift); 415 EXPORT_SYMBOL_GPL(threads_core_mask); 416 417 static void __init cpu_init_thread_core_maps(int tpc) 418 { 419 int i; 420 421 threads_per_core = tpc; 422 threads_per_subcore = tpc; 423 cpumask_clear(&threads_core_mask); 424 425 /* This implementation only supports power of 2 number of threads 426 * for simplicity and performance 427 */ 428 threads_shift = ilog2(tpc); 429 BUG_ON(tpc != (1 << threads_shift)); 430 431 for (i = 0; i < tpc; i++) 432 cpumask_set_cpu(i, &threads_core_mask); 433 434 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n", 435 tpc, tpc > 1 ? "s" : ""); 436 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift); 437 } 438 439 440 /** 441 * setup_cpu_maps - initialize the following cpu maps: 442 * cpu_possible_mask 443 * cpu_present_mask 444 * 445 * Having the possible map set up early allows us to restrict allocations 446 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS. 447 * 448 * We do not initialize the online map here; cpus set their own bits in 449 * cpu_online_mask as they come up. 450 * 451 * This function is valid only for Open Firmware systems. finish_device_tree 452 * must be called before using this. 453 * 454 * While we're here, we may as well set the "physical" cpu ids in the paca. 455 * 456 * NOTE: This must match the parsing done in early_init_dt_scan_cpus. 457 */ 458 void __init smp_setup_cpu_maps(void) 459 { 460 struct device_node *dn; 461 int cpu = 0; 462 int nthreads = 1; 463 464 DBG("smp_setup_cpu_maps()\n"); 465 466 for_each_node_by_type(dn, "cpu") { 467 const __be32 *intserv; 468 __be32 cpu_be; 469 int j, len; 470 471 DBG(" * %pOF...\n", dn); 472 473 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", 474 &len); 475 if (intserv) { 476 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n", 477 nthreads); 478 } else { 479 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n"); 480 intserv = of_get_property(dn, "reg", &len); 481 if (!intserv) { 482 cpu_be = cpu_to_be32(cpu); 483 intserv = &cpu_be; /* assume logical == phys */ 484 len = 4; 485 } 486 } 487 488 nthreads = len / sizeof(int); 489 490 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) { 491 bool avail; 492 493 DBG(" thread %d -> cpu %d (hard id %d)\n", 494 j, cpu, be32_to_cpu(intserv[j])); 495 496 avail = of_device_is_available(dn); 497 if (!avail) 498 avail = !of_property_match_string(dn, 499 "enable-method", "spin-table"); 500 501 set_cpu_present(cpu, avail); 502 set_hard_smp_processor_id(cpu, be32_to_cpu(intserv[j])); 503 set_cpu_possible(cpu, true); 504 cpu++; 505 } 506 507 if (cpu >= nr_cpu_ids) { 508 of_node_put(dn); 509 break; 510 } 511 } 512 513 /* If no SMT supported, nthreads is forced to 1 */ 514 if (!cpu_has_feature(CPU_FTR_SMT)) { 515 DBG(" SMT disabled ! nthreads forced to 1\n"); 516 nthreads = 1; 517 } 518 519 #ifdef CONFIG_PPC64 520 /* 521 * On pSeries LPAR, we need to know how many cpus 522 * could possibly be added to this partition. 523 */ 524 if (firmware_has_feature(FW_FEATURE_LPAR) && 525 (dn = of_find_node_by_path("/rtas"))) { 526 int num_addr_cell, num_size_cell, maxcpus; 527 const __be32 *ireg; 528 529 num_addr_cell = of_n_addr_cells(dn); 530 num_size_cell = of_n_size_cells(dn); 531 532 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL); 533 534 if (!ireg) 535 goto out; 536 537 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell); 538 539 /* Double maxcpus for processors which have SMT capability */ 540 if (cpu_has_feature(CPU_FTR_SMT)) 541 maxcpus *= nthreads; 542 543 if (maxcpus > nr_cpu_ids) { 544 printk(KERN_WARNING 545 "Partition configured for %d cpus, " 546 "operating system maximum is %u.\n", 547 maxcpus, nr_cpu_ids); 548 maxcpus = nr_cpu_ids; 549 } else 550 printk(KERN_INFO "Partition configured for %d cpus.\n", 551 maxcpus); 552 553 for (cpu = 0; cpu < maxcpus; cpu++) 554 set_cpu_possible(cpu, true); 555 out: 556 of_node_put(dn); 557 } 558 vdso_data->processorCount = num_present_cpus(); 559 #endif /* CONFIG_PPC64 */ 560 561 /* Initialize CPU <=> thread mapping/ 562 * 563 * WARNING: We assume that the number of threads is the same for 564 * every CPU in the system. If that is not the case, then some code 565 * here will have to be reworked 566 */ 567 cpu_init_thread_core_maps(nthreads); 568 569 /* Now that possible cpus are set, set nr_cpu_ids for later use */ 570 setup_nr_cpu_ids(); 571 572 free_unused_pacas(); 573 } 574 #endif /* CONFIG_SMP */ 575 576 #ifdef CONFIG_PCSPKR_PLATFORM 577 static __init int add_pcspkr(void) 578 { 579 struct device_node *np; 580 struct platform_device *pd; 581 int ret; 582 583 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100"); 584 of_node_put(np); 585 if (!np) 586 return -ENODEV; 587 588 pd = platform_device_alloc("pcspkr", -1); 589 if (!pd) 590 return -ENOMEM; 591 592 ret = platform_device_add(pd); 593 if (ret) 594 platform_device_put(pd); 595 596 return ret; 597 } 598 device_initcall(add_pcspkr); 599 #endif /* CONFIG_PCSPKR_PLATFORM */ 600 601 void probe_machine(void) 602 { 603 extern struct machdep_calls __machine_desc_start; 604 extern struct machdep_calls __machine_desc_end; 605 unsigned int i; 606 607 /* 608 * Iterate all ppc_md structures until we find the proper 609 * one for the current machine type 610 */ 611 DBG("Probing machine type ...\n"); 612 613 /* 614 * Check ppc_md is empty, if not we have a bug, ie, we setup an 615 * entry before probe_machine() which will be overwritten 616 */ 617 for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) { 618 if (((void **)&ppc_md)[i]) { 619 printk(KERN_ERR "Entry %d in ppc_md non empty before" 620 " machine probe !\n", i); 621 } 622 } 623 624 for (machine_id = &__machine_desc_start; 625 machine_id < &__machine_desc_end; 626 machine_id++) { 627 DBG(" %s ...", machine_id->name); 628 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls)); 629 if (ppc_md.probe()) { 630 DBG(" match !\n"); 631 break; 632 } 633 DBG("\n"); 634 } 635 /* What can we do if we didn't find ? */ 636 if (machine_id >= &__machine_desc_end) { 637 DBG("No suitable machine found !\n"); 638 for (;;); 639 } 640 641 printk(KERN_INFO "Using %s machine description\n", ppc_md.name); 642 } 643 644 /* Match a class of boards, not a specific device configuration. */ 645 int check_legacy_ioport(unsigned long base_port) 646 { 647 struct device_node *parent, *np = NULL; 648 int ret = -ENODEV; 649 650 switch(base_port) { 651 case I8042_DATA_REG: 652 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303"))) 653 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03"); 654 if (np) { 655 parent = of_get_parent(np); 656 657 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0); 658 if (!of_i8042_kbd_irq) 659 of_i8042_kbd_irq = 1; 660 661 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1); 662 if (!of_i8042_aux_irq) 663 of_i8042_aux_irq = 12; 664 665 of_node_put(np); 666 np = parent; 667 break; 668 } 669 np = of_find_node_by_type(NULL, "8042"); 670 /* Pegasos has no device_type on its 8042 node, look for the 671 * name instead */ 672 if (!np) 673 np = of_find_node_by_name(NULL, "8042"); 674 if (np) { 675 of_i8042_kbd_irq = 1; 676 of_i8042_aux_irq = 12; 677 } 678 break; 679 case FDC_BASE: /* FDC1 */ 680 np = of_find_node_by_type(NULL, "fdc"); 681 break; 682 default: 683 /* ipmi is supposed to fail here */ 684 break; 685 } 686 if (!np) 687 return ret; 688 parent = of_get_parent(np); 689 if (parent) { 690 if (strcmp(parent->type, "isa") == 0) 691 ret = 0; 692 of_node_put(parent); 693 } 694 of_node_put(np); 695 return ret; 696 } 697 EXPORT_SYMBOL(check_legacy_ioport); 698 699 static int ppc_panic_event(struct notifier_block *this, 700 unsigned long event, void *ptr) 701 { 702 /* 703 * If firmware-assisted dump has been registered then trigger 704 * firmware-assisted dump and let firmware handle everything else. 705 */ 706 crash_fadump(NULL, ptr); 707 ppc_md.panic(ptr); /* May not return */ 708 return NOTIFY_DONE; 709 } 710 711 static struct notifier_block ppc_panic_block = { 712 .notifier_call = ppc_panic_event, 713 .priority = INT_MIN /* may not return; must be done last */ 714 }; 715 716 void __init setup_panic(void) 717 { 718 if (!ppc_md.panic) 719 return; 720 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block); 721 } 722 723 #ifdef CONFIG_CHECK_CACHE_COHERENCY 724 /* 725 * For platforms that have configurable cache-coherency. This function 726 * checks that the cache coherency setting of the kernel matches the setting 727 * left by the firmware, as indicated in the device tree. Since a mismatch 728 * will eventually result in DMA failures, we print * and error and call 729 * BUG() in that case. 730 */ 731 732 #ifdef CONFIG_NOT_COHERENT_CACHE 733 #define KERNEL_COHERENCY 0 734 #else 735 #define KERNEL_COHERENCY 1 736 #endif 737 738 static int __init check_cache_coherency(void) 739 { 740 struct device_node *np; 741 const void *prop; 742 int devtree_coherency; 743 744 np = of_find_node_by_path("/"); 745 prop = of_get_property(np, "coherency-off", NULL); 746 of_node_put(np); 747 748 devtree_coherency = prop ? 0 : 1; 749 750 if (devtree_coherency != KERNEL_COHERENCY) { 751 printk(KERN_ERR 752 "kernel coherency:%s != device tree_coherency:%s\n", 753 KERNEL_COHERENCY ? "on" : "off", 754 devtree_coherency ? "on" : "off"); 755 BUG(); 756 } 757 758 return 0; 759 } 760 761 late_initcall(check_cache_coherency); 762 #endif /* CONFIG_CHECK_CACHE_COHERENCY */ 763 764 #ifdef CONFIG_DEBUG_FS 765 struct dentry *powerpc_debugfs_root; 766 EXPORT_SYMBOL(powerpc_debugfs_root); 767 768 static int powerpc_debugfs_init(void) 769 { 770 powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL); 771 772 return powerpc_debugfs_root == NULL; 773 } 774 arch_initcall(powerpc_debugfs_init); 775 #endif 776 777 void ppc_printk_progress(char *s, unsigned short hex) 778 { 779 pr_info("%s\n", s); 780 } 781 782 void arch_setup_pdev_archdata(struct platform_device *pdev) 783 { 784 pdev->archdata.dma_mask = DMA_BIT_MASK(32); 785 pdev->dev.dma_mask = &pdev->archdata.dma_mask; 786 set_dma_ops(&pdev->dev, &dma_nommu_ops); 787 } 788 789 static __init void print_system_info(void) 790 { 791 pr_info("-----------------------------------------------------\n"); 792 #ifdef CONFIG_PPC_BOOK3S_64 793 pr_info("ppc64_pft_size = 0x%llx\n", ppc64_pft_size); 794 #endif 795 #ifdef CONFIG_PPC_STD_MMU_32 796 pr_info("Hash_size = 0x%lx\n", Hash_size); 797 #endif 798 pr_info("phys_mem_size = 0x%llx\n", 799 (unsigned long long)memblock_phys_mem_size()); 800 801 pr_info("dcache_bsize = 0x%x\n", dcache_bsize); 802 pr_info("icache_bsize = 0x%x\n", icache_bsize); 803 if (ucache_bsize != 0) 804 pr_info("ucache_bsize = 0x%x\n", ucache_bsize); 805 806 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features); 807 pr_info(" possible = 0x%016lx\n", 808 (unsigned long)CPU_FTRS_POSSIBLE); 809 pr_info(" always = 0x%016lx\n", 810 (unsigned long)CPU_FTRS_ALWAYS); 811 pr_info("cpu_user_features = 0x%08x 0x%08x\n", 812 cur_cpu_spec->cpu_user_features, 813 cur_cpu_spec->cpu_user_features2); 814 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features); 815 #ifdef CONFIG_PPC64 816 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features); 817 #endif 818 819 #ifdef CONFIG_PPC_BOOK3S_64 820 if (htab_address) 821 pr_info("htab_address = 0x%p\n", htab_address); 822 if (htab_hash_mask) 823 pr_info("htab_hash_mask = 0x%lx\n", htab_hash_mask); 824 #endif 825 #ifdef CONFIG_PPC_STD_MMU_32 826 if (Hash) 827 pr_info("Hash = 0x%p\n", Hash); 828 if (Hash_mask) 829 pr_info("Hash_mask = 0x%lx\n", Hash_mask); 830 #endif 831 832 if (PHYSICAL_START > 0) 833 pr_info("physical_start = 0x%llx\n", 834 (unsigned long long)PHYSICAL_START); 835 pr_info("-----------------------------------------------------\n"); 836 } 837 838 /* 839 * Called into from start_kernel this initializes memblock, which is used 840 * to manage page allocation until mem_init is called. 841 */ 842 void __init setup_arch(char **cmdline_p) 843 { 844 *cmdline_p = boot_command_line; 845 846 /* Set a half-reasonable default so udelay does something sensible */ 847 loops_per_jiffy = 500000000 / HZ; 848 849 /* Unflatten the device-tree passed by prom_init or kexec */ 850 unflatten_device_tree(); 851 852 /* 853 * Initialize cache line/block info from device-tree (on ppc64) or 854 * just cputable (on ppc32). 855 */ 856 initialize_cache_info(); 857 858 /* Initialize RTAS if available. */ 859 rtas_initialize(); 860 861 /* Check if we have an initrd provided via the device-tree. */ 862 check_for_initrd(); 863 864 /* Probe the machine type, establish ppc_md. */ 865 probe_machine(); 866 867 /* Setup panic notifier if requested by the platform. */ 868 setup_panic(); 869 870 /* 871 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do 872 * it from their respective probe() function. 873 */ 874 setup_power_save(); 875 876 /* Discover standard serial ports. */ 877 find_legacy_serial_ports(); 878 879 /* Register early console with the printk subsystem. */ 880 register_early_udbg_console(); 881 882 /* Setup the various CPU maps based on the device-tree. */ 883 smp_setup_cpu_maps(); 884 885 /* Initialize xmon. */ 886 xmon_setup(); 887 888 /* Check the SMT related command line arguments (ppc64). */ 889 check_smt_enabled(); 890 891 /* On BookE, setup per-core TLB data structures. */ 892 setup_tlb_core_data(); 893 894 /* 895 * Release secondary cpus out of their spinloops at 0x60 now that 896 * we can map physical -> logical CPU ids. 897 * 898 * Freescale Book3e parts spin in a loop provided by firmware, 899 * so smp_release_cpus() does nothing for them. 900 */ 901 #ifdef CONFIG_SMP 902 smp_release_cpus(); 903 #endif 904 905 /* Print various info about the machine that has been gathered so far. */ 906 print_system_info(); 907 908 /* Reserve large chunks of memory for use by CMA for KVM. */ 909 kvm_cma_reserve(); 910 911 klp_init_thread_info(&init_thread_info); 912 913 init_mm.start_code = (unsigned long)_stext; 914 init_mm.end_code = (unsigned long) _etext; 915 init_mm.end_data = (unsigned long) _edata; 916 init_mm.brk = klimit; 917 918 #ifdef CONFIG_PPC_MM_SLICES 919 #ifdef CONFIG_PPC64 920 if (!radix_enabled()) 921 init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW_USER64; 922 #else 923 #error "context.addr_limit not initialized." 924 #endif 925 #endif 926 927 #ifdef CONFIG_SPAPR_TCE_IOMMU 928 mm_iommu_init(&init_mm); 929 #endif 930 irqstack_early_init(); 931 exc_lvl_early_init(); 932 emergency_stack_init(); 933 934 initmem_init(); 935 936 #ifdef CONFIG_DUMMY_CONSOLE 937 conswitchp = &dummy_con; 938 #endif 939 if (ppc_md.setup_arch) 940 ppc_md.setup_arch(); 941 942 paging_init(); 943 944 /* Initialize the MMU context management stuff. */ 945 mmu_context_init(); 946 947 #ifdef CONFIG_PPC64 948 /* Interrupt code needs to be 64K-aligned. */ 949 if ((unsigned long)_stext & 0xffff) 950 panic("Kernelbase not 64K-aligned (0x%lx)!\n", 951 (unsigned long)_stext); 952 #endif 953 } 954