1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Common boot and setup code for both 32-bit and 64-bit.
4  * Extracted from arch/powerpc/kernel/setup_64.c.
5  *
6  * Copyright (C) 2001 PPC64 Team, IBM Corp
7  */
8 
9 #undef DEBUG
10 
11 #include <linux/export.h>
12 #include <linux/panic_notifier.h>
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/init.h>
16 #include <linux/kernel.h>
17 #include <linux/reboot.h>
18 #include <linux/delay.h>
19 #include <linux/initrd.h>
20 #include <linux/platform_device.h>
21 #include <linux/seq_file.h>
22 #include <linux/ioport.h>
23 #include <linux/console.h>
24 #include <linux/screen_info.h>
25 #include <linux/root_dev.h>
26 #include <linux/notifier.h>
27 #include <linux/cpu.h>
28 #include <linux/unistd.h>
29 #include <linux/serial.h>
30 #include <linux/serial_8250.h>
31 #include <linux/percpu.h>
32 #include <linux/memblock.h>
33 #include <linux/of_platform.h>
34 #include <linux/hugetlb.h>
35 #include <linux/pgtable.h>
36 #include <asm/debugfs.h>
37 #include <asm/io.h>
38 #include <asm/paca.h>
39 #include <asm/prom.h>
40 #include <asm/processor.h>
41 #include <asm/vdso_datapage.h>
42 #include <asm/smp.h>
43 #include <asm/elf.h>
44 #include <asm/machdep.h>
45 #include <asm/time.h>
46 #include <asm/cputable.h>
47 #include <asm/sections.h>
48 #include <asm/firmware.h>
49 #include <asm/btext.h>
50 #include <asm/nvram.h>
51 #include <asm/setup.h>
52 #include <asm/rtas.h>
53 #include <asm/iommu.h>
54 #include <asm/serial.h>
55 #include <asm/cache.h>
56 #include <asm/page.h>
57 #include <asm/mmu.h>
58 #include <asm/xmon.h>
59 #include <asm/cputhreads.h>
60 #include <mm/mmu_decl.h>
61 #include <asm/fadump.h>
62 #include <asm/udbg.h>
63 #include <asm/hugetlb.h>
64 #include <asm/livepatch.h>
65 #include <asm/mmu_context.h>
66 #include <asm/cpu_has_feature.h>
67 #include <asm/kasan.h>
68 #include <asm/mce.h>
69 
70 #include "setup.h"
71 
72 #ifdef DEBUG
73 #define DBG(fmt...) udbg_printf(fmt)
74 #else
75 #define DBG(fmt...)
76 #endif
77 
78 /* The main machine-dep calls structure
79  */
80 struct machdep_calls ppc_md;
81 EXPORT_SYMBOL(ppc_md);
82 struct machdep_calls *machine_id;
83 EXPORT_SYMBOL(machine_id);
84 
85 int boot_cpuid = -1;
86 EXPORT_SYMBOL_GPL(boot_cpuid);
87 
88 /*
89  * These are used in binfmt_elf.c to put aux entries on the stack
90  * for each elf executable being started.
91  */
92 int dcache_bsize;
93 int icache_bsize;
94 
95 /*
96  * This still seems to be needed... -- paulus
97  */
98 struct screen_info screen_info = {
99 	.orig_x = 0,
100 	.orig_y = 25,
101 	.orig_video_cols = 80,
102 	.orig_video_lines = 25,
103 	.orig_video_isVGA = 1,
104 	.orig_video_points = 16
105 };
106 #if defined(CONFIG_FB_VGA16_MODULE)
107 EXPORT_SYMBOL(screen_info);
108 #endif
109 
110 /* Variables required to store legacy IO irq routing */
111 int of_i8042_kbd_irq;
112 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
113 int of_i8042_aux_irq;
114 EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
115 
116 #ifdef __DO_IRQ_CANON
117 /* XXX should go elsewhere eventually */
118 int ppc_do_canonicalize_irqs;
119 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
120 #endif
121 
122 #ifdef CONFIG_CRASH_CORE
123 /* This keeps a track of which one is the crashing cpu. */
124 int crashing_cpu = -1;
125 #endif
126 
127 /* also used by kexec */
128 void machine_shutdown(void)
129 {
130 	/*
131 	 * if fadump is active, cleanup the fadump registration before we
132 	 * shutdown.
133 	 */
134 	fadump_cleanup();
135 
136 	if (ppc_md.machine_shutdown)
137 		ppc_md.machine_shutdown();
138 }
139 
140 static void machine_hang(void)
141 {
142 	pr_emerg("System Halted, OK to turn off power\n");
143 	local_irq_disable();
144 	while (1)
145 		;
146 }
147 
148 void machine_restart(char *cmd)
149 {
150 	machine_shutdown();
151 	if (ppc_md.restart)
152 		ppc_md.restart(cmd);
153 
154 	smp_send_stop();
155 
156 	do_kernel_restart(cmd);
157 	mdelay(1000);
158 
159 	machine_hang();
160 }
161 
162 void machine_power_off(void)
163 {
164 	machine_shutdown();
165 	if (pm_power_off)
166 		pm_power_off();
167 
168 	smp_send_stop();
169 	machine_hang();
170 }
171 /* Used by the G5 thermal driver */
172 EXPORT_SYMBOL_GPL(machine_power_off);
173 
174 void (*pm_power_off)(void);
175 EXPORT_SYMBOL_GPL(pm_power_off);
176 
177 void machine_halt(void)
178 {
179 	machine_shutdown();
180 	if (ppc_md.halt)
181 		ppc_md.halt();
182 
183 	smp_send_stop();
184 	machine_hang();
185 }
186 
187 #ifdef CONFIG_SMP
188 DEFINE_PER_CPU(unsigned int, cpu_pvr);
189 #endif
190 
191 static void show_cpuinfo_summary(struct seq_file *m)
192 {
193 	struct device_node *root;
194 	const char *model = NULL;
195 	unsigned long bogosum = 0;
196 	int i;
197 
198 	if (IS_ENABLED(CONFIG_SMP) && IS_ENABLED(CONFIG_PPC32)) {
199 		for_each_online_cpu(i)
200 			bogosum += loops_per_jiffy;
201 		seq_printf(m, "total bogomips\t: %lu.%02lu\n",
202 			   bogosum / (500000 / HZ), bogosum / (5000 / HZ) % 100);
203 	}
204 	seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
205 	if (ppc_md.name)
206 		seq_printf(m, "platform\t: %s\n", ppc_md.name);
207 	root = of_find_node_by_path("/");
208 	if (root)
209 		model = of_get_property(root, "model", NULL);
210 	if (model)
211 		seq_printf(m, "model\t\t: %s\n", model);
212 	of_node_put(root);
213 
214 	if (ppc_md.show_cpuinfo != NULL)
215 		ppc_md.show_cpuinfo(m);
216 
217 	/* Display the amount of memory */
218 	if (IS_ENABLED(CONFIG_PPC32))
219 		seq_printf(m, "Memory\t\t: %d MB\n",
220 			   (unsigned int)(total_memory / (1024 * 1024)));
221 }
222 
223 static int show_cpuinfo(struct seq_file *m, void *v)
224 {
225 	unsigned long cpu_id = (unsigned long)v - 1;
226 	unsigned int pvr;
227 	unsigned long proc_freq;
228 	unsigned short maj;
229 	unsigned short min;
230 
231 #ifdef CONFIG_SMP
232 	pvr = per_cpu(cpu_pvr, cpu_id);
233 #else
234 	pvr = mfspr(SPRN_PVR);
235 #endif
236 	maj = (pvr >> 8) & 0xFF;
237 	min = pvr & 0xFF;
238 
239 	seq_printf(m, "processor\t: %lu\ncpu\t\t: ", cpu_id);
240 
241 	if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
242 		seq_puts(m, cur_cpu_spec->cpu_name);
243 	else
244 		seq_printf(m, "unknown (%08x)", pvr);
245 
246 	if (cpu_has_feature(CPU_FTR_ALTIVEC))
247 		seq_puts(m, ", altivec supported");
248 
249 	seq_putc(m, '\n');
250 
251 #ifdef CONFIG_TAU
252 	if (cpu_has_feature(CPU_FTR_TAU)) {
253 		if (IS_ENABLED(CONFIG_TAU_AVERAGE)) {
254 			/* more straightforward, but potentially misleading */
255 			seq_printf(m,  "temperature \t: %u C (uncalibrated)\n",
256 				   cpu_temp(cpu_id));
257 		} else {
258 			/* show the actual temp sensor range */
259 			u32 temp;
260 			temp = cpu_temp_both(cpu_id);
261 			seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
262 				   temp & 0xff, temp >> 16);
263 		}
264 	}
265 #endif /* CONFIG_TAU */
266 
267 	/*
268 	 * Platforms that have variable clock rates, should implement
269 	 * the method ppc_md.get_proc_freq() that reports the clock
270 	 * rate of a given cpu. The rest can use ppc_proc_freq to
271 	 * report the clock rate that is same across all cpus.
272 	 */
273 	if (ppc_md.get_proc_freq)
274 		proc_freq = ppc_md.get_proc_freq(cpu_id);
275 	else
276 		proc_freq = ppc_proc_freq;
277 
278 	if (proc_freq)
279 		seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
280 			   proc_freq / 1000000, proc_freq % 1000000);
281 
282 	if (ppc_md.show_percpuinfo != NULL)
283 		ppc_md.show_percpuinfo(m, cpu_id);
284 
285 	/* If we are a Freescale core do a simple check so
286 	 * we dont have to keep adding cases in the future */
287 	if (PVR_VER(pvr) & 0x8000) {
288 		switch (PVR_VER(pvr)) {
289 		case 0x8000:	/* 7441/7450/7451, Voyager */
290 		case 0x8001:	/* 7445/7455, Apollo 6 */
291 		case 0x8002:	/* 7447/7457, Apollo 7 */
292 		case 0x8003:	/* 7447A, Apollo 7 PM */
293 		case 0x8004:	/* 7448, Apollo 8 */
294 		case 0x800c:	/* 7410, Nitro */
295 			maj = ((pvr >> 8) & 0xF);
296 			min = PVR_MIN(pvr);
297 			break;
298 		default:	/* e500/book-e */
299 			maj = PVR_MAJ(pvr);
300 			min = PVR_MIN(pvr);
301 			break;
302 		}
303 	} else {
304 		switch (PVR_VER(pvr)) {
305 			case 0x1008:	/* 740P/750P ?? */
306 				maj = ((pvr >> 8) & 0xFF) - 1;
307 				min = pvr & 0xFF;
308 				break;
309 			case 0x004e: /* POWER9 bits 12-15 give chip type */
310 			case 0x0080: /* POWER10 bit 12 gives SMT8/4 */
311 				maj = (pvr >> 8) & 0x0F;
312 				min = pvr & 0xFF;
313 				break;
314 			default:
315 				maj = (pvr >> 8) & 0xFF;
316 				min = pvr & 0xFF;
317 				break;
318 		}
319 	}
320 
321 	seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
322 		   maj, min, PVR_VER(pvr), PVR_REV(pvr));
323 
324 	if (IS_ENABLED(CONFIG_PPC32))
325 		seq_printf(m, "bogomips\t: %lu.%02lu\n", loops_per_jiffy / (500000 / HZ),
326 			   (loops_per_jiffy / (5000 / HZ)) % 100);
327 
328 	seq_putc(m, '\n');
329 
330 	/* If this is the last cpu, print the summary */
331 	if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
332 		show_cpuinfo_summary(m);
333 
334 	return 0;
335 }
336 
337 static void *c_start(struct seq_file *m, loff_t *pos)
338 {
339 	if (*pos == 0)	/* just in case, cpu 0 is not the first */
340 		*pos = cpumask_first(cpu_online_mask);
341 	else
342 		*pos = cpumask_next(*pos - 1, cpu_online_mask);
343 	if ((*pos) < nr_cpu_ids)
344 		return (void *)(unsigned long)(*pos + 1);
345 	return NULL;
346 }
347 
348 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
349 {
350 	(*pos)++;
351 	return c_start(m, pos);
352 }
353 
354 static void c_stop(struct seq_file *m, void *v)
355 {
356 }
357 
358 const struct seq_operations cpuinfo_op = {
359 	.start	= c_start,
360 	.next	= c_next,
361 	.stop	= c_stop,
362 	.show	= show_cpuinfo,
363 };
364 
365 void __init check_for_initrd(void)
366 {
367 #ifdef CONFIG_BLK_DEV_INITRD
368 	DBG(" -> check_for_initrd()  initrd_start=0x%lx  initrd_end=0x%lx\n",
369 	    initrd_start, initrd_end);
370 
371 	/* If we were passed an initrd, set the ROOT_DEV properly if the values
372 	 * look sensible. If not, clear initrd reference.
373 	 */
374 	if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
375 	    initrd_end > initrd_start)
376 		ROOT_DEV = Root_RAM0;
377 	else
378 		initrd_start = initrd_end = 0;
379 
380 	if (initrd_start)
381 		pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
382 
383 	DBG(" <- check_for_initrd()\n");
384 #endif /* CONFIG_BLK_DEV_INITRD */
385 }
386 
387 #ifdef CONFIG_SMP
388 
389 int threads_per_core, threads_per_subcore, threads_shift __read_mostly;
390 cpumask_t threads_core_mask __read_mostly;
391 EXPORT_SYMBOL_GPL(threads_per_core);
392 EXPORT_SYMBOL_GPL(threads_per_subcore);
393 EXPORT_SYMBOL_GPL(threads_shift);
394 EXPORT_SYMBOL_GPL(threads_core_mask);
395 
396 static void __init cpu_init_thread_core_maps(int tpc)
397 {
398 	int i;
399 
400 	threads_per_core = tpc;
401 	threads_per_subcore = tpc;
402 	cpumask_clear(&threads_core_mask);
403 
404 	/* This implementation only supports power of 2 number of threads
405 	 * for simplicity and performance
406 	 */
407 	threads_shift = ilog2(tpc);
408 	BUG_ON(tpc != (1 << threads_shift));
409 
410 	for (i = 0; i < tpc; i++)
411 		cpumask_set_cpu(i, &threads_core_mask);
412 
413 	printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
414 	       tpc, tpc > 1 ? "s" : "");
415 	printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
416 }
417 
418 
419 u32 *cpu_to_phys_id = NULL;
420 
421 /**
422  * setup_cpu_maps - initialize the following cpu maps:
423  *                  cpu_possible_mask
424  *                  cpu_present_mask
425  *
426  * Having the possible map set up early allows us to restrict allocations
427  * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
428  *
429  * We do not initialize the online map here; cpus set their own bits in
430  * cpu_online_mask as they come up.
431  *
432  * This function is valid only for Open Firmware systems.  finish_device_tree
433  * must be called before using this.
434  *
435  * While we're here, we may as well set the "physical" cpu ids in the paca.
436  *
437  * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
438  */
439 void __init smp_setup_cpu_maps(void)
440 {
441 	struct device_node *dn;
442 	int cpu = 0;
443 	int nthreads = 1;
444 
445 	DBG("smp_setup_cpu_maps()\n");
446 
447 	cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32),
448 					__alignof__(u32));
449 	if (!cpu_to_phys_id)
450 		panic("%s: Failed to allocate %zu bytes align=0x%zx\n",
451 		      __func__, nr_cpu_ids * sizeof(u32), __alignof__(u32));
452 
453 	for_each_node_by_type(dn, "cpu") {
454 		const __be32 *intserv;
455 		__be32 cpu_be;
456 		int j, len;
457 
458 		DBG("  * %pOF...\n", dn);
459 
460 		intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
461 				&len);
462 		if (intserv) {
463 			DBG("    ibm,ppc-interrupt-server#s -> %d threads\n",
464 			    nthreads);
465 		} else {
466 			DBG("    no ibm,ppc-interrupt-server#s -> 1 thread\n");
467 			intserv = of_get_property(dn, "reg", &len);
468 			if (!intserv) {
469 				cpu_be = cpu_to_be32(cpu);
470 				/* XXX: what is this? uninitialized?? */
471 				intserv = &cpu_be;	/* assume logical == phys */
472 				len = 4;
473 			}
474 		}
475 
476 		nthreads = len / sizeof(int);
477 
478 		for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
479 			bool avail;
480 
481 			DBG("    thread %d -> cpu %d (hard id %d)\n",
482 			    j, cpu, be32_to_cpu(intserv[j]));
483 
484 			avail = of_device_is_available(dn);
485 			if (!avail)
486 				avail = !of_property_match_string(dn,
487 						"enable-method", "spin-table");
488 
489 			set_cpu_present(cpu, avail);
490 			set_cpu_possible(cpu, true);
491 			cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]);
492 			cpu++;
493 		}
494 
495 		if (cpu >= nr_cpu_ids) {
496 			of_node_put(dn);
497 			break;
498 		}
499 	}
500 
501 	/* If no SMT supported, nthreads is forced to 1 */
502 	if (!cpu_has_feature(CPU_FTR_SMT)) {
503 		DBG("  SMT disabled ! nthreads forced to 1\n");
504 		nthreads = 1;
505 	}
506 
507 #ifdef CONFIG_PPC64
508 	/*
509 	 * On pSeries LPAR, we need to know how many cpus
510 	 * could possibly be added to this partition.
511 	 */
512 	if (firmware_has_feature(FW_FEATURE_LPAR) &&
513 	    (dn = of_find_node_by_path("/rtas"))) {
514 		int num_addr_cell, num_size_cell, maxcpus;
515 		const __be32 *ireg;
516 
517 		num_addr_cell = of_n_addr_cells(dn);
518 		num_size_cell = of_n_size_cells(dn);
519 
520 		ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
521 
522 		if (!ireg)
523 			goto out;
524 
525 		maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
526 
527 		/* Double maxcpus for processors which have SMT capability */
528 		if (cpu_has_feature(CPU_FTR_SMT))
529 			maxcpus *= nthreads;
530 
531 		if (maxcpus > nr_cpu_ids) {
532 			printk(KERN_WARNING
533 			       "Partition configured for %d cpus, "
534 			       "operating system maximum is %u.\n",
535 			       maxcpus, nr_cpu_ids);
536 			maxcpus = nr_cpu_ids;
537 		} else
538 			printk(KERN_INFO "Partition configured for %d cpus.\n",
539 			       maxcpus);
540 
541 		for (cpu = 0; cpu < maxcpus; cpu++)
542 			set_cpu_possible(cpu, true);
543 	out:
544 		of_node_put(dn);
545 	}
546 	vdso_data->processorCount = num_present_cpus();
547 #endif /* CONFIG_PPC64 */
548 
549         /* Initialize CPU <=> thread mapping/
550 	 *
551 	 * WARNING: We assume that the number of threads is the same for
552 	 * every CPU in the system. If that is not the case, then some code
553 	 * here will have to be reworked
554 	 */
555 	cpu_init_thread_core_maps(nthreads);
556 
557 	/* Now that possible cpus are set, set nr_cpu_ids for later use */
558 	setup_nr_cpu_ids();
559 
560 	free_unused_pacas();
561 }
562 #endif /* CONFIG_SMP */
563 
564 #ifdef CONFIG_PCSPKR_PLATFORM
565 static __init int add_pcspkr(void)
566 {
567 	struct device_node *np;
568 	struct platform_device *pd;
569 	int ret;
570 
571 	np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
572 	of_node_put(np);
573 	if (!np)
574 		return -ENODEV;
575 
576 	pd = platform_device_alloc("pcspkr", -1);
577 	if (!pd)
578 		return -ENOMEM;
579 
580 	ret = platform_device_add(pd);
581 	if (ret)
582 		platform_device_put(pd);
583 
584 	return ret;
585 }
586 device_initcall(add_pcspkr);
587 #endif	/* CONFIG_PCSPKR_PLATFORM */
588 
589 void probe_machine(void)
590 {
591 	extern struct machdep_calls __machine_desc_start;
592 	extern struct machdep_calls __machine_desc_end;
593 	unsigned int i;
594 
595 	/*
596 	 * Iterate all ppc_md structures until we find the proper
597 	 * one for the current machine type
598 	 */
599 	DBG("Probing machine type ...\n");
600 
601 	/*
602 	 * Check ppc_md is empty, if not we have a bug, ie, we setup an
603 	 * entry before probe_machine() which will be overwritten
604 	 */
605 	for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
606 		if (((void **)&ppc_md)[i]) {
607 			printk(KERN_ERR "Entry %d in ppc_md non empty before"
608 			       " machine probe !\n", i);
609 		}
610 	}
611 
612 	for (machine_id = &__machine_desc_start;
613 	     machine_id < &__machine_desc_end;
614 	     machine_id++) {
615 		DBG("  %s ...", machine_id->name);
616 		memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
617 		if (ppc_md.probe()) {
618 			DBG(" match !\n");
619 			break;
620 		}
621 		DBG("\n");
622 	}
623 	/* What can we do if we didn't find ? */
624 	if (machine_id >= &__machine_desc_end) {
625 		pr_err("No suitable machine description found !\n");
626 		for (;;);
627 	}
628 
629 	printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
630 }
631 
632 /* Match a class of boards, not a specific device configuration. */
633 int check_legacy_ioport(unsigned long base_port)
634 {
635 	struct device_node *parent, *np = NULL;
636 	int ret = -ENODEV;
637 
638 	switch(base_port) {
639 	case I8042_DATA_REG:
640 		if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
641 			np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
642 		if (np) {
643 			parent = of_get_parent(np);
644 
645 			of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
646 			if (!of_i8042_kbd_irq)
647 				of_i8042_kbd_irq = 1;
648 
649 			of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
650 			if (!of_i8042_aux_irq)
651 				of_i8042_aux_irq = 12;
652 
653 			of_node_put(np);
654 			np = parent;
655 			break;
656 		}
657 		np = of_find_node_by_type(NULL, "8042");
658 		/* Pegasos has no device_type on its 8042 node, look for the
659 		 * name instead */
660 		if (!np)
661 			np = of_find_node_by_name(NULL, "8042");
662 		if (np) {
663 			of_i8042_kbd_irq = 1;
664 			of_i8042_aux_irq = 12;
665 		}
666 		break;
667 	case FDC_BASE: /* FDC1 */
668 		np = of_find_node_by_type(NULL, "fdc");
669 		break;
670 	default:
671 		/* ipmi is supposed to fail here */
672 		break;
673 	}
674 	if (!np)
675 		return ret;
676 	parent = of_get_parent(np);
677 	if (parent) {
678 		if (of_node_is_type(parent, "isa"))
679 			ret = 0;
680 		of_node_put(parent);
681 	}
682 	of_node_put(np);
683 	return ret;
684 }
685 EXPORT_SYMBOL(check_legacy_ioport);
686 
687 static int ppc_panic_event(struct notifier_block *this,
688                              unsigned long event, void *ptr)
689 {
690 	/*
691 	 * panic does a local_irq_disable, but we really
692 	 * want interrupts to be hard disabled.
693 	 */
694 	hard_irq_disable();
695 
696 	/*
697 	 * If firmware-assisted dump has been registered then trigger
698 	 * firmware-assisted dump and let firmware handle everything else.
699 	 */
700 	crash_fadump(NULL, ptr);
701 	if (ppc_md.panic)
702 		ppc_md.panic(ptr);  /* May not return */
703 	return NOTIFY_DONE;
704 }
705 
706 static struct notifier_block ppc_panic_block = {
707 	.notifier_call = ppc_panic_event,
708 	.priority = INT_MIN /* may not return; must be done last */
709 };
710 
711 /*
712  * Dump out kernel offset information on panic.
713  */
714 static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
715 			      void *p)
716 {
717 	pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n",
718 		 kaslr_offset(), KERNELBASE);
719 
720 	return 0;
721 }
722 
723 static struct notifier_block kernel_offset_notifier = {
724 	.notifier_call = dump_kernel_offset
725 };
726 
727 void __init setup_panic(void)
728 {
729 	if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0)
730 		atomic_notifier_chain_register(&panic_notifier_list,
731 					       &kernel_offset_notifier);
732 
733 	/* PPC64 always does a hard irq disable in its panic handler */
734 	if (!IS_ENABLED(CONFIG_PPC64) && !ppc_md.panic)
735 		return;
736 	atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
737 }
738 
739 #ifdef CONFIG_CHECK_CACHE_COHERENCY
740 /*
741  * For platforms that have configurable cache-coherency.  This function
742  * checks that the cache coherency setting of the kernel matches the setting
743  * left by the firmware, as indicated in the device tree.  Since a mismatch
744  * will eventually result in DMA failures, we print * and error and call
745  * BUG() in that case.
746  */
747 
748 #define KERNEL_COHERENCY	(!IS_ENABLED(CONFIG_NOT_COHERENT_CACHE))
749 
750 static int __init check_cache_coherency(void)
751 {
752 	struct device_node *np;
753 	const void *prop;
754 	bool devtree_coherency;
755 
756 	np = of_find_node_by_path("/");
757 	prop = of_get_property(np, "coherency-off", NULL);
758 	of_node_put(np);
759 
760 	devtree_coherency = prop ? false : true;
761 
762 	if (devtree_coherency != KERNEL_COHERENCY) {
763 		printk(KERN_ERR
764 			"kernel coherency:%s != device tree_coherency:%s\n",
765 			KERNEL_COHERENCY ? "on" : "off",
766 			devtree_coherency ? "on" : "off");
767 		BUG();
768 	}
769 
770 	return 0;
771 }
772 
773 late_initcall(check_cache_coherency);
774 #endif /* CONFIG_CHECK_CACHE_COHERENCY */
775 
776 #ifdef CONFIG_DEBUG_FS
777 struct dentry *powerpc_debugfs_root;
778 EXPORT_SYMBOL(powerpc_debugfs_root);
779 
780 static int powerpc_debugfs_init(void)
781 {
782 	powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
783 	return 0;
784 }
785 arch_initcall(powerpc_debugfs_init);
786 #endif
787 
788 void ppc_printk_progress(char *s, unsigned short hex)
789 {
790 	pr_info("%s\n", s);
791 }
792 
793 static __init void print_system_info(void)
794 {
795 	pr_info("-----------------------------------------------------\n");
796 	pr_info("phys_mem_size     = 0x%llx\n",
797 		(unsigned long long)memblock_phys_mem_size());
798 
799 	pr_info("dcache_bsize      = 0x%x\n", dcache_bsize);
800 	pr_info("icache_bsize      = 0x%x\n", icache_bsize);
801 
802 	pr_info("cpu_features      = 0x%016lx\n", cur_cpu_spec->cpu_features);
803 	pr_info("  possible        = 0x%016lx\n",
804 		(unsigned long)CPU_FTRS_POSSIBLE);
805 	pr_info("  always          = 0x%016lx\n",
806 		(unsigned long)CPU_FTRS_ALWAYS);
807 	pr_info("cpu_user_features = 0x%08x 0x%08x\n",
808 		cur_cpu_spec->cpu_user_features,
809 		cur_cpu_spec->cpu_user_features2);
810 	pr_info("mmu_features      = 0x%08x\n", cur_cpu_spec->mmu_features);
811 #ifdef CONFIG_PPC64
812 	pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
813 #ifdef CONFIG_PPC_BOOK3S
814 	pr_info("vmalloc start     = 0x%lx\n", KERN_VIRT_START);
815 	pr_info("IO start          = 0x%lx\n", KERN_IO_START);
816 	pr_info("vmemmap start     = 0x%lx\n", (unsigned long)vmemmap);
817 #endif
818 #endif
819 
820 	if (!early_radix_enabled())
821 		print_system_hash_info();
822 
823 	if (PHYSICAL_START > 0)
824 		pr_info("physical_start    = 0x%llx\n",
825 		       (unsigned long long)PHYSICAL_START);
826 	pr_info("-----------------------------------------------------\n");
827 }
828 
829 #ifdef CONFIG_SMP
830 static void __init smp_setup_pacas(void)
831 {
832 	int cpu;
833 
834 	for_each_possible_cpu(cpu) {
835 		if (cpu == smp_processor_id())
836 			continue;
837 		allocate_paca(cpu);
838 		set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
839 	}
840 
841 	memblock_free(__pa(cpu_to_phys_id), nr_cpu_ids * sizeof(u32));
842 	cpu_to_phys_id = NULL;
843 }
844 #endif
845 
846 /*
847  * Called into from start_kernel this initializes memblock, which is used
848  * to manage page allocation until mem_init is called.
849  */
850 void __init setup_arch(char **cmdline_p)
851 {
852 	kasan_init();
853 
854 	*cmdline_p = boot_command_line;
855 
856 	/* Set a half-reasonable default so udelay does something sensible */
857 	loops_per_jiffy = 500000000 / HZ;
858 
859 	/* Unflatten the device-tree passed by prom_init or kexec */
860 	unflatten_device_tree();
861 
862 	/*
863 	 * Initialize cache line/block info from device-tree (on ppc64) or
864 	 * just cputable (on ppc32).
865 	 */
866 	initialize_cache_info();
867 
868 	/* Initialize RTAS if available. */
869 	rtas_initialize();
870 
871 	/* Check if we have an initrd provided via the device-tree. */
872 	check_for_initrd();
873 
874 	/* Probe the machine type, establish ppc_md. */
875 	probe_machine();
876 
877 	/* Setup panic notifier if requested by the platform. */
878 	setup_panic();
879 
880 	/*
881 	 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
882 	 * it from their respective probe() function.
883 	 */
884 	setup_power_save();
885 
886 	/* Discover standard serial ports. */
887 	find_legacy_serial_ports();
888 
889 	/* Register early console with the printk subsystem. */
890 	register_early_udbg_console();
891 
892 	/* Setup the various CPU maps based on the device-tree. */
893 	smp_setup_cpu_maps();
894 
895 	/* Initialize xmon. */
896 	xmon_setup();
897 
898 	/* Check the SMT related command line arguments (ppc64). */
899 	check_smt_enabled();
900 
901 	/* Parse memory topology */
902 	mem_topology_setup();
903 
904 	/*
905 	 * Release secondary cpus out of their spinloops at 0x60 now that
906 	 * we can map physical -> logical CPU ids.
907 	 *
908 	 * Freescale Book3e parts spin in a loop provided by firmware,
909 	 * so smp_release_cpus() does nothing for them.
910 	 */
911 #ifdef CONFIG_SMP
912 	smp_setup_pacas();
913 
914 	/* On BookE, setup per-core TLB data structures. */
915 	setup_tlb_core_data();
916 #endif
917 
918 	/* Print various info about the machine that has been gathered so far. */
919 	print_system_info();
920 
921 	/* Reserve large chunks of memory for use by CMA for KVM. */
922 	kvm_cma_reserve();
923 
924 	/*  Reserve large chunks of memory for us by CMA for hugetlb */
925 	gigantic_hugetlb_cma_reserve();
926 
927 	klp_init_thread_info(&init_task);
928 
929 	setup_initial_init_mm(_stext, _etext, _edata, _end);
930 
931 	mm_iommu_init(&init_mm);
932 	irqstack_early_init();
933 	exc_lvl_early_init();
934 	emergency_stack_init();
935 
936 	mce_init();
937 	smp_release_cpus();
938 
939 	initmem_init();
940 
941 	early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
942 
943 	if (ppc_md.setup_arch)
944 		ppc_md.setup_arch();
945 
946 	setup_barrier_nospec();
947 	setup_spectre_v2();
948 
949 	paging_init();
950 
951 	/* Initialize the MMU context management stuff. */
952 	mmu_context_init();
953 
954 	/* Interrupt code needs to be 64K-aligned. */
955 	if (IS_ENABLED(CONFIG_PPC64) && (unsigned long)_stext & 0xffff)
956 		panic("Kernelbase not 64K-aligned (0x%lx)!\n",
957 		      (unsigned long)_stext);
958 }
959