1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Common boot and setup code for both 32-bit and 64-bit. 4 * Extracted from arch/powerpc/kernel/setup_64.c. 5 * 6 * Copyright (C) 2001 PPC64 Team, IBM Corp 7 */ 8 9 #undef DEBUG 10 11 #include <linux/export.h> 12 #include <linux/string.h> 13 #include <linux/sched.h> 14 #include <linux/init.h> 15 #include <linux/kernel.h> 16 #include <linux/reboot.h> 17 #include <linux/delay.h> 18 #include <linux/initrd.h> 19 #include <linux/platform_device.h> 20 #include <linux/seq_file.h> 21 #include <linux/ioport.h> 22 #include <linux/console.h> 23 #include <linux/screen_info.h> 24 #include <linux/root_dev.h> 25 #include <linux/notifier.h> 26 #include <linux/cpu.h> 27 #include <linux/unistd.h> 28 #include <linux/serial.h> 29 #include <linux/serial_8250.h> 30 #include <linux/percpu.h> 31 #include <linux/memblock.h> 32 #include <linux/of_platform.h> 33 #include <linux/hugetlb.h> 34 #include <linux/pgtable.h> 35 #include <asm/debugfs.h> 36 #include <asm/io.h> 37 #include <asm/paca.h> 38 #include <asm/prom.h> 39 #include <asm/processor.h> 40 #include <asm/vdso_datapage.h> 41 #include <asm/smp.h> 42 #include <asm/elf.h> 43 #include <asm/machdep.h> 44 #include <asm/time.h> 45 #include <asm/cputable.h> 46 #include <asm/sections.h> 47 #include <asm/firmware.h> 48 #include <asm/btext.h> 49 #include <asm/nvram.h> 50 #include <asm/setup.h> 51 #include <asm/rtas.h> 52 #include <asm/iommu.h> 53 #include <asm/serial.h> 54 #include <asm/cache.h> 55 #include <asm/page.h> 56 #include <asm/mmu.h> 57 #include <asm/xmon.h> 58 #include <asm/cputhreads.h> 59 #include <mm/mmu_decl.h> 60 #include <asm/fadump.h> 61 #include <asm/udbg.h> 62 #include <asm/hugetlb.h> 63 #include <asm/livepatch.h> 64 #include <asm/mmu_context.h> 65 #include <asm/cpu_has_feature.h> 66 #include <asm/kasan.h> 67 #include <asm/mce.h> 68 69 #include "setup.h" 70 71 #ifdef DEBUG 72 #include <asm/udbg.h> 73 #define DBG(fmt...) udbg_printf(fmt) 74 #else 75 #define DBG(fmt...) 76 #endif 77 78 /* The main machine-dep calls structure 79 */ 80 struct machdep_calls ppc_md; 81 EXPORT_SYMBOL(ppc_md); 82 struct machdep_calls *machine_id; 83 EXPORT_SYMBOL(machine_id); 84 85 int boot_cpuid = -1; 86 EXPORT_SYMBOL_GPL(boot_cpuid); 87 88 /* 89 * These are used in binfmt_elf.c to put aux entries on the stack 90 * for each elf executable being started. 91 */ 92 int dcache_bsize; 93 int icache_bsize; 94 95 unsigned long klimit = (unsigned long) _end; 96 97 /* 98 * This still seems to be needed... -- paulus 99 */ 100 struct screen_info screen_info = { 101 .orig_x = 0, 102 .orig_y = 25, 103 .orig_video_cols = 80, 104 .orig_video_lines = 25, 105 .orig_video_isVGA = 1, 106 .orig_video_points = 16 107 }; 108 #if defined(CONFIG_FB_VGA16_MODULE) 109 EXPORT_SYMBOL(screen_info); 110 #endif 111 112 /* Variables required to store legacy IO irq routing */ 113 int of_i8042_kbd_irq; 114 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq); 115 int of_i8042_aux_irq; 116 EXPORT_SYMBOL_GPL(of_i8042_aux_irq); 117 118 #ifdef __DO_IRQ_CANON 119 /* XXX should go elsewhere eventually */ 120 int ppc_do_canonicalize_irqs; 121 EXPORT_SYMBOL(ppc_do_canonicalize_irqs); 122 #endif 123 124 #ifdef CONFIG_CRASH_CORE 125 /* This keeps a track of which one is the crashing cpu. */ 126 int crashing_cpu = -1; 127 #endif 128 129 /* also used by kexec */ 130 void machine_shutdown(void) 131 { 132 /* 133 * if fadump is active, cleanup the fadump registration before we 134 * shutdown. 135 */ 136 fadump_cleanup(); 137 138 if (ppc_md.machine_shutdown) 139 ppc_md.machine_shutdown(); 140 } 141 142 static void machine_hang(void) 143 { 144 pr_emerg("System Halted, OK to turn off power\n"); 145 local_irq_disable(); 146 while (1) 147 ; 148 } 149 150 void machine_restart(char *cmd) 151 { 152 machine_shutdown(); 153 if (ppc_md.restart) 154 ppc_md.restart(cmd); 155 156 smp_send_stop(); 157 158 do_kernel_restart(cmd); 159 mdelay(1000); 160 161 machine_hang(); 162 } 163 164 void machine_power_off(void) 165 { 166 machine_shutdown(); 167 if (pm_power_off) 168 pm_power_off(); 169 170 smp_send_stop(); 171 machine_hang(); 172 } 173 /* Used by the G5 thermal driver */ 174 EXPORT_SYMBOL_GPL(machine_power_off); 175 176 void (*pm_power_off)(void); 177 EXPORT_SYMBOL_GPL(pm_power_off); 178 179 void machine_halt(void) 180 { 181 machine_shutdown(); 182 if (ppc_md.halt) 183 ppc_md.halt(); 184 185 smp_send_stop(); 186 machine_hang(); 187 } 188 189 #ifdef CONFIG_SMP 190 DEFINE_PER_CPU(unsigned int, cpu_pvr); 191 #endif 192 193 static void show_cpuinfo_summary(struct seq_file *m) 194 { 195 struct device_node *root; 196 const char *model = NULL; 197 unsigned long bogosum = 0; 198 int i; 199 200 if (IS_ENABLED(CONFIG_SMP) && IS_ENABLED(CONFIG_PPC32)) { 201 for_each_online_cpu(i) 202 bogosum += loops_per_jiffy; 203 seq_printf(m, "total bogomips\t: %lu.%02lu\n", 204 bogosum / (500000 / HZ), bogosum / (5000 / HZ) % 100); 205 } 206 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq); 207 if (ppc_md.name) 208 seq_printf(m, "platform\t: %s\n", ppc_md.name); 209 root = of_find_node_by_path("/"); 210 if (root) 211 model = of_get_property(root, "model", NULL); 212 if (model) 213 seq_printf(m, "model\t\t: %s\n", model); 214 of_node_put(root); 215 216 if (ppc_md.show_cpuinfo != NULL) 217 ppc_md.show_cpuinfo(m); 218 219 /* Display the amount of memory */ 220 if (IS_ENABLED(CONFIG_PPC32)) 221 seq_printf(m, "Memory\t\t: %d MB\n", 222 (unsigned int)(total_memory / (1024 * 1024))); 223 } 224 225 static int show_cpuinfo(struct seq_file *m, void *v) 226 { 227 unsigned long cpu_id = (unsigned long)v - 1; 228 unsigned int pvr; 229 unsigned long proc_freq; 230 unsigned short maj; 231 unsigned short min; 232 233 #ifdef CONFIG_SMP 234 pvr = per_cpu(cpu_pvr, cpu_id); 235 #else 236 pvr = mfspr(SPRN_PVR); 237 #endif 238 maj = (pvr >> 8) & 0xFF; 239 min = pvr & 0xFF; 240 241 seq_printf(m, "processor\t: %lu\ncpu\t\t: ", cpu_id); 242 243 if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name) 244 seq_puts(m, cur_cpu_spec->cpu_name); 245 else 246 seq_printf(m, "unknown (%08x)", pvr); 247 248 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 249 seq_puts(m, ", altivec supported"); 250 251 seq_putc(m, '\n'); 252 253 #ifdef CONFIG_TAU 254 if (cpu_has_feature(CPU_FTR_TAU)) { 255 if (IS_ENABLED(CONFIG_TAU_AVERAGE)) { 256 /* more straightforward, but potentially misleading */ 257 seq_printf(m, "temperature \t: %u C (uncalibrated)\n", 258 cpu_temp(cpu_id)); 259 } else { 260 /* show the actual temp sensor range */ 261 u32 temp; 262 temp = cpu_temp_both(cpu_id); 263 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n", 264 temp & 0xff, temp >> 16); 265 } 266 } 267 #endif /* CONFIG_TAU */ 268 269 /* 270 * Platforms that have variable clock rates, should implement 271 * the method ppc_md.get_proc_freq() that reports the clock 272 * rate of a given cpu. The rest can use ppc_proc_freq to 273 * report the clock rate that is same across all cpus. 274 */ 275 if (ppc_md.get_proc_freq) 276 proc_freq = ppc_md.get_proc_freq(cpu_id); 277 else 278 proc_freq = ppc_proc_freq; 279 280 if (proc_freq) 281 seq_printf(m, "clock\t\t: %lu.%06luMHz\n", 282 proc_freq / 1000000, proc_freq % 1000000); 283 284 if (ppc_md.show_percpuinfo != NULL) 285 ppc_md.show_percpuinfo(m, cpu_id); 286 287 /* If we are a Freescale core do a simple check so 288 * we dont have to keep adding cases in the future */ 289 if (PVR_VER(pvr) & 0x8000) { 290 switch (PVR_VER(pvr)) { 291 case 0x8000: /* 7441/7450/7451, Voyager */ 292 case 0x8001: /* 7445/7455, Apollo 6 */ 293 case 0x8002: /* 7447/7457, Apollo 7 */ 294 case 0x8003: /* 7447A, Apollo 7 PM */ 295 case 0x8004: /* 7448, Apollo 8 */ 296 case 0x800c: /* 7410, Nitro */ 297 maj = ((pvr >> 8) & 0xF); 298 min = PVR_MIN(pvr); 299 break; 300 default: /* e500/book-e */ 301 maj = PVR_MAJ(pvr); 302 min = PVR_MIN(pvr); 303 break; 304 } 305 } else { 306 switch (PVR_VER(pvr)) { 307 case 0x1008: /* 740P/750P ?? */ 308 maj = ((pvr >> 8) & 0xFF) - 1; 309 min = pvr & 0xFF; 310 break; 311 case 0x004e: /* POWER9 bits 12-15 give chip type */ 312 case 0x0080: /* POWER10 bit 12 gives SMT8/4 */ 313 maj = (pvr >> 8) & 0x0F; 314 min = pvr & 0xFF; 315 break; 316 default: 317 maj = (pvr >> 8) & 0xFF; 318 min = pvr & 0xFF; 319 break; 320 } 321 } 322 323 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n", 324 maj, min, PVR_VER(pvr), PVR_REV(pvr)); 325 326 if (IS_ENABLED(CONFIG_PPC32)) 327 seq_printf(m, "bogomips\t: %lu.%02lu\n", loops_per_jiffy / (500000 / HZ), 328 (loops_per_jiffy / (5000 / HZ)) % 100); 329 330 seq_putc(m, '\n'); 331 332 /* If this is the last cpu, print the summary */ 333 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids) 334 show_cpuinfo_summary(m); 335 336 return 0; 337 } 338 339 static void *c_start(struct seq_file *m, loff_t *pos) 340 { 341 if (*pos == 0) /* just in case, cpu 0 is not the first */ 342 *pos = cpumask_first(cpu_online_mask); 343 else 344 *pos = cpumask_next(*pos - 1, cpu_online_mask); 345 if ((*pos) < nr_cpu_ids) 346 return (void *)(unsigned long)(*pos + 1); 347 return NULL; 348 } 349 350 static void *c_next(struct seq_file *m, void *v, loff_t *pos) 351 { 352 (*pos)++; 353 return c_start(m, pos); 354 } 355 356 static void c_stop(struct seq_file *m, void *v) 357 { 358 } 359 360 const struct seq_operations cpuinfo_op = { 361 .start = c_start, 362 .next = c_next, 363 .stop = c_stop, 364 .show = show_cpuinfo, 365 }; 366 367 void __init check_for_initrd(void) 368 { 369 #ifdef CONFIG_BLK_DEV_INITRD 370 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n", 371 initrd_start, initrd_end); 372 373 /* If we were passed an initrd, set the ROOT_DEV properly if the values 374 * look sensible. If not, clear initrd reference. 375 */ 376 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) && 377 initrd_end > initrd_start) 378 ROOT_DEV = Root_RAM0; 379 else 380 initrd_start = initrd_end = 0; 381 382 if (initrd_start) 383 pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end); 384 385 DBG(" <- check_for_initrd()\n"); 386 #endif /* CONFIG_BLK_DEV_INITRD */ 387 } 388 389 #ifdef CONFIG_SMP 390 391 int threads_per_core, threads_per_subcore, threads_shift __read_mostly; 392 cpumask_t threads_core_mask __read_mostly; 393 EXPORT_SYMBOL_GPL(threads_per_core); 394 EXPORT_SYMBOL_GPL(threads_per_subcore); 395 EXPORT_SYMBOL_GPL(threads_shift); 396 EXPORT_SYMBOL_GPL(threads_core_mask); 397 398 static void __init cpu_init_thread_core_maps(int tpc) 399 { 400 int i; 401 402 threads_per_core = tpc; 403 threads_per_subcore = tpc; 404 cpumask_clear(&threads_core_mask); 405 406 /* This implementation only supports power of 2 number of threads 407 * for simplicity and performance 408 */ 409 threads_shift = ilog2(tpc); 410 BUG_ON(tpc != (1 << threads_shift)); 411 412 for (i = 0; i < tpc; i++) 413 cpumask_set_cpu(i, &threads_core_mask); 414 415 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n", 416 tpc, tpc > 1 ? "s" : ""); 417 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift); 418 } 419 420 421 u32 *cpu_to_phys_id = NULL; 422 423 /** 424 * setup_cpu_maps - initialize the following cpu maps: 425 * cpu_possible_mask 426 * cpu_present_mask 427 * 428 * Having the possible map set up early allows us to restrict allocations 429 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS. 430 * 431 * We do not initialize the online map here; cpus set their own bits in 432 * cpu_online_mask as they come up. 433 * 434 * This function is valid only for Open Firmware systems. finish_device_tree 435 * must be called before using this. 436 * 437 * While we're here, we may as well set the "physical" cpu ids in the paca. 438 * 439 * NOTE: This must match the parsing done in early_init_dt_scan_cpus. 440 */ 441 void __init smp_setup_cpu_maps(void) 442 { 443 struct device_node *dn; 444 int cpu = 0; 445 int nthreads = 1; 446 447 DBG("smp_setup_cpu_maps()\n"); 448 449 cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32), 450 __alignof__(u32)); 451 if (!cpu_to_phys_id) 452 panic("%s: Failed to allocate %zu bytes align=0x%zx\n", 453 __func__, nr_cpu_ids * sizeof(u32), __alignof__(u32)); 454 455 for_each_node_by_type(dn, "cpu") { 456 const __be32 *intserv; 457 __be32 cpu_be; 458 int j, len; 459 460 DBG(" * %pOF...\n", dn); 461 462 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", 463 &len); 464 if (intserv) { 465 DBG(" ibm,ppc-interrupt-server#s -> %d threads\n", 466 nthreads); 467 } else { 468 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n"); 469 intserv = of_get_property(dn, "reg", &len); 470 if (!intserv) { 471 cpu_be = cpu_to_be32(cpu); 472 /* XXX: what is this? uninitialized?? */ 473 intserv = &cpu_be; /* assume logical == phys */ 474 len = 4; 475 } 476 } 477 478 nthreads = len / sizeof(int); 479 480 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) { 481 bool avail; 482 483 DBG(" thread %d -> cpu %d (hard id %d)\n", 484 j, cpu, be32_to_cpu(intserv[j])); 485 486 avail = of_device_is_available(dn); 487 if (!avail) 488 avail = !of_property_match_string(dn, 489 "enable-method", "spin-table"); 490 491 set_cpu_present(cpu, avail); 492 set_cpu_possible(cpu, true); 493 cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]); 494 cpu++; 495 } 496 497 if (cpu >= nr_cpu_ids) { 498 of_node_put(dn); 499 break; 500 } 501 } 502 503 /* If no SMT supported, nthreads is forced to 1 */ 504 if (!cpu_has_feature(CPU_FTR_SMT)) { 505 DBG(" SMT disabled ! nthreads forced to 1\n"); 506 nthreads = 1; 507 } 508 509 #ifdef CONFIG_PPC64 510 /* 511 * On pSeries LPAR, we need to know how many cpus 512 * could possibly be added to this partition. 513 */ 514 if (firmware_has_feature(FW_FEATURE_LPAR) && 515 (dn = of_find_node_by_path("/rtas"))) { 516 int num_addr_cell, num_size_cell, maxcpus; 517 const __be32 *ireg; 518 519 num_addr_cell = of_n_addr_cells(dn); 520 num_size_cell = of_n_size_cells(dn); 521 522 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL); 523 524 if (!ireg) 525 goto out; 526 527 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell); 528 529 /* Double maxcpus for processors which have SMT capability */ 530 if (cpu_has_feature(CPU_FTR_SMT)) 531 maxcpus *= nthreads; 532 533 if (maxcpus > nr_cpu_ids) { 534 printk(KERN_WARNING 535 "Partition configured for %d cpus, " 536 "operating system maximum is %u.\n", 537 maxcpus, nr_cpu_ids); 538 maxcpus = nr_cpu_ids; 539 } else 540 printk(KERN_INFO "Partition configured for %d cpus.\n", 541 maxcpus); 542 543 for (cpu = 0; cpu < maxcpus; cpu++) 544 set_cpu_possible(cpu, true); 545 out: 546 of_node_put(dn); 547 } 548 vdso_data->processorCount = num_present_cpus(); 549 #endif /* CONFIG_PPC64 */ 550 551 /* Initialize CPU <=> thread mapping/ 552 * 553 * WARNING: We assume that the number of threads is the same for 554 * every CPU in the system. If that is not the case, then some code 555 * here will have to be reworked 556 */ 557 cpu_init_thread_core_maps(nthreads); 558 559 /* Now that possible cpus are set, set nr_cpu_ids for later use */ 560 setup_nr_cpu_ids(); 561 562 free_unused_pacas(); 563 } 564 #endif /* CONFIG_SMP */ 565 566 #ifdef CONFIG_PCSPKR_PLATFORM 567 static __init int add_pcspkr(void) 568 { 569 struct device_node *np; 570 struct platform_device *pd; 571 int ret; 572 573 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100"); 574 of_node_put(np); 575 if (!np) 576 return -ENODEV; 577 578 pd = platform_device_alloc("pcspkr", -1); 579 if (!pd) 580 return -ENOMEM; 581 582 ret = platform_device_add(pd); 583 if (ret) 584 platform_device_put(pd); 585 586 return ret; 587 } 588 device_initcall(add_pcspkr); 589 #endif /* CONFIG_PCSPKR_PLATFORM */ 590 591 void probe_machine(void) 592 { 593 extern struct machdep_calls __machine_desc_start; 594 extern struct machdep_calls __machine_desc_end; 595 unsigned int i; 596 597 /* 598 * Iterate all ppc_md structures until we find the proper 599 * one for the current machine type 600 */ 601 DBG("Probing machine type ...\n"); 602 603 /* 604 * Check ppc_md is empty, if not we have a bug, ie, we setup an 605 * entry before probe_machine() which will be overwritten 606 */ 607 for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) { 608 if (((void **)&ppc_md)[i]) { 609 printk(KERN_ERR "Entry %d in ppc_md non empty before" 610 " machine probe !\n", i); 611 } 612 } 613 614 for (machine_id = &__machine_desc_start; 615 machine_id < &__machine_desc_end; 616 machine_id++) { 617 DBG(" %s ...", machine_id->name); 618 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls)); 619 if (ppc_md.probe()) { 620 DBG(" match !\n"); 621 break; 622 } 623 DBG("\n"); 624 } 625 /* What can we do if we didn't find ? */ 626 if (machine_id >= &__machine_desc_end) { 627 pr_err("No suitable machine description found !\n"); 628 for (;;); 629 } 630 631 printk(KERN_INFO "Using %s machine description\n", ppc_md.name); 632 } 633 634 /* Match a class of boards, not a specific device configuration. */ 635 int check_legacy_ioport(unsigned long base_port) 636 { 637 struct device_node *parent, *np = NULL; 638 int ret = -ENODEV; 639 640 switch(base_port) { 641 case I8042_DATA_REG: 642 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303"))) 643 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03"); 644 if (np) { 645 parent = of_get_parent(np); 646 647 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0); 648 if (!of_i8042_kbd_irq) 649 of_i8042_kbd_irq = 1; 650 651 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1); 652 if (!of_i8042_aux_irq) 653 of_i8042_aux_irq = 12; 654 655 of_node_put(np); 656 np = parent; 657 break; 658 } 659 np = of_find_node_by_type(NULL, "8042"); 660 /* Pegasos has no device_type on its 8042 node, look for the 661 * name instead */ 662 if (!np) 663 np = of_find_node_by_name(NULL, "8042"); 664 if (np) { 665 of_i8042_kbd_irq = 1; 666 of_i8042_aux_irq = 12; 667 } 668 break; 669 case FDC_BASE: /* FDC1 */ 670 np = of_find_node_by_type(NULL, "fdc"); 671 break; 672 default: 673 /* ipmi is supposed to fail here */ 674 break; 675 } 676 if (!np) 677 return ret; 678 parent = of_get_parent(np); 679 if (parent) { 680 if (of_node_is_type(parent, "isa")) 681 ret = 0; 682 of_node_put(parent); 683 } 684 of_node_put(np); 685 return ret; 686 } 687 EXPORT_SYMBOL(check_legacy_ioport); 688 689 static int ppc_panic_event(struct notifier_block *this, 690 unsigned long event, void *ptr) 691 { 692 /* 693 * panic does a local_irq_disable, but we really 694 * want interrupts to be hard disabled. 695 */ 696 hard_irq_disable(); 697 698 /* 699 * If firmware-assisted dump has been registered then trigger 700 * firmware-assisted dump and let firmware handle everything else. 701 */ 702 crash_fadump(NULL, ptr); 703 if (ppc_md.panic) 704 ppc_md.panic(ptr); /* May not return */ 705 return NOTIFY_DONE; 706 } 707 708 static struct notifier_block ppc_panic_block = { 709 .notifier_call = ppc_panic_event, 710 .priority = INT_MIN /* may not return; must be done last */ 711 }; 712 713 /* 714 * Dump out kernel offset information on panic. 715 */ 716 static int dump_kernel_offset(struct notifier_block *self, unsigned long v, 717 void *p) 718 { 719 pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n", 720 kaslr_offset(), KERNELBASE); 721 722 return 0; 723 } 724 725 static struct notifier_block kernel_offset_notifier = { 726 .notifier_call = dump_kernel_offset 727 }; 728 729 void __init setup_panic(void) 730 { 731 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0) 732 atomic_notifier_chain_register(&panic_notifier_list, 733 &kernel_offset_notifier); 734 735 /* PPC64 always does a hard irq disable in its panic handler */ 736 if (!IS_ENABLED(CONFIG_PPC64) && !ppc_md.panic) 737 return; 738 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block); 739 } 740 741 #ifdef CONFIG_CHECK_CACHE_COHERENCY 742 /* 743 * For platforms that have configurable cache-coherency. This function 744 * checks that the cache coherency setting of the kernel matches the setting 745 * left by the firmware, as indicated in the device tree. Since a mismatch 746 * will eventually result in DMA failures, we print * and error and call 747 * BUG() in that case. 748 */ 749 750 #define KERNEL_COHERENCY (!IS_ENABLED(CONFIG_NOT_COHERENT_CACHE)) 751 752 static int __init check_cache_coherency(void) 753 { 754 struct device_node *np; 755 const void *prop; 756 bool devtree_coherency; 757 758 np = of_find_node_by_path("/"); 759 prop = of_get_property(np, "coherency-off", NULL); 760 of_node_put(np); 761 762 devtree_coherency = prop ? false : true; 763 764 if (devtree_coherency != KERNEL_COHERENCY) { 765 printk(KERN_ERR 766 "kernel coherency:%s != device tree_coherency:%s\n", 767 KERNEL_COHERENCY ? "on" : "off", 768 devtree_coherency ? "on" : "off"); 769 BUG(); 770 } 771 772 return 0; 773 } 774 775 late_initcall(check_cache_coherency); 776 #endif /* CONFIG_CHECK_CACHE_COHERENCY */ 777 778 #ifdef CONFIG_DEBUG_FS 779 struct dentry *powerpc_debugfs_root; 780 EXPORT_SYMBOL(powerpc_debugfs_root); 781 782 static int powerpc_debugfs_init(void) 783 { 784 powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL); 785 return 0; 786 } 787 arch_initcall(powerpc_debugfs_init); 788 #endif 789 790 void ppc_printk_progress(char *s, unsigned short hex) 791 { 792 pr_info("%s\n", s); 793 } 794 795 static __init void print_system_info(void) 796 { 797 pr_info("-----------------------------------------------------\n"); 798 pr_info("phys_mem_size = 0x%llx\n", 799 (unsigned long long)memblock_phys_mem_size()); 800 801 pr_info("dcache_bsize = 0x%x\n", dcache_bsize); 802 pr_info("icache_bsize = 0x%x\n", icache_bsize); 803 804 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features); 805 pr_info(" possible = 0x%016lx\n", 806 (unsigned long)CPU_FTRS_POSSIBLE); 807 pr_info(" always = 0x%016lx\n", 808 (unsigned long)CPU_FTRS_ALWAYS); 809 pr_info("cpu_user_features = 0x%08x 0x%08x\n", 810 cur_cpu_spec->cpu_user_features, 811 cur_cpu_spec->cpu_user_features2); 812 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features); 813 #ifdef CONFIG_PPC64 814 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features); 815 #ifdef CONFIG_PPC_BOOK3S 816 pr_info("vmalloc start = 0x%lx\n", KERN_VIRT_START); 817 pr_info("IO start = 0x%lx\n", KERN_IO_START); 818 pr_info("vmemmap start = 0x%lx\n", (unsigned long)vmemmap); 819 #endif 820 #endif 821 822 if (!early_radix_enabled()) 823 print_system_hash_info(); 824 825 if (PHYSICAL_START > 0) 826 pr_info("physical_start = 0x%llx\n", 827 (unsigned long long)PHYSICAL_START); 828 pr_info("-----------------------------------------------------\n"); 829 } 830 831 #ifdef CONFIG_SMP 832 static void smp_setup_pacas(void) 833 { 834 int cpu; 835 836 for_each_possible_cpu(cpu) { 837 if (cpu == smp_processor_id()) 838 continue; 839 allocate_paca(cpu); 840 set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]); 841 } 842 843 memblock_free(__pa(cpu_to_phys_id), nr_cpu_ids * sizeof(u32)); 844 cpu_to_phys_id = NULL; 845 } 846 #endif 847 848 /* 849 * Called into from start_kernel this initializes memblock, which is used 850 * to manage page allocation until mem_init is called. 851 */ 852 void __init setup_arch(char **cmdline_p) 853 { 854 kasan_init(); 855 856 *cmdline_p = boot_command_line; 857 858 /* Set a half-reasonable default so udelay does something sensible */ 859 loops_per_jiffy = 500000000 / HZ; 860 861 /* Unflatten the device-tree passed by prom_init or kexec */ 862 unflatten_device_tree(); 863 864 /* 865 * Initialize cache line/block info from device-tree (on ppc64) or 866 * just cputable (on ppc32). 867 */ 868 initialize_cache_info(); 869 870 /* Initialize RTAS if available. */ 871 rtas_initialize(); 872 873 /* Check if we have an initrd provided via the device-tree. */ 874 check_for_initrd(); 875 876 /* Probe the machine type, establish ppc_md. */ 877 probe_machine(); 878 879 /* Setup panic notifier if requested by the platform. */ 880 setup_panic(); 881 882 /* 883 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do 884 * it from their respective probe() function. 885 */ 886 setup_power_save(); 887 888 /* Discover standard serial ports. */ 889 find_legacy_serial_ports(); 890 891 /* Register early console with the printk subsystem. */ 892 register_early_udbg_console(); 893 894 /* Setup the various CPU maps based on the device-tree. */ 895 smp_setup_cpu_maps(); 896 897 /* Initialize xmon. */ 898 xmon_setup(); 899 900 /* Check the SMT related command line arguments (ppc64). */ 901 check_smt_enabled(); 902 903 /* Parse memory topology */ 904 mem_topology_setup(); 905 906 /* 907 * Release secondary cpus out of their spinloops at 0x60 now that 908 * we can map physical -> logical CPU ids. 909 * 910 * Freescale Book3e parts spin in a loop provided by firmware, 911 * so smp_release_cpus() does nothing for them. 912 */ 913 #ifdef CONFIG_SMP 914 smp_setup_pacas(); 915 916 /* On BookE, setup per-core TLB data structures. */ 917 setup_tlb_core_data(); 918 #endif 919 920 /* Print various info about the machine that has been gathered so far. */ 921 print_system_info(); 922 923 /* Reserve large chunks of memory for use by CMA for KVM. */ 924 kvm_cma_reserve(); 925 926 /* Reserve large chunks of memory for us by CMA for hugetlb */ 927 gigantic_hugetlb_cma_reserve(); 928 929 klp_init_thread_info(&init_task); 930 931 init_mm.start_code = (unsigned long)_stext; 932 init_mm.end_code = (unsigned long) _etext; 933 init_mm.end_data = (unsigned long) _edata; 934 init_mm.brk = klimit; 935 936 mm_iommu_init(&init_mm); 937 irqstack_early_init(); 938 exc_lvl_early_init(); 939 emergency_stack_init(); 940 941 mce_init(); 942 smp_release_cpus(); 943 944 initmem_init(); 945 946 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT); 947 948 if (ppc_md.setup_arch) 949 ppc_md.setup_arch(); 950 951 setup_barrier_nospec(); 952 setup_spectre_v2(); 953 954 paging_init(); 955 956 /* Initialize the MMU context management stuff. */ 957 mmu_context_init(); 958 959 /* Interrupt code needs to be 64K-aligned. */ 960 if (IS_ENABLED(CONFIG_PPC64) && (unsigned long)_stext & 0xffff) 961 panic("Kernelbase not 64K-aligned (0x%lx)!\n", 962 (unsigned long)_stext); 963 } 964