1 /*
2  * Common boot and setup code for both 32-bit and 64-bit.
3  * Extracted from arch/powerpc/kernel/setup_64.c.
4  *
5  * Copyright (C) 2001 PPC64 Team, IBM Corp
6  *
7  *      This program is free software; you can redistribute it and/or
8  *      modify it under the terms of the GNU General Public License
9  *      as published by the Free Software Foundation; either version
10  *      2 of the License, or (at your option) any later version.
11  */
12 
13 #undef DEBUG
14 
15 #include <linux/module.h>
16 #include <linux/string.h>
17 #include <linux/sched.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/reboot.h>
21 #include <linux/delay.h>
22 #include <linux/initrd.h>
23 #include <linux/platform_device.h>
24 #include <linux/seq_file.h>
25 #include <linux/ioport.h>
26 #include <linux/console.h>
27 #include <linux/screen_info.h>
28 #include <linux/root_dev.h>
29 #include <linux/notifier.h>
30 #include <linux/cpu.h>
31 #include <linux/unistd.h>
32 #include <linux/serial.h>
33 #include <linux/serial_8250.h>
34 #include <linux/debugfs.h>
35 #include <linux/percpu.h>
36 #include <linux/memblock.h>
37 #include <linux/of_platform.h>
38 #include <asm/io.h>
39 #include <asm/paca.h>
40 #include <asm/prom.h>
41 #include <asm/processor.h>
42 #include <asm/vdso_datapage.h>
43 #include <asm/pgtable.h>
44 #include <asm/smp.h>
45 #include <asm/elf.h>
46 #include <asm/machdep.h>
47 #include <asm/time.h>
48 #include <asm/cputable.h>
49 #include <asm/sections.h>
50 #include <asm/firmware.h>
51 #include <asm/btext.h>
52 #include <asm/nvram.h>
53 #include <asm/setup.h>
54 #include <asm/system.h>
55 #include <asm/rtas.h>
56 #include <asm/iommu.h>
57 #include <asm/serial.h>
58 #include <asm/cache.h>
59 #include <asm/page.h>
60 #include <asm/mmu.h>
61 #include <asm/xmon.h>
62 #include <asm/cputhreads.h>
63 #include <mm/mmu_decl.h>
64 
65 #include "setup.h"
66 
67 #ifdef DEBUG
68 #include <asm/udbg.h>
69 #define DBG(fmt...) udbg_printf(fmt)
70 #else
71 #define DBG(fmt...)
72 #endif
73 
74 /* The main machine-dep calls structure
75  */
76 struct machdep_calls ppc_md;
77 EXPORT_SYMBOL(ppc_md);
78 struct machdep_calls *machine_id;
79 EXPORT_SYMBOL(machine_id);
80 
81 unsigned long klimit = (unsigned long) _end;
82 
83 char cmd_line[COMMAND_LINE_SIZE];
84 
85 /*
86  * This still seems to be needed... -- paulus
87  */
88 struct screen_info screen_info = {
89 	.orig_x = 0,
90 	.orig_y = 25,
91 	.orig_video_cols = 80,
92 	.orig_video_lines = 25,
93 	.orig_video_isVGA = 1,
94 	.orig_video_points = 16
95 };
96 
97 /* Variables required to store legacy IO irq routing */
98 int of_i8042_kbd_irq;
99 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
100 int of_i8042_aux_irq;
101 EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
102 
103 #ifdef __DO_IRQ_CANON
104 /* XXX should go elsewhere eventually */
105 int ppc_do_canonicalize_irqs;
106 EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
107 #endif
108 
109 /* also used by kexec */
110 void machine_shutdown(void)
111 {
112 	if (ppc_md.machine_shutdown)
113 		ppc_md.machine_shutdown();
114 }
115 
116 void machine_restart(char *cmd)
117 {
118 	machine_shutdown();
119 	if (ppc_md.restart)
120 		ppc_md.restart(cmd);
121 #ifdef CONFIG_SMP
122 	smp_send_stop();
123 #endif
124 	printk(KERN_EMERG "System Halted, OK to turn off power\n");
125 	local_irq_disable();
126 	while (1) ;
127 }
128 
129 void machine_power_off(void)
130 {
131 	machine_shutdown();
132 	if (ppc_md.power_off)
133 		ppc_md.power_off();
134 #ifdef CONFIG_SMP
135 	smp_send_stop();
136 #endif
137 	printk(KERN_EMERG "System Halted, OK to turn off power\n");
138 	local_irq_disable();
139 	while (1) ;
140 }
141 /* Used by the G5 thermal driver */
142 EXPORT_SYMBOL_GPL(machine_power_off);
143 
144 void (*pm_power_off)(void) = machine_power_off;
145 EXPORT_SYMBOL_GPL(pm_power_off);
146 
147 void machine_halt(void)
148 {
149 	machine_shutdown();
150 	if (ppc_md.halt)
151 		ppc_md.halt();
152 #ifdef CONFIG_SMP
153 	smp_send_stop();
154 #endif
155 	printk(KERN_EMERG "System Halted, OK to turn off power\n");
156 	local_irq_disable();
157 	while (1) ;
158 }
159 
160 
161 #ifdef CONFIG_TAU
162 extern u32 cpu_temp(unsigned long cpu);
163 extern u32 cpu_temp_both(unsigned long cpu);
164 #endif /* CONFIG_TAU */
165 
166 #ifdef CONFIG_SMP
167 DEFINE_PER_CPU(unsigned int, cpu_pvr);
168 #endif
169 
170 static void show_cpuinfo_summary(struct seq_file *m)
171 {
172 	struct device_node *root;
173 	const char *model = NULL;
174 #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
175 	unsigned long bogosum = 0;
176 	int i;
177 	for_each_online_cpu(i)
178 		bogosum += loops_per_jiffy;
179 	seq_printf(m, "total bogomips\t: %lu.%02lu\n",
180 		   bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
181 #endif /* CONFIG_SMP && CONFIG_PPC32 */
182 	seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
183 	if (ppc_md.name)
184 		seq_printf(m, "platform\t: %s\n", ppc_md.name);
185 	root = of_find_node_by_path("/");
186 	if (root)
187 		model = of_get_property(root, "model", NULL);
188 	if (model)
189 		seq_printf(m, "model\t\t: %s\n", model);
190 	of_node_put(root);
191 
192 	if (ppc_md.show_cpuinfo != NULL)
193 		ppc_md.show_cpuinfo(m);
194 
195 #ifdef CONFIG_PPC32
196 	/* Display the amount of memory */
197 	seq_printf(m, "Memory\t\t: %d MB\n",
198 		   (unsigned int)(total_memory / (1024 * 1024)));
199 #endif
200 }
201 
202 static int show_cpuinfo(struct seq_file *m, void *v)
203 {
204 	unsigned long cpu_id = (unsigned long)v - 1;
205 	unsigned int pvr;
206 	unsigned short maj;
207 	unsigned short min;
208 
209 	/* We only show online cpus: disable preempt (overzealous, I
210 	 * knew) to prevent cpu going down. */
211 	preempt_disable();
212 	if (!cpu_online(cpu_id)) {
213 		preempt_enable();
214 		return 0;
215 	}
216 
217 #ifdef CONFIG_SMP
218 	pvr = per_cpu(cpu_pvr, cpu_id);
219 #else
220 	pvr = mfspr(SPRN_PVR);
221 #endif
222 	maj = (pvr >> 8) & 0xFF;
223 	min = pvr & 0xFF;
224 
225 	seq_printf(m, "processor\t: %lu\n", cpu_id);
226 	seq_printf(m, "cpu\t\t: ");
227 
228 	if (cur_cpu_spec->pvr_mask)
229 		seq_printf(m, "%s", cur_cpu_spec->cpu_name);
230 	else
231 		seq_printf(m, "unknown (%08x)", pvr);
232 
233 #ifdef CONFIG_ALTIVEC
234 	if (cpu_has_feature(CPU_FTR_ALTIVEC))
235 		seq_printf(m, ", altivec supported");
236 #endif /* CONFIG_ALTIVEC */
237 
238 	seq_printf(m, "\n");
239 
240 #ifdef CONFIG_TAU
241 	if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
242 #ifdef CONFIG_TAU_AVERAGE
243 		/* more straightforward, but potentially misleading */
244 		seq_printf(m,  "temperature \t: %u C (uncalibrated)\n",
245 			   cpu_temp(cpu_id));
246 #else
247 		/* show the actual temp sensor range */
248 		u32 temp;
249 		temp = cpu_temp_both(cpu_id);
250 		seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
251 			   temp & 0xff, temp >> 16);
252 #endif
253 	}
254 #endif /* CONFIG_TAU */
255 
256 	/*
257 	 * Assume here that all clock rates are the same in a
258 	 * smp system.  -- Cort
259 	 */
260 	if (ppc_proc_freq)
261 		seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
262 			   ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
263 
264 	if (ppc_md.show_percpuinfo != NULL)
265 		ppc_md.show_percpuinfo(m, cpu_id);
266 
267 	/* If we are a Freescale core do a simple check so
268 	 * we dont have to keep adding cases in the future */
269 	if (PVR_VER(pvr) & 0x8000) {
270 		switch (PVR_VER(pvr)) {
271 		case 0x8000:	/* 7441/7450/7451, Voyager */
272 		case 0x8001:	/* 7445/7455, Apollo 6 */
273 		case 0x8002:	/* 7447/7457, Apollo 7 */
274 		case 0x8003:	/* 7447A, Apollo 7 PM */
275 		case 0x8004:	/* 7448, Apollo 8 */
276 		case 0x800c:	/* 7410, Nitro */
277 			maj = ((pvr >> 8) & 0xF);
278 			min = PVR_MIN(pvr);
279 			break;
280 		default:	/* e500/book-e */
281 			maj = PVR_MAJ(pvr);
282 			min = PVR_MIN(pvr);
283 			break;
284 		}
285 	} else {
286 		switch (PVR_VER(pvr)) {
287 			case 0x0020:	/* 403 family */
288 				maj = PVR_MAJ(pvr) + 1;
289 				min = PVR_MIN(pvr);
290 				break;
291 			case 0x1008:	/* 740P/750P ?? */
292 				maj = ((pvr >> 8) & 0xFF) - 1;
293 				min = pvr & 0xFF;
294 				break;
295 			default:
296 				maj = (pvr >> 8) & 0xFF;
297 				min = pvr & 0xFF;
298 				break;
299 		}
300 	}
301 
302 	seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
303 		   maj, min, PVR_VER(pvr), PVR_REV(pvr));
304 
305 #ifdef CONFIG_PPC32
306 	seq_printf(m, "bogomips\t: %lu.%02lu\n",
307 		   loops_per_jiffy / (500000/HZ),
308 		   (loops_per_jiffy / (5000/HZ)) % 100);
309 #endif
310 
311 #ifdef CONFIG_SMP
312 	seq_printf(m, "\n");
313 #endif
314 
315 	preempt_enable();
316 
317 	/* If this is the last cpu, print the summary */
318 	if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
319 		show_cpuinfo_summary(m);
320 
321 	return 0;
322 }
323 
324 static void *c_start(struct seq_file *m, loff_t *pos)
325 {
326 	if (*pos == 0)	/* just in case, cpu 0 is not the first */
327 		*pos = cpumask_first(cpu_online_mask);
328 	else
329 		*pos = cpumask_next(*pos - 1, cpu_online_mask);
330 	if ((*pos) < nr_cpu_ids)
331 		return (void *)(unsigned long)(*pos + 1);
332 	return NULL;
333 }
334 
335 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
336 {
337 	(*pos)++;
338 	return c_start(m, pos);
339 }
340 
341 static void c_stop(struct seq_file *m, void *v)
342 {
343 }
344 
345 const struct seq_operations cpuinfo_op = {
346 	.start =c_start,
347 	.next =	c_next,
348 	.stop =	c_stop,
349 	.show =	show_cpuinfo,
350 };
351 
352 void __init check_for_initrd(void)
353 {
354 #ifdef CONFIG_BLK_DEV_INITRD
355 	DBG(" -> check_for_initrd()  initrd_start=0x%lx  initrd_end=0x%lx\n",
356 	    initrd_start, initrd_end);
357 
358 	/* If we were passed an initrd, set the ROOT_DEV properly if the values
359 	 * look sensible. If not, clear initrd reference.
360 	 */
361 	if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
362 	    initrd_end > initrd_start)
363 		ROOT_DEV = Root_RAM0;
364 	else
365 		initrd_start = initrd_end = 0;
366 
367 	if (initrd_start)
368 		printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
369 
370 	DBG(" <- check_for_initrd()\n");
371 #endif /* CONFIG_BLK_DEV_INITRD */
372 }
373 
374 #ifdef CONFIG_SMP
375 
376 int threads_per_core, threads_shift;
377 cpumask_t threads_core_mask;
378 EXPORT_SYMBOL_GPL(threads_per_core);
379 EXPORT_SYMBOL_GPL(threads_shift);
380 EXPORT_SYMBOL_GPL(threads_core_mask);
381 
382 static void __init cpu_init_thread_core_maps(int tpc)
383 {
384 	int i;
385 
386 	threads_per_core = tpc;
387 	cpumask_clear(&threads_core_mask);
388 
389 	/* This implementation only supports power of 2 number of threads
390 	 * for simplicity and performance
391 	 */
392 	threads_shift = ilog2(tpc);
393 	BUG_ON(tpc != (1 << threads_shift));
394 
395 	for (i = 0; i < tpc; i++)
396 		cpumask_set_cpu(i, &threads_core_mask);
397 
398 	printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
399 	       tpc, tpc > 1 ? "s" : "");
400 	printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
401 }
402 
403 
404 /**
405  * setup_cpu_maps - initialize the following cpu maps:
406  *                  cpu_possible_mask
407  *                  cpu_present_mask
408  *
409  * Having the possible map set up early allows us to restrict allocations
410  * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
411  *
412  * We do not initialize the online map here; cpus set their own bits in
413  * cpu_online_mask as they come up.
414  *
415  * This function is valid only for Open Firmware systems.  finish_device_tree
416  * must be called before using this.
417  *
418  * While we're here, we may as well set the "physical" cpu ids in the paca.
419  *
420  * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
421  */
422 void __init smp_setup_cpu_maps(void)
423 {
424 	struct device_node *dn = NULL;
425 	int cpu = 0;
426 	int nthreads = 1;
427 
428 	DBG("smp_setup_cpu_maps()\n");
429 
430 	while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) {
431 		const int *intserv;
432 		int j, len;
433 
434 		DBG("  * %s...\n", dn->full_name);
435 
436 		intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
437 				&len);
438 		if (intserv) {
439 			nthreads = len / sizeof(int);
440 			DBG("    ibm,ppc-interrupt-server#s -> %d threads\n",
441 			    nthreads);
442 		} else {
443 			DBG("    no ibm,ppc-interrupt-server#s -> 1 thread\n");
444 			intserv = of_get_property(dn, "reg", NULL);
445 			if (!intserv)
446 				intserv = &cpu;	/* assume logical == phys */
447 		}
448 
449 		for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
450 			DBG("    thread %d -> cpu %d (hard id %d)\n",
451 			    j, cpu, intserv[j]);
452 			set_cpu_present(cpu, true);
453 			set_hard_smp_processor_id(cpu, intserv[j]);
454 			set_cpu_possible(cpu, true);
455 			cpu++;
456 		}
457 	}
458 
459 	/* If no SMT supported, nthreads is forced to 1 */
460 	if (!cpu_has_feature(CPU_FTR_SMT)) {
461 		DBG("  SMT disabled ! nthreads forced to 1\n");
462 		nthreads = 1;
463 	}
464 
465 #ifdef CONFIG_PPC64
466 	/*
467 	 * On pSeries LPAR, we need to know how many cpus
468 	 * could possibly be added to this partition.
469 	 */
470 	if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
471 	    (dn = of_find_node_by_path("/rtas"))) {
472 		int num_addr_cell, num_size_cell, maxcpus;
473 		const unsigned int *ireg;
474 
475 		num_addr_cell = of_n_addr_cells(dn);
476 		num_size_cell = of_n_size_cells(dn);
477 
478 		ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
479 
480 		if (!ireg)
481 			goto out;
482 
483 		maxcpus = ireg[num_addr_cell + num_size_cell];
484 
485 		/* Double maxcpus for processors which have SMT capability */
486 		if (cpu_has_feature(CPU_FTR_SMT))
487 			maxcpus *= nthreads;
488 
489 		if (maxcpus > nr_cpu_ids) {
490 			printk(KERN_WARNING
491 			       "Partition configured for %d cpus, "
492 			       "operating system maximum is %d.\n",
493 			       maxcpus, nr_cpu_ids);
494 			maxcpus = nr_cpu_ids;
495 		} else
496 			printk(KERN_INFO "Partition configured for %d cpus.\n",
497 			       maxcpus);
498 
499 		for (cpu = 0; cpu < maxcpus; cpu++)
500 			set_cpu_possible(cpu, true);
501 	out:
502 		of_node_put(dn);
503 	}
504 	vdso_data->processorCount = num_present_cpus();
505 #endif /* CONFIG_PPC64 */
506 
507         /* Initialize CPU <=> thread mapping/
508 	 *
509 	 * WARNING: We assume that the number of threads is the same for
510 	 * every CPU in the system. If that is not the case, then some code
511 	 * here will have to be reworked
512 	 */
513 	cpu_init_thread_core_maps(nthreads);
514 
515 	/* Now that possible cpus are set, set nr_cpu_ids for later use */
516 	setup_nr_cpu_ids();
517 
518 	free_unused_pacas();
519 }
520 #endif /* CONFIG_SMP */
521 
522 #ifdef CONFIG_PCSPKR_PLATFORM
523 static __init int add_pcspkr(void)
524 {
525 	struct device_node *np;
526 	struct platform_device *pd;
527 	int ret;
528 
529 	np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
530 	of_node_put(np);
531 	if (!np)
532 		return -ENODEV;
533 
534 	pd = platform_device_alloc("pcspkr", -1);
535 	if (!pd)
536 		return -ENOMEM;
537 
538 	ret = platform_device_add(pd);
539 	if (ret)
540 		platform_device_put(pd);
541 
542 	return ret;
543 }
544 device_initcall(add_pcspkr);
545 #endif	/* CONFIG_PCSPKR_PLATFORM */
546 
547 void probe_machine(void)
548 {
549 	extern struct machdep_calls __machine_desc_start;
550 	extern struct machdep_calls __machine_desc_end;
551 
552 	/*
553 	 * Iterate all ppc_md structures until we find the proper
554 	 * one for the current machine type
555 	 */
556 	DBG("Probing machine type ...\n");
557 
558 	for (machine_id = &__machine_desc_start;
559 	     machine_id < &__machine_desc_end;
560 	     machine_id++) {
561 		DBG("  %s ...", machine_id->name);
562 		memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
563 		if (ppc_md.probe()) {
564 			DBG(" match !\n");
565 			break;
566 		}
567 		DBG("\n");
568 	}
569 	/* What can we do if we didn't find ? */
570 	if (machine_id >= &__machine_desc_end) {
571 		DBG("No suitable machine found !\n");
572 		for (;;);
573 	}
574 
575 	printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
576 }
577 
578 /* Match a class of boards, not a specific device configuration. */
579 int check_legacy_ioport(unsigned long base_port)
580 {
581 	struct device_node *parent, *np = NULL;
582 	int ret = -ENODEV;
583 
584 	switch(base_port) {
585 	case I8042_DATA_REG:
586 		if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
587 			np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
588 		if (np) {
589 			parent = of_get_parent(np);
590 
591 			of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
592 			if (!of_i8042_kbd_irq)
593 				of_i8042_kbd_irq = 1;
594 
595 			of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
596 			if (!of_i8042_aux_irq)
597 				of_i8042_aux_irq = 12;
598 
599 			of_node_put(np);
600 			np = parent;
601 			break;
602 		}
603 		np = of_find_node_by_type(NULL, "8042");
604 		/* Pegasos has no device_type on its 8042 node, look for the
605 		 * name instead */
606 		if (!np)
607 			np = of_find_node_by_name(NULL, "8042");
608 		if (np) {
609 			of_i8042_kbd_irq = 1;
610 			of_i8042_aux_irq = 12;
611 		}
612 		break;
613 	case FDC_BASE: /* FDC1 */
614 		np = of_find_node_by_type(NULL, "fdc");
615 		break;
616 #ifdef CONFIG_PPC_PREP
617 	case _PIDXR:
618 	case _PNPWRP:
619 	case PNPBIOS_BASE:
620 		/* implement me */
621 #endif
622 	default:
623 		/* ipmi is supposed to fail here */
624 		break;
625 	}
626 	if (!np)
627 		return ret;
628 	parent = of_get_parent(np);
629 	if (parent) {
630 		if (strcmp(parent->type, "isa") == 0)
631 			ret = 0;
632 		of_node_put(parent);
633 	}
634 	of_node_put(np);
635 	return ret;
636 }
637 EXPORT_SYMBOL(check_legacy_ioport);
638 
639 static int ppc_panic_event(struct notifier_block *this,
640                              unsigned long event, void *ptr)
641 {
642 	ppc_md.panic(ptr);  /* May not return */
643 	return NOTIFY_DONE;
644 }
645 
646 static struct notifier_block ppc_panic_block = {
647 	.notifier_call = ppc_panic_event,
648 	.priority = INT_MIN /* may not return; must be done last */
649 };
650 
651 void __init setup_panic(void)
652 {
653 	atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
654 }
655 
656 #ifdef CONFIG_CHECK_CACHE_COHERENCY
657 /*
658  * For platforms that have configurable cache-coherency.  This function
659  * checks that the cache coherency setting of the kernel matches the setting
660  * left by the firmware, as indicated in the device tree.  Since a mismatch
661  * will eventually result in DMA failures, we print * and error and call
662  * BUG() in that case.
663  */
664 
665 #ifdef CONFIG_NOT_COHERENT_CACHE
666 #define KERNEL_COHERENCY	0
667 #else
668 #define KERNEL_COHERENCY	1
669 #endif
670 
671 static int __init check_cache_coherency(void)
672 {
673 	struct device_node *np;
674 	const void *prop;
675 	int devtree_coherency;
676 
677 	np = of_find_node_by_path("/");
678 	prop = of_get_property(np, "coherency-off", NULL);
679 	of_node_put(np);
680 
681 	devtree_coherency = prop ? 0 : 1;
682 
683 	if (devtree_coherency != KERNEL_COHERENCY) {
684 		printk(KERN_ERR
685 			"kernel coherency:%s != device tree_coherency:%s\n",
686 			KERNEL_COHERENCY ? "on" : "off",
687 			devtree_coherency ? "on" : "off");
688 		BUG();
689 	}
690 
691 	return 0;
692 }
693 
694 late_initcall(check_cache_coherency);
695 #endif /* CONFIG_CHECK_CACHE_COHERENCY */
696 
697 #ifdef CONFIG_DEBUG_FS
698 struct dentry *powerpc_debugfs_root;
699 EXPORT_SYMBOL(powerpc_debugfs_root);
700 
701 static int powerpc_debugfs_init(void)
702 {
703 	powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
704 
705 	return powerpc_debugfs_root == NULL;
706 }
707 arch_initcall(powerpc_debugfs_init);
708 #endif
709 
710 void ppc_printk_progress(char *s, unsigned short hex)
711 {
712 	pr_info("%s\n", s);
713 }
714 
715 void arch_setup_pdev_archdata(struct platform_device *pdev)
716 {
717 	pdev->archdata.dma_mask = DMA_BIT_MASK(32);
718 	pdev->dev.dma_mask = &pdev->archdata.dma_mask;
719  	set_dma_ops(&pdev->dev, &dma_direct_ops);
720 }
721