1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Common boot and setup code for both 32-bit and 64-bit. 4 * Extracted from arch/powerpc/kernel/setup_64.c. 5 * 6 * Copyright (C) 2001 PPC64 Team, IBM Corp 7 */ 8 9 #undef DEBUG 10 11 #include <linux/export.h> 12 #include <linux/panic_notifier.h> 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/init.h> 16 #include <linux/kernel.h> 17 #include <linux/reboot.h> 18 #include <linux/delay.h> 19 #include <linux/initrd.h> 20 #include <linux/platform_device.h> 21 #include <linux/printk.h> 22 #include <linux/seq_file.h> 23 #include <linux/ioport.h> 24 #include <linux/console.h> 25 #include <linux/screen_info.h> 26 #include <linux/root_dev.h> 27 #include <linux/cpu.h> 28 #include <linux/unistd.h> 29 #include <linux/seq_buf.h> 30 #include <linux/serial.h> 31 #include <linux/serial_8250.h> 32 #include <linux/percpu.h> 33 #include <linux/memblock.h> 34 #include <linux/of.h> 35 #include <linux/of_fdt.h> 36 #include <linux/of_irq.h> 37 #include <linux/hugetlb.h> 38 #include <linux/pgtable.h> 39 #include <asm/io.h> 40 #include <asm/paca.h> 41 #include <asm/processor.h> 42 #include <asm/vdso_datapage.h> 43 #include <asm/smp.h> 44 #include <asm/elf.h> 45 #include <asm/machdep.h> 46 #include <asm/time.h> 47 #include <asm/cputable.h> 48 #include <asm/sections.h> 49 #include <asm/firmware.h> 50 #include <asm/btext.h> 51 #include <asm/nvram.h> 52 #include <asm/setup.h> 53 #include <asm/rtas.h> 54 #include <asm/iommu.h> 55 #include <asm/serial.h> 56 #include <asm/cache.h> 57 #include <asm/page.h> 58 #include <asm/mmu.h> 59 #include <asm/xmon.h> 60 #include <asm/cputhreads.h> 61 #include <mm/mmu_decl.h> 62 #include <asm/archrandom.h> 63 #include <asm/fadump.h> 64 #include <asm/udbg.h> 65 #include <asm/hugetlb.h> 66 #include <asm/livepatch.h> 67 #include <asm/mmu_context.h> 68 #include <asm/cpu_has_feature.h> 69 #include <asm/kasan.h> 70 #include <asm/mce.h> 71 72 #include "setup.h" 73 74 #ifdef DEBUG 75 #define DBG(fmt...) udbg_printf(fmt) 76 #else 77 #define DBG(fmt...) 78 #endif 79 80 /* The main machine-dep calls structure 81 */ 82 struct machdep_calls ppc_md; 83 EXPORT_SYMBOL(ppc_md); 84 struct machdep_calls *machine_id; 85 EXPORT_SYMBOL(machine_id); 86 87 int boot_cpuid = -1; 88 EXPORT_SYMBOL_GPL(boot_cpuid); 89 90 #ifdef CONFIG_PPC64 91 int boot_cpu_hwid = -1; 92 #endif 93 94 /* 95 * These are used in binfmt_elf.c to put aux entries on the stack 96 * for each elf executable being started. 97 */ 98 int dcache_bsize; 99 int icache_bsize; 100 101 /* 102 * This still seems to be needed... -- paulus 103 */ 104 struct screen_info screen_info = { 105 .orig_x = 0, 106 .orig_y = 25, 107 .orig_video_cols = 80, 108 .orig_video_lines = 25, 109 .orig_video_isVGA = 1, 110 .orig_video_points = 16 111 }; 112 #if defined(CONFIG_FB_VGA16_MODULE) 113 EXPORT_SYMBOL(screen_info); 114 #endif 115 116 /* Variables required to store legacy IO irq routing */ 117 int of_i8042_kbd_irq; 118 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq); 119 int of_i8042_aux_irq; 120 EXPORT_SYMBOL_GPL(of_i8042_aux_irq); 121 122 #ifdef __DO_IRQ_CANON 123 /* XXX should go elsewhere eventually */ 124 int ppc_do_canonicalize_irqs; 125 EXPORT_SYMBOL(ppc_do_canonicalize_irqs); 126 #endif 127 128 #ifdef CONFIG_CRASH_CORE 129 /* This keeps a track of which one is the crashing cpu. */ 130 int crashing_cpu = -1; 131 #endif 132 133 /* also used by kexec */ 134 void machine_shutdown(void) 135 { 136 /* 137 * if fadump is active, cleanup the fadump registration before we 138 * shutdown. 139 */ 140 fadump_cleanup(); 141 142 if (ppc_md.machine_shutdown) 143 ppc_md.machine_shutdown(); 144 } 145 146 static void machine_hang(void) 147 { 148 pr_emerg("System Halted, OK to turn off power\n"); 149 local_irq_disable(); 150 while (1) 151 ; 152 } 153 154 void machine_restart(char *cmd) 155 { 156 machine_shutdown(); 157 if (ppc_md.restart) 158 ppc_md.restart(cmd); 159 160 smp_send_stop(); 161 162 do_kernel_restart(cmd); 163 mdelay(1000); 164 165 machine_hang(); 166 } 167 168 void machine_power_off(void) 169 { 170 machine_shutdown(); 171 do_kernel_power_off(); 172 smp_send_stop(); 173 machine_hang(); 174 } 175 /* Used by the G5 thermal driver */ 176 EXPORT_SYMBOL_GPL(machine_power_off); 177 178 void (*pm_power_off)(void); 179 EXPORT_SYMBOL_GPL(pm_power_off); 180 181 size_t __must_check arch_get_random_seed_longs(unsigned long *v, size_t max_longs) 182 { 183 if (max_longs && ppc_md.get_random_seed && ppc_md.get_random_seed(v)) 184 return 1; 185 return 0; 186 } 187 EXPORT_SYMBOL(arch_get_random_seed_longs); 188 189 void machine_halt(void) 190 { 191 machine_shutdown(); 192 if (ppc_md.halt) 193 ppc_md.halt(); 194 195 smp_send_stop(); 196 machine_hang(); 197 } 198 199 #ifdef CONFIG_SMP 200 DEFINE_PER_CPU(unsigned int, cpu_pvr); 201 #endif 202 203 static void show_cpuinfo_summary(struct seq_file *m) 204 { 205 struct device_node *root; 206 const char *model = NULL; 207 unsigned long bogosum = 0; 208 int i; 209 210 if (IS_ENABLED(CONFIG_SMP) && IS_ENABLED(CONFIG_PPC32)) { 211 for_each_online_cpu(i) 212 bogosum += loops_per_jiffy; 213 seq_printf(m, "total bogomips\t: %lu.%02lu\n", 214 bogosum / (500000 / HZ), bogosum / (5000 / HZ) % 100); 215 } 216 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq); 217 if (ppc_md.name) 218 seq_printf(m, "platform\t: %s\n", ppc_md.name); 219 root = of_find_node_by_path("/"); 220 if (root) 221 model = of_get_property(root, "model", NULL); 222 if (model) 223 seq_printf(m, "model\t\t: %s\n", model); 224 of_node_put(root); 225 226 if (ppc_md.show_cpuinfo != NULL) 227 ppc_md.show_cpuinfo(m); 228 229 /* Display the amount of memory */ 230 if (IS_ENABLED(CONFIG_PPC32)) 231 seq_printf(m, "Memory\t\t: %d MB\n", 232 (unsigned int)(total_memory / (1024 * 1024))); 233 } 234 235 static int show_cpuinfo(struct seq_file *m, void *v) 236 { 237 unsigned long cpu_id = (unsigned long)v - 1; 238 unsigned int pvr; 239 unsigned long proc_freq; 240 unsigned short maj; 241 unsigned short min; 242 243 #ifdef CONFIG_SMP 244 pvr = per_cpu(cpu_pvr, cpu_id); 245 #else 246 pvr = mfspr(SPRN_PVR); 247 #endif 248 maj = (pvr >> 8) & 0xFF; 249 min = pvr & 0xFF; 250 251 seq_printf(m, "processor\t: %lu\ncpu\t\t: ", cpu_id); 252 253 if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name) 254 seq_puts(m, cur_cpu_spec->cpu_name); 255 else 256 seq_printf(m, "unknown (%08x)", pvr); 257 258 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 259 seq_puts(m, ", altivec supported"); 260 261 seq_putc(m, '\n'); 262 263 #ifdef CONFIG_TAU 264 if (cpu_has_feature(CPU_FTR_TAU)) { 265 if (IS_ENABLED(CONFIG_TAU_AVERAGE)) { 266 /* more straightforward, but potentially misleading */ 267 seq_printf(m, "temperature \t: %u C (uncalibrated)\n", 268 cpu_temp(cpu_id)); 269 } else { 270 /* show the actual temp sensor range */ 271 u32 temp; 272 temp = cpu_temp_both(cpu_id); 273 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n", 274 temp & 0xff, temp >> 16); 275 } 276 } 277 #endif /* CONFIG_TAU */ 278 279 /* 280 * Platforms that have variable clock rates, should implement 281 * the method ppc_md.get_proc_freq() that reports the clock 282 * rate of a given cpu. The rest can use ppc_proc_freq to 283 * report the clock rate that is same across all cpus. 284 */ 285 if (ppc_md.get_proc_freq) 286 proc_freq = ppc_md.get_proc_freq(cpu_id); 287 else 288 proc_freq = ppc_proc_freq; 289 290 if (proc_freq) 291 seq_printf(m, "clock\t\t: %lu.%06luMHz\n", 292 proc_freq / 1000000, proc_freq % 1000000); 293 294 /* If we are a Freescale core do a simple check so 295 * we don't have to keep adding cases in the future */ 296 if (PVR_VER(pvr) & 0x8000) { 297 switch (PVR_VER(pvr)) { 298 case 0x8000: /* 7441/7450/7451, Voyager */ 299 case 0x8001: /* 7445/7455, Apollo 6 */ 300 case 0x8002: /* 7447/7457, Apollo 7 */ 301 case 0x8003: /* 7447A, Apollo 7 PM */ 302 case 0x8004: /* 7448, Apollo 8 */ 303 case 0x800c: /* 7410, Nitro */ 304 maj = ((pvr >> 8) & 0xF); 305 min = PVR_MIN(pvr); 306 break; 307 default: /* e500/book-e */ 308 maj = PVR_MAJ(pvr); 309 min = PVR_MIN(pvr); 310 break; 311 } 312 } else { 313 switch (PVR_VER(pvr)) { 314 case 0x1008: /* 740P/750P ?? */ 315 maj = ((pvr >> 8) & 0xFF) - 1; 316 min = pvr & 0xFF; 317 break; 318 case 0x004e: /* POWER9 bits 12-15 give chip type */ 319 case 0x0080: /* POWER10 bit 12 gives SMT8/4 */ 320 maj = (pvr >> 8) & 0x0F; 321 min = pvr & 0xFF; 322 break; 323 default: 324 maj = (pvr >> 8) & 0xFF; 325 min = pvr & 0xFF; 326 break; 327 } 328 } 329 330 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n", 331 maj, min, PVR_VER(pvr), PVR_REV(pvr)); 332 333 if (IS_ENABLED(CONFIG_PPC32)) 334 seq_printf(m, "bogomips\t: %lu.%02lu\n", loops_per_jiffy / (500000 / HZ), 335 (loops_per_jiffy / (5000 / HZ)) % 100); 336 337 seq_putc(m, '\n'); 338 339 /* If this is the last cpu, print the summary */ 340 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids) 341 show_cpuinfo_summary(m); 342 343 return 0; 344 } 345 346 static void *c_start(struct seq_file *m, loff_t *pos) 347 { 348 if (*pos == 0) /* just in case, cpu 0 is not the first */ 349 *pos = cpumask_first(cpu_online_mask); 350 else 351 *pos = cpumask_next(*pos - 1, cpu_online_mask); 352 if ((*pos) < nr_cpu_ids) 353 return (void *)(unsigned long)(*pos + 1); 354 return NULL; 355 } 356 357 static void *c_next(struct seq_file *m, void *v, loff_t *pos) 358 { 359 (*pos)++; 360 return c_start(m, pos); 361 } 362 363 static void c_stop(struct seq_file *m, void *v) 364 { 365 } 366 367 const struct seq_operations cpuinfo_op = { 368 .start = c_start, 369 .next = c_next, 370 .stop = c_stop, 371 .show = show_cpuinfo, 372 }; 373 374 void __init check_for_initrd(void) 375 { 376 #ifdef CONFIG_BLK_DEV_INITRD 377 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n", 378 initrd_start, initrd_end); 379 380 /* If we were passed an initrd, set the ROOT_DEV properly if the values 381 * look sensible. If not, clear initrd reference. 382 */ 383 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) && 384 initrd_end > initrd_start) 385 ROOT_DEV = Root_RAM0; 386 else 387 initrd_start = initrd_end = 0; 388 389 if (initrd_start) 390 pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end); 391 392 DBG(" <- check_for_initrd()\n"); 393 #endif /* CONFIG_BLK_DEV_INITRD */ 394 } 395 396 #ifdef CONFIG_SMP 397 398 int threads_per_core, threads_per_subcore, threads_shift __read_mostly; 399 cpumask_t threads_core_mask __read_mostly; 400 EXPORT_SYMBOL_GPL(threads_per_core); 401 EXPORT_SYMBOL_GPL(threads_per_subcore); 402 EXPORT_SYMBOL_GPL(threads_shift); 403 EXPORT_SYMBOL_GPL(threads_core_mask); 404 405 static void __init cpu_init_thread_core_maps(int tpc) 406 { 407 int i; 408 409 threads_per_core = tpc; 410 threads_per_subcore = tpc; 411 cpumask_clear(&threads_core_mask); 412 413 /* This implementation only supports power of 2 number of threads 414 * for simplicity and performance 415 */ 416 threads_shift = ilog2(tpc); 417 BUG_ON(tpc != (1 << threads_shift)); 418 419 for (i = 0; i < tpc; i++) 420 cpumask_set_cpu(i, &threads_core_mask); 421 422 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n", 423 tpc, tpc > 1 ? "s" : ""); 424 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift); 425 } 426 427 428 u32 *cpu_to_phys_id = NULL; 429 430 /** 431 * setup_cpu_maps - initialize the following cpu maps: 432 * cpu_possible_mask 433 * cpu_present_mask 434 * 435 * Having the possible map set up early allows us to restrict allocations 436 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS. 437 * 438 * We do not initialize the online map here; cpus set their own bits in 439 * cpu_online_mask as they come up. 440 * 441 * This function is valid only for Open Firmware systems. finish_device_tree 442 * must be called before using this. 443 * 444 * While we're here, we may as well set the "physical" cpu ids in the paca. 445 * 446 * NOTE: This must match the parsing done in early_init_dt_scan_cpus. 447 */ 448 void __init smp_setup_cpu_maps(void) 449 { 450 struct device_node *dn; 451 int cpu = 0; 452 int nthreads = 1; 453 454 DBG("smp_setup_cpu_maps()\n"); 455 456 cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32), 457 __alignof__(u32)); 458 if (!cpu_to_phys_id) 459 panic("%s: Failed to allocate %zu bytes align=0x%zx\n", 460 __func__, nr_cpu_ids * sizeof(u32), __alignof__(u32)); 461 462 for_each_node_by_type(dn, "cpu") { 463 const __be32 *intserv; 464 __be32 cpu_be; 465 int j, len; 466 467 DBG(" * %pOF...\n", dn); 468 469 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", 470 &len); 471 if (intserv) { 472 DBG(" ibm,ppc-interrupt-server#s -> %lu threads\n", 473 (len / sizeof(int))); 474 } else { 475 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n"); 476 intserv = of_get_property(dn, "reg", &len); 477 if (!intserv) { 478 cpu_be = cpu_to_be32(cpu); 479 /* XXX: what is this? uninitialized?? */ 480 intserv = &cpu_be; /* assume logical == phys */ 481 len = 4; 482 } 483 } 484 485 nthreads = len / sizeof(int); 486 487 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) { 488 bool avail; 489 490 DBG(" thread %d -> cpu %d (hard id %d)\n", 491 j, cpu, be32_to_cpu(intserv[j])); 492 493 avail = of_device_is_available(dn); 494 if (!avail) 495 avail = !of_property_match_string(dn, 496 "enable-method", "spin-table"); 497 498 set_cpu_present(cpu, avail); 499 set_cpu_possible(cpu, true); 500 cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]); 501 cpu++; 502 } 503 504 if (cpu >= nr_cpu_ids) { 505 of_node_put(dn); 506 break; 507 } 508 } 509 510 /* If no SMT supported, nthreads is forced to 1 */ 511 if (!cpu_has_feature(CPU_FTR_SMT)) { 512 DBG(" SMT disabled ! nthreads forced to 1\n"); 513 nthreads = 1; 514 } 515 516 #ifdef CONFIG_PPC64 517 /* 518 * On pSeries LPAR, we need to know how many cpus 519 * could possibly be added to this partition. 520 */ 521 if (firmware_has_feature(FW_FEATURE_LPAR) && 522 (dn = of_find_node_by_path("/rtas"))) { 523 int num_addr_cell, num_size_cell, maxcpus; 524 const __be32 *ireg; 525 526 num_addr_cell = of_n_addr_cells(dn); 527 num_size_cell = of_n_size_cells(dn); 528 529 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL); 530 531 if (!ireg) 532 goto out; 533 534 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell); 535 536 /* Double maxcpus for processors which have SMT capability */ 537 if (cpu_has_feature(CPU_FTR_SMT)) 538 maxcpus *= nthreads; 539 540 if (maxcpus > nr_cpu_ids) { 541 printk(KERN_WARNING 542 "Partition configured for %d cpus, " 543 "operating system maximum is %u.\n", 544 maxcpus, nr_cpu_ids); 545 maxcpus = nr_cpu_ids; 546 } else 547 printk(KERN_INFO "Partition configured for %d cpus.\n", 548 maxcpus); 549 550 for (cpu = 0; cpu < maxcpus; cpu++) 551 set_cpu_possible(cpu, true); 552 out: 553 of_node_put(dn); 554 } 555 vdso_data->processorCount = num_present_cpus(); 556 #endif /* CONFIG_PPC64 */ 557 558 /* Initialize CPU <=> thread mapping/ 559 * 560 * WARNING: We assume that the number of threads is the same for 561 * every CPU in the system. If that is not the case, then some code 562 * here will have to be reworked 563 */ 564 cpu_init_thread_core_maps(nthreads); 565 566 /* Now that possible cpus are set, set nr_cpu_ids for later use */ 567 setup_nr_cpu_ids(); 568 569 free_unused_pacas(); 570 } 571 #endif /* CONFIG_SMP */ 572 573 #ifdef CONFIG_PCSPKR_PLATFORM 574 static __init int add_pcspkr(void) 575 { 576 struct device_node *np; 577 struct platform_device *pd; 578 int ret; 579 580 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100"); 581 of_node_put(np); 582 if (!np) 583 return -ENODEV; 584 585 pd = platform_device_alloc("pcspkr", -1); 586 if (!pd) 587 return -ENOMEM; 588 589 ret = platform_device_add(pd); 590 if (ret) 591 platform_device_put(pd); 592 593 return ret; 594 } 595 device_initcall(add_pcspkr); 596 #endif /* CONFIG_PCSPKR_PLATFORM */ 597 598 static char ppc_hw_desc_buf[128] __initdata; 599 600 struct seq_buf ppc_hw_desc __initdata = { 601 .buffer = ppc_hw_desc_buf, 602 .size = sizeof(ppc_hw_desc_buf), 603 .len = 0, 604 .readpos = 0, 605 }; 606 607 static __init void probe_machine(void) 608 { 609 extern struct machdep_calls __machine_desc_start; 610 extern struct machdep_calls __machine_desc_end; 611 unsigned int i; 612 613 /* 614 * Iterate all ppc_md structures until we find the proper 615 * one for the current machine type 616 */ 617 DBG("Probing machine type ...\n"); 618 619 /* 620 * Check ppc_md is empty, if not we have a bug, ie, we setup an 621 * entry before probe_machine() which will be overwritten 622 */ 623 for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) { 624 if (((void **)&ppc_md)[i]) { 625 printk(KERN_ERR "Entry %d in ppc_md non empty before" 626 " machine probe !\n", i); 627 } 628 } 629 630 for (machine_id = &__machine_desc_start; 631 machine_id < &__machine_desc_end; 632 machine_id++) { 633 DBG(" %s ...\n", machine_id->name); 634 if (machine_id->compatible && !of_machine_is_compatible(machine_id->compatible)) 635 continue; 636 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls)); 637 if (ppc_md.probe && !ppc_md.probe()) 638 continue; 639 DBG(" %s match !\n", machine_id->name); 640 break; 641 } 642 /* What can we do if we didn't find ? */ 643 if (machine_id >= &__machine_desc_end) { 644 pr_err("No suitable machine description found !\n"); 645 for (;;); 646 } 647 648 // Append the machine name to other info we've gathered 649 seq_buf_puts(&ppc_hw_desc, ppc_md.name); 650 651 // Set the generic hardware description shown in oopses 652 dump_stack_set_arch_desc(ppc_hw_desc.buffer); 653 654 pr_info("Hardware name: %s\n", ppc_hw_desc.buffer); 655 } 656 657 /* Match a class of boards, not a specific device configuration. */ 658 int check_legacy_ioport(unsigned long base_port) 659 { 660 struct device_node *parent, *np = NULL; 661 int ret = -ENODEV; 662 663 switch(base_port) { 664 case I8042_DATA_REG: 665 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303"))) 666 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03"); 667 if (np) { 668 parent = of_get_parent(np); 669 670 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0); 671 if (!of_i8042_kbd_irq) 672 of_i8042_kbd_irq = 1; 673 674 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1); 675 if (!of_i8042_aux_irq) 676 of_i8042_aux_irq = 12; 677 678 of_node_put(np); 679 np = parent; 680 break; 681 } 682 np = of_find_node_by_type(NULL, "8042"); 683 /* Pegasos has no device_type on its 8042 node, look for the 684 * name instead */ 685 if (!np) 686 np = of_find_node_by_name(NULL, "8042"); 687 if (np) { 688 of_i8042_kbd_irq = 1; 689 of_i8042_aux_irq = 12; 690 } 691 break; 692 case FDC_BASE: /* FDC1 */ 693 np = of_find_node_by_type(NULL, "fdc"); 694 break; 695 default: 696 /* ipmi is supposed to fail here */ 697 break; 698 } 699 if (!np) 700 return ret; 701 parent = of_get_parent(np); 702 if (parent) { 703 if (of_node_is_type(parent, "isa")) 704 ret = 0; 705 of_node_put(parent); 706 } 707 of_node_put(np); 708 return ret; 709 } 710 EXPORT_SYMBOL(check_legacy_ioport); 711 712 /* 713 * Panic notifiers setup 714 * 715 * We have 3 notifiers for powerpc, each one from a different "nature": 716 * 717 * - ppc_panic_fadump_handler() is a hypervisor notifier, which hard-disables 718 * IRQs and deal with the Firmware-Assisted dump, when it is configured; 719 * should run early in the panic path. 720 * 721 * - dump_kernel_offset() is an informative notifier, just showing the KASLR 722 * offset if we have RANDOMIZE_BASE set. 723 * 724 * - ppc_panic_platform_handler() is a low-level handler that's registered 725 * only if the platform wishes to perform final actions in the panic path, 726 * hence it should run late and might not even return. Currently, only 727 * pseries and ps3 platforms register callbacks. 728 */ 729 static int ppc_panic_fadump_handler(struct notifier_block *this, 730 unsigned long event, void *ptr) 731 { 732 /* 733 * panic does a local_irq_disable, but we really 734 * want interrupts to be hard disabled. 735 */ 736 hard_irq_disable(); 737 738 /* 739 * If firmware-assisted dump has been registered then trigger 740 * its callback and let the firmware handles everything else. 741 */ 742 crash_fadump(NULL, ptr); 743 744 return NOTIFY_DONE; 745 } 746 747 static int dump_kernel_offset(struct notifier_block *self, unsigned long v, 748 void *p) 749 { 750 pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n", 751 kaslr_offset(), KERNELBASE); 752 753 return NOTIFY_DONE; 754 } 755 756 static int ppc_panic_platform_handler(struct notifier_block *this, 757 unsigned long event, void *ptr) 758 { 759 /* 760 * This handler is only registered if we have a panic callback 761 * on ppc_md, hence NULL check is not needed. 762 * Also, it may not return, so it runs really late on panic path. 763 */ 764 ppc_md.panic(ptr); 765 766 return NOTIFY_DONE; 767 } 768 769 static struct notifier_block ppc_fadump_block = { 770 .notifier_call = ppc_panic_fadump_handler, 771 .priority = INT_MAX, /* run early, to notify the firmware ASAP */ 772 }; 773 774 static struct notifier_block kernel_offset_notifier = { 775 .notifier_call = dump_kernel_offset, 776 }; 777 778 static struct notifier_block ppc_panic_block = { 779 .notifier_call = ppc_panic_platform_handler, 780 .priority = INT_MIN, /* may not return; must be done last */ 781 }; 782 783 void __init setup_panic(void) 784 { 785 /* Hard-disables IRQs + deal with FW-assisted dump (fadump) */ 786 atomic_notifier_chain_register(&panic_notifier_list, 787 &ppc_fadump_block); 788 789 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0) 790 atomic_notifier_chain_register(&panic_notifier_list, 791 &kernel_offset_notifier); 792 793 /* Low-level platform-specific routines that should run on panic */ 794 if (ppc_md.panic) 795 atomic_notifier_chain_register(&panic_notifier_list, 796 &ppc_panic_block); 797 } 798 799 #ifdef CONFIG_CHECK_CACHE_COHERENCY 800 /* 801 * For platforms that have configurable cache-coherency. This function 802 * checks that the cache coherency setting of the kernel matches the setting 803 * left by the firmware, as indicated in the device tree. Since a mismatch 804 * will eventually result in DMA failures, we print * and error and call 805 * BUG() in that case. 806 */ 807 808 #define KERNEL_COHERENCY (!IS_ENABLED(CONFIG_NOT_COHERENT_CACHE)) 809 810 static int __init check_cache_coherency(void) 811 { 812 struct device_node *np; 813 const void *prop; 814 bool devtree_coherency; 815 816 np = of_find_node_by_path("/"); 817 prop = of_get_property(np, "coherency-off", NULL); 818 of_node_put(np); 819 820 devtree_coherency = prop ? false : true; 821 822 if (devtree_coherency != KERNEL_COHERENCY) { 823 printk(KERN_ERR 824 "kernel coherency:%s != device tree_coherency:%s\n", 825 KERNEL_COHERENCY ? "on" : "off", 826 devtree_coherency ? "on" : "off"); 827 BUG(); 828 } 829 830 return 0; 831 } 832 833 late_initcall(check_cache_coherency); 834 #endif /* CONFIG_CHECK_CACHE_COHERENCY */ 835 836 void ppc_printk_progress(char *s, unsigned short hex) 837 { 838 pr_info("%s\n", s); 839 } 840 841 static __init void print_system_info(void) 842 { 843 pr_info("-----------------------------------------------------\n"); 844 pr_info("phys_mem_size = 0x%llx\n", 845 (unsigned long long)memblock_phys_mem_size()); 846 847 pr_info("dcache_bsize = 0x%x\n", dcache_bsize); 848 pr_info("icache_bsize = 0x%x\n", icache_bsize); 849 850 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features); 851 pr_info(" possible = 0x%016lx\n", 852 (unsigned long)CPU_FTRS_POSSIBLE); 853 pr_info(" always = 0x%016lx\n", 854 (unsigned long)CPU_FTRS_ALWAYS); 855 pr_info("cpu_user_features = 0x%08x 0x%08x\n", 856 cur_cpu_spec->cpu_user_features, 857 cur_cpu_spec->cpu_user_features2); 858 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features); 859 #ifdef CONFIG_PPC64 860 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features); 861 #ifdef CONFIG_PPC_BOOK3S 862 pr_info("vmalloc start = 0x%lx\n", KERN_VIRT_START); 863 pr_info("IO start = 0x%lx\n", KERN_IO_START); 864 pr_info("vmemmap start = 0x%lx\n", (unsigned long)vmemmap); 865 #endif 866 #endif 867 868 if (!early_radix_enabled()) 869 print_system_hash_info(); 870 871 if (PHYSICAL_START > 0) 872 pr_info("physical_start = 0x%llx\n", 873 (unsigned long long)PHYSICAL_START); 874 pr_info("-----------------------------------------------------\n"); 875 } 876 877 #ifdef CONFIG_SMP 878 static void __init smp_setup_pacas(void) 879 { 880 int cpu; 881 882 for_each_possible_cpu(cpu) { 883 if (cpu == smp_processor_id()) 884 continue; 885 allocate_paca(cpu); 886 set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]); 887 } 888 889 memblock_free(cpu_to_phys_id, nr_cpu_ids * sizeof(u32)); 890 cpu_to_phys_id = NULL; 891 } 892 #endif 893 894 /* 895 * Called into from start_kernel this initializes memblock, which is used 896 * to manage page allocation until mem_init is called. 897 */ 898 void __init setup_arch(char **cmdline_p) 899 { 900 kasan_init(); 901 902 *cmdline_p = boot_command_line; 903 904 /* Set a half-reasonable default so udelay does something sensible */ 905 loops_per_jiffy = 500000000 / HZ; 906 907 /* Unflatten the device-tree passed by prom_init or kexec */ 908 unflatten_device_tree(); 909 910 /* 911 * Initialize cache line/block info from device-tree (on ppc64) or 912 * just cputable (on ppc32). 913 */ 914 initialize_cache_info(); 915 916 /* Initialize RTAS if available. */ 917 rtas_initialize(); 918 919 /* Check if we have an initrd provided via the device-tree. */ 920 check_for_initrd(); 921 922 /* Probe the machine type, establish ppc_md. */ 923 probe_machine(); 924 925 /* Setup panic notifier if requested by the platform. */ 926 setup_panic(); 927 928 /* 929 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do 930 * it from their respective probe() function. 931 */ 932 setup_power_save(); 933 934 /* Discover standard serial ports. */ 935 find_legacy_serial_ports(); 936 937 /* Register early console with the printk subsystem. */ 938 register_early_udbg_console(); 939 940 /* Setup the various CPU maps based on the device-tree. */ 941 smp_setup_cpu_maps(); 942 943 /* Initialize xmon. */ 944 xmon_setup(); 945 946 /* Check the SMT related command line arguments (ppc64). */ 947 check_smt_enabled(); 948 949 /* Parse memory topology */ 950 mem_topology_setup(); 951 /* Set max_mapnr before paging_init() */ 952 set_max_mapnr(max_pfn); 953 high_memory = (void *)__va(max_low_pfn * PAGE_SIZE); 954 955 /* 956 * Release secondary cpus out of their spinloops at 0x60 now that 957 * we can map physical -> logical CPU ids. 958 * 959 * Freescale Book3e parts spin in a loop provided by firmware, 960 * so smp_release_cpus() does nothing for them. 961 */ 962 #ifdef CONFIG_SMP 963 smp_setup_pacas(); 964 965 /* On BookE, setup per-core TLB data structures. */ 966 setup_tlb_core_data(); 967 #endif 968 969 /* Print various info about the machine that has been gathered so far. */ 970 print_system_info(); 971 972 klp_init_thread_info(&init_task); 973 974 setup_initial_init_mm(_stext, _etext, _edata, _end); 975 /* sched_init() does the mmgrab(&init_mm) for the primary CPU */ 976 VM_WARN_ON(cpumask_test_cpu(smp_processor_id(), mm_cpumask(&init_mm))); 977 cpumask_set_cpu(smp_processor_id(), mm_cpumask(&init_mm)); 978 inc_mm_active_cpus(&init_mm); 979 mm_iommu_init(&init_mm); 980 981 irqstack_early_init(); 982 exc_lvl_early_init(); 983 emergency_stack_init(); 984 985 mce_init(); 986 smp_release_cpus(); 987 988 initmem_init(); 989 990 /* 991 * Reserve large chunks of memory for use by CMA for KVM and hugetlb. These must 992 * be called after initmem_init(), so that pageblock_order is initialised. 993 */ 994 kvm_cma_reserve(); 995 gigantic_hugetlb_cma_reserve(); 996 997 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT); 998 999 if (ppc_md.setup_arch) 1000 ppc_md.setup_arch(); 1001 1002 setup_barrier_nospec(); 1003 setup_spectre_v2(); 1004 1005 paging_init(); 1006 1007 /* Initialize the MMU context management stuff. */ 1008 mmu_context_init(); 1009 1010 /* Interrupt code needs to be 64K-aligned. */ 1011 if (IS_ENABLED(CONFIG_PPC64) && (unsigned long)_stext & 0xffff) 1012 panic("Kernelbase not 64K-aligned (0x%lx)!\n", 1013 (unsigned long)_stext); 1014 } 1015