1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Common boot and setup code for both 32-bit and 64-bit. 4 * Extracted from arch/powerpc/kernel/setup_64.c. 5 * 6 * Copyright (C) 2001 PPC64 Team, IBM Corp 7 */ 8 9 #undef DEBUG 10 11 #include <linux/export.h> 12 #include <linux/panic_notifier.h> 13 #include <linux/string.h> 14 #include <linux/sched.h> 15 #include <linux/init.h> 16 #include <linux/kernel.h> 17 #include <linux/reboot.h> 18 #include <linux/delay.h> 19 #include <linux/initrd.h> 20 #include <linux/platform_device.h> 21 #include <linux/seq_file.h> 22 #include <linux/ioport.h> 23 #include <linux/console.h> 24 #include <linux/screen_info.h> 25 #include <linux/root_dev.h> 26 #include <linux/notifier.h> 27 #include <linux/cpu.h> 28 #include <linux/unistd.h> 29 #include <linux/serial.h> 30 #include <linux/serial_8250.h> 31 #include <linux/percpu.h> 32 #include <linux/memblock.h> 33 #include <linux/of_platform.h> 34 #include <linux/hugetlb.h> 35 #include <linux/pgtable.h> 36 #include <asm/io.h> 37 #include <asm/paca.h> 38 #include <asm/prom.h> 39 #include <asm/processor.h> 40 #include <asm/vdso_datapage.h> 41 #include <asm/smp.h> 42 #include <asm/elf.h> 43 #include <asm/machdep.h> 44 #include <asm/time.h> 45 #include <asm/cputable.h> 46 #include <asm/sections.h> 47 #include <asm/firmware.h> 48 #include <asm/btext.h> 49 #include <asm/nvram.h> 50 #include <asm/setup.h> 51 #include <asm/rtas.h> 52 #include <asm/iommu.h> 53 #include <asm/serial.h> 54 #include <asm/cache.h> 55 #include <asm/page.h> 56 #include <asm/mmu.h> 57 #include <asm/xmon.h> 58 #include <asm/cputhreads.h> 59 #include <mm/mmu_decl.h> 60 #include <asm/fadump.h> 61 #include <asm/udbg.h> 62 #include <asm/hugetlb.h> 63 #include <asm/livepatch.h> 64 #include <asm/mmu_context.h> 65 #include <asm/cpu_has_feature.h> 66 #include <asm/kasan.h> 67 #include <asm/mce.h> 68 69 #include "setup.h" 70 71 #ifdef DEBUG 72 #define DBG(fmt...) udbg_printf(fmt) 73 #else 74 #define DBG(fmt...) 75 #endif 76 77 /* The main machine-dep calls structure 78 */ 79 struct machdep_calls ppc_md; 80 EXPORT_SYMBOL(ppc_md); 81 struct machdep_calls *machine_id; 82 EXPORT_SYMBOL(machine_id); 83 84 int boot_cpuid = -1; 85 EXPORT_SYMBOL_GPL(boot_cpuid); 86 87 /* 88 * These are used in binfmt_elf.c to put aux entries on the stack 89 * for each elf executable being started. 90 */ 91 int dcache_bsize; 92 int icache_bsize; 93 94 /* 95 * This still seems to be needed... -- paulus 96 */ 97 struct screen_info screen_info = { 98 .orig_x = 0, 99 .orig_y = 25, 100 .orig_video_cols = 80, 101 .orig_video_lines = 25, 102 .orig_video_isVGA = 1, 103 .orig_video_points = 16 104 }; 105 #if defined(CONFIG_FB_VGA16_MODULE) 106 EXPORT_SYMBOL(screen_info); 107 #endif 108 109 /* Variables required to store legacy IO irq routing */ 110 int of_i8042_kbd_irq; 111 EXPORT_SYMBOL_GPL(of_i8042_kbd_irq); 112 int of_i8042_aux_irq; 113 EXPORT_SYMBOL_GPL(of_i8042_aux_irq); 114 115 #ifdef __DO_IRQ_CANON 116 /* XXX should go elsewhere eventually */ 117 int ppc_do_canonicalize_irqs; 118 EXPORT_SYMBOL(ppc_do_canonicalize_irqs); 119 #endif 120 121 #ifdef CONFIG_CRASH_CORE 122 /* This keeps a track of which one is the crashing cpu. */ 123 int crashing_cpu = -1; 124 #endif 125 126 /* also used by kexec */ 127 void machine_shutdown(void) 128 { 129 /* 130 * if fadump is active, cleanup the fadump registration before we 131 * shutdown. 132 */ 133 fadump_cleanup(); 134 135 if (ppc_md.machine_shutdown) 136 ppc_md.machine_shutdown(); 137 } 138 139 static void machine_hang(void) 140 { 141 pr_emerg("System Halted, OK to turn off power\n"); 142 local_irq_disable(); 143 while (1) 144 ; 145 } 146 147 void machine_restart(char *cmd) 148 { 149 machine_shutdown(); 150 if (ppc_md.restart) 151 ppc_md.restart(cmd); 152 153 smp_send_stop(); 154 155 do_kernel_restart(cmd); 156 mdelay(1000); 157 158 machine_hang(); 159 } 160 161 void machine_power_off(void) 162 { 163 machine_shutdown(); 164 if (pm_power_off) 165 pm_power_off(); 166 167 smp_send_stop(); 168 machine_hang(); 169 } 170 /* Used by the G5 thermal driver */ 171 EXPORT_SYMBOL_GPL(machine_power_off); 172 173 void (*pm_power_off)(void); 174 EXPORT_SYMBOL_GPL(pm_power_off); 175 176 void machine_halt(void) 177 { 178 machine_shutdown(); 179 if (ppc_md.halt) 180 ppc_md.halt(); 181 182 smp_send_stop(); 183 machine_hang(); 184 } 185 186 #ifdef CONFIG_SMP 187 DEFINE_PER_CPU(unsigned int, cpu_pvr); 188 #endif 189 190 static void show_cpuinfo_summary(struct seq_file *m) 191 { 192 struct device_node *root; 193 const char *model = NULL; 194 unsigned long bogosum = 0; 195 int i; 196 197 if (IS_ENABLED(CONFIG_SMP) && IS_ENABLED(CONFIG_PPC32)) { 198 for_each_online_cpu(i) 199 bogosum += loops_per_jiffy; 200 seq_printf(m, "total bogomips\t: %lu.%02lu\n", 201 bogosum / (500000 / HZ), bogosum / (5000 / HZ) % 100); 202 } 203 seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq); 204 if (ppc_md.name) 205 seq_printf(m, "platform\t: %s\n", ppc_md.name); 206 root = of_find_node_by_path("/"); 207 if (root) 208 model = of_get_property(root, "model", NULL); 209 if (model) 210 seq_printf(m, "model\t\t: %s\n", model); 211 of_node_put(root); 212 213 if (ppc_md.show_cpuinfo != NULL) 214 ppc_md.show_cpuinfo(m); 215 216 /* Display the amount of memory */ 217 if (IS_ENABLED(CONFIG_PPC32)) 218 seq_printf(m, "Memory\t\t: %d MB\n", 219 (unsigned int)(total_memory / (1024 * 1024))); 220 } 221 222 static int show_cpuinfo(struct seq_file *m, void *v) 223 { 224 unsigned long cpu_id = (unsigned long)v - 1; 225 unsigned int pvr; 226 unsigned long proc_freq; 227 unsigned short maj; 228 unsigned short min; 229 230 #ifdef CONFIG_SMP 231 pvr = per_cpu(cpu_pvr, cpu_id); 232 #else 233 pvr = mfspr(SPRN_PVR); 234 #endif 235 maj = (pvr >> 8) & 0xFF; 236 min = pvr & 0xFF; 237 238 seq_printf(m, "processor\t: %lu\ncpu\t\t: ", cpu_id); 239 240 if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name) 241 seq_puts(m, cur_cpu_spec->cpu_name); 242 else 243 seq_printf(m, "unknown (%08x)", pvr); 244 245 if (cpu_has_feature(CPU_FTR_ALTIVEC)) 246 seq_puts(m, ", altivec supported"); 247 248 seq_putc(m, '\n'); 249 250 #ifdef CONFIG_TAU 251 if (cpu_has_feature(CPU_FTR_TAU)) { 252 if (IS_ENABLED(CONFIG_TAU_AVERAGE)) { 253 /* more straightforward, but potentially misleading */ 254 seq_printf(m, "temperature \t: %u C (uncalibrated)\n", 255 cpu_temp(cpu_id)); 256 } else { 257 /* show the actual temp sensor range */ 258 u32 temp; 259 temp = cpu_temp_both(cpu_id); 260 seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n", 261 temp & 0xff, temp >> 16); 262 } 263 } 264 #endif /* CONFIG_TAU */ 265 266 /* 267 * Platforms that have variable clock rates, should implement 268 * the method ppc_md.get_proc_freq() that reports the clock 269 * rate of a given cpu. The rest can use ppc_proc_freq to 270 * report the clock rate that is same across all cpus. 271 */ 272 if (ppc_md.get_proc_freq) 273 proc_freq = ppc_md.get_proc_freq(cpu_id); 274 else 275 proc_freq = ppc_proc_freq; 276 277 if (proc_freq) 278 seq_printf(m, "clock\t\t: %lu.%06luMHz\n", 279 proc_freq / 1000000, proc_freq % 1000000); 280 281 /* If we are a Freescale core do a simple check so 282 * we dont have to keep adding cases in the future */ 283 if (PVR_VER(pvr) & 0x8000) { 284 switch (PVR_VER(pvr)) { 285 case 0x8000: /* 7441/7450/7451, Voyager */ 286 case 0x8001: /* 7445/7455, Apollo 6 */ 287 case 0x8002: /* 7447/7457, Apollo 7 */ 288 case 0x8003: /* 7447A, Apollo 7 PM */ 289 case 0x8004: /* 7448, Apollo 8 */ 290 case 0x800c: /* 7410, Nitro */ 291 maj = ((pvr >> 8) & 0xF); 292 min = PVR_MIN(pvr); 293 break; 294 default: /* e500/book-e */ 295 maj = PVR_MAJ(pvr); 296 min = PVR_MIN(pvr); 297 break; 298 } 299 } else { 300 switch (PVR_VER(pvr)) { 301 case 0x1008: /* 740P/750P ?? */ 302 maj = ((pvr >> 8) & 0xFF) - 1; 303 min = pvr & 0xFF; 304 break; 305 case 0x004e: /* POWER9 bits 12-15 give chip type */ 306 case 0x0080: /* POWER10 bit 12 gives SMT8/4 */ 307 maj = (pvr >> 8) & 0x0F; 308 min = pvr & 0xFF; 309 break; 310 default: 311 maj = (pvr >> 8) & 0xFF; 312 min = pvr & 0xFF; 313 break; 314 } 315 } 316 317 seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n", 318 maj, min, PVR_VER(pvr), PVR_REV(pvr)); 319 320 if (IS_ENABLED(CONFIG_PPC32)) 321 seq_printf(m, "bogomips\t: %lu.%02lu\n", loops_per_jiffy / (500000 / HZ), 322 (loops_per_jiffy / (5000 / HZ)) % 100); 323 324 seq_putc(m, '\n'); 325 326 /* If this is the last cpu, print the summary */ 327 if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids) 328 show_cpuinfo_summary(m); 329 330 return 0; 331 } 332 333 static void *c_start(struct seq_file *m, loff_t *pos) 334 { 335 if (*pos == 0) /* just in case, cpu 0 is not the first */ 336 *pos = cpumask_first(cpu_online_mask); 337 else 338 *pos = cpumask_next(*pos - 1, cpu_online_mask); 339 if ((*pos) < nr_cpu_ids) 340 return (void *)(unsigned long)(*pos + 1); 341 return NULL; 342 } 343 344 static void *c_next(struct seq_file *m, void *v, loff_t *pos) 345 { 346 (*pos)++; 347 return c_start(m, pos); 348 } 349 350 static void c_stop(struct seq_file *m, void *v) 351 { 352 } 353 354 const struct seq_operations cpuinfo_op = { 355 .start = c_start, 356 .next = c_next, 357 .stop = c_stop, 358 .show = show_cpuinfo, 359 }; 360 361 void __init check_for_initrd(void) 362 { 363 #ifdef CONFIG_BLK_DEV_INITRD 364 DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n", 365 initrd_start, initrd_end); 366 367 /* If we were passed an initrd, set the ROOT_DEV properly if the values 368 * look sensible. If not, clear initrd reference. 369 */ 370 if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) && 371 initrd_end > initrd_start) 372 ROOT_DEV = Root_RAM0; 373 else 374 initrd_start = initrd_end = 0; 375 376 if (initrd_start) 377 pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end); 378 379 DBG(" <- check_for_initrd()\n"); 380 #endif /* CONFIG_BLK_DEV_INITRD */ 381 } 382 383 #ifdef CONFIG_SMP 384 385 int threads_per_core, threads_per_subcore, threads_shift __read_mostly; 386 cpumask_t threads_core_mask __read_mostly; 387 EXPORT_SYMBOL_GPL(threads_per_core); 388 EXPORT_SYMBOL_GPL(threads_per_subcore); 389 EXPORT_SYMBOL_GPL(threads_shift); 390 EXPORT_SYMBOL_GPL(threads_core_mask); 391 392 static void __init cpu_init_thread_core_maps(int tpc) 393 { 394 int i; 395 396 threads_per_core = tpc; 397 threads_per_subcore = tpc; 398 cpumask_clear(&threads_core_mask); 399 400 /* This implementation only supports power of 2 number of threads 401 * for simplicity and performance 402 */ 403 threads_shift = ilog2(tpc); 404 BUG_ON(tpc != (1 << threads_shift)); 405 406 for (i = 0; i < tpc; i++) 407 cpumask_set_cpu(i, &threads_core_mask); 408 409 printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n", 410 tpc, tpc > 1 ? "s" : ""); 411 printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift); 412 } 413 414 415 u32 *cpu_to_phys_id = NULL; 416 417 /** 418 * setup_cpu_maps - initialize the following cpu maps: 419 * cpu_possible_mask 420 * cpu_present_mask 421 * 422 * Having the possible map set up early allows us to restrict allocations 423 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS. 424 * 425 * We do not initialize the online map here; cpus set their own bits in 426 * cpu_online_mask as they come up. 427 * 428 * This function is valid only for Open Firmware systems. finish_device_tree 429 * must be called before using this. 430 * 431 * While we're here, we may as well set the "physical" cpu ids in the paca. 432 * 433 * NOTE: This must match the parsing done in early_init_dt_scan_cpus. 434 */ 435 void __init smp_setup_cpu_maps(void) 436 { 437 struct device_node *dn; 438 int cpu = 0; 439 int nthreads = 1; 440 441 DBG("smp_setup_cpu_maps()\n"); 442 443 cpu_to_phys_id = memblock_alloc(nr_cpu_ids * sizeof(u32), 444 __alignof__(u32)); 445 if (!cpu_to_phys_id) 446 panic("%s: Failed to allocate %zu bytes align=0x%zx\n", 447 __func__, nr_cpu_ids * sizeof(u32), __alignof__(u32)); 448 449 for_each_node_by_type(dn, "cpu") { 450 const __be32 *intserv; 451 __be32 cpu_be; 452 int j, len; 453 454 DBG(" * %pOF...\n", dn); 455 456 intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s", 457 &len); 458 if (intserv) { 459 DBG(" ibm,ppc-interrupt-server#s -> %lu threads\n", 460 (len / sizeof(int))); 461 } else { 462 DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n"); 463 intserv = of_get_property(dn, "reg", &len); 464 if (!intserv) { 465 cpu_be = cpu_to_be32(cpu); 466 /* XXX: what is this? uninitialized?? */ 467 intserv = &cpu_be; /* assume logical == phys */ 468 len = 4; 469 } 470 } 471 472 nthreads = len / sizeof(int); 473 474 for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) { 475 bool avail; 476 477 DBG(" thread %d -> cpu %d (hard id %d)\n", 478 j, cpu, be32_to_cpu(intserv[j])); 479 480 avail = of_device_is_available(dn); 481 if (!avail) 482 avail = !of_property_match_string(dn, 483 "enable-method", "spin-table"); 484 485 set_cpu_present(cpu, avail); 486 set_cpu_possible(cpu, true); 487 cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]); 488 cpu++; 489 } 490 491 if (cpu >= nr_cpu_ids) { 492 of_node_put(dn); 493 break; 494 } 495 } 496 497 /* If no SMT supported, nthreads is forced to 1 */ 498 if (!cpu_has_feature(CPU_FTR_SMT)) { 499 DBG(" SMT disabled ! nthreads forced to 1\n"); 500 nthreads = 1; 501 } 502 503 #ifdef CONFIG_PPC64 504 /* 505 * On pSeries LPAR, we need to know how many cpus 506 * could possibly be added to this partition. 507 */ 508 if (firmware_has_feature(FW_FEATURE_LPAR) && 509 (dn = of_find_node_by_path("/rtas"))) { 510 int num_addr_cell, num_size_cell, maxcpus; 511 const __be32 *ireg; 512 513 num_addr_cell = of_n_addr_cells(dn); 514 num_size_cell = of_n_size_cells(dn); 515 516 ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL); 517 518 if (!ireg) 519 goto out; 520 521 maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell); 522 523 /* Double maxcpus for processors which have SMT capability */ 524 if (cpu_has_feature(CPU_FTR_SMT)) 525 maxcpus *= nthreads; 526 527 if (maxcpus > nr_cpu_ids) { 528 printk(KERN_WARNING 529 "Partition configured for %d cpus, " 530 "operating system maximum is %u.\n", 531 maxcpus, nr_cpu_ids); 532 maxcpus = nr_cpu_ids; 533 } else 534 printk(KERN_INFO "Partition configured for %d cpus.\n", 535 maxcpus); 536 537 for (cpu = 0; cpu < maxcpus; cpu++) 538 set_cpu_possible(cpu, true); 539 out: 540 of_node_put(dn); 541 } 542 vdso_data->processorCount = num_present_cpus(); 543 #endif /* CONFIG_PPC64 */ 544 545 /* Initialize CPU <=> thread mapping/ 546 * 547 * WARNING: We assume that the number of threads is the same for 548 * every CPU in the system. If that is not the case, then some code 549 * here will have to be reworked 550 */ 551 cpu_init_thread_core_maps(nthreads); 552 553 /* Now that possible cpus are set, set nr_cpu_ids for later use */ 554 setup_nr_cpu_ids(); 555 556 free_unused_pacas(); 557 } 558 #endif /* CONFIG_SMP */ 559 560 #ifdef CONFIG_PCSPKR_PLATFORM 561 static __init int add_pcspkr(void) 562 { 563 struct device_node *np; 564 struct platform_device *pd; 565 int ret; 566 567 np = of_find_compatible_node(NULL, NULL, "pnpPNP,100"); 568 of_node_put(np); 569 if (!np) 570 return -ENODEV; 571 572 pd = platform_device_alloc("pcspkr", -1); 573 if (!pd) 574 return -ENOMEM; 575 576 ret = platform_device_add(pd); 577 if (ret) 578 platform_device_put(pd); 579 580 return ret; 581 } 582 device_initcall(add_pcspkr); 583 #endif /* CONFIG_PCSPKR_PLATFORM */ 584 585 static __init void probe_machine(void) 586 { 587 extern struct machdep_calls __machine_desc_start; 588 extern struct machdep_calls __machine_desc_end; 589 unsigned int i; 590 591 /* 592 * Iterate all ppc_md structures until we find the proper 593 * one for the current machine type 594 */ 595 DBG("Probing machine type ...\n"); 596 597 /* 598 * Check ppc_md is empty, if not we have a bug, ie, we setup an 599 * entry before probe_machine() which will be overwritten 600 */ 601 for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) { 602 if (((void **)&ppc_md)[i]) { 603 printk(KERN_ERR "Entry %d in ppc_md non empty before" 604 " machine probe !\n", i); 605 } 606 } 607 608 for (machine_id = &__machine_desc_start; 609 machine_id < &__machine_desc_end; 610 machine_id++) { 611 DBG(" %s ...", machine_id->name); 612 memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls)); 613 if (ppc_md.probe()) { 614 DBG(" match !\n"); 615 break; 616 } 617 DBG("\n"); 618 } 619 /* What can we do if we didn't find ? */ 620 if (machine_id >= &__machine_desc_end) { 621 pr_err("No suitable machine description found !\n"); 622 for (;;); 623 } 624 625 printk(KERN_INFO "Using %s machine description\n", ppc_md.name); 626 } 627 628 /* Match a class of boards, not a specific device configuration. */ 629 int check_legacy_ioport(unsigned long base_port) 630 { 631 struct device_node *parent, *np = NULL; 632 int ret = -ENODEV; 633 634 switch(base_port) { 635 case I8042_DATA_REG: 636 if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303"))) 637 np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03"); 638 if (np) { 639 parent = of_get_parent(np); 640 641 of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0); 642 if (!of_i8042_kbd_irq) 643 of_i8042_kbd_irq = 1; 644 645 of_i8042_aux_irq = irq_of_parse_and_map(parent, 1); 646 if (!of_i8042_aux_irq) 647 of_i8042_aux_irq = 12; 648 649 of_node_put(np); 650 np = parent; 651 break; 652 } 653 np = of_find_node_by_type(NULL, "8042"); 654 /* Pegasos has no device_type on its 8042 node, look for the 655 * name instead */ 656 if (!np) 657 np = of_find_node_by_name(NULL, "8042"); 658 if (np) { 659 of_i8042_kbd_irq = 1; 660 of_i8042_aux_irq = 12; 661 } 662 break; 663 case FDC_BASE: /* FDC1 */ 664 np = of_find_node_by_type(NULL, "fdc"); 665 break; 666 default: 667 /* ipmi is supposed to fail here */ 668 break; 669 } 670 if (!np) 671 return ret; 672 parent = of_get_parent(np); 673 if (parent) { 674 if (of_node_is_type(parent, "isa")) 675 ret = 0; 676 of_node_put(parent); 677 } 678 of_node_put(np); 679 return ret; 680 } 681 EXPORT_SYMBOL(check_legacy_ioport); 682 683 static int ppc_panic_event(struct notifier_block *this, 684 unsigned long event, void *ptr) 685 { 686 /* 687 * panic does a local_irq_disable, but we really 688 * want interrupts to be hard disabled. 689 */ 690 hard_irq_disable(); 691 692 /* 693 * If firmware-assisted dump has been registered then trigger 694 * firmware-assisted dump and let firmware handle everything else. 695 */ 696 crash_fadump(NULL, ptr); 697 if (ppc_md.panic) 698 ppc_md.panic(ptr); /* May not return */ 699 return NOTIFY_DONE; 700 } 701 702 static struct notifier_block ppc_panic_block = { 703 .notifier_call = ppc_panic_event, 704 .priority = INT_MIN /* may not return; must be done last */ 705 }; 706 707 /* 708 * Dump out kernel offset information on panic. 709 */ 710 static int dump_kernel_offset(struct notifier_block *self, unsigned long v, 711 void *p) 712 { 713 pr_emerg("Kernel Offset: 0x%lx from 0x%lx\n", 714 kaslr_offset(), KERNELBASE); 715 716 return 0; 717 } 718 719 static struct notifier_block kernel_offset_notifier = { 720 .notifier_call = dump_kernel_offset 721 }; 722 723 void __init setup_panic(void) 724 { 725 if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset() > 0) 726 atomic_notifier_chain_register(&panic_notifier_list, 727 &kernel_offset_notifier); 728 729 /* PPC64 always does a hard irq disable in its panic handler */ 730 if (!IS_ENABLED(CONFIG_PPC64) && !ppc_md.panic) 731 return; 732 atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block); 733 } 734 735 #ifdef CONFIG_CHECK_CACHE_COHERENCY 736 /* 737 * For platforms that have configurable cache-coherency. This function 738 * checks that the cache coherency setting of the kernel matches the setting 739 * left by the firmware, as indicated in the device tree. Since a mismatch 740 * will eventually result in DMA failures, we print * and error and call 741 * BUG() in that case. 742 */ 743 744 #define KERNEL_COHERENCY (!IS_ENABLED(CONFIG_NOT_COHERENT_CACHE)) 745 746 static int __init check_cache_coherency(void) 747 { 748 struct device_node *np; 749 const void *prop; 750 bool devtree_coherency; 751 752 np = of_find_node_by_path("/"); 753 prop = of_get_property(np, "coherency-off", NULL); 754 of_node_put(np); 755 756 devtree_coherency = prop ? false : true; 757 758 if (devtree_coherency != KERNEL_COHERENCY) { 759 printk(KERN_ERR 760 "kernel coherency:%s != device tree_coherency:%s\n", 761 KERNEL_COHERENCY ? "on" : "off", 762 devtree_coherency ? "on" : "off"); 763 BUG(); 764 } 765 766 return 0; 767 } 768 769 late_initcall(check_cache_coherency); 770 #endif /* CONFIG_CHECK_CACHE_COHERENCY */ 771 772 void ppc_printk_progress(char *s, unsigned short hex) 773 { 774 pr_info("%s\n", s); 775 } 776 777 static __init void print_system_info(void) 778 { 779 pr_info("-----------------------------------------------------\n"); 780 pr_info("phys_mem_size = 0x%llx\n", 781 (unsigned long long)memblock_phys_mem_size()); 782 783 pr_info("dcache_bsize = 0x%x\n", dcache_bsize); 784 pr_info("icache_bsize = 0x%x\n", icache_bsize); 785 786 pr_info("cpu_features = 0x%016lx\n", cur_cpu_spec->cpu_features); 787 pr_info(" possible = 0x%016lx\n", 788 (unsigned long)CPU_FTRS_POSSIBLE); 789 pr_info(" always = 0x%016lx\n", 790 (unsigned long)CPU_FTRS_ALWAYS); 791 pr_info("cpu_user_features = 0x%08x 0x%08x\n", 792 cur_cpu_spec->cpu_user_features, 793 cur_cpu_spec->cpu_user_features2); 794 pr_info("mmu_features = 0x%08x\n", cur_cpu_spec->mmu_features); 795 #ifdef CONFIG_PPC64 796 pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features); 797 #ifdef CONFIG_PPC_BOOK3S 798 pr_info("vmalloc start = 0x%lx\n", KERN_VIRT_START); 799 pr_info("IO start = 0x%lx\n", KERN_IO_START); 800 pr_info("vmemmap start = 0x%lx\n", (unsigned long)vmemmap); 801 #endif 802 #endif 803 804 if (!early_radix_enabled()) 805 print_system_hash_info(); 806 807 if (PHYSICAL_START > 0) 808 pr_info("physical_start = 0x%llx\n", 809 (unsigned long long)PHYSICAL_START); 810 pr_info("-----------------------------------------------------\n"); 811 } 812 813 #ifdef CONFIG_SMP 814 static void __init smp_setup_pacas(void) 815 { 816 int cpu; 817 818 for_each_possible_cpu(cpu) { 819 if (cpu == smp_processor_id()) 820 continue; 821 allocate_paca(cpu); 822 set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]); 823 } 824 825 memblock_free(cpu_to_phys_id, nr_cpu_ids * sizeof(u32)); 826 cpu_to_phys_id = NULL; 827 } 828 #endif 829 830 /* 831 * Called into from start_kernel this initializes memblock, which is used 832 * to manage page allocation until mem_init is called. 833 */ 834 void __init setup_arch(char **cmdline_p) 835 { 836 kasan_init(); 837 838 *cmdline_p = boot_command_line; 839 840 /* Set a half-reasonable default so udelay does something sensible */ 841 loops_per_jiffy = 500000000 / HZ; 842 843 /* Unflatten the device-tree passed by prom_init or kexec */ 844 unflatten_device_tree(); 845 846 /* 847 * Initialize cache line/block info from device-tree (on ppc64) or 848 * just cputable (on ppc32). 849 */ 850 initialize_cache_info(); 851 852 /* Initialize RTAS if available. */ 853 rtas_initialize(); 854 855 /* Check if we have an initrd provided via the device-tree. */ 856 check_for_initrd(); 857 858 /* Probe the machine type, establish ppc_md. */ 859 probe_machine(); 860 861 /* Setup panic notifier if requested by the platform. */ 862 setup_panic(); 863 864 /* 865 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do 866 * it from their respective probe() function. 867 */ 868 setup_power_save(); 869 870 /* Discover standard serial ports. */ 871 find_legacy_serial_ports(); 872 873 /* Register early console with the printk subsystem. */ 874 register_early_udbg_console(); 875 876 /* Setup the various CPU maps based on the device-tree. */ 877 smp_setup_cpu_maps(); 878 879 /* Initialize xmon. */ 880 xmon_setup(); 881 882 /* Check the SMT related command line arguments (ppc64). */ 883 check_smt_enabled(); 884 885 /* Parse memory topology */ 886 mem_topology_setup(); 887 888 /* 889 * Release secondary cpus out of their spinloops at 0x60 now that 890 * we can map physical -> logical CPU ids. 891 * 892 * Freescale Book3e parts spin in a loop provided by firmware, 893 * so smp_release_cpus() does nothing for them. 894 */ 895 #ifdef CONFIG_SMP 896 smp_setup_pacas(); 897 898 /* On BookE, setup per-core TLB data structures. */ 899 setup_tlb_core_data(); 900 #endif 901 902 /* Print various info about the machine that has been gathered so far. */ 903 print_system_info(); 904 905 /* Reserve large chunks of memory for use by CMA for KVM. */ 906 kvm_cma_reserve(); 907 908 /* Reserve large chunks of memory for us by CMA for hugetlb */ 909 gigantic_hugetlb_cma_reserve(); 910 911 klp_init_thread_info(&init_task); 912 913 setup_initial_init_mm(_stext, _etext, _edata, _end); 914 915 mm_iommu_init(&init_mm); 916 irqstack_early_init(); 917 exc_lvl_early_init(); 918 emergency_stack_init(); 919 920 mce_init(); 921 smp_release_cpus(); 922 923 initmem_init(); 924 925 early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT); 926 927 if (ppc_md.setup_arch) 928 ppc_md.setup_arch(); 929 930 setup_barrier_nospec(); 931 setup_spectre_v2(); 932 933 paging_init(); 934 935 /* Initialize the MMU context management stuff. */ 936 mmu_context_init(); 937 938 /* Interrupt code needs to be 64K-aligned. */ 939 if (IS_ENABLED(CONFIG_PPC64) && (unsigned long)_stext & 0xffff) 940 panic("Kernelbase not 64K-aligned (0x%lx)!\n", 941 (unsigned long)_stext); 942 } 943